projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
scsi: lpfc: Fix random heartbeat timeouts during heavy IO
[linux-2.6-block.git] / drivers / scsi / lpfc / lpfc.h
CommitLineData
dea3101e 1/*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
c44ce173 3 * Fibre Channel Host Bus Adapters. *
d080abe0
JS		 4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
50611577 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
c44ce173 7 * EMULEX and SLI are trademarks of Emulex. *
d080abe0 8 * www.broadcom.com *
c44ce173 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
dea3101e 10 * *
11 * This program is free software; you can redistribute it and/or *
c44ce173
JSEC		 12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
dea3101e 22 *******************************************************************/
23
2e0fef85 24#include <scsi/scsi_host.h>
895427bd 25#include <linux/ktime.h>
f485c18d 26#include <linux/workqueue.h>
88a2cfbb
JS		 27
28#if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
29#define CONFIG_SCSI_LPFC_DEBUG_FS
30#endif
31
dea3101e 32struct lpfc_sli2_slim;
33
5402a315
JS		 34#define ELX_MODEL_NAME_SIZE 80
35
3772a991
JS		 36#define LPFC_PCI_DEV_LP 0x1
37#define LPFC_PCI_DEV_OC 0x2
38
39#define LPFC_SLI_REV2 2
40#define LPFC_SLI_REV3 3
41#define LPFC_SLI_REV4 4
42
97eab634 43#define LPFC_MAX_TARGET 4096 /* max number of targets supported */
e17da18e
JS		 44#define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
45 requests */
46#define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
47 the NameServer before giving up. */
445cf4f4 48#define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
81301a9b 49#define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
e2aed29f
JS		 50#define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
51 cmnd for menlo needs nearly twice as for firmware
52 downloads using bsg */
96f7077f
JS		 53
54#define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */
55#define LPFC_MAX_SG_SLI4_SEG_CNT_DIF 128 /* sg element count per scsi cmnd */
56#define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */
81301a9b 57#define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
81e6a637 58#define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */
09294d46
JS		 59#define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */
60#define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */
d73154ba 61#define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */
09294d46 62
0558056c 63#define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
dea3101e 64#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
445cf4f4 65#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
495a714c 66#define LPFC_VNAME_LEN 100 /* vport symbolic name length */
977b5a0a
JS		 67#define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
68 queue depth change in millisecs */
69#define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
7dc517df 70#define LPFC_MIN_TGT_QDEPTH 10
977b5a0a 71#define LPFC_MAX_TGT_QDEPTH 0xFFFF
dea3101e 72
ea2151b4
JS		 73#define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
74 collection. */
92d7f7b0
JS		 75/*
76 * Following time intervals are used of adjusting SCSI device
77 * queue depths when there are driver resource error or Firmware
78 * resource error.
79 */
256ec0d0
JS		 80/* 1 Second */
81#define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1))
92d7f7b0
JS		 82
83/* Number of exchanges reserved for discovery to complete */
84#define LPFC_DISC_IOCB_BUFF_COUNT 20
85
858c9f6c 86#define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
311464ec 87#define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
858c9f6c 88
ba20c853
JS		 89#define LPFC_LOOK_AHEAD_OFF 0 /* Look ahead logic is turned off */
90
9399627f
JS		 91/* Error Attention event polling interval */
92#define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
93
dea3101e 94/* Define macros for 64 bit support */
95#define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
96#define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
97#define getPaddr(high, low) ((dma_addr_t)( \
98 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
99/* Provide maximum configuration definitions. */
100#define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
dea3101e 101#define FC_MAX_ADPTMSG 64
102
103#define MAX_HBAEVT 32
96418b5e 104#define MAX_HBAS_NO_RESET 16
dea3101e 105
9399627f
JS		 106/* Number of MSI-X vectors the driver uses */
107#define LPFC_MSIX_VECTORS 2
108
5e9d9b82 109/* lpfc wait event data ready flag */
2ade92ae 110#define LPFC_DATA_READY 0 /* bit 0 */
5e9d9b82 111
809c7536
JS		 112/* queue dump line buffer size */
113#define LPFC_LBUF_SZ 128
114
618a5230
JS		 115/* mailbox system shutdown options */
116#define LPFC_MBX_NO_WAIT 0
117#define LPFC_MBX_WAIT 1
118
875fbdfe
JSEC		 119enum lpfc_polling_flags {
120 ENABLE_FCP_RING_POLLING = 0x1,
121 DISABLE_FCP_RING_INT = 0x2
122};
123
895427bd
JS		 124struct perf_prof {
125 uint16_t cmd_cpu[40];
126 uint16_t rsp_cpu[40];
127 uint16_t qh_cpu[40];
128 uint16_t wqidx[40];
129};
130
01649561
JS		 131/*
132 * Provide for FC4 TYPE x28 - NVME. The
133 * bit mask for FCP and NVME is 0x8 identically
134 * because they are 32 bit positions distance.
135 */
a0f2d3ef
JS		 136#define LPFC_FC4_TYPE_BITMASK 0x00000100
137
dea3101e 138/* Provide DMA memory definitions the driver uses per port instance. */
139struct lpfc_dmabuf {
140 struct list_head list;
141 void *virt; /* virtual address ptr */
142 dma_addr_t phys; /* mapped address */
76bb24ef 143 uint32_t buffer_tag; /* used for tagged queue ring */
dea3101e 144};
145
6c621a22
JS		 146struct lpfc_nvmet_ctxbuf {
147 struct list_head list;
148 struct lpfc_nvmet_rcv_ctx *context;
149 struct lpfc_iocbq *iocbq;
150 struct lpfc_sglq *sglq;
151};
152
dea3101e 153struct lpfc_dma_pool {
154 struct lpfc_dmabuf *elements;
155 uint32_t max_count;
156 uint32_t current_count;
157};
158
ed957684 159struct hbq_dmabuf {
da0436e9 160 struct lpfc_dmabuf hbuf;
ed957684 161 struct lpfc_dmabuf dbuf;
895427bd
JS		 162 uint16_t total_size;
163 uint16_t bytes_recv;
ed957684 164 uint32_t tag;
4d9ab994 165 struct lpfc_cq_event cq_event;
45ed1190 166 unsigned long time_stamp;
895427bd
JS		 167 void *context;
168};
169
170struct rqb_dmabuf {
171 struct lpfc_dmabuf hbuf;
172 struct lpfc_dmabuf dbuf;
173 uint16_t total_size;
174 uint16_t bytes_recv;
a8cf5dfe 175 uint16_t idx;
895427bd
JS		 176 struct lpfc_queue *hrq; /* ptr to associated Header RQ */
177 struct lpfc_queue *drq; /* ptr to associated Data RQ */
ed957684
JS		 178};
179
dea3101e 180/* Priority bit. Set value to exceed low water mark in lpfc_mem. */
181#define MEM_PRI 0x100
182
183
184/****************************************************************************/
185/* Device VPD save area */
186/****************************************************************************/
187typedef struct lpfc_vpd {
188 uint32_t status; /* vpd status value */
189 uint32_t length; /* number of bytes actually returned */
190 struct {
191 uint32_t rsvd1; /* Revision numbers */
192 uint32_t biuRev;
193 uint32_t smRev;
194 uint32_t smFwRev;
195 uint32_t endecRev;
196 uint16_t rBit;
197 uint8_t fcphHigh;
198 uint8_t fcphLow;
199 uint8_t feaLevelHigh;
200 uint8_t feaLevelLow;
201 uint32_t postKernRev;
202 uint32_t opFwRev;
203 uint8_t opFwName[16];
204 uint32_t sli1FwRev;
205 uint8_t sli1FwName[16];
206 uint32_t sli2FwRev;
207 uint8_t sli2FwName[16];
208 } rev;
92d7f7b0
JS		 209 struct {
210#ifdef __BIG_ENDIAN_BITFIELD
da0436e9
JS		 211 uint32_t rsvd3 :19; /* Reserved */
212 uint32_t cdss : 1; /* Configure Data Security SLI */
213 uint32_t rsvd2 : 3; /* Reserved */
214 uint32_t cbg : 1; /* Configure BlockGuard */
92d7f7b0
JS		 215 uint32_t cmv : 1; /* Configure Max VPIs */
216 uint32_t ccrp : 1; /* Config Command Ring Polling */
217 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
218 uint32_t chbs : 1; /* Cofigure Host Backing store */
219 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
220 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
221 uint32_t cmx : 1; /* Configure Max XRIs */
222 uint32_t cmr : 1; /* Configure Max RPIs */
223#else /* __LITTLE_ENDIAN */
224 uint32_t cmr : 1; /* Configure Max RPIs */
225 uint32_t cmx : 1; /* Configure Max XRIs */
226 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
227 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
228 uint32_t chbs : 1; /* Cofigure Host Backing store */
229 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
230 uint32_t ccrp : 1; /* Config Command Ring Polling */
231 uint32_t cmv : 1; /* Configure Max VPIs */
da0436e9
JS		 232 uint32_t cbg : 1; /* Configure BlockGuard */
233 uint32_t rsvd2 : 3; /* Reserved */
234 uint32_t cdss : 1; /* Configure Data Security SLI */
235 uint32_t rsvd3 :19; /* Reserved */
92d7f7b0
JS		 236#endif
237 } sli3Feat;
dea3101e 238} lpfc_vpd_t;
239
240struct lpfc_scsi_buf;
241
242
243/*
244 * lpfc stat counters
245 */
246struct lpfc_stats {
247 /* Statistics for ELS commands */
248 uint32_t elsLogiCol;
249 uint32_t elsRetryExceeded;
250 uint32_t elsXmitRetry;
251 uint32_t elsDelayRetry;
252 uint32_t elsRcvDrop;
253 uint32_t elsRcvFrame;
254 uint32_t elsRcvRSCN;
255 uint32_t elsRcvRNID;
256 uint32_t elsRcvFARP;
257 uint32_t elsRcvFARPR;
258 uint32_t elsRcvFLOGI;
259 uint32_t elsRcvPLOGI;
260 uint32_t elsRcvADISC;
261 uint32_t elsRcvPDISC;
262 uint32_t elsRcvFAN;
263 uint32_t elsRcvLOGO;
264 uint32_t elsRcvPRLO;
265 uint32_t elsRcvPRLI;
7bb3b137 266 uint32_t elsRcvLIRR;
12265f68 267 uint32_t elsRcvRLS;
7bb3b137
JW		 268 uint32_t elsRcvRPS;
269 uint32_t elsRcvRPL;
5ffc266e 270 uint32_t elsRcvRRQ;
12265f68
JS		 271 uint32_t elsRcvRTV;
272 uint32_t elsRcvECHO;
8b017a30 273 uint32_t elsRcvLCB;
86478875 274 uint32_t elsRcvRDP;
dea3101e 275 uint32_t elsXmitFLOGI;
92d7f7b0 276 uint32_t elsXmitFDISC;
dea3101e 277 uint32_t elsXmitPLOGI;
278 uint32_t elsXmitPRLI;
279 uint32_t elsXmitADISC;
280 uint32_t elsXmitLOGO;
281 uint32_t elsXmitSCR;
282 uint32_t elsXmitRNID;
283 uint32_t elsXmitFARP;
284 uint32_t elsXmitFARPR;
285 uint32_t elsXmitACC;
286 uint32_t elsXmitLSRJT;
287
288 uint32_t frameRcvBcast;
289 uint32_t frameRcvMulti;
290 uint32_t strayXmitCmpl;
291 uint32_t frameXmitDelay;
292 uint32_t xriCmdCmpl;
293 uint32_t xriStatErr;
294 uint32_t LinkUp;
295 uint32_t LinkDown;
296 uint32_t LinkMultiEvent;
297 uint32_t NoRcvBuf;
298 uint32_t fcpCmd;
299 uint32_t fcpCmpl;
300 uint32_t fcpRspErr;
301 uint32_t fcpRemoteStop;
302 uint32_t fcpPortRjt;
303 uint32_t fcpPortBusy;
304 uint32_t fcpError;
305 uint32_t fcpLocalErr;
306};
307
2e0fef85
JS		 308struct lpfc_hba;
309
92d7f7b0 310
2e0fef85 311enum discovery_state {
92d7f7b0
JS		 312 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
313 LPFC_VPORT_FAILED = 1, /* vport has failed */
314 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
315 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
316 LPFC_FDISC = 8, /* FDISC sent for vport */
317 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
318 * configured */
319 LPFC_NS_REG = 10, /* Register with NameServer */
320 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
321 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
322 * device authentication / discovery */
323 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
324 LPFC_VPORT_READY = 32,
2e0fef85
JS		 325};
326
327enum hba_state {
328 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
329 LPFC_WARM_START = 1, /* HBA state after selective reset */
330 LPFC_INIT_START = 2, /* Initial state after board reset */
331 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
332 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
333 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
92d7f7b0 334 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
2e0fef85 335 * CLEAR_LA */
92d7f7b0 336 LPFC_HBA_READY = 32,
2e0fef85
JS		 337 LPFC_HBA_ERROR = -1
338};
339
340struct lpfc_vport {
2e0fef85 341 struct lpfc_hba *phba;
3772a991 342 struct list_head listentry;
2e0fef85
JS		 343 uint8_t port_type;
344#define LPFC_PHYSICAL_PORT 1
345#define LPFC_NPIV_PORT 2
346#define LPFC_FABRIC_PORT 3
347 enum discovery_state port_state;
348
92d7f7b0 349 uint16_t vpi;
da0436e9 350 uint16_t vfi;
c868595d
JS		 351 uint8_t vpi_state;
352#define LPFC_VPI_REGISTERED 0x1
2e0fef85
JS		 353
354 uint32_t fc_flag; /* FC flags */
355/* Several of these flags are HBA centric and should be moved to
356 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
357 */
92d7f7b0
JS		 358#define FC_PT2PT 0x1 /* pt2pt with no fabric */
359#define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
360#define FC_DISC_TMO 0x4 /* Discovery timer running */
361#define FC_PUBLIC_LOOP 0x8 /* Public loop */
362#define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
363#define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
364#define FC_NLP_MORE 0x40 /* More node to process in node tbl */
365#define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
366#define FC_FABRIC 0x100 /* We are fabric attached */
4b40c59e 367#define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
92d7f7b0 368#define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
4b40c59e 369#define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
92d7f7b0
JS		 370#define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
371#define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
372#define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
373#define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
92d7f7b0
JS		 374#define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
375#define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
1c6834a7 376#define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
695a814e
JS		 377#define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
378#define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
379#define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
92494144 380#define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
2e0fef85 381
7ee5d43e
JS		 382 uint32_t ct_flags;
383#define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
384#define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
385#define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
386#define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
387#define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
388
2e0fef85
JS		 389 struct list_head fc_nodes;
390
391 /* Keep counters for the number of entries in each list. */
392 uint16_t fc_plogi_cnt;
393 uint16_t fc_adisc_cnt;
394 uint16_t fc_reglogin_cnt;
395 uint16_t fc_prli_cnt;
396 uint16_t fc_unmap_cnt;
397 uint16_t fc_map_cnt;
398 uint16_t fc_npr_cnt;
399 uint16_t fc_unused_cnt;
400 struct serv_parm fc_sparam; /* buffer for our service parameters */
401
402 uint32_t fc_myDID; /* fibre channel S_ID */
403 uint32_t fc_prevDID; /* previous fibre channel S_ID */
92494144
JS		 404 struct lpfc_name fabric_portname;
405 struct lpfc_name fabric_nodename;
2e0fef85
JS		 406
407 int32_t stopped; /* HBA has not been restarted since last ERATT */
408 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
409
a0f2d3ef
JS		 410 uint32_t num_disc_nodes; /* in addition to hba_state */
411 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
2e0fef85
JS		 412
413 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
414 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
7f5f3d0d 415 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
2e0fef85
JS		 416 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
417 struct lpfc_name fc_nodename; /* fc nodename */
418 struct lpfc_name fc_portname; /* fc portname */
419
420 struct lpfc_work_evt disc_timeout_evt;
421
422 struct timer_list fc_disctmo; /* Discovery rescue timer */
423 uint8_t fc_ns_retry; /* retries for fabric nameserver */
424 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
425
426 spinlock_t work_port_lock;
427 uint32_t work_port_events; /* Timeout to be handled */
858c9f6c
JS		 428#define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
429#define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
92494144 430#define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
858c9f6c
JS		 431
432#define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
433#define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
b1c11812 434#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
858c9f6c
JS		 435#define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
436#define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
2a9bf3d0 437#define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
2e0fef85 438
2e0fef85 439 struct timer_list els_tmofunc;
92494144 440 struct timer_list delayed_disc_tmo;
2e0fef85
JS		 441
442 int unreg_vpi_cmpl;
443
444 uint8_t load_flag;
445#define FC_LOADING 0x1 /* HBA in process of loading drvr */
446#define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
4258e98e 447#define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */
3de2a653
JS		 448 /* Vport Config Parameters */
449 uint32_t cfg_scan_down;
450 uint32_t cfg_lun_queue_depth;
451 uint32_t cfg_nodev_tmo;
452 uint32_t cfg_devloss_tmo;
453 uint32_t cfg_restrict_login;
454 uint32_t cfg_peer_port_login;
455 uint32_t cfg_fcp_class;
456 uint32_t cfg_use_adisc;
3de2a653 457 uint32_t cfg_discovery_threads;
e8b62011 458 uint32_t cfg_log_verbose;
3de2a653 459 uint32_t cfg_max_luns;
7ee5d43e 460 uint32_t cfg_enable_da_id;
977b5a0a 461 uint32_t cfg_max_scsicmpl_time;
7dc517df 462 uint32_t cfg_tgt_queue_depth;
3cb01c57 463 uint32_t cfg_first_burst_size;
3de2a653 464 uint32_t dev_loss_tmo_changed;
51ef4c26
JS		 465
466 struct fc_vport *fc_vport;
467
923e4b6a 468#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
51ef4c26
JS		 469 struct dentry *debug_disc_trc;
470 struct dentry *debug_nodelist;
bd2cdd5e
JS		 471 struct dentry *debug_nvmestat;
472 struct dentry *debug_nvmektime;
473 struct dentry *debug_cpucheck;
51ef4c26
JS		 474 struct dentry *vport_debugfs_root;
475 struct lpfc_debugfs_trc *disc_trc;
476 atomic_t disc_trc_cnt;
477#endif
ea2151b4
JS		 478 uint8_t stat_data_enabled;
479 uint8_t stat_data_blocked;
da0436e9 480 struct list_head rcv_buffer_list;
45ed1190 481 unsigned long rcv_buffer_time_stamp;
da0436e9
JS		 482 uint32_t vport_flag;
483#define STATIC_VPORT 1
aeb3c817
JS		 484#define FAWWPN_SET 2
485#define FAWWPN_PARAM_CHG 4
4258e98e
JS		 486
487 uint16_t fdmi_num_disc;
488 uint32_t fdmi_hba_mask;
489 uint32_t fdmi_port_mask;
895427bd
JS		 490
491 /* There is a single nvme instance per vport. */
492 struct nvme_fc_local_port *localport;
493 uint8_t nvmei_support; /* driver supports NVME Initiator */
494 uint32_t last_fcp_wqidx;
2e0fef85
JS		 495};
496
ed957684
JS		 497struct hbq_s {
498 uint16_t entry_count; /* Current number of HBQ slots */
a8adb832 499 uint16_t buffer_count; /* Current number of buffers posted */
ed957684
JS		 500 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
501 uint32_t hbqPutIdx; /* HBQ slot to use */
502 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
51ef4c26
JS		 503 void *hbq_virt; /* Virtual ptr to this hbq */
504 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
505 /* Callback for HBQ buffer allocation */
506 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
507 /* Callback for HBQ buffer free */
508 void (*hbq_free_buffer) (struct lpfc_hba *,
509 struct hbq_dmabuf *);
ed957684
JS		 510};
511
51ef4c26 512/* this matches the position in the lpfc_hbq_defs array */
92d7f7b0 513#define LPFC_ELS_HBQ 0
895427bd 514#define LPFC_MAX_HBQS 1
ed957684 515
7af67051
JS		 516enum hba_temp_state {
517 HBA_NORMAL_TEMP,
518 HBA_OVER_TEMP
519};
520
db2378e0
JS		 521enum intr_type_t {
522 NONE = 0,
523 INTx,
524 MSI,
525 MSIX,
526};
527
6dd9e31c 528#define LPFC_CT_CTX_MAX 64
f1c3b0fc
JS		 529struct unsol_rcv_ct_ctx {
530 uint32_t ctxt_id;
531 uint32_t SID;
6dd9e31c
JS		 532 uint32_t valid;
533#define UNSOL_INVALID 0
534#define UNSOL_VALID 1
7851fe2c
JS		 535 uint16_t oxid;
536 uint16_t rxid;
f1c3b0fc
JS		 537};
538
76a95d75
JS		 539#define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
540#define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
541#define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
542#define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
543#define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
544#define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
545#define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
d38dd52c
JS		 546#define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */
547#define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_32G
548#define LPFC_USER_LINK_SPEED_BITMAP ((1ULL << LPFC_USER_LINK_SPEED_32G) | \
549 (1 << LPFC_USER_LINK_SPEED_16G) | \
76a95d75
JS		 550 (1 << LPFC_USER_LINK_SPEED_10G) | \
551 (1 << LPFC_USER_LINK_SPEED_8G) | \
552 (1 << LPFC_USER_LINK_SPEED_4G) | \
553 (1 << LPFC_USER_LINK_SPEED_2G) | \
554 (1 << LPFC_USER_LINK_SPEED_1G) | \
555 (1 << LPFC_USER_LINK_SPEED_AUTO))
d38dd52c 556#define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32"
76a95d75 557
7ad20aa9
JS		 558enum nemb_type {
559 nemb_mse = 1,
560 nemb_hbd
561};
562
563enum mbox_type {
564 mbox_rd = 1,
565 mbox_wr
566};
567
568enum dma_type {
569 dma_mbox = 1,
570 dma_ebuf
571};
572
573enum sta_type {
574 sta_pre_addr = 1,
575 sta_pos_addr
576};
577
578struct lpfc_mbox_ext_buf_ctx {
579 uint32_t state;
580#define LPFC_BSG_MBOX_IDLE 0
581#define LPFC_BSG_MBOX_HOST 1
582#define LPFC_BSG_MBOX_PORT 2
583#define LPFC_BSG_MBOX_DONE 3
584#define LPFC_BSG_MBOX_ABTS 4
585 enum nemb_type nembType;
586 enum mbox_type mboxType;
587 uint32_t numBuf;
588 uint32_t mbxTag;
589 uint32_t seqNum;
590 struct lpfc_dmabuf *mbx_dmabuf;
591 struct list_head ext_dmabuf_list;
592};
593
dea3101e 594struct lpfc_hba {
3772a991
JS		 595 /* SCSI interface function jump table entries */
596 int (*lpfc_new_scsi_buf)
597 (struct lpfc_vport *, int);
598 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
19ca7609 599 (struct lpfc_hba *, struct lpfc_nodelist *);
3772a991
JS		 600 int (*lpfc_scsi_prep_dma_buf)
601 (struct lpfc_hba *, struct lpfc_scsi_buf *);
602 void (*lpfc_scsi_unprep_dma_buf)
603 (struct lpfc_hba *, struct lpfc_scsi_buf *);
604 void (*lpfc_release_scsi_buf)
605 (struct lpfc_hba *, struct lpfc_scsi_buf *);
606 void (*lpfc_rampdown_queue_depth)
607 (struct lpfc_hba *);
608 void (*lpfc_scsi_prep_cmnd)
609 (struct lpfc_vport *, struct lpfc_scsi_buf *,
610 struct lpfc_nodelist *);
acd6859b 611
3772a991
JS		 612 /* IOCB interface function jump table entries */
613 int (*__lpfc_sli_issue_iocb)
614 (struct lpfc_hba *, uint32_t,
615 struct lpfc_iocbq *, uint32_t);
616 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
617 struct lpfc_iocbq *);
618 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
3772a991
JS		 619 IOCB_t * (*lpfc_get_iocb_from_iocbq)
620 (struct lpfc_iocbq *);
621 void (*lpfc_scsi_cmd_iocb_cmpl)
622 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
623
624 /* MBOX interface function jump table entries */
625 int (*lpfc_sli_issue_mbox)
626 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
acd6859b 627
3772a991
JS		 628 /* Slow-path IOCB process function jump table entries */
629 void (*lpfc_sli_handle_slow_ring_event)
630 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
631 uint32_t mask);
acd6859b 632
3772a991
JS		 633 /* INIT device interface function jump table entries */
634 int (*lpfc_sli_hbq_to_firmware)
635 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
636 int (*lpfc_sli_brdrestart)
637 (struct lpfc_hba *);
638 int (*lpfc_sli_brdready)
639 (struct lpfc_hba *, uint32_t);
640 void (*lpfc_handle_eratt)
641 (struct lpfc_hba *);
642 void (*lpfc_stop_port)
643 (struct lpfc_hba *);
84d1b006 644 int (*lpfc_hba_init_link)
6e7288d9 645 (struct lpfc_hba *, uint32_t);
84d1b006 646 int (*lpfc_hba_down_link)
6e7288d9 647 (struct lpfc_hba *, uint32_t);
7f86059a
JS		 648 int (*lpfc_selective_reset)
649 (struct lpfc_hba *);
3772a991 650
acd6859b
JS		 651 int (*lpfc_bg_scsi_prep_dma_buf)
652 (struct lpfc_hba *, struct lpfc_scsi_buf *);
653 /* Add new entries here */
654
3772a991
JS		 655 /* SLI4 specific HBA data structure */
656 struct lpfc_sli4_hba sli4_hba;
657
f485c18d
DK		 658 struct workqueue_struct *wq;
659
dea3101e 660 struct lpfc_sli sli;
3772a991
JS		 661 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
662 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
ed957684 663 uint32_t sli3_options; /* Mask of enabled SLI3 options */
34b02dcd
JS		 664#define LPFC_SLI3_HBQ_ENABLED 0x01
665#define LPFC_SLI3_NPIV_ENABLED 0x02
666#define LPFC_SLI3_VPORT_TEARDOWN 0x04
667#define LPFC_SLI3_CRP_ENABLED 0x08
81301a9b 668#define LPFC_SLI3_BG_ENABLED 0x20
da0436e9 669#define LPFC_SLI3_DSS_ENABLED 0x40
fedd3b7b
JS		 670#define LPFC_SLI4_PERFH_ENABLED 0x80
671#define LPFC_SLI4_PHWQ_ENABLED 0x100
ed957684
JS		 672 uint32_t iocb_cmd_size;
673 uint32_t iocb_rsp_size;
2e0fef85
JS		 674
675 enum hba_state link_state;
676 uint32_t link_flag; /* link state flags */
311464ec 677#define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
2e0fef85
JS		 678 /* This flag is set while issuing */
679 /* INIT_LINK mailbox command */
92d7f7b0 680#define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
1b32f6aa 681#define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
ae9e28f3
JS		 682#define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */
683#define LS_MDS_LOOPBACK 0x16 /* MDS Diagnostics Link Up (Loopback) */
2e0fef85 684
9399627f
JS		 685 uint32_t hba_flag; /* hba generic flags */
686#define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
da0436e9 687#define DEFER_ERATT 0x2 /* Deferred error attention in progress */
76a95d75 688#define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
45ed1190 689#define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
da0436e9
JS		 690#define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
691#define FCP_XRI_ABORT_EVENT 0x20
692#define ELS_XRI_ABORT_EVENT 0x40
693#define ASYNC_EVENT 0x80
a0c87cbd 694#define LINK_DISABLED 0x100 /* Link disabled by user */
a93ff37a
JS		 695#define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
696#define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
697#define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
698#define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
699#define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
19ca7609 700#define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
4f2e66c6 701#define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */
0293635e 702#define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */
65791f1f 703#define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */
c691816e
JS		 704#define HBA_FORCED_LINK_SPEED 0x40000 /*
705 * Firmware supports Forced Link Speed
706 * capability
707 */
895427bd
JS		 708#define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */
709
45ed1190 710 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
34b02dcd
JS		 711 struct lpfc_dmabuf slim2p;
712
713 MAILBOX_t *mbox;
7a470277 714 uint32_t *mbox_ext;
7ad20aa9 715 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
9399627f 716 uint32_t ha_copy;
34b02dcd
JS		 717 struct _PCB *pcb;
718 struct _IOCB *IOCBs;
2e0fef85 719
34b02dcd 720 struct lpfc_dmabuf hbqslimp;
2e0fef85 721
dea3101e 722 uint16_t pci_cfg_value;
723
dea3101e 724 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
725
726 uint32_t fc_eventTag; /* event tag for link attention */
4d9ab994 727 uint32_t link_events;
dea3101e 728
dea3101e 729 /* These fields used to be binfo */
dea3101e 730 uint32_t fc_pref_DID; /* preferred D_ID */
92d7f7b0 731 uint8_t fc_pref_ALPA; /* preferred AL_PA */
12265f68 732 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
dea3101e 733 uint32_t fc_edtov; /* E_D_TOV timer value */
734 uint32_t fc_arbtov; /* ARB_TOV timer value */
735 uint32_t fc_ratov; /* R_A_TOV timer value */
736 uint32_t fc_rttov; /* R_T_TOV timer value */
737 uint32_t fc_altov; /* AL_TOV timer value */
738 uint32_t fc_crtov; /* C_R_TOV timer value */
dea3101e 739
dea3101e 740 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
741 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
742
dea3101e 743 uint32_t lmt;
dea3101e 744
745 uint32_t fc_topology; /* link topology, from LINK INIT */
e74c03c8 746 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
dea3101e 747
748 struct lpfc_stats fc_stat;
749
dea3101e 750 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
751 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
752
2e0fef85
JS		 753 uint8_t wwnn[8];
754 uint8_t wwpn[8];
dea3101e 755 uint32_t RandomData[7];
7bdedb34 756 uint8_t fcp_embed_io;
895427bd
JS		 757 uint8_t nvme_support; /* Firmware supports NVME */
758 uint8_t nvmet_support; /* driver supports NVMET */
f358dd0c 759#define LPFC_NVMET_MAX_PORTS 32
7bdedb34 760 uint8_t mds_diags_support;
0cf07f84 761 uint32_t initial_imax;
44fd7fe3 762 uint8_t bbcredit_support;
dea3101e 763
3de2a653 764 /* HBA Config Parameters */
dea3101e 765 uint32_t cfg_ack0;
78b2d852 766 uint32_t cfg_enable_npiv;
19ca7609 767 uint32_t cfg_enable_rrq;
dea3101e 768 uint32_t cfg_topology;
dea3101e 769 uint32_t cfg_link_speed;
7d791df7
JS		 770#define LPFC_FCF_FOV 1 /* Fast fcf failover */
771#define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
772 uint32_t cfg_fcf_failover_policy;
49aa143d 773 uint32_t cfg_fcp_io_sched;
a6571c6e 774 uint32_t cfg_fcp2_no_tgt_reset;
dea3101e 775 uint32_t cfg_cr_delay;
776 uint32_t cfg_cr_count;
cf5bf97e 777 uint32_t cfg_multi_ring_support;
a4bc3379
JS		 778 uint32_t cfg_multi_ring_rctl;
779 uint32_t cfg_multi_ring_type;
875fbdfe
JSEC		 780 uint32_t cfg_poll;
781 uint32_t cfg_poll_tmo;
0c411222 782 uint32_t cfg_task_mgmt_tmo;
4ff43246 783 uint32_t cfg_use_msi;
0cf07f84 784 uint32_t cfg_auto_imax;
da0436e9 785 uint32_t cfg_fcp_imax;
7bb03bbf 786 uint32_t cfg_fcp_cpu_map;
67d12733 787 uint32_t cfg_fcp_io_channel;
f358dd0c 788 uint32_t cfg_suppress_rsp;
895427bd
JS		 789 uint32_t cfg_nvme_oas;
790 uint32_t cfg_nvme_io_channel;
2d7dbc4c 791 uint32_t cfg_nvmet_mrq;
f358dd0c 792 uint32_t cfg_enable_nvmet;
895427bd 793 uint32_t cfg_nvme_enable_fb;
2d7dbc4c 794 uint32_t cfg_nvmet_fb_size;
96f7077f 795 uint32_t cfg_total_seg_cnt;
dea3101e 796 uint32_t cfg_sg_seg_cnt;
4d4c4a4a 797 uint32_t cfg_nvme_seg_cnt;
dea3101e 798 uint32_t cfg_sg_dma_buf_size;
352e5fd1
JS		 799 uint64_t cfg_soft_wwnn;
800 uint64_t cfg_soft_wwpn;
3de2a653 801 uint32_t cfg_hba_queue_depth;
13815c83
JS		 802 uint32_t cfg_enable_hba_reset;
803 uint32_t cfg_enable_hba_heartbeat;
1ba981fd
JS		 804 uint32_t cfg_fof;
805 uint32_t cfg_EnableXLane;
806 uint8_t cfg_oas_tgt_wwpn[8];
807 uint8_t cfg_oas_vpt_wwpn[8];
808 uint32_t cfg_oas_lun_state;
809#define OAS_LUN_ENABLE 1
810#define OAS_LUN_DISABLE 0
811 uint32_t cfg_oas_lun_status;
812#define OAS_LUN_STATUS_EXISTS 0x01
813 uint32_t cfg_oas_flags;
814#define OAS_FIND_ANY_VPORT 0x01
815#define OAS_FIND_ANY_TARGET 0x02
816#define OAS_LUN_VALID 0x04
c92c841c 817 uint32_t cfg_oas_priority;
1ba981fd 818 uint32_t cfg_XLanePriority;
81301a9b 819 uint32_t cfg_enable_bg;
b3b98b74
JS		 820 uint32_t cfg_prot_mask;
821 uint32_t cfg_prot_guard;
7a470277 822 uint32_t cfg_hostmem_hgp;
da0436e9 823 uint32_t cfg_log_verbose;
0d878419 824 uint32_t cfg_aer_support;
912e3acd 825 uint32_t cfg_sriov_nr_virtfn;
c71ab861 826 uint32_t cfg_request_firmware_upgrade;
2a9bf3d0 827 uint32_t cfg_iocb_cnt;
84d1b006 828 uint32_t cfg_suppress_link_up;
cff261f6 829 uint32_t cfg_rrq_xri_bitmap_sz;
8eb8b960 830 uint32_t cfg_delay_discovery;
12247e81 831 uint32_t cfg_sli_mode;
e40a02c1
JS		 832#define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
833#define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
834#define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
ab56dc2e 835 uint32_t cfg_enable_dss;
4258e98e
JS		 836 uint32_t cfg_fdmi_on;
837#define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */
838#define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */
4258e98e 839 uint32_t cfg_enable_SmartSAN;
7bdedb34 840 uint32_t cfg_enable_mds_diags;
895427bd 841 uint32_t cfg_enable_fc4_type;
44fd7fe3 842 uint32_t cfg_enable_bbcr; /*Enable BB Credit Recovery*/
895427bd
JS		 843 uint32_t cfg_xri_split;
844#define LPFC_ENABLE_FCP 1
845#define LPFC_ENABLE_NVME 2
846#define LPFC_ENABLE_BOTH 3
847 uint32_t io_channel_irqs; /* number of irqs for io channels */
f358dd0c 848 struct nvmet_fc_target_port *targetport;
dea3101e 849 lpfc_vpd_t vpd; /* vital product data */
850
dea3101e 851 struct pci_dev *pcidev;
852 struct list_head work_list;
853 uint32_t work_ha; /* Host Attention Bits for WT */
854 uint32_t work_ha_mask; /* HA Bits owned by WT */
855 uint32_t work_hs; /* HS stored in case of ERRAT */
856 uint32_t work_status[2]; /* Extra status from SLIM */
dea3101e 857
5e9d9b82 858 wait_queue_head_t work_waitq;
dea3101e 859 struct task_struct *worker_thread;
d7c255b2 860 unsigned long data_flags;
dea3101e 861
3163f725 862 uint32_t hbq_in_use; /* HBQs in use flag */
ed957684 863 uint32_t hbq_count; /* Count of configured HBQs */
92d7f7b0 864 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
ed957684 865
895427bd
JS		 866 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
867 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
8fa38513 868
115a4124
JS		 869 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
870 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
871 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */
dea3101e 872 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
873 PCI BAR0 */
874 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
875 PCI BAR2 */
876
962bc51b
JS		 877 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
878 PCI BAR0 with dual-ULP support */
879 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
880 PCI BAR2 with dual-ULP support */
881 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
882 PCI BAR4 with dual-ULP support */
883#define PCI_64BIT_BAR0 0
884#define PCI_64BIT_BAR2 2
885#define PCI_64BIT_BAR4 4
dea3101e 886 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
887 void __iomem *HAregaddr; /* virtual address for host attn reg */
888 void __iomem *CAregaddr; /* virtual address for chip attn reg */
889 void __iomem *HSregaddr; /* virtual address for host status
890 reg */
891 void __iomem *HCregaddr; /* virtual address for host ctl reg */
892
ed957684 893 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
34b02dcd 894 struct lpfc_pgp *port_gp;
ed957684 895 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
92d7f7b0 896 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
ed957684 897
dea3101e 898 int brd_no; /* FC board number */
dea3101e 899 char SerialNumber[32]; /* adapter Serial Number */
900 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
901 char ModelDesc[256]; /* Model Description */
902 char ModelName[80]; /* Model Name */
903 char ProgramType[256]; /* Program Type */
904 char Port[20]; /* Port No */
905 uint8_t vpd_flag; /* VPD data flag */
906
907#define VPD_MODEL_DESC 0x1 /* valid vpd model description */
908#define VPD_MODEL_NAME 0x2 /* valid vpd model name */
909#define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
910#define VPD_PORT 0x8 /* valid vpd port data */
911#define VPD_MASK 0xf /* mask for any vpd data */
912
352e5fd1
JS		 913 uint8_t soft_wwn_enable;
914
875fbdfe 915 struct timer_list fcp_poll_timer;
9399627f 916 struct timer_list eratt_poll;
65791f1f 917 uint32_t eratt_poll_interval;
875fbdfe 918
dea3101e 919 /*
920 * stat counters
921 */
2cee7808
JS		 922 atomic_t fc4ScsiInputRequests;
923 atomic_t fc4ScsiOutputRequests;
924 atomic_t fc4ScsiControlRequests;
925 atomic_t fc4ScsiIoCmpls;
926 atomic_t fc4NvmeInputRequests;
927 atomic_t fc4NvmeOutputRequests;
928 atomic_t fc4NvmeControlRequests;
929 atomic_t fc4NvmeIoCmpls;
930 atomic_t fc4NvmeLsRequests;
931 atomic_t fc4NvmeLsCmpls;
895427bd 932
81301a9b
JS		 933 uint64_t bg_guard_err_cnt;
934 uint64_t bg_apptag_err_cnt;
935 uint64_t bg_reftag_err_cnt;
dea3101e 936
dea3101e 937 /* fastpath list. */
a40fc5f0
JS		 938 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */
939 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */
940 struct list_head lpfc_scsi_buf_list_get;
941 struct list_head lpfc_scsi_buf_list_put;
dea3101e 942 uint32_t total_scsi_bufs;
895427bd
JS		 943 spinlock_t nvme_buf_list_get_lock; /* NVME buf alloc list lock */
944 spinlock_t nvme_buf_list_put_lock; /* NVME buf free list lock */
945 struct list_head lpfc_nvme_buf_list_get;
946 struct list_head lpfc_nvme_buf_list_put;
947 uint32_t total_nvme_bufs;
cf1a1d3e
JS		 948 uint32_t get_nvme_bufs;
949 uint32_t put_nvme_bufs;
dea3101e 950 struct list_head lpfc_iocb_list;
951 uint32_t total_iocbq_bufs;
19ca7609 952 struct list_head active_rrq_list;
2e0fef85 953 spinlock_t hbalock;
dea3101e 954
771db5c0
RP		 955 /* dma_mem_pools */
956 struct dma_pool *lpfc_sg_dma_buf_pool;
957 struct dma_pool *lpfc_mbuf_pool;
958 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
959 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
960 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
961 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
962 struct dma_pool *txrdy_payload_pool;
dea3101e 963 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
964
965 mempool_t *mbox_mem_pool;
966 mempool_t *nlp_mem_pool;
19ca7609 967 mempool_t *rrq_pool;
cff261f6 968 mempool_t *active_rrq_pool;
f888ba3c
JSEC		 969
970 struct fc_host_statistics link_stats;
db2378e0 971 enum intr_type_t intr_type;
5b75da2f
JS		 972 uint32_t intr_mode;
973#define LPFC_INTR_ERROR 0xFFFFFFFF
2e0fef85 974 struct list_head port_list;
549e55cd
JS		 975 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
976 uint16_t max_vpi; /* Maximum virtual nports */
09372820 977#define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
da0436e9
JS		 978 uint16_t max_vports; /*
979 * For IOV HBAs max_vpi can change
980 * after a reset. max_vports is max
981 * number of vports present. This can
982 * be greater than max_vpi.
983 */
984 uint16_t vpi_base;
985 uint16_t vfi_base;
549e55cd 986 unsigned long *vpi_bmask; /* vpi allocation table */
6d368e53
JS		 987 uint16_t *vpi_ids;
988 uint16_t vpi_count;
989 struct list_head lpfc_vpi_blk_list;
92d7f7b0
JS		 990
991 /* Data structure used by fabric iocb scheduler */
992 struct list_head fabric_iocb_list;
993 atomic_t fabric_iocb_count;
994 struct timer_list fabric_block_timer;
995 unsigned long bit_flags;
996#define FABRIC_COMANDS_BLOCKED 0
997 atomic_t num_rsrc_err;
998 atomic_t num_cmd_success;
999 unsigned long last_rsrc_error_time;
1000 unsigned long last_ramp_down_time;
923e4b6a 1001#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
858c9f6c
JS		 1002 struct dentry *hba_debugfs_root;
1003 atomic_t debugfs_vport_count;
78b2d852 1004 struct dentry *debug_hbqinfo;
c95d6c6c
JS		 1005 struct dentry *debug_dumpHostSlim;
1006 struct dentry *debug_dumpHBASlim;
f9bb2da1
JS		 1007 struct dentry *debug_dumpData; /* BlockGuard BPL */
1008 struct dentry *debug_dumpDif; /* BlockGuard BPL */
1009 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
4ac9b226
JS		 1010 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
1011 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
f9bb2da1
JS		 1012 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
1013 struct dentry *debug_writeApp; /* inject write app_tag errors */
1014 struct dentry *debug_writeRef; /* inject write ref_tag errors */
acd6859b 1015 struct dentry *debug_readGuard; /* inject read guard_tag errors */
f9bb2da1
JS		 1016 struct dentry *debug_readApp; /* inject read app_tag errors */
1017 struct dentry *debug_readRef; /* inject read ref_tag errors */
1018
bd2cdd5e
JS		 1019 struct dentry *debug_nvmeio_trc;
1020 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1021 atomic_t nvmeio_trc_cnt;
1022 uint32_t nvmeio_trc_size;
1023 uint32_t nvmeio_trc_output_idx;
1024
f9bb2da1
JS		 1025 /* T10 DIF error injection */
1026 uint32_t lpfc_injerr_wgrd_cnt;
1027 uint32_t lpfc_injerr_wapp_cnt;
1028 uint32_t lpfc_injerr_wref_cnt;
acd6859b 1029 uint32_t lpfc_injerr_rgrd_cnt;
f9bb2da1
JS		 1030 uint32_t lpfc_injerr_rapp_cnt;
1031 uint32_t lpfc_injerr_rref_cnt;
4ac9b226
JS		 1032 uint32_t lpfc_injerr_nportid;
1033 struct lpfc_name lpfc_injerr_wwpn;
f9bb2da1 1034 sector_t lpfc_injerr_lba;
acd6859b 1035#define LPFC_INJERR_LBA_OFF (sector_t)(-1)
f9bb2da1 1036
a58cbd52
JS		 1037 struct dentry *debug_slow_ring_trc;
1038 struct lpfc_debugfs_trc *slow_ring_trc;
1039 atomic_t slow_ring_trc_cnt;
2a622bfb
JS		 1040 /* iDiag debugfs sub-directory */
1041 struct dentry *idiag_root;
1042 struct dentry *idiag_pci_cfg;
b76f2dc9 1043 struct dentry *idiag_bar_acc;
2a622bfb 1044 struct dentry *idiag_que_info;
86a80846
JS		 1045 struct dentry *idiag_que_acc;
1046 struct dentry *idiag_drb_acc;
b76f2dc9
JS		 1047 struct dentry *idiag_ctl_acc;
1048 struct dentry *idiag_mbx_acc;
1049 struct dentry *idiag_ext_acc;
07bcd98e 1050 uint8_t lpfc_idiag_last_eq;
858c9f6c 1051#endif
bd2cdd5e 1052 uint16_t nvmeio_trc_on;
858c9f6c 1053
0ff10d46
JS		 1054 /* Used for deferred freeing of ELS data buffers */
1055 struct list_head elsbuf;
1056 int elsbuf_cnt;
1057 int elsbuf_prev_cnt;
1058
57127f15 1059 uint8_t temp_sensor_support;
858c9f6c 1060 /* Fields used for heart beat. */
0cf07f84 1061 unsigned long last_eqdelay_time;
858c9f6c 1062 unsigned long last_completion_time;
bc73905a 1063 unsigned long skipped_hb;
858c9f6c
JS		 1064 struct timer_list hb_tmofunc;
1065 uint8_t hb_outstanding;
19ca7609 1066 struct timer_list rrq_tmr;
84774a4d 1067 enum hba_temp_state over_temp_state;
e47c9093
JS		 1068 /* ndlp reference management */
1069 spinlock_t ndlp_lock;
76bb24ef
JS		 1070 /*
1071 * Following bit will be set for all buffer tags which are not
1072 * associated with any HBQ.
1073 */
1074#define QUE_BUFTAG_BIT (1<<31)
1075 uint32_t buffer_tag_count;
84774a4d
JS		 1076 int wait_4_mlo_maint_flg;
1077 wait_queue_head_t wait_4_mlo_m_q;
ea2151b4
JS		 1078 /* data structure used for latency data collection */
1079#define LPFC_NO_BUCKET 0
1080#define LPFC_LINEAR_BUCKET 1
1081#define LPFC_POWER2_BUCKET 2
1082 uint8_t bucket_type;
1083 uint32_t bucket_base;
1084 uint32_t bucket_step;
1085
1086/* Maximum number of events that can be outstanding at any time*/
1087#define LPFC_MAX_EVT_COUNT 512
1088 atomic_t fast_event_count;
32b9793f
JS		 1089 uint32_t fcoe_eventtag;
1090 uint32_t fcoe_eventtag_at_fcf_scan;
80c17849
JS		 1091 uint32_t fcoe_cvl_eventtag;
1092 uint32_t fcoe_cvl_eventtag_attn;
da0436e9
JS		 1093 struct lpfc_fcf fcf;
1094 uint8_t fc_map[3];
1095 uint8_t valid_vlan;
1096 uint16_t vlan_id;
1097 struct list_head fcf_conn_rec_list;
f1c3b0fc 1098
4fede78f 1099 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
f1c3b0fc 1100 struct list_head ct_ev_waiters;
6dd9e31c 1101 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
f1c3b0fc 1102 uint32_t ctx_idx;
e2aed29f
JS		 1103
1104 uint8_t menlo_flag; /* menlo generic flags */
1105#define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
2a9bf3d0
JS		 1106 uint32_t iocb_cnt;
1107 uint32_t iocb_max;
d7c47992 1108 atomic_t sdev_cnt;
bc73905a
JS		 1109 uint8_t fips_spec_rev;
1110 uint8_t fips_level;
1ba981fd
JS		 1111 spinlock_t devicelock; /* lock for luns list */
1112 mempool_t *device_data_mem_pool;
1113 struct list_head luns;
310429ef
JS		 1114#define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080
1115#define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040
1116#define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020
1117#define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010
1118#define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008
1119#define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004
1120#define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002
1121#define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001
1122#define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000
1123#define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000
1124 uint16_t sfp_alarm;
1125 uint16_t sfp_warning;
bd2cdd5e
JS		 1126
1127#ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1128#define LPFC_CHECK_CPU_CNT 32
1129 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT];
1130 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT];
1131 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT];
1132 uint32_t cpucheck_ccmpl_io[LPFC_CHECK_CPU_CNT];
1133 uint16_t cpucheck_on;
1134#define LPFC_CHECK_OFF 0
1135#define LPFC_CHECK_NVME_IO 1
f358dd0c
JS		 1136#define LPFC_CHECK_NVMET_RCV 2
1137#define LPFC_CHECK_NVMET_IO 4
bd2cdd5e
JS		 1138 uint16_t ktime_on;
1139 uint64_t ktime_data_samples;
1140 uint64_t ktime_status_samples;
1141 uint64_t ktime_last_cmd;
1142 uint64_t ktime_seg1_total;
1143 uint64_t ktime_seg1_min;
1144 uint64_t ktime_seg1_max;
1145 uint64_t ktime_seg2_total;
1146 uint64_t ktime_seg2_min;
1147 uint64_t ktime_seg2_max;
1148 uint64_t ktime_seg3_total;
1149 uint64_t ktime_seg3_min;
1150 uint64_t ktime_seg3_max;
1151 uint64_t ktime_seg4_total;
1152 uint64_t ktime_seg4_min;
1153 uint64_t ktime_seg4_max;
1154 uint64_t ktime_seg5_total;
1155 uint64_t ktime_seg5_min;
1156 uint64_t ktime_seg5_max;
1157 uint64_t ktime_seg6_total;
1158 uint64_t ktime_seg6_min;
1159 uint64_t ktime_seg6_max;
1160 uint64_t ktime_seg7_total;
1161 uint64_t ktime_seg7_min;
1162 uint64_t ktime_seg7_max;
1163 uint64_t ktime_seg8_total;
1164 uint64_t ktime_seg8_min;
1165 uint64_t ktime_seg8_max;
1166 uint64_t ktime_seg9_total;
1167 uint64_t ktime_seg9_min;
1168 uint64_t ktime_seg9_max;
1169 uint64_t ktime_seg10_total;
1170 uint64_t ktime_seg10_min;
1171 uint64_t ktime_seg10_max;
1172#endif
dea3101e 1173};
1174
2e0fef85
JS		 1175static inline struct Scsi_Host *
1176lpfc_shost_from_vport(struct lpfc_vport *vport)
1177{
1178 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1179}
1180
5b8bd0c9 1181static inline void
2e0fef85
JS		 1182lpfc_set_loopback_flag(struct lpfc_hba *phba)
1183{
5b8bd0c9 1184 if (phba->cfg_topology == FLAGS_LOCAL_LB)
2e0fef85 1185 phba->link_flag |= LS_LOOPBACK_MODE;
5b8bd0c9 1186 else
2e0fef85
JS		 1187 phba->link_flag &= ~LS_LOOPBACK_MODE;
1188}
1189
1190static inline int
1191lpfc_is_link_up(struct lpfc_hba *phba)
1192{
1193 return phba->link_state == LPFC_LINK_UP ||
92d7f7b0
JS		 1194 phba->link_state == LPFC_CLEAR_LA ||
1195 phba->link_state == LPFC_HBA_READY;
5b8bd0c9 1196}
dea3101e 1197
5e9d9b82
JS		 1198static inline void
1199lpfc_worker_wake_up(struct lpfc_hba *phba)
1200{
1201 /* Set the lpfc data pending flag */
1202 set_bit(LPFC_DATA_READY, &phba->data_flags);
1203
1204 /* Wake up worker thread */
1205 wake_up(&phba->work_waitq);
1206 return;
1207}
1208
9940b97b
JS		 1209static inline int
1210lpfc_readl(void __iomem *addr, uint32_t *data)
1211{
1212 uint32_t temp;
1213 temp = readl(addr);
1214 if (temp == 0xffffffff)
1215 return -EIO;
1216 *data = temp;
1217 return 0;
1218}
1219
1220static inline int
9399627f
JS		 1221lpfc_sli_read_hs(struct lpfc_hba *phba)
1222{
1223 /*
1224 * There was a link/board error. Read the status register to retrieve
1225 * the error event and process it.
1226 */
1227 phba->sli.slistat.err_attn_event++;
1228
9940b97b
JS		 1229 /* Save status info and check for unplug error */
1230 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1231 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1232 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1233 return -EIO;
1234 }
9399627f
JS		 1235
1236 /* Clear chip Host Attention error bit */
1237 writel(HA_ERATT, phba->HAregaddr);
1238 readl(phba->HAregaddr); /* flush */
1239 phba->pport->stopped = 1;
1240
9940b97b 1241 return 0;
9399627f 1242}
895427bd
JS		 1243
1244static inline struct lpfc_sli_ring *
1245lpfc_phba_elsring(struct lpfc_hba *phba)
1246{
0c9c6a75
JS		 1247 if (phba->sli_rev == LPFC_SLI_REV4) {
1248 if (phba->sli4_hba.els_wq)
1249 return phba->sli4_hba.els_wq->pring;
1250 else
1251 return NULL;
1252 }
895427bd
JS		 1253 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1254}
Linux 6.x block layer and io_uring tree(s)