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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
67846b30 | 51 | #include <linux/jiffies.h> |
378f058c | 52 | #include <linux/scatterlist.h> |
1da177e4 | 53 | #include <scsi/scsi.h> |
1da177e4 | 54 | #include "scsi_priv.h" |
193515d5 | 55 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
56 | #include <scsi/scsi_host.h> |
57 | #include <linux/libata.h> | |
58 | #include <asm/io.h> | |
59 | #include <asm/semaphore.h> | |
60 | #include <asm/byteorder.h> | |
61 | ||
62 | #include "libata.h" | |
63 | ||
64 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
65 | unsigned long tmout_pat, | |
66 | unsigned long tmout); | |
59a10b17 | 67 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev); |
8bf62ece | 68 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev); |
1da177e4 LT |
69 | static void ata_set_mode(struct ata_port *ap); |
70 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | |
057ace5e | 71 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift); |
1da177e4 | 72 | static int fgb(u32 bitmap); |
057ace5e | 73 | static int ata_choose_xfer_mode(const struct ata_port *ap, |
1da177e4 LT |
74 | u8 *xfer_mode_out, |
75 | unsigned int *xfer_shift_out); | |
1da177e4 | 76 | static void __ata_qc_complete(struct ata_queued_cmd *qc); |
e33b9dfa | 77 | static void ata_pio_error(struct ata_port *ap); |
1da177e4 LT |
78 | |
79 | static unsigned int ata_unique_id = 1; | |
80 | static struct workqueue_struct *ata_wq; | |
81 | ||
1623c81e JG |
82 | int atapi_enabled = 0; |
83 | module_param(atapi_enabled, int, 0444); | |
84 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
85 | ||
1da177e4 LT |
86 | MODULE_AUTHOR("Jeff Garzik"); |
87 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
88 | MODULE_LICENSE("GPL"); | |
89 | MODULE_VERSION(DRV_VERSION); | |
90 | ||
91 | /** | |
6f0ef4fa | 92 | * ata_tf_load_pio - send taskfile registers to host controller |
1da177e4 LT |
93 | * @ap: Port to which output is sent |
94 | * @tf: ATA taskfile register set | |
95 | * | |
96 | * Outputs ATA taskfile to standard ATA host controller. | |
97 | * | |
98 | * LOCKING: | |
99 | * Inherited from caller. | |
100 | */ | |
101 | ||
057ace5e | 102 | static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
103 | { |
104 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
105 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
106 | ||
107 | if (tf->ctl != ap->last_ctl) { | |
108 | outb(tf->ctl, ioaddr->ctl_addr); | |
109 | ap->last_ctl = tf->ctl; | |
110 | ata_wait_idle(ap); | |
111 | } | |
112 | ||
113 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
114 | outb(tf->hob_feature, ioaddr->feature_addr); | |
115 | outb(tf->hob_nsect, ioaddr->nsect_addr); | |
116 | outb(tf->hob_lbal, ioaddr->lbal_addr); | |
117 | outb(tf->hob_lbam, ioaddr->lbam_addr); | |
118 | outb(tf->hob_lbah, ioaddr->lbah_addr); | |
119 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
120 | tf->hob_feature, | |
121 | tf->hob_nsect, | |
122 | tf->hob_lbal, | |
123 | tf->hob_lbam, | |
124 | tf->hob_lbah); | |
125 | } | |
126 | ||
127 | if (is_addr) { | |
128 | outb(tf->feature, ioaddr->feature_addr); | |
129 | outb(tf->nsect, ioaddr->nsect_addr); | |
130 | outb(tf->lbal, ioaddr->lbal_addr); | |
131 | outb(tf->lbam, ioaddr->lbam_addr); | |
132 | outb(tf->lbah, ioaddr->lbah_addr); | |
133 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
134 | tf->feature, | |
135 | tf->nsect, | |
136 | tf->lbal, | |
137 | tf->lbam, | |
138 | tf->lbah); | |
139 | } | |
140 | ||
141 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
142 | outb(tf->device, ioaddr->device_addr); | |
143 | VPRINTK("device 0x%X\n", tf->device); | |
144 | } | |
145 | ||
146 | ata_wait_idle(ap); | |
147 | } | |
148 | ||
149 | /** | |
150 | * ata_tf_load_mmio - send taskfile registers to host controller | |
151 | * @ap: Port to which output is sent | |
152 | * @tf: ATA taskfile register set | |
153 | * | |
154 | * Outputs ATA taskfile to standard ATA host controller using MMIO. | |
155 | * | |
156 | * LOCKING: | |
157 | * Inherited from caller. | |
158 | */ | |
159 | ||
057ace5e | 160 | static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
161 | { |
162 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
163 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
164 | ||
165 | if (tf->ctl != ap->last_ctl) { | |
166 | writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
167 | ap->last_ctl = tf->ctl; | |
168 | ata_wait_idle(ap); | |
169 | } | |
170 | ||
171 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
172 | writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr); | |
173 | writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr); | |
174 | writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr); | |
175 | writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr); | |
176 | writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr); | |
177 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
178 | tf->hob_feature, | |
179 | tf->hob_nsect, | |
180 | tf->hob_lbal, | |
181 | tf->hob_lbam, | |
182 | tf->hob_lbah); | |
183 | } | |
184 | ||
185 | if (is_addr) { | |
186 | writeb(tf->feature, (void __iomem *) ioaddr->feature_addr); | |
187 | writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr); | |
188 | writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr); | |
189 | writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr); | |
190 | writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr); | |
191 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
192 | tf->feature, | |
193 | tf->nsect, | |
194 | tf->lbal, | |
195 | tf->lbam, | |
196 | tf->lbah); | |
197 | } | |
198 | ||
199 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
200 | writeb(tf->device, (void __iomem *) ioaddr->device_addr); | |
201 | VPRINTK("device 0x%X\n", tf->device); | |
202 | } | |
203 | ||
204 | ata_wait_idle(ap); | |
205 | } | |
206 | ||
0baab86b EF |
207 | |
208 | /** | |
209 | * ata_tf_load - send taskfile registers to host controller | |
210 | * @ap: Port to which output is sent | |
211 | * @tf: ATA taskfile register set | |
212 | * | |
213 | * Outputs ATA taskfile to standard ATA host controller using MMIO | |
214 | * or PIO as indicated by the ATA_FLAG_MMIO flag. | |
215 | * Writes the control, feature, nsect, lbal, lbam, and lbah registers. | |
216 | * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect, | |
217 | * hob_lbal, hob_lbam, and hob_lbah. | |
218 | * | |
219 | * This function waits for idle (!BUSY and !DRQ) after writing | |
220 | * registers. If the control register has a new value, this | |
221 | * function also waits for idle after writing control and before | |
222 | * writing the remaining registers. | |
223 | * | |
224 | * May be used as the tf_load() entry in ata_port_operations. | |
225 | * | |
226 | * LOCKING: | |
227 | * Inherited from caller. | |
228 | */ | |
057ace5e | 229 | void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
230 | { |
231 | if (ap->flags & ATA_FLAG_MMIO) | |
232 | ata_tf_load_mmio(ap, tf); | |
233 | else | |
234 | ata_tf_load_pio(ap, tf); | |
235 | } | |
236 | ||
237 | /** | |
0baab86b | 238 | * ata_exec_command_pio - issue ATA command to host controller |
1da177e4 LT |
239 | * @ap: port to which command is being issued |
240 | * @tf: ATA taskfile register set | |
241 | * | |
0baab86b | 242 | * Issues PIO write to ATA command register, with proper |
1da177e4 LT |
243 | * synchronization with interrupt handler / other threads. |
244 | * | |
245 | * LOCKING: | |
246 | * spin_lock_irqsave(host_set lock) | |
247 | */ | |
248 | ||
057ace5e | 249 | static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
250 | { |
251 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
252 | ||
253 | outb(tf->command, ap->ioaddr.command_addr); | |
254 | ata_pause(ap); | |
255 | } | |
256 | ||
257 | ||
258 | /** | |
259 | * ata_exec_command_mmio - issue ATA command to host controller | |
260 | * @ap: port to which command is being issued | |
261 | * @tf: ATA taskfile register set | |
262 | * | |
263 | * Issues MMIO write to ATA command register, with proper | |
264 | * synchronization with interrupt handler / other threads. | |
265 | * | |
266 | * LOCKING: | |
267 | * spin_lock_irqsave(host_set lock) | |
268 | */ | |
269 | ||
057ace5e | 270 | static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
271 | { |
272 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
273 | ||
274 | writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr); | |
275 | ata_pause(ap); | |
276 | } | |
277 | ||
0baab86b EF |
278 | |
279 | /** | |
280 | * ata_exec_command - issue ATA command to host controller | |
281 | * @ap: port to which command is being issued | |
282 | * @tf: ATA taskfile register set | |
283 | * | |
284 | * Issues PIO/MMIO write to ATA command register, with proper | |
285 | * synchronization with interrupt handler / other threads. | |
286 | * | |
287 | * LOCKING: | |
288 | * spin_lock_irqsave(host_set lock) | |
289 | */ | |
057ace5e | 290 | void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
291 | { |
292 | if (ap->flags & ATA_FLAG_MMIO) | |
293 | ata_exec_command_mmio(ap, tf); | |
294 | else | |
295 | ata_exec_command_pio(ap, tf); | |
296 | } | |
297 | ||
1da177e4 LT |
298 | /** |
299 | * ata_tf_to_host - issue ATA taskfile to host controller | |
300 | * @ap: port to which command is being issued | |
301 | * @tf: ATA taskfile register set | |
302 | * | |
303 | * Issues ATA taskfile register set to ATA host controller, | |
304 | * with proper synchronization with interrupt handler and | |
305 | * other threads. | |
306 | * | |
307 | * LOCKING: | |
1da177e4 LT |
308 | * spin_lock_irqsave(host_set lock) |
309 | */ | |
310 | ||
e5338254 JG |
311 | static inline void ata_tf_to_host(struct ata_port *ap, |
312 | const struct ata_taskfile *tf) | |
1da177e4 LT |
313 | { |
314 | ap->ops->tf_load(ap, tf); | |
315 | ap->ops->exec_command(ap, tf); | |
316 | } | |
317 | ||
318 | /** | |
0baab86b | 319 | * ata_tf_read_pio - input device's ATA taskfile shadow registers |
1da177e4 LT |
320 | * @ap: Port from which input is read |
321 | * @tf: ATA taskfile register set for storing input | |
322 | * | |
323 | * Reads ATA taskfile registers for currently-selected device | |
324 | * into @tf. | |
325 | * | |
326 | * LOCKING: | |
327 | * Inherited from caller. | |
328 | */ | |
329 | ||
330 | static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
331 | { | |
332 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
333 | ||
ac19bff2 | 334 | tf->command = ata_check_status(ap); |
0169e284 | 335 | tf->feature = inb(ioaddr->error_addr); |
1da177e4 LT |
336 | tf->nsect = inb(ioaddr->nsect_addr); |
337 | tf->lbal = inb(ioaddr->lbal_addr); | |
338 | tf->lbam = inb(ioaddr->lbam_addr); | |
339 | tf->lbah = inb(ioaddr->lbah_addr); | |
340 | tf->device = inb(ioaddr->device_addr); | |
341 | ||
342 | if (tf->flags & ATA_TFLAG_LBA48) { | |
343 | outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); | |
344 | tf->hob_feature = inb(ioaddr->error_addr); | |
345 | tf->hob_nsect = inb(ioaddr->nsect_addr); | |
346 | tf->hob_lbal = inb(ioaddr->lbal_addr); | |
347 | tf->hob_lbam = inb(ioaddr->lbam_addr); | |
348 | tf->hob_lbah = inb(ioaddr->lbah_addr); | |
349 | } | |
350 | } | |
351 | ||
352 | /** | |
353 | * ata_tf_read_mmio - input device's ATA taskfile shadow registers | |
354 | * @ap: Port from which input is read | |
355 | * @tf: ATA taskfile register set for storing input | |
356 | * | |
357 | * Reads ATA taskfile registers for currently-selected device | |
358 | * into @tf via MMIO. | |
359 | * | |
360 | * LOCKING: | |
361 | * Inherited from caller. | |
362 | */ | |
363 | ||
364 | static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
365 | { | |
366 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
367 | ||
ac19bff2 | 368 | tf->command = ata_check_status(ap); |
0169e284 | 369 | tf->feature = readb((void __iomem *)ioaddr->error_addr); |
1da177e4 LT |
370 | tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); |
371 | tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
372 | tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
373 | tf->lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
374 | tf->device = readb((void __iomem *)ioaddr->device_addr); | |
375 | ||
376 | if (tf->flags & ATA_TFLAG_LBA48) { | |
377 | writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr); | |
378 | tf->hob_feature = readb((void __iomem *)ioaddr->error_addr); | |
379 | tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
380 | tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
381 | tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
382 | tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
383 | } | |
384 | } | |
385 | ||
0baab86b EF |
386 | |
387 | /** | |
388 | * ata_tf_read - input device's ATA taskfile shadow registers | |
389 | * @ap: Port from which input is read | |
390 | * @tf: ATA taskfile register set for storing input | |
391 | * | |
392 | * Reads ATA taskfile registers for currently-selected device | |
393 | * into @tf. | |
394 | * | |
395 | * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48 | |
396 | * is set, also reads the hob registers. | |
397 | * | |
398 | * May be used as the tf_read() entry in ata_port_operations. | |
399 | * | |
400 | * LOCKING: | |
401 | * Inherited from caller. | |
402 | */ | |
1da177e4 LT |
403 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
404 | { | |
405 | if (ap->flags & ATA_FLAG_MMIO) | |
406 | ata_tf_read_mmio(ap, tf); | |
407 | else | |
408 | ata_tf_read_pio(ap, tf); | |
409 | } | |
410 | ||
411 | /** | |
412 | * ata_check_status_pio - Read device status reg & clear interrupt | |
413 | * @ap: port where the device is | |
414 | * | |
415 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 416 | * and return its value. This also clears pending interrupts |
1da177e4 LT |
417 | * from this device |
418 | * | |
419 | * LOCKING: | |
420 | * Inherited from caller. | |
421 | */ | |
422 | static u8 ata_check_status_pio(struct ata_port *ap) | |
423 | { | |
424 | return inb(ap->ioaddr.status_addr); | |
425 | } | |
426 | ||
427 | /** | |
428 | * ata_check_status_mmio - Read device status reg & clear interrupt | |
429 | * @ap: port where the device is | |
430 | * | |
431 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 432 | * via MMIO and return its value. This also clears pending interrupts |
1da177e4 LT |
433 | * from this device |
434 | * | |
435 | * LOCKING: | |
436 | * Inherited from caller. | |
437 | */ | |
438 | static u8 ata_check_status_mmio(struct ata_port *ap) | |
439 | { | |
440 | return readb((void __iomem *) ap->ioaddr.status_addr); | |
441 | } | |
442 | ||
0baab86b EF |
443 | |
444 | /** | |
445 | * ata_check_status - Read device status reg & clear interrupt | |
446 | * @ap: port where the device is | |
447 | * | |
448 | * Reads ATA taskfile status register for currently-selected device | |
449 | * and return its value. This also clears pending interrupts | |
450 | * from this device | |
451 | * | |
452 | * May be used as the check_status() entry in ata_port_operations. | |
453 | * | |
454 | * LOCKING: | |
455 | * Inherited from caller. | |
456 | */ | |
1da177e4 LT |
457 | u8 ata_check_status(struct ata_port *ap) |
458 | { | |
459 | if (ap->flags & ATA_FLAG_MMIO) | |
460 | return ata_check_status_mmio(ap); | |
461 | return ata_check_status_pio(ap); | |
462 | } | |
463 | ||
0baab86b EF |
464 | |
465 | /** | |
466 | * ata_altstatus - Read device alternate status reg | |
467 | * @ap: port where the device is | |
468 | * | |
469 | * Reads ATA taskfile alternate status register for | |
470 | * currently-selected device and return its value. | |
471 | * | |
472 | * Note: may NOT be used as the check_altstatus() entry in | |
473 | * ata_port_operations. | |
474 | * | |
475 | * LOCKING: | |
476 | * Inherited from caller. | |
477 | */ | |
1da177e4 LT |
478 | u8 ata_altstatus(struct ata_port *ap) |
479 | { | |
480 | if (ap->ops->check_altstatus) | |
481 | return ap->ops->check_altstatus(ap); | |
482 | ||
483 | if (ap->flags & ATA_FLAG_MMIO) | |
484 | return readb((void __iomem *)ap->ioaddr.altstatus_addr); | |
485 | return inb(ap->ioaddr.altstatus_addr); | |
486 | } | |
487 | ||
0baab86b | 488 | |
1da177e4 LT |
489 | /** |
490 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
491 | * @tf: Taskfile to convert | |
492 | * @fis: Buffer into which data will output | |
493 | * @pmp: Port multiplier port | |
494 | * | |
495 | * Converts a standard ATA taskfile to a Serial ATA | |
496 | * FIS structure (Register - Host to Device). | |
497 | * | |
498 | * LOCKING: | |
499 | * Inherited from caller. | |
500 | */ | |
501 | ||
057ace5e | 502 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
503 | { |
504 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
505 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
506 | bit 7 indicates Command FIS */ | |
507 | fis[2] = tf->command; | |
508 | fis[3] = tf->feature; | |
509 | ||
510 | fis[4] = tf->lbal; | |
511 | fis[5] = tf->lbam; | |
512 | fis[6] = tf->lbah; | |
513 | fis[7] = tf->device; | |
514 | ||
515 | fis[8] = tf->hob_lbal; | |
516 | fis[9] = tf->hob_lbam; | |
517 | fis[10] = tf->hob_lbah; | |
518 | fis[11] = tf->hob_feature; | |
519 | ||
520 | fis[12] = tf->nsect; | |
521 | fis[13] = tf->hob_nsect; | |
522 | fis[14] = 0; | |
523 | fis[15] = tf->ctl; | |
524 | ||
525 | fis[16] = 0; | |
526 | fis[17] = 0; | |
527 | fis[18] = 0; | |
528 | fis[19] = 0; | |
529 | } | |
530 | ||
531 | /** | |
532 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
533 | * @fis: Buffer from which data will be input | |
534 | * @tf: Taskfile to output | |
535 | * | |
536 | * Converts a standard ATA taskfile to a Serial ATA | |
537 | * FIS structure (Register - Host to Device). | |
538 | * | |
539 | * LOCKING: | |
540 | * Inherited from caller. | |
541 | */ | |
542 | ||
057ace5e | 543 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
544 | { |
545 | tf->command = fis[2]; /* status */ | |
546 | tf->feature = fis[3]; /* error */ | |
547 | ||
548 | tf->lbal = fis[4]; | |
549 | tf->lbam = fis[5]; | |
550 | tf->lbah = fis[6]; | |
551 | tf->device = fis[7]; | |
552 | ||
553 | tf->hob_lbal = fis[8]; | |
554 | tf->hob_lbam = fis[9]; | |
555 | tf->hob_lbah = fis[10]; | |
556 | ||
557 | tf->nsect = fis[12]; | |
558 | tf->hob_nsect = fis[13]; | |
559 | } | |
560 | ||
8cbd6df1 AL |
561 | static const u8 ata_rw_cmds[] = { |
562 | /* pio multi */ | |
563 | ATA_CMD_READ_MULTI, | |
564 | ATA_CMD_WRITE_MULTI, | |
565 | ATA_CMD_READ_MULTI_EXT, | |
566 | ATA_CMD_WRITE_MULTI_EXT, | |
567 | /* pio */ | |
568 | ATA_CMD_PIO_READ, | |
569 | ATA_CMD_PIO_WRITE, | |
570 | ATA_CMD_PIO_READ_EXT, | |
571 | ATA_CMD_PIO_WRITE_EXT, | |
572 | /* dma */ | |
573 | ATA_CMD_READ, | |
574 | ATA_CMD_WRITE, | |
575 | ATA_CMD_READ_EXT, | |
576 | ATA_CMD_WRITE_EXT | |
577 | }; | |
1da177e4 LT |
578 | |
579 | /** | |
8cbd6df1 AL |
580 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
581 | * @qc: command to examine and configure | |
1da177e4 | 582 | * |
8cbd6df1 AL |
583 | * Examine the device configuration and tf->flags to calculate |
584 | * the proper read/write commands and protocol to use. | |
1da177e4 LT |
585 | * |
586 | * LOCKING: | |
587 | * caller. | |
588 | */ | |
8cbd6df1 | 589 | void ata_rwcmd_protocol(struct ata_queued_cmd *qc) |
1da177e4 | 590 | { |
8cbd6df1 AL |
591 | struct ata_taskfile *tf = &qc->tf; |
592 | struct ata_device *dev = qc->dev; | |
1da177e4 | 593 | |
8cbd6df1 AL |
594 | int index, lba48, write; |
595 | ||
596 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; | |
597 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 598 | |
8cbd6df1 AL |
599 | if (dev->flags & ATA_DFLAG_PIO) { |
600 | tf->protocol = ATA_PROT_PIO; | |
601 | index = dev->multi_count ? 0 : 4; | |
602 | } else { | |
603 | tf->protocol = ATA_PROT_DMA; | |
604 | index = 8; | |
605 | } | |
1da177e4 | 606 | |
8cbd6df1 | 607 | tf->command = ata_rw_cmds[index + lba48 + write]; |
1da177e4 LT |
608 | } |
609 | ||
610 | static const char * xfer_mode_str[] = { | |
611 | "UDMA/16", | |
612 | "UDMA/25", | |
613 | "UDMA/33", | |
614 | "UDMA/44", | |
615 | "UDMA/66", | |
616 | "UDMA/100", | |
617 | "UDMA/133", | |
618 | "UDMA7", | |
619 | "MWDMA0", | |
620 | "MWDMA1", | |
621 | "MWDMA2", | |
622 | "PIO0", | |
623 | "PIO1", | |
624 | "PIO2", | |
625 | "PIO3", | |
626 | "PIO4", | |
627 | }; | |
628 | ||
629 | /** | |
630 | * ata_udma_string - convert UDMA bit offset to string | |
631 | * @mask: mask of bits supported; only highest bit counts. | |
632 | * | |
633 | * Determine string which represents the highest speed | |
634 | * (highest bit in @udma_mask). | |
635 | * | |
636 | * LOCKING: | |
637 | * None. | |
638 | * | |
639 | * RETURNS: | |
640 | * Constant C string representing highest speed listed in | |
641 | * @udma_mask, or the constant C string "<n/a>". | |
642 | */ | |
643 | ||
644 | static const char *ata_mode_string(unsigned int mask) | |
645 | { | |
646 | int i; | |
647 | ||
648 | for (i = 7; i >= 0; i--) | |
649 | if (mask & (1 << i)) | |
650 | goto out; | |
651 | for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--) | |
652 | if (mask & (1 << i)) | |
653 | goto out; | |
654 | for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--) | |
655 | if (mask & (1 << i)) | |
656 | goto out; | |
657 | ||
658 | return "<n/a>"; | |
659 | ||
660 | out: | |
661 | return xfer_mode_str[i]; | |
662 | } | |
663 | ||
664 | /** | |
665 | * ata_pio_devchk - PATA device presence detection | |
666 | * @ap: ATA channel to examine | |
667 | * @device: Device to examine (starting at zero) | |
668 | * | |
669 | * This technique was originally described in | |
670 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
671 | * later found its way into the ATA/ATAPI spec. | |
672 | * | |
673 | * Write a pattern to the ATA shadow registers, | |
674 | * and if a device is present, it will respond by | |
675 | * correctly storing and echoing back the | |
676 | * ATA shadow register contents. | |
677 | * | |
678 | * LOCKING: | |
679 | * caller. | |
680 | */ | |
681 | ||
682 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
683 | unsigned int device) | |
684 | { | |
685 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
686 | u8 nsect, lbal; | |
687 | ||
688 | ap->ops->dev_select(ap, device); | |
689 | ||
690 | outb(0x55, ioaddr->nsect_addr); | |
691 | outb(0xaa, ioaddr->lbal_addr); | |
692 | ||
693 | outb(0xaa, ioaddr->nsect_addr); | |
694 | outb(0x55, ioaddr->lbal_addr); | |
695 | ||
696 | outb(0x55, ioaddr->nsect_addr); | |
697 | outb(0xaa, ioaddr->lbal_addr); | |
698 | ||
699 | nsect = inb(ioaddr->nsect_addr); | |
700 | lbal = inb(ioaddr->lbal_addr); | |
701 | ||
702 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
703 | return 1; /* we found a device */ | |
704 | ||
705 | return 0; /* nothing found */ | |
706 | } | |
707 | ||
708 | /** | |
709 | * ata_mmio_devchk - PATA device presence detection | |
710 | * @ap: ATA channel to examine | |
711 | * @device: Device to examine (starting at zero) | |
712 | * | |
713 | * This technique was originally described in | |
714 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
715 | * later found its way into the ATA/ATAPI spec. | |
716 | * | |
717 | * Write a pattern to the ATA shadow registers, | |
718 | * and if a device is present, it will respond by | |
719 | * correctly storing and echoing back the | |
720 | * ATA shadow register contents. | |
721 | * | |
722 | * LOCKING: | |
723 | * caller. | |
724 | */ | |
725 | ||
726 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
727 | unsigned int device) | |
728 | { | |
729 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
730 | u8 nsect, lbal; | |
731 | ||
732 | ap->ops->dev_select(ap, device); | |
733 | ||
734 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
735 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
736 | ||
737 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
738 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
739 | ||
740 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
741 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
742 | ||
743 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
744 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
745 | ||
746 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
747 | return 1; /* we found a device */ | |
748 | ||
749 | return 0; /* nothing found */ | |
750 | } | |
751 | ||
752 | /** | |
753 | * ata_devchk - PATA device presence detection | |
754 | * @ap: ATA channel to examine | |
755 | * @device: Device to examine (starting at zero) | |
756 | * | |
757 | * Dispatch ATA device presence detection, depending | |
758 | * on whether we are using PIO or MMIO to talk to the | |
759 | * ATA shadow registers. | |
760 | * | |
761 | * LOCKING: | |
762 | * caller. | |
763 | */ | |
764 | ||
765 | static unsigned int ata_devchk(struct ata_port *ap, | |
766 | unsigned int device) | |
767 | { | |
768 | if (ap->flags & ATA_FLAG_MMIO) | |
769 | return ata_mmio_devchk(ap, device); | |
770 | return ata_pio_devchk(ap, device); | |
771 | } | |
772 | ||
773 | /** | |
774 | * ata_dev_classify - determine device type based on ATA-spec signature | |
775 | * @tf: ATA taskfile register set for device to be identified | |
776 | * | |
777 | * Determine from taskfile register contents whether a device is | |
778 | * ATA or ATAPI, as per "Signature and persistence" section | |
779 | * of ATA/PI spec (volume 1, sect 5.14). | |
780 | * | |
781 | * LOCKING: | |
782 | * None. | |
783 | * | |
784 | * RETURNS: | |
785 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
786 | * the event of failure. | |
787 | */ | |
788 | ||
057ace5e | 789 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
790 | { |
791 | /* Apple's open source Darwin code hints that some devices only | |
792 | * put a proper signature into the LBA mid/high registers, | |
793 | * So, we only check those. It's sufficient for uniqueness. | |
794 | */ | |
795 | ||
796 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
797 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
798 | DPRINTK("found ATA device by sig\n"); | |
799 | return ATA_DEV_ATA; | |
800 | } | |
801 | ||
802 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
803 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
804 | DPRINTK("found ATAPI device by sig\n"); | |
805 | return ATA_DEV_ATAPI; | |
806 | } | |
807 | ||
808 | DPRINTK("unknown device\n"); | |
809 | return ATA_DEV_UNKNOWN; | |
810 | } | |
811 | ||
812 | /** | |
813 | * ata_dev_try_classify - Parse returned ATA device signature | |
814 | * @ap: ATA channel to examine | |
815 | * @device: Device to examine (starting at zero) | |
816 | * | |
817 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
818 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
819 | * shadow registers, indicating the results of device detection | |
820 | * and diagnostics. | |
821 | * | |
822 | * Select the ATA device, and read the values from the ATA shadow | |
823 | * registers. Then parse according to the Error register value, | |
824 | * and the spec-defined values examined by ata_dev_classify(). | |
825 | * | |
826 | * LOCKING: | |
827 | * caller. | |
828 | */ | |
829 | ||
830 | static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device) | |
831 | { | |
832 | struct ata_device *dev = &ap->device[device]; | |
833 | struct ata_taskfile tf; | |
834 | unsigned int class; | |
835 | u8 err; | |
836 | ||
837 | ap->ops->dev_select(ap, device); | |
838 | ||
839 | memset(&tf, 0, sizeof(tf)); | |
840 | ||
1da177e4 | 841 | ap->ops->tf_read(ap, &tf); |
0169e284 | 842 | err = tf.feature; |
1da177e4 LT |
843 | |
844 | dev->class = ATA_DEV_NONE; | |
845 | ||
846 | /* see if device passed diags */ | |
847 | if (err == 1) | |
848 | /* do nothing */ ; | |
849 | else if ((device == 0) && (err == 0x81)) | |
850 | /* do nothing */ ; | |
851 | else | |
852 | return err; | |
853 | ||
854 | /* determine if device if ATA or ATAPI */ | |
855 | class = ata_dev_classify(&tf); | |
856 | if (class == ATA_DEV_UNKNOWN) | |
857 | return err; | |
858 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
859 | return err; | |
860 | ||
861 | dev->class = class; | |
862 | ||
863 | return err; | |
864 | } | |
865 | ||
866 | /** | |
867 | * ata_dev_id_string - Convert IDENTIFY DEVICE page into string | |
868 | * @id: IDENTIFY DEVICE results we will examine | |
869 | * @s: string into which data is output | |
870 | * @ofs: offset into identify device page | |
871 | * @len: length of string to return. must be an even number. | |
872 | * | |
873 | * The strings in the IDENTIFY DEVICE page are broken up into | |
874 | * 16-bit chunks. Run through the string, and output each | |
875 | * 8-bit chunk linearly, regardless of platform. | |
876 | * | |
877 | * LOCKING: | |
878 | * caller. | |
879 | */ | |
880 | ||
057ace5e | 881 | void ata_dev_id_string(const u16 *id, unsigned char *s, |
1da177e4 LT |
882 | unsigned int ofs, unsigned int len) |
883 | { | |
884 | unsigned int c; | |
885 | ||
886 | while (len > 0) { | |
887 | c = id[ofs] >> 8; | |
888 | *s = c; | |
889 | s++; | |
890 | ||
891 | c = id[ofs] & 0xff; | |
892 | *s = c; | |
893 | s++; | |
894 | ||
895 | ofs++; | |
896 | len -= 2; | |
897 | } | |
898 | } | |
899 | ||
0baab86b EF |
900 | |
901 | /** | |
902 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
903 | * @ap: ATA channel to manipulate | |
904 | * @device: ATA device (numbered from zero) to select | |
905 | * | |
906 | * This function performs no actual function. | |
907 | * | |
908 | * May be used as the dev_select() entry in ata_port_operations. | |
909 | * | |
910 | * LOCKING: | |
911 | * caller. | |
912 | */ | |
1da177e4 LT |
913 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
914 | { | |
915 | } | |
916 | ||
0baab86b | 917 | |
1da177e4 LT |
918 | /** |
919 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
920 | * @ap: ATA channel to manipulate | |
921 | * @device: ATA device (numbered from zero) to select | |
922 | * | |
923 | * Use the method defined in the ATA specification to | |
924 | * make either device 0, or device 1, active on the | |
0baab86b EF |
925 | * ATA channel. Works with both PIO and MMIO. |
926 | * | |
927 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
928 | * |
929 | * LOCKING: | |
930 | * caller. | |
931 | */ | |
932 | ||
933 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
934 | { | |
935 | u8 tmp; | |
936 | ||
937 | if (device == 0) | |
938 | tmp = ATA_DEVICE_OBS; | |
939 | else | |
940 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
941 | ||
942 | if (ap->flags & ATA_FLAG_MMIO) { | |
943 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
944 | } else { | |
945 | outb(tmp, ap->ioaddr.device_addr); | |
946 | } | |
947 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
948 | } | |
949 | ||
950 | /** | |
951 | * ata_dev_select - Select device 0/1 on ATA bus | |
952 | * @ap: ATA channel to manipulate | |
953 | * @device: ATA device (numbered from zero) to select | |
954 | * @wait: non-zero to wait for Status register BSY bit to clear | |
955 | * @can_sleep: non-zero if context allows sleeping | |
956 | * | |
957 | * Use the method defined in the ATA specification to | |
958 | * make either device 0, or device 1, active on the | |
959 | * ATA channel. | |
960 | * | |
961 | * This is a high-level version of ata_std_dev_select(), | |
962 | * which additionally provides the services of inserting | |
963 | * the proper pauses and status polling, where needed. | |
964 | * | |
965 | * LOCKING: | |
966 | * caller. | |
967 | */ | |
968 | ||
969 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
970 | unsigned int wait, unsigned int can_sleep) | |
971 | { | |
972 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
973 | ap->id, device, wait); | |
974 | ||
975 | if (wait) | |
976 | ata_wait_idle(ap); | |
977 | ||
978 | ap->ops->dev_select(ap, device); | |
979 | ||
980 | if (wait) { | |
981 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
982 | msleep(150); | |
983 | ata_wait_idle(ap); | |
984 | } | |
985 | } | |
986 | ||
987 | /** | |
988 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
989 | * @dev: Device whose IDENTIFY DEVICE page we will dump | |
990 | * | |
991 | * Dump selected 16-bit words from a detected device's | |
992 | * IDENTIFY PAGE page. | |
993 | * | |
994 | * LOCKING: | |
995 | * caller. | |
996 | */ | |
997 | ||
057ace5e | 998 | static inline void ata_dump_id(const struct ata_device *dev) |
1da177e4 LT |
999 | { |
1000 | DPRINTK("49==0x%04x " | |
1001 | "53==0x%04x " | |
1002 | "63==0x%04x " | |
1003 | "64==0x%04x " | |
1004 | "75==0x%04x \n", | |
1005 | dev->id[49], | |
1006 | dev->id[53], | |
1007 | dev->id[63], | |
1008 | dev->id[64], | |
1009 | dev->id[75]); | |
1010 | DPRINTK("80==0x%04x " | |
1011 | "81==0x%04x " | |
1012 | "82==0x%04x " | |
1013 | "83==0x%04x " | |
1014 | "84==0x%04x \n", | |
1015 | dev->id[80], | |
1016 | dev->id[81], | |
1017 | dev->id[82], | |
1018 | dev->id[83], | |
1019 | dev->id[84]); | |
1020 | DPRINTK("88==0x%04x " | |
1021 | "93==0x%04x\n", | |
1022 | dev->id[88], | |
1023 | dev->id[93]); | |
1024 | } | |
1025 | ||
11e29e21 AC |
1026 | /* |
1027 | * Compute the PIO modes available for this device. This is not as | |
1028 | * trivial as it seems if we must consider early devices correctly. | |
1029 | * | |
1030 | * FIXME: pre IDE drive timing (do we care ?). | |
1031 | */ | |
1032 | ||
057ace5e | 1033 | static unsigned int ata_pio_modes(const struct ata_device *adev) |
11e29e21 AC |
1034 | { |
1035 | u16 modes; | |
1036 | ||
1037 | /* Usual case. Word 53 indicates word 88 is valid */ | |
1038 | if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) { | |
1039 | modes = adev->id[ATA_ID_PIO_MODES] & 0x03; | |
1040 | modes <<= 3; | |
1041 | modes |= 0x7; | |
1042 | return modes; | |
1043 | } | |
1044 | ||
1045 | /* If word 88 isn't valid then Word 51 holds the PIO timing number | |
1046 | for the maximum. Turn it into a mask and return it */ | |
1047 | modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | |
1048 | return modes; | |
1049 | } | |
1050 | ||
1da177e4 LT |
1051 | /** |
1052 | * ata_dev_identify - obtain IDENTIFY x DEVICE page | |
1053 | * @ap: port on which device we wish to probe resides | |
1054 | * @device: device bus address, starting at zero | |
1055 | * | |
1056 | * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE | |
1057 | * command, and read back the 512-byte device information page. | |
1058 | * The device information page is fed to us via the standard | |
1059 | * PIO-IN protocol, but we hand-code it here. (TODO: investigate | |
1060 | * using standard PIO-IN paths) | |
1061 | * | |
1062 | * After reading the device information page, we use several | |
1063 | * bits of information from it to initialize data structures | |
1064 | * that will be used during the lifetime of the ata_device. | |
1065 | * Other data from the info page is used to disqualify certain | |
1066 | * older ATA devices we do not wish to support. | |
1067 | * | |
1068 | * LOCKING: | |
1069 | * Inherited from caller. Some functions called by this function | |
1070 | * obtain the host_set lock. | |
1071 | */ | |
1072 | ||
1073 | static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |
1074 | { | |
1075 | struct ata_device *dev = &ap->device[device]; | |
8bf62ece | 1076 | unsigned int major_version; |
1da177e4 LT |
1077 | u16 tmp; |
1078 | unsigned long xfer_modes; | |
1da177e4 LT |
1079 | unsigned int using_edd; |
1080 | DECLARE_COMPLETION(wait); | |
1081 | struct ata_queued_cmd *qc; | |
1082 | unsigned long flags; | |
1083 | int rc; | |
1084 | ||
1085 | if (!ata_dev_present(dev)) { | |
1086 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1087 | ap->id, device); | |
1088 | return; | |
1089 | } | |
1090 | ||
1091 | if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET)) | |
1092 | using_edd = 0; | |
1093 | else | |
1094 | using_edd = 1; | |
1095 | ||
1096 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, device); | |
1097 | ||
1098 | assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI || | |
1099 | dev->class == ATA_DEV_NONE); | |
1100 | ||
1101 | ata_dev_select(ap, device, 1, 1); /* select device 0/1 */ | |
1102 | ||
1103 | qc = ata_qc_new_init(ap, dev); | |
1104 | BUG_ON(qc == NULL); | |
1105 | ||
1106 | ata_sg_init_one(qc, dev->id, sizeof(dev->id)); | |
1107 | qc->dma_dir = DMA_FROM_DEVICE; | |
1108 | qc->tf.protocol = ATA_PROT_PIO; | |
1109 | qc->nsect = 1; | |
1110 | ||
1111 | retry: | |
1112 | if (dev->class == ATA_DEV_ATA) { | |
1113 | qc->tf.command = ATA_CMD_ID_ATA; | |
1114 | DPRINTK("do ATA identify\n"); | |
1115 | } else { | |
1116 | qc->tf.command = ATA_CMD_ID_ATAPI; | |
1117 | DPRINTK("do ATAPI identify\n"); | |
1118 | } | |
1119 | ||
1120 | qc->waiting = &wait; | |
1121 | qc->complete_fn = ata_qc_complete_noop; | |
1122 | ||
1123 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1124 | rc = ata_qc_issue(qc); | |
1125 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1126 | ||
1127 | if (rc) | |
1128 | goto err_out; | |
1129 | else | |
1130 | wait_for_completion(&wait); | |
1131 | ||
0169e284 JG |
1132 | spin_lock_irqsave(&ap->host_set->lock, flags); |
1133 | ap->ops->tf_read(ap, &qc->tf); | |
1134 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1135 | ||
1136 | if (qc->tf.command & ATA_ERR) { | |
1da177e4 LT |
1137 | /* |
1138 | * arg! EDD works for all test cases, but seems to return | |
1139 | * the ATA signature for some ATAPI devices. Until the | |
1140 | * reason for this is found and fixed, we fix up the mess | |
1141 | * here. If IDENTIFY DEVICE returns command aborted | |
1142 | * (as ATAPI devices do), then we issue an | |
1143 | * IDENTIFY PACKET DEVICE. | |
1144 | * | |
1145 | * ATA software reset (SRST, the default) does not appear | |
1146 | * to have this problem. | |
1147 | */ | |
1148 | if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) { | |
0169e284 | 1149 | u8 err = qc->tf.feature; |
1da177e4 LT |
1150 | if (err & ATA_ABORTED) { |
1151 | dev->class = ATA_DEV_ATAPI; | |
1152 | qc->cursg = 0; | |
1153 | qc->cursg_ofs = 0; | |
1154 | qc->cursect = 0; | |
1155 | qc->nsect = 1; | |
1156 | goto retry; | |
1157 | } | |
1158 | } | |
1159 | goto err_out; | |
1160 | } | |
1161 | ||
1162 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
1163 | ||
1164 | /* print device capabilities */ | |
1165 | printk(KERN_DEBUG "ata%u: dev %u cfg " | |
1166 | "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1167 | ap->id, device, dev->id[49], | |
1168 | dev->id[82], dev->id[83], dev->id[84], | |
1169 | dev->id[85], dev->id[86], dev->id[87], | |
1170 | dev->id[88]); | |
1171 | ||
1172 | /* | |
1173 | * common ATA, ATAPI feature tests | |
1174 | */ | |
1175 | ||
8bf62ece AL |
1176 | /* we require DMA support (bits 8 of word 49) */ |
1177 | if (!ata_id_has_dma(dev->id)) { | |
1178 | printk(KERN_DEBUG "ata%u: no dma\n", ap->id); | |
1da177e4 LT |
1179 | goto err_out_nosup; |
1180 | } | |
1181 | ||
1182 | /* quick-n-dirty find max transfer mode; for printk only */ | |
1183 | xfer_modes = dev->id[ATA_ID_UDMA_MODES]; | |
1184 | if (!xfer_modes) | |
1185 | xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; | |
11e29e21 AC |
1186 | if (!xfer_modes) |
1187 | xfer_modes = ata_pio_modes(dev); | |
1da177e4 LT |
1188 | |
1189 | ata_dump_id(dev); | |
1190 | ||
1191 | /* ATA-specific feature tests */ | |
1192 | if (dev->class == ATA_DEV_ATA) { | |
1193 | if (!ata_id_is_ata(dev->id)) /* sanity check */ | |
1194 | goto err_out_nosup; | |
1195 | ||
8bf62ece | 1196 | /* get major version */ |
1da177e4 | 1197 | tmp = dev->id[ATA_ID_MAJOR_VER]; |
8bf62ece AL |
1198 | for (major_version = 14; major_version >= 1; major_version--) |
1199 | if (tmp & (1 << major_version)) | |
1da177e4 LT |
1200 | break; |
1201 | ||
8bf62ece AL |
1202 | /* |
1203 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1204 | * SRST RESET | |
1205 | * IDENTIFY | |
1206 | * INITIALIZE DEVICE PARAMETERS | |
1207 | * anything else.. | |
1208 | * Some drives were very specific about that exact sequence. | |
1209 | */ | |
59a10b17 | 1210 | if (major_version < 4 || (!ata_id_has_lba(dev->id))) { |
8bf62ece AL |
1211 | ata_dev_init_params(ap, dev); |
1212 | ||
59a10b17 AL |
1213 | /* current CHS translation info (id[53-58]) might be |
1214 | * changed. reread the identify device info. | |
1215 | */ | |
1216 | ata_dev_reread_id(ap, dev); | |
1217 | } | |
1218 | ||
8bf62ece AL |
1219 | if (ata_id_has_lba(dev->id)) { |
1220 | dev->flags |= ATA_DFLAG_LBA; | |
1221 | ||
1222 | if (ata_id_has_lba48(dev->id)) { | |
1223 | dev->flags |= ATA_DFLAG_LBA48; | |
1224 | dev->n_sectors = ata_id_u64(dev->id, 100); | |
1225 | } else { | |
1226 | dev->n_sectors = ata_id_u32(dev->id, 60); | |
1227 | } | |
1228 | ||
1229 | /* print device info to dmesg */ | |
1230 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n", | |
1231 | ap->id, device, | |
1232 | major_version, | |
1233 | ata_mode_string(xfer_modes), | |
1234 | (unsigned long long)dev->n_sectors, | |
1235 | dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA"); | |
1236 | } else { | |
1237 | /* CHS */ | |
1238 | ||
1239 | /* Default translation */ | |
1240 | dev->cylinders = dev->id[1]; | |
1241 | dev->heads = dev->id[3]; | |
1242 | dev->sectors = dev->id[6]; | |
1243 | dev->n_sectors = dev->cylinders * dev->heads * dev->sectors; | |
1244 | ||
1245 | if (ata_id_current_chs_valid(dev->id)) { | |
1246 | /* Current CHS translation is valid. */ | |
1247 | dev->cylinders = dev->id[54]; | |
1248 | dev->heads = dev->id[55]; | |
1249 | dev->sectors = dev->id[56]; | |
1250 | ||
1251 | dev->n_sectors = ata_id_u32(dev->id, 57); | |
1252 | } | |
1253 | ||
1254 | /* print device info to dmesg */ | |
1255 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n", | |
1256 | ap->id, device, | |
1257 | major_version, | |
1258 | ata_mode_string(xfer_modes), | |
1259 | (unsigned long long)dev->n_sectors, | |
1260 | (int)dev->cylinders, (int)dev->heads, (int)dev->sectors); | |
1da177e4 | 1261 | |
1da177e4 LT |
1262 | } |
1263 | ||
1264 | ap->host->max_cmd_len = 16; | |
1da177e4 LT |
1265 | } |
1266 | ||
1267 | /* ATAPI-specific feature tests */ | |
1268 | else { | |
1269 | if (ata_id_is_ata(dev->id)) /* sanity check */ | |
1270 | goto err_out_nosup; | |
1271 | ||
1272 | rc = atapi_cdb_len(dev->id); | |
1273 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1274 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | |
1275 | goto err_out_nosup; | |
1276 | } | |
1277 | ap->cdb_len = (unsigned int) rc; | |
1278 | ap->host->max_cmd_len = (unsigned char) ap->cdb_len; | |
1279 | ||
312f7da2 AL |
1280 | if (ata_id_cdb_intr(dev->id)) |
1281 | dev->flags |= ATA_DFLAG_CDB_INTR; | |
1282 | ||
1da177e4 LT |
1283 | /* print device info to dmesg */ |
1284 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | |
1285 | ap->id, device, | |
1286 | ata_mode_string(xfer_modes)); | |
1287 | } | |
1288 | ||
1289 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | |
1290 | return; | |
1291 | ||
1292 | err_out_nosup: | |
1293 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | |
1294 | ap->id, device); | |
1295 | err_out: | |
1296 | dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */ | |
1297 | DPRINTK("EXIT, err\n"); | |
1298 | } | |
1299 | ||
6f2f3812 | 1300 | |
057ace5e | 1301 | static inline u8 ata_dev_knobble(const struct ata_port *ap) |
6f2f3812 BC |
1302 | { |
1303 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id))); | |
1304 | } | |
1305 | ||
1306 | /** | |
1307 | * ata_dev_config - Run device specific handlers and check for | |
1308 | * SATA->PATA bridges | |
8a60a071 | 1309 | * @ap: Bus |
6f2f3812 BC |
1310 | * @i: Device |
1311 | * | |
1312 | * LOCKING: | |
1313 | */ | |
8a60a071 | 1314 | |
6f2f3812 BC |
1315 | void ata_dev_config(struct ata_port *ap, unsigned int i) |
1316 | { | |
1317 | /* limit bridge transfers to udma5, 200 sectors */ | |
1318 | if (ata_dev_knobble(ap)) { | |
1319 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", | |
1320 | ap->id, ap->device->devno); | |
1321 | ap->udma_mask &= ATA_UDMA5; | |
1322 | ap->host->max_sectors = ATA_MAX_SECTORS; | |
1323 | ap->host->hostt->max_sectors = ATA_MAX_SECTORS; | |
1324 | ap->device->flags |= ATA_DFLAG_LOCK_SECTORS; | |
1325 | } | |
1326 | ||
1327 | if (ap->ops->dev_config) | |
1328 | ap->ops->dev_config(ap, &ap->device[i]); | |
1329 | } | |
1330 | ||
1da177e4 LT |
1331 | /** |
1332 | * ata_bus_probe - Reset and probe ATA bus | |
1333 | * @ap: Bus to probe | |
1334 | * | |
0cba632b JG |
1335 | * Master ATA bus probing function. Initiates a hardware-dependent |
1336 | * bus reset, then attempts to identify any devices found on | |
1337 | * the bus. | |
1338 | * | |
1da177e4 | 1339 | * LOCKING: |
0cba632b | 1340 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1341 | * |
1342 | * RETURNS: | |
1343 | * Zero on success, non-zero on error. | |
1344 | */ | |
1345 | ||
1346 | static int ata_bus_probe(struct ata_port *ap) | |
1347 | { | |
1348 | unsigned int i, found = 0; | |
1349 | ||
1350 | ap->ops->phy_reset(ap); | |
1351 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1352 | goto err_out; | |
1353 | ||
1354 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1355 | ata_dev_identify(ap, i); | |
1356 | if (ata_dev_present(&ap->device[i])) { | |
1357 | found = 1; | |
6f2f3812 | 1358 | ata_dev_config(ap,i); |
1da177e4 LT |
1359 | } |
1360 | } | |
1361 | ||
1362 | if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1363 | goto err_out_disable; | |
1364 | ||
1365 | ata_set_mode(ap); | |
1366 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1367 | goto err_out_disable; | |
1368 | ||
1369 | return 0; | |
1370 | ||
1371 | err_out_disable: | |
1372 | ap->ops->port_disable(ap); | |
1373 | err_out: | |
1374 | return -1; | |
1375 | } | |
1376 | ||
1377 | /** | |
0cba632b JG |
1378 | * ata_port_probe - Mark port as enabled |
1379 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1380 | * |
0cba632b JG |
1381 | * Modify @ap data structure such that the system |
1382 | * thinks that the entire port is enabled. | |
1383 | * | |
1384 | * LOCKING: host_set lock, or some other form of | |
1385 | * serialization. | |
1da177e4 LT |
1386 | */ |
1387 | ||
1388 | void ata_port_probe(struct ata_port *ap) | |
1389 | { | |
1390 | ap->flags &= ~ATA_FLAG_PORT_DISABLED; | |
1391 | } | |
1392 | ||
1393 | /** | |
780a87f7 JG |
1394 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1395 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1396 | * |
780a87f7 JG |
1397 | * This function issues commands to standard SATA Sxxx |
1398 | * PHY registers, to wake up the phy (and device), and | |
1399 | * clear any reset condition. | |
1da177e4 LT |
1400 | * |
1401 | * LOCKING: | |
0cba632b | 1402 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1403 | * |
1404 | */ | |
1405 | void __sata_phy_reset(struct ata_port *ap) | |
1406 | { | |
1407 | u32 sstatus; | |
1408 | unsigned long timeout = jiffies + (HZ * 5); | |
1409 | ||
1410 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e BR |
1411 | /* issue phy wake/reset */ |
1412 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
62ba2841 TH |
1413 | /* Couldn't find anything in SATA I/II specs, but |
1414 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1415 | mdelay(1); | |
1da177e4 | 1416 | } |
cdcca89e | 1417 | scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */ |
1da177e4 LT |
1418 | |
1419 | /* wait for phy to become ready, if necessary */ | |
1420 | do { | |
1421 | msleep(200); | |
1422 | sstatus = scr_read(ap, SCR_STATUS); | |
1423 | if ((sstatus & 0xf) != 1) | |
1424 | break; | |
1425 | } while (time_before(jiffies, timeout)); | |
1426 | ||
1427 | /* TODO: phy layer with polling, timeouts, etc. */ | |
1428 | if (sata_dev_present(ap)) | |
1429 | ata_port_probe(ap); | |
1430 | else { | |
1431 | sstatus = scr_read(ap, SCR_STATUS); | |
1432 | printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n", | |
1433 | ap->id, sstatus); | |
1434 | ata_port_disable(ap); | |
1435 | } | |
1436 | ||
1437 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1438 | return; | |
1439 | ||
1440 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1441 | ata_port_disable(ap); | |
1442 | return; | |
1443 | } | |
1444 | ||
1445 | ap->cbl = ATA_CBL_SATA; | |
1446 | } | |
1447 | ||
1448 | /** | |
780a87f7 JG |
1449 | * sata_phy_reset - Reset SATA bus. |
1450 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1451 | * |
780a87f7 JG |
1452 | * This function resets the SATA bus, and then probes |
1453 | * the bus for devices. | |
1da177e4 LT |
1454 | * |
1455 | * LOCKING: | |
0cba632b | 1456 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1457 | * |
1458 | */ | |
1459 | void sata_phy_reset(struct ata_port *ap) | |
1460 | { | |
1461 | __sata_phy_reset(ap); | |
1462 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1463 | return; | |
1464 | ata_bus_reset(ap); | |
1465 | } | |
1466 | ||
1467 | /** | |
780a87f7 JG |
1468 | * ata_port_disable - Disable port. |
1469 | * @ap: Port to be disabled. | |
1da177e4 | 1470 | * |
780a87f7 JG |
1471 | * Modify @ap data structure such that the system |
1472 | * thinks that the entire port is disabled, and should | |
1473 | * never attempt to probe or communicate with devices | |
1474 | * on this port. | |
1475 | * | |
1476 | * LOCKING: host_set lock, or some other form of | |
1477 | * serialization. | |
1da177e4 LT |
1478 | */ |
1479 | ||
1480 | void ata_port_disable(struct ata_port *ap) | |
1481 | { | |
1482 | ap->device[0].class = ATA_DEV_NONE; | |
1483 | ap->device[1].class = ATA_DEV_NONE; | |
1484 | ap->flags |= ATA_FLAG_PORT_DISABLED; | |
1485 | } | |
1486 | ||
452503f9 AC |
1487 | /* |
1488 | * This mode timing computation functionality is ported over from | |
1489 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
1490 | */ | |
1491 | /* | |
1492 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | |
1493 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | |
1494 | * for PIO 5, which is a nonstandard extension and UDMA6, which | |
1495 | * is currently supported only by Maxtor drives. | |
1496 | */ | |
1497 | ||
1498 | static const struct ata_timing ata_timing[] = { | |
1499 | ||
1500 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
1501 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
1502 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
1503 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
1504 | ||
1505 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, | |
1506 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
1507 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
1508 | ||
1509 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
1510 | ||
1511 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, | |
1512 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
1513 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
1514 | ||
1515 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, | |
1516 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
1517 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
1518 | ||
1519 | /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */ | |
1520 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, | |
1521 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
1522 | ||
1523 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
1524 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
1525 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
1526 | ||
1527 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
1528 | ||
1529 | { 0xFF } | |
1530 | }; | |
1531 | ||
1532 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
1533 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
1534 | ||
1535 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
1536 | { | |
1537 | q->setup = EZ(t->setup * 1000, T); | |
1538 | q->act8b = EZ(t->act8b * 1000, T); | |
1539 | q->rec8b = EZ(t->rec8b * 1000, T); | |
1540 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
1541 | q->active = EZ(t->active * 1000, T); | |
1542 | q->recover = EZ(t->recover * 1000, T); | |
1543 | q->cycle = EZ(t->cycle * 1000, T); | |
1544 | q->udma = EZ(t->udma * 1000, UT); | |
1545 | } | |
1546 | ||
1547 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
1548 | struct ata_timing *m, unsigned int what) | |
1549 | { | |
1550 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
1551 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
1552 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
1553 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
1554 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
1555 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
1556 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
1557 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
1558 | } | |
1559 | ||
1560 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
1561 | { | |
1562 | const struct ata_timing *t; | |
1563 | ||
1564 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 1565 | if (t->mode == 0xFF) |
452503f9 AC |
1566 | return NULL; |
1567 | return t; | |
1568 | } | |
1569 | ||
1570 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
1571 | struct ata_timing *t, int T, int UT) | |
1572 | { | |
1573 | const struct ata_timing *s; | |
1574 | struct ata_timing p; | |
1575 | ||
1576 | /* | |
1577 | * Find the mode. | |
1578 | */ | |
1579 | ||
1580 | if (!(s = ata_timing_find_mode(speed))) | |
1581 | return -EINVAL; | |
1582 | ||
1583 | /* | |
1584 | * If the drive is an EIDE drive, it can tell us it needs extended | |
1585 | * PIO/MW_DMA cycle timing. | |
1586 | */ | |
1587 | ||
1588 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
1589 | memset(&p, 0, sizeof(p)); | |
1590 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
1591 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
1592 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
1593 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
1594 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
1595 | } | |
1596 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
1597 | } | |
1598 | ||
1599 | /* | |
1600 | * Convert the timing to bus clock counts. | |
1601 | */ | |
1602 | ||
1603 | ata_timing_quantize(s, t, T, UT); | |
1604 | ||
1605 | /* | |
1606 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T | |
1607 | * and some other commands. We have to ensure that the DMA cycle timing is | |
1608 | * slower/equal than the fastest PIO timing. | |
1609 | */ | |
1610 | ||
1611 | if (speed > XFER_PIO_4) { | |
1612 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
1613 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
1614 | } | |
1615 | ||
1616 | /* | |
1617 | * Lenghten active & recovery time so that cycle time is correct. | |
1618 | */ | |
1619 | ||
1620 | if (t->act8b + t->rec8b < t->cyc8b) { | |
1621 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
1622 | t->rec8b = t->cyc8b - t->act8b; | |
1623 | } | |
1624 | ||
1625 | if (t->active + t->recover < t->cycle) { | |
1626 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
1627 | t->recover = t->cycle - t->active; | |
1628 | } | |
1629 | ||
1630 | return 0; | |
1631 | } | |
1632 | ||
057ace5e | 1633 | static const struct { |
1da177e4 LT |
1634 | unsigned int shift; |
1635 | u8 base; | |
1636 | } xfer_mode_classes[] = { | |
1637 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | |
1638 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | |
1639 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | |
1640 | }; | |
1641 | ||
1642 | static inline u8 base_from_shift(unsigned int shift) | |
1643 | { | |
1644 | int i; | |
1645 | ||
1646 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | |
1647 | if (xfer_mode_classes[i].shift == shift) | |
1648 | return xfer_mode_classes[i].base; | |
1649 | ||
1650 | return 0xff; | |
1651 | } | |
1652 | ||
1653 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |
1654 | { | |
1655 | int ofs, idx; | |
1656 | u8 base; | |
1657 | ||
1658 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1659 | return; | |
1660 | ||
1661 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
1662 | dev->flags |= ATA_DFLAG_PIO; | |
1663 | ||
1664 | ata_dev_set_xfermode(ap, dev); | |
1665 | ||
1666 | base = base_from_shift(dev->xfer_shift); | |
1667 | ofs = dev->xfer_mode - base; | |
1668 | idx = ofs + dev->xfer_shift; | |
1669 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | |
1670 | ||
1671 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", | |
1672 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | |
1673 | ||
1674 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | |
1675 | ap->id, dev->devno, xfer_mode_str[idx]); | |
1676 | } | |
1677 | ||
1678 | static int ata_host_set_pio(struct ata_port *ap) | |
1679 | { | |
1680 | unsigned int mask; | |
1681 | int x, i; | |
1682 | u8 base, xfer_mode; | |
1683 | ||
1684 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | |
1685 | x = fgb(mask); | |
1686 | if (x < 0) { | |
1687 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | |
1688 | return -1; | |
1689 | } | |
1690 | ||
1691 | base = base_from_shift(ATA_SHIFT_PIO); | |
1692 | xfer_mode = base + x; | |
1693 | ||
1694 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | |
1695 | (int)base, (int)xfer_mode, mask, x); | |
1696 | ||
1697 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1698 | struct ata_device *dev = &ap->device[i]; | |
1699 | if (ata_dev_present(dev)) { | |
1700 | dev->pio_mode = xfer_mode; | |
1701 | dev->xfer_mode = xfer_mode; | |
1702 | dev->xfer_shift = ATA_SHIFT_PIO; | |
1703 | if (ap->ops->set_piomode) | |
1704 | ap->ops->set_piomode(ap, dev); | |
1705 | } | |
1706 | } | |
1707 | ||
1708 | return 0; | |
1709 | } | |
1710 | ||
1711 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |
1712 | unsigned int xfer_shift) | |
1713 | { | |
1714 | int i; | |
1715 | ||
1716 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1717 | struct ata_device *dev = &ap->device[i]; | |
1718 | if (ata_dev_present(dev)) { | |
1719 | dev->dma_mode = xfer_mode; | |
1720 | dev->xfer_mode = xfer_mode; | |
1721 | dev->xfer_shift = xfer_shift; | |
1722 | if (ap->ops->set_dmamode) | |
1723 | ap->ops->set_dmamode(ap, dev); | |
1724 | } | |
1725 | } | |
1726 | } | |
1727 | ||
1728 | /** | |
1729 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1730 | * @ap: port on which timings will be programmed | |
1731 | * | |
780a87f7 JG |
1732 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). |
1733 | * | |
1da177e4 | 1734 | * LOCKING: |
0cba632b | 1735 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1736 | * |
1737 | */ | |
1738 | static void ata_set_mode(struct ata_port *ap) | |
1739 | { | |
8cbd6df1 | 1740 | unsigned int xfer_shift; |
1da177e4 LT |
1741 | u8 xfer_mode; |
1742 | int rc; | |
1743 | ||
1744 | /* step 1: always set host PIO timings */ | |
1745 | rc = ata_host_set_pio(ap); | |
1746 | if (rc) | |
1747 | goto err_out; | |
1748 | ||
1749 | /* step 2: choose the best data xfer mode */ | |
1750 | xfer_mode = xfer_shift = 0; | |
1751 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | |
1752 | if (rc) | |
1753 | goto err_out; | |
1754 | ||
1755 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | |
1756 | if (xfer_shift != ATA_SHIFT_PIO) | |
1757 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | |
1758 | ||
1759 | /* step 4: update devices' xfer mode */ | |
1760 | ata_dev_set_mode(ap, &ap->device[0]); | |
1761 | ata_dev_set_mode(ap, &ap->device[1]); | |
1762 | ||
1763 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1764 | return; | |
1765 | ||
1766 | if (ap->ops->post_set_mode) | |
1767 | ap->ops->post_set_mode(ap); | |
1768 | ||
1da177e4 LT |
1769 | return; |
1770 | ||
1771 | err_out: | |
1772 | ata_port_disable(ap); | |
1773 | } | |
1774 | ||
1775 | /** | |
1776 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
1777 | * @ap: port containing status register to be polled | |
1778 | * @tmout_pat: impatience timeout | |
1779 | * @tmout: overall timeout | |
1780 | * | |
780a87f7 JG |
1781 | * Sleep until ATA Status register bit BSY clears, |
1782 | * or a timeout occurs. | |
1783 | * | |
1784 | * LOCKING: None. | |
1da177e4 LT |
1785 | * |
1786 | */ | |
1787 | ||
1788 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
1789 | unsigned long tmout_pat, | |
1790 | unsigned long tmout) | |
1791 | { | |
1792 | unsigned long timer_start, timeout; | |
1793 | u8 status; | |
1794 | ||
1795 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
1796 | timer_start = jiffies; | |
1797 | timeout = timer_start + tmout_pat; | |
1798 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1799 | msleep(50); | |
1800 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
1801 | } | |
1802 | ||
1803 | if (status & ATA_BUSY) | |
1804 | printk(KERN_WARNING "ata%u is slow to respond, " | |
1805 | "please be patient\n", ap->id); | |
1806 | ||
1807 | timeout = timer_start + tmout; | |
1808 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1809 | msleep(50); | |
1810 | status = ata_chk_status(ap); | |
1811 | } | |
1812 | ||
1813 | if (status & ATA_BUSY) { | |
1814 | printk(KERN_ERR "ata%u failed to respond (%lu secs)\n", | |
1815 | ap->id, tmout / HZ); | |
1816 | return 1; | |
1817 | } | |
1818 | ||
1819 | return 0; | |
1820 | } | |
1821 | ||
1822 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
1823 | { | |
1824 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1825 | unsigned int dev0 = devmask & (1 << 0); | |
1826 | unsigned int dev1 = devmask & (1 << 1); | |
1827 | unsigned long timeout; | |
1828 | ||
1829 | /* if device 0 was found in ata_devchk, wait for its | |
1830 | * BSY bit to clear | |
1831 | */ | |
1832 | if (dev0) | |
1833 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1834 | ||
1835 | /* if device 1 was found in ata_devchk, wait for | |
1836 | * register access, then wait for BSY to clear | |
1837 | */ | |
1838 | timeout = jiffies + ATA_TMOUT_BOOT; | |
1839 | while (dev1) { | |
1840 | u8 nsect, lbal; | |
1841 | ||
1842 | ap->ops->dev_select(ap, 1); | |
1843 | if (ap->flags & ATA_FLAG_MMIO) { | |
1844 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
1845 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
1846 | } else { | |
1847 | nsect = inb(ioaddr->nsect_addr); | |
1848 | lbal = inb(ioaddr->lbal_addr); | |
1849 | } | |
1850 | if ((nsect == 1) && (lbal == 1)) | |
1851 | break; | |
1852 | if (time_after(jiffies, timeout)) { | |
1853 | dev1 = 0; | |
1854 | break; | |
1855 | } | |
1856 | msleep(50); /* give drive a breather */ | |
1857 | } | |
1858 | if (dev1) | |
1859 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1860 | ||
1861 | /* is all this really necessary? */ | |
1862 | ap->ops->dev_select(ap, 0); | |
1863 | if (dev1) | |
1864 | ap->ops->dev_select(ap, 1); | |
1865 | if (dev0) | |
1866 | ap->ops->dev_select(ap, 0); | |
1867 | } | |
1868 | ||
1869 | /** | |
0cba632b JG |
1870 | * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command. |
1871 | * @ap: Port to reset and probe | |
1872 | * | |
1873 | * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and | |
1874 | * probe the bus. Not often used these days. | |
1da177e4 LT |
1875 | * |
1876 | * LOCKING: | |
0cba632b | 1877 | * PCI/etc. bus probe sem. |
e5338254 | 1878 | * Obtains host_set lock. |
1da177e4 LT |
1879 | * |
1880 | */ | |
1881 | ||
1882 | static unsigned int ata_bus_edd(struct ata_port *ap) | |
1883 | { | |
1884 | struct ata_taskfile tf; | |
e5338254 | 1885 | unsigned long flags; |
1da177e4 LT |
1886 | |
1887 | /* set up execute-device-diag (bus reset) taskfile */ | |
1888 | /* also, take interrupts to a known state (disabled) */ | |
1889 | DPRINTK("execute-device-diag\n"); | |
1890 | ata_tf_init(ap, &tf, 0); | |
1891 | tf.ctl |= ATA_NIEN; | |
1892 | tf.command = ATA_CMD_EDD; | |
1893 | tf.protocol = ATA_PROT_NODATA; | |
1894 | ||
1895 | /* do bus reset */ | |
e5338254 | 1896 | spin_lock_irqsave(&ap->host_set->lock, flags); |
1da177e4 | 1897 | ata_tf_to_host(ap, &tf); |
e5338254 | 1898 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
1da177e4 LT |
1899 | |
1900 | /* spec says at least 2ms. but who knows with those | |
1901 | * crazy ATAPI devices... | |
1902 | */ | |
1903 | msleep(150); | |
1904 | ||
1905 | return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1906 | } | |
1907 | ||
1908 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
1909 | unsigned int devmask) | |
1910 | { | |
1911 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1912 | ||
1913 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
1914 | ||
1915 | /* software reset. causes dev0 to be selected */ | |
1916 | if (ap->flags & ATA_FLAG_MMIO) { | |
1917 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1918 | udelay(20); /* FIXME: flush */ | |
1919 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
1920 | udelay(20); /* FIXME: flush */ | |
1921 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1922 | } else { | |
1923 | outb(ap->ctl, ioaddr->ctl_addr); | |
1924 | udelay(10); | |
1925 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
1926 | udelay(10); | |
1927 | outb(ap->ctl, ioaddr->ctl_addr); | |
1928 | } | |
1929 | ||
1930 | /* spec mandates ">= 2ms" before checking status. | |
1931 | * We wait 150ms, because that was the magic delay used for | |
1932 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
1933 | * between when the ATA command register is written, and then | |
1934 | * status is checked. Because waiting for "a while" before | |
1935 | * checking status is fine, post SRST, we perform this magic | |
1936 | * delay here as well. | |
1937 | */ | |
1938 | msleep(150); | |
1939 | ||
1940 | ata_bus_post_reset(ap, devmask); | |
1941 | ||
1942 | return 0; | |
1943 | } | |
1944 | ||
1945 | /** | |
1946 | * ata_bus_reset - reset host port and associated ATA channel | |
1947 | * @ap: port to reset | |
1948 | * | |
1949 | * This is typically the first time we actually start issuing | |
1950 | * commands to the ATA channel. We wait for BSY to clear, then | |
1951 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
1952 | * result. Determine what devices, if any, are on the channel | |
1953 | * by looking at the device 0/1 error register. Look at the signature | |
1954 | * stored in each device's taskfile registers, to determine if | |
1955 | * the device is ATA or ATAPI. | |
1956 | * | |
1957 | * LOCKING: | |
0cba632b JG |
1958 | * PCI/etc. bus probe sem. |
1959 | * Obtains host_set lock. | |
1da177e4 LT |
1960 | * |
1961 | * SIDE EFFECTS: | |
1962 | * Sets ATA_FLAG_PORT_DISABLED if bus reset fails. | |
1963 | */ | |
1964 | ||
1965 | void ata_bus_reset(struct ata_port *ap) | |
1966 | { | |
1967 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1968 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
1969 | u8 err; | |
1970 | unsigned int dev0, dev1 = 0, rc = 0, devmask = 0; | |
1971 | ||
1972 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
1973 | ||
1974 | /* determine if device 0/1 are present */ | |
1975 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
1976 | dev0 = 1; | |
1977 | else { | |
1978 | dev0 = ata_devchk(ap, 0); | |
1979 | if (slave_possible) | |
1980 | dev1 = ata_devchk(ap, 1); | |
1981 | } | |
1982 | ||
1983 | if (dev0) | |
1984 | devmask |= (1 << 0); | |
1985 | if (dev1) | |
1986 | devmask |= (1 << 1); | |
1987 | ||
1988 | /* select device 0 again */ | |
1989 | ap->ops->dev_select(ap, 0); | |
1990 | ||
1991 | /* issue bus reset */ | |
1992 | if (ap->flags & ATA_FLAG_SRST) | |
1993 | rc = ata_bus_softreset(ap, devmask); | |
1994 | else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) { | |
1995 | /* set up device control */ | |
1996 | if (ap->flags & ATA_FLAG_MMIO) | |
1997 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1998 | else | |
1999 | outb(ap->ctl, ioaddr->ctl_addr); | |
2000 | rc = ata_bus_edd(ap); | |
2001 | } | |
2002 | ||
2003 | if (rc) | |
2004 | goto err_out; | |
2005 | ||
2006 | /* | |
2007 | * determine by signature whether we have ATA or ATAPI devices | |
2008 | */ | |
2009 | err = ata_dev_try_classify(ap, 0); | |
2010 | if ((slave_possible) && (err != 0x81)) | |
2011 | ata_dev_try_classify(ap, 1); | |
2012 | ||
2013 | /* re-enable interrupts */ | |
2014 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2015 | ata_irq_on(ap); | |
2016 | ||
2017 | /* is double-select really necessary? */ | |
2018 | if (ap->device[1].class != ATA_DEV_NONE) | |
2019 | ap->ops->dev_select(ap, 1); | |
2020 | if (ap->device[0].class != ATA_DEV_NONE) | |
2021 | ap->ops->dev_select(ap, 0); | |
2022 | ||
2023 | /* if no devices were detected, disable this port */ | |
2024 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2025 | (ap->device[1].class == ATA_DEV_NONE)) | |
2026 | goto err_out; | |
2027 | ||
2028 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2029 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2030 | if (ap->flags & ATA_FLAG_MMIO) | |
2031 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2032 | else | |
2033 | outb(ap->ctl, ioaddr->ctl_addr); | |
2034 | } | |
2035 | ||
2036 | DPRINTK("EXIT\n"); | |
2037 | return; | |
2038 | ||
2039 | err_out: | |
2040 | printk(KERN_ERR "ata%u: disabling port\n", ap->id); | |
2041 | ap->ops->port_disable(ap); | |
2042 | ||
2043 | DPRINTK("EXIT\n"); | |
2044 | } | |
2045 | ||
057ace5e JG |
2046 | static void ata_pr_blacklisted(const struct ata_port *ap, |
2047 | const struct ata_device *dev) | |
1da177e4 LT |
2048 | { |
2049 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | |
2050 | ap->id, dev->devno); | |
2051 | } | |
2052 | ||
2053 | static const char * ata_dma_blacklist [] = { | |
2054 | "WDC AC11000H", | |
2055 | "WDC AC22100H", | |
2056 | "WDC AC32500H", | |
2057 | "WDC AC33100H", | |
2058 | "WDC AC31600H", | |
2059 | "WDC AC32100H", | |
2060 | "WDC AC23200L", | |
2061 | "Compaq CRD-8241B", | |
2062 | "CRD-8400B", | |
2063 | "CRD-8480B", | |
2064 | "CRD-8482B", | |
2065 | "CRD-84", | |
2066 | "SanDisk SDP3B", | |
2067 | "SanDisk SDP3B-64", | |
2068 | "SANYO CD-ROM CRD", | |
2069 | "HITACHI CDR-8", | |
2070 | "HITACHI CDR-8335", | |
2071 | "HITACHI CDR-8435", | |
2072 | "Toshiba CD-ROM XM-6202B", | |
e922256a | 2073 | "TOSHIBA CD-ROM XM-1702BC", |
1da177e4 LT |
2074 | "CD-532E-A", |
2075 | "E-IDE CD-ROM CR-840", | |
2076 | "CD-ROM Drive/F5A", | |
2077 | "WPI CDD-820", | |
2078 | "SAMSUNG CD-ROM SC-148C", | |
2079 | "SAMSUNG CD-ROM SC", | |
2080 | "SanDisk SDP3B-64", | |
1da177e4 LT |
2081 | "ATAPI CD-ROM DRIVE 40X MAXIMUM", |
2082 | "_NEC DV5800A", | |
2083 | }; | |
2084 | ||
057ace5e | 2085 | static int ata_dma_blacklisted(const struct ata_device *dev) |
1da177e4 LT |
2086 | { |
2087 | unsigned char model_num[40]; | |
2088 | char *s; | |
2089 | unsigned int len; | |
2090 | int i; | |
2091 | ||
2092 | ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS, | |
2093 | sizeof(model_num)); | |
2094 | s = &model_num[0]; | |
2095 | len = strnlen(s, sizeof(model_num)); | |
2096 | ||
2097 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
2098 | while ((len > 0) && (s[len - 1] == ' ')) { | |
2099 | len--; | |
2100 | s[len] = 0; | |
2101 | } | |
2102 | ||
2103 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) | |
2104 | if (!strncmp(ata_dma_blacklist[i], s, len)) | |
2105 | return 1; | |
2106 | ||
2107 | return 0; | |
2108 | } | |
2109 | ||
057ace5e | 2110 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift) |
1da177e4 | 2111 | { |
057ace5e | 2112 | const struct ata_device *master, *slave; |
1da177e4 LT |
2113 | unsigned int mask; |
2114 | ||
2115 | master = &ap->device[0]; | |
2116 | slave = &ap->device[1]; | |
2117 | ||
2118 | assert (ata_dev_present(master) || ata_dev_present(slave)); | |
2119 | ||
2120 | if (shift == ATA_SHIFT_UDMA) { | |
2121 | mask = ap->udma_mask; | |
2122 | if (ata_dev_present(master)) { | |
2123 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | |
057ace5e | 2124 | if (ata_dma_blacklisted(master)) { |
1da177e4 LT |
2125 | mask = 0; |
2126 | ata_pr_blacklisted(ap, master); | |
2127 | } | |
2128 | } | |
2129 | if (ata_dev_present(slave)) { | |
2130 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | |
057ace5e | 2131 | if (ata_dma_blacklisted(slave)) { |
1da177e4 LT |
2132 | mask = 0; |
2133 | ata_pr_blacklisted(ap, slave); | |
2134 | } | |
2135 | } | |
2136 | } | |
2137 | else if (shift == ATA_SHIFT_MWDMA) { | |
2138 | mask = ap->mwdma_mask; | |
2139 | if (ata_dev_present(master)) { | |
2140 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | |
057ace5e | 2141 | if (ata_dma_blacklisted(master)) { |
1da177e4 LT |
2142 | mask = 0; |
2143 | ata_pr_blacklisted(ap, master); | |
2144 | } | |
2145 | } | |
2146 | if (ata_dev_present(slave)) { | |
2147 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | |
057ace5e | 2148 | if (ata_dma_blacklisted(slave)) { |
1da177e4 LT |
2149 | mask = 0; |
2150 | ata_pr_blacklisted(ap, slave); | |
2151 | } | |
2152 | } | |
2153 | } | |
2154 | else if (shift == ATA_SHIFT_PIO) { | |
2155 | mask = ap->pio_mask; | |
2156 | if (ata_dev_present(master)) { | |
2157 | /* spec doesn't return explicit support for | |
2158 | * PIO0-2, so we fake it | |
2159 | */ | |
2160 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | |
2161 | tmp_mode <<= 3; | |
2162 | tmp_mode |= 0x7; | |
2163 | mask &= tmp_mode; | |
2164 | } | |
2165 | if (ata_dev_present(slave)) { | |
2166 | /* spec doesn't return explicit support for | |
2167 | * PIO0-2, so we fake it | |
2168 | */ | |
2169 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | |
2170 | tmp_mode <<= 3; | |
2171 | tmp_mode |= 0x7; | |
2172 | mask &= tmp_mode; | |
2173 | } | |
2174 | } | |
2175 | else { | |
2176 | mask = 0xffffffff; /* shut up compiler warning */ | |
2177 | BUG(); | |
2178 | } | |
2179 | ||
2180 | return mask; | |
2181 | } | |
2182 | ||
2183 | /* find greatest bit */ | |
2184 | static int fgb(u32 bitmap) | |
2185 | { | |
2186 | unsigned int i; | |
2187 | int x = -1; | |
2188 | ||
2189 | for (i = 0; i < 32; i++) | |
2190 | if (bitmap & (1 << i)) | |
2191 | x = i; | |
2192 | ||
2193 | return x; | |
2194 | } | |
2195 | ||
2196 | /** | |
2197 | * ata_choose_xfer_mode - attempt to find best transfer mode | |
2198 | * @ap: Port for which an xfer mode will be selected | |
2199 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | |
2200 | * @xfer_shift_out: (output) bit shift that selects this mode | |
2201 | * | |
0cba632b JG |
2202 | * Based on host and device capabilities, determine the |
2203 | * maximum transfer mode that is amenable to all. | |
2204 | * | |
1da177e4 | 2205 | * LOCKING: |
0cba632b | 2206 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2207 | * |
2208 | * RETURNS: | |
2209 | * Zero on success, negative on error. | |
2210 | */ | |
2211 | ||
057ace5e | 2212 | static int ata_choose_xfer_mode(const struct ata_port *ap, |
1da177e4 LT |
2213 | u8 *xfer_mode_out, |
2214 | unsigned int *xfer_shift_out) | |
2215 | { | |
2216 | unsigned int mask, shift; | |
2217 | int x, i; | |
2218 | ||
2219 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | |
2220 | shift = xfer_mode_classes[i].shift; | |
2221 | mask = ata_get_mode_mask(ap, shift); | |
2222 | ||
2223 | x = fgb(mask); | |
2224 | if (x >= 0) { | |
2225 | *xfer_mode_out = xfer_mode_classes[i].base + x; | |
2226 | *xfer_shift_out = shift; | |
2227 | return 0; | |
2228 | } | |
2229 | } | |
2230 | ||
2231 | return -1; | |
2232 | } | |
2233 | ||
2234 | /** | |
2235 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
2236 | * @ap: Port associated with device @dev | |
2237 | * @dev: Device to which command will be sent | |
2238 | * | |
780a87f7 JG |
2239 | * Issue SET FEATURES - XFER MODE command to device @dev |
2240 | * on port @ap. | |
2241 | * | |
1da177e4 | 2242 | * LOCKING: |
0cba632b | 2243 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2244 | */ |
2245 | ||
2246 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) | |
2247 | { | |
2248 | DECLARE_COMPLETION(wait); | |
2249 | struct ata_queued_cmd *qc; | |
2250 | int rc; | |
2251 | unsigned long flags; | |
2252 | ||
2253 | /* set up set-features taskfile */ | |
2254 | DPRINTK("set features - xfer mode\n"); | |
2255 | ||
2256 | qc = ata_qc_new_init(ap, dev); | |
2257 | BUG_ON(qc == NULL); | |
2258 | ||
2259 | qc->tf.command = ATA_CMD_SET_FEATURES; | |
2260 | qc->tf.feature = SETFEATURES_XFER; | |
2261 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2262 | qc->tf.protocol = ATA_PROT_NODATA; | |
2263 | qc->tf.nsect = dev->xfer_mode; | |
2264 | ||
2265 | qc->waiting = &wait; | |
2266 | qc->complete_fn = ata_qc_complete_noop; | |
2267 | ||
2268 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2269 | rc = ata_qc_issue(qc); | |
2270 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2271 | ||
2272 | if (rc) | |
2273 | ata_port_disable(ap); | |
2274 | else | |
2275 | wait_for_completion(&wait); | |
2276 | ||
2277 | DPRINTK("EXIT\n"); | |
2278 | } | |
2279 | ||
59a10b17 AL |
2280 | /** |
2281 | * ata_dev_reread_id - Reread the device identify device info | |
2282 | * @ap: port where the device is | |
2283 | * @dev: device to reread the identify device info | |
2284 | * | |
2285 | * LOCKING: | |
2286 | */ | |
2287 | ||
2288 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev) | |
2289 | { | |
2290 | DECLARE_COMPLETION(wait); | |
2291 | struct ata_queued_cmd *qc; | |
2292 | unsigned long flags; | |
2293 | int rc; | |
2294 | ||
2295 | qc = ata_qc_new_init(ap, dev); | |
2296 | BUG_ON(qc == NULL); | |
2297 | ||
2298 | ata_sg_init_one(qc, dev->id, sizeof(dev->id)); | |
2299 | qc->dma_dir = DMA_FROM_DEVICE; | |
2300 | ||
2301 | if (dev->class == ATA_DEV_ATA) { | |
2302 | qc->tf.command = ATA_CMD_ID_ATA; | |
2303 | DPRINTK("do ATA identify\n"); | |
2304 | } else { | |
2305 | qc->tf.command = ATA_CMD_ID_ATAPI; | |
2306 | DPRINTK("do ATAPI identify\n"); | |
2307 | } | |
2308 | ||
2309 | qc->tf.flags |= ATA_TFLAG_DEVICE; | |
2310 | qc->tf.protocol = ATA_PROT_PIO; | |
2311 | qc->nsect = 1; | |
2312 | ||
2313 | qc->waiting = &wait; | |
2314 | qc->complete_fn = ata_qc_complete_noop; | |
2315 | ||
2316 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2317 | rc = ata_qc_issue(qc); | |
2318 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2319 | ||
2320 | if (rc) | |
2321 | goto err_out; | |
2322 | ||
2323 | wait_for_completion(&wait); | |
2324 | ||
2325 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
2326 | ||
2327 | ata_dump_id(dev); | |
2328 | ||
2329 | DPRINTK("EXIT\n"); | |
2330 | ||
2331 | return; | |
2332 | err_out: | |
2333 | ata_port_disable(ap); | |
2334 | } | |
2335 | ||
8bf62ece AL |
2336 | /** |
2337 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
2338 | * @ap: Port associated with device @dev | |
2339 | * @dev: Device to which command will be sent | |
2340 | * | |
2341 | * LOCKING: | |
2342 | */ | |
2343 | ||
2344 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev) | |
2345 | { | |
2346 | DECLARE_COMPLETION(wait); | |
2347 | struct ata_queued_cmd *qc; | |
2348 | int rc; | |
2349 | unsigned long flags; | |
2350 | u16 sectors = dev->id[6]; | |
2351 | u16 heads = dev->id[3]; | |
2352 | ||
2353 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
2354 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
2355 | return; | |
2356 | ||
2357 | /* set up init dev params taskfile */ | |
2358 | DPRINTK("init dev params \n"); | |
2359 | ||
2360 | qc = ata_qc_new_init(ap, dev); | |
2361 | BUG_ON(qc == NULL); | |
2362 | ||
2363 | qc->tf.command = ATA_CMD_INIT_DEV_PARAMS; | |
2364 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2365 | qc->tf.protocol = ATA_PROT_NODATA; | |
2366 | qc->tf.nsect = sectors; | |
2367 | qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
2368 | ||
2369 | qc->waiting = &wait; | |
2370 | qc->complete_fn = ata_qc_complete_noop; | |
2371 | ||
2372 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2373 | rc = ata_qc_issue(qc); | |
2374 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2375 | ||
2376 | if (rc) | |
2377 | ata_port_disable(ap); | |
2378 | else | |
2379 | wait_for_completion(&wait); | |
2380 | ||
2381 | DPRINTK("EXIT\n"); | |
2382 | } | |
2383 | ||
1da177e4 | 2384 | /** |
0cba632b JG |
2385 | * ata_sg_clean - Unmap DMA memory associated with command |
2386 | * @qc: Command containing DMA memory to be released | |
2387 | * | |
2388 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
2389 | * |
2390 | * LOCKING: | |
0cba632b | 2391 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2392 | */ |
2393 | ||
2394 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
2395 | { | |
2396 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 2397 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 2398 | int dir = qc->dma_dir; |
cedc9a47 | 2399 | void *pad_buf = NULL; |
1da177e4 LT |
2400 | |
2401 | assert(qc->flags & ATA_QCFLAG_DMAMAP); | |
2402 | assert(sg != NULL); | |
2403 | ||
2404 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
2405 | assert(qc->n_elem == 1); | |
2406 | ||
2407 | DPRINTK("unmapping %u sg elements\n", qc->n_elem); | |
2408 | ||
cedc9a47 JG |
2409 | /* if we padded the buffer out to 32-bit bound, and data |
2410 | * xfer direction is from-device, we must copy from the | |
2411 | * pad buffer back into the supplied buffer | |
2412 | */ | |
2413 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
2414 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2415 | ||
2416 | if (qc->flags & ATA_QCFLAG_SG) { | |
1da177e4 | 2417 | dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir); |
cedc9a47 JG |
2418 | /* restore last sg */ |
2419 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
2420 | if (pad_buf) { | |
2421 | struct scatterlist *psg = &qc->pad_sgent; | |
2422 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
2423 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
2424 | kunmap_atomic(psg->page, KM_IRQ0); | |
2425 | } | |
2426 | } else { | |
1da177e4 LT |
2427 | dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]), |
2428 | sg_dma_len(&sg[0]), dir); | |
cedc9a47 JG |
2429 | /* restore sg */ |
2430 | sg->length += qc->pad_len; | |
2431 | if (pad_buf) | |
2432 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
2433 | pad_buf, qc->pad_len); | |
2434 | } | |
1da177e4 LT |
2435 | |
2436 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 2437 | qc->__sg = NULL; |
1da177e4 LT |
2438 | } |
2439 | ||
2440 | /** | |
2441 | * ata_fill_sg - Fill PCI IDE PRD table | |
2442 | * @qc: Metadata associated with taskfile to be transferred | |
2443 | * | |
780a87f7 JG |
2444 | * Fill PCI IDE PRD (scatter-gather) table with segments |
2445 | * associated with the current disk command. | |
2446 | * | |
1da177e4 | 2447 | * LOCKING: |
780a87f7 | 2448 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2449 | * |
2450 | */ | |
2451 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
2452 | { | |
1da177e4 | 2453 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
2454 | struct scatterlist *sg; |
2455 | unsigned int idx; | |
1da177e4 | 2456 | |
cedc9a47 | 2457 | assert(qc->__sg != NULL); |
1da177e4 LT |
2458 | assert(qc->n_elem > 0); |
2459 | ||
2460 | idx = 0; | |
cedc9a47 | 2461 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
2462 | u32 addr, offset; |
2463 | u32 sg_len, len; | |
2464 | ||
2465 | /* determine if physical DMA addr spans 64K boundary. | |
2466 | * Note h/w doesn't support 64-bit, so we unconditionally | |
2467 | * truncate dma_addr_t to u32. | |
2468 | */ | |
2469 | addr = (u32) sg_dma_address(sg); | |
2470 | sg_len = sg_dma_len(sg); | |
2471 | ||
2472 | while (sg_len) { | |
2473 | offset = addr & 0xffff; | |
2474 | len = sg_len; | |
2475 | if ((offset + sg_len) > 0x10000) | |
2476 | len = 0x10000 - offset; | |
2477 | ||
2478 | ap->prd[idx].addr = cpu_to_le32(addr); | |
2479 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
2480 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
2481 | ||
2482 | idx++; | |
2483 | sg_len -= len; | |
2484 | addr += len; | |
2485 | } | |
2486 | } | |
2487 | ||
2488 | if (idx) | |
2489 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
2490 | } | |
2491 | /** | |
2492 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
2493 | * @qc: Metadata associated with taskfile to check | |
2494 | * | |
780a87f7 JG |
2495 | * Allow low-level driver to filter ATA PACKET commands, returning |
2496 | * a status indicating whether or not it is OK to use DMA for the | |
2497 | * supplied PACKET command. | |
2498 | * | |
1da177e4 | 2499 | * LOCKING: |
0cba632b JG |
2500 | * spin_lock_irqsave(host_set lock) |
2501 | * | |
1da177e4 LT |
2502 | * RETURNS: 0 when ATAPI DMA can be used |
2503 | * nonzero otherwise | |
2504 | */ | |
2505 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
2506 | { | |
2507 | struct ata_port *ap = qc->ap; | |
2508 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
2509 | ||
2510 | if (ap->ops->check_atapi_dma) | |
2511 | rc = ap->ops->check_atapi_dma(qc); | |
2512 | ||
2513 | return rc; | |
2514 | } | |
2515 | /** | |
2516 | * ata_qc_prep - Prepare taskfile for submission | |
2517 | * @qc: Metadata associated with taskfile to be prepared | |
2518 | * | |
780a87f7 JG |
2519 | * Prepare ATA taskfile for submission. |
2520 | * | |
1da177e4 LT |
2521 | * LOCKING: |
2522 | * spin_lock_irqsave(host_set lock) | |
2523 | */ | |
2524 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
2525 | { | |
2526 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
2527 | return; | |
2528 | ||
2529 | ata_fill_sg(qc); | |
2530 | } | |
2531 | ||
0cba632b JG |
2532 | /** |
2533 | * ata_sg_init_one - Associate command with memory buffer | |
2534 | * @qc: Command to be associated | |
2535 | * @buf: Memory buffer | |
2536 | * @buflen: Length of memory buffer, in bytes. | |
2537 | * | |
2538 | * Initialize the data-related elements of queued_cmd @qc | |
2539 | * to point to a single memory buffer, @buf of byte length @buflen. | |
2540 | * | |
2541 | * LOCKING: | |
2542 | * spin_lock_irqsave(host_set lock) | |
2543 | */ | |
2544 | ||
1da177e4 LT |
2545 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
2546 | { | |
2547 | struct scatterlist *sg; | |
2548 | ||
2549 | qc->flags |= ATA_QCFLAG_SINGLE; | |
2550 | ||
2551 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
cedc9a47 | 2552 | qc->__sg = &qc->sgent; |
1da177e4 | 2553 | qc->n_elem = 1; |
cedc9a47 | 2554 | qc->orig_n_elem = 1; |
1da177e4 LT |
2555 | qc->buf_virt = buf; |
2556 | ||
cedc9a47 | 2557 | sg = qc->__sg; |
f0612bbc | 2558 | sg_init_one(sg, buf, buflen); |
1da177e4 LT |
2559 | } |
2560 | ||
0cba632b JG |
2561 | /** |
2562 | * ata_sg_init - Associate command with scatter-gather table. | |
2563 | * @qc: Command to be associated | |
2564 | * @sg: Scatter-gather table. | |
2565 | * @n_elem: Number of elements in s/g table. | |
2566 | * | |
2567 | * Initialize the data-related elements of queued_cmd @qc | |
2568 | * to point to a scatter-gather table @sg, containing @n_elem | |
2569 | * elements. | |
2570 | * | |
2571 | * LOCKING: | |
2572 | * spin_lock_irqsave(host_set lock) | |
2573 | */ | |
2574 | ||
1da177e4 LT |
2575 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
2576 | unsigned int n_elem) | |
2577 | { | |
2578 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 2579 | qc->__sg = sg; |
1da177e4 | 2580 | qc->n_elem = n_elem; |
cedc9a47 | 2581 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
2582 | } |
2583 | ||
2584 | /** | |
0cba632b JG |
2585 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
2586 | * @qc: Command with memory buffer to be mapped. | |
2587 | * | |
2588 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
2589 | * |
2590 | * LOCKING: | |
2591 | * spin_lock_irqsave(host_set lock) | |
2592 | * | |
2593 | * RETURNS: | |
0cba632b | 2594 | * Zero on success, negative on error. |
1da177e4 LT |
2595 | */ |
2596 | ||
2597 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
2598 | { | |
2599 | struct ata_port *ap = qc->ap; | |
2600 | int dir = qc->dma_dir; | |
cedc9a47 | 2601 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
2602 | dma_addr_t dma_address; |
2603 | ||
cedc9a47 JG |
2604 | /* we must lengthen transfers to end on a 32-bit boundary */ |
2605 | qc->pad_len = sg->length & 3; | |
2606 | if (qc->pad_len) { | |
2607 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2608 | struct scatterlist *psg = &qc->pad_sgent; | |
2609 | ||
2610 | assert(qc->dev->class == ATA_DEV_ATAPI); | |
2611 | ||
2612 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
2613 | ||
2614 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
2615 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
2616 | qc->pad_len); | |
2617 | ||
2618 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
2619 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
2620 | /* trim sg */ | |
2621 | sg->length -= qc->pad_len; | |
2622 | ||
2623 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
2624 | sg->length, qc->pad_len); | |
2625 | } | |
2626 | ||
1da177e4 | 2627 | dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt, |
32529e01 | 2628 | sg->length, dir); |
537a95d9 TH |
2629 | if (dma_mapping_error(dma_address)) { |
2630 | /* restore sg */ | |
2631 | sg->length += qc->pad_len; | |
1da177e4 | 2632 | return -1; |
537a95d9 | 2633 | } |
1da177e4 LT |
2634 | |
2635 | sg_dma_address(sg) = dma_address; | |
32529e01 | 2636 | sg_dma_len(sg) = sg->length; |
1da177e4 LT |
2637 | |
2638 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), | |
2639 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2640 | ||
2641 | return 0; | |
2642 | } | |
2643 | ||
2644 | /** | |
0cba632b JG |
2645 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
2646 | * @qc: Command with scatter-gather table to be mapped. | |
2647 | * | |
2648 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
2649 | * |
2650 | * LOCKING: | |
2651 | * spin_lock_irqsave(host_set lock) | |
2652 | * | |
2653 | * RETURNS: | |
0cba632b | 2654 | * Zero on success, negative on error. |
1da177e4 LT |
2655 | * |
2656 | */ | |
2657 | ||
2658 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
2659 | { | |
2660 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
2661 | struct scatterlist *sg = qc->__sg; |
2662 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
1da177e4 LT |
2663 | int n_elem, dir; |
2664 | ||
2665 | VPRINTK("ENTER, ata%u\n", ap->id); | |
2666 | assert(qc->flags & ATA_QCFLAG_SG); | |
2667 | ||
cedc9a47 JG |
2668 | /* we must lengthen transfers to end on a 32-bit boundary */ |
2669 | qc->pad_len = lsg->length & 3; | |
2670 | if (qc->pad_len) { | |
2671 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2672 | struct scatterlist *psg = &qc->pad_sgent; | |
2673 | unsigned int offset; | |
2674 | ||
2675 | assert(qc->dev->class == ATA_DEV_ATAPI); | |
2676 | ||
2677 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
2678 | ||
2679 | /* | |
2680 | * psg->page/offset are used to copy to-be-written | |
2681 | * data in this function or read data in ata_sg_clean. | |
2682 | */ | |
2683 | offset = lsg->offset + lsg->length - qc->pad_len; | |
2684 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
2685 | psg->offset = offset_in_page(offset); | |
2686 | ||
2687 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
2688 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
2689 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
2690 | kunmap_atomic(psg->page, KM_IRQ0); | |
2691 | } | |
2692 | ||
2693 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
2694 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
2695 | /* trim last sg */ | |
2696 | lsg->length -= qc->pad_len; | |
2697 | ||
2698 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
2699 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
2700 | } | |
2701 | ||
1da177e4 LT |
2702 | dir = qc->dma_dir; |
2703 | n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
537a95d9 TH |
2704 | if (n_elem < 1) { |
2705 | /* restore last sg */ | |
2706 | lsg->length += qc->pad_len; | |
1da177e4 | 2707 | return -1; |
537a95d9 | 2708 | } |
1da177e4 LT |
2709 | |
2710 | DPRINTK("%d sg elements mapped\n", n_elem); | |
2711 | ||
2712 | qc->n_elem = n_elem; | |
2713 | ||
2714 | return 0; | |
2715 | } | |
2716 | ||
40e8c82c TH |
2717 | /** |
2718 | * ata_poll_qc_complete - turn irq back on and finish qc | |
2719 | * @qc: Command to complete | |
8e8b77dd | 2720 | * @err_mask: ATA status register content |
40e8c82c TH |
2721 | * |
2722 | * LOCKING: | |
2723 | * None. (grabs host lock) | |
2724 | */ | |
2725 | ||
a7dac447 | 2726 | void ata_poll_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask) |
40e8c82c TH |
2727 | { |
2728 | struct ata_port *ap = qc->ap; | |
b8f6153e | 2729 | unsigned long flags; |
40e8c82c | 2730 | |
b8f6153e | 2731 | spin_lock_irqsave(&ap->host_set->lock, flags); |
40e8c82c | 2732 | ata_irq_on(ap); |
a7dac447 | 2733 | ata_qc_complete(qc, err_mask); |
b8f6153e | 2734 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
40e8c82c TH |
2735 | } |
2736 | ||
1da177e4 LT |
2737 | /** |
2738 | * ata_pio_poll - | |
6f0ef4fa | 2739 | * @ap: the target ata_port |
1da177e4 LT |
2740 | * |
2741 | * LOCKING: | |
0cba632b | 2742 | * None. (executing in kernel thread context) |
1da177e4 LT |
2743 | * |
2744 | * RETURNS: | |
6f0ef4fa | 2745 | * timeout value to use |
1da177e4 LT |
2746 | */ |
2747 | ||
2748 | static unsigned long ata_pio_poll(struct ata_port *ap) | |
2749 | { | |
2750 | u8 status; | |
14be71f4 AL |
2751 | unsigned int poll_state = HSM_ST_UNKNOWN; |
2752 | unsigned int reg_state = HSM_ST_UNKNOWN; | |
2753 | const unsigned int tmout_state = HSM_ST_TMOUT; | |
2754 | ||
2755 | switch (ap->hsm_task_state) { | |
2756 | case HSM_ST: | |
2757 | case HSM_ST_POLL: | |
2758 | poll_state = HSM_ST_POLL; | |
2759 | reg_state = HSM_ST; | |
1da177e4 | 2760 | break; |
14be71f4 AL |
2761 | case HSM_ST_LAST: |
2762 | case HSM_ST_LAST_POLL: | |
2763 | poll_state = HSM_ST_LAST_POLL; | |
2764 | reg_state = HSM_ST_LAST; | |
1da177e4 LT |
2765 | break; |
2766 | default: | |
2767 | BUG(); | |
2768 | break; | |
2769 | } | |
2770 | ||
2771 | status = ata_chk_status(ap); | |
2772 | if (status & ATA_BUSY) { | |
2773 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
14be71f4 | 2774 | ap->hsm_task_state = tmout_state; |
1da177e4 LT |
2775 | return 0; |
2776 | } | |
14be71f4 | 2777 | ap->hsm_task_state = poll_state; |
1da177e4 LT |
2778 | return ATA_SHORT_PAUSE; |
2779 | } | |
2780 | ||
14be71f4 | 2781 | ap->hsm_task_state = reg_state; |
1da177e4 LT |
2782 | return 0; |
2783 | } | |
2784 | ||
2785 | /** | |
6f0ef4fa RD |
2786 | * ata_pio_complete - check if drive is busy or idle |
2787 | * @ap: the target ata_port | |
1da177e4 LT |
2788 | * |
2789 | * LOCKING: | |
0cba632b | 2790 | * None. (executing in kernel thread context) |
7fb6ec28 JG |
2791 | * |
2792 | * RETURNS: | |
fbcdd80b AL |
2793 | * Zero if qc completed. |
2794 | * Non-zero if has next. | |
1da177e4 LT |
2795 | */ |
2796 | ||
7fb6ec28 | 2797 | static int ata_pio_complete (struct ata_port *ap) |
1da177e4 LT |
2798 | { |
2799 | struct ata_queued_cmd *qc; | |
2800 | u8 drv_stat; | |
2801 | ||
2802 | /* | |
31433ea3 AC |
2803 | * This is purely heuristic. This is a fast path. Sometimes when |
2804 | * we enter, BSY will be cleared in a chk-status or two. If not, | |
2805 | * the drive is probably seeking or something. Snooze for a couple | |
2806 | * msecs, then chk-status again. If still busy, fall back to | |
14be71f4 | 2807 | * HSM_ST_POLL state. |
1da177e4 LT |
2808 | */ |
2809 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2810 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
2811 | msleep(2); | |
2812 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2813 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
14be71f4 | 2814 | ap->hsm_task_state = HSM_ST_LAST_POLL; |
1da177e4 | 2815 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
fbcdd80b | 2816 | return 1; |
1da177e4 LT |
2817 | } |
2818 | } | |
2819 | ||
2820 | drv_stat = ata_wait_idle(ap); | |
2821 | if (!ata_ok(drv_stat)) { | |
14be71f4 | 2822 | ap->hsm_task_state = HSM_ST_ERR; |
fbcdd80b | 2823 | return 1; |
1da177e4 LT |
2824 | } |
2825 | ||
2826 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2827 | assert(qc != NULL); | |
2828 | ||
14be71f4 | 2829 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 2830 | |
a7dac447 | 2831 | ata_poll_qc_complete(qc, 0); |
7fb6ec28 JG |
2832 | |
2833 | /* another command may start at this point */ | |
2834 | ||
fbcdd80b | 2835 | return 0; |
1da177e4 LT |
2836 | } |
2837 | ||
0baab86b EF |
2838 | |
2839 | /** | |
6f0ef4fa | 2840 | * swap_buf_le16 - swap halves of 16-words in place |
0baab86b EF |
2841 | * @buf: Buffer to swap |
2842 | * @buf_words: Number of 16-bit words in buffer. | |
2843 | * | |
2844 | * Swap halves of 16-bit words if needed to convert from | |
2845 | * little-endian byte order to native cpu byte order, or | |
2846 | * vice-versa. | |
2847 | * | |
2848 | * LOCKING: | |
6f0ef4fa | 2849 | * Inherited from caller. |
0baab86b | 2850 | */ |
1da177e4 LT |
2851 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
2852 | { | |
2853 | #ifdef __BIG_ENDIAN | |
2854 | unsigned int i; | |
2855 | ||
2856 | for (i = 0; i < buf_words; i++) | |
2857 | buf[i] = le16_to_cpu(buf[i]); | |
2858 | #endif /* __BIG_ENDIAN */ | |
2859 | } | |
2860 | ||
6ae4cfb5 AL |
2861 | /** |
2862 | * ata_mmio_data_xfer - Transfer data by MMIO | |
2863 | * @ap: port to read/write | |
2864 | * @buf: data buffer | |
2865 | * @buflen: buffer length | |
344babaa | 2866 | * @write_data: read/write |
6ae4cfb5 AL |
2867 | * |
2868 | * Transfer data from/to the device data register by MMIO. | |
2869 | * | |
2870 | * LOCKING: | |
2871 | * Inherited from caller. | |
6ae4cfb5 AL |
2872 | */ |
2873 | ||
1da177e4 LT |
2874 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2875 | unsigned int buflen, int write_data) | |
2876 | { | |
2877 | unsigned int i; | |
2878 | unsigned int words = buflen >> 1; | |
2879 | u16 *buf16 = (u16 *) buf; | |
2880 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
2881 | ||
6ae4cfb5 | 2882 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
2883 | if (write_data) { |
2884 | for (i = 0; i < words; i++) | |
2885 | writew(le16_to_cpu(buf16[i]), mmio); | |
2886 | } else { | |
2887 | for (i = 0; i < words; i++) | |
2888 | buf16[i] = cpu_to_le16(readw(mmio)); | |
2889 | } | |
6ae4cfb5 AL |
2890 | |
2891 | /* Transfer trailing 1 byte, if any. */ | |
2892 | if (unlikely(buflen & 0x01)) { | |
2893 | u16 align_buf[1] = { 0 }; | |
2894 | unsigned char *trailing_buf = buf + buflen - 1; | |
2895 | ||
2896 | if (write_data) { | |
2897 | memcpy(align_buf, trailing_buf, 1); | |
2898 | writew(le16_to_cpu(align_buf[0]), mmio); | |
2899 | } else { | |
2900 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
2901 | memcpy(trailing_buf, align_buf, 1); | |
2902 | } | |
2903 | } | |
1da177e4 LT |
2904 | } |
2905 | ||
6ae4cfb5 AL |
2906 | /** |
2907 | * ata_pio_data_xfer - Transfer data by PIO | |
2908 | * @ap: port to read/write | |
2909 | * @buf: data buffer | |
2910 | * @buflen: buffer length | |
344babaa | 2911 | * @write_data: read/write |
6ae4cfb5 AL |
2912 | * |
2913 | * Transfer data from/to the device data register by PIO. | |
2914 | * | |
2915 | * LOCKING: | |
2916 | * Inherited from caller. | |
6ae4cfb5 AL |
2917 | */ |
2918 | ||
1da177e4 LT |
2919 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2920 | unsigned int buflen, int write_data) | |
2921 | { | |
6ae4cfb5 | 2922 | unsigned int words = buflen >> 1; |
1da177e4 | 2923 | |
6ae4cfb5 | 2924 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 2925 | if (write_data) |
6ae4cfb5 | 2926 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 2927 | else |
6ae4cfb5 AL |
2928 | insw(ap->ioaddr.data_addr, buf, words); |
2929 | ||
2930 | /* Transfer trailing 1 byte, if any. */ | |
2931 | if (unlikely(buflen & 0x01)) { | |
2932 | u16 align_buf[1] = { 0 }; | |
2933 | unsigned char *trailing_buf = buf + buflen - 1; | |
2934 | ||
2935 | if (write_data) { | |
2936 | memcpy(align_buf, trailing_buf, 1); | |
2937 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
2938 | } else { | |
2939 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
2940 | memcpy(trailing_buf, align_buf, 1); | |
2941 | } | |
2942 | } | |
1da177e4 LT |
2943 | } |
2944 | ||
6ae4cfb5 AL |
2945 | /** |
2946 | * ata_data_xfer - Transfer data from/to the data register. | |
2947 | * @ap: port to read/write | |
2948 | * @buf: data buffer | |
2949 | * @buflen: buffer length | |
2950 | * @do_write: read/write | |
2951 | * | |
2952 | * Transfer data from/to the device data register. | |
2953 | * | |
2954 | * LOCKING: | |
2955 | * Inherited from caller. | |
6ae4cfb5 AL |
2956 | */ |
2957 | ||
1da177e4 LT |
2958 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
2959 | unsigned int buflen, int do_write) | |
2960 | { | |
2961 | if (ap->flags & ATA_FLAG_MMIO) | |
2962 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
2963 | else | |
2964 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
2965 | } | |
2966 | ||
6ae4cfb5 AL |
2967 | /** |
2968 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
2969 | * @qc: Command on going | |
2970 | * | |
2971 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
2972 | * | |
2973 | * LOCKING: | |
2974 | * Inherited from caller. | |
2975 | */ | |
2976 | ||
1da177e4 LT |
2977 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
2978 | { | |
2979 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 2980 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
2981 | struct ata_port *ap = qc->ap; |
2982 | struct page *page; | |
2983 | unsigned int offset; | |
2984 | unsigned char *buf; | |
2985 | ||
2986 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 2987 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
2988 | |
2989 | page = sg[qc->cursg].page; | |
2990 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
2991 | ||
2992 | /* get the current page and offset */ | |
2993 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2994 | offset %= PAGE_SIZE; | |
2995 | ||
1da177e4 LT |
2996 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
2997 | ||
91b8b313 AL |
2998 | if (PageHighMem(page)) { |
2999 | unsigned long flags; | |
3000 | ||
3001 | local_irq_save(flags); | |
3002 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 3003 | |
91b8b313 AL |
3004 | /* do the actual data transfer */ |
3005 | ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write); | |
1da177e4 | 3006 | |
91b8b313 AL |
3007 | kunmap_atomic(buf, KM_IRQ0); |
3008 | local_irq_restore(flags); | |
3009 | } else { | |
3010 | buf = page_address(page); | |
3011 | ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write); | |
3012 | } | |
7282aa4b AL |
3013 | |
3014 | qc->cursect++; | |
3015 | qc->cursg_ofs++; | |
3016 | ||
3017 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { | |
3018 | qc->cursg++; | |
3019 | qc->cursg_ofs = 0; | |
3020 | } | |
1da177e4 LT |
3021 | } |
3022 | ||
c71c1857 AL |
3023 | /** |
3024 | * atapi_send_cdb - Write CDB bytes to hardware | |
3025 | * @ap: Port to which ATAPI device is attached. | |
3026 | * @qc: Taskfile currently active | |
3027 | * | |
3028 | * When device has indicated its readiness to accept | |
3029 | * a CDB, this function is called. Send the CDB. | |
3030 | * | |
3031 | * LOCKING: | |
3032 | * caller. | |
3033 | */ | |
3034 | ||
3035 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
3036 | { | |
3037 | /* send SCSI cdb */ | |
3038 | DPRINTK("send cdb\n"); | |
3039 | assert(ap->cdb_len >= 12); | |
3040 | ||
3041 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
3042 | ata_altstatus(ap); /* flush */ | |
3043 | ||
3044 | switch (qc->tf.protocol) { | |
3045 | case ATA_PROT_ATAPI: | |
3046 | ap->hsm_task_state = HSM_ST; | |
3047 | break; | |
3048 | case ATA_PROT_ATAPI_NODATA: | |
3049 | ap->hsm_task_state = HSM_ST_LAST; | |
3050 | break; | |
3051 | case ATA_PROT_ATAPI_DMA: | |
3052 | ap->hsm_task_state = HSM_ST_LAST; | |
3053 | /* initiate bmdma */ | |
3054 | ap->ops->bmdma_start(qc); | |
3055 | break; | |
3056 | } | |
3057 | } | |
3058 | ||
3059 | /** | |
e27486db AL |
3060 | * ata_pio_first_block - Write first data block to hardware |
3061 | * @ap: Port to which ATA/ATAPI device is attached. | |
c71c1857 AL |
3062 | * |
3063 | * When device has indicated its readiness to accept | |
3064 | * the data, this function sends out the CDB or | |
3065 | * the first data block by PIO. | |
3066 | * After this, | |
3067 | * - If polling, ata_pio_task() handles the rest. | |
3068 | * - Otherwise, interrupt handler takes over. | |
3069 | * | |
3070 | * LOCKING: | |
3071 | * Kernel thread context (may sleep) | |
fbcdd80b AL |
3072 | * |
3073 | * RETURNS: | |
3074 | * Zero if irq handler takes over | |
3075 | * Non-zero if has next (polling). | |
c71c1857 AL |
3076 | */ |
3077 | ||
fbcdd80b | 3078 | static int ata_pio_first_block(struct ata_port *ap) |
c71c1857 | 3079 | { |
c71c1857 AL |
3080 | struct ata_queued_cmd *qc; |
3081 | u8 status; | |
3082 | unsigned long flags; | |
fbcdd80b | 3083 | int has_next; |
c71c1857 AL |
3084 | |
3085 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3086 | assert(qc != NULL); | |
3087 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3088 | ||
fbcdd80b AL |
3089 | /* if polling, we will stay in the work queue after sending the data. |
3090 | * otherwise, interrupt handler takes over after sending the data. | |
3091 | */ | |
3092 | has_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
3093 | ||
c71c1857 AL |
3094 | /* sleep-wait for BSY to clear */ |
3095 | DPRINTK("busy wait\n"); | |
fbcdd80b AL |
3096 | if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) { |
3097 | ap->hsm_task_state = HSM_ST_TMOUT; | |
c71c1857 | 3098 | goto err_out; |
fbcdd80b | 3099 | } |
c71c1857 AL |
3100 | |
3101 | /* make sure DRQ is set */ | |
3102 | status = ata_chk_status(ap); | |
fbcdd80b AL |
3103 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) { |
3104 | /* device status error */ | |
3105 | ap->hsm_task_state = HSM_ST_ERR; | |
c71c1857 | 3106 | goto err_out; |
fbcdd80b | 3107 | } |
c71c1857 AL |
3108 | |
3109 | /* Send the CDB (atapi) or the first data block (ata pio out). | |
3110 | * During the state transition, interrupt handler shouldn't | |
3111 | * be invoked before the data transfer is complete and | |
3112 | * hsm_task_state is changed. Hence, the following locking. | |
3113 | */ | |
3114 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
3115 | ||
3116 | if (qc->tf.protocol == ATA_PROT_PIO) { | |
3117 | /* PIO data out protocol. | |
3118 | * send first data block. | |
3119 | */ | |
3120 | ||
3121 | /* ata_pio_sector() might change the state to HSM_ST_LAST. | |
3122 | * so, the state is changed here before ata_pio_sector(). | |
3123 | */ | |
3124 | ap->hsm_task_state = HSM_ST; | |
3125 | ata_pio_sector(qc); | |
3126 | ata_altstatus(ap); /* flush */ | |
3127 | } else | |
3128 | /* send CDB */ | |
3129 | atapi_send_cdb(ap, qc); | |
3130 | ||
fbcdd80b AL |
3131 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
3132 | ||
c71c1857 AL |
3133 | /* if polling, ata_pio_task() handles the rest. |
3134 | * otherwise, interrupt handler takes over from here. | |
3135 | */ | |
fbcdd80b | 3136 | return has_next; |
c71c1857 AL |
3137 | |
3138 | err_out: | |
fbcdd80b | 3139 | return 1; /* has next */ |
c71c1857 AL |
3140 | } |
3141 | ||
6ae4cfb5 AL |
3142 | /** |
3143 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3144 | * @qc: Command on going | |
3145 | * @bytes: number of bytes | |
3146 | * | |
3147 | * Transfer Transfer data from/to the ATAPI device. | |
3148 | * | |
3149 | * LOCKING: | |
3150 | * Inherited from caller. | |
3151 | * | |
3152 | */ | |
3153 | ||
1da177e4 LT |
3154 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
3155 | { | |
3156 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3157 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3158 | struct ata_port *ap = qc->ap; |
3159 | struct page *page; | |
3160 | unsigned char *buf; | |
3161 | unsigned int offset, count; | |
3162 | ||
563a6e1f | 3163 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 3164 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3165 | |
3166 | next_sg: | |
563a6e1f | 3167 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 3168 | /* |
563a6e1f AL |
3169 | * The end of qc->sg is reached and the device expects |
3170 | * more data to transfer. In order not to overrun qc->sg | |
3171 | * and fulfill length specified in the byte count register, | |
3172 | * - for read case, discard trailing data from the device | |
3173 | * - for write case, padding zero data to the device | |
3174 | */ | |
3175 | u16 pad_buf[1] = { 0 }; | |
3176 | unsigned int words = bytes >> 1; | |
3177 | unsigned int i; | |
3178 | ||
3179 | if (words) /* warning if bytes > 1 */ | |
7fb6ec28 | 3180 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", |
563a6e1f AL |
3181 | ap->id, bytes); |
3182 | ||
3183 | for (i = 0; i < words; i++) | |
3184 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | |
3185 | ||
14be71f4 | 3186 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
3187 | return; |
3188 | } | |
3189 | ||
cedc9a47 | 3190 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 3191 | |
1da177e4 LT |
3192 | page = sg->page; |
3193 | offset = sg->offset + qc->cursg_ofs; | |
3194 | ||
3195 | /* get the current page and offset */ | |
3196 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3197 | offset %= PAGE_SIZE; | |
3198 | ||
6952df03 | 3199 | /* don't overrun current sg */ |
32529e01 | 3200 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
3201 | |
3202 | /* don't cross page boundaries */ | |
3203 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
3204 | ||
7282aa4b AL |
3205 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
3206 | ||
91b8b313 AL |
3207 | if (PageHighMem(page)) { |
3208 | unsigned long flags; | |
3209 | ||
3210 | local_irq_save(flags); | |
3211 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 3212 | |
91b8b313 AL |
3213 | /* do the actual data transfer */ |
3214 | ata_data_xfer(ap, buf + offset, count, do_write); | |
7282aa4b | 3215 | |
91b8b313 AL |
3216 | kunmap_atomic(buf, KM_IRQ0); |
3217 | local_irq_restore(flags); | |
3218 | } else { | |
3219 | buf = page_address(page); | |
3220 | ata_data_xfer(ap, buf + offset, count, do_write); | |
3221 | } | |
7282aa4b | 3222 | |
1da177e4 LT |
3223 | bytes -= count; |
3224 | qc->curbytes += count; | |
3225 | qc->cursg_ofs += count; | |
3226 | ||
32529e01 | 3227 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
3228 | qc->cursg++; |
3229 | qc->cursg_ofs = 0; | |
3230 | } | |
3231 | ||
563a6e1f | 3232 | if (bytes) |
1da177e4 | 3233 | goto next_sg; |
1da177e4 LT |
3234 | } |
3235 | ||
6ae4cfb5 AL |
3236 | /** |
3237 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3238 | * @qc: Command on going | |
3239 | * | |
3240 | * Transfer Transfer data from/to the ATAPI device. | |
3241 | * | |
3242 | * LOCKING: | |
3243 | * Inherited from caller. | |
6ae4cfb5 AL |
3244 | */ |
3245 | ||
1da177e4 LT |
3246 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
3247 | { | |
3248 | struct ata_port *ap = qc->ap; | |
3249 | struct ata_device *dev = qc->dev; | |
3250 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
3251 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
3252 | ||
3253 | ap->ops->tf_read(ap, &qc->tf); | |
3254 | ireason = qc->tf.nsect; | |
3255 | bc_lo = qc->tf.lbam; | |
3256 | bc_hi = qc->tf.lbah; | |
3257 | bytes = (bc_hi << 8) | bc_lo; | |
3258 | ||
3259 | /* shall be cleared to zero, indicating xfer of data */ | |
3260 | if (ireason & (1 << 0)) | |
3261 | goto err_out; | |
3262 | ||
3263 | /* make sure transfer direction matches expected */ | |
3264 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
3265 | if (do_write != i_write) | |
3266 | goto err_out; | |
3267 | ||
312f7da2 AL |
3268 | VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes); |
3269 | ||
1da177e4 LT |
3270 | __atapi_pio_bytes(qc, bytes); |
3271 | ||
3272 | return; | |
3273 | ||
3274 | err_out: | |
3275 | printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", | |
3276 | ap->id, dev->devno); | |
14be71f4 | 3277 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3278 | } |
3279 | ||
3280 | /** | |
6f0ef4fa RD |
3281 | * ata_pio_block - start PIO on a block |
3282 | * @ap: the target ata_port | |
1da177e4 LT |
3283 | * |
3284 | * LOCKING: | |
0cba632b | 3285 | * None. (executing in kernel thread context) |
1da177e4 LT |
3286 | */ |
3287 | ||
3288 | static void ata_pio_block(struct ata_port *ap) | |
3289 | { | |
3290 | struct ata_queued_cmd *qc; | |
3291 | u8 status; | |
3292 | ||
3293 | /* | |
6f0ef4fa | 3294 | * This is purely heuristic. This is a fast path. |
1da177e4 LT |
3295 | * Sometimes when we enter, BSY will be cleared in |
3296 | * a chk-status or two. If not, the drive is probably seeking | |
3297 | * or something. Snooze for a couple msecs, then | |
3298 | * chk-status again. If still busy, fall back to | |
14be71f4 | 3299 | * HSM_ST_POLL state. |
1da177e4 LT |
3300 | */ |
3301 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
3302 | if (status & ATA_BUSY) { | |
3303 | msleep(2); | |
3304 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
3305 | if (status & ATA_BUSY) { | |
14be71f4 | 3306 | ap->hsm_task_state = HSM_ST_POLL; |
1da177e4 LT |
3307 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
3308 | return; | |
3309 | } | |
3310 | } | |
3311 | ||
3312 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3313 | assert(qc != NULL); | |
3314 | ||
3315 | if (is_atapi_taskfile(&qc->tf)) { | |
3316 | /* no more data to transfer or unsupported ATAPI command */ | |
3317 | if ((status & ATA_DRQ) == 0) { | |
14be71f4 | 3318 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3319 | return; |
3320 | } | |
3321 | ||
3322 | atapi_pio_bytes(qc); | |
3323 | } else { | |
3324 | /* handle BSY=0, DRQ=0 as error */ | |
3325 | if ((status & ATA_DRQ) == 0) { | |
14be71f4 | 3326 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3327 | return; |
3328 | } | |
3329 | ||
3330 | ata_pio_sector(qc); | |
3331 | } | |
467b16d4 AL |
3332 | |
3333 | ata_altstatus(ap); /* flush */ | |
1da177e4 LT |
3334 | } |
3335 | ||
3336 | static void ata_pio_error(struct ata_port *ap) | |
3337 | { | |
3338 | struct ata_queued_cmd *qc; | |
a7dac447 JG |
3339 | |
3340 | printk(KERN_WARNING "ata%u: PIO error\n", ap->id); | |
1da177e4 LT |
3341 | |
3342 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3343 | assert(qc != NULL); | |
3344 | ||
14be71f4 | 3345 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 3346 | |
a7dac447 | 3347 | ata_poll_qc_complete(qc, AC_ERR_ATA_BUS); |
1da177e4 LT |
3348 | } |
3349 | ||
3350 | static void ata_pio_task(void *_data) | |
3351 | { | |
3352 | struct ata_port *ap = _data; | |
7fb6ec28 | 3353 | unsigned long timeout; |
fbcdd80b | 3354 | int has_next; |
7fb6ec28 JG |
3355 | |
3356 | fsm_start: | |
3357 | timeout = 0; | |
fbcdd80b | 3358 | has_next = 1; |
1da177e4 | 3359 | |
14be71f4 | 3360 | switch (ap->hsm_task_state) { |
e27486db | 3361 | case HSM_ST_FIRST: |
fbcdd80b AL |
3362 | has_next = ata_pio_first_block(ap); |
3363 | break; | |
e27486db | 3364 | |
14be71f4 | 3365 | case HSM_ST: |
1da177e4 LT |
3366 | ata_pio_block(ap); |
3367 | break; | |
3368 | ||
14be71f4 | 3369 | case HSM_ST_LAST: |
fbcdd80b | 3370 | has_next = ata_pio_complete(ap); |
1da177e4 LT |
3371 | break; |
3372 | ||
14be71f4 AL |
3373 | case HSM_ST_POLL: |
3374 | case HSM_ST_LAST_POLL: | |
1da177e4 LT |
3375 | timeout = ata_pio_poll(ap); |
3376 | break; | |
3377 | ||
14be71f4 AL |
3378 | case HSM_ST_TMOUT: |
3379 | case HSM_ST_ERR: | |
1da177e4 LT |
3380 | ata_pio_error(ap); |
3381 | return; | |
467b16d4 AL |
3382 | |
3383 | default: | |
3384 | BUG(); | |
3385 | return; | |
1da177e4 LT |
3386 | } |
3387 | ||
3388 | if (timeout) | |
7fb6ec28 | 3389 | queue_delayed_work(ata_wq, &ap->pio_task, timeout); |
fbcdd80b | 3390 | else if (has_next) |
7fb6ec28 | 3391 | goto fsm_start; |
1da177e4 LT |
3392 | } |
3393 | ||
1da177e4 LT |
3394 | /** |
3395 | * ata_qc_timeout - Handle timeout of queued command | |
3396 | * @qc: Command that timed out | |
3397 | * | |
3398 | * Some part of the kernel (currently, only the SCSI layer) | |
3399 | * has noticed that the active command on port @ap has not | |
3400 | * completed after a specified length of time. Handle this | |
3401 | * condition by disabling DMA (if necessary) and completing | |
3402 | * transactions, with error if necessary. | |
3403 | * | |
3404 | * This also handles the case of the "lost interrupt", where | |
3405 | * for some reason (possibly hardware bug, possibly driver bug) | |
3406 | * an interrupt was not delivered to the driver, even though the | |
3407 | * transaction completed successfully. | |
3408 | * | |
3409 | * LOCKING: | |
0cba632b | 3410 | * Inherited from SCSI layer (none, can sleep) |
1da177e4 LT |
3411 | */ |
3412 | ||
3413 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | |
3414 | { | |
3415 | struct ata_port *ap = qc->ap; | |
b8f6153e | 3416 | struct ata_host_set *host_set = ap->host_set; |
1da177e4 LT |
3417 | struct ata_device *dev = qc->dev; |
3418 | u8 host_stat = 0, drv_stat; | |
b8f6153e | 3419 | unsigned long flags; |
1da177e4 LT |
3420 | |
3421 | DPRINTK("ENTER\n"); | |
3422 | ||
3423 | /* FIXME: doesn't this conflict with timeout handling? */ | |
3424 | if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) { | |
3425 | struct scsi_cmnd *cmd = qc->scsicmd; | |
3426 | ||
3111b0d1 | 3427 | if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) { |
1da177e4 LT |
3428 | |
3429 | /* finish completing original command */ | |
b8f6153e | 3430 | spin_lock_irqsave(&host_set->lock, flags); |
1da177e4 | 3431 | __ata_qc_complete(qc); |
b8f6153e | 3432 | spin_unlock_irqrestore(&host_set->lock, flags); |
1da177e4 LT |
3433 | |
3434 | atapi_request_sense(ap, dev, cmd); | |
3435 | ||
3436 | cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16); | |
3437 | scsi_finish_command(cmd); | |
3438 | ||
3439 | goto out; | |
3440 | } | |
3441 | } | |
3442 | ||
b8f6153e JG |
3443 | spin_lock_irqsave(&host_set->lock, flags); |
3444 | ||
1da177e4 LT |
3445 | /* hack alert! We cannot use the supplied completion |
3446 | * function from inside the ->eh_strategy_handler() thread. | |
3447 | * libata is the only user of ->eh_strategy_handler() in | |
3448 | * any kernel, so the default scsi_done() assumes it is | |
3449 | * not being called from the SCSI EH. | |
3450 | */ | |
3451 | qc->scsidone = scsi_finish_command; | |
3452 | ||
3453 | switch (qc->tf.protocol) { | |
3454 | ||
3455 | case ATA_PROT_DMA: | |
3456 | case ATA_PROT_ATAPI_DMA: | |
3457 | host_stat = ap->ops->bmdma_status(ap); | |
3458 | ||
3459 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3460 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
3461 | |
3462 | /* fall through */ | |
3463 | ||
3464 | default: | |
3465 | ata_altstatus(ap); | |
3466 | drv_stat = ata_chk_status(ap); | |
3467 | ||
3468 | /* ack bmdma irq events */ | |
3469 | ap->ops->irq_clear(ap); | |
3470 | ||
3471 | printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n", | |
3472 | ap->id, qc->tf.command, drv_stat, host_stat); | |
3473 | ||
312f7da2 AL |
3474 | ap->hsm_task_state = HSM_ST_IDLE; |
3475 | ||
1da177e4 | 3476 | /* complete taskfile transaction */ |
a7dac447 | 3477 | ata_qc_complete(qc, ac_err_mask(drv_stat)); |
1da177e4 LT |
3478 | break; |
3479 | } | |
b8f6153e JG |
3480 | |
3481 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3482 | ||
1da177e4 LT |
3483 | out: |
3484 | DPRINTK("EXIT\n"); | |
3485 | } | |
3486 | ||
3487 | /** | |
3488 | * ata_eng_timeout - Handle timeout of queued command | |
3489 | * @ap: Port on which timed-out command is active | |
3490 | * | |
3491 | * Some part of the kernel (currently, only the SCSI layer) | |
3492 | * has noticed that the active command on port @ap has not | |
3493 | * completed after a specified length of time. Handle this | |
3494 | * condition by disabling DMA (if necessary) and completing | |
3495 | * transactions, with error if necessary. | |
3496 | * | |
3497 | * This also handles the case of the "lost interrupt", where | |
3498 | * for some reason (possibly hardware bug, possibly driver bug) | |
3499 | * an interrupt was not delivered to the driver, even though the | |
3500 | * transaction completed successfully. | |
3501 | * | |
3502 | * LOCKING: | |
3503 | * Inherited from SCSI layer (none, can sleep) | |
3504 | */ | |
3505 | ||
3506 | void ata_eng_timeout(struct ata_port *ap) | |
3507 | { | |
3508 | struct ata_queued_cmd *qc; | |
3509 | ||
3510 | DPRINTK("ENTER\n"); | |
3511 | ||
3512 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
e12669e7 JG |
3513 | if (qc) |
3514 | ata_qc_timeout(qc); | |
3515 | else { | |
1da177e4 LT |
3516 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", |
3517 | ap->id); | |
3518 | goto out; | |
3519 | } | |
3520 | ||
1da177e4 LT |
3521 | out: |
3522 | DPRINTK("EXIT\n"); | |
3523 | } | |
3524 | ||
3525 | /** | |
3526 | * ata_qc_new - Request an available ATA command, for queueing | |
3527 | * @ap: Port associated with device @dev | |
3528 | * @dev: Device from whom we request an available command structure | |
3529 | * | |
3530 | * LOCKING: | |
0cba632b | 3531 | * None. |
1da177e4 LT |
3532 | */ |
3533 | ||
3534 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
3535 | { | |
3536 | struct ata_queued_cmd *qc = NULL; | |
3537 | unsigned int i; | |
3538 | ||
3539 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
3540 | if (!test_and_set_bit(i, &ap->qactive)) { | |
3541 | qc = ata_qc_from_tag(ap, i); | |
3542 | break; | |
3543 | } | |
3544 | ||
3545 | if (qc) | |
3546 | qc->tag = i; | |
3547 | ||
3548 | return qc; | |
3549 | } | |
3550 | ||
3551 | /** | |
3552 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
3553 | * @ap: Port associated with device @dev | |
3554 | * @dev: Device from whom we request an available command structure | |
3555 | * | |
3556 | * LOCKING: | |
0cba632b | 3557 | * None. |
1da177e4 LT |
3558 | */ |
3559 | ||
3560 | struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | |
3561 | struct ata_device *dev) | |
3562 | { | |
3563 | struct ata_queued_cmd *qc; | |
3564 | ||
3565 | qc = ata_qc_new(ap); | |
3566 | if (qc) { | |
cedc9a47 | 3567 | qc->__sg = NULL; |
1da177e4 LT |
3568 | qc->flags = 0; |
3569 | qc->scsicmd = NULL; | |
3570 | qc->ap = ap; | |
3571 | qc->dev = dev; | |
3572 | qc->cursect = qc->cursg = qc->cursg_ofs = 0; | |
3573 | qc->nsect = 0; | |
3574 | qc->nbytes = qc->curbytes = 0; | |
3575 | ||
3576 | ata_tf_init(ap, &qc->tf, dev->devno); | |
1da177e4 LT |
3577 | } |
3578 | ||
3579 | return qc; | |
3580 | } | |
3581 | ||
a7dac447 | 3582 | int ata_qc_complete_noop(struct ata_queued_cmd *qc, unsigned int err_mask) |
1da177e4 LT |
3583 | { |
3584 | return 0; | |
3585 | } | |
3586 | ||
3587 | static void __ata_qc_complete(struct ata_queued_cmd *qc) | |
3588 | { | |
3589 | struct ata_port *ap = qc->ap; | |
3590 | unsigned int tag, do_clear = 0; | |
3591 | ||
3592 | qc->flags = 0; | |
3593 | tag = qc->tag; | |
3594 | if (likely(ata_tag_valid(tag))) { | |
3595 | if (tag == ap->active_tag) | |
3596 | ap->active_tag = ATA_TAG_POISON; | |
3597 | qc->tag = ATA_TAG_POISON; | |
3598 | do_clear = 1; | |
3599 | } | |
3600 | ||
3601 | if (qc->waiting) { | |
3602 | struct completion *waiting = qc->waiting; | |
3603 | qc->waiting = NULL; | |
3604 | complete(waiting); | |
3605 | } | |
3606 | ||
3607 | if (likely(do_clear)) | |
3608 | clear_bit(tag, &ap->qactive); | |
3609 | } | |
3610 | ||
3611 | /** | |
3612 | * ata_qc_free - free unused ata_queued_cmd | |
3613 | * @qc: Command to complete | |
3614 | * | |
3615 | * Designed to free unused ata_queued_cmd object | |
3616 | * in case something prevents using it. | |
3617 | * | |
3618 | * LOCKING: | |
0cba632b | 3619 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3620 | */ |
3621 | void ata_qc_free(struct ata_queued_cmd *qc) | |
3622 | { | |
3623 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3624 | assert(qc->waiting == NULL); /* nothing should be waiting */ | |
3625 | ||
3626 | __ata_qc_complete(qc); | |
3627 | } | |
3628 | ||
3629 | /** | |
3630 | * ata_qc_complete - Complete an active ATA command | |
3631 | * @qc: Command to complete | |
8e8b77dd | 3632 | * @err_mask: ATA Status register contents |
0cba632b JG |
3633 | * |
3634 | * Indicate to the mid and upper layers that an ATA | |
3635 | * command has completed, with either an ok or not-ok status. | |
1da177e4 LT |
3636 | * |
3637 | * LOCKING: | |
0cba632b | 3638 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3639 | */ |
3640 | ||
a7dac447 | 3641 | void ata_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask) |
1da177e4 LT |
3642 | { |
3643 | int rc; | |
3644 | ||
3645 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3646 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3647 | ||
3648 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3649 | ata_sg_clean(qc); | |
3650 | ||
3f3791d3 AL |
3651 | /* atapi: mark qc as inactive to prevent the interrupt handler |
3652 | * from completing the command twice later, before the error handler | |
3653 | * is called. (when rc != 0 and atapi request sense is needed) | |
3654 | */ | |
3655 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
3656 | ||
1da177e4 | 3657 | /* call completion callback */ |
a7dac447 | 3658 | rc = qc->complete_fn(qc, err_mask); |
1da177e4 LT |
3659 | |
3660 | /* if callback indicates not to complete command (non-zero), | |
3661 | * return immediately | |
3662 | */ | |
3663 | if (rc != 0) | |
3664 | return; | |
3665 | ||
3666 | __ata_qc_complete(qc); | |
3667 | ||
3668 | VPRINTK("EXIT\n"); | |
3669 | } | |
3670 | ||
3671 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
3672 | { | |
3673 | struct ata_port *ap = qc->ap; | |
3674 | ||
3675 | switch (qc->tf.protocol) { | |
3676 | case ATA_PROT_DMA: | |
3677 | case ATA_PROT_ATAPI_DMA: | |
3678 | return 1; | |
3679 | ||
3680 | case ATA_PROT_ATAPI: | |
3681 | case ATA_PROT_PIO: | |
3682 | case ATA_PROT_PIO_MULT: | |
3683 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
3684 | return 1; | |
3685 | ||
3686 | /* fall through */ | |
3687 | ||
3688 | default: | |
3689 | return 0; | |
3690 | } | |
3691 | ||
3692 | /* never reached */ | |
3693 | } | |
3694 | ||
3695 | /** | |
3696 | * ata_qc_issue - issue taskfile to device | |
3697 | * @qc: command to issue to device | |
3698 | * | |
3699 | * Prepare an ATA command to submission to device. | |
3700 | * This includes mapping the data into a DMA-able | |
3701 | * area, filling in the S/G table, and finally | |
3702 | * writing the taskfile to hardware, starting the command. | |
3703 | * | |
3704 | * LOCKING: | |
3705 | * spin_lock_irqsave(host_set lock) | |
3706 | * | |
3707 | * RETURNS: | |
3708 | * Zero on success, negative on error. | |
3709 | */ | |
3710 | ||
3711 | int ata_qc_issue(struct ata_queued_cmd *qc) | |
3712 | { | |
3713 | struct ata_port *ap = qc->ap; | |
3714 | ||
3715 | if (ata_should_dma_map(qc)) { | |
3716 | if (qc->flags & ATA_QCFLAG_SG) { | |
3717 | if (ata_sg_setup(qc)) | |
3718 | goto err_out; | |
3719 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { | |
3720 | if (ata_sg_setup_one(qc)) | |
3721 | goto err_out; | |
3722 | } | |
3723 | } else { | |
3724 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
3725 | } | |
3726 | ||
3727 | ap->ops->qc_prep(qc); | |
3728 | ||
3729 | qc->ap->active_tag = qc->tag; | |
3730 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
3731 | ||
3732 | return ap->ops->qc_issue(qc); | |
3733 | ||
3734 | err_out: | |
3735 | return -1; | |
3736 | } | |
3737 | ||
0baab86b | 3738 | |
1da177e4 LT |
3739 | /** |
3740 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
3741 | * @qc: command to issue to device | |
3742 | * | |
3743 | * Using various libata functions and hooks, this function | |
3744 | * starts an ATA command. ATA commands are grouped into | |
3745 | * classes called "protocols", and issuing each type of protocol | |
3746 | * is slightly different. | |
3747 | * | |
0baab86b EF |
3748 | * May be used as the qc_issue() entry in ata_port_operations. |
3749 | * | |
1da177e4 LT |
3750 | * LOCKING: |
3751 | * spin_lock_irqsave(host_set lock) | |
3752 | * | |
3753 | * RETURNS: | |
3754 | * Zero on success, negative on error. | |
3755 | */ | |
3756 | ||
3757 | int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |
3758 | { | |
3759 | struct ata_port *ap = qc->ap; | |
3760 | ||
e50362ec AL |
3761 | /* Use polling pio if the LLD doesn't handle |
3762 | * interrupt driven pio and atapi CDB interrupt. | |
3763 | */ | |
3764 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
3765 | switch (qc->tf.protocol) { | |
3766 | case ATA_PROT_PIO: | |
3767 | case ATA_PROT_ATAPI: | |
3768 | case ATA_PROT_ATAPI_NODATA: | |
3769 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
3770 | break; | |
3771 | case ATA_PROT_ATAPI_DMA: | |
3772 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
3773 | BUG(); | |
3774 | break; | |
3775 | default: | |
3776 | break; | |
3777 | } | |
3778 | } | |
3779 | ||
312f7da2 | 3780 | /* select the device */ |
1da177e4 LT |
3781 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
3782 | ||
312f7da2 | 3783 | /* start the command */ |
1da177e4 LT |
3784 | switch (qc->tf.protocol) { |
3785 | case ATA_PROT_NODATA: | |
312f7da2 AL |
3786 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
3787 | ata_qc_set_polling(qc); | |
3788 | ||
e5338254 | 3789 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
3790 | ap->hsm_task_state = HSM_ST_LAST; |
3791 | ||
3792 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
3793 | queue_work(ata_wq, &ap->pio_task); | |
3794 | ||
1da177e4 LT |
3795 | break; |
3796 | ||
3797 | case ATA_PROT_DMA: | |
312f7da2 AL |
3798 | assert(!(qc->tf.flags & ATA_TFLAG_POLLING)); |
3799 | ||
1da177e4 LT |
3800 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
3801 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3802 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 3803 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3804 | break; |
3805 | ||
312f7da2 AL |
3806 | case ATA_PROT_PIO: |
3807 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
3808 | ata_qc_set_polling(qc); | |
3809 | ||
e5338254 | 3810 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 | 3811 | |
54f00389 AL |
3812 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
3813 | /* PIO data out protocol */ | |
3814 | ap->hsm_task_state = HSM_ST_FIRST; | |
e27486db | 3815 | queue_work(ata_wq, &ap->pio_task); |
54f00389 AL |
3816 | |
3817 | /* always send first data block using | |
e27486db | 3818 | * the ata_pio_task() codepath. |
54f00389 | 3819 | */ |
312f7da2 | 3820 | } else { |
54f00389 AL |
3821 | /* PIO data in protocol */ |
3822 | ap->hsm_task_state = HSM_ST; | |
3823 | ||
3824 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
3825 | queue_work(ata_wq, &ap->pio_task); | |
3826 | ||
3827 | /* if polling, ata_pio_task() handles the rest. | |
3828 | * otherwise, interrupt handler takes over from here. | |
3829 | */ | |
312f7da2 AL |
3830 | } |
3831 | ||
1da177e4 LT |
3832 | break; |
3833 | ||
3834 | case ATA_PROT_ATAPI: | |
1da177e4 | 3835 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
3836 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
3837 | ata_qc_set_polling(qc); | |
3838 | ||
e5338254 | 3839 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
3840 | ap->hsm_task_state = HSM_ST_FIRST; |
3841 | ||
3842 | /* send cdb by polling if no cdb interrupt */ | |
3843 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
3844 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
e27486db | 3845 | queue_work(ata_wq, &ap->pio_task); |
1da177e4 LT |
3846 | break; |
3847 | ||
3848 | case ATA_PROT_ATAPI_DMA: | |
312f7da2 AL |
3849 | assert(!(qc->tf.flags & ATA_TFLAG_POLLING)); |
3850 | ||
1da177e4 LT |
3851 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
3852 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
3853 | ap->hsm_task_state = HSM_ST_FIRST; |
3854 | ||
3855 | /* send cdb by polling if no cdb interrupt */ | |
3856 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
e27486db | 3857 | queue_work(ata_wq, &ap->pio_task); |
1da177e4 LT |
3858 | break; |
3859 | ||
3860 | default: | |
3861 | WARN_ON(1); | |
3862 | return -1; | |
3863 | } | |
3864 | ||
3865 | return 0; | |
3866 | } | |
3867 | ||
3868 | /** | |
0baab86b | 3869 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction |
1da177e4 LT |
3870 | * @qc: Info associated with this ATA transaction. |
3871 | * | |
3872 | * LOCKING: | |
3873 | * spin_lock_irqsave(host_set lock) | |
3874 | */ | |
3875 | ||
3876 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |
3877 | { | |
3878 | struct ata_port *ap = qc->ap; | |
3879 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3880 | u8 dmactl; | |
3881 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3882 | ||
3883 | /* load PRD table addr. */ | |
3884 | mb(); /* make sure PRD table writes are visible to controller */ | |
3885 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); | |
3886 | ||
3887 | /* specify data direction, triple-check start bit is clear */ | |
3888 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3889 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3890 | if (!rw) | |
3891 | dmactl |= ATA_DMA_WR; | |
3892 | writeb(dmactl, mmio + ATA_DMA_CMD); | |
3893 | ||
3894 | /* issue r/w command */ | |
3895 | ap->ops->exec_command(ap, &qc->tf); | |
3896 | } | |
3897 | ||
3898 | /** | |
b73fc89f | 3899 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction |
1da177e4 LT |
3900 | * @qc: Info associated with this ATA transaction. |
3901 | * | |
3902 | * LOCKING: | |
3903 | * spin_lock_irqsave(host_set lock) | |
3904 | */ | |
3905 | ||
3906 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) | |
3907 | { | |
3908 | struct ata_port *ap = qc->ap; | |
3909 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3910 | u8 dmactl; | |
3911 | ||
3912 | /* start host DMA transaction */ | |
3913 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3914 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | |
3915 | ||
3916 | /* Strictly, one may wish to issue a readb() here, to | |
3917 | * flush the mmio write. However, control also passes | |
3918 | * to the hardware at this point, and it will interrupt | |
3919 | * us when we are to resume control. So, in effect, | |
3920 | * we don't care when the mmio write flushes. | |
3921 | * Further, a read of the DMA status register _immediately_ | |
3922 | * following the write may not be what certain flaky hardware | |
3923 | * is expected, so I think it is best to not add a readb() | |
3924 | * without first all the MMIO ATA cards/mobos. | |
3925 | * Or maybe I'm just being paranoid. | |
3926 | */ | |
3927 | } | |
3928 | ||
3929 | /** | |
3930 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) | |
3931 | * @qc: Info associated with this ATA transaction. | |
3932 | * | |
3933 | * LOCKING: | |
3934 | * spin_lock_irqsave(host_set lock) | |
3935 | */ | |
3936 | ||
3937 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) | |
3938 | { | |
3939 | struct ata_port *ap = qc->ap; | |
3940 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3941 | u8 dmactl; | |
3942 | ||
3943 | /* load PRD table addr. */ | |
3944 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); | |
3945 | ||
3946 | /* specify data direction, triple-check start bit is clear */ | |
3947 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3948 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3949 | if (!rw) | |
3950 | dmactl |= ATA_DMA_WR; | |
3951 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3952 | ||
3953 | /* issue r/w command */ | |
3954 | ap->ops->exec_command(ap, &qc->tf); | |
3955 | } | |
3956 | ||
3957 | /** | |
3958 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) | |
3959 | * @qc: Info associated with this ATA transaction. | |
3960 | * | |
3961 | * LOCKING: | |
3962 | * spin_lock_irqsave(host_set lock) | |
3963 | */ | |
3964 | ||
3965 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) | |
3966 | { | |
3967 | struct ata_port *ap = qc->ap; | |
3968 | u8 dmactl; | |
3969 | ||
3970 | /* start host DMA transaction */ | |
3971 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3972 | outb(dmactl | ATA_DMA_START, | |
3973 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3974 | } | |
3975 | ||
0baab86b EF |
3976 | |
3977 | /** | |
3978 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
3979 | * @qc: Info associated with this ATA transaction. | |
3980 | * | |
3981 | * Writes the ATA_DMA_START flag to the DMA command register. | |
3982 | * | |
3983 | * May be used as the bmdma_start() entry in ata_port_operations. | |
3984 | * | |
3985 | * LOCKING: | |
3986 | * spin_lock_irqsave(host_set lock) | |
3987 | */ | |
1da177e4 LT |
3988 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
3989 | { | |
3990 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3991 | ata_bmdma_start_mmio(qc); | |
3992 | else | |
3993 | ata_bmdma_start_pio(qc); | |
3994 | } | |
3995 | ||
0baab86b EF |
3996 | |
3997 | /** | |
3998 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction | |
3999 | * @qc: Info associated with this ATA transaction. | |
4000 | * | |
4001 | * Writes address of PRD table to device's PRD Table Address | |
4002 | * register, sets the DMA control register, and calls | |
4003 | * ops->exec_command() to start the transfer. | |
4004 | * | |
4005 | * May be used as the bmdma_setup() entry in ata_port_operations. | |
4006 | * | |
4007 | * LOCKING: | |
4008 | * spin_lock_irqsave(host_set lock) | |
4009 | */ | |
1da177e4 LT |
4010 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
4011 | { | |
4012 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
4013 | ata_bmdma_setup_mmio(qc); | |
4014 | else | |
4015 | ata_bmdma_setup_pio(qc); | |
4016 | } | |
4017 | ||
0baab86b EF |
4018 | |
4019 | /** | |
4020 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | |
decc6d0b | 4021 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
4022 | * |
4023 | * Clear interrupt and error flags in DMA status register. | |
4024 | * | |
4025 | * May be used as the irq_clear() entry in ata_port_operations. | |
4026 | * | |
4027 | * LOCKING: | |
4028 | * spin_lock_irqsave(host_set lock) | |
4029 | */ | |
4030 | ||
1da177e4 LT |
4031 | void ata_bmdma_irq_clear(struct ata_port *ap) |
4032 | { | |
4033 | if (ap->flags & ATA_FLAG_MMIO) { | |
4034 | void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; | |
4035 | writeb(readb(mmio), mmio); | |
4036 | } else { | |
4037 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; | |
4038 | outb(inb(addr), addr); | |
4039 | } | |
4040 | ||
4041 | } | |
4042 | ||
0baab86b EF |
4043 | |
4044 | /** | |
4045 | * ata_bmdma_status - Read PCI IDE BMDMA status | |
decc6d0b | 4046 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
4047 | * |
4048 | * Read and return BMDMA status register. | |
4049 | * | |
4050 | * May be used as the bmdma_status() entry in ata_port_operations. | |
4051 | * | |
4052 | * LOCKING: | |
4053 | * spin_lock_irqsave(host_set lock) | |
4054 | */ | |
4055 | ||
1da177e4 LT |
4056 | u8 ata_bmdma_status(struct ata_port *ap) |
4057 | { | |
4058 | u8 host_stat; | |
4059 | if (ap->flags & ATA_FLAG_MMIO) { | |
4060 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
4061 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
4062 | } else | |
ee500aab | 4063 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
1da177e4 LT |
4064 | return host_stat; |
4065 | } | |
4066 | ||
0baab86b EF |
4067 | |
4068 | /** | |
4069 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | |
b73fc89f | 4070 | * @qc: Command we are ending DMA for |
0baab86b EF |
4071 | * |
4072 | * Clears the ATA_DMA_START flag in the dma control register | |
4073 | * | |
4074 | * May be used as the bmdma_stop() entry in ata_port_operations. | |
4075 | * | |
4076 | * LOCKING: | |
4077 | * spin_lock_irqsave(host_set lock) | |
4078 | */ | |
4079 | ||
b73fc89f | 4080 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
1da177e4 | 4081 | { |
b73fc89f | 4082 | struct ata_port *ap = qc->ap; |
1da177e4 LT |
4083 | if (ap->flags & ATA_FLAG_MMIO) { |
4084 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
4085 | ||
4086 | /* clear start/stop bit */ | |
4087 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, | |
4088 | mmio + ATA_DMA_CMD); | |
4089 | } else { | |
4090 | /* clear start/stop bit */ | |
4091 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, | |
4092 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
4093 | } | |
4094 | ||
4095 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | |
4096 | ata_altstatus(ap); /* dummy read */ | |
4097 | } | |
4098 | ||
4099 | /** | |
4100 | * ata_host_intr - Handle host interrupt for given (port, task) | |
4101 | * @ap: Port on which interrupt arrived (possibly...) | |
4102 | * @qc: Taskfile currently active in engine | |
4103 | * | |
4104 | * Handle host interrupt for given queued command. Currently, | |
4105 | * only DMA interrupts are handled. All other commands are | |
4106 | * handled via polling with interrupts disabled (nIEN bit). | |
4107 | * | |
4108 | * LOCKING: | |
4109 | * spin_lock_irqsave(host_set lock) | |
4110 | * | |
4111 | * RETURNS: | |
4112 | * One if interrupt was handled, zero if not (shared irq). | |
4113 | */ | |
4114 | ||
4115 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
4116 | struct ata_queued_cmd *qc) | |
4117 | { | |
312f7da2 | 4118 | u8 status, host_stat = 0; |
1da177e4 | 4119 | |
312f7da2 AL |
4120 | VPRINTK("ata%u: protocol %d task_state %d\n", |
4121 | ap->id, qc->tf.protocol, ap->hsm_task_state); | |
1da177e4 | 4122 | |
312f7da2 AL |
4123 | /* Check whether we are expecting interrupt in this state */ |
4124 | switch (ap->hsm_task_state) { | |
4125 | case HSM_ST_FIRST: | |
4126 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. | |
4127 | * The flag was turned on only for atapi devices. | |
4128 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
4129 | */ | |
4130 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 4131 | goto idle_irq; |
312f7da2 AL |
4132 | break; |
4133 | case HSM_ST_LAST: | |
4134 | if (qc->tf.protocol == ATA_PROT_DMA || | |
4135 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
4136 | /* check status of DMA engine */ | |
4137 | host_stat = ap->ops->bmdma_status(ap); | |
4138 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
4139 | ||
4140 | /* if it's not our irq... */ | |
4141 | if (!(host_stat & ATA_DMA_INTR)) | |
4142 | goto idle_irq; | |
4143 | ||
4144 | /* before we do anything else, clear DMA-Start bit */ | |
4145 | ap->ops->bmdma_stop(qc); | |
4146 | } | |
4147 | break; | |
4148 | case HSM_ST: | |
4149 | break; | |
4150 | default: | |
4151 | goto idle_irq; | |
4152 | } | |
1da177e4 | 4153 | |
312f7da2 AL |
4154 | /* check altstatus */ |
4155 | status = ata_altstatus(ap); | |
4156 | if (status & ATA_BUSY) | |
4157 | goto idle_irq; | |
1da177e4 | 4158 | |
312f7da2 AL |
4159 | /* check main status, clearing INTRQ */ |
4160 | status = ata_chk_status(ap); | |
4161 | if (unlikely(status & ATA_BUSY)) | |
4162 | goto idle_irq; | |
1da177e4 | 4163 | |
312f7da2 AL |
4164 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
4165 | ap->id, qc->tf.protocol, ap->hsm_task_state, status); | |
1da177e4 | 4166 | |
312f7da2 AL |
4167 | /* ack bmdma irq events */ |
4168 | ap->ops->irq_clear(ap); | |
1da177e4 | 4169 | |
312f7da2 AL |
4170 | /* check error */ |
4171 | if (unlikely((status & ATA_ERR) || (host_stat & ATA_DMA_ERR))) | |
4172 | ap->hsm_task_state = HSM_ST_ERR; | |
4173 | ||
4174 | fsm_start: | |
4175 | switch (ap->hsm_task_state) { | |
4176 | case HSM_ST_FIRST: | |
4177 | /* Some pre-ATAPI-4 devices assert INTRQ | |
4178 | * at this state when ready to receive CDB. | |
4179 | */ | |
4180 | ||
4181 | /* check device status */ | |
4182 | if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) { | |
4183 | /* Wrong status. Let EH handle this */ | |
4184 | ap->hsm_task_state = HSM_ST_ERR; | |
4185 | goto fsm_start; | |
4186 | } | |
4187 | ||
4188 | atapi_send_cdb(ap, qc); | |
4189 | ||
4190 | break; | |
4191 | ||
4192 | case HSM_ST: | |
4193 | /* complete command or read/write the data register */ | |
4194 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
4195 | /* ATAPI PIO protocol */ | |
4196 | if ((status & ATA_DRQ) == 0) { | |
4197 | /* no more data to transfer */ | |
4198 | ap->hsm_task_state = HSM_ST_LAST; | |
4199 | goto fsm_start; | |
4200 | } | |
4201 | ||
4202 | atapi_pio_bytes(qc); | |
4203 | ||
4204 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) | |
4205 | /* bad ireason reported by device */ | |
4206 | goto fsm_start; | |
4207 | ||
4208 | } else { | |
4209 | /* ATA PIO protocol */ | |
4210 | if (unlikely((status & ATA_DRQ) == 0)) { | |
4211 | /* handle BSY=0, DRQ=0 as error */ | |
4212 | ap->hsm_task_state = HSM_ST_ERR; | |
4213 | goto fsm_start; | |
4214 | } | |
4215 | ||
4216 | ata_pio_sector(qc); | |
4217 | ||
4218 | if (ap->hsm_task_state == HSM_ST_LAST && | |
4219 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
4220 | /* all data read */ | |
4221 | ata_altstatus(ap); | |
4222 | status = ata_chk_status(ap); | |
4223 | goto fsm_start; | |
4224 | } | |
4225 | } | |
4226 | ||
4227 | ata_altstatus(ap); /* flush */ | |
4228 | break; | |
4229 | ||
4230 | case HSM_ST_LAST: | |
4231 | if (unlikely(status & ATA_DRQ)) { | |
4232 | /* handle DRQ=1 as error */ | |
4233 | ap->hsm_task_state = HSM_ST_ERR; | |
4234 | goto fsm_start; | |
4235 | } | |
4236 | ||
4237 | /* no more data to transfer */ | |
4238 | DPRINTK("ata%u: command complete, drv_stat 0x%x\n", | |
4239 | ap->id, status); | |
4240 | ||
4241 | ap->hsm_task_state = HSM_ST_IDLE; | |
1da177e4 LT |
4242 | |
4243 | /* complete taskfile transaction */ | |
a7dac447 | 4244 | ata_qc_complete(qc, ac_err_mask(status)); |
1da177e4 LT |
4245 | break; |
4246 | ||
312f7da2 AL |
4247 | case HSM_ST_ERR: |
4248 | printk(KERN_ERR "ata%u: command error, drv_stat 0x%x host_stat 0x%x\n", | |
4249 | ap->id, status, host_stat); | |
4250 | ||
4251 | ap->hsm_task_state = HSM_ST_IDLE; | |
4252 | ata_qc_complete(qc, status | ATA_ERR); | |
4253 | break; | |
1da177e4 LT |
4254 | default: |
4255 | goto idle_irq; | |
4256 | } | |
4257 | ||
4258 | return 1; /* irq handled */ | |
4259 | ||
4260 | idle_irq: | |
4261 | ap->stats.idle_irq++; | |
4262 | ||
4263 | #ifdef ATA_IRQ_TRAP | |
4264 | if ((ap->stats.idle_irq % 1000) == 0) { | |
4265 | handled = 1; | |
4266 | ata_irq_ack(ap, 0); /* debug trap */ | |
4267 | printk(KERN_WARNING "ata%d: irq trap\n", ap->id); | |
4268 | } | |
4269 | #endif | |
4270 | return 0; /* irq not handled */ | |
4271 | } | |
4272 | ||
4273 | /** | |
4274 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
4275 | * @irq: irq line (unused) |
4276 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
4277 | * @regs: unused |
4278 | * | |
0cba632b JG |
4279 | * Default interrupt handler for PCI IDE devices. Calls |
4280 | * ata_host_intr() for each port that is not disabled. | |
4281 | * | |
1da177e4 | 4282 | * LOCKING: |
0cba632b | 4283 | * Obtains host_set lock during operation. |
1da177e4 LT |
4284 | * |
4285 | * RETURNS: | |
0cba632b | 4286 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
4287 | */ |
4288 | ||
4289 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
4290 | { | |
4291 | struct ata_host_set *host_set = dev_instance; | |
4292 | unsigned int i; | |
4293 | unsigned int handled = 0; | |
4294 | unsigned long flags; | |
4295 | ||
4296 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
4297 | spin_lock_irqsave(&host_set->lock, flags); | |
4298 | ||
4299 | for (i = 0; i < host_set->n_ports; i++) { | |
4300 | struct ata_port *ap; | |
4301 | ||
4302 | ap = host_set->ports[i]; | |
c1389503 | 4303 | if (ap && |
312f7da2 | 4304 | !(ap->flags & ATA_FLAG_PORT_DISABLED)) { |
1da177e4 LT |
4305 | struct ata_queued_cmd *qc; |
4306 | ||
4307 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
312f7da2 | 4308 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 4309 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
4310 | handled |= ata_host_intr(ap, qc); |
4311 | } | |
4312 | } | |
4313 | ||
4314 | spin_unlock_irqrestore(&host_set->lock, flags); | |
4315 | ||
4316 | return IRQ_RETVAL(handled); | |
4317 | } | |
4318 | ||
0baab86b EF |
4319 | /** |
4320 | * ata_port_start - Set port up for dma. | |
4321 | * @ap: Port to initialize | |
4322 | * | |
4323 | * Called just after data structures for each port are | |
4324 | * initialized. Allocates space for PRD table. | |
4325 | * | |
4326 | * May be used as the port_start() entry in ata_port_operations. | |
4327 | * | |
4328 | * LOCKING: | |
6f0ef4fa | 4329 | * Inherited from caller. |
0baab86b EF |
4330 | */ |
4331 | ||
1da177e4 LT |
4332 | int ata_port_start (struct ata_port *ap) |
4333 | { | |
4334 | struct device *dev = ap->host_set->dev; | |
6037d6bb | 4335 | int rc; |
1da177e4 LT |
4336 | |
4337 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
4338 | if (!ap->prd) | |
4339 | return -ENOMEM; | |
4340 | ||
6037d6bb JG |
4341 | rc = ata_pad_alloc(ap, dev); |
4342 | if (rc) { | |
cedc9a47 | 4343 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 4344 | return rc; |
cedc9a47 JG |
4345 | } |
4346 | ||
1da177e4 LT |
4347 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
4348 | ||
4349 | return 0; | |
4350 | } | |
4351 | ||
0baab86b EF |
4352 | |
4353 | /** | |
4354 | * ata_port_stop - Undo ata_port_start() | |
4355 | * @ap: Port to shut down | |
4356 | * | |
4357 | * Frees the PRD table. | |
4358 | * | |
4359 | * May be used as the port_stop() entry in ata_port_operations. | |
4360 | * | |
4361 | * LOCKING: | |
6f0ef4fa | 4362 | * Inherited from caller. |
0baab86b EF |
4363 | */ |
4364 | ||
1da177e4 LT |
4365 | void ata_port_stop (struct ata_port *ap) |
4366 | { | |
4367 | struct device *dev = ap->host_set->dev; | |
4368 | ||
4369 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 4370 | ata_pad_free(ap, dev); |
1da177e4 LT |
4371 | } |
4372 | ||
aa8f0dc6 JG |
4373 | void ata_host_stop (struct ata_host_set *host_set) |
4374 | { | |
4375 | if (host_set->mmio_base) | |
4376 | iounmap(host_set->mmio_base); | |
4377 | } | |
4378 | ||
4379 | ||
1da177e4 LT |
4380 | /** |
4381 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
4382 | * @ap: Port to unregister | |
4383 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
4384 | * | |
4385 | * LOCKING: | |
6f0ef4fa | 4386 | * Inherited from caller. |
1da177e4 LT |
4387 | */ |
4388 | ||
4389 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
4390 | { | |
4391 | struct Scsi_Host *sh = ap->host; | |
4392 | ||
4393 | DPRINTK("ENTER\n"); | |
4394 | ||
4395 | if (do_unregister) | |
4396 | scsi_remove_host(sh); | |
4397 | ||
4398 | ap->ops->port_stop(ap); | |
4399 | } | |
4400 | ||
4401 | /** | |
4402 | * ata_host_init - Initialize an ata_port structure | |
4403 | * @ap: Structure to initialize | |
4404 | * @host: associated SCSI mid-layer structure | |
4405 | * @host_set: Collection of hosts to which @ap belongs | |
4406 | * @ent: Probe information provided by low-level driver | |
4407 | * @port_no: Port number associated with this ata_port | |
4408 | * | |
0cba632b JG |
4409 | * Initialize a new ata_port structure, and its associated |
4410 | * scsi_host. | |
4411 | * | |
1da177e4 | 4412 | * LOCKING: |
0cba632b | 4413 | * Inherited from caller. |
1da177e4 LT |
4414 | */ |
4415 | ||
4416 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
4417 | struct ata_host_set *host_set, | |
057ace5e | 4418 | const struct ata_probe_ent *ent, unsigned int port_no) |
1da177e4 LT |
4419 | { |
4420 | unsigned int i; | |
4421 | ||
4422 | host->max_id = 16; | |
4423 | host->max_lun = 1; | |
4424 | host->max_channel = 1; | |
4425 | host->unique_id = ata_unique_id++; | |
4426 | host->max_cmd_len = 12; | |
12413197 | 4427 | |
1da177e4 LT |
4428 | ap->flags = ATA_FLAG_PORT_DISABLED; |
4429 | ap->id = host->unique_id; | |
4430 | ap->host = host; | |
4431 | ap->ctl = ATA_DEVCTL_OBS; | |
4432 | ap->host_set = host_set; | |
4433 | ap->port_no = port_no; | |
4434 | ap->hard_port_no = | |
4435 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
4436 | ap->pio_mask = ent->pio_mask; | |
4437 | ap->mwdma_mask = ent->mwdma_mask; | |
4438 | ap->udma_mask = ent->udma_mask; | |
4439 | ap->flags |= ent->host_flags; | |
4440 | ap->ops = ent->port_ops; | |
4441 | ap->cbl = ATA_CBL_NONE; | |
4442 | ap->active_tag = ATA_TAG_POISON; | |
4443 | ap->last_ctl = 0xFF; | |
4444 | ||
1da177e4 LT |
4445 | INIT_WORK(&ap->pio_task, ata_pio_task, ap); |
4446 | ||
4447 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
4448 | ap->device[i].devno = i; | |
4449 | ||
4450 | #ifdef ATA_IRQ_TRAP | |
4451 | ap->stats.unhandled_irq = 1; | |
4452 | ap->stats.idle_irq = 1; | |
4453 | #endif | |
4454 | ||
4455 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
4456 | } | |
4457 | ||
4458 | /** | |
4459 | * ata_host_add - Attach low-level ATA driver to system | |
4460 | * @ent: Information provided by low-level driver | |
4461 | * @host_set: Collections of ports to which we add | |
4462 | * @port_no: Port number associated with this host | |
4463 | * | |
0cba632b JG |
4464 | * Attach low-level ATA driver to system. |
4465 | * | |
1da177e4 | 4466 | * LOCKING: |
0cba632b | 4467 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4468 | * |
4469 | * RETURNS: | |
0cba632b | 4470 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
4471 | */ |
4472 | ||
057ace5e | 4473 | static struct ata_port * ata_host_add(const struct ata_probe_ent *ent, |
1da177e4 LT |
4474 | struct ata_host_set *host_set, |
4475 | unsigned int port_no) | |
4476 | { | |
4477 | struct Scsi_Host *host; | |
4478 | struct ata_port *ap; | |
4479 | int rc; | |
4480 | ||
4481 | DPRINTK("ENTER\n"); | |
4482 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
4483 | if (!host) | |
4484 | return NULL; | |
4485 | ||
4486 | ap = (struct ata_port *) &host->hostdata[0]; | |
4487 | ||
4488 | ata_host_init(ap, host, host_set, ent, port_no); | |
4489 | ||
4490 | rc = ap->ops->port_start(ap); | |
4491 | if (rc) | |
4492 | goto err_out; | |
4493 | ||
4494 | return ap; | |
4495 | ||
4496 | err_out: | |
4497 | scsi_host_put(host); | |
4498 | return NULL; | |
4499 | } | |
4500 | ||
4501 | /** | |
0cba632b JG |
4502 | * ata_device_add - Register hardware device with ATA and SCSI layers |
4503 | * @ent: Probe information describing hardware device to be registered | |
4504 | * | |
4505 | * This function processes the information provided in the probe | |
4506 | * information struct @ent, allocates the necessary ATA and SCSI | |
4507 | * host information structures, initializes them, and registers | |
4508 | * everything with requisite kernel subsystems. | |
4509 | * | |
4510 | * This function requests irqs, probes the ATA bus, and probes | |
4511 | * the SCSI bus. | |
1da177e4 LT |
4512 | * |
4513 | * LOCKING: | |
0cba632b | 4514 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4515 | * |
4516 | * RETURNS: | |
0cba632b | 4517 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 LT |
4518 | */ |
4519 | ||
057ace5e | 4520 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 LT |
4521 | { |
4522 | unsigned int count = 0, i; | |
4523 | struct device *dev = ent->dev; | |
4524 | struct ata_host_set *host_set; | |
4525 | ||
4526 | DPRINTK("ENTER\n"); | |
4527 | /* alloc a container for our list of ATA ports (buses) */ | |
57f3bda8 | 4528 | host_set = kzalloc(sizeof(struct ata_host_set) + |
1da177e4 LT |
4529 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); |
4530 | if (!host_set) | |
4531 | return 0; | |
1da177e4 LT |
4532 | spin_lock_init(&host_set->lock); |
4533 | ||
4534 | host_set->dev = dev; | |
4535 | host_set->n_ports = ent->n_ports; | |
4536 | host_set->irq = ent->irq; | |
4537 | host_set->mmio_base = ent->mmio_base; | |
4538 | host_set->private_data = ent->private_data; | |
4539 | host_set->ops = ent->port_ops; | |
4540 | ||
4541 | /* register each port bound to this device */ | |
4542 | for (i = 0; i < ent->n_ports; i++) { | |
4543 | struct ata_port *ap; | |
4544 | unsigned long xfer_mode_mask; | |
4545 | ||
4546 | ap = ata_host_add(ent, host_set, i); | |
4547 | if (!ap) | |
4548 | goto err_out; | |
4549 | ||
4550 | host_set->ports[i] = ap; | |
4551 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
4552 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
4553 | (ap->pio_mask << ATA_SHIFT_PIO); | |
4554 | ||
4555 | /* print per-port info to dmesg */ | |
4556 | printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX " | |
4557 | "bmdma 0x%lX irq %lu\n", | |
4558 | ap->id, | |
4559 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
4560 | ata_mode_string(xfer_mode_mask), | |
4561 | ap->ioaddr.cmd_addr, | |
4562 | ap->ioaddr.ctl_addr, | |
4563 | ap->ioaddr.bmdma_addr, | |
4564 | ent->irq); | |
4565 | ||
4566 | ata_chk_status(ap); | |
4567 | host_set->ops->irq_clear(ap); | |
4568 | count++; | |
4569 | } | |
4570 | ||
57f3bda8 RD |
4571 | if (!count) |
4572 | goto err_free_ret; | |
1da177e4 LT |
4573 | |
4574 | /* obtain irq, that is shared between channels */ | |
4575 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
4576 | DRV_NAME, host_set)) | |
4577 | goto err_out; | |
4578 | ||
4579 | /* perform each probe synchronously */ | |
4580 | DPRINTK("probe begin\n"); | |
4581 | for (i = 0; i < count; i++) { | |
4582 | struct ata_port *ap; | |
4583 | int rc; | |
4584 | ||
4585 | ap = host_set->ports[i]; | |
4586 | ||
4587 | DPRINTK("ata%u: probe begin\n", ap->id); | |
4588 | rc = ata_bus_probe(ap); | |
4589 | DPRINTK("ata%u: probe end\n", ap->id); | |
4590 | ||
4591 | if (rc) { | |
4592 | /* FIXME: do something useful here? | |
4593 | * Current libata behavior will | |
4594 | * tear down everything when | |
4595 | * the module is removed | |
4596 | * or the h/w is unplugged. | |
4597 | */ | |
4598 | } | |
4599 | ||
4600 | rc = scsi_add_host(ap->host, dev); | |
4601 | if (rc) { | |
4602 | printk(KERN_ERR "ata%u: scsi_add_host failed\n", | |
4603 | ap->id); | |
4604 | /* FIXME: do something useful here */ | |
4605 | /* FIXME: handle unconditional calls to | |
4606 | * scsi_scan_host and ata_host_remove, below, | |
4607 | * at the very least | |
4608 | */ | |
4609 | } | |
4610 | } | |
4611 | ||
4612 | /* probes are done, now scan each port's disk(s) */ | |
4613 | DPRINTK("probe begin\n"); | |
4614 | for (i = 0; i < count; i++) { | |
4615 | struct ata_port *ap = host_set->ports[i]; | |
4616 | ||
644dd0cc | 4617 | ata_scsi_scan_host(ap); |
1da177e4 LT |
4618 | } |
4619 | ||
4620 | dev_set_drvdata(dev, host_set); | |
4621 | ||
4622 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
4623 | return ent->n_ports; /* success */ | |
4624 | ||
4625 | err_out: | |
4626 | for (i = 0; i < count; i++) { | |
4627 | ata_host_remove(host_set->ports[i], 1); | |
4628 | scsi_host_put(host_set->ports[i]->host); | |
4629 | } | |
57f3bda8 | 4630 | err_free_ret: |
1da177e4 LT |
4631 | kfree(host_set); |
4632 | VPRINTK("EXIT, returning 0\n"); | |
4633 | return 0; | |
4634 | } | |
4635 | ||
17b14451 AC |
4636 | /** |
4637 | * ata_host_set_remove - PCI layer callback for device removal | |
4638 | * @host_set: ATA host set that was removed | |
4639 | * | |
4640 | * Unregister all objects associated with this host set. Free those | |
4641 | * objects. | |
4642 | * | |
4643 | * LOCKING: | |
4644 | * Inherited from calling layer (may sleep). | |
4645 | */ | |
4646 | ||
17b14451 AC |
4647 | void ata_host_set_remove(struct ata_host_set *host_set) |
4648 | { | |
4649 | struct ata_port *ap; | |
4650 | unsigned int i; | |
4651 | ||
4652 | for (i = 0; i < host_set->n_ports; i++) { | |
4653 | ap = host_set->ports[i]; | |
4654 | scsi_remove_host(ap->host); | |
4655 | } | |
4656 | ||
4657 | free_irq(host_set->irq, host_set); | |
4658 | ||
4659 | for (i = 0; i < host_set->n_ports; i++) { | |
4660 | ap = host_set->ports[i]; | |
4661 | ||
4662 | ata_scsi_release(ap->host); | |
4663 | ||
4664 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4665 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4666 | ||
4667 | if (ioaddr->cmd_addr == 0x1f0) | |
4668 | release_region(0x1f0, 8); | |
4669 | else if (ioaddr->cmd_addr == 0x170) | |
4670 | release_region(0x170, 8); | |
4671 | } | |
4672 | ||
4673 | scsi_host_put(ap->host); | |
4674 | } | |
4675 | ||
4676 | if (host_set->ops->host_stop) | |
4677 | host_set->ops->host_stop(host_set); | |
4678 | ||
4679 | kfree(host_set); | |
4680 | } | |
4681 | ||
1da177e4 LT |
4682 | /** |
4683 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4684 | * @host: libata host to be unloaded | |
4685 | * | |
4686 | * Performs all duties necessary to shut down a libata port... | |
4687 | * Kill port kthread, disable port, and release resources. | |
4688 | * | |
4689 | * LOCKING: | |
4690 | * Inherited from SCSI layer. | |
4691 | * | |
4692 | * RETURNS: | |
4693 | * One. | |
4694 | */ | |
4695 | ||
4696 | int ata_scsi_release(struct Scsi_Host *host) | |
4697 | { | |
4698 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | |
4699 | ||
4700 | DPRINTK("ENTER\n"); | |
4701 | ||
4702 | ap->ops->port_disable(ap); | |
4703 | ata_host_remove(ap, 0); | |
4704 | ||
4705 | DPRINTK("EXIT\n"); | |
4706 | return 1; | |
4707 | } | |
4708 | ||
4709 | /** | |
4710 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
4711 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
4712 | * |
4713 | * Utility function which initializes data_addr, error_addr, | |
4714 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
4715 | * device_addr, status_addr, and command_addr to standard offsets | |
4716 | * relative to cmd_addr. | |
4717 | * | |
4718 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 4719 | */ |
0baab86b | 4720 | |
1da177e4 LT |
4721 | void ata_std_ports(struct ata_ioports *ioaddr) |
4722 | { | |
4723 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
4724 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
4725 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
4726 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
4727 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
4728 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
4729 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
4730 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
4731 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
4732 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
4733 | } | |
4734 | ||
4735 | static struct ata_probe_ent * | |
057ace5e | 4736 | ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port) |
1da177e4 LT |
4737 | { |
4738 | struct ata_probe_ent *probe_ent; | |
4739 | ||
57f3bda8 | 4740 | probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); |
1da177e4 LT |
4741 | if (!probe_ent) { |
4742 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
4743 | kobject_name(&(dev->kobj))); | |
4744 | return NULL; | |
4745 | } | |
4746 | ||
1da177e4 LT |
4747 | INIT_LIST_HEAD(&probe_ent->node); |
4748 | probe_ent->dev = dev; | |
4749 | ||
4750 | probe_ent->sht = port->sht; | |
4751 | probe_ent->host_flags = port->host_flags; | |
4752 | probe_ent->pio_mask = port->pio_mask; | |
4753 | probe_ent->mwdma_mask = port->mwdma_mask; | |
4754 | probe_ent->udma_mask = port->udma_mask; | |
4755 | probe_ent->port_ops = port->port_ops; | |
4756 | ||
4757 | return probe_ent; | |
4758 | } | |
4759 | ||
0baab86b EF |
4760 | |
4761 | ||
374b1873 JG |
4762 | #ifdef CONFIG_PCI |
4763 | ||
4764 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
4765 | { | |
4766 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
4767 | ||
4768 | pci_iounmap(pdev, host_set->mmio_base); | |
4769 | } | |
4770 | ||
0baab86b EF |
4771 | /** |
4772 | * ata_pci_init_native_mode - Initialize native-mode driver | |
4773 | * @pdev: pci device to be initialized | |
4774 | * @port: array[2] of pointers to port info structures. | |
47a86593 | 4775 | * @ports: bitmap of ports present |
0baab86b EF |
4776 | * |
4777 | * Utility function which allocates and initializes an | |
4778 | * ata_probe_ent structure for a standard dual-port | |
4779 | * PIO-based IDE controller. The returned ata_probe_ent | |
4780 | * structure can be passed to ata_device_add(). The returned | |
4781 | * ata_probe_ent structure should then be freed with kfree(). | |
47a86593 AC |
4782 | * |
4783 | * The caller need only pass the address of the primary port, the | |
4784 | * secondary will be deduced automatically. If the device has non | |
4785 | * standard secondary port mappings this function can be called twice, | |
4786 | * once for each interface. | |
0baab86b EF |
4787 | */ |
4788 | ||
1da177e4 | 4789 | struct ata_probe_ent * |
47a86593 | 4790 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports) |
1da177e4 LT |
4791 | { |
4792 | struct ata_probe_ent *probe_ent = | |
4793 | ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
47a86593 AC |
4794 | int p = 0; |
4795 | ||
1da177e4 LT |
4796 | if (!probe_ent) |
4797 | return NULL; | |
4798 | ||
1da177e4 LT |
4799 | probe_ent->irq = pdev->irq; |
4800 | probe_ent->irq_flags = SA_SHIRQ; | |
4801 | ||
47a86593 AC |
4802 | if (ports & ATA_PORT_PRIMARY) { |
4803 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0); | |
4804 | probe_ent->port[p].altstatus_addr = | |
4805 | probe_ent->port[p].ctl_addr = | |
4806 | pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; | |
4807 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4); | |
4808 | ata_std_ports(&probe_ent->port[p]); | |
4809 | p++; | |
4810 | } | |
1da177e4 | 4811 | |
47a86593 AC |
4812 | if (ports & ATA_PORT_SECONDARY) { |
4813 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2); | |
4814 | probe_ent->port[p].altstatus_addr = | |
4815 | probe_ent->port[p].ctl_addr = | |
4816 | pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS; | |
4817 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8; | |
4818 | ata_std_ports(&probe_ent->port[p]); | |
4819 | p++; | |
4820 | } | |
1da177e4 | 4821 | |
47a86593 | 4822 | probe_ent->n_ports = p; |
1da177e4 LT |
4823 | return probe_ent; |
4824 | } | |
4825 | ||
0f0d5192 | 4826 | static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num) |
1da177e4 | 4827 | { |
47a86593 | 4828 | struct ata_probe_ent *probe_ent; |
1da177e4 | 4829 | |
0f0d5192 | 4830 | probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port); |
1da177e4 LT |
4831 | if (!probe_ent) |
4832 | return NULL; | |
1da177e4 | 4833 | |
1da177e4 | 4834 | probe_ent->legacy_mode = 1; |
47a86593 AC |
4835 | probe_ent->n_ports = 1; |
4836 | probe_ent->hard_port_no = port_num; | |
4837 | ||
4838 | switch(port_num) | |
4839 | { | |
4840 | case 0: | |
4841 | probe_ent->irq = 14; | |
4842 | probe_ent->port[0].cmd_addr = 0x1f0; | |
4843 | probe_ent->port[0].altstatus_addr = | |
4844 | probe_ent->port[0].ctl_addr = 0x3f6; | |
4845 | break; | |
4846 | case 1: | |
4847 | probe_ent->irq = 15; | |
4848 | probe_ent->port[0].cmd_addr = 0x170; | |
4849 | probe_ent->port[0].altstatus_addr = | |
4850 | probe_ent->port[0].ctl_addr = 0x376; | |
4851 | break; | |
4852 | } | |
4853 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num; | |
1da177e4 | 4854 | ata_std_ports(&probe_ent->port[0]); |
1da177e4 LT |
4855 | return probe_ent; |
4856 | } | |
4857 | ||
4858 | /** | |
4859 | * ata_pci_init_one - Initialize/register PCI IDE host controller | |
4860 | * @pdev: Controller to be initialized | |
4861 | * @port_info: Information from low-level host driver | |
4862 | * @n_ports: Number of ports attached to host controller | |
4863 | * | |
0baab86b EF |
4864 | * This is a helper function which can be called from a driver's |
4865 | * xxx_init_one() probe function if the hardware uses traditional | |
4866 | * IDE taskfile registers. | |
4867 | * | |
4868 | * This function calls pci_enable_device(), reserves its register | |
4869 | * regions, sets the dma mask, enables bus master mode, and calls | |
4870 | * ata_device_add() | |
4871 | * | |
1da177e4 LT |
4872 | * LOCKING: |
4873 | * Inherited from PCI layer (may sleep). | |
4874 | * | |
4875 | * RETURNS: | |
0cba632b | 4876 | * Zero on success, negative on errno-based value on error. |
1da177e4 LT |
4877 | */ |
4878 | ||
4879 | int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, | |
4880 | unsigned int n_ports) | |
4881 | { | |
47a86593 | 4882 | struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL; |
1da177e4 LT |
4883 | struct ata_port_info *port[2]; |
4884 | u8 tmp8, mask; | |
4885 | unsigned int legacy_mode = 0; | |
4886 | int disable_dev_on_err = 1; | |
4887 | int rc; | |
4888 | ||
4889 | DPRINTK("ENTER\n"); | |
4890 | ||
4891 | port[0] = port_info[0]; | |
4892 | if (n_ports > 1) | |
4893 | port[1] = port_info[1]; | |
4894 | else | |
4895 | port[1] = port[0]; | |
4896 | ||
4897 | if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 | |
4898 | && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { | |
47a86593 | 4899 | /* TODO: What if one channel is in native mode ... */ |
1da177e4 LT |
4900 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); |
4901 | mask = (1 << 2) | (1 << 0); | |
4902 | if ((tmp8 & mask) != mask) | |
4903 | legacy_mode = (1 << 3); | |
4904 | } | |
4905 | ||
4906 | /* FIXME... */ | |
47a86593 AC |
4907 | if ((!legacy_mode) && (n_ports > 2)) { |
4908 | printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n"); | |
4909 | n_ports = 2; | |
4910 | /* For now */ | |
1da177e4 LT |
4911 | } |
4912 | ||
47a86593 AC |
4913 | /* FIXME: Really for ATA it isn't safe because the device may be |
4914 | multi-purpose and we want to leave it alone if it was already | |
4915 | enabled. Secondly for shared use as Arjan says we want refcounting | |
4916 | ||
4917 | Checking dev->is_enabled is insufficient as this is not set at | |
4918 | boot for the primary video which is BIOS enabled | |
4919 | */ | |
4920 | ||
1da177e4 LT |
4921 | rc = pci_enable_device(pdev); |
4922 | if (rc) | |
4923 | return rc; | |
4924 | ||
4925 | rc = pci_request_regions(pdev, DRV_NAME); | |
4926 | if (rc) { | |
4927 | disable_dev_on_err = 0; | |
4928 | goto err_out; | |
4929 | } | |
4930 | ||
47a86593 | 4931 | /* FIXME: Should use platform specific mappers for legacy port ranges */ |
1da177e4 LT |
4932 | if (legacy_mode) { |
4933 | if (!request_region(0x1f0, 8, "libata")) { | |
4934 | struct resource *conflict, res; | |
4935 | res.start = 0x1f0; | |
4936 | res.end = 0x1f0 + 8 - 1; | |
4937 | conflict = ____request_resource(&ioport_resource, &res); | |
4938 | if (!strcmp(conflict->name, "libata")) | |
4939 | legacy_mode |= (1 << 0); | |
4940 | else { | |
4941 | disable_dev_on_err = 0; | |
4942 | printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n"); | |
4943 | } | |
4944 | } else | |
4945 | legacy_mode |= (1 << 0); | |
4946 | ||
4947 | if (!request_region(0x170, 8, "libata")) { | |
4948 | struct resource *conflict, res; | |
4949 | res.start = 0x170; | |
4950 | res.end = 0x170 + 8 - 1; | |
4951 | conflict = ____request_resource(&ioport_resource, &res); | |
4952 | if (!strcmp(conflict->name, "libata")) | |
4953 | legacy_mode |= (1 << 1); | |
4954 | else { | |
4955 | disable_dev_on_err = 0; | |
4956 | printk(KERN_WARNING "ata: 0x170 IDE port busy\n"); | |
4957 | } | |
4958 | } else | |
4959 | legacy_mode |= (1 << 1); | |
4960 | } | |
4961 | ||
4962 | /* we have legacy mode, but all ports are unavailable */ | |
4963 | if (legacy_mode == (1 << 3)) { | |
4964 | rc = -EBUSY; | |
4965 | goto err_out_regions; | |
4966 | } | |
4967 | ||
4968 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
4969 | if (rc) | |
4970 | goto err_out_regions; | |
4971 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
4972 | if (rc) | |
4973 | goto err_out_regions; | |
4974 | ||
4975 | if (legacy_mode) { | |
47a86593 | 4976 | if (legacy_mode & (1 << 0)) |
0f0d5192 | 4977 | probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0); |
47a86593 | 4978 | if (legacy_mode & (1 << 1)) |
0f0d5192 | 4979 | probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1); |
47a86593 AC |
4980 | } else { |
4981 | if (n_ports == 2) | |
4982 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | |
4983 | else | |
4984 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY); | |
4985 | } | |
4986 | if (!probe_ent && !probe_ent2) { | |
1da177e4 LT |
4987 | rc = -ENOMEM; |
4988 | goto err_out_regions; | |
4989 | } | |
4990 | ||
4991 | pci_set_master(pdev); | |
4992 | ||
4993 | /* FIXME: check ata_device_add return */ | |
4994 | if (legacy_mode) { | |
4995 | if (legacy_mode & (1 << 0)) | |
4996 | ata_device_add(probe_ent); | |
4997 | if (legacy_mode & (1 << 1)) | |
4998 | ata_device_add(probe_ent2); | |
4999 | } else | |
5000 | ata_device_add(probe_ent); | |
5001 | ||
5002 | kfree(probe_ent); | |
5003 | kfree(probe_ent2); | |
5004 | ||
5005 | return 0; | |
5006 | ||
5007 | err_out_regions: | |
5008 | if (legacy_mode & (1 << 0)) | |
5009 | release_region(0x1f0, 8); | |
5010 | if (legacy_mode & (1 << 1)) | |
5011 | release_region(0x170, 8); | |
5012 | pci_release_regions(pdev); | |
5013 | err_out: | |
5014 | if (disable_dev_on_err) | |
5015 | pci_disable_device(pdev); | |
5016 | return rc; | |
5017 | } | |
5018 | ||
5019 | /** | |
5020 | * ata_pci_remove_one - PCI layer callback for device removal | |
5021 | * @pdev: PCI device that was removed | |
5022 | * | |
5023 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 5024 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
5025 | * Handle this by unregistering all objects associated |
5026 | * with this PCI device. Free those objects. Then finally | |
5027 | * release PCI resources and disable device. | |
5028 | * | |
5029 | * LOCKING: | |
5030 | * Inherited from PCI layer (may sleep). | |
5031 | */ | |
5032 | ||
5033 | void ata_pci_remove_one (struct pci_dev *pdev) | |
5034 | { | |
5035 | struct device *dev = pci_dev_to_dev(pdev); | |
5036 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
1da177e4 | 5037 | |
17b14451 | 5038 | ata_host_set_remove(host_set); |
1da177e4 LT |
5039 | pci_release_regions(pdev); |
5040 | pci_disable_device(pdev); | |
5041 | dev_set_drvdata(dev, NULL); | |
5042 | } | |
5043 | ||
5044 | /* move to PCI subsystem */ | |
057ace5e | 5045 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
5046 | { |
5047 | unsigned long tmp = 0; | |
5048 | ||
5049 | switch (bits->width) { | |
5050 | case 1: { | |
5051 | u8 tmp8 = 0; | |
5052 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
5053 | tmp = tmp8; | |
5054 | break; | |
5055 | } | |
5056 | case 2: { | |
5057 | u16 tmp16 = 0; | |
5058 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
5059 | tmp = tmp16; | |
5060 | break; | |
5061 | } | |
5062 | case 4: { | |
5063 | u32 tmp32 = 0; | |
5064 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
5065 | tmp = tmp32; | |
5066 | break; | |
5067 | } | |
5068 | ||
5069 | default: | |
5070 | return -EINVAL; | |
5071 | } | |
5072 | ||
5073 | tmp &= bits->mask; | |
5074 | ||
5075 | return (tmp == bits->val) ? 1 : 0; | |
5076 | } | |
5077 | #endif /* CONFIG_PCI */ | |
5078 | ||
5079 | ||
1da177e4 LT |
5080 | static int __init ata_init(void) |
5081 | { | |
5082 | ata_wq = create_workqueue("ata"); | |
5083 | if (!ata_wq) | |
5084 | return -ENOMEM; | |
5085 | ||
5086 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
5087 | return 0; | |
5088 | } | |
5089 | ||
5090 | static void __exit ata_exit(void) | |
5091 | { | |
5092 | destroy_workqueue(ata_wq); | |
5093 | } | |
5094 | ||
5095 | module_init(ata_init); | |
5096 | module_exit(ata_exit); | |
5097 | ||
67846b30 JG |
5098 | static unsigned long ratelimit_time; |
5099 | static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED; | |
5100 | ||
5101 | int ata_ratelimit(void) | |
5102 | { | |
5103 | int rc; | |
5104 | unsigned long flags; | |
5105 | ||
5106 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
5107 | ||
5108 | if (time_after(jiffies, ratelimit_time)) { | |
5109 | rc = 1; | |
5110 | ratelimit_time = jiffies + (HZ/5); | |
5111 | } else | |
5112 | rc = 0; | |
5113 | ||
5114 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
5115 | ||
5116 | return rc; | |
5117 | } | |
5118 | ||
1da177e4 LT |
5119 | /* |
5120 | * libata is essentially a library of internal helper functions for | |
5121 | * low-level ATA host controller drivers. As such, the API/ABI is | |
5122 | * likely to change as new drivers are added and updated. | |
5123 | * Do not depend on ABI/API stability. | |
5124 | */ | |
5125 | ||
5126 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
5127 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
5128 | EXPORT_SYMBOL_GPL(ata_device_add); | |
17b14451 | 5129 | EXPORT_SYMBOL_GPL(ata_host_set_remove); |
1da177e4 LT |
5130 | EXPORT_SYMBOL_GPL(ata_sg_init); |
5131 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
5132 | EXPORT_SYMBOL_GPL(ata_qc_complete); | |
5133 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); | |
5134 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
5135 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
5136 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
5137 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
5138 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
5139 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
5140 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
5141 | EXPORT_SYMBOL_GPL(ata_check_status); | |
5142 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
5143 | EXPORT_SYMBOL_GPL(ata_exec_command); |
5144 | EXPORT_SYMBOL_GPL(ata_port_start); | |
5145 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 5146 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 LT |
5147 | EXPORT_SYMBOL_GPL(ata_interrupt); |
5148 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
5149 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
5150 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
5151 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
5152 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
5153 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
5154 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
5155 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
5156 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
5157 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
5158 | EXPORT_SYMBOL_GPL(ata_port_disable); | |
67846b30 | 5159 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
1da177e4 LT |
5160 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
5161 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
5162 | EXPORT_SYMBOL_GPL(ata_scsi_error); | |
5163 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
5164 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
5165 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
5166 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
5167 | EXPORT_SYMBOL_GPL(ata_dev_id_string); | |
6f2f3812 | 5168 | EXPORT_SYMBOL_GPL(ata_dev_config); |
1da177e4 LT |
5169 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
5170 | ||
452503f9 AC |
5171 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
5172 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
5173 | ||
1da177e4 LT |
5174 | #ifdef CONFIG_PCI |
5175 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 5176 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
5177 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
5178 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
5179 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
5180 | #endif /* CONFIG_PCI */ |