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Merge branch 'upstream-fixes'
[linux-2.6-block.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
59a10b17 64static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
6aff8f1f
TH		 65static unsigned int ata_dev_init_params(struct ata_port *ap,
66 struct ata_device *dev);
1da177e4
LT		 67static void ata_set_mode(struct ata_port *ap);
68static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
057ace5e 69static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
1da177e4 70static int fgb(u32 bitmap);
057ace5e 71static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 72 u8 *xfer_mode_out,
73 unsigned int *xfer_shift_out);
1da177e4
LT		 74
75static unsigned int ata_unique_id = 1;
76static struct workqueue_struct *ata_wq;
77
1623c81e
JG		 78int atapi_enabled = 0;
79module_param(atapi_enabled, int, 0444);
80MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
81
1da177e4
LT		 82MODULE_AUTHOR("Jeff Garzik");
83MODULE_DESCRIPTION("Library module for ATA devices");
84MODULE_LICENSE("GPL");
85MODULE_VERSION(DRV_VERSION);
86
0baab86b 87
1da177e4
LT		 88/**
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
93 *
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
96 *
97 * LOCKING:
98 * Inherited from caller.
99 */
100
057ace5e 101void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 102{
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
108
109 fis[4] = tf->lbal;
110 fis[5] = tf->lbam;
111 fis[6] = tf->lbah;
112 fis[7] = tf->device;
113
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
118
119 fis[12] = tf->nsect;
120 fis[13] = tf->hob_nsect;
121 fis[14] = 0;
122 fis[15] = tf->ctl;
123
124 fis[16] = 0;
125 fis[17] = 0;
126 fis[18] = 0;
127 fis[19] = 0;
128}
129
130/**
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
134 *
e12a1be6 135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 136 *
137 * LOCKING:
138 * Inherited from caller.
139 */
140
057ace5e 141void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 142{
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
145
146 tf->lbal = fis[4];
147 tf->lbam = fis[5];
148 tf->lbah = fis[6];
149 tf->device = fis[7];
150
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
154
155 tf->nsect = fis[12];
156 tf->hob_nsect = fis[13];
157}
158
8cbd6df1
AL		 159static const u8 ata_rw_cmds[] = {
160 /* pio multi */
161 ATA_CMD_READ_MULTI,
162 ATA_CMD_WRITE_MULTI,
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 165 0,
166 0,
167 0,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 169 /* pio */
170 ATA_CMD_PIO_READ,
171 ATA_CMD_PIO_WRITE,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 174 0,
175 0,
176 0,
177 0,
8cbd6df1
AL		 178 /* dma */
179 ATA_CMD_READ,
180 ATA_CMD_WRITE,
181 ATA_CMD_READ_EXT,
9a3dccc4
TH		 182 ATA_CMD_WRITE_EXT,
183 0,
184 0,
185 0,
186 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 187};
1da177e4
LT		 188
189/**
8cbd6df1
AL		 190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
1da177e4 192 *
8cbd6df1
AL		 193 * Examine the device configuration and tf->flags to calculate
194 * the proper read/write commands and protocol to use.
1da177e4
LT		 195 *
196 * LOCKING:
197 * caller.
198 */
9a3dccc4 199int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 200{
8cbd6df1
AL		 201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
9a3dccc4 203 u8 cmd;
1da177e4 204
9a3dccc4 205 int index, fua, lba48, write;
8cbd6df1 206
9a3dccc4 207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 210
8cbd6df1
AL		 211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
9a3dccc4 213 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
0565c26d 217 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 218 } else {
219 tf->protocol = ATA_PROT_DMA;
9a3dccc4 220 index = 16;
8cbd6df1 221 }
1da177e4 222
9a3dccc4
TH		 223 cmd = ata_rw_cmds[index + fua + lba48 + write];
224 if (cmd) {
225 tf->command = cmd;
226 return 0;
227 }
228 return -1;
1da177e4
LT		 229}
230
98ac62de 231static const char * const xfer_mode_str[] = {
1da177e4
LT		 232 "UDMA/16",
233 "UDMA/25",
234 "UDMA/33",
235 "UDMA/44",
236 "UDMA/66",
237 "UDMA/100",
238 "UDMA/133",
239 "UDMA7",
240 "MWDMA0",
241 "MWDMA1",
242 "MWDMA2",
243 "PIO0",
244 "PIO1",
245 "PIO2",
246 "PIO3",
247 "PIO4",
248};
249
250/**
251 * ata_udma_string - convert UDMA bit offset to string
252 * @mask: mask of bits supported; only highest bit counts.
253 *
254 * Determine string which represents the highest speed
255 * (highest bit in @udma_mask).
256 *
257 * LOCKING:
258 * None.
259 *
260 * RETURNS:
261 * Constant C string representing highest speed listed in
262 * @udma_mask, or the constant C string "<n/a>".
263 */
264
265static const char *ata_mode_string(unsigned int mask)
266{
267 int i;
268
269 for (i = 7; i >= 0; i--)
270 if (mask & (1 << i))
271 goto out;
272 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
273 if (mask & (1 << i))
274 goto out;
275 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
276 if (mask & (1 << i))
277 goto out;
278
279 return "<n/a>";
280
281out:
282 return xfer_mode_str[i];
283}
284
285/**
286 * ata_pio_devchk - PATA device presence detection
287 * @ap: ATA channel to examine
288 * @device: Device to examine (starting at zero)
289 *
290 * This technique was originally described in
291 * Hale Landis's ATADRVR (www.ata-atapi.com), and
292 * later found its way into the ATA/ATAPI spec.
293 *
294 * Write a pattern to the ATA shadow registers,
295 * and if a device is present, it will respond by
296 * correctly storing and echoing back the
297 * ATA shadow register contents.
298 *
299 * LOCKING:
300 * caller.
301 */
302
303static unsigned int ata_pio_devchk(struct ata_port *ap,
304 unsigned int device)
305{
306 struct ata_ioports *ioaddr = &ap->ioaddr;
307 u8 nsect, lbal;
308
309 ap->ops->dev_select(ap, device);
310
311 outb(0x55, ioaddr->nsect_addr);
312 outb(0xaa, ioaddr->lbal_addr);
313
314 outb(0xaa, ioaddr->nsect_addr);
315 outb(0x55, ioaddr->lbal_addr);
316
317 outb(0x55, ioaddr->nsect_addr);
318 outb(0xaa, ioaddr->lbal_addr);
319
320 nsect = inb(ioaddr->nsect_addr);
321 lbal = inb(ioaddr->lbal_addr);
322
323 if ((nsect == 0x55) && (lbal == 0xaa))
324 return 1; /* we found a device */
325
326 return 0; /* nothing found */
327}
328
329/**
330 * ata_mmio_devchk - PATA device presence detection
331 * @ap: ATA channel to examine
332 * @device: Device to examine (starting at zero)
333 *
334 * This technique was originally described in
335 * Hale Landis's ATADRVR (www.ata-atapi.com), and
336 * later found its way into the ATA/ATAPI spec.
337 *
338 * Write a pattern to the ATA shadow registers,
339 * and if a device is present, it will respond by
340 * correctly storing and echoing back the
341 * ATA shadow register contents.
342 *
343 * LOCKING:
344 * caller.
345 */
346
347static unsigned int ata_mmio_devchk(struct ata_port *ap,
348 unsigned int device)
349{
350 struct ata_ioports *ioaddr = &ap->ioaddr;
351 u8 nsect, lbal;
352
353 ap->ops->dev_select(ap, device);
354
355 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
356 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
357
358 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
359 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
360
361 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
362 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
363
364 nsect = readb((void __iomem *) ioaddr->nsect_addr);
365 lbal = readb((void __iomem *) ioaddr->lbal_addr);
366
367 if ((nsect == 0x55) && (lbal == 0xaa))
368 return 1; /* we found a device */
369
370 return 0; /* nothing found */
371}
372
373/**
374 * ata_devchk - PATA device presence detection
375 * @ap: ATA channel to examine
376 * @device: Device to examine (starting at zero)
377 *
378 * Dispatch ATA device presence detection, depending
379 * on whether we are using PIO or MMIO to talk to the
380 * ATA shadow registers.
381 *
382 * LOCKING:
383 * caller.
384 */
385
386static unsigned int ata_devchk(struct ata_port *ap,
387 unsigned int device)
388{
389 if (ap->flags & ATA_FLAG_MMIO)
390 return ata_mmio_devchk(ap, device);
391 return ata_pio_devchk(ap, device);
392}
393
394/**
395 * ata_dev_classify - determine device type based on ATA-spec signature
396 * @tf: ATA taskfile register set for device to be identified
397 *
398 * Determine from taskfile register contents whether a device is
399 * ATA or ATAPI, as per "Signature and persistence" section
400 * of ATA/PI spec (volume 1, sect 5.14).
401 *
402 * LOCKING:
403 * None.
404 *
405 * RETURNS:
406 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
407 * the event of failure.
408 */
409
057ace5e 410unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 411{
412 /* Apple's open source Darwin code hints that some devices only
413 * put a proper signature into the LBA mid/high registers,
414 * So, we only check those. It's sufficient for uniqueness.
415 */
416
417 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
418 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
419 DPRINTK("found ATA device by sig\n");
420 return ATA_DEV_ATA;
421 }
422
423 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
424 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
425 DPRINTK("found ATAPI device by sig\n");
426 return ATA_DEV_ATAPI;
427 }
428
429 DPRINTK("unknown device\n");
430 return ATA_DEV_UNKNOWN;
431}
432
433/**
434 * ata_dev_try_classify - Parse returned ATA device signature
435 * @ap: ATA channel to examine
436 * @device: Device to examine (starting at zero)
b4dc7623 437 * @r_err: Value of error register on completion
1da177e4
LT		 438 *
439 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
440 * an ATA/ATAPI-defined set of values is placed in the ATA
441 * shadow registers, indicating the results of device detection
442 * and diagnostics.
443 *
444 * Select the ATA device, and read the values from the ATA shadow
445 * registers. Then parse according to the Error register value,
446 * and the spec-defined values examined by ata_dev_classify().
447 *
448 * LOCKING:
449 * caller.
b4dc7623
TH		 450 *
451 * RETURNS:
452 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 453 */
454
b4dc7623
TH		 455static unsigned int
456ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 457{
1da177e4
LT		 458 struct ata_taskfile tf;
459 unsigned int class;
460 u8 err;
461
462 ap->ops->dev_select(ap, device);
463
464 memset(&tf, 0, sizeof(tf));
465
1da177e4 466 ap->ops->tf_read(ap, &tf);
0169e284 467 err = tf.feature;
b4dc7623
TH		 468 if (r_err)
469 *r_err = err;
1da177e4
LT		 470
471 /* see if device passed diags */
472 if (err == 1)
473 /* do nothing */ ;
474 else if ((device == 0) && (err == 0x81))
475 /* do nothing */ ;
476 else
b4dc7623 477 return ATA_DEV_NONE;
1da177e4 478
b4dc7623 479 /* determine if device is ATA or ATAPI */
1da177e4 480 class = ata_dev_classify(&tf);
b4dc7623 481
1da177e4 482 if (class == ATA_DEV_UNKNOWN)
b4dc7623 483 return ATA_DEV_NONE;
1da177e4 484 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 485 return ATA_DEV_NONE;
486 return class;
1da177e4
LT		 487}
488
489/**
6a62a04d 490 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 491 * @id: IDENTIFY DEVICE results we will examine
492 * @s: string into which data is output
493 * @ofs: offset into identify device page
494 * @len: length of string to return. must be an even number.
495 *
496 * The strings in the IDENTIFY DEVICE page are broken up into
497 * 16-bit chunks. Run through the string, and output each
498 * 8-bit chunk linearly, regardless of platform.
499 *
500 * LOCKING:
501 * caller.
502 */
503
6a62a04d
TH		 504void ata_id_string(const u16 *id, unsigned char *s,
505 unsigned int ofs, unsigned int len)
1da177e4
LT		 506{
507 unsigned int c;
508
509 while (len > 0) {
510 c = id[ofs] >> 8;
511 *s = c;
512 s++;
513
514 c = id[ofs] & 0xff;
515 *s = c;
516 s++;
517
518 ofs++;
519 len -= 2;
520 }
521}
522
0e949ff3 523/**
6a62a04d 524 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 525 * @id: IDENTIFY DEVICE results we will examine
526 * @s: string into which data is output
527 * @ofs: offset into identify device page
528 * @len: length of string to return. must be an odd number.
529 *
6a62a04d 530 * This function is identical to ata_id_string except that it
0e949ff3
TH		 531 * trims trailing spaces and terminates the resulting string with
532 * null. @len must be actual maximum length (even number) + 1.
533 *
534 * LOCKING:
535 * caller.
536 */
6a62a04d
TH		 537void ata_id_c_string(const u16 *id, unsigned char *s,
538 unsigned int ofs, unsigned int len)
0e949ff3
TH		 539{
540 unsigned char *p;
541
542 WARN_ON(!(len & 1));
543
6a62a04d 544 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 545
546 p = s + strnlen(s, len - 1);
547 while (p > s && p[-1] == ' ')
548 p--;
549 *p = '\0';
550}
0baab86b 551
2940740b
TH		 552static u64 ata_id_n_sectors(const u16 *id)
553{
554 if (ata_id_has_lba(id)) {
555 if (ata_id_has_lba48(id))
556 return ata_id_u64(id, 100);
557 else
558 return ata_id_u32(id, 60);
559 } else {
560 if (ata_id_current_chs_valid(id))
561 return ata_id_u32(id, 57);
562 else
563 return id[1] * id[3] * id[6];
564 }
565}
566
0baab86b
EF		 567/**
568 * ata_noop_dev_select - Select device 0/1 on ATA bus
569 * @ap: ATA channel to manipulate
570 * @device: ATA device (numbered from zero) to select
571 *
572 * This function performs no actual function.
573 *
574 * May be used as the dev_select() entry in ata_port_operations.
575 *
576 * LOCKING:
577 * caller.
578 */
1da177e4
LT		 579void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
580{
581}
582
0baab86b 583
1da177e4
LT		 584/**
585 * ata_std_dev_select - Select device 0/1 on ATA bus
586 * @ap: ATA channel to manipulate
587 * @device: ATA device (numbered from zero) to select
588 *
589 * Use the method defined in the ATA specification to
590 * make either device 0, or device 1, active on the
0baab86b
EF		 591 * ATA channel. Works with both PIO and MMIO.
592 *
593 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 594 *
595 * LOCKING:
596 * caller.
597 */
598
599void ata_std_dev_select (struct ata_port *ap, unsigned int device)
600{
601 u8 tmp;
602
603 if (device == 0)
604 tmp = ATA_DEVICE_OBS;
605 else
606 tmp = ATA_DEVICE_OBS | ATA_DEV1;
607
608 if (ap->flags & ATA_FLAG_MMIO) {
609 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
610 } else {
611 outb(tmp, ap->ioaddr.device_addr);
612 }
613 ata_pause(ap); /* needed; also flushes, for mmio */
614}
615
616/**
617 * ata_dev_select - Select device 0/1 on ATA bus
618 * @ap: ATA channel to manipulate
619 * @device: ATA device (numbered from zero) to select
620 * @wait: non-zero to wait for Status register BSY bit to clear
621 * @can_sleep: non-zero if context allows sleeping
622 *
623 * Use the method defined in the ATA specification to
624 * make either device 0, or device 1, active on the
625 * ATA channel.
626 *
627 * This is a high-level version of ata_std_dev_select(),
628 * which additionally provides the services of inserting
629 * the proper pauses and status polling, where needed.
630 *
631 * LOCKING:
632 * caller.
633 */
634
635void ata_dev_select(struct ata_port *ap, unsigned int device,
636 unsigned int wait, unsigned int can_sleep)
637{
638 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
639 ap->id, device, wait);
640
641 if (wait)
642 ata_wait_idle(ap);
643
644 ap->ops->dev_select(ap, device);
645
646 if (wait) {
647 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
648 msleep(150);
649 ata_wait_idle(ap);
650 }
651}
652
653/**
654 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 655 * @id: IDENTIFY DEVICE page to dump
1da177e4 656 *
0bd3300a
TH		 657 * Dump selected 16-bit words from the given IDENTIFY DEVICE
658 * page.
1da177e4
LT		 659 *
660 * LOCKING:
661 * caller.
662 */
663
0bd3300a 664static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 665{
666 DPRINTK("49==0x%04x "
667 "53==0x%04x "
668 "63==0x%04x "
669 "64==0x%04x "
670 "75==0x%04x \n",
0bd3300a
TH		 671 id[49],
672 id[53],
673 id[63],
674 id[64],
675 id[75]);
1da177e4
LT		 676 DPRINTK("80==0x%04x "
677 "81==0x%04x "
678 "82==0x%04x "
679 "83==0x%04x "
680 "84==0x%04x \n",
0bd3300a
TH		 681 id[80],
682 id[81],
683 id[82],
684 id[83],
685 id[84]);
1da177e4
LT		 686 DPRINTK("88==0x%04x "
687 "93==0x%04x\n",
0bd3300a
TH		 688 id[88],
689 id[93]);
1da177e4
LT		 690}
691
11e29e21
AC		 692/*
693 * Compute the PIO modes available for this device. This is not as
694 * trivial as it seems if we must consider early devices correctly.
695 *
696 * FIXME: pre IDE drive timing (do we care ?).
697 */
698
057ace5e 699static unsigned int ata_pio_modes(const struct ata_device *adev)
11e29e21
AC		 700{
701 u16 modes;
702
ffa29456
AC		 703 /* Usual case. Word 53 indicates word 64 is valid */
704 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
11e29e21
AC		 705 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
706 modes <<= 3;
707 modes |= 0x7;
708 return modes;
709 }
710
ffa29456
AC		 711 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
712 number for the maximum. Turn it into a mask and return it */
713 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
11e29e21 714 return modes;
ffa29456
AC		 715 /* But wait.. there's more. Design your standards by committee and
716 you too can get a free iordy field to process. However its the
717 speeds not the modes that are supported... Note drivers using the
718 timing API will get this right anyway */
11e29e21
AC		 719}
720
95064379
TH		 721static inline void
722ata_queue_packet_task(struct ata_port *ap)
723{
c18d06f8
TH		 724 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
725 queue_work(ata_wq, &ap->packet_task);
95064379
TH		 726}
727
728static inline void
729ata_queue_pio_task(struct ata_port *ap)
730{
c18d06f8
TH		 731 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
732 queue_work(ata_wq, &ap->pio_task);
95064379
TH		 733}
734
735static inline void
736ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
737{
c18d06f8
TH		 738 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
739 queue_delayed_work(ata_wq, &ap->pio_task, delay);
740}
741
742/**
743 * ata_flush_pio_tasks - Flush pio_task and packet_task
744 * @ap: the target ata_port
745 *
746 * After this function completes, pio_task and packet_task are
747 * guranteed not to be running or scheduled.
748 *
749 * LOCKING:
750 * Kernel thread context (may sleep)
751 */
752
753static void ata_flush_pio_tasks(struct ata_port *ap)
754{
755 int tmp = 0;
756 unsigned long flags;
757
758 DPRINTK("ENTER\n");
759
760 spin_lock_irqsave(&ap->host_set->lock, flags);
761 ap->flags |= ATA_FLAG_FLUSH_PIO_TASK;
762 spin_unlock_irqrestore(&ap->host_set->lock, flags);
763
764 DPRINTK("flush #1\n");
765 flush_workqueue(ata_wq);
766
767 /*
768 * At this point, if a task is running, it's guaranteed to see
769 * the FLUSH flag; thus, it will never queue pio tasks again.
770 * Cancel and flush.
771 */
772 tmp |= cancel_delayed_work(&ap->pio_task);
773 tmp |= cancel_delayed_work(&ap->packet_task);
774 if (!tmp) {
775 DPRINTK("flush #2\n");
776 flush_workqueue(ata_wq);
777 }
778
779 spin_lock_irqsave(&ap->host_set->lock, flags);
780 ap->flags &= ~ATA_FLAG_FLUSH_PIO_TASK;
781 spin_unlock_irqrestore(&ap->host_set->lock, flags);
782
783 DPRINTK("EXIT\n");
95064379
TH		 784}
785
77853bf2 786void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 787{
77853bf2 788 struct completion *waiting = qc->private_data;
a2a7a662 789
77853bf2 790 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 791 complete(waiting);
a2a7a662
TH		 792}
793
794/**
795 * ata_exec_internal - execute libata internal command
796 * @ap: Port to which the command is sent
797 * @dev: Device to which the command is sent
798 * @tf: Taskfile registers for the command and the result
799 * @dma_dir: Data tranfer direction of the command
800 * @buf: Data buffer of the command
801 * @buflen: Length of data buffer
802 *
803 * Executes libata internal command with timeout. @tf contains
804 * command on entry and result on return. Timeout and error
805 * conditions are reported via return value. No recovery action
806 * is taken after a command times out. It's caller's duty to
807 * clean up after timeout.
808 *
809 * LOCKING:
810 * None. Should be called with kernel context, might sleep.
811 */
812
813static unsigned
814ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
815 struct ata_taskfile *tf,
816 int dma_dir, void *buf, unsigned int buflen)
817{
818 u8 command = tf->command;
819 struct ata_queued_cmd *qc;
820 DECLARE_COMPLETION(wait);
821 unsigned long flags;
77853bf2 822 unsigned int err_mask;
a2a7a662
TH		 823
824 spin_lock_irqsave(&ap->host_set->lock, flags);
825
826 qc = ata_qc_new_init(ap, dev);
827 BUG_ON(qc == NULL);
828
829 qc->tf = *tf;
830 qc->dma_dir = dma_dir;
831 if (dma_dir != DMA_NONE) {
832 ata_sg_init_one(qc, buf, buflen);
833 qc->nsect = buflen / ATA_SECT_SIZE;
834 }
835
77853bf2 836 qc->private_data = &wait;
a2a7a662
TH		 837 qc->complete_fn = ata_qc_complete_internal;
838
9a3d9eb0
TH		 839 qc->err_mask = ata_qc_issue(qc);
840 if (qc->err_mask)
8e436af9 841 ata_qc_complete(qc);
a2a7a662
TH		 842
843 spin_unlock_irqrestore(&ap->host_set->lock, flags);
844
845 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
846 spin_lock_irqsave(&ap->host_set->lock, flags);
847
848 /* We're racing with irq here. If we lose, the
849 * following test prevents us from completing the qc
850 * again. If completion irq occurs after here but
851 * before the caller cleans up, it will result in a
852 * spurious interrupt. We can live with that.
853 */
77853bf2 854 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 855 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 856 ata_qc_complete(qc);
857 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
858 ap->id, command);
859 }
860
861 spin_unlock_irqrestore(&ap->host_set->lock, flags);
862 }
863
77853bf2
TH		 864 *tf = qc->tf;
865 err_mask = qc->err_mask;
866
867 ata_qc_free(qc);
868
869 return err_mask;
a2a7a662
TH		 870}
871
1bc4ccff
AC		 872/**
873 * ata_pio_need_iordy - check if iordy needed
874 * @adev: ATA device
875 *
876 * Check if the current speed of the device requires IORDY. Used
877 * by various controllers for chip configuration.
878 */
879
880unsigned int ata_pio_need_iordy(const struct ata_device *adev)
881{
882 int pio;
883 int speed = adev->pio_mode - XFER_PIO_0;
884
885 if (speed < 2)
886 return 0;
887 if (speed > 2)
888 return 1;
889
890 /* If we have no drive specific rule, then PIO 2 is non IORDY */
891
892 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
893 pio = adev->id[ATA_ID_EIDE_PIO];
894 /* Is the speed faster than the drive allows non IORDY ? */
895 if (pio) {
896 /* This is cycle times not frequency - watch the logic! */
897 if (pio > 240) /* PIO2 is 240nS per cycle */
898 return 1;
899 return 0;
900 }
901 }
902 return 0;
903}
904
1da177e4
LT		 905/**
906 * ata_dev_identify - obtain IDENTIFY x DEVICE page
907 * @ap: port on which device we wish to probe resides
908 * @device: device bus address, starting at zero
909 *
910 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
911 * command, and read back the 512-byte device information page.
912 * The device information page is fed to us via the standard
913 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
914 * using standard PIO-IN paths)
915 *
916 * After reading the device information page, we use several
917 * bits of information from it to initialize data structures
918 * that will be used during the lifetime of the ata_device.
919 * Other data from the info page is used to disqualify certain
920 * older ATA devices we do not wish to support.
921 *
922 * LOCKING:
923 * Inherited from caller. Some functions called by this function
924 * obtain the host_set lock.
925 */
926
927static void ata_dev_identify(struct ata_port *ap, unsigned int device)
928{
929 struct ata_device *dev = &ap->device[device];
8bf62ece 930 unsigned int major_version;
1da177e4 931 unsigned long xfer_modes;
1da177e4 932 unsigned int using_edd;
a0123703
TH		 933 struct ata_taskfile tf;
934 unsigned int err_mask;
6e7846e9 935 int i, rc;
1da177e4
LT		 936
937 if (!ata_dev_present(dev)) {
938 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
939 ap->id, device);
940 return;
941 }
942
61eb066a
TH		 943 if (ap->ops->probe_reset ||
944 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1da177e4
LT		 945 using_edd = 0;
946 else
947 using_edd = 1;
948
949 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
950
a4631474
TH		 951 WARN_ON(dev->class != ATA_DEV_ATA && dev->class != ATA_DEV_ATAPI &&
952 dev->class != ATA_DEV_NONE);
1da177e4
LT		 953
954 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
955
1da177e4 956retry:
a0123703
TH		 957 ata_tf_init(ap, &tf, device);
958
1da177e4 959 if (dev->class == ATA_DEV_ATA) {
a0123703 960 tf.command = ATA_CMD_ID_ATA;
1da177e4
LT		 961 DPRINTK("do ATA identify\n");
962 } else {
a0123703 963 tf.command = ATA_CMD_ID_ATAPI;
1da177e4
LT		 964 DPRINTK("do ATAPI identify\n");
965 }
966
a0123703 967 tf.protocol = ATA_PROT_PIO;
1da177e4 968
a0123703
TH		 969 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
970 dev->id, sizeof(dev->id));
1da177e4 971
a0123703
TH		 972 if (err_mask) {
973 if (err_mask & ~AC_ERR_DEV)
974 goto err_out;
0169e284 975
1da177e4
LT		 976 /*
977 * arg! EDD works for all test cases, but seems to return
978 * the ATA signature for some ATAPI devices. Until the
979 * reason for this is found and fixed, we fix up the mess
980 * here. If IDENTIFY DEVICE returns command aborted
981 * (as ATAPI devices do), then we issue an
982 * IDENTIFY PACKET DEVICE.
983 *
984 * ATA software reset (SRST, the default) does not appear
985 * to have this problem.
986 */
7c398335 987 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
a0123703 988 u8 err = tf.feature;
1da177e4
LT		 989 if (err & ATA_ABORTED) {
990 dev->class = ATA_DEV_ATAPI;
1da177e4
LT		 991 goto retry;
992 }
993 }
994 goto err_out;
995 }
996
997 swap_buf_le16(dev->id, ATA_ID_WORDS);
998
999 /* print device capabilities */
1000 printk(KERN_DEBUG "ata%u: dev %u cfg "
1001 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1002 ap->id, device, dev->id[49],
1003 dev->id[82], dev->id[83], dev->id[84],
1004 dev->id[85], dev->id[86], dev->id[87],
1005 dev->id[88]);
1006
1007 /*
1008 * common ATA, ATAPI feature tests
1009 */
1010
8bf62ece
AL		 1011 /* we require DMA support (bits 8 of word 49) */
1012 if (!ata_id_has_dma(dev->id)) {
1013 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1da177e4
LT		 1014 goto err_out_nosup;
1015 }
1016
1017 /* quick-n-dirty find max transfer mode; for printk only */
1018 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1019 if (!xfer_modes)
1020 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
11e29e21
AC		 1021 if (!xfer_modes)
1022 xfer_modes = ata_pio_modes(dev);
1da177e4 1023
0bd3300a 1024 ata_dump_id(dev->id);
1da177e4
LT		 1025
1026 /* ATA-specific feature tests */
1027 if (dev->class == ATA_DEV_ATA) {
2940740b
TH		 1028 dev->n_sectors = ata_id_n_sectors(dev->id);
1029
1da177e4
LT		 1030 if (!ata_id_is_ata(dev->id)) /* sanity check */
1031 goto err_out_nosup;
1032
8bf62ece 1033 /* get major version */
3d2ca910 1034 major_version = ata_id_major_version(dev->id);
1da177e4 1035
8bf62ece
AL		 1036 /*
1037 * The exact sequence expected by certain pre-ATA4 drives is:
1038 * SRST RESET
1039 * IDENTIFY
1040 * INITIALIZE DEVICE PARAMETERS
1041 * anything else..
1042 * Some drives were very specific about that exact sequence.
1043 */
59a10b17 1044 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
6aff8f1f
TH		 1045 err_mask = ata_dev_init_params(ap, dev);
1046 if (err_mask) {
1047 printk(KERN_ERR "ata%u: failed to init "
1048 "parameters, disabled\n", ap->id);
1049 goto err_out;
1050 }
8bf62ece 1051
59a10b17
AL		 1052 /* current CHS translation info (id[53-58]) might be
1053 * changed. reread the identify device info.
1054 */
1055 ata_dev_reread_id(ap, dev);
1056 }
1057
8bf62ece
AL		 1058 if (ata_id_has_lba(dev->id)) {
1059 dev->flags |= ATA_DFLAG_LBA;
1060
2940740b 1061 if (ata_id_has_lba48(dev->id))
8bf62ece 1062 dev->flags |= ATA_DFLAG_LBA48;
8bf62ece
AL		 1063
1064 /* print device info to dmesg */
1065 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1066 ap->id, device,
1067 major_version,
1068 ata_mode_string(xfer_modes),
1069 (unsigned long long)dev->n_sectors,
1070 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1071 } else {
1072 /* CHS */
1073
1074 /* Default translation */
1075 dev->cylinders = dev->id[1];
1076 dev->heads = dev->id[3];
1077 dev->sectors = dev->id[6];
8bf62ece
AL		 1078
1079 if (ata_id_current_chs_valid(dev->id)) {
1080 /* Current CHS translation is valid. */
1081 dev->cylinders = dev->id[54];
1082 dev->heads = dev->id[55];
1083 dev->sectors = dev->id[56];
8bf62ece
AL		 1084 }
1085
1086 /* print device info to dmesg */
1087 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1088 ap->id, device,
1089 major_version,
1090 ata_mode_string(xfer_modes),
1091 (unsigned long long)dev->n_sectors,
1092 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1da177e4 1093
1da177e4
LT		 1094 }
1095
6e7846e9 1096 dev->cdb_len = 16;
1da177e4
LT		 1097 }
1098
1099 /* ATAPI-specific feature tests */
2c13b7ce 1100 else if (dev->class == ATA_DEV_ATAPI) {
1da177e4
LT		 1101 if (ata_id_is_ata(dev->id)) /* sanity check */
1102 goto err_out_nosup;
1103
1104 rc = atapi_cdb_len(dev->id);
1105 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1106 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1107 goto err_out_nosup;
1108 }
6e7846e9 1109 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1110
1111 /* print device info to dmesg */
1112 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1113 ap->id, device,
1114 ata_mode_string(xfer_modes));
1115 }
1116
6e7846e9
TH		 1117 ap->host->max_cmd_len = 0;
1118 for (i = 0; i < ATA_MAX_DEVICES; i++)
1119 ap->host->max_cmd_len = max_t(unsigned int,
1120 ap->host->max_cmd_len,
1121 ap->device[i].cdb_len);
1122
1da177e4
LT		 1123 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1124 return;
1125
1126err_out_nosup:
1127 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1128 ap->id, device);
1129err_out:
1130 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1131 DPRINTK("EXIT, err\n");
1132}
1133
6f2f3812 1134
8eabd02c
TH		 1135static inline u8 ata_dev_knobble(const struct ata_port *ap,
1136 struct ata_device *dev)
6f2f3812 1137{
8eabd02c 1138 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
6f2f3812
BC		 1139}
1140
1141/**
c893a3ae
RD		 1142 * ata_dev_config - Run device specific handlers & check for SATA->PATA bridges
1143 * @ap: Bus
1144 * @i: Device
6f2f3812 1145 *
c893a3ae 1146 * LOCKING:
6f2f3812 1147 */
8a60a071 1148
6f2f3812
BC		 1149void ata_dev_config(struct ata_port *ap, unsigned int i)
1150{
1151 /* limit bridge transfers to udma5, 200 sectors */
8eabd02c 1152 if (ata_dev_knobble(ap, &ap->device[i])) {
6f2f3812 1153 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
8eabd02c 1154 ap->id, i);
6f2f3812 1155 ap->udma_mask &= ATA_UDMA5;
b00eec1d 1156 ap->device[i].max_sectors = ATA_MAX_SECTORS;
6f2f3812
BC		 1157 }
1158
1159 if (ap->ops->dev_config)
1160 ap->ops->dev_config(ap, &ap->device[i]);
1161}
1162
1da177e4
LT		 1163/**
1164 * ata_bus_probe - Reset and probe ATA bus
1165 * @ap: Bus to probe
1166 *
0cba632b
JG		 1167 * Master ATA bus probing function. Initiates a hardware-dependent
1168 * bus reset, then attempts to identify any devices found on
1169 * the bus.
1170 *
1da177e4 1171 * LOCKING:
0cba632b 1172 * PCI/etc. bus probe sem.
1da177e4
LT		 1173 *
1174 * RETURNS:
1175 * Zero on success, non-zero on error.
1176 */
1177
1178static int ata_bus_probe(struct ata_port *ap)
1179{
1180 unsigned int i, found = 0;
1181
c19ba8af
TH		 1182 if (ap->ops->probe_reset) {
1183 unsigned int classes[ATA_MAX_DEVICES];
1184 int rc;
1185
1186 ata_port_probe(ap);
1187
1188 rc = ap->ops->probe_reset(ap, classes);
1189 if (rc == 0) {
06ab7822
TH		 1190 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1191 if (classes[i] == ATA_DEV_UNKNOWN)
1192 classes[i] = ATA_DEV_NONE;
c19ba8af 1193 ap->device[i].class = classes[i];
06ab7822 1194 }
c19ba8af
TH		 1195 } else {
1196 printk(KERN_ERR "ata%u: probe reset failed, "
1197 "disabling port\n", ap->id);
1198 ata_port_disable(ap);
1199 }
1200 } else
1201 ap->ops->phy_reset(ap);
1202
1da177e4
LT		 1203 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1204 goto err_out;
1205
1206 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1207 ata_dev_identify(ap, i);
1208 if (ata_dev_present(&ap->device[i])) {
1209 found = 1;
6f2f3812 1210 ata_dev_config(ap,i);
1da177e4
LT		 1211 }
1212 }
1213
1214 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1215 goto err_out_disable;
1216
1217 ata_set_mode(ap);
1218 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1219 goto err_out_disable;
1220
1221 return 0;
1222
1223err_out_disable:
1224 ap->ops->port_disable(ap);
1225err_out:
1226 return -1;
1227}
1228
1229/**
0cba632b
JG		 1230 * ata_port_probe - Mark port as enabled
1231 * @ap: Port for which we indicate enablement
1da177e4 1232 *
0cba632b
JG		 1233 * Modify @ap data structure such that the system
1234 * thinks that the entire port is enabled.
1235 *
1236 * LOCKING: host_set lock, or some other form of
1237 * serialization.
1da177e4
LT		 1238 */
1239
1240void ata_port_probe(struct ata_port *ap)
1241{
1242 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1243}
1244
3be680b7
TH		 1245/**
1246 * sata_print_link_status - Print SATA link status
1247 * @ap: SATA port to printk link status about
1248 *
1249 * This function prints link speed and status of a SATA link.
1250 *
1251 * LOCKING:
1252 * None.
1253 */
1254static void sata_print_link_status(struct ata_port *ap)
1255{
1256 u32 sstatus, tmp;
1257 const char *speed;
1258
1259 if (!ap->ops->scr_read)
1260 return;
1261
1262 sstatus = scr_read(ap, SCR_STATUS);
1263
1264 if (sata_dev_present(ap)) {
1265 tmp = (sstatus >> 4) & 0xf;
1266 if (tmp & (1 << 0))
1267 speed = "1.5";
1268 else if (tmp & (1 << 1))
1269 speed = "3.0";
1270 else
1271 speed = "<unknown>";
1272 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1273 ap->id, speed, sstatus);
1274 } else {
1275 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1276 ap->id, sstatus);
1277 }
1278}
1279
1da177e4 1280/**
780a87f7
JG		 1281 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1282 * @ap: SATA port associated with target SATA PHY.
1da177e4 1283 *
780a87f7
JG		 1284 * This function issues commands to standard SATA Sxxx
1285 * PHY registers, to wake up the phy (and device), and
1286 * clear any reset condition.
1da177e4
LT		 1287 *
1288 * LOCKING:
0cba632b 1289 * PCI/etc. bus probe sem.
1da177e4
LT		 1290 *
1291 */
1292void __sata_phy_reset(struct ata_port *ap)
1293{
1294 u32 sstatus;
1295 unsigned long timeout = jiffies + (HZ * 5);
1296
1297 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1298 /* issue phy wake/reset */
1299 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1300 /* Couldn't find anything in SATA I/II specs, but
1301 * AHCI-1.1 10.4.2 says at least 1 ms. */
1302 mdelay(1);
1da177e4 1303 }
cdcca89e 1304 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1305
1306 /* wait for phy to become ready, if necessary */
1307 do {
1308 msleep(200);
1309 sstatus = scr_read(ap, SCR_STATUS);
1310 if ((sstatus & 0xf) != 1)
1311 break;
1312 } while (time_before(jiffies, timeout));
1313
3be680b7
TH		 1314 /* print link status */
1315 sata_print_link_status(ap);
656563e3 1316
3be680b7
TH		 1317 /* TODO: phy layer with polling, timeouts, etc. */
1318 if (sata_dev_present(ap))
1da177e4 1319 ata_port_probe(ap);
3be680b7 1320 else
1da177e4 1321 ata_port_disable(ap);
1da177e4
LT		 1322
1323 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1324 return;
1325
1326 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1327 ata_port_disable(ap);
1328 return;
1329 }
1330
1331 ap->cbl = ATA_CBL_SATA;
1332}
1333
1334/**
780a87f7
JG		 1335 * sata_phy_reset - Reset SATA bus.
1336 * @ap: SATA port associated with target SATA PHY.
1da177e4 1337 *
780a87f7
JG		 1338 * This function resets the SATA bus, and then probes
1339 * the bus for devices.
1da177e4
LT		 1340 *
1341 * LOCKING:
0cba632b 1342 * PCI/etc. bus probe sem.
1da177e4
LT		 1343 *
1344 */
1345void sata_phy_reset(struct ata_port *ap)
1346{
1347 __sata_phy_reset(ap);
1348 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1349 return;
1350 ata_bus_reset(ap);
1351}
1352
1353/**
780a87f7
JG		 1354 * ata_port_disable - Disable port.
1355 * @ap: Port to be disabled.
1da177e4 1356 *
780a87f7
JG		 1357 * Modify @ap data structure such that the system
1358 * thinks that the entire port is disabled, and should
1359 * never attempt to probe or communicate with devices
1360 * on this port.
1361 *
1362 * LOCKING: host_set lock, or some other form of
1363 * serialization.
1da177e4
LT		 1364 */
1365
1366void ata_port_disable(struct ata_port *ap)
1367{
1368 ap->device[0].class = ATA_DEV_NONE;
1369 ap->device[1].class = ATA_DEV_NONE;
1370 ap->flags |= ATA_FLAG_PORT_DISABLED;
1371}
1372
452503f9
AC		 1373/*
1374 * This mode timing computation functionality is ported over from
1375 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1376 */
1377/*
1378 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1379 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1380 * for PIO 5, which is a nonstandard extension and UDMA6, which
1381 * is currently supported only by Maxtor drives.
1382 */
1383
1384static const struct ata_timing ata_timing[] = {
1385
1386 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1387 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1388 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1389 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1390
1391 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1392 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1393 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1394
1395/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1396
1397 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1398 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1399 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1400
1401 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1402 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1403 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1404
1405/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1406 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1407 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1408
1409 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1410 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1411 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1412
1413/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1414
1415 { 0xFF }
1416};
1417
1418#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1419#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1420
1421static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1422{
1423 q->setup = EZ(t->setup * 1000, T);
1424 q->act8b = EZ(t->act8b * 1000, T);
1425 q->rec8b = EZ(t->rec8b * 1000, T);
1426 q->cyc8b = EZ(t->cyc8b * 1000, T);
1427 q->active = EZ(t->active * 1000, T);
1428 q->recover = EZ(t->recover * 1000, T);
1429 q->cycle = EZ(t->cycle * 1000, T);
1430 q->udma = EZ(t->udma * 1000, UT);
1431}
1432
1433void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1434 struct ata_timing *m, unsigned int what)
1435{
1436 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1437 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1438 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1439 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1440 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1441 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1442 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1443 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1444}
1445
1446static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1447{
1448 const struct ata_timing *t;
1449
1450 for (t = ata_timing; t->mode != speed; t++)
91190758 1451 if (t->mode == 0xFF)
452503f9
AC		 1452 return NULL;
1453 return t;
1454}
1455
1456int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1457 struct ata_timing *t, int T, int UT)
1458{
1459 const struct ata_timing *s;
1460 struct ata_timing p;
1461
1462 /*
1463 * Find the mode.
75b1f2f8 1464 */
452503f9
AC		 1465
1466 if (!(s = ata_timing_find_mode(speed)))
1467 return -EINVAL;
1468
75b1f2f8
AL		 1469 memcpy(t, s, sizeof(*s));
1470
452503f9
AC		 1471 /*
1472 * If the drive is an EIDE drive, it can tell us it needs extended
1473 * PIO/MW_DMA cycle timing.
1474 */
1475
1476 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1477 memset(&p, 0, sizeof(p));
1478 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1479 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1480 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1481 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1482 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1483 }
1484 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1485 }
1486
1487 /*
1488 * Convert the timing to bus clock counts.
1489 */
1490
75b1f2f8 1491 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1492
1493 /*
c893a3ae
RD		 1494 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1495 * S.M.A.R.T * and some other commands. We have to ensure that the
1496 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1497 */
1498
1499 if (speed > XFER_PIO_4) {
1500 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1501 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1502 }
1503
1504 /*
c893a3ae 1505 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1506 */
1507
1508 if (t->act8b + t->rec8b < t->cyc8b) {
1509 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1510 t->rec8b = t->cyc8b - t->act8b;
1511 }
1512
1513 if (t->active + t->recover < t->cycle) {
1514 t->active += (t->cycle - (t->active + t->recover)) / 2;
1515 t->recover = t->cycle - t->active;
1516 }
1517
1518 return 0;
1519}
1520
057ace5e 1521static const struct {
1da177e4
LT		 1522 unsigned int shift;
1523 u8 base;
1524} xfer_mode_classes[] = {
1525 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1526 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1527 { ATA_SHIFT_PIO, XFER_PIO_0 },
1528};
1529
858119e1 1530static u8 base_from_shift(unsigned int shift)
1da177e4
LT		 1531{
1532 int i;
1533
1534 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1535 if (xfer_mode_classes[i].shift == shift)
1536 return xfer_mode_classes[i].base;
1537
1538 return 0xff;
1539}
1540
1541static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1542{
1543 int ofs, idx;
1544 u8 base;
1545
1546 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1547 return;
1548
1549 if (dev->xfer_shift == ATA_SHIFT_PIO)
1550 dev->flags |= ATA_DFLAG_PIO;
1551
1552 ata_dev_set_xfermode(ap, dev);
1553
1554 base = base_from_shift(dev->xfer_shift);
1555 ofs = dev->xfer_mode - base;
1556 idx = ofs + dev->xfer_shift;
1557 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1558
1559 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1560 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1561
1562 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1563 ap->id, dev->devno, xfer_mode_str[idx]);
1564}
1565
1566static int ata_host_set_pio(struct ata_port *ap)
1567{
1568 unsigned int mask;
1569 int x, i;
1570 u8 base, xfer_mode;
1571
1572 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1573 x = fgb(mask);
1574 if (x < 0) {
1575 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1576 return -1;
1577 }
1578
1579 base = base_from_shift(ATA_SHIFT_PIO);
1580 xfer_mode = base + x;
1581
1582 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1583 (int)base, (int)xfer_mode, mask, x);
1584
1585 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1586 struct ata_device *dev = &ap->device[i];
1587 if (ata_dev_present(dev)) {
1588 dev->pio_mode = xfer_mode;
1589 dev->xfer_mode = xfer_mode;
1590 dev->xfer_shift = ATA_SHIFT_PIO;
1591 if (ap->ops->set_piomode)
1592 ap->ops->set_piomode(ap, dev);
1593 }
1594 }
1595
1596 return 0;
1597}
1598
1599static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1600 unsigned int xfer_shift)
1601{
1602 int i;
1603
1604 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1605 struct ata_device *dev = &ap->device[i];
1606 if (ata_dev_present(dev)) {
1607 dev->dma_mode = xfer_mode;
1608 dev->xfer_mode = xfer_mode;
1609 dev->xfer_shift = xfer_shift;
1610 if (ap->ops->set_dmamode)
1611 ap->ops->set_dmamode(ap, dev);
1612 }
1613 }
1614}
1615
1616/**
1617 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1618 * @ap: port on which timings will be programmed
1619 *
780a87f7
JG		 1620 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1621 *
1da177e4 1622 * LOCKING:
0cba632b 1623 * PCI/etc. bus probe sem.
1da177e4
LT		 1624 */
1625static void ata_set_mode(struct ata_port *ap)
1626{
8cbd6df1 1627 unsigned int xfer_shift;
1da177e4
LT		 1628 u8 xfer_mode;
1629 int rc;
1630
1631 /* step 1: always set host PIO timings */
1632 rc = ata_host_set_pio(ap);
1633 if (rc)
1634 goto err_out;
1635
1636 /* step 2: choose the best data xfer mode */
1637 xfer_mode = xfer_shift = 0;
1638 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1639 if (rc)
1640 goto err_out;
1641
1642 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1643 if (xfer_shift != ATA_SHIFT_PIO)
1644 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1645
1646 /* step 4: update devices' xfer mode */
1647 ata_dev_set_mode(ap, &ap->device[0]);
1648 ata_dev_set_mode(ap, &ap->device[1]);
1649
1650 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1651 return;
1652
1653 if (ap->ops->post_set_mode)
1654 ap->ops->post_set_mode(ap);
1655
1da177e4
LT		 1656 return;
1657
1658err_out:
1659 ata_port_disable(ap);
1660}
1661
1fdffbce
JG		 1662/**
1663 * ata_tf_to_host - issue ATA taskfile to host controller
1664 * @ap: port to which command is being issued
1665 * @tf: ATA taskfile register set
1666 *
1667 * Issues ATA taskfile register set to ATA host controller,
1668 * with proper synchronization with interrupt handler and
1669 * other threads.
1670 *
1671 * LOCKING:
1672 * spin_lock_irqsave(host_set lock)
1673 */
1674
1675static inline void ata_tf_to_host(struct ata_port *ap,
1676 const struct ata_taskfile *tf)
1677{
1678 ap->ops->tf_load(ap, tf);
1679 ap->ops->exec_command(ap, tf);
1680}
1681
1da177e4
LT		 1682/**
1683 * ata_busy_sleep - sleep until BSY clears, or timeout
1684 * @ap: port containing status register to be polled
1685 * @tmout_pat: impatience timeout
1686 * @tmout: overall timeout
1687 *
780a87f7
JG		 1688 * Sleep until ATA Status register bit BSY clears,
1689 * or a timeout occurs.
1690 *
1691 * LOCKING: None.
1da177e4
LT		 1692 */
1693
6f8b9958
TH		 1694unsigned int ata_busy_sleep (struct ata_port *ap,
1695 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1696{
1697 unsigned long timer_start, timeout;
1698 u8 status;
1699
1700 status = ata_busy_wait(ap, ATA_BUSY, 300);
1701 timer_start = jiffies;
1702 timeout = timer_start + tmout_pat;
1703 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1704 msleep(50);
1705 status = ata_busy_wait(ap, ATA_BUSY, 3);
1706 }
1707
1708 if (status & ATA_BUSY)
1709 printk(KERN_WARNING "ata%u is slow to respond, "
1710 "please be patient\n", ap->id);
1711
1712 timeout = timer_start + tmout;
1713 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1714 msleep(50);
1715 status = ata_chk_status(ap);
1716 }
1717
1718 if (status & ATA_BUSY) {
1719 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1720 ap->id, tmout / HZ);
1721 return 1;
1722 }
1723
1724 return 0;
1725}
1726
1727static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1728{
1729 struct ata_ioports *ioaddr = &ap->ioaddr;
1730 unsigned int dev0 = devmask & (1 << 0);
1731 unsigned int dev1 = devmask & (1 << 1);
1732 unsigned long timeout;
1733
1734 /* if device 0 was found in ata_devchk, wait for its
1735 * BSY bit to clear
1736 */
1737 if (dev0)
1738 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1739
1740 /* if device 1 was found in ata_devchk, wait for
1741 * register access, then wait for BSY to clear
1742 */
1743 timeout = jiffies + ATA_TMOUT_BOOT;
1744 while (dev1) {
1745 u8 nsect, lbal;
1746
1747 ap->ops->dev_select(ap, 1);
1748 if (ap->flags & ATA_FLAG_MMIO) {
1749 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1750 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1751 } else {
1752 nsect = inb(ioaddr->nsect_addr);
1753 lbal = inb(ioaddr->lbal_addr);
1754 }
1755 if ((nsect == 1) && (lbal == 1))
1756 break;
1757 if (time_after(jiffies, timeout)) {
1758 dev1 = 0;
1759 break;
1760 }
1761 msleep(50); /* give drive a breather */
1762 }
1763 if (dev1)
1764 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1765
1766 /* is all this really necessary? */
1767 ap->ops->dev_select(ap, 0);
1768 if (dev1)
1769 ap->ops->dev_select(ap, 1);
1770 if (dev0)
1771 ap->ops->dev_select(ap, 0);
1772}
1773
1774/**
0cba632b
JG		 1775 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1776 * @ap: Port to reset and probe
1777 *
1778 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1779 * probe the bus. Not often used these days.
1da177e4
LT		 1780 *
1781 * LOCKING:
0cba632b 1782 * PCI/etc. bus probe sem.
e5338254 1783 * Obtains host_set lock.
1da177e4
LT		 1784 *
1785 */
1786
1787static unsigned int ata_bus_edd(struct ata_port *ap)
1788{
1789 struct ata_taskfile tf;
e5338254 1790 unsigned long flags;
1da177e4
LT		 1791
1792 /* set up execute-device-diag (bus reset) taskfile */
1793 /* also, take interrupts to a known state (disabled) */
1794 DPRINTK("execute-device-diag\n");
1795 ata_tf_init(ap, &tf, 0);
1796 tf.ctl |= ATA_NIEN;
1797 tf.command = ATA_CMD_EDD;
1798 tf.protocol = ATA_PROT_NODATA;
1799
1800 /* do bus reset */
e5338254 1801 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1802 ata_tf_to_host(ap, &tf);
e5338254 1803 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1804
1805 /* spec says at least 2ms. but who knows with those
1806 * crazy ATAPI devices...
1807 */
1808 msleep(150);
1809
1810 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1811}
1812
1813static unsigned int ata_bus_softreset(struct ata_port *ap,
1814 unsigned int devmask)
1815{
1816 struct ata_ioports *ioaddr = &ap->ioaddr;
1817
1818 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1819
1820 /* software reset. causes dev0 to be selected */
1821 if (ap->flags & ATA_FLAG_MMIO) {
1822 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1823 udelay(20); /* FIXME: flush */
1824 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1825 udelay(20); /* FIXME: flush */
1826 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1827 } else {
1828 outb(ap->ctl, ioaddr->ctl_addr);
1829 udelay(10);
1830 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1831 udelay(10);
1832 outb(ap->ctl, ioaddr->ctl_addr);
1833 }
1834
1835 /* spec mandates ">= 2ms" before checking status.
1836 * We wait 150ms, because that was the magic delay used for
1837 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1838 * between when the ATA command register is written, and then
1839 * status is checked. Because waiting for "a while" before
1840 * checking status is fine, post SRST, we perform this magic
1841 * delay here as well.
1842 */
1843 msleep(150);
1844
1845 ata_bus_post_reset(ap, devmask);
1846
1847 return 0;
1848}
1849
1850/**
1851 * ata_bus_reset - reset host port and associated ATA channel
1852 * @ap: port to reset
1853 *
1854 * This is typically the first time we actually start issuing
1855 * commands to the ATA channel. We wait for BSY to clear, then
1856 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1857 * result. Determine what devices, if any, are on the channel
1858 * by looking at the device 0/1 error register. Look at the signature
1859 * stored in each device's taskfile registers, to determine if
1860 * the device is ATA or ATAPI.
1861 *
1862 * LOCKING:
0cba632b
JG		 1863 * PCI/etc. bus probe sem.
1864 * Obtains host_set lock.
1da177e4
LT		 1865 *
1866 * SIDE EFFECTS:
1867 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1868 */
1869
1870void ata_bus_reset(struct ata_port *ap)
1871{
1872 struct ata_ioports *ioaddr = &ap->ioaddr;
1873 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1874 u8 err;
1875 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1876
1877 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1878
1879 /* determine if device 0/1 are present */
1880 if (ap->flags & ATA_FLAG_SATA_RESET)
1881 dev0 = 1;
1882 else {
1883 dev0 = ata_devchk(ap, 0);
1884 if (slave_possible)
1885 dev1 = ata_devchk(ap, 1);
1886 }
1887
1888 if (dev0)
1889 devmask |= (1 << 0);
1890 if (dev1)
1891 devmask |= (1 << 1);
1892
1893 /* select device 0 again */
1894 ap->ops->dev_select(ap, 0);
1895
1896 /* issue bus reset */
1897 if (ap->flags & ATA_FLAG_SRST)
1898 rc = ata_bus_softreset(ap, devmask);
1899 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1900 /* set up device control */
1901 if (ap->flags & ATA_FLAG_MMIO)
1902 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1903 else
1904 outb(ap->ctl, ioaddr->ctl_addr);
1905 rc = ata_bus_edd(ap);
1906 }
1907
1908 if (rc)
1909 goto err_out;
1910
1911 /*
1912 * determine by signature whether we have ATA or ATAPI devices
1913 */
b4dc7623 1914 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 1915 if ((slave_possible) && (err != 0x81))
b4dc7623 1916 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 1917
1918 /* re-enable interrupts */
1919 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1920 ata_irq_on(ap);
1921
1922 /* is double-select really necessary? */
1923 if (ap->device[1].class != ATA_DEV_NONE)
1924 ap->ops->dev_select(ap, 1);
1925 if (ap->device[0].class != ATA_DEV_NONE)
1926 ap->ops->dev_select(ap, 0);
1927
1928 /* if no devices were detected, disable this port */
1929 if ((ap->device[0].class == ATA_DEV_NONE) &&
1930 (ap->device[1].class == ATA_DEV_NONE))
1931 goto err_out;
1932
1933 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1934 /* set up device control for ATA_FLAG_SATA_RESET */
1935 if (ap->flags & ATA_FLAG_MMIO)
1936 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1937 else
1938 outb(ap->ctl, ioaddr->ctl_addr);
1939 }
1940
1941 DPRINTK("EXIT\n");
1942 return;
1943
1944err_out:
1945 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1946 ap->ops->port_disable(ap);
1947
1948 DPRINTK("EXIT\n");
1949}
1950
7a7921e8
TH		 1951static int sata_phy_resume(struct ata_port *ap)
1952{
1953 unsigned long timeout = jiffies + (HZ * 5);
1954 u32 sstatus;
1955
1956 scr_write_flush(ap, SCR_CONTROL, 0x300);
1957
1958 /* Wait for phy to become ready, if necessary. */
1959 do {
1960 msleep(200);
1961 sstatus = scr_read(ap, SCR_STATUS);
1962 if ((sstatus & 0xf) != 1)
1963 return 0;
1964 } while (time_before(jiffies, timeout));
1965
1966 return -1;
1967}
1968
8a19ac89
TH		 1969/**
1970 * ata_std_probeinit - initialize probing
1971 * @ap: port to be probed
1972 *
1973 * @ap is about to be probed. Initialize it. This function is
1974 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 1975 *
1976 * NOTE!!! Do not use this function as probeinit if a low level
1977 * driver implements only hardreset. Just pass NULL as probeinit
1978 * in that case. Using this function is probably okay but doing
1979 * so makes reset sequence different from the original
1980 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 1981 */
1982extern void ata_std_probeinit(struct ata_port *ap)
1983{
3a39746a 1984 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 1985 sata_phy_resume(ap);
3a39746a
TH		 1986 if (sata_dev_present(ap))
1987 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1988 }
8a19ac89
TH		 1989}
1990
c2bd5804
TH		 1991/**
1992 * ata_std_softreset - reset host port via ATA SRST
1993 * @ap: port to reset
1994 * @verbose: fail verbosely
1995 * @classes: resulting classes of attached devices
1996 *
1997 * Reset host port using ATA SRST. This function is to be used
1998 * as standard callback for ata_drive_*_reset() functions.
1999 *
2000 * LOCKING:
2001 * Kernel thread context (may sleep)
2002 *
2003 * RETURNS:
2004 * 0 on success, -errno otherwise.
2005 */
2006int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2007{
2008 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2009 unsigned int devmask = 0, err_mask;
2010 u8 err;
2011
2012 DPRINTK("ENTER\n");
2013
3a39746a
TH		 2014 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2015 classes[0] = ATA_DEV_NONE;
2016 goto out;
2017 }
2018
c2bd5804
TH		 2019 /* determine if device 0/1 are present */
2020 if (ata_devchk(ap, 0))
2021 devmask |= (1 << 0);
2022 if (slave_possible && ata_devchk(ap, 1))
2023 devmask |= (1 << 1);
2024
c2bd5804
TH		 2025 /* select device 0 again */
2026 ap->ops->dev_select(ap, 0);
2027
2028 /* issue bus reset */
2029 DPRINTK("about to softreset, devmask=%x\n", devmask);
2030 err_mask = ata_bus_softreset(ap, devmask);
2031 if (err_mask) {
2032 if (verbose)
2033 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2034 ap->id, err_mask);
2035 else
2036 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2037 err_mask);
2038 return -EIO;
2039 }
2040
2041 /* determine by signature whether we have ATA or ATAPI devices */
2042 classes[0] = ata_dev_try_classify(ap, 0, &err);
2043 if (slave_possible && err != 0x81)
2044 classes[1] = ata_dev_try_classify(ap, 1, &err);
2045
3a39746a 2046 out:
c2bd5804
TH		 2047 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2048 return 0;
2049}
2050
2051/**
2052 * sata_std_hardreset - reset host port via SATA phy reset
2053 * @ap: port to reset
2054 * @verbose: fail verbosely
2055 * @class: resulting class of attached device
2056 *
2057 * SATA phy-reset host port using DET bits of SControl register.
2058 * This function is to be used as standard callback for
2059 * ata_drive_*_reset().
2060 *
2061 * LOCKING:
2062 * Kernel thread context (may sleep)
2063 *
2064 * RETURNS:
2065 * 0 on success, -errno otherwise.
2066 */
2067int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2068{
c2bd5804
TH		 2069 DPRINTK("ENTER\n");
2070
2071 /* Issue phy wake/reset */
2072 scr_write_flush(ap, SCR_CONTROL, 0x301);
2073
2074 /*
2075 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2076 * 10.4.2 says at least 1 ms.
2077 */
2078 msleep(1);
2079
7a7921e8
TH		 2080 /* Bring phy back */
2081 sata_phy_resume(ap);
c2bd5804 2082
c2bd5804
TH		 2083 /* TODO: phy layer with polling, timeouts, etc. */
2084 if (!sata_dev_present(ap)) {
2085 *class = ATA_DEV_NONE;
2086 DPRINTK("EXIT, link offline\n");
2087 return 0;
2088 }
2089
2090 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2091 if (verbose)
2092 printk(KERN_ERR "ata%u: COMRESET failed "
2093 "(device not ready)\n", ap->id);
2094 else
2095 DPRINTK("EXIT, device not ready\n");
2096 return -EIO;
2097 }
2098
3a39746a
TH		 2099 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2100
c2bd5804
TH		 2101 *class = ata_dev_try_classify(ap, 0, NULL);
2102
2103 DPRINTK("EXIT, class=%u\n", *class);
2104 return 0;
2105}
2106
2107/**
2108 * ata_std_postreset - standard postreset callback
2109 * @ap: the target ata_port
2110 * @classes: classes of attached devices
2111 *
2112 * This function is invoked after a successful reset. Note that
2113 * the device might have been reset more than once using
2114 * different reset methods before postreset is invoked.
c2bd5804
TH		 2115 *
2116 * This function is to be used as standard callback for
2117 * ata_drive_*_reset().
2118 *
2119 * LOCKING:
2120 * Kernel thread context (may sleep)
2121 */
2122void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2123{
2124 DPRINTK("ENTER\n");
2125
56497bd5 2126 /* set cable type if it isn't already set */
c2bd5804
TH		 2127 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2128 ap->cbl = ATA_CBL_SATA;
2129
2130 /* print link status */
2131 if (ap->cbl == ATA_CBL_SATA)
2132 sata_print_link_status(ap);
2133
3a39746a
TH		 2134 /* re-enable interrupts */
2135 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2136 ata_irq_on(ap);
c2bd5804
TH		 2137
2138 /* is double-select really necessary? */
2139 if (classes[0] != ATA_DEV_NONE)
2140 ap->ops->dev_select(ap, 1);
2141 if (classes[1] != ATA_DEV_NONE)
2142 ap->ops->dev_select(ap, 0);
2143
3a39746a
TH		 2144 /* bail out if no device is present */
2145 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2146 DPRINTK("EXIT, no device\n");
2147 return;
2148 }
2149
2150 /* set up device control */
2151 if (ap->ioaddr.ctl_addr) {
2152 if (ap->flags & ATA_FLAG_MMIO)
2153 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2154 else
2155 outb(ap->ctl, ap->ioaddr.ctl_addr);
2156 }
c2bd5804
TH		 2157
2158 DPRINTK("EXIT\n");
2159}
2160
2161/**
2162 * ata_std_probe_reset - standard probe reset method
2163 * @ap: prot to perform probe-reset
2164 * @classes: resulting classes of attached devices
2165 *
2166 * The stock off-the-shelf ->probe_reset method.
2167 *
2168 * LOCKING:
2169 * Kernel thread context (may sleep)
2170 *
2171 * RETURNS:
2172 * 0 on success, -errno otherwise.
2173 */
2174int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2175{
2176 ata_reset_fn_t hardreset;
2177
2178 hardreset = NULL;
b911fc3a 2179 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2180 hardreset = sata_std_hardreset;
2181
8a19ac89 2182 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2183 ata_std_softreset, hardreset,
c2bd5804
TH		 2184 ata_std_postreset, classes);
2185}
2186
a62c0fc5
TH		 2187static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2188 ata_postreset_fn_t postreset,
2189 unsigned int *classes)
2190{
2191 int i, rc;
2192
2193 for (i = 0; i < ATA_MAX_DEVICES; i++)
2194 classes[i] = ATA_DEV_UNKNOWN;
2195
2196 rc = reset(ap, 0, classes);
2197 if (rc)
2198 return rc;
2199
2200 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2201 * is complete and convert all ATA_DEV_UNKNOWN to
2202 * ATA_DEV_NONE.
2203 */
2204 for (i = 0; i < ATA_MAX_DEVICES; i++)
2205 if (classes[i] != ATA_DEV_UNKNOWN)
2206 break;
2207
2208 if (i < ATA_MAX_DEVICES)
2209 for (i = 0; i < ATA_MAX_DEVICES; i++)
2210 if (classes[i] == ATA_DEV_UNKNOWN)
2211 classes[i] = ATA_DEV_NONE;
2212
2213 if (postreset)
2214 postreset(ap, classes);
2215
2216 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2217}
2218
2219/**
2220 * ata_drive_probe_reset - Perform probe reset with given methods
2221 * @ap: port to reset
7944ea95 2222 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2223 * @softreset: softreset method (can be NULL)
2224 * @hardreset: hardreset method (can be NULL)
2225 * @postreset: postreset method (can be NULL)
2226 * @classes: resulting classes of attached devices
2227 *
2228 * Reset the specified port and classify attached devices using
2229 * given methods. This function prefers softreset but tries all
2230 * possible reset sequences to reset and classify devices. This
2231 * function is intended to be used for constructing ->probe_reset
2232 * callback by low level drivers.
2233 *
2234 * Reset methods should follow the following rules.
2235 *
2236 * - Return 0 on sucess, -errno on failure.
2237 * - If classification is supported, fill classes[] with
2238 * recognized class codes.
2239 * - If classification is not supported, leave classes[] alone.
2240 * - If verbose is non-zero, print error message on failure;
2241 * otherwise, shut up.
2242 *
2243 * LOCKING:
2244 * Kernel thread context (may sleep)
2245 *
2246 * RETURNS:
2247 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2248 * if classification fails, and any error code from reset
2249 * methods.
2250 */
7944ea95 2251int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2252 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2253 ata_postreset_fn_t postreset, unsigned int *classes)
2254{
2255 int rc = -EINVAL;
2256
7944ea95
TH		 2257 if (probeinit)
2258 probeinit(ap);
2259
a62c0fc5
TH		 2260 if (softreset) {
2261 rc = do_probe_reset(ap, softreset, postreset, classes);
2262 if (rc == 0)
2263 return 0;
2264 }
2265
2266 if (!hardreset)
2267 return rc;
2268
2269 rc = do_probe_reset(ap, hardreset, postreset, classes);
2270 if (rc == 0 || rc != -ENODEV)
2271 return rc;
2272
2273 if (softreset)
2274 rc = do_probe_reset(ap, softreset, postreset, classes);
2275
2276 return rc;
2277}
2278
057ace5e
JG		 2279static void ata_pr_blacklisted(const struct ata_port *ap,
2280 const struct ata_device *dev)
1da177e4
LT		 2281{
2282 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2283 ap->id, dev->devno);
2284}
2285
98ac62de 2286static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2287 "WDC AC11000H",
2288 "WDC AC22100H",
2289 "WDC AC32500H",
2290 "WDC AC33100H",
2291 "WDC AC31600H",
2292 "WDC AC32100H",
2293 "WDC AC23200L",
2294 "Compaq CRD-8241B",
2295 "CRD-8400B",
2296 "CRD-8480B",
2297 "CRD-8482B",
2298 "CRD-84",
2299 "SanDisk SDP3B",
2300 "SanDisk SDP3B-64",
2301 "SANYO CD-ROM CRD",
2302 "HITACHI CDR-8",
2303 "HITACHI CDR-8335",
2304 "HITACHI CDR-8435",
2305 "Toshiba CD-ROM XM-6202B",
e922256a 2306 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2307 "CD-532E-A",
2308 "E-IDE CD-ROM CR-840",
2309 "CD-ROM Drive/F5A",
2310 "WPI CDD-820",
2311 "SAMSUNG CD-ROM SC-148C",
2312 "SAMSUNG CD-ROM SC",
2313 "SanDisk SDP3B-64",
1da177e4
LT		 2314 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2315 "_NEC DV5800A",
2316};
2317
057ace5e 2318static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2319{
2e02671d 2320 unsigned char model_num[41];
1da177e4
LT		 2321 int i;
2322
6a62a04d 2323 ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num));
1da177e4
LT		 2324
2325 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2326 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2327 return 1;
2328
2329 return 0;
2330}
2331
057ace5e 2332static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
1da177e4 2333{
057ace5e 2334 const struct ata_device *master, *slave;
1da177e4
LT		 2335 unsigned int mask;
2336
2337 master = &ap->device[0];
2338 slave = &ap->device[1];
2339
a4631474 2340 WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave));
1da177e4
LT		 2341
2342 if (shift == ATA_SHIFT_UDMA) {
2343 mask = ap->udma_mask;
2344 if (ata_dev_present(master)) {
2345 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2346 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2347 mask = 0;
2348 ata_pr_blacklisted(ap, master);
2349 }
2350 }
2351 if (ata_dev_present(slave)) {
2352 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2353 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2354 mask = 0;
2355 ata_pr_blacklisted(ap, slave);
2356 }
2357 }
2358 }
2359 else if (shift == ATA_SHIFT_MWDMA) {
2360 mask = ap->mwdma_mask;
2361 if (ata_dev_present(master)) {
2362 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2363 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2364 mask = 0;
2365 ata_pr_blacklisted(ap, master);
2366 }
2367 }
2368 if (ata_dev_present(slave)) {
2369 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2370 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2371 mask = 0;
2372 ata_pr_blacklisted(ap, slave);
2373 }
2374 }
2375 }
2376 else if (shift == ATA_SHIFT_PIO) {
2377 mask = ap->pio_mask;
2378 if (ata_dev_present(master)) {
2379 /* spec doesn't return explicit support for
2380 * PIO0-2, so we fake it
2381 */
2382 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2383 tmp_mode <<= 3;
2384 tmp_mode |= 0x7;
2385 mask &= tmp_mode;
2386 }
2387 if (ata_dev_present(slave)) {
2388 /* spec doesn't return explicit support for
2389 * PIO0-2, so we fake it
2390 */
2391 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2392 tmp_mode <<= 3;
2393 tmp_mode |= 0x7;
2394 mask &= tmp_mode;
2395 }
2396 }
2397 else {
2398 mask = 0xffffffff; /* shut up compiler warning */
2399 BUG();
2400 }
2401
2402 return mask;
2403}
2404
2405/* find greatest bit */
2406static int fgb(u32 bitmap)
2407{
2408 unsigned int i;
2409 int x = -1;
2410
2411 for (i = 0; i < 32; i++)
2412 if (bitmap & (1 << i))
2413 x = i;
2414
2415 return x;
2416}
2417
2418/**
2419 * ata_choose_xfer_mode - attempt to find best transfer mode
2420 * @ap: Port for which an xfer mode will be selected
2421 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2422 * @xfer_shift_out: (output) bit shift that selects this mode
2423 *
0cba632b
JG		 2424 * Based on host and device capabilities, determine the
2425 * maximum transfer mode that is amenable to all.
2426 *
1da177e4 2427 * LOCKING:
0cba632b 2428 * PCI/etc. bus probe sem.
1da177e4
LT		 2429 *
2430 * RETURNS:
2431 * Zero on success, negative on error.
2432 */
2433
057ace5e 2434static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 2435 u8 *xfer_mode_out,
2436 unsigned int *xfer_shift_out)
2437{
2438 unsigned int mask, shift;
2439 int x, i;
2440
2441 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2442 shift = xfer_mode_classes[i].shift;
2443 mask = ata_get_mode_mask(ap, shift);
2444
2445 x = fgb(mask);
2446 if (x >= 0) {
2447 *xfer_mode_out = xfer_mode_classes[i].base + x;
2448 *xfer_shift_out = shift;
2449 return 0;
2450 }
2451 }
2452
2453 return -1;
2454}
2455
2456/**
2457 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2458 * @ap: Port associated with device @dev
2459 * @dev: Device to which command will be sent
2460 *
780a87f7
JG		 2461 * Issue SET FEATURES - XFER MODE command to device @dev
2462 * on port @ap.
2463 *
1da177e4 2464 * LOCKING:
0cba632b 2465 * PCI/etc. bus probe sem.
1da177e4
LT		 2466 */
2467
2468static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2469{
a0123703 2470 struct ata_taskfile tf;
1da177e4
LT		 2471
2472 /* set up set-features taskfile */
2473 DPRINTK("set features - xfer mode\n");
2474
a0123703
TH		 2475 ata_tf_init(ap, &tf, dev->devno);
2476 tf.command = ATA_CMD_SET_FEATURES;
2477 tf.feature = SETFEATURES_XFER;
2478 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2479 tf.protocol = ATA_PROT_NODATA;
2480 tf.nsect = dev->xfer_mode;
1da177e4 2481
a0123703
TH		 2482 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2483 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2484 ap->id);
1da177e4 2485 ata_port_disable(ap);
a0123703 2486 }
1da177e4
LT		 2487
2488 DPRINTK("EXIT\n");
2489}
2490
59a10b17
AL		 2491/**
2492 * ata_dev_reread_id - Reread the device identify device info
2493 * @ap: port where the device is
2494 * @dev: device to reread the identify device info
2495 *
2496 * LOCKING:
2497 */
2498
2499static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2500{
a0123703 2501 struct ata_taskfile tf;
59a10b17 2502
a0123703 2503 ata_tf_init(ap, &tf, dev->devno);
59a10b17
AL		 2504
2505 if (dev->class == ATA_DEV_ATA) {
a0123703 2506 tf.command = ATA_CMD_ID_ATA;
59a10b17
AL		 2507 DPRINTK("do ATA identify\n");
2508 } else {
a0123703 2509 tf.command = ATA_CMD_ID_ATAPI;
59a10b17
AL		 2510 DPRINTK("do ATAPI identify\n");
2511 }
2512
a0123703
TH		 2513 tf.flags |= ATA_TFLAG_DEVICE;
2514 tf.protocol = ATA_PROT_PIO;
59a10b17 2515
a0123703
TH		 2516 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2517 dev->id, sizeof(dev->id)))
59a10b17
AL		 2518 goto err_out;
2519
59a10b17
AL		 2520 swap_buf_le16(dev->id, ATA_ID_WORDS);
2521
0bd3300a 2522 ata_dump_id(dev->id);
59a10b17
AL		 2523
2524 DPRINTK("EXIT\n");
2525
2526 return;
2527err_out:
a0123703 2528 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
59a10b17
AL		 2529 ata_port_disable(ap);
2530}
2531
8bf62ece
AL		 2532/**
2533 * ata_dev_init_params - Issue INIT DEV PARAMS command
2534 * @ap: Port associated with device @dev
2535 * @dev: Device to which command will be sent
2536 *
2537 * LOCKING:
6aff8f1f
TH		 2538 * Kernel thread context (may sleep)
2539 *
2540 * RETURNS:
2541 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2542 */
2543
6aff8f1f
TH		 2544static unsigned int ata_dev_init_params(struct ata_port *ap,
2545 struct ata_device *dev)
8bf62ece 2546{
a0123703 2547 struct ata_taskfile tf;
6aff8f1f 2548 unsigned int err_mask;
8bf62ece
AL		 2549 u16 sectors = dev->id[6];
2550 u16 heads = dev->id[3];
2551
2552 /* Number of sectors per track 1-255. Number of heads 1-16 */
2553 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
6aff8f1f 2554 return 0;
8bf62ece
AL		 2555
2556 /* set up init dev params taskfile */
2557 DPRINTK("init dev params \n");
2558
a0123703
TH		 2559 ata_tf_init(ap, &tf, dev->devno);
2560 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2561 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2562 tf.protocol = ATA_PROT_NODATA;
2563 tf.nsect = sectors;
2564 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2565
6aff8f1f 2566 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2567
6aff8f1f
TH		 2568 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2569 return err_mask;
8bf62ece
AL		 2570}
2571
1da177e4 2572/**
0cba632b
JG		 2573 * ata_sg_clean - Unmap DMA memory associated with command
2574 * @qc: Command containing DMA memory to be released
2575 *
2576 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2577 *
2578 * LOCKING:
0cba632b 2579 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2580 */
2581
2582static void ata_sg_clean(struct ata_queued_cmd *qc)
2583{
2584 struct ata_port *ap = qc->ap;
cedc9a47 2585 struct scatterlist *sg = qc->__sg;
1da177e4 2586 int dir = qc->dma_dir;
cedc9a47 2587 void *pad_buf = NULL;
1da177e4 2588
a4631474
TH		 2589 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2590 WARN_ON(sg == NULL);
1da177e4
LT		 2591
2592 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2593 WARN_ON(qc->n_elem > 1);
1da177e4 2594
2c13b7ce 2595 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2596
cedc9a47
JG		 2597 /* if we padded the buffer out to 32-bit bound, and data
2598 * xfer direction is from-device, we must copy from the
2599 * pad buffer back into the supplied buffer
2600 */
2601 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2602 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2603
2604 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2605 if (qc->n_elem)
2606 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2607 /* restore last sg */
2608 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2609 if (pad_buf) {
2610 struct scatterlist *psg = &qc->pad_sgent;
2611 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2612 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2613 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2614 }
2615 } else {
2e242fa9 2616 if (qc->n_elem)
e1410f2d
JG		 2617 dma_unmap_single(ap->host_set->dev,
2618 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2619 dir);
cedc9a47
JG		 2620 /* restore sg */
2621 sg->length += qc->pad_len;
2622 if (pad_buf)
2623 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2624 pad_buf, qc->pad_len);
2625 }
1da177e4
LT		 2626
2627 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2628 qc->__sg = NULL;
1da177e4
LT		 2629}
2630
2631/**
2632 * ata_fill_sg - Fill PCI IDE PRD table
2633 * @qc: Metadata associated with taskfile to be transferred
2634 *
780a87f7
JG		 2635 * Fill PCI IDE PRD (scatter-gather) table with segments
2636 * associated with the current disk command.
2637 *
1da177e4 2638 * LOCKING:
780a87f7 2639 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2640 *
2641 */
2642static void ata_fill_sg(struct ata_queued_cmd *qc)
2643{
1da177e4 2644 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2645 struct scatterlist *sg;
2646 unsigned int idx;
1da177e4 2647
a4631474 2648 WARN_ON(qc->__sg == NULL);
f131883e 2649 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2650
2651 idx = 0;
cedc9a47 2652 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2653 u32 addr, offset;
2654 u32 sg_len, len;
2655
2656 /* determine if physical DMA addr spans 64K boundary.
2657 * Note h/w doesn't support 64-bit, so we unconditionally
2658 * truncate dma_addr_t to u32.
2659 */
2660 addr = (u32) sg_dma_address(sg);
2661 sg_len = sg_dma_len(sg);
2662
2663 while (sg_len) {
2664 offset = addr & 0xffff;
2665 len = sg_len;
2666 if ((offset + sg_len) > 0x10000)
2667 len = 0x10000 - offset;
2668
2669 ap->prd[idx].addr = cpu_to_le32(addr);
2670 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2671 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2672
2673 idx++;
2674 sg_len -= len;
2675 addr += len;
2676 }
2677 }
2678
2679 if (idx)
2680 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2681}
2682/**
2683 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2684 * @qc: Metadata associated with taskfile to check
2685 *
780a87f7
JG		 2686 * Allow low-level driver to filter ATA PACKET commands, returning
2687 * a status indicating whether or not it is OK to use DMA for the
2688 * supplied PACKET command.
2689 *
1da177e4 2690 * LOCKING:
0cba632b
JG		 2691 * spin_lock_irqsave(host_set lock)
2692 *
1da177e4
LT		 2693 * RETURNS: 0 when ATAPI DMA can be used
2694 * nonzero otherwise
2695 */
2696int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2697{
2698 struct ata_port *ap = qc->ap;
2699 int rc = 0; /* Assume ATAPI DMA is OK by default */
2700
2701 if (ap->ops->check_atapi_dma)
2702 rc = ap->ops->check_atapi_dma(qc);
2703
2704 return rc;
2705}
2706/**
2707 * ata_qc_prep - Prepare taskfile for submission
2708 * @qc: Metadata associated with taskfile to be prepared
2709 *
780a87f7
JG		 2710 * Prepare ATA taskfile for submission.
2711 *
1da177e4
LT		 2712 * LOCKING:
2713 * spin_lock_irqsave(host_set lock)
2714 */
2715void ata_qc_prep(struct ata_queued_cmd *qc)
2716{
2717 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2718 return;
2719
2720 ata_fill_sg(qc);
2721}
2722
0cba632b
JG		 2723/**
2724 * ata_sg_init_one - Associate command with memory buffer
2725 * @qc: Command to be associated
2726 * @buf: Memory buffer
2727 * @buflen: Length of memory buffer, in bytes.
2728 *
2729 * Initialize the data-related elements of queued_cmd @qc
2730 * to point to a single memory buffer, @buf of byte length @buflen.
2731 *
2732 * LOCKING:
2733 * spin_lock_irqsave(host_set lock)
2734 */
2735
1da177e4
LT		 2736void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2737{
2738 struct scatterlist *sg;
2739
2740 qc->flags |= ATA_QCFLAG_SINGLE;
2741
2742 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2743 qc->__sg = &qc->sgent;
1da177e4 2744 qc->n_elem = 1;
cedc9a47 2745 qc->orig_n_elem = 1;
1da177e4
LT		 2746 qc->buf_virt = buf;
2747
cedc9a47 2748 sg = qc->__sg;
f0612bbc 2749 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2750}
2751
0cba632b
JG		 2752/**
2753 * ata_sg_init - Associate command with scatter-gather table.
2754 * @qc: Command to be associated
2755 * @sg: Scatter-gather table.
2756 * @n_elem: Number of elements in s/g table.
2757 *
2758 * Initialize the data-related elements of queued_cmd @qc
2759 * to point to a scatter-gather table @sg, containing @n_elem
2760 * elements.
2761 *
2762 * LOCKING:
2763 * spin_lock_irqsave(host_set lock)
2764 */
2765
1da177e4
LT		 2766void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2767 unsigned int n_elem)
2768{
2769 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2770 qc->__sg = sg;
1da177e4 2771 qc->n_elem = n_elem;
cedc9a47 2772 qc->orig_n_elem = n_elem;
1da177e4
LT		 2773}
2774
2775/**
0cba632b
JG		 2776 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2777 * @qc: Command with memory buffer to be mapped.
2778 *
2779 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2780 *
2781 * LOCKING:
2782 * spin_lock_irqsave(host_set lock)
2783 *
2784 * RETURNS:
0cba632b 2785 * Zero on success, negative on error.
1da177e4
LT		 2786 */
2787
2788static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2789{
2790 struct ata_port *ap = qc->ap;
2791 int dir = qc->dma_dir;
cedc9a47 2792 struct scatterlist *sg = qc->__sg;
1da177e4 2793 dma_addr_t dma_address;
2e242fa9 2794 int trim_sg = 0;
1da177e4 2795
cedc9a47
JG		 2796 /* we must lengthen transfers to end on a 32-bit boundary */
2797 qc->pad_len = sg->length & 3;
2798 if (qc->pad_len) {
2799 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2800 struct scatterlist *psg = &qc->pad_sgent;
2801
a4631474 2802 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2803
2804 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2805
2806 if (qc->tf.flags & ATA_TFLAG_WRITE)
2807 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2808 qc->pad_len);
2809
2810 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2811 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2812 /* trim sg */
2813 sg->length -= qc->pad_len;
2e242fa9
TH		 2814 if (sg->length == 0)
2815 trim_sg = 1;
cedc9a47
JG		 2816
2817 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2818 sg->length, qc->pad_len);
2819 }
2820
2e242fa9
TH		 2821 if (trim_sg) {
2822 qc->n_elem--;
e1410f2d
JG		 2823 goto skip_map;
2824 }
2825
1da177e4 2826 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2827 sg->length, dir);
537a95d9
TH		 2828 if (dma_mapping_error(dma_address)) {
2829 /* restore sg */
2830 sg->length += qc->pad_len;
1da177e4 2831 return -1;
537a95d9 2832 }
1da177e4
LT		 2833
2834 sg_dma_address(sg) = dma_address;
32529e01 2835 sg_dma_len(sg) = sg->length;
1da177e4 2836
2e242fa9 2837skip_map:
1da177e4
LT		 2838 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2839 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2840
2841 return 0;
2842}
2843
2844/**
0cba632b
JG		 2845 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2846 * @qc: Command with scatter-gather table to be mapped.
2847 *
2848 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2849 *
2850 * LOCKING:
2851 * spin_lock_irqsave(host_set lock)
2852 *
2853 * RETURNS:
0cba632b 2854 * Zero on success, negative on error.
1da177e4
LT		 2855 *
2856 */
2857
2858static int ata_sg_setup(struct ata_queued_cmd *qc)
2859{
2860 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2861 struct scatterlist *sg = qc->__sg;
2862 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 2863 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 2864
2865 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 2866 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 2867
cedc9a47
JG		 2868 /* we must lengthen transfers to end on a 32-bit boundary */
2869 qc->pad_len = lsg->length & 3;
2870 if (qc->pad_len) {
2871 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2872 struct scatterlist *psg = &qc->pad_sgent;
2873 unsigned int offset;
2874
a4631474 2875 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2876
2877 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2878
2879 /*
2880 * psg->page/offset are used to copy to-be-written
2881 * data in this function or read data in ata_sg_clean.
2882 */
2883 offset = lsg->offset + lsg->length - qc->pad_len;
2884 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2885 psg->offset = offset_in_page(offset);
2886
2887 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2888 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2889 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 2890 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2891 }
2892
2893 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2894 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2895 /* trim last sg */
2896 lsg->length -= qc->pad_len;
e1410f2d
JG		 2897 if (lsg->length == 0)
2898 trim_sg = 1;
cedc9a47
JG		 2899
2900 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2901 qc->n_elem - 1, lsg->length, qc->pad_len);
2902 }
2903
e1410f2d
JG		 2904 pre_n_elem = qc->n_elem;
2905 if (trim_sg && pre_n_elem)
2906 pre_n_elem--;
2907
2908 if (!pre_n_elem) {
2909 n_elem = 0;
2910 goto skip_map;
2911 }
2912
1da177e4 2913 dir = qc->dma_dir;
e1410f2d 2914 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 2915 if (n_elem < 1) {
2916 /* restore last sg */
2917 lsg->length += qc->pad_len;
1da177e4 2918 return -1;
537a95d9 2919 }
1da177e4
LT		 2920
2921 DPRINTK("%d sg elements mapped\n", n_elem);
2922
e1410f2d 2923skip_map:
1da177e4
LT		 2924 qc->n_elem = n_elem;
2925
2926 return 0;
2927}
2928
40e8c82c
TH		 2929/**
2930 * ata_poll_qc_complete - turn irq back on and finish qc
2931 * @qc: Command to complete
8e8b77dd 2932 * @err_mask: ATA status register content
40e8c82c
TH		 2933 *
2934 * LOCKING:
2935 * None. (grabs host lock)
2936 */
2937
a22e2eb0 2938void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 2939{
2940 struct ata_port *ap = qc->ap;
b8f6153e 2941 unsigned long flags;
40e8c82c 2942
b8f6153e 2943 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 2944 ap->flags &= ~ATA_FLAG_NOINTR;
2945 ata_irq_on(ap);
a22e2eb0 2946 ata_qc_complete(qc);
b8f6153e 2947 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 2948}
2949
1da177e4 2950/**
c893a3ae 2951 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 2952 * @ap: the target ata_port
1da177e4
LT		 2953 *
2954 * LOCKING:
0cba632b 2955 * None. (executing in kernel thread context)
1da177e4
LT		 2956 *
2957 * RETURNS:
6f0ef4fa 2958 * timeout value to use
1da177e4
LT		 2959 */
2960
2961static unsigned long ata_pio_poll(struct ata_port *ap)
2962{
c14b8331 2963 struct ata_queued_cmd *qc;
1da177e4 2964 u8 status;
14be71f4
AL		 2965 unsigned int poll_state = HSM_ST_UNKNOWN;
2966 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 2967
c14b8331 2968 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 2969 WARN_ON(qc == NULL);
c14b8331 2970
14be71f4
AL		 2971 switch (ap->hsm_task_state) {
2972 case HSM_ST:
2973 case HSM_ST_POLL:
2974 poll_state = HSM_ST_POLL;
2975 reg_state = HSM_ST;
1da177e4 2976 break;
14be71f4
AL		 2977 case HSM_ST_LAST:
2978 case HSM_ST_LAST_POLL:
2979 poll_state = HSM_ST_LAST_POLL;
2980 reg_state = HSM_ST_LAST;
1da177e4
LT		 2981 break;
2982 default:
2983 BUG();
2984 break;
2985 }
2986
2987 status = ata_chk_status(ap);
2988 if (status & ATA_BUSY) {
2989 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 2990 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 2991 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 2992 return 0;
2993 }
14be71f4 2994 ap->hsm_task_state = poll_state;
1da177e4
LT		 2995 return ATA_SHORT_PAUSE;
2996 }
2997
14be71f4 2998 ap->hsm_task_state = reg_state;
1da177e4
LT		 2999 return 0;
3000}
3001
3002/**
6f0ef4fa
RD		 3003 * ata_pio_complete - check if drive is busy or idle
3004 * @ap: the target ata_port
1da177e4
LT		 3005 *
3006 * LOCKING:
0cba632b 3007 * None. (executing in kernel thread context)
7fb6ec28
JG		 3008 *
3009 * RETURNS:
3010 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3011 */
3012
7fb6ec28 3013static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3014{
3015 struct ata_queued_cmd *qc;
3016 u8 drv_stat;
3017
3018 /*
31433ea3
AC		 3019 * This is purely heuristic. This is a fast path. Sometimes when
3020 * we enter, BSY will be cleared in a chk-status or two. If not,
3021 * the drive is probably seeking or something. Snooze for a couple
3022 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3023 * HSM_ST_POLL state.
1da177e4 3024 */
fe79e683
AL		 3025 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3026 if (drv_stat & ATA_BUSY) {
1da177e4 3027 msleep(2);
fe79e683
AL		 3028 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3029 if (drv_stat & ATA_BUSY) {
14be71f4 3030 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3031 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3032 return 0;
1da177e4
LT		 3033 }
3034 }
3035
c14b8331 3036 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3037 WARN_ON(qc == NULL);
c14b8331 3038
1da177e4
LT		 3039 drv_stat = ata_wait_idle(ap);
3040 if (!ata_ok(drv_stat)) {
1c848984 3041 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3042 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3043 return 0;
1da177e4
LT		 3044 }
3045
14be71f4 3046 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3047
a4631474 3048 WARN_ON(qc->err_mask);
a22e2eb0 3049 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3050
3051 /* another command may start at this point */
3052
3053 return 1;
1da177e4
LT		 3054}
3055
0baab86b
EF		 3056
3057/**
c893a3ae 3058 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3059 * @buf: Buffer to swap
3060 * @buf_words: Number of 16-bit words in buffer.
3061 *
3062 * Swap halves of 16-bit words if needed to convert from
3063 * little-endian byte order to native cpu byte order, or
3064 * vice-versa.
3065 *
3066 * LOCKING:
6f0ef4fa 3067 * Inherited from caller.
0baab86b 3068 */
1da177e4
LT		 3069void swap_buf_le16(u16 *buf, unsigned int buf_words)
3070{
3071#ifdef __BIG_ENDIAN
3072 unsigned int i;
3073
3074 for (i = 0; i < buf_words; i++)
3075 buf[i] = le16_to_cpu(buf[i]);
3076#endif /* __BIG_ENDIAN */
3077}
3078
6ae4cfb5
AL		 3079/**
3080 * ata_mmio_data_xfer - Transfer data by MMIO
3081 * @ap: port to read/write
3082 * @buf: data buffer
3083 * @buflen: buffer length
344babaa 3084 * @write_data: read/write
6ae4cfb5
AL		 3085 *
3086 * Transfer data from/to the device data register by MMIO.
3087 *
3088 * LOCKING:
3089 * Inherited from caller.
6ae4cfb5
AL		 3090 */
3091
1da177e4
LT		 3092static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3093 unsigned int buflen, int write_data)
3094{
3095 unsigned int i;
3096 unsigned int words = buflen >> 1;
3097 u16 *buf16 = (u16 *) buf;
3098 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3099
6ae4cfb5 3100 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3101 if (write_data) {
3102 for (i = 0; i < words; i++)
3103 writew(le16_to_cpu(buf16[i]), mmio);
3104 } else {
3105 for (i = 0; i < words; i++)
3106 buf16[i] = cpu_to_le16(readw(mmio));
3107 }
6ae4cfb5
AL		 3108
3109 /* Transfer trailing 1 byte, if any. */
3110 if (unlikely(buflen & 0x01)) {
3111 u16 align_buf[1] = { 0 };
3112 unsigned char *trailing_buf = buf + buflen - 1;
3113
3114 if (write_data) {
3115 memcpy(align_buf, trailing_buf, 1);
3116 writew(le16_to_cpu(align_buf[0]), mmio);
3117 } else {
3118 align_buf[0] = cpu_to_le16(readw(mmio));
3119 memcpy(trailing_buf, align_buf, 1);
3120 }
3121 }
1da177e4
LT		 3122}
3123
6ae4cfb5
AL		 3124/**
3125 * ata_pio_data_xfer - Transfer data by PIO
3126 * @ap: port to read/write
3127 * @buf: data buffer
3128 * @buflen: buffer length
344babaa 3129 * @write_data: read/write
6ae4cfb5
AL		 3130 *
3131 * Transfer data from/to the device data register by PIO.
3132 *
3133 * LOCKING:
3134 * Inherited from caller.
6ae4cfb5
AL		 3135 */
3136
1da177e4
LT		 3137static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3138 unsigned int buflen, int write_data)
3139{
6ae4cfb5 3140 unsigned int words = buflen >> 1;
1da177e4 3141
6ae4cfb5 3142 /* Transfer multiple of 2 bytes */
1da177e4 3143 if (write_data)
6ae4cfb5 3144 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3145 else
6ae4cfb5
AL		 3146 insw(ap->ioaddr.data_addr, buf, words);
3147
3148 /* Transfer trailing 1 byte, if any. */
3149 if (unlikely(buflen & 0x01)) {
3150 u16 align_buf[1] = { 0 };
3151 unsigned char *trailing_buf = buf + buflen - 1;
3152
3153 if (write_data) {
3154 memcpy(align_buf, trailing_buf, 1);
3155 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3156 } else {
3157 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3158 memcpy(trailing_buf, align_buf, 1);
3159 }
3160 }
1da177e4
LT		 3161}
3162
6ae4cfb5
AL		 3163/**
3164 * ata_data_xfer - Transfer data from/to the data register.
3165 * @ap: port to read/write
3166 * @buf: data buffer
3167 * @buflen: buffer length
3168 * @do_write: read/write
3169 *
3170 * Transfer data from/to the device data register.
3171 *
3172 * LOCKING:
3173 * Inherited from caller.
6ae4cfb5
AL		 3174 */
3175
1da177e4
LT		 3176static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3177 unsigned int buflen, int do_write)
3178{
a1bd9e68
AC		 3179 /* Make the crap hardware pay the costs not the good stuff */
3180 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3181 unsigned long flags;
3182 local_irq_save(flags);
3183 if (ap->flags & ATA_FLAG_MMIO)
3184 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3185 else
3186 ata_pio_data_xfer(ap, buf, buflen, do_write);
3187 local_irq_restore(flags);
3188 } else {
3189 if (ap->flags & ATA_FLAG_MMIO)
3190 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3191 else
3192 ata_pio_data_xfer(ap, buf, buflen, do_write);
3193 }
1da177e4
LT		 3194}
3195
6ae4cfb5
AL		 3196/**
3197 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3198 * @qc: Command on going
3199 *
3200 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3201 *
3202 * LOCKING:
3203 * Inherited from caller.
3204 */
3205
1da177e4
LT		 3206static void ata_pio_sector(struct ata_queued_cmd *qc)
3207{
3208 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3209 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3210 struct ata_port *ap = qc->ap;
3211 struct page *page;
3212 unsigned int offset;
3213 unsigned char *buf;
3214
3215 if (qc->cursect == (qc->nsect - 1))
14be71f4 3216 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3217
3218 page = sg[qc->cursg].page;
3219 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3220
3221 /* get the current page and offset */
3222 page = nth_page(page, (offset >> PAGE_SHIFT));
3223 offset %= PAGE_SIZE;
3224
3225 buf = kmap(page) + offset;
3226
3227 qc->cursect++;
3228 qc->cursg_ofs++;
3229
32529e01 3230 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3231 qc->cursg++;
3232 qc->cursg_ofs = 0;
3233 }
3234
3235 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3236
3237 /* do the actual data transfer */
3238 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3239 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3240
3241 kunmap(page);
3242}
3243
6ae4cfb5
AL		 3244/**
3245 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3246 * @qc: Command on going
3247 * @bytes: number of bytes
3248 *
3249 * Transfer Transfer data from/to the ATAPI device.
3250 *
3251 * LOCKING:
3252 * Inherited from caller.
3253 *
3254 */
3255
1da177e4
LT		 3256static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3257{
3258 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3259 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3260 struct ata_port *ap = qc->ap;
3261 struct page *page;
3262 unsigned char *buf;
3263 unsigned int offset, count;
3264
563a6e1f 3265 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3266 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3267
3268next_sg:
563a6e1f 3269 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3270 /*
563a6e1f
AL		 3271 * The end of qc->sg is reached and the device expects
3272 * more data to transfer. In order not to overrun qc->sg
3273 * and fulfill length specified in the byte count register,
3274 * - for read case, discard trailing data from the device
3275 * - for write case, padding zero data to the device
3276 */
3277 u16 pad_buf[1] = { 0 };
3278 unsigned int words = bytes >> 1;
3279 unsigned int i;
3280
3281 if (words) /* warning if bytes > 1 */
7fb6ec28 3282 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3283 ap->id, bytes);
3284
3285 for (i = 0; i < words; i++)
3286 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3287
14be71f4 3288 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3289 return;
3290 }
3291
cedc9a47 3292 sg = &qc->__sg[qc->cursg];
1da177e4 3293
1da177e4
LT		 3294 page = sg->page;
3295 offset = sg->offset + qc->cursg_ofs;
3296
3297 /* get the current page and offset */
3298 page = nth_page(page, (offset >> PAGE_SHIFT));
3299 offset %= PAGE_SIZE;
3300
6952df03 3301 /* don't overrun current sg */
32529e01 3302 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3303
3304 /* don't cross page boundaries */
3305 count = min(count, (unsigned int)PAGE_SIZE - offset);
3306
3307 buf = kmap(page) + offset;
3308
3309 bytes -= count;
3310 qc->curbytes += count;
3311 qc->cursg_ofs += count;
3312
32529e01 3313 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3314 qc->cursg++;
3315 qc->cursg_ofs = 0;
3316 }
3317
3318 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3319
3320 /* do the actual data transfer */
3321 ata_data_xfer(ap, buf, count, do_write);
3322
3323 kunmap(page);
3324
563a6e1f 3325 if (bytes)
1da177e4 3326 goto next_sg;
1da177e4
LT		 3327}
3328
6ae4cfb5
AL		 3329/**
3330 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3331 * @qc: Command on going
3332 *
3333 * Transfer Transfer data from/to the ATAPI device.
3334 *
3335 * LOCKING:
3336 * Inherited from caller.
6ae4cfb5
AL		 3337 */
3338
1da177e4
LT		 3339static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3340{
3341 struct ata_port *ap = qc->ap;
3342 struct ata_device *dev = qc->dev;
3343 unsigned int ireason, bc_lo, bc_hi, bytes;
3344 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3345
3346 ap->ops->tf_read(ap, &qc->tf);
3347 ireason = qc->tf.nsect;
3348 bc_lo = qc->tf.lbam;
3349 bc_hi = qc->tf.lbah;
3350 bytes = (bc_hi << 8) | bc_lo;
3351
3352 /* shall be cleared to zero, indicating xfer of data */
3353 if (ireason & (1 << 0))
3354 goto err_out;
3355
3356 /* make sure transfer direction matches expected */
3357 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3358 if (do_write != i_write)
3359 goto err_out;
3360
3361 __atapi_pio_bytes(qc, bytes);
3362
3363 return;
3364
3365err_out:
3366 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3367 ap->id, dev->devno);
11a56d24 3368 qc->err_mask |= AC_ERR_HSM;
14be71f4 3369 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3370}
3371
3372/**
6f0ef4fa
RD		 3373 * ata_pio_block - start PIO on a block
3374 * @ap: the target ata_port
1da177e4
LT		 3375 *
3376 * LOCKING:
0cba632b 3377 * None. (executing in kernel thread context)
1da177e4
LT		 3378 */
3379
3380static void ata_pio_block(struct ata_port *ap)
3381{
3382 struct ata_queued_cmd *qc;
3383 u8 status;
3384
3385 /*
6f0ef4fa 3386 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3387 * Sometimes when we enter, BSY will be cleared in
3388 * a chk-status or two. If not, the drive is probably seeking
3389 * or something. Snooze for a couple msecs, then
3390 * chk-status again. If still busy, fall back to
14be71f4 3391 * HSM_ST_POLL state.
1da177e4
LT		 3392 */
3393 status = ata_busy_wait(ap, ATA_BUSY, 5);
3394 if (status & ATA_BUSY) {
3395 msleep(2);
3396 status = ata_busy_wait(ap, ATA_BUSY, 10);
3397 if (status & ATA_BUSY) {
14be71f4 3398 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3399 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3400 return;
3401 }
3402 }
3403
3404 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3405 WARN_ON(qc == NULL);
1da177e4 3406
fe79e683
AL		 3407 /* check error */
3408 if (status & (ATA_ERR | ATA_DF)) {
3409 qc->err_mask |= AC_ERR_DEV;
3410 ap->hsm_task_state = HSM_ST_ERR;
3411 return;
3412 }
3413
3414 /* transfer data if any */
1da177e4 3415 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3416 /* DRQ=0 means no more data to transfer */
1da177e4 3417 if ((status & ATA_DRQ) == 0) {
14be71f4 3418 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3419 return;
3420 }
3421
3422 atapi_pio_bytes(qc);
3423 } else {
3424 /* handle BSY=0, DRQ=0 as error */
3425 if ((status & ATA_DRQ) == 0) {
11a56d24 3426 qc->err_mask |= AC_ERR_HSM;
14be71f4 3427 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3428 return;
3429 }
3430
3431 ata_pio_sector(qc);
3432 }
3433}
3434
3435static void ata_pio_error(struct ata_port *ap)
3436{
3437 struct ata_queued_cmd *qc;
a7dac447 3438
1da177e4 3439 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3440 WARN_ON(qc == NULL);
1da177e4 3441
0565c26d
AL		 3442 if (qc->tf.command != ATA_CMD_PACKET)
3443 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3444
1c848984
AL		 3445 /* make sure qc->err_mask is available to
3446 * know what's wrong and recover
3447 */
a4631474 3448 WARN_ON(qc->err_mask == 0);
1c848984 3449
14be71f4 3450 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3451
a22e2eb0 3452 ata_poll_qc_complete(qc);
1da177e4
LT		 3453}
3454
3455static void ata_pio_task(void *_data)
3456{
3457 struct ata_port *ap = _data;
7fb6ec28
JG		 3458 unsigned long timeout;
3459 int qc_completed;
3460
3461fsm_start:
3462 timeout = 0;
3463 qc_completed = 0;
1da177e4 3464
14be71f4
AL		 3465 switch (ap->hsm_task_state) {
3466 case HSM_ST_IDLE:
1da177e4
LT		 3467 return;
3468
14be71f4 3469 case HSM_ST:
1da177e4
LT		 3470 ata_pio_block(ap);
3471 break;
3472
14be71f4 3473 case HSM_ST_LAST:
7fb6ec28 3474 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3475 break;
3476
14be71f4
AL		 3477 case HSM_ST_POLL:
3478 case HSM_ST_LAST_POLL:
1da177e4
LT		 3479 timeout = ata_pio_poll(ap);
3480 break;
3481
14be71f4
AL		 3482 case HSM_ST_TMOUT:
3483 case HSM_ST_ERR:
1da177e4
LT		 3484 ata_pio_error(ap);
3485 return;
3486 }
3487
3488 if (timeout)
95064379 3489 ata_queue_delayed_pio_task(ap, timeout);
7fb6ec28
JG		 3490 else if (!qc_completed)
3491 goto fsm_start;
1da177e4
LT		 3492}
3493
1da177e4
LT		 3494/**
3495 * ata_qc_timeout - Handle timeout of queued command
3496 * @qc: Command that timed out
3497 *
3498 * Some part of the kernel (currently, only the SCSI layer)
3499 * has noticed that the active command on port @ap has not
3500 * completed after a specified length of time. Handle this
3501 * condition by disabling DMA (if necessary) and completing
3502 * transactions, with error if necessary.
3503 *
3504 * This also handles the case of the "lost interrupt", where
3505 * for some reason (possibly hardware bug, possibly driver bug)
3506 * an interrupt was not delivered to the driver, even though the
3507 * transaction completed successfully.
3508 *
3509 * LOCKING:
0cba632b 3510 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3511 */
3512
3513static void ata_qc_timeout(struct ata_queued_cmd *qc)
3514{
3515 struct ata_port *ap = qc->ap;
b8f6153e 3516 struct ata_host_set *host_set = ap->host_set;
1da177e4 3517 u8 host_stat = 0, drv_stat;
b8f6153e 3518 unsigned long flags;
1da177e4
LT		 3519
3520 DPRINTK("ENTER\n");
3521
c18d06f8
TH		 3522 ata_flush_pio_tasks(ap);
3523 ap->hsm_task_state = HSM_ST_IDLE;
3524
b8f6153e
JG		 3525 spin_lock_irqsave(&host_set->lock, flags);
3526
1da177e4
LT		 3527 switch (qc->tf.protocol) {
3528
3529 case ATA_PROT_DMA:
3530 case ATA_PROT_ATAPI_DMA:
3531 host_stat = ap->ops->bmdma_status(ap);
3532
3533 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3534 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3535
3536 /* fall through */
3537
3538 default:
3539 ata_altstatus(ap);
3540 drv_stat = ata_chk_status(ap);
3541
3542 /* ack bmdma irq events */
3543 ap->ops->irq_clear(ap);
3544
3545 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3546 ap->id, qc->tf.command, drv_stat, host_stat);
3547
3548 /* complete taskfile transaction */
a22e2eb0 3549 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3550 break;
3551 }
b8f6153e
JG		 3552
3553 spin_unlock_irqrestore(&host_set->lock, flags);
3554
a72ec4ce
TH		 3555 ata_eh_qc_complete(qc);
3556
1da177e4
LT		 3557 DPRINTK("EXIT\n");
3558}
3559
3560/**
3561 * ata_eng_timeout - Handle timeout of queued command
3562 * @ap: Port on which timed-out command is active
3563 *
3564 * Some part of the kernel (currently, only the SCSI layer)
3565 * has noticed that the active command on port @ap has not
3566 * completed after a specified length of time. Handle this
3567 * condition by disabling DMA (if necessary) and completing
3568 * transactions, with error if necessary.
3569 *
3570 * This also handles the case of the "lost interrupt", where
3571 * for some reason (possibly hardware bug, possibly driver bug)
3572 * an interrupt was not delivered to the driver, even though the
3573 * transaction completed successfully.
3574 *
3575 * LOCKING:
3576 * Inherited from SCSI layer (none, can sleep)
3577 */
3578
3579void ata_eng_timeout(struct ata_port *ap)
3580{
1da177e4
LT		 3581 DPRINTK("ENTER\n");
3582
f6379020 3583 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3584
1da177e4
LT		 3585 DPRINTK("EXIT\n");
3586}
3587
3588/**
3589 * ata_qc_new - Request an available ATA command, for queueing
3590 * @ap: Port associated with device @dev
3591 * @dev: Device from whom we request an available command structure
3592 *
3593 * LOCKING:
0cba632b 3594 * None.
1da177e4
LT		 3595 */
3596
3597static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3598{
3599 struct ata_queued_cmd *qc = NULL;
3600 unsigned int i;
3601
3602 for (i = 0; i < ATA_MAX_QUEUE; i++)
3603 if (!test_and_set_bit(i, &ap->qactive)) {
3604 qc = ata_qc_from_tag(ap, i);
3605 break;
3606 }
3607
3608 if (qc)
3609 qc->tag = i;
3610
3611 return qc;
3612}
3613
3614/**
3615 * ata_qc_new_init - Request an available ATA command, and initialize it
3616 * @ap: Port associated with device @dev
3617 * @dev: Device from whom we request an available command structure
3618 *
3619 * LOCKING:
0cba632b 3620 * None.
1da177e4
LT		 3621 */
3622
3623struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3624 struct ata_device *dev)
3625{
3626 struct ata_queued_cmd *qc;
3627
3628 qc = ata_qc_new(ap);
3629 if (qc) {
1da177e4
LT		 3630 qc->scsicmd = NULL;
3631 qc->ap = ap;
3632 qc->dev = dev;
1da177e4 3633
2c13b7ce 3634 ata_qc_reinit(qc);
1da177e4
LT		 3635 }
3636
3637 return qc;
3638}
3639
1da177e4
LT		 3640/**
3641 * ata_qc_free - free unused ata_queued_cmd
3642 * @qc: Command to complete
3643 *
3644 * Designed to free unused ata_queued_cmd object
3645 * in case something prevents using it.
3646 *
3647 * LOCKING:
0cba632b 3648 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3649 */
3650void ata_qc_free(struct ata_queued_cmd *qc)
3651{
4ba946e9
TH		 3652 struct ata_port *ap = qc->ap;
3653 unsigned int tag;
3654
a4631474 3655 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3656
4ba946e9
TH		 3657 qc->flags = 0;
3658 tag = qc->tag;
3659 if (likely(ata_tag_valid(tag))) {
3660 if (tag == ap->active_tag)
3661 ap->active_tag = ATA_TAG_POISON;
3662 qc->tag = ATA_TAG_POISON;
3663 clear_bit(tag, &ap->qactive);
3664 }
1da177e4
LT		 3665}
3666
76014427 3667void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3668{
a4631474
TH		 3669 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3670 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3671
3672 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3673 ata_sg_clean(qc);
3674
3f3791d3
AL		 3675 /* atapi: mark qc as inactive to prevent the interrupt handler
3676 * from completing the command twice later, before the error handler
3677 * is called. (when rc != 0 and atapi request sense is needed)
3678 */
3679 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3680
1da177e4 3681 /* call completion callback */
77853bf2 3682 qc->complete_fn(qc);
1da177e4
LT		 3683}
3684
3685static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3686{
3687 struct ata_port *ap = qc->ap;
3688
3689 switch (qc->tf.protocol) {
3690 case ATA_PROT_DMA:
3691 case ATA_PROT_ATAPI_DMA:
3692 return 1;
3693
3694 case ATA_PROT_ATAPI:
3695 case ATA_PROT_PIO:
3696 case ATA_PROT_PIO_MULT:
3697 if (ap->flags & ATA_FLAG_PIO_DMA)
3698 return 1;
3699
3700 /* fall through */
3701
3702 default:
3703 return 0;
3704 }
3705
3706 /* never reached */
3707}
3708
3709/**
3710 * ata_qc_issue - issue taskfile to device
3711 * @qc: command to issue to device
3712 *
3713 * Prepare an ATA command to submission to device.
3714 * This includes mapping the data into a DMA-able
3715 * area, filling in the S/G table, and finally
3716 * writing the taskfile to hardware, starting the command.
3717 *
3718 * LOCKING:
3719 * spin_lock_irqsave(host_set lock)
3720 *
3721 * RETURNS:
9a3d9eb0 3722 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3723 */
3724
9a3d9eb0 3725unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3726{
3727 struct ata_port *ap = qc->ap;
3728
3729 if (ata_should_dma_map(qc)) {
3730 if (qc->flags & ATA_QCFLAG_SG) {
3731 if (ata_sg_setup(qc))
8e436af9 3732 goto sg_err;
1da177e4
LT		 3733 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3734 if (ata_sg_setup_one(qc))
8e436af9 3735 goto sg_err;
1da177e4
LT		 3736 }
3737 } else {
3738 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3739 }
3740
3741 ap->ops->qc_prep(qc);
3742
3743 qc->ap->active_tag = qc->tag;
3744 qc->flags |= ATA_QCFLAG_ACTIVE;
3745
3746 return ap->ops->qc_issue(qc);
3747
8e436af9
TH		 3748sg_err:
3749 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 3750 return AC_ERR_SYSTEM;
1da177e4
LT		 3751}
3752
0baab86b 3753
1da177e4
LT		 3754/**
3755 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3756 * @qc: command to issue to device
3757 *
3758 * Using various libata functions and hooks, this function
3759 * starts an ATA command. ATA commands are grouped into
3760 * classes called "protocols", and issuing each type of protocol
3761 * is slightly different.
3762 *
0baab86b
EF		 3763 * May be used as the qc_issue() entry in ata_port_operations.
3764 *
1da177e4
LT		 3765 * LOCKING:
3766 * spin_lock_irqsave(host_set lock)
3767 *
3768 * RETURNS:
9a3d9eb0 3769 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3770 */
3771
9a3d9eb0 3772unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 3773{
3774 struct ata_port *ap = qc->ap;
3775
3776 ata_dev_select(ap, qc->dev->devno, 1, 0);
3777
3778 switch (qc->tf.protocol) {
3779 case ATA_PROT_NODATA:
e5338254 3780 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 3781 break;
3782
3783 case ATA_PROT_DMA:
3784 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3785 ap->ops->bmdma_setup(qc); /* set up bmdma */
3786 ap->ops->bmdma_start(qc); /* initiate bmdma */
3787 break;
3788
3789 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3790 ata_qc_set_polling(qc);
e5338254 3791 ata_tf_to_host(ap, &qc->tf);
14be71f4 3792 ap->hsm_task_state = HSM_ST;
95064379 3793 ata_queue_pio_task(ap);
1da177e4
LT		 3794 break;
3795
3796 case ATA_PROT_ATAPI:
3797 ata_qc_set_polling(qc);
e5338254 3798 ata_tf_to_host(ap, &qc->tf);
95064379 3799 ata_queue_packet_task(ap);
1da177e4
LT		 3800 break;
3801
3802 case ATA_PROT_ATAPI_NODATA:
c1389503 3803 ap->flags |= ATA_FLAG_NOINTR;
e5338254 3804 ata_tf_to_host(ap, &qc->tf);
95064379 3805 ata_queue_packet_task(ap);
1da177e4
LT		 3806 break;
3807
3808 case ATA_PROT_ATAPI_DMA:
c1389503 3809 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 3810 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3811 ap->ops->bmdma_setup(qc); /* set up bmdma */
95064379 3812 ata_queue_packet_task(ap);
1da177e4
LT		 3813 break;
3814
3815 default:
3816 WARN_ON(1);
9a3d9eb0 3817 return AC_ERR_SYSTEM;
1da177e4
LT		 3818 }
3819
3820 return 0;
3821}
3822
3823/**
0baab86b 3824 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 3825 * @qc: Info associated with this ATA transaction.
3826 *
3827 * LOCKING:
3828 * spin_lock_irqsave(host_set lock)
3829 */
3830
3831static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3832{
3833 struct ata_port *ap = qc->ap;
3834 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3835 u8 dmactl;
3836 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3837
3838 /* load PRD table addr. */
3839 mb(); /* make sure PRD table writes are visible to controller */
3840 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3841
3842 /* specify data direction, triple-check start bit is clear */
3843 dmactl = readb(mmio + ATA_DMA_CMD);
3844 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3845 if (!rw)
3846 dmactl |= ATA_DMA_WR;
3847 writeb(dmactl, mmio + ATA_DMA_CMD);
3848
3849 /* issue r/w command */
3850 ap->ops->exec_command(ap, &qc->tf);
3851}
3852
3853/**
b73fc89f 3854 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 3855 * @qc: Info associated with this ATA transaction.
3856 *
3857 * LOCKING:
3858 * spin_lock_irqsave(host_set lock)
3859 */
3860
3861static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3862{
3863 struct ata_port *ap = qc->ap;
3864 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3865 u8 dmactl;
3866
3867 /* start host DMA transaction */
3868 dmactl = readb(mmio + ATA_DMA_CMD);
3869 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3870
3871 /* Strictly, one may wish to issue a readb() here, to
3872 * flush the mmio write. However, control also passes
3873 * to the hardware at this point, and it will interrupt
3874 * us when we are to resume control. So, in effect,
3875 * we don't care when the mmio write flushes.
3876 * Further, a read of the DMA status register _immediately_
3877 * following the write may not be what certain flaky hardware
3878 * is expected, so I think it is best to not add a readb()
3879 * without first all the MMIO ATA cards/mobos.
3880 * Or maybe I'm just being paranoid.
3881 */
3882}
3883
3884/**
3885 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3886 * @qc: Info associated with this ATA transaction.
3887 *
3888 * LOCKING:
3889 * spin_lock_irqsave(host_set lock)
3890 */
3891
3892static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3893{
3894 struct ata_port *ap = qc->ap;
3895 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3896 u8 dmactl;
3897
3898 /* load PRD table addr. */
3899 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3900
3901 /* specify data direction, triple-check start bit is clear */
3902 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3903 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3904 if (!rw)
3905 dmactl |= ATA_DMA_WR;
3906 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3907
3908 /* issue r/w command */
3909 ap->ops->exec_command(ap, &qc->tf);
3910}
3911
3912/**
3913 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3914 * @qc: Info associated with this ATA transaction.
3915 *
3916 * LOCKING:
3917 * spin_lock_irqsave(host_set lock)
3918 */
3919
3920static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3921{
3922 struct ata_port *ap = qc->ap;
3923 u8 dmactl;
3924
3925 /* start host DMA transaction */
3926 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3927 outb(dmactl | ATA_DMA_START,
3928 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3929}
3930
0baab86b
EF		 3931
3932/**
3933 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3934 * @qc: Info associated with this ATA transaction.
3935 *
3936 * Writes the ATA_DMA_START flag to the DMA command register.
3937 *
3938 * May be used as the bmdma_start() entry in ata_port_operations.
3939 *
3940 * LOCKING:
3941 * spin_lock_irqsave(host_set lock)
3942 */
1da177e4
LT		 3943void ata_bmdma_start(struct ata_queued_cmd *qc)
3944{
3945 if (qc->ap->flags & ATA_FLAG_MMIO)
3946 ata_bmdma_start_mmio(qc);
3947 else
3948 ata_bmdma_start_pio(qc);
3949}
3950
0baab86b
EF		 3951
3952/**
3953 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3954 * @qc: Info associated with this ATA transaction.
3955 *
3956 * Writes address of PRD table to device's PRD Table Address
3957 * register, sets the DMA control register, and calls
3958 * ops->exec_command() to start the transfer.
3959 *
3960 * May be used as the bmdma_setup() entry in ata_port_operations.
3961 *
3962 * LOCKING:
3963 * spin_lock_irqsave(host_set lock)
3964 */
1da177e4
LT		 3965void ata_bmdma_setup(struct ata_queued_cmd *qc)
3966{
3967 if (qc->ap->flags & ATA_FLAG_MMIO)
3968 ata_bmdma_setup_mmio(qc);
3969 else
3970 ata_bmdma_setup_pio(qc);
3971}
3972
0baab86b
EF		 3973
3974/**
3975 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 3976 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3977 *
3978 * Clear interrupt and error flags in DMA status register.
3979 *
3980 * May be used as the irq_clear() entry in ata_port_operations.
3981 *
3982 * LOCKING:
3983 * spin_lock_irqsave(host_set lock)
3984 */
3985
1da177e4
LT		 3986void ata_bmdma_irq_clear(struct ata_port *ap)
3987{
3988 if (ap->flags & ATA_FLAG_MMIO) {
3989 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3990 writeb(readb(mmio), mmio);
3991 } else {
3992 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3993 outb(inb(addr), addr);
3994 }
3995
3996}
3997
0baab86b
EF		 3998
3999/**
4000 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 4001 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4002 *
4003 * Read and return BMDMA status register.
4004 *
4005 * May be used as the bmdma_status() entry in ata_port_operations.
4006 *
4007 * LOCKING:
4008 * spin_lock_irqsave(host_set lock)
4009 */
4010
1da177e4
LT		 4011u8 ata_bmdma_status(struct ata_port *ap)
4012{
4013 u8 host_stat;
4014 if (ap->flags & ATA_FLAG_MMIO) {
4015 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4016 host_stat = readb(mmio + ATA_DMA_STATUS);
4017 } else
ee500aab 4018 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 4019 return host_stat;
4020}
4021
0baab86b
EF		 4022
4023/**
4024 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4025 * @qc: Command we are ending DMA for
0baab86b
EF		 4026 *
4027 * Clears the ATA_DMA_START flag in the dma control register
4028 *
4029 * May be used as the bmdma_stop() entry in ata_port_operations.
4030 *
4031 * LOCKING:
4032 * spin_lock_irqsave(host_set lock)
4033 */
4034
b73fc89f 4035void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4036{
b73fc89f 4037 struct ata_port *ap = qc->ap;
1da177e4
LT		 4038 if (ap->flags & ATA_FLAG_MMIO) {
4039 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4040
4041 /* clear start/stop bit */
4042 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4043 mmio + ATA_DMA_CMD);
4044 } else {
4045 /* clear start/stop bit */
4046 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4047 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4048 }
4049
4050 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4051 ata_altstatus(ap); /* dummy read */
4052}
4053
4054/**
4055 * ata_host_intr - Handle host interrupt for given (port, task)
4056 * @ap: Port on which interrupt arrived (possibly...)
4057 * @qc: Taskfile currently active in engine
4058 *
4059 * Handle host interrupt for given queued command. Currently,
4060 * only DMA interrupts are handled. All other commands are
4061 * handled via polling with interrupts disabled (nIEN bit).
4062 *
4063 * LOCKING:
4064 * spin_lock_irqsave(host_set lock)
4065 *
4066 * RETURNS:
4067 * One if interrupt was handled, zero if not (shared irq).
4068 */
4069
4070inline unsigned int ata_host_intr (struct ata_port *ap,
4071 struct ata_queued_cmd *qc)
4072{
4073 u8 status, host_stat;
4074
4075 switch (qc->tf.protocol) {
4076
4077 case ATA_PROT_DMA:
4078 case ATA_PROT_ATAPI_DMA:
4079 case ATA_PROT_ATAPI:
4080 /* check status of DMA engine */
4081 host_stat = ap->ops->bmdma_status(ap);
4082 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4083
4084 /* if it's not our irq... */
4085 if (!(host_stat & ATA_DMA_INTR))
4086 goto idle_irq;
4087
4088 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4089 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4090
4091 /* fall through */
4092
4093 case ATA_PROT_ATAPI_NODATA:
4094 case ATA_PROT_NODATA:
4095 /* check altstatus */
4096 status = ata_altstatus(ap);
4097 if (status & ATA_BUSY)
4098 goto idle_irq;
4099
4100 /* check main status, clearing INTRQ */
4101 status = ata_chk_status(ap);
4102 if (unlikely(status & ATA_BUSY))
4103 goto idle_irq;
4104 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4105 ap->id, qc->tf.protocol, status);
4106
4107 /* ack bmdma irq events */
4108 ap->ops->irq_clear(ap);
4109
4110 /* complete taskfile transaction */
a22e2eb0
AL		 4111 qc->err_mask |= ac_err_mask(status);
4112 ata_qc_complete(qc);
1da177e4
LT		 4113 break;
4114
4115 default:
4116 goto idle_irq;
4117 }
4118
4119 return 1; /* irq handled */
4120
4121idle_irq:
4122 ap->stats.idle_irq++;
4123
4124#ifdef ATA_IRQ_TRAP
4125 if ((ap->stats.idle_irq % 1000) == 0) {
4126 handled = 1;
4127 ata_irq_ack(ap, 0); /* debug trap */
4128 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4129 }
4130#endif
4131 return 0; /* irq not handled */
4132}
4133
4134/**
4135 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4136 * @irq: irq line (unused)
4137 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4138 * @regs: unused
4139 *
0cba632b
JG		 4140 * Default interrupt handler for PCI IDE devices. Calls
4141 * ata_host_intr() for each port that is not disabled.
4142 *
1da177e4 4143 * LOCKING:
0cba632b 4144 * Obtains host_set lock during operation.
1da177e4
LT		 4145 *
4146 * RETURNS:
0cba632b 4147 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4148 */
4149
4150irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4151{
4152 struct ata_host_set *host_set = dev_instance;
4153 unsigned int i;
4154 unsigned int handled = 0;
4155 unsigned long flags;
4156
4157 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4158 spin_lock_irqsave(&host_set->lock, flags);
4159
4160 for (i = 0; i < host_set->n_ports; i++) {
4161 struct ata_port *ap;
4162
4163 ap = host_set->ports[i];
c1389503
TH		 4164 if (ap &&
4165 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4166 struct ata_queued_cmd *qc;
4167
4168 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4169 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4170 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4171 handled |= ata_host_intr(ap, qc);
4172 }
4173 }
4174
4175 spin_unlock_irqrestore(&host_set->lock, flags);
4176
4177 return IRQ_RETVAL(handled);
4178}
4179
4180/**
4181 * atapi_packet_task - Write CDB bytes to hardware
4182 * @_data: Port to which ATAPI device is attached.
4183 *
4184 * When device has indicated its readiness to accept
4185 * a CDB, this function is called. Send the CDB.
4186 * If DMA is to be performed, exit immediately.
4187 * Otherwise, we are in polling mode, so poll
4188 * status under operation succeeds or fails.
4189 *
4190 * LOCKING:
4191 * Kernel thread context (may sleep)
4192 */
4193
4194static void atapi_packet_task(void *_data)
4195{
4196 struct ata_port *ap = _data;
4197 struct ata_queued_cmd *qc;
4198 u8 status;
4199
4200 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474
TH		 4201 WARN_ON(qc == NULL);
4202 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4203
4204 /* sleep-wait for BSY to clear */
4205 DPRINTK("busy wait\n");
d8fe452b 4206 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
11a56d24 4207 qc->err_mask |= AC_ERR_TIMEOUT;
d8fe452b
AL		 4208 goto err_out;
4209 }
1da177e4
LT		 4210
4211 /* make sure DRQ is set */
4212 status = ata_chk_status(ap);
d8fe452b 4213 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
11a56d24 4214 qc->err_mask |= AC_ERR_HSM;
1da177e4 4215 goto err_out;
d8fe452b 4216 }
1da177e4
LT		 4217
4218 /* send SCSI cdb */
4219 DPRINTK("send cdb\n");
6e7846e9 4220 WARN_ON(qc->dev->cdb_len < 12);
1da177e4 4221
c1389503
TH		 4222 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4223 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4224 unsigned long flags;
1da177e4 4225
c1389503
TH		 4226 /* Once we're done issuing command and kicking bmdma,
4227 * irq handler takes over. To not lose irq, we need
4228 * to clear NOINTR flag before sending cdb, but
4229 * interrupt handler shouldn't be invoked before we're
4230 * finished. Hence, the following locking.
4231 */
4232 spin_lock_irqsave(&ap->host_set->lock, flags);
4233 ap->flags &= ~ATA_FLAG_NOINTR;
6e7846e9 4234 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
c1389503
TH		 4235 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4236 ap->ops->bmdma_start(qc); /* initiate bmdma */
4237 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4238 } else {
6e7846e9 4239 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
1da177e4 4240
c1389503 4241 /* PIO commands are handled by polling */
14be71f4 4242 ap->hsm_task_state = HSM_ST;
95064379 4243 ata_queue_pio_task(ap);
1da177e4
LT		 4244 }
4245
4246 return;
4247
4248err_out:
a22e2eb0 4249 ata_poll_qc_complete(qc);
1da177e4
LT		 4250}
4251
0baab86b 4252
9b847548
JA		 4253/*
4254 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4255 * without filling any other registers
4256 */
4257static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4258 u8 cmd)
4259{
4260 struct ata_taskfile tf;
4261 int err;
4262
4263 ata_tf_init(ap, &tf, dev->devno);
4264
4265 tf.command = cmd;
4266 tf.flags |= ATA_TFLAG_DEVICE;
4267 tf.protocol = ATA_PROT_NODATA;
4268
4269 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4270 if (err)
4271 printk(KERN_ERR "%s: ata command failed: %d\n",
4272 __FUNCTION__, err);
4273
4274 return err;
4275}
4276
4277static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4278{
4279 u8 cmd;
4280
4281 if (!ata_try_flush_cache(dev))
4282 return 0;
4283
4284 if (ata_id_has_flush_ext(dev->id))
4285 cmd = ATA_CMD_FLUSH_EXT;
4286 else
4287 cmd = ATA_CMD_FLUSH;
4288
4289 return ata_do_simple_cmd(ap, dev, cmd);
4290}
4291
4292static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4293{
4294 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4295}
4296
4297static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4298{
4299 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4300}
4301
4302/**
4303 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4304 * @ap: port the device is connected to
4305 * @dev: the device to resume
9b847548
JA		 4306 *
4307 * Kick the drive back into action, by sending it an idle immediate
4308 * command and making sure its transfer mode matches between drive
4309 * and host.
4310 *
4311 */
4312int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4313{
4314 if (ap->flags & ATA_FLAG_SUSPENDED) {
4315 ap->flags &= ~ATA_FLAG_SUSPENDED;
4316 ata_set_mode(ap);
4317 }
4318 if (!ata_dev_present(dev))
4319 return 0;
4320 if (dev->class == ATA_DEV_ATA)
4321 ata_start_drive(ap, dev);
4322
4323 return 0;
4324}
4325
4326/**
4327 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4328 * @ap: port the device is connected to
4329 * @dev: the device to suspend
9b847548
JA		 4330 *
4331 * Flush the cache on the drive, if appropriate, then issue a
4332 * standbynow command.
9b847548
JA		 4333 */
4334int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4335{
4336 if (!ata_dev_present(dev))
4337 return 0;
4338 if (dev->class == ATA_DEV_ATA)
4339 ata_flush_cache(ap, dev);
4340
4341 ata_standby_drive(ap, dev);
4342 ap->flags |= ATA_FLAG_SUSPENDED;
4343 return 0;
4344}
4345
c893a3ae
RD		 4346/**
4347 * ata_port_start - Set port up for dma.
4348 * @ap: Port to initialize
4349 *
4350 * Called just after data structures for each port are
4351 * initialized. Allocates space for PRD table.
4352 *
4353 * May be used as the port_start() entry in ata_port_operations.
4354 *
4355 * LOCKING:
4356 * Inherited from caller.
4357 */
4358
1da177e4
LT		 4359int ata_port_start (struct ata_port *ap)
4360{
4361 struct device *dev = ap->host_set->dev;
6037d6bb 4362 int rc;
1da177e4
LT		 4363
4364 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4365 if (!ap->prd)
4366 return -ENOMEM;
4367
6037d6bb
JG		 4368 rc = ata_pad_alloc(ap, dev);
4369 if (rc) {
cedc9a47 4370 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4371 return rc;
cedc9a47
JG		 4372 }
4373
1da177e4
LT		 4374 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4375
4376 return 0;
4377}
4378
0baab86b
EF		 4379
4380/**
4381 * ata_port_stop - Undo ata_port_start()
4382 * @ap: Port to shut down
4383 *
4384 * Frees the PRD table.
4385 *
4386 * May be used as the port_stop() entry in ata_port_operations.
4387 *
4388 * LOCKING:
6f0ef4fa 4389 * Inherited from caller.
0baab86b
EF		 4390 */
4391
1da177e4
LT		 4392void ata_port_stop (struct ata_port *ap)
4393{
4394 struct device *dev = ap->host_set->dev;
4395
4396 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4397 ata_pad_free(ap, dev);
1da177e4
LT		 4398}
4399
aa8f0dc6
JG		 4400void ata_host_stop (struct ata_host_set *host_set)
4401{
4402 if (host_set->mmio_base)
4403 iounmap(host_set->mmio_base);
4404}
4405
4406
1da177e4
LT		 4407/**
4408 * ata_host_remove - Unregister SCSI host structure with upper layers
4409 * @ap: Port to unregister
4410 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4411 *
4412 * LOCKING:
6f0ef4fa 4413 * Inherited from caller.
1da177e4
LT		 4414 */
4415
4416static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4417{
4418 struct Scsi_Host *sh = ap->host;
4419
4420 DPRINTK("ENTER\n");
4421
4422 if (do_unregister)
4423 scsi_remove_host(sh);
4424
4425 ap->ops->port_stop(ap);
4426}
4427
4428/**
4429 * ata_host_init - Initialize an ata_port structure
4430 * @ap: Structure to initialize
4431 * @host: associated SCSI mid-layer structure
4432 * @host_set: Collection of hosts to which @ap belongs
4433 * @ent: Probe information provided by low-level driver
4434 * @port_no: Port number associated with this ata_port
4435 *
0cba632b
JG		 4436 * Initialize a new ata_port structure, and its associated
4437 * scsi_host.
4438 *
1da177e4 4439 * LOCKING:
0cba632b 4440 * Inherited from caller.
1da177e4
LT		 4441 */
4442
4443static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4444 struct ata_host_set *host_set,
057ace5e 4445 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4446{
4447 unsigned int i;
4448
4449 host->max_id = 16;
4450 host->max_lun = 1;
4451 host->max_channel = 1;
4452 host->unique_id = ata_unique_id++;
4453 host->max_cmd_len = 12;
12413197 4454
1da177e4
LT		 4455 ap->flags = ATA_FLAG_PORT_DISABLED;
4456 ap->id = host->unique_id;
4457 ap->host = host;
4458 ap->ctl = ATA_DEVCTL_OBS;
4459 ap->host_set = host_set;
4460 ap->port_no = port_no;
4461 ap->hard_port_no =
4462 ent->legacy_mode ? ent->hard_port_no : port_no;
4463 ap->pio_mask = ent->pio_mask;
4464 ap->mwdma_mask = ent->mwdma_mask;
4465 ap->udma_mask = ent->udma_mask;
4466 ap->flags |= ent->host_flags;
4467 ap->ops = ent->port_ops;
4468 ap->cbl = ATA_CBL_NONE;
4469 ap->active_tag = ATA_TAG_POISON;
4470 ap->last_ctl = 0xFF;
4471
4472 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4473 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
a72ec4ce 4474 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4475
4476 for (i = 0; i < ATA_MAX_DEVICES; i++)
4477 ap->device[i].devno = i;
4478
4479#ifdef ATA_IRQ_TRAP
4480 ap->stats.unhandled_irq = 1;
4481 ap->stats.idle_irq = 1;
4482#endif
4483
4484 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4485}
4486
4487/**
4488 * ata_host_add - Attach low-level ATA driver to system
4489 * @ent: Information provided by low-level driver
4490 * @host_set: Collections of ports to which we add
4491 * @port_no: Port number associated with this host
4492 *
0cba632b
JG		 4493 * Attach low-level ATA driver to system.
4494 *
1da177e4 4495 * LOCKING:
0cba632b 4496 * PCI/etc. bus probe sem.
1da177e4
LT		 4497 *
4498 * RETURNS:
0cba632b 4499 * New ata_port on success, for NULL on error.
1da177e4
LT		 4500 */
4501
057ace5e 4502static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4503 struct ata_host_set *host_set,
4504 unsigned int port_no)
4505{
4506 struct Scsi_Host *host;
4507 struct ata_port *ap;
4508 int rc;
4509
4510 DPRINTK("ENTER\n");
4511 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4512 if (!host)
4513 return NULL;
4514
4515 ap = (struct ata_port *) &host->hostdata[0];
4516
4517 ata_host_init(ap, host, host_set, ent, port_no);
4518
4519 rc = ap->ops->port_start(ap);
4520 if (rc)
4521 goto err_out;
4522
4523 return ap;
4524
4525err_out:
4526 scsi_host_put(host);
4527 return NULL;
4528}
4529
4530/**
0cba632b
JG		 4531 * ata_device_add - Register hardware device with ATA and SCSI layers
4532 * @ent: Probe information describing hardware device to be registered
4533 *
4534 * This function processes the information provided in the probe
4535 * information struct @ent, allocates the necessary ATA and SCSI
4536 * host information structures, initializes them, and registers
4537 * everything with requisite kernel subsystems.
4538 *
4539 * This function requests irqs, probes the ATA bus, and probes
4540 * the SCSI bus.
1da177e4
LT		 4541 *
4542 * LOCKING:
0cba632b 4543 * PCI/etc. bus probe sem.
1da177e4
LT		 4544 *
4545 * RETURNS:
0cba632b 4546 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4547 */
4548
057ace5e 4549int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4550{
4551 unsigned int count = 0, i;
4552 struct device *dev = ent->dev;
4553 struct ata_host_set *host_set;
4554
4555 DPRINTK("ENTER\n");
4556 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4557 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4558 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4559 if (!host_set)
4560 return 0;
1da177e4
LT		 4561 spin_lock_init(&host_set->lock);
4562
4563 host_set->dev = dev;
4564 host_set->n_ports = ent->n_ports;
4565 host_set->irq = ent->irq;
4566 host_set->mmio_base = ent->mmio_base;
4567 host_set->private_data = ent->private_data;
4568 host_set->ops = ent->port_ops;
4569
4570 /* register each port bound to this device */
4571 for (i = 0; i < ent->n_ports; i++) {
4572 struct ata_port *ap;
4573 unsigned long xfer_mode_mask;
4574
4575 ap = ata_host_add(ent, host_set, i);
4576 if (!ap)
4577 goto err_out;
4578
4579 host_set->ports[i] = ap;
4580 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4581 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4582 (ap->pio_mask << ATA_SHIFT_PIO);
4583
4584 /* print per-port info to dmesg */
4585 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4586 "bmdma 0x%lX irq %lu\n",
4587 ap->id,
4588 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4589 ata_mode_string(xfer_mode_mask),
4590 ap->ioaddr.cmd_addr,
4591 ap->ioaddr.ctl_addr,
4592 ap->ioaddr.bmdma_addr,
4593 ent->irq);
4594
4595 ata_chk_status(ap);
4596 host_set->ops->irq_clear(ap);
4597 count++;
4598 }
4599
57f3bda8
RD		 4600 if (!count)
4601 goto err_free_ret;
1da177e4
LT		 4602
4603 /* obtain irq, that is shared between channels */
4604 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4605 DRV_NAME, host_set))
4606 goto err_out;
4607
4608 /* perform each probe synchronously */
4609 DPRINTK("probe begin\n");
4610 for (i = 0; i < count; i++) {
4611 struct ata_port *ap;
4612 int rc;
4613
4614 ap = host_set->ports[i];
4615
c893a3ae 4616 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4617 rc = ata_bus_probe(ap);
c893a3ae 4618 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4619
4620 if (rc) {
4621 /* FIXME: do something useful here?
4622 * Current libata behavior will
4623 * tear down everything when
4624 * the module is removed
4625 * or the h/w is unplugged.
4626 */
4627 }
4628
4629 rc = scsi_add_host(ap->host, dev);
4630 if (rc) {
4631 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4632 ap->id);
4633 /* FIXME: do something useful here */
4634 /* FIXME: handle unconditional calls to
4635 * scsi_scan_host and ata_host_remove, below,
4636 * at the very least
4637 */
4638 }
4639 }
4640
4641 /* probes are done, now scan each port's disk(s) */
c893a3ae 4642 DPRINTK("host probe begin\n");
1da177e4
LT		 4643 for (i = 0; i < count; i++) {
4644 struct ata_port *ap = host_set->ports[i];
4645
644dd0cc 4646 ata_scsi_scan_host(ap);
1da177e4
LT		 4647 }
4648
4649 dev_set_drvdata(dev, host_set);
4650
4651 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4652 return ent->n_ports; /* success */
4653
4654err_out:
4655 for (i = 0; i < count; i++) {
4656 ata_host_remove(host_set->ports[i], 1);
4657 scsi_host_put(host_set->ports[i]->host);
4658 }
57f3bda8 4659err_free_ret:
1da177e4
LT		 4660 kfree(host_set);
4661 VPRINTK("EXIT, returning 0\n");
4662 return 0;
4663}
4664
17b14451
AC		 4665/**
4666 * ata_host_set_remove - PCI layer callback for device removal
4667 * @host_set: ATA host set that was removed
4668 *
4669 * Unregister all objects associated with this host set. Free those
4670 * objects.
4671 *
4672 * LOCKING:
4673 * Inherited from calling layer (may sleep).
4674 */
4675
17b14451
AC		 4676void ata_host_set_remove(struct ata_host_set *host_set)
4677{
4678 struct ata_port *ap;
4679 unsigned int i;
4680
4681 for (i = 0; i < host_set->n_ports; i++) {
4682 ap = host_set->ports[i];
4683 scsi_remove_host(ap->host);
4684 }
4685
4686 free_irq(host_set->irq, host_set);
4687
4688 for (i = 0; i < host_set->n_ports; i++) {
4689 ap = host_set->ports[i];
4690
4691 ata_scsi_release(ap->host);
4692
4693 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4694 struct ata_ioports *ioaddr = &ap->ioaddr;
4695
4696 if (ioaddr->cmd_addr == 0x1f0)
4697 release_region(0x1f0, 8);
4698 else if (ioaddr->cmd_addr == 0x170)
4699 release_region(0x170, 8);
4700 }
4701
4702 scsi_host_put(ap->host);
4703 }
4704
4705 if (host_set->ops->host_stop)
4706 host_set->ops->host_stop(host_set);
4707
4708 kfree(host_set);
4709}
4710
1da177e4
LT		 4711/**
4712 * ata_scsi_release - SCSI layer callback hook for host unload
4713 * @host: libata host to be unloaded
4714 *
4715 * Performs all duties necessary to shut down a libata port...
4716 * Kill port kthread, disable port, and release resources.
4717 *
4718 * LOCKING:
4719 * Inherited from SCSI layer.
4720 *
4721 * RETURNS:
4722 * One.
4723 */
4724
4725int ata_scsi_release(struct Scsi_Host *host)
4726{
4727 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4728
4729 DPRINTK("ENTER\n");
4730
4731 ap->ops->port_disable(ap);
4732 ata_host_remove(ap, 0);
4733
4734 DPRINTK("EXIT\n");
4735 return 1;
4736}
4737
4738/**
4739 * ata_std_ports - initialize ioaddr with standard port offsets.
4740 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4741 *
4742 * Utility function which initializes data_addr, error_addr,
4743 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4744 * device_addr, status_addr, and command_addr to standard offsets
4745 * relative to cmd_addr.
4746 *
4747 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4748 */
0baab86b 4749
1da177e4
LT		 4750void ata_std_ports(struct ata_ioports *ioaddr)
4751{
4752 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4753 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4754 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4755 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4756 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4757 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4758 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4759 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4760 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4761 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4762}
4763
0baab86b 4764
374b1873
JG		 4765#ifdef CONFIG_PCI
4766
4767void ata_pci_host_stop (struct ata_host_set *host_set)
4768{
4769 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4770
4771 pci_iounmap(pdev, host_set->mmio_base);
4772}
4773
1da177e4
LT		 4774/**
4775 * ata_pci_remove_one - PCI layer callback for device removal
4776 * @pdev: PCI device that was removed
4777 *
4778 * PCI layer indicates to libata via this hook that
6f0ef4fa 4779 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4780 * Handle this by unregistering all objects associated
4781 * with this PCI device. Free those objects. Then finally
4782 * release PCI resources and disable device.
4783 *
4784 * LOCKING:
4785 * Inherited from PCI layer (may sleep).
4786 */
4787
4788void ata_pci_remove_one (struct pci_dev *pdev)
4789{
4790 struct device *dev = pci_dev_to_dev(pdev);
4791 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4792
17b14451 4793 ata_host_set_remove(host_set);
1da177e4
LT		 4794 pci_release_regions(pdev);
4795 pci_disable_device(pdev);
4796 dev_set_drvdata(dev, NULL);
4797}
4798
4799/* move to PCI subsystem */
057ace5e 4800int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4801{
4802 unsigned long tmp = 0;
4803
4804 switch (bits->width) {
4805 case 1: {
4806 u8 tmp8 = 0;
4807 pci_read_config_byte(pdev, bits->reg, &tmp8);
4808 tmp = tmp8;
4809 break;
4810 }
4811 case 2: {
4812 u16 tmp16 = 0;
4813 pci_read_config_word(pdev, bits->reg, &tmp16);
4814 tmp = tmp16;
4815 break;
4816 }
4817 case 4: {
4818 u32 tmp32 = 0;
4819 pci_read_config_dword(pdev, bits->reg, &tmp32);
4820 tmp = tmp32;
4821 break;
4822 }
4823
4824 default:
4825 return -EINVAL;
4826 }
4827
4828 tmp &= bits->mask;
4829
4830 return (tmp == bits->val) ? 1 : 0;
4831}
9b847548
JA		 4832
4833int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4834{
4835 pci_save_state(pdev);
4836 pci_disable_device(pdev);
4837 pci_set_power_state(pdev, PCI_D3hot);
4838 return 0;
4839}
4840
4841int ata_pci_device_resume(struct pci_dev *pdev)
4842{
4843 pci_set_power_state(pdev, PCI_D0);
4844 pci_restore_state(pdev);
4845 pci_enable_device(pdev);
4846 pci_set_master(pdev);
4847 return 0;
4848}
1da177e4
LT		 4849#endif /* CONFIG_PCI */
4850
4851
1da177e4
LT		 4852static int __init ata_init(void)
4853{
4854 ata_wq = create_workqueue("ata");
4855 if (!ata_wq)
4856 return -ENOMEM;
4857
4858 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4859 return 0;
4860}
4861
4862static void __exit ata_exit(void)
4863{
4864 destroy_workqueue(ata_wq);
4865}
4866
4867module_init(ata_init);
4868module_exit(ata_exit);
4869
67846b30
JG		 4870static unsigned long ratelimit_time;
4871static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4872
4873int ata_ratelimit(void)
4874{
4875 int rc;
4876 unsigned long flags;
4877
4878 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4879
4880 if (time_after(jiffies, ratelimit_time)) {
4881 rc = 1;
4882 ratelimit_time = jiffies + (HZ/5);
4883 } else
4884 rc = 0;
4885
4886 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4887
4888 return rc;
4889}
4890
1da177e4
LT		 4891/*
4892 * libata is essentially a library of internal helper functions for
4893 * low-level ATA host controller drivers. As such, the API/ABI is
4894 * likely to change as new drivers are added and updated.
4895 * Do not depend on ABI/API stability.
4896 */
4897
4898EXPORT_SYMBOL_GPL(ata_std_bios_param);
4899EXPORT_SYMBOL_GPL(ata_std_ports);
4900EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 4901EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 4902EXPORT_SYMBOL_GPL(ata_sg_init);
4903EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 4904EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 4905EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4906EXPORT_SYMBOL_GPL(ata_eng_timeout);
4907EXPORT_SYMBOL_GPL(ata_tf_load);
4908EXPORT_SYMBOL_GPL(ata_tf_read);
4909EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4910EXPORT_SYMBOL_GPL(ata_std_dev_select);
4911EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4912EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4913EXPORT_SYMBOL_GPL(ata_check_status);
4914EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 4915EXPORT_SYMBOL_GPL(ata_exec_command);
4916EXPORT_SYMBOL_GPL(ata_port_start);
4917EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 4918EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 4919EXPORT_SYMBOL_GPL(ata_interrupt);
4920EXPORT_SYMBOL_GPL(ata_qc_prep);
4921EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4922EXPORT_SYMBOL_GPL(ata_bmdma_start);
4923EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4924EXPORT_SYMBOL_GPL(ata_bmdma_status);
4925EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4926EXPORT_SYMBOL_GPL(ata_port_probe);
4927EXPORT_SYMBOL_GPL(sata_phy_reset);
4928EXPORT_SYMBOL_GPL(__sata_phy_reset);
4929EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 4930EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 4931EXPORT_SYMBOL_GPL(ata_std_softreset);
4932EXPORT_SYMBOL_GPL(sata_std_hardreset);
4933EXPORT_SYMBOL_GPL(ata_std_postreset);
4934EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 4935EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
1da177e4 4936EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 4937EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 4938EXPORT_SYMBOL_GPL(ata_busy_sleep);
1da177e4
LT		 4939EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4940EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 4941EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 4942EXPORT_SYMBOL_GPL(ata_scsi_error);
4943EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4944EXPORT_SYMBOL_GPL(ata_scsi_release);
4945EXPORT_SYMBOL_GPL(ata_host_intr);
4946EXPORT_SYMBOL_GPL(ata_dev_classify);
6a62a04d
TH		 4947EXPORT_SYMBOL_GPL(ata_id_string);
4948EXPORT_SYMBOL_GPL(ata_id_c_string);
6f2f3812 4949EXPORT_SYMBOL_GPL(ata_dev_config);
1da177e4 4950EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 4951EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
4952EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 4953
1bc4ccff 4954EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 4955EXPORT_SYMBOL_GPL(ata_timing_compute);
4956EXPORT_SYMBOL_GPL(ata_timing_merge);
4957
1da177e4
LT		 4958#ifdef CONFIG_PCI
4959EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 4960EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 4961EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4962EXPORT_SYMBOL_GPL(ata_pci_init_one);
4963EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 4964EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
4965EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 4966#endif /* CONFIG_PCI */
9b847548
JA		 4967
4968EXPORT_SYMBOL_GPL(ata_device_suspend);
4969EXPORT_SYMBOL_GPL(ata_device_resume);
4970EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
4971EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux 6.x block layer and io_uring tree(s)