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1da177e4 LT |
1 | /* |
2 | libata-core.c - helper library for ATA | |
3 | ||
4 | Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
5 | Copyright 2003-2004 Jeff Garzik | |
6 | ||
7 | The contents of this file are subject to the Open | |
8 | Software License version 1.1 that can be found at | |
9 | http://www.opensource.org/licenses/osl-1.1.txt and is included herein | |
10 | by reference. | |
11 | ||
12 | Alternatively, the contents of this file may be used under the terms | |
13 | of the GNU General Public License version 2 (the "GPL") as distributed | |
14 | in the kernel source COPYING file, in which case the provisions of | |
15 | the GPL are applicable instead of the above. If you wish to allow | |
16 | the use of your version of this file only under the terms of the | |
17 | GPL and not to allow others to use your version of this file under | |
18 | the OSL, indicate your decision by deleting the provisions above and | |
19 | replace them with the notice and other provisions required by the GPL. | |
20 | If you do not delete the provisions above, a recipient may use your | |
21 | version of this file under either the OSL or the GPL. | |
22 | ||
23 | */ | |
24 | ||
25 | #include <linux/config.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/list.h> | |
31 | #include <linux/mm.h> | |
32 | #include <linux/highmem.h> | |
33 | #include <linux/spinlock.h> | |
34 | #include <linux/blkdev.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/timer.h> | |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/completion.h> | |
39 | #include <linux/suspend.h> | |
40 | #include <linux/workqueue.h> | |
41 | #include <scsi/scsi.h> | |
42 | #include "scsi.h" | |
43 | #include "scsi_priv.h" | |
44 | #include <scsi/scsi_host.h> | |
45 | #include <linux/libata.h> | |
46 | #include <asm/io.h> | |
47 | #include <asm/semaphore.h> | |
48 | #include <asm/byteorder.h> | |
49 | ||
50 | #include "libata.h" | |
51 | ||
52 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
53 | unsigned long tmout_pat, | |
54 | unsigned long tmout); | |
55 | static void ata_set_mode(struct ata_port *ap); | |
56 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | |
57 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift); | |
58 | static int fgb(u32 bitmap); | |
59 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
60 | u8 *xfer_mode_out, | |
61 | unsigned int *xfer_shift_out); | |
62 | static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat); | |
63 | static void __ata_qc_complete(struct ata_queued_cmd *qc); | |
64 | ||
65 | static unsigned int ata_unique_id = 1; | |
66 | static struct workqueue_struct *ata_wq; | |
67 | ||
68 | MODULE_AUTHOR("Jeff Garzik"); | |
69 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
70 | MODULE_LICENSE("GPL"); | |
71 | MODULE_VERSION(DRV_VERSION); | |
72 | ||
73 | /** | |
74 | * ata_tf_load - send taskfile registers to host controller | |
75 | * @ap: Port to which output is sent | |
76 | * @tf: ATA taskfile register set | |
77 | * | |
78 | * Outputs ATA taskfile to standard ATA host controller. | |
79 | * | |
80 | * LOCKING: | |
81 | * Inherited from caller. | |
82 | */ | |
83 | ||
84 | static void ata_tf_load_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
85 | { | |
86 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
87 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
88 | ||
89 | if (tf->ctl != ap->last_ctl) { | |
90 | outb(tf->ctl, ioaddr->ctl_addr); | |
91 | ap->last_ctl = tf->ctl; | |
92 | ata_wait_idle(ap); | |
93 | } | |
94 | ||
95 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
96 | outb(tf->hob_feature, ioaddr->feature_addr); | |
97 | outb(tf->hob_nsect, ioaddr->nsect_addr); | |
98 | outb(tf->hob_lbal, ioaddr->lbal_addr); | |
99 | outb(tf->hob_lbam, ioaddr->lbam_addr); | |
100 | outb(tf->hob_lbah, ioaddr->lbah_addr); | |
101 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
102 | tf->hob_feature, | |
103 | tf->hob_nsect, | |
104 | tf->hob_lbal, | |
105 | tf->hob_lbam, | |
106 | tf->hob_lbah); | |
107 | } | |
108 | ||
109 | if (is_addr) { | |
110 | outb(tf->feature, ioaddr->feature_addr); | |
111 | outb(tf->nsect, ioaddr->nsect_addr); | |
112 | outb(tf->lbal, ioaddr->lbal_addr); | |
113 | outb(tf->lbam, ioaddr->lbam_addr); | |
114 | outb(tf->lbah, ioaddr->lbah_addr); | |
115 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
116 | tf->feature, | |
117 | tf->nsect, | |
118 | tf->lbal, | |
119 | tf->lbam, | |
120 | tf->lbah); | |
121 | } | |
122 | ||
123 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
124 | outb(tf->device, ioaddr->device_addr); | |
125 | VPRINTK("device 0x%X\n", tf->device); | |
126 | } | |
127 | ||
128 | ata_wait_idle(ap); | |
129 | } | |
130 | ||
131 | /** | |
132 | * ata_tf_load_mmio - send taskfile registers to host controller | |
133 | * @ap: Port to which output is sent | |
134 | * @tf: ATA taskfile register set | |
135 | * | |
136 | * Outputs ATA taskfile to standard ATA host controller using MMIO. | |
137 | * | |
138 | * LOCKING: | |
139 | * Inherited from caller. | |
140 | */ | |
141 | ||
142 | static void ata_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
143 | { | |
144 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
145 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
146 | ||
147 | if (tf->ctl != ap->last_ctl) { | |
148 | writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
149 | ap->last_ctl = tf->ctl; | |
150 | ata_wait_idle(ap); | |
151 | } | |
152 | ||
153 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
154 | writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr); | |
155 | writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr); | |
156 | writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr); | |
157 | writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr); | |
158 | writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr); | |
159 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
160 | tf->hob_feature, | |
161 | tf->hob_nsect, | |
162 | tf->hob_lbal, | |
163 | tf->hob_lbam, | |
164 | tf->hob_lbah); | |
165 | } | |
166 | ||
167 | if (is_addr) { | |
168 | writeb(tf->feature, (void __iomem *) ioaddr->feature_addr); | |
169 | writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr); | |
170 | writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr); | |
171 | writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr); | |
172 | writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr); | |
173 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
174 | tf->feature, | |
175 | tf->nsect, | |
176 | tf->lbal, | |
177 | tf->lbam, | |
178 | tf->lbah); | |
179 | } | |
180 | ||
181 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
182 | writeb(tf->device, (void __iomem *) ioaddr->device_addr); | |
183 | VPRINTK("device 0x%X\n", tf->device); | |
184 | } | |
185 | ||
186 | ata_wait_idle(ap); | |
187 | } | |
188 | ||
0baab86b EF |
189 | |
190 | /** | |
191 | * ata_tf_load - send taskfile registers to host controller | |
192 | * @ap: Port to which output is sent | |
193 | * @tf: ATA taskfile register set | |
194 | * | |
195 | * Outputs ATA taskfile to standard ATA host controller using MMIO | |
196 | * or PIO as indicated by the ATA_FLAG_MMIO flag. | |
197 | * Writes the control, feature, nsect, lbal, lbam, and lbah registers. | |
198 | * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect, | |
199 | * hob_lbal, hob_lbam, and hob_lbah. | |
200 | * | |
201 | * This function waits for idle (!BUSY and !DRQ) after writing | |
202 | * registers. If the control register has a new value, this | |
203 | * function also waits for idle after writing control and before | |
204 | * writing the remaining registers. | |
205 | * | |
206 | * May be used as the tf_load() entry in ata_port_operations. | |
207 | * | |
208 | * LOCKING: | |
209 | * Inherited from caller. | |
210 | */ | |
1da177e4 LT |
211 | void ata_tf_load(struct ata_port *ap, struct ata_taskfile *tf) |
212 | { | |
213 | if (ap->flags & ATA_FLAG_MMIO) | |
214 | ata_tf_load_mmio(ap, tf); | |
215 | else | |
216 | ata_tf_load_pio(ap, tf); | |
217 | } | |
218 | ||
219 | /** | |
0baab86b | 220 | * ata_exec_command_pio - issue ATA command to host controller |
1da177e4 LT |
221 | * @ap: port to which command is being issued |
222 | * @tf: ATA taskfile register set | |
223 | * | |
0baab86b | 224 | * Issues PIO write to ATA command register, with proper |
1da177e4 LT |
225 | * synchronization with interrupt handler / other threads. |
226 | * | |
227 | * LOCKING: | |
228 | * spin_lock_irqsave(host_set lock) | |
229 | */ | |
230 | ||
231 | static void ata_exec_command_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
232 | { | |
233 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
234 | ||
235 | outb(tf->command, ap->ioaddr.command_addr); | |
236 | ata_pause(ap); | |
237 | } | |
238 | ||
239 | ||
240 | /** | |
241 | * ata_exec_command_mmio - issue ATA command to host controller | |
242 | * @ap: port to which command is being issued | |
243 | * @tf: ATA taskfile register set | |
244 | * | |
245 | * Issues MMIO write to ATA command register, with proper | |
246 | * synchronization with interrupt handler / other threads. | |
247 | * | |
248 | * LOCKING: | |
249 | * spin_lock_irqsave(host_set lock) | |
250 | */ | |
251 | ||
252 | static void ata_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
253 | { | |
254 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
255 | ||
256 | writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr); | |
257 | ata_pause(ap); | |
258 | } | |
259 | ||
0baab86b EF |
260 | |
261 | /** | |
262 | * ata_exec_command - issue ATA command to host controller | |
263 | * @ap: port to which command is being issued | |
264 | * @tf: ATA taskfile register set | |
265 | * | |
266 | * Issues PIO/MMIO write to ATA command register, with proper | |
267 | * synchronization with interrupt handler / other threads. | |
268 | * | |
269 | * LOCKING: | |
270 | * spin_lock_irqsave(host_set lock) | |
271 | */ | |
1da177e4 LT |
272 | void ata_exec_command(struct ata_port *ap, struct ata_taskfile *tf) |
273 | { | |
274 | if (ap->flags & ATA_FLAG_MMIO) | |
275 | ata_exec_command_mmio(ap, tf); | |
276 | else | |
277 | ata_exec_command_pio(ap, tf); | |
278 | } | |
279 | ||
280 | /** | |
281 | * ata_exec - issue ATA command to host controller | |
282 | * @ap: port to which command is being issued | |
283 | * @tf: ATA taskfile register set | |
284 | * | |
285 | * Issues PIO/MMIO write to ATA command register, with proper | |
286 | * synchronization with interrupt handler / other threads. | |
287 | * | |
288 | * LOCKING: | |
289 | * Obtains host_set lock. | |
290 | */ | |
291 | ||
292 | static inline void ata_exec(struct ata_port *ap, struct ata_taskfile *tf) | |
293 | { | |
294 | unsigned long flags; | |
295 | ||
296 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
297 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
298 | ap->ops->exec_command(ap, tf); | |
299 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
300 | } | |
301 | ||
302 | /** | |
303 | * ata_tf_to_host - issue ATA taskfile to host controller | |
304 | * @ap: port to which command is being issued | |
305 | * @tf: ATA taskfile register set | |
306 | * | |
307 | * Issues ATA taskfile register set to ATA host controller, | |
308 | * with proper synchronization with interrupt handler and | |
309 | * other threads. | |
310 | * | |
311 | * LOCKING: | |
312 | * Obtains host_set lock. | |
313 | */ | |
314 | ||
315 | static void ata_tf_to_host(struct ata_port *ap, struct ata_taskfile *tf) | |
316 | { | |
317 | ap->ops->tf_load(ap, tf); | |
318 | ||
319 | ata_exec(ap, tf); | |
320 | } | |
321 | ||
322 | /** | |
323 | * ata_tf_to_host_nolock - issue ATA taskfile to host controller | |
324 | * @ap: port to which command is being issued | |
325 | * @tf: ATA taskfile register set | |
326 | * | |
327 | * Issues ATA taskfile register set to ATA host controller, | |
328 | * with proper synchronization with interrupt handler and | |
329 | * other threads. | |
330 | * | |
331 | * LOCKING: | |
332 | * spin_lock_irqsave(host_set lock) | |
333 | */ | |
334 | ||
335 | void ata_tf_to_host_nolock(struct ata_port *ap, struct ata_taskfile *tf) | |
336 | { | |
337 | ap->ops->tf_load(ap, tf); | |
338 | ap->ops->exec_command(ap, tf); | |
339 | } | |
340 | ||
341 | /** | |
0baab86b | 342 | * ata_tf_read_pio - input device's ATA taskfile shadow registers |
1da177e4 LT |
343 | * @ap: Port from which input is read |
344 | * @tf: ATA taskfile register set for storing input | |
345 | * | |
346 | * Reads ATA taskfile registers for currently-selected device | |
347 | * into @tf. | |
348 | * | |
349 | * LOCKING: | |
350 | * Inherited from caller. | |
351 | */ | |
352 | ||
353 | static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
354 | { | |
355 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
356 | ||
357 | tf->nsect = inb(ioaddr->nsect_addr); | |
358 | tf->lbal = inb(ioaddr->lbal_addr); | |
359 | tf->lbam = inb(ioaddr->lbam_addr); | |
360 | tf->lbah = inb(ioaddr->lbah_addr); | |
361 | tf->device = inb(ioaddr->device_addr); | |
362 | ||
363 | if (tf->flags & ATA_TFLAG_LBA48) { | |
364 | outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); | |
365 | tf->hob_feature = inb(ioaddr->error_addr); | |
366 | tf->hob_nsect = inb(ioaddr->nsect_addr); | |
367 | tf->hob_lbal = inb(ioaddr->lbal_addr); | |
368 | tf->hob_lbam = inb(ioaddr->lbam_addr); | |
369 | tf->hob_lbah = inb(ioaddr->lbah_addr); | |
370 | } | |
371 | } | |
372 | ||
373 | /** | |
374 | * ata_tf_read_mmio - input device's ATA taskfile shadow registers | |
375 | * @ap: Port from which input is read | |
376 | * @tf: ATA taskfile register set for storing input | |
377 | * | |
378 | * Reads ATA taskfile registers for currently-selected device | |
379 | * into @tf via MMIO. | |
380 | * | |
381 | * LOCKING: | |
382 | * Inherited from caller. | |
383 | */ | |
384 | ||
385 | static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
386 | { | |
387 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
388 | ||
389 | tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
390 | tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
391 | tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
392 | tf->lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
393 | tf->device = readb((void __iomem *)ioaddr->device_addr); | |
394 | ||
395 | if (tf->flags & ATA_TFLAG_LBA48) { | |
396 | writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr); | |
397 | tf->hob_feature = readb((void __iomem *)ioaddr->error_addr); | |
398 | tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
399 | tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
400 | tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
401 | tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
402 | } | |
403 | } | |
404 | ||
0baab86b EF |
405 | |
406 | /** | |
407 | * ata_tf_read - input device's ATA taskfile shadow registers | |
408 | * @ap: Port from which input is read | |
409 | * @tf: ATA taskfile register set for storing input | |
410 | * | |
411 | * Reads ATA taskfile registers for currently-selected device | |
412 | * into @tf. | |
413 | * | |
414 | * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48 | |
415 | * is set, also reads the hob registers. | |
416 | * | |
417 | * May be used as the tf_read() entry in ata_port_operations. | |
418 | * | |
419 | * LOCKING: | |
420 | * Inherited from caller. | |
421 | */ | |
1da177e4 LT |
422 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
423 | { | |
424 | if (ap->flags & ATA_FLAG_MMIO) | |
425 | ata_tf_read_mmio(ap, tf); | |
426 | else | |
427 | ata_tf_read_pio(ap, tf); | |
428 | } | |
429 | ||
430 | /** | |
431 | * ata_check_status_pio - Read device status reg & clear interrupt | |
432 | * @ap: port where the device is | |
433 | * | |
434 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 435 | * and return its value. This also clears pending interrupts |
1da177e4 LT |
436 | * from this device |
437 | * | |
438 | * LOCKING: | |
439 | * Inherited from caller. | |
440 | */ | |
441 | static u8 ata_check_status_pio(struct ata_port *ap) | |
442 | { | |
443 | return inb(ap->ioaddr.status_addr); | |
444 | } | |
445 | ||
446 | /** | |
447 | * ata_check_status_mmio - Read device status reg & clear interrupt | |
448 | * @ap: port where the device is | |
449 | * | |
450 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 451 | * via MMIO and return its value. This also clears pending interrupts |
1da177e4 LT |
452 | * from this device |
453 | * | |
454 | * LOCKING: | |
455 | * Inherited from caller. | |
456 | */ | |
457 | static u8 ata_check_status_mmio(struct ata_port *ap) | |
458 | { | |
459 | return readb((void __iomem *) ap->ioaddr.status_addr); | |
460 | } | |
461 | ||
0baab86b EF |
462 | |
463 | /** | |
464 | * ata_check_status - Read device status reg & clear interrupt | |
465 | * @ap: port where the device is | |
466 | * | |
467 | * Reads ATA taskfile status register for currently-selected device | |
468 | * and return its value. This also clears pending interrupts | |
469 | * from this device | |
470 | * | |
471 | * May be used as the check_status() entry in ata_port_operations. | |
472 | * | |
473 | * LOCKING: | |
474 | * Inherited from caller. | |
475 | */ | |
1da177e4 LT |
476 | u8 ata_check_status(struct ata_port *ap) |
477 | { | |
478 | if (ap->flags & ATA_FLAG_MMIO) | |
479 | return ata_check_status_mmio(ap); | |
480 | return ata_check_status_pio(ap); | |
481 | } | |
482 | ||
0baab86b EF |
483 | |
484 | /** | |
485 | * ata_altstatus - Read device alternate status reg | |
486 | * @ap: port where the device is | |
487 | * | |
488 | * Reads ATA taskfile alternate status register for | |
489 | * currently-selected device and return its value. | |
490 | * | |
491 | * Note: may NOT be used as the check_altstatus() entry in | |
492 | * ata_port_operations. | |
493 | * | |
494 | * LOCKING: | |
495 | * Inherited from caller. | |
496 | */ | |
1da177e4 LT |
497 | u8 ata_altstatus(struct ata_port *ap) |
498 | { | |
499 | if (ap->ops->check_altstatus) | |
500 | return ap->ops->check_altstatus(ap); | |
501 | ||
502 | if (ap->flags & ATA_FLAG_MMIO) | |
503 | return readb((void __iomem *)ap->ioaddr.altstatus_addr); | |
504 | return inb(ap->ioaddr.altstatus_addr); | |
505 | } | |
506 | ||
0baab86b EF |
507 | |
508 | /** | |
509 | * ata_chk_err - Read device error reg | |
510 | * @ap: port where the device is | |
511 | * | |
512 | * Reads ATA taskfile error register for | |
513 | * currently-selected device and return its value. | |
514 | * | |
515 | * Note: may NOT be used as the check_err() entry in | |
516 | * ata_port_operations. | |
517 | * | |
518 | * LOCKING: | |
519 | * Inherited from caller. | |
520 | */ | |
1da177e4 LT |
521 | u8 ata_chk_err(struct ata_port *ap) |
522 | { | |
523 | if (ap->ops->check_err) | |
524 | return ap->ops->check_err(ap); | |
525 | ||
526 | if (ap->flags & ATA_FLAG_MMIO) { | |
527 | return readb((void __iomem *) ap->ioaddr.error_addr); | |
528 | } | |
529 | return inb(ap->ioaddr.error_addr); | |
530 | } | |
531 | ||
532 | /** | |
533 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
534 | * @tf: Taskfile to convert | |
535 | * @fis: Buffer into which data will output | |
536 | * @pmp: Port multiplier port | |
537 | * | |
538 | * Converts a standard ATA taskfile to a Serial ATA | |
539 | * FIS structure (Register - Host to Device). | |
540 | * | |
541 | * LOCKING: | |
542 | * Inherited from caller. | |
543 | */ | |
544 | ||
545 | void ata_tf_to_fis(struct ata_taskfile *tf, u8 *fis, u8 pmp) | |
546 | { | |
547 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
548 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
549 | bit 7 indicates Command FIS */ | |
550 | fis[2] = tf->command; | |
551 | fis[3] = tf->feature; | |
552 | ||
553 | fis[4] = tf->lbal; | |
554 | fis[5] = tf->lbam; | |
555 | fis[6] = tf->lbah; | |
556 | fis[7] = tf->device; | |
557 | ||
558 | fis[8] = tf->hob_lbal; | |
559 | fis[9] = tf->hob_lbam; | |
560 | fis[10] = tf->hob_lbah; | |
561 | fis[11] = tf->hob_feature; | |
562 | ||
563 | fis[12] = tf->nsect; | |
564 | fis[13] = tf->hob_nsect; | |
565 | fis[14] = 0; | |
566 | fis[15] = tf->ctl; | |
567 | ||
568 | fis[16] = 0; | |
569 | fis[17] = 0; | |
570 | fis[18] = 0; | |
571 | fis[19] = 0; | |
572 | } | |
573 | ||
574 | /** | |
575 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
576 | * @fis: Buffer from which data will be input | |
577 | * @tf: Taskfile to output | |
578 | * | |
579 | * Converts a standard ATA taskfile to a Serial ATA | |
580 | * FIS structure (Register - Host to Device). | |
581 | * | |
582 | * LOCKING: | |
583 | * Inherited from caller. | |
584 | */ | |
585 | ||
586 | void ata_tf_from_fis(u8 *fis, struct ata_taskfile *tf) | |
587 | { | |
588 | tf->command = fis[2]; /* status */ | |
589 | tf->feature = fis[3]; /* error */ | |
590 | ||
591 | tf->lbal = fis[4]; | |
592 | tf->lbam = fis[5]; | |
593 | tf->lbah = fis[6]; | |
594 | tf->device = fis[7]; | |
595 | ||
596 | tf->hob_lbal = fis[8]; | |
597 | tf->hob_lbam = fis[9]; | |
598 | tf->hob_lbah = fis[10]; | |
599 | ||
600 | tf->nsect = fis[12]; | |
601 | tf->hob_nsect = fis[13]; | |
602 | } | |
603 | ||
604 | /** | |
605 | * ata_prot_to_cmd - determine which read/write opcodes to use | |
606 | * @protocol: ATA_PROT_xxx taskfile protocol | |
607 | * @lba48: true is lba48 is present | |
608 | * | |
609 | * Given necessary input, determine which read/write commands | |
610 | * to use to transfer data. | |
611 | * | |
612 | * LOCKING: | |
613 | * None. | |
614 | */ | |
615 | static int ata_prot_to_cmd(int protocol, int lba48) | |
616 | { | |
617 | int rcmd = 0, wcmd = 0; | |
618 | ||
619 | switch (protocol) { | |
620 | case ATA_PROT_PIO: | |
621 | if (lba48) { | |
622 | rcmd = ATA_CMD_PIO_READ_EXT; | |
623 | wcmd = ATA_CMD_PIO_WRITE_EXT; | |
624 | } else { | |
625 | rcmd = ATA_CMD_PIO_READ; | |
626 | wcmd = ATA_CMD_PIO_WRITE; | |
627 | } | |
628 | break; | |
629 | ||
630 | case ATA_PROT_DMA: | |
631 | if (lba48) { | |
632 | rcmd = ATA_CMD_READ_EXT; | |
633 | wcmd = ATA_CMD_WRITE_EXT; | |
634 | } else { | |
635 | rcmd = ATA_CMD_READ; | |
636 | wcmd = ATA_CMD_WRITE; | |
637 | } | |
638 | break; | |
639 | ||
640 | default: | |
641 | return -1; | |
642 | } | |
643 | ||
644 | return rcmd | (wcmd << 8); | |
645 | } | |
646 | ||
647 | /** | |
648 | * ata_dev_set_protocol - set taskfile protocol and r/w commands | |
649 | * @dev: device to examine and configure | |
650 | * | |
651 | * Examine the device configuration, after we have | |
652 | * read the identify-device page and configured the | |
653 | * data transfer mode. Set internal state related to | |
654 | * the ATA taskfile protocol (pio, pio mult, dma, etc.) | |
655 | * and calculate the proper read/write commands to use. | |
656 | * | |
657 | * LOCKING: | |
658 | * caller. | |
659 | */ | |
660 | static void ata_dev_set_protocol(struct ata_device *dev) | |
661 | { | |
662 | int pio = (dev->flags & ATA_DFLAG_PIO); | |
663 | int lba48 = (dev->flags & ATA_DFLAG_LBA48); | |
664 | int proto, cmd; | |
665 | ||
666 | if (pio) | |
667 | proto = dev->xfer_protocol = ATA_PROT_PIO; | |
668 | else | |
669 | proto = dev->xfer_protocol = ATA_PROT_DMA; | |
670 | ||
671 | cmd = ata_prot_to_cmd(proto, lba48); | |
672 | if (cmd < 0) | |
673 | BUG(); | |
674 | ||
675 | dev->read_cmd = cmd & 0xff; | |
676 | dev->write_cmd = (cmd >> 8) & 0xff; | |
677 | } | |
678 | ||
679 | static const char * xfer_mode_str[] = { | |
680 | "UDMA/16", | |
681 | "UDMA/25", | |
682 | "UDMA/33", | |
683 | "UDMA/44", | |
684 | "UDMA/66", | |
685 | "UDMA/100", | |
686 | "UDMA/133", | |
687 | "UDMA7", | |
688 | "MWDMA0", | |
689 | "MWDMA1", | |
690 | "MWDMA2", | |
691 | "PIO0", | |
692 | "PIO1", | |
693 | "PIO2", | |
694 | "PIO3", | |
695 | "PIO4", | |
696 | }; | |
697 | ||
698 | /** | |
699 | * ata_udma_string - convert UDMA bit offset to string | |
700 | * @mask: mask of bits supported; only highest bit counts. | |
701 | * | |
702 | * Determine string which represents the highest speed | |
703 | * (highest bit in @udma_mask). | |
704 | * | |
705 | * LOCKING: | |
706 | * None. | |
707 | * | |
708 | * RETURNS: | |
709 | * Constant C string representing highest speed listed in | |
710 | * @udma_mask, or the constant C string "<n/a>". | |
711 | */ | |
712 | ||
713 | static const char *ata_mode_string(unsigned int mask) | |
714 | { | |
715 | int i; | |
716 | ||
717 | for (i = 7; i >= 0; i--) | |
718 | if (mask & (1 << i)) | |
719 | goto out; | |
720 | for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--) | |
721 | if (mask & (1 << i)) | |
722 | goto out; | |
723 | for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--) | |
724 | if (mask & (1 << i)) | |
725 | goto out; | |
726 | ||
727 | return "<n/a>"; | |
728 | ||
729 | out: | |
730 | return xfer_mode_str[i]; | |
731 | } | |
732 | ||
733 | /** | |
734 | * ata_pio_devchk - PATA device presence detection | |
735 | * @ap: ATA channel to examine | |
736 | * @device: Device to examine (starting at zero) | |
737 | * | |
738 | * This technique was originally described in | |
739 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
740 | * later found its way into the ATA/ATAPI spec. | |
741 | * | |
742 | * Write a pattern to the ATA shadow registers, | |
743 | * and if a device is present, it will respond by | |
744 | * correctly storing and echoing back the | |
745 | * ATA shadow register contents. | |
746 | * | |
747 | * LOCKING: | |
748 | * caller. | |
749 | */ | |
750 | ||
751 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
752 | unsigned int device) | |
753 | { | |
754 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
755 | u8 nsect, lbal; | |
756 | ||
757 | ap->ops->dev_select(ap, device); | |
758 | ||
759 | outb(0x55, ioaddr->nsect_addr); | |
760 | outb(0xaa, ioaddr->lbal_addr); | |
761 | ||
762 | outb(0xaa, ioaddr->nsect_addr); | |
763 | outb(0x55, ioaddr->lbal_addr); | |
764 | ||
765 | outb(0x55, ioaddr->nsect_addr); | |
766 | outb(0xaa, ioaddr->lbal_addr); | |
767 | ||
768 | nsect = inb(ioaddr->nsect_addr); | |
769 | lbal = inb(ioaddr->lbal_addr); | |
770 | ||
771 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
772 | return 1; /* we found a device */ | |
773 | ||
774 | return 0; /* nothing found */ | |
775 | } | |
776 | ||
777 | /** | |
778 | * ata_mmio_devchk - PATA device presence detection | |
779 | * @ap: ATA channel to examine | |
780 | * @device: Device to examine (starting at zero) | |
781 | * | |
782 | * This technique was originally described in | |
783 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
784 | * later found its way into the ATA/ATAPI spec. | |
785 | * | |
786 | * Write a pattern to the ATA shadow registers, | |
787 | * and if a device is present, it will respond by | |
788 | * correctly storing and echoing back the | |
789 | * ATA shadow register contents. | |
790 | * | |
791 | * LOCKING: | |
792 | * caller. | |
793 | */ | |
794 | ||
795 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
796 | unsigned int device) | |
797 | { | |
798 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
799 | u8 nsect, lbal; | |
800 | ||
801 | ap->ops->dev_select(ap, device); | |
802 | ||
803 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
804 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
805 | ||
806 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
807 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
808 | ||
809 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
810 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
811 | ||
812 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
813 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
814 | ||
815 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
816 | return 1; /* we found a device */ | |
817 | ||
818 | return 0; /* nothing found */ | |
819 | } | |
820 | ||
821 | /** | |
822 | * ata_devchk - PATA device presence detection | |
823 | * @ap: ATA channel to examine | |
824 | * @device: Device to examine (starting at zero) | |
825 | * | |
826 | * Dispatch ATA device presence detection, depending | |
827 | * on whether we are using PIO or MMIO to talk to the | |
828 | * ATA shadow registers. | |
829 | * | |
830 | * LOCKING: | |
831 | * caller. | |
832 | */ | |
833 | ||
834 | static unsigned int ata_devchk(struct ata_port *ap, | |
835 | unsigned int device) | |
836 | { | |
837 | if (ap->flags & ATA_FLAG_MMIO) | |
838 | return ata_mmio_devchk(ap, device); | |
839 | return ata_pio_devchk(ap, device); | |
840 | } | |
841 | ||
842 | /** | |
843 | * ata_dev_classify - determine device type based on ATA-spec signature | |
844 | * @tf: ATA taskfile register set for device to be identified | |
845 | * | |
846 | * Determine from taskfile register contents whether a device is | |
847 | * ATA or ATAPI, as per "Signature and persistence" section | |
848 | * of ATA/PI spec (volume 1, sect 5.14). | |
849 | * | |
850 | * LOCKING: | |
851 | * None. | |
852 | * | |
853 | * RETURNS: | |
854 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
855 | * the event of failure. | |
856 | */ | |
857 | ||
858 | unsigned int ata_dev_classify(struct ata_taskfile *tf) | |
859 | { | |
860 | /* Apple's open source Darwin code hints that some devices only | |
861 | * put a proper signature into the LBA mid/high registers, | |
862 | * So, we only check those. It's sufficient for uniqueness. | |
863 | */ | |
864 | ||
865 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
866 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
867 | DPRINTK("found ATA device by sig\n"); | |
868 | return ATA_DEV_ATA; | |
869 | } | |
870 | ||
871 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
872 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
873 | DPRINTK("found ATAPI device by sig\n"); | |
874 | return ATA_DEV_ATAPI; | |
875 | } | |
876 | ||
877 | DPRINTK("unknown device\n"); | |
878 | return ATA_DEV_UNKNOWN; | |
879 | } | |
880 | ||
881 | /** | |
882 | * ata_dev_try_classify - Parse returned ATA device signature | |
883 | * @ap: ATA channel to examine | |
884 | * @device: Device to examine (starting at zero) | |
885 | * | |
886 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
887 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
888 | * shadow registers, indicating the results of device detection | |
889 | * and diagnostics. | |
890 | * | |
891 | * Select the ATA device, and read the values from the ATA shadow | |
892 | * registers. Then parse according to the Error register value, | |
893 | * and the spec-defined values examined by ata_dev_classify(). | |
894 | * | |
895 | * LOCKING: | |
896 | * caller. | |
897 | */ | |
898 | ||
899 | static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device) | |
900 | { | |
901 | struct ata_device *dev = &ap->device[device]; | |
902 | struct ata_taskfile tf; | |
903 | unsigned int class; | |
904 | u8 err; | |
905 | ||
906 | ap->ops->dev_select(ap, device); | |
907 | ||
908 | memset(&tf, 0, sizeof(tf)); | |
909 | ||
910 | err = ata_chk_err(ap); | |
911 | ap->ops->tf_read(ap, &tf); | |
912 | ||
913 | dev->class = ATA_DEV_NONE; | |
914 | ||
915 | /* see if device passed diags */ | |
916 | if (err == 1) | |
917 | /* do nothing */ ; | |
918 | else if ((device == 0) && (err == 0x81)) | |
919 | /* do nothing */ ; | |
920 | else | |
921 | return err; | |
922 | ||
923 | /* determine if device if ATA or ATAPI */ | |
924 | class = ata_dev_classify(&tf); | |
925 | if (class == ATA_DEV_UNKNOWN) | |
926 | return err; | |
927 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
928 | return err; | |
929 | ||
930 | dev->class = class; | |
931 | ||
932 | return err; | |
933 | } | |
934 | ||
935 | /** | |
936 | * ata_dev_id_string - Convert IDENTIFY DEVICE page into string | |
937 | * @id: IDENTIFY DEVICE results we will examine | |
938 | * @s: string into which data is output | |
939 | * @ofs: offset into identify device page | |
940 | * @len: length of string to return. must be an even number. | |
941 | * | |
942 | * The strings in the IDENTIFY DEVICE page are broken up into | |
943 | * 16-bit chunks. Run through the string, and output each | |
944 | * 8-bit chunk linearly, regardless of platform. | |
945 | * | |
946 | * LOCKING: | |
947 | * caller. | |
948 | */ | |
949 | ||
950 | void ata_dev_id_string(u16 *id, unsigned char *s, | |
951 | unsigned int ofs, unsigned int len) | |
952 | { | |
953 | unsigned int c; | |
954 | ||
955 | while (len > 0) { | |
956 | c = id[ofs] >> 8; | |
957 | *s = c; | |
958 | s++; | |
959 | ||
960 | c = id[ofs] & 0xff; | |
961 | *s = c; | |
962 | s++; | |
963 | ||
964 | ofs++; | |
965 | len -= 2; | |
966 | } | |
967 | } | |
968 | ||
0baab86b EF |
969 | |
970 | /** | |
971 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
972 | * @ap: ATA channel to manipulate | |
973 | * @device: ATA device (numbered from zero) to select | |
974 | * | |
975 | * This function performs no actual function. | |
976 | * | |
977 | * May be used as the dev_select() entry in ata_port_operations. | |
978 | * | |
979 | * LOCKING: | |
980 | * caller. | |
981 | */ | |
1da177e4 LT |
982 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
983 | { | |
984 | } | |
985 | ||
0baab86b | 986 | |
1da177e4 LT |
987 | /** |
988 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
989 | * @ap: ATA channel to manipulate | |
990 | * @device: ATA device (numbered from zero) to select | |
991 | * | |
992 | * Use the method defined in the ATA specification to | |
993 | * make either device 0, or device 1, active on the | |
0baab86b EF |
994 | * ATA channel. Works with both PIO and MMIO. |
995 | * | |
996 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
997 | * |
998 | * LOCKING: | |
999 | * caller. | |
1000 | */ | |
1001 | ||
1002 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
1003 | { | |
1004 | u8 tmp; | |
1005 | ||
1006 | if (device == 0) | |
1007 | tmp = ATA_DEVICE_OBS; | |
1008 | else | |
1009 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
1010 | ||
1011 | if (ap->flags & ATA_FLAG_MMIO) { | |
1012 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
1013 | } else { | |
1014 | outb(tmp, ap->ioaddr.device_addr); | |
1015 | } | |
1016 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
1017 | } | |
1018 | ||
1019 | /** | |
1020 | * ata_dev_select - Select device 0/1 on ATA bus | |
1021 | * @ap: ATA channel to manipulate | |
1022 | * @device: ATA device (numbered from zero) to select | |
1023 | * @wait: non-zero to wait for Status register BSY bit to clear | |
1024 | * @can_sleep: non-zero if context allows sleeping | |
1025 | * | |
1026 | * Use the method defined in the ATA specification to | |
1027 | * make either device 0, or device 1, active on the | |
1028 | * ATA channel. | |
1029 | * | |
1030 | * This is a high-level version of ata_std_dev_select(), | |
1031 | * which additionally provides the services of inserting | |
1032 | * the proper pauses and status polling, where needed. | |
1033 | * | |
1034 | * LOCKING: | |
1035 | * caller. | |
1036 | */ | |
1037 | ||
1038 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
1039 | unsigned int wait, unsigned int can_sleep) | |
1040 | { | |
1041 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
1042 | ap->id, device, wait); | |
1043 | ||
1044 | if (wait) | |
1045 | ata_wait_idle(ap); | |
1046 | ||
1047 | ap->ops->dev_select(ap, device); | |
1048 | ||
1049 | if (wait) { | |
1050 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
1051 | msleep(150); | |
1052 | ata_wait_idle(ap); | |
1053 | } | |
1054 | } | |
1055 | ||
1056 | /** | |
1057 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
1058 | * @dev: Device whose IDENTIFY DEVICE page we will dump | |
1059 | * | |
1060 | * Dump selected 16-bit words from a detected device's | |
1061 | * IDENTIFY PAGE page. | |
1062 | * | |
1063 | * LOCKING: | |
1064 | * caller. | |
1065 | */ | |
1066 | ||
1067 | static inline void ata_dump_id(struct ata_device *dev) | |
1068 | { | |
1069 | DPRINTK("49==0x%04x " | |
1070 | "53==0x%04x " | |
1071 | "63==0x%04x " | |
1072 | "64==0x%04x " | |
1073 | "75==0x%04x \n", | |
1074 | dev->id[49], | |
1075 | dev->id[53], | |
1076 | dev->id[63], | |
1077 | dev->id[64], | |
1078 | dev->id[75]); | |
1079 | DPRINTK("80==0x%04x " | |
1080 | "81==0x%04x " | |
1081 | "82==0x%04x " | |
1082 | "83==0x%04x " | |
1083 | "84==0x%04x \n", | |
1084 | dev->id[80], | |
1085 | dev->id[81], | |
1086 | dev->id[82], | |
1087 | dev->id[83], | |
1088 | dev->id[84]); | |
1089 | DPRINTK("88==0x%04x " | |
1090 | "93==0x%04x\n", | |
1091 | dev->id[88], | |
1092 | dev->id[93]); | |
1093 | } | |
1094 | ||
1095 | /** | |
1096 | * ata_dev_identify - obtain IDENTIFY x DEVICE page | |
1097 | * @ap: port on which device we wish to probe resides | |
1098 | * @device: device bus address, starting at zero | |
1099 | * | |
1100 | * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE | |
1101 | * command, and read back the 512-byte device information page. | |
1102 | * The device information page is fed to us via the standard | |
1103 | * PIO-IN protocol, but we hand-code it here. (TODO: investigate | |
1104 | * using standard PIO-IN paths) | |
1105 | * | |
1106 | * After reading the device information page, we use several | |
1107 | * bits of information from it to initialize data structures | |
1108 | * that will be used during the lifetime of the ata_device. | |
1109 | * Other data from the info page is used to disqualify certain | |
1110 | * older ATA devices we do not wish to support. | |
1111 | * | |
1112 | * LOCKING: | |
1113 | * Inherited from caller. Some functions called by this function | |
1114 | * obtain the host_set lock. | |
1115 | */ | |
1116 | ||
1117 | static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |
1118 | { | |
1119 | struct ata_device *dev = &ap->device[device]; | |
1120 | unsigned int i; | |
1121 | u16 tmp; | |
1122 | unsigned long xfer_modes; | |
1123 | u8 status; | |
1124 | unsigned int using_edd; | |
1125 | DECLARE_COMPLETION(wait); | |
1126 | struct ata_queued_cmd *qc; | |
1127 | unsigned long flags; | |
1128 | int rc; | |
1129 | ||
1130 | if (!ata_dev_present(dev)) { | |
1131 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1132 | ap->id, device); | |
1133 | return; | |
1134 | } | |
1135 | ||
1136 | if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET)) | |
1137 | using_edd = 0; | |
1138 | else | |
1139 | using_edd = 1; | |
1140 | ||
1141 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, device); | |
1142 | ||
1143 | assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI || | |
1144 | dev->class == ATA_DEV_NONE); | |
1145 | ||
1146 | ata_dev_select(ap, device, 1, 1); /* select device 0/1 */ | |
1147 | ||
1148 | qc = ata_qc_new_init(ap, dev); | |
1149 | BUG_ON(qc == NULL); | |
1150 | ||
1151 | ata_sg_init_one(qc, dev->id, sizeof(dev->id)); | |
1152 | qc->dma_dir = DMA_FROM_DEVICE; | |
1153 | qc->tf.protocol = ATA_PROT_PIO; | |
1154 | qc->nsect = 1; | |
1155 | ||
1156 | retry: | |
1157 | if (dev->class == ATA_DEV_ATA) { | |
1158 | qc->tf.command = ATA_CMD_ID_ATA; | |
1159 | DPRINTK("do ATA identify\n"); | |
1160 | } else { | |
1161 | qc->tf.command = ATA_CMD_ID_ATAPI; | |
1162 | DPRINTK("do ATAPI identify\n"); | |
1163 | } | |
1164 | ||
1165 | qc->waiting = &wait; | |
1166 | qc->complete_fn = ata_qc_complete_noop; | |
1167 | ||
1168 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1169 | rc = ata_qc_issue(qc); | |
1170 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1171 | ||
1172 | if (rc) | |
1173 | goto err_out; | |
1174 | else | |
1175 | wait_for_completion(&wait); | |
1176 | ||
1177 | status = ata_chk_status(ap); | |
1178 | if (status & ATA_ERR) { | |
1179 | /* | |
1180 | * arg! EDD works for all test cases, but seems to return | |
1181 | * the ATA signature for some ATAPI devices. Until the | |
1182 | * reason for this is found and fixed, we fix up the mess | |
1183 | * here. If IDENTIFY DEVICE returns command aborted | |
1184 | * (as ATAPI devices do), then we issue an | |
1185 | * IDENTIFY PACKET DEVICE. | |
1186 | * | |
1187 | * ATA software reset (SRST, the default) does not appear | |
1188 | * to have this problem. | |
1189 | */ | |
1190 | if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) { | |
1191 | u8 err = ata_chk_err(ap); | |
1192 | if (err & ATA_ABORTED) { | |
1193 | dev->class = ATA_DEV_ATAPI; | |
1194 | qc->cursg = 0; | |
1195 | qc->cursg_ofs = 0; | |
1196 | qc->cursect = 0; | |
1197 | qc->nsect = 1; | |
1198 | goto retry; | |
1199 | } | |
1200 | } | |
1201 | goto err_out; | |
1202 | } | |
1203 | ||
1204 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
1205 | ||
1206 | /* print device capabilities */ | |
1207 | printk(KERN_DEBUG "ata%u: dev %u cfg " | |
1208 | "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1209 | ap->id, device, dev->id[49], | |
1210 | dev->id[82], dev->id[83], dev->id[84], | |
1211 | dev->id[85], dev->id[86], dev->id[87], | |
1212 | dev->id[88]); | |
1213 | ||
1214 | /* | |
1215 | * common ATA, ATAPI feature tests | |
1216 | */ | |
1217 | ||
1218 | /* we require LBA and DMA support (bits 8 & 9 of word 49) */ | |
1219 | if (!ata_id_has_dma(dev->id) || !ata_id_has_lba(dev->id)) { | |
1220 | printk(KERN_DEBUG "ata%u: no dma/lba\n", ap->id); | |
1221 | goto err_out_nosup; | |
1222 | } | |
1223 | ||
1224 | /* quick-n-dirty find max transfer mode; for printk only */ | |
1225 | xfer_modes = dev->id[ATA_ID_UDMA_MODES]; | |
1226 | if (!xfer_modes) | |
1227 | xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; | |
1228 | if (!xfer_modes) { | |
1229 | xfer_modes = (dev->id[ATA_ID_PIO_MODES]) << (ATA_SHIFT_PIO + 3); | |
1230 | xfer_modes |= (0x7 << ATA_SHIFT_PIO); | |
1231 | } | |
1232 | ||
1233 | ata_dump_id(dev); | |
1234 | ||
1235 | /* ATA-specific feature tests */ | |
1236 | if (dev->class == ATA_DEV_ATA) { | |
1237 | if (!ata_id_is_ata(dev->id)) /* sanity check */ | |
1238 | goto err_out_nosup; | |
1239 | ||
1240 | tmp = dev->id[ATA_ID_MAJOR_VER]; | |
1241 | for (i = 14; i >= 1; i--) | |
1242 | if (tmp & (1 << i)) | |
1243 | break; | |
1244 | ||
1245 | /* we require at least ATA-3 */ | |
1246 | if (i < 3) { | |
1247 | printk(KERN_DEBUG "ata%u: no ATA-3\n", ap->id); | |
1248 | goto err_out_nosup; | |
1249 | } | |
1250 | ||
1251 | if (ata_id_has_lba48(dev->id)) { | |
1252 | dev->flags |= ATA_DFLAG_LBA48; | |
1253 | dev->n_sectors = ata_id_u64(dev->id, 100); | |
1254 | } else { | |
1255 | dev->n_sectors = ata_id_u32(dev->id, 60); | |
1256 | } | |
1257 | ||
1258 | ap->host->max_cmd_len = 16; | |
1259 | ||
1260 | /* print device info to dmesg */ | |
1261 | printk(KERN_INFO "ata%u: dev %u ATA, max %s, %Lu sectors:%s\n", | |
1262 | ap->id, device, | |
1263 | ata_mode_string(xfer_modes), | |
1264 | (unsigned long long)dev->n_sectors, | |
1265 | dev->flags & ATA_DFLAG_LBA48 ? " lba48" : ""); | |
1266 | } | |
1267 | ||
1268 | /* ATAPI-specific feature tests */ | |
1269 | else { | |
1270 | if (ata_id_is_ata(dev->id)) /* sanity check */ | |
1271 | goto err_out_nosup; | |
1272 | ||
1273 | rc = atapi_cdb_len(dev->id); | |
1274 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1275 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | |
1276 | goto err_out_nosup; | |
1277 | } | |
1278 | ap->cdb_len = (unsigned int) rc; | |
1279 | ap->host->max_cmd_len = (unsigned char) ap->cdb_len; | |
1280 | ||
1281 | /* print device info to dmesg */ | |
1282 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | |
1283 | ap->id, device, | |
1284 | ata_mode_string(xfer_modes)); | |
1285 | } | |
1286 | ||
1287 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | |
1288 | return; | |
1289 | ||
1290 | err_out_nosup: | |
1291 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | |
1292 | ap->id, device); | |
1293 | err_out: | |
1294 | dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */ | |
1295 | DPRINTK("EXIT, err\n"); | |
1296 | } | |
1297 | ||
1298 | /** | |
1299 | * ata_bus_probe - Reset and probe ATA bus | |
1300 | * @ap: Bus to probe | |
1301 | * | |
0cba632b JG |
1302 | * Master ATA bus probing function. Initiates a hardware-dependent |
1303 | * bus reset, then attempts to identify any devices found on | |
1304 | * the bus. | |
1305 | * | |
1da177e4 | 1306 | * LOCKING: |
0cba632b | 1307 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1308 | * |
1309 | * RETURNS: | |
1310 | * Zero on success, non-zero on error. | |
1311 | */ | |
1312 | ||
1313 | static int ata_bus_probe(struct ata_port *ap) | |
1314 | { | |
1315 | unsigned int i, found = 0; | |
1316 | ||
1317 | ap->ops->phy_reset(ap); | |
1318 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1319 | goto err_out; | |
1320 | ||
1321 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1322 | ata_dev_identify(ap, i); | |
1323 | if (ata_dev_present(&ap->device[i])) { | |
1324 | found = 1; | |
1325 | if (ap->ops->dev_config) | |
1326 | ap->ops->dev_config(ap, &ap->device[i]); | |
1327 | } | |
1328 | } | |
1329 | ||
1330 | if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1331 | goto err_out_disable; | |
1332 | ||
1333 | ata_set_mode(ap); | |
1334 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1335 | goto err_out_disable; | |
1336 | ||
1337 | return 0; | |
1338 | ||
1339 | err_out_disable: | |
1340 | ap->ops->port_disable(ap); | |
1341 | err_out: | |
1342 | return -1; | |
1343 | } | |
1344 | ||
1345 | /** | |
0cba632b JG |
1346 | * ata_port_probe - Mark port as enabled |
1347 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1348 | * |
0cba632b JG |
1349 | * Modify @ap data structure such that the system |
1350 | * thinks that the entire port is enabled. | |
1351 | * | |
1352 | * LOCKING: host_set lock, or some other form of | |
1353 | * serialization. | |
1da177e4 LT |
1354 | */ |
1355 | ||
1356 | void ata_port_probe(struct ata_port *ap) | |
1357 | { | |
1358 | ap->flags &= ~ATA_FLAG_PORT_DISABLED; | |
1359 | } | |
1360 | ||
1361 | /** | |
780a87f7 JG |
1362 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1363 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1364 | * |
780a87f7 JG |
1365 | * This function issues commands to standard SATA Sxxx |
1366 | * PHY registers, to wake up the phy (and device), and | |
1367 | * clear any reset condition. | |
1368 | * | |
0cba632b JG |
1369 | * LOCKING: |
1370 | * PCI/etc. bus probe sem. | |
1da177e4 LT |
1371 | * |
1372 | */ | |
1373 | void __sata_phy_reset(struct ata_port *ap) | |
1374 | { | |
1375 | u32 sstatus; | |
1376 | unsigned long timeout = jiffies + (HZ * 5); | |
1377 | ||
1378 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e BR |
1379 | /* issue phy wake/reset */ |
1380 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
1da177e4 LT |
1381 | udelay(400); /* FIXME: a guess */ |
1382 | } | |
cdcca89e | 1383 | scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */ |
1da177e4 LT |
1384 | |
1385 | /* wait for phy to become ready, if necessary */ | |
1386 | do { | |
1387 | msleep(200); | |
1388 | sstatus = scr_read(ap, SCR_STATUS); | |
1389 | if ((sstatus & 0xf) != 1) | |
1390 | break; | |
1391 | } while (time_before(jiffies, timeout)); | |
1392 | ||
1393 | /* TODO: phy layer with polling, timeouts, etc. */ | |
1394 | if (sata_dev_present(ap)) | |
1395 | ata_port_probe(ap); | |
1396 | else { | |
1397 | sstatus = scr_read(ap, SCR_STATUS); | |
1398 | printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n", | |
1399 | ap->id, sstatus); | |
1400 | ata_port_disable(ap); | |
1401 | } | |
1402 | ||
1403 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1404 | return; | |
1405 | ||
1406 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1407 | ata_port_disable(ap); | |
1408 | return; | |
1409 | } | |
1410 | ||
1411 | ap->cbl = ATA_CBL_SATA; | |
1412 | } | |
1413 | ||
1414 | /** | |
780a87f7 JG |
1415 | * sata_phy_reset - Reset SATA bus. |
1416 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1417 | * |
780a87f7 JG |
1418 | * This function resets the SATA bus, and then probes |
1419 | * the bus for devices. | |
1420 | * | |
0cba632b JG |
1421 | * LOCKING: |
1422 | * PCI/etc. bus probe sem. | |
1da177e4 LT |
1423 | * |
1424 | */ | |
1425 | void sata_phy_reset(struct ata_port *ap) | |
1426 | { | |
1427 | __sata_phy_reset(ap); | |
1428 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1429 | return; | |
1430 | ata_bus_reset(ap); | |
1431 | } | |
1432 | ||
1433 | /** | |
780a87f7 JG |
1434 | * ata_port_disable - Disable port. |
1435 | * @ap: Port to be disabled. | |
1da177e4 | 1436 | * |
780a87f7 JG |
1437 | * Modify @ap data structure such that the system |
1438 | * thinks that the entire port is disabled, and should | |
1439 | * never attempt to probe or communicate with devices | |
1440 | * on this port. | |
1441 | * | |
1442 | * LOCKING: host_set lock, or some other form of | |
1443 | * serialization. | |
1da177e4 LT |
1444 | */ |
1445 | ||
1446 | void ata_port_disable(struct ata_port *ap) | |
1447 | { | |
1448 | ap->device[0].class = ATA_DEV_NONE; | |
1449 | ap->device[1].class = ATA_DEV_NONE; | |
1450 | ap->flags |= ATA_FLAG_PORT_DISABLED; | |
1451 | } | |
1452 | ||
1453 | static struct { | |
1454 | unsigned int shift; | |
1455 | u8 base; | |
1456 | } xfer_mode_classes[] = { | |
1457 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | |
1458 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | |
1459 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | |
1460 | }; | |
1461 | ||
1462 | static inline u8 base_from_shift(unsigned int shift) | |
1463 | { | |
1464 | int i; | |
1465 | ||
1466 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | |
1467 | if (xfer_mode_classes[i].shift == shift) | |
1468 | return xfer_mode_classes[i].base; | |
1469 | ||
1470 | return 0xff; | |
1471 | } | |
1472 | ||
1473 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |
1474 | { | |
1475 | int ofs, idx; | |
1476 | u8 base; | |
1477 | ||
1478 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1479 | return; | |
1480 | ||
1481 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
1482 | dev->flags |= ATA_DFLAG_PIO; | |
1483 | ||
1484 | ata_dev_set_xfermode(ap, dev); | |
1485 | ||
1486 | base = base_from_shift(dev->xfer_shift); | |
1487 | ofs = dev->xfer_mode - base; | |
1488 | idx = ofs + dev->xfer_shift; | |
1489 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | |
1490 | ||
1491 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", | |
1492 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | |
1493 | ||
1494 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | |
1495 | ap->id, dev->devno, xfer_mode_str[idx]); | |
1496 | } | |
1497 | ||
1498 | static int ata_host_set_pio(struct ata_port *ap) | |
1499 | { | |
1500 | unsigned int mask; | |
1501 | int x, i; | |
1502 | u8 base, xfer_mode; | |
1503 | ||
1504 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | |
1505 | x = fgb(mask); | |
1506 | if (x < 0) { | |
1507 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | |
1508 | return -1; | |
1509 | } | |
1510 | ||
1511 | base = base_from_shift(ATA_SHIFT_PIO); | |
1512 | xfer_mode = base + x; | |
1513 | ||
1514 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | |
1515 | (int)base, (int)xfer_mode, mask, x); | |
1516 | ||
1517 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1518 | struct ata_device *dev = &ap->device[i]; | |
1519 | if (ata_dev_present(dev)) { | |
1520 | dev->pio_mode = xfer_mode; | |
1521 | dev->xfer_mode = xfer_mode; | |
1522 | dev->xfer_shift = ATA_SHIFT_PIO; | |
1523 | if (ap->ops->set_piomode) | |
1524 | ap->ops->set_piomode(ap, dev); | |
1525 | } | |
1526 | } | |
1527 | ||
1528 | return 0; | |
1529 | } | |
1530 | ||
1531 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |
1532 | unsigned int xfer_shift) | |
1533 | { | |
1534 | int i; | |
1535 | ||
1536 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1537 | struct ata_device *dev = &ap->device[i]; | |
1538 | if (ata_dev_present(dev)) { | |
1539 | dev->dma_mode = xfer_mode; | |
1540 | dev->xfer_mode = xfer_mode; | |
1541 | dev->xfer_shift = xfer_shift; | |
1542 | if (ap->ops->set_dmamode) | |
1543 | ap->ops->set_dmamode(ap, dev); | |
1544 | } | |
1545 | } | |
1546 | } | |
1547 | ||
1548 | /** | |
1549 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1550 | * @ap: port on which timings will be programmed | |
1551 | * | |
780a87f7 JG |
1552 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). |
1553 | * | |
0cba632b JG |
1554 | * LOCKING: |
1555 | * PCI/etc. bus probe sem. | |
1da177e4 LT |
1556 | * |
1557 | */ | |
1558 | static void ata_set_mode(struct ata_port *ap) | |
1559 | { | |
1560 | unsigned int i, xfer_shift; | |
1561 | u8 xfer_mode; | |
1562 | int rc; | |
1563 | ||
1564 | /* step 1: always set host PIO timings */ | |
1565 | rc = ata_host_set_pio(ap); | |
1566 | if (rc) | |
1567 | goto err_out; | |
1568 | ||
1569 | /* step 2: choose the best data xfer mode */ | |
1570 | xfer_mode = xfer_shift = 0; | |
1571 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | |
1572 | if (rc) | |
1573 | goto err_out; | |
1574 | ||
1575 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | |
1576 | if (xfer_shift != ATA_SHIFT_PIO) | |
1577 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | |
1578 | ||
1579 | /* step 4: update devices' xfer mode */ | |
1580 | ata_dev_set_mode(ap, &ap->device[0]); | |
1581 | ata_dev_set_mode(ap, &ap->device[1]); | |
1582 | ||
1583 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1584 | return; | |
1585 | ||
1586 | if (ap->ops->post_set_mode) | |
1587 | ap->ops->post_set_mode(ap); | |
1588 | ||
1589 | for (i = 0; i < 2; i++) { | |
1590 | struct ata_device *dev = &ap->device[i]; | |
1591 | ata_dev_set_protocol(dev); | |
1592 | } | |
1593 | ||
1594 | return; | |
1595 | ||
1596 | err_out: | |
1597 | ata_port_disable(ap); | |
1598 | } | |
1599 | ||
1600 | /** | |
1601 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
1602 | * @ap: port containing status register to be polled | |
1603 | * @tmout_pat: impatience timeout | |
1604 | * @tmout: overall timeout | |
1605 | * | |
780a87f7 JG |
1606 | * Sleep until ATA Status register bit BSY clears, |
1607 | * or a timeout occurs. | |
1608 | * | |
1609 | * LOCKING: None. | |
1da177e4 LT |
1610 | * |
1611 | */ | |
1612 | ||
1613 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
1614 | unsigned long tmout_pat, | |
1615 | unsigned long tmout) | |
1616 | { | |
1617 | unsigned long timer_start, timeout; | |
1618 | u8 status; | |
1619 | ||
1620 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
1621 | timer_start = jiffies; | |
1622 | timeout = timer_start + tmout_pat; | |
1623 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1624 | msleep(50); | |
1625 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
1626 | } | |
1627 | ||
1628 | if (status & ATA_BUSY) | |
1629 | printk(KERN_WARNING "ata%u is slow to respond, " | |
1630 | "please be patient\n", ap->id); | |
1631 | ||
1632 | timeout = timer_start + tmout; | |
1633 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1634 | msleep(50); | |
1635 | status = ata_chk_status(ap); | |
1636 | } | |
1637 | ||
1638 | if (status & ATA_BUSY) { | |
1639 | printk(KERN_ERR "ata%u failed to respond (%lu secs)\n", | |
1640 | ap->id, tmout / HZ); | |
1641 | return 1; | |
1642 | } | |
1643 | ||
1644 | return 0; | |
1645 | } | |
1646 | ||
1647 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
1648 | { | |
1649 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1650 | unsigned int dev0 = devmask & (1 << 0); | |
1651 | unsigned int dev1 = devmask & (1 << 1); | |
1652 | unsigned long timeout; | |
1653 | ||
1654 | /* if device 0 was found in ata_devchk, wait for its | |
1655 | * BSY bit to clear | |
1656 | */ | |
1657 | if (dev0) | |
1658 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1659 | ||
1660 | /* if device 1 was found in ata_devchk, wait for | |
1661 | * register access, then wait for BSY to clear | |
1662 | */ | |
1663 | timeout = jiffies + ATA_TMOUT_BOOT; | |
1664 | while (dev1) { | |
1665 | u8 nsect, lbal; | |
1666 | ||
1667 | ap->ops->dev_select(ap, 1); | |
1668 | if (ap->flags & ATA_FLAG_MMIO) { | |
1669 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
1670 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
1671 | } else { | |
1672 | nsect = inb(ioaddr->nsect_addr); | |
1673 | lbal = inb(ioaddr->lbal_addr); | |
1674 | } | |
1675 | if ((nsect == 1) && (lbal == 1)) | |
1676 | break; | |
1677 | if (time_after(jiffies, timeout)) { | |
1678 | dev1 = 0; | |
1679 | break; | |
1680 | } | |
1681 | msleep(50); /* give drive a breather */ | |
1682 | } | |
1683 | if (dev1) | |
1684 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1685 | ||
1686 | /* is all this really necessary? */ | |
1687 | ap->ops->dev_select(ap, 0); | |
1688 | if (dev1) | |
1689 | ap->ops->dev_select(ap, 1); | |
1690 | if (dev0) | |
1691 | ap->ops->dev_select(ap, 0); | |
1692 | } | |
1693 | ||
1694 | /** | |
0cba632b JG |
1695 | * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command. |
1696 | * @ap: Port to reset and probe | |
1697 | * | |
1698 | * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and | |
1699 | * probe the bus. Not often used these days. | |
1da177e4 | 1700 | * |
0cba632b JG |
1701 | * LOCKING: |
1702 | * PCI/etc. bus probe sem. | |
1da177e4 LT |
1703 | * |
1704 | */ | |
1705 | ||
1706 | static unsigned int ata_bus_edd(struct ata_port *ap) | |
1707 | { | |
1708 | struct ata_taskfile tf; | |
1709 | ||
1710 | /* set up execute-device-diag (bus reset) taskfile */ | |
1711 | /* also, take interrupts to a known state (disabled) */ | |
1712 | DPRINTK("execute-device-diag\n"); | |
1713 | ata_tf_init(ap, &tf, 0); | |
1714 | tf.ctl |= ATA_NIEN; | |
1715 | tf.command = ATA_CMD_EDD; | |
1716 | tf.protocol = ATA_PROT_NODATA; | |
1717 | ||
1718 | /* do bus reset */ | |
1719 | ata_tf_to_host(ap, &tf); | |
1720 | ||
1721 | /* spec says at least 2ms. but who knows with those | |
1722 | * crazy ATAPI devices... | |
1723 | */ | |
1724 | msleep(150); | |
1725 | ||
1726 | return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1727 | } | |
1728 | ||
1729 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
1730 | unsigned int devmask) | |
1731 | { | |
1732 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1733 | ||
1734 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
1735 | ||
1736 | /* software reset. causes dev0 to be selected */ | |
1737 | if (ap->flags & ATA_FLAG_MMIO) { | |
1738 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1739 | udelay(20); /* FIXME: flush */ | |
1740 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
1741 | udelay(20); /* FIXME: flush */ | |
1742 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1743 | } else { | |
1744 | outb(ap->ctl, ioaddr->ctl_addr); | |
1745 | udelay(10); | |
1746 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
1747 | udelay(10); | |
1748 | outb(ap->ctl, ioaddr->ctl_addr); | |
1749 | } | |
1750 | ||
1751 | /* spec mandates ">= 2ms" before checking status. | |
1752 | * We wait 150ms, because that was the magic delay used for | |
1753 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
1754 | * between when the ATA command register is written, and then | |
1755 | * status is checked. Because waiting for "a while" before | |
1756 | * checking status is fine, post SRST, we perform this magic | |
1757 | * delay here as well. | |
1758 | */ | |
1759 | msleep(150); | |
1760 | ||
1761 | ata_bus_post_reset(ap, devmask); | |
1762 | ||
1763 | return 0; | |
1764 | } | |
1765 | ||
1766 | /** | |
1767 | * ata_bus_reset - reset host port and associated ATA channel | |
1768 | * @ap: port to reset | |
1769 | * | |
1770 | * This is typically the first time we actually start issuing | |
1771 | * commands to the ATA channel. We wait for BSY to clear, then | |
1772 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
1773 | * result. Determine what devices, if any, are on the channel | |
1774 | * by looking at the device 0/1 error register. Look at the signature | |
1775 | * stored in each device's taskfile registers, to determine if | |
1776 | * the device is ATA or ATAPI. | |
1777 | * | |
1778 | * LOCKING: | |
0cba632b JG |
1779 | * PCI/etc. bus probe sem. |
1780 | * Obtains host_set lock. | |
1da177e4 LT |
1781 | * |
1782 | * SIDE EFFECTS: | |
1783 | * Sets ATA_FLAG_PORT_DISABLED if bus reset fails. | |
1784 | */ | |
1785 | ||
1786 | void ata_bus_reset(struct ata_port *ap) | |
1787 | { | |
1788 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1789 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
1790 | u8 err; | |
1791 | unsigned int dev0, dev1 = 0, rc = 0, devmask = 0; | |
1792 | ||
1793 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
1794 | ||
1795 | /* determine if device 0/1 are present */ | |
1796 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
1797 | dev0 = 1; | |
1798 | else { | |
1799 | dev0 = ata_devchk(ap, 0); | |
1800 | if (slave_possible) | |
1801 | dev1 = ata_devchk(ap, 1); | |
1802 | } | |
1803 | ||
1804 | if (dev0) | |
1805 | devmask |= (1 << 0); | |
1806 | if (dev1) | |
1807 | devmask |= (1 << 1); | |
1808 | ||
1809 | /* select device 0 again */ | |
1810 | ap->ops->dev_select(ap, 0); | |
1811 | ||
1812 | /* issue bus reset */ | |
1813 | if (ap->flags & ATA_FLAG_SRST) | |
1814 | rc = ata_bus_softreset(ap, devmask); | |
1815 | else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) { | |
1816 | /* set up device control */ | |
1817 | if (ap->flags & ATA_FLAG_MMIO) | |
1818 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1819 | else | |
1820 | outb(ap->ctl, ioaddr->ctl_addr); | |
1821 | rc = ata_bus_edd(ap); | |
1822 | } | |
1823 | ||
1824 | if (rc) | |
1825 | goto err_out; | |
1826 | ||
1827 | /* | |
1828 | * determine by signature whether we have ATA or ATAPI devices | |
1829 | */ | |
1830 | err = ata_dev_try_classify(ap, 0); | |
1831 | if ((slave_possible) && (err != 0x81)) | |
1832 | ata_dev_try_classify(ap, 1); | |
1833 | ||
1834 | /* re-enable interrupts */ | |
1835 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
1836 | ata_irq_on(ap); | |
1837 | ||
1838 | /* is double-select really necessary? */ | |
1839 | if (ap->device[1].class != ATA_DEV_NONE) | |
1840 | ap->ops->dev_select(ap, 1); | |
1841 | if (ap->device[0].class != ATA_DEV_NONE) | |
1842 | ap->ops->dev_select(ap, 0); | |
1843 | ||
1844 | /* if no devices were detected, disable this port */ | |
1845 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
1846 | (ap->device[1].class == ATA_DEV_NONE)) | |
1847 | goto err_out; | |
1848 | ||
1849 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
1850 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
1851 | if (ap->flags & ATA_FLAG_MMIO) | |
1852 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
1853 | else | |
1854 | outb(ap->ctl, ioaddr->ctl_addr); | |
1855 | } | |
1856 | ||
1857 | DPRINTK("EXIT\n"); | |
1858 | return; | |
1859 | ||
1860 | err_out: | |
1861 | printk(KERN_ERR "ata%u: disabling port\n", ap->id); | |
1862 | ap->ops->port_disable(ap); | |
1863 | ||
1864 | DPRINTK("EXIT\n"); | |
1865 | } | |
1866 | ||
1867 | static void ata_pr_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
1868 | { | |
1869 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | |
1870 | ap->id, dev->devno); | |
1871 | } | |
1872 | ||
1873 | static const char * ata_dma_blacklist [] = { | |
1874 | "WDC AC11000H", | |
1875 | "WDC AC22100H", | |
1876 | "WDC AC32500H", | |
1877 | "WDC AC33100H", | |
1878 | "WDC AC31600H", | |
1879 | "WDC AC32100H", | |
1880 | "WDC AC23200L", | |
1881 | "Compaq CRD-8241B", | |
1882 | "CRD-8400B", | |
1883 | "CRD-8480B", | |
1884 | "CRD-8482B", | |
1885 | "CRD-84", | |
1886 | "SanDisk SDP3B", | |
1887 | "SanDisk SDP3B-64", | |
1888 | "SANYO CD-ROM CRD", | |
1889 | "HITACHI CDR-8", | |
1890 | "HITACHI CDR-8335", | |
1891 | "HITACHI CDR-8435", | |
1892 | "Toshiba CD-ROM XM-6202B", | |
1893 | "CD-532E-A", | |
1894 | "E-IDE CD-ROM CR-840", | |
1895 | "CD-ROM Drive/F5A", | |
1896 | "WPI CDD-820", | |
1897 | "SAMSUNG CD-ROM SC-148C", | |
1898 | "SAMSUNG CD-ROM SC", | |
1899 | "SanDisk SDP3B-64", | |
1900 | "SAMSUNG CD-ROM SN-124", | |
1901 | "ATAPI CD-ROM DRIVE 40X MAXIMUM", | |
1902 | "_NEC DV5800A", | |
1903 | }; | |
1904 | ||
1905 | static int ata_dma_blacklisted(struct ata_port *ap, struct ata_device *dev) | |
1906 | { | |
1907 | unsigned char model_num[40]; | |
1908 | char *s; | |
1909 | unsigned int len; | |
1910 | int i; | |
1911 | ||
1912 | ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS, | |
1913 | sizeof(model_num)); | |
1914 | s = &model_num[0]; | |
1915 | len = strnlen(s, sizeof(model_num)); | |
1916 | ||
1917 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
1918 | while ((len > 0) && (s[len - 1] == ' ')) { | |
1919 | len--; | |
1920 | s[len] = 0; | |
1921 | } | |
1922 | ||
1923 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) | |
1924 | if (!strncmp(ata_dma_blacklist[i], s, len)) | |
1925 | return 1; | |
1926 | ||
1927 | return 0; | |
1928 | } | |
1929 | ||
1930 | static unsigned int ata_get_mode_mask(struct ata_port *ap, int shift) | |
1931 | { | |
1932 | struct ata_device *master, *slave; | |
1933 | unsigned int mask; | |
1934 | ||
1935 | master = &ap->device[0]; | |
1936 | slave = &ap->device[1]; | |
1937 | ||
1938 | assert (ata_dev_present(master) || ata_dev_present(slave)); | |
1939 | ||
1940 | if (shift == ATA_SHIFT_UDMA) { | |
1941 | mask = ap->udma_mask; | |
1942 | if (ata_dev_present(master)) { | |
1943 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | |
1944 | if (ata_dma_blacklisted(ap, master)) { | |
1945 | mask = 0; | |
1946 | ata_pr_blacklisted(ap, master); | |
1947 | } | |
1948 | } | |
1949 | if (ata_dev_present(slave)) { | |
1950 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | |
1951 | if (ata_dma_blacklisted(ap, slave)) { | |
1952 | mask = 0; | |
1953 | ata_pr_blacklisted(ap, slave); | |
1954 | } | |
1955 | } | |
1956 | } | |
1957 | else if (shift == ATA_SHIFT_MWDMA) { | |
1958 | mask = ap->mwdma_mask; | |
1959 | if (ata_dev_present(master)) { | |
1960 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | |
1961 | if (ata_dma_blacklisted(ap, master)) { | |
1962 | mask = 0; | |
1963 | ata_pr_blacklisted(ap, master); | |
1964 | } | |
1965 | } | |
1966 | if (ata_dev_present(slave)) { | |
1967 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | |
1968 | if (ata_dma_blacklisted(ap, slave)) { | |
1969 | mask = 0; | |
1970 | ata_pr_blacklisted(ap, slave); | |
1971 | } | |
1972 | } | |
1973 | } | |
1974 | else if (shift == ATA_SHIFT_PIO) { | |
1975 | mask = ap->pio_mask; | |
1976 | if (ata_dev_present(master)) { | |
1977 | /* spec doesn't return explicit support for | |
1978 | * PIO0-2, so we fake it | |
1979 | */ | |
1980 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | |
1981 | tmp_mode <<= 3; | |
1982 | tmp_mode |= 0x7; | |
1983 | mask &= tmp_mode; | |
1984 | } | |
1985 | if (ata_dev_present(slave)) { | |
1986 | /* spec doesn't return explicit support for | |
1987 | * PIO0-2, so we fake it | |
1988 | */ | |
1989 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | |
1990 | tmp_mode <<= 3; | |
1991 | tmp_mode |= 0x7; | |
1992 | mask &= tmp_mode; | |
1993 | } | |
1994 | } | |
1995 | else { | |
1996 | mask = 0xffffffff; /* shut up compiler warning */ | |
1997 | BUG(); | |
1998 | } | |
1999 | ||
2000 | return mask; | |
2001 | } | |
2002 | ||
2003 | /* find greatest bit */ | |
2004 | static int fgb(u32 bitmap) | |
2005 | { | |
2006 | unsigned int i; | |
2007 | int x = -1; | |
2008 | ||
2009 | for (i = 0; i < 32; i++) | |
2010 | if (bitmap & (1 << i)) | |
2011 | x = i; | |
2012 | ||
2013 | return x; | |
2014 | } | |
2015 | ||
2016 | /** | |
2017 | * ata_choose_xfer_mode - attempt to find best transfer mode | |
2018 | * @ap: Port for which an xfer mode will be selected | |
2019 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | |
2020 | * @xfer_shift_out: (output) bit shift that selects this mode | |
2021 | * | |
0cba632b JG |
2022 | * Based on host and device capabilities, determine the |
2023 | * maximum transfer mode that is amenable to all. | |
2024 | * | |
1da177e4 | 2025 | * LOCKING: |
0cba632b | 2026 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2027 | * |
2028 | * RETURNS: | |
2029 | * Zero on success, negative on error. | |
2030 | */ | |
2031 | ||
2032 | static int ata_choose_xfer_mode(struct ata_port *ap, | |
2033 | u8 *xfer_mode_out, | |
2034 | unsigned int *xfer_shift_out) | |
2035 | { | |
2036 | unsigned int mask, shift; | |
2037 | int x, i; | |
2038 | ||
2039 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | |
2040 | shift = xfer_mode_classes[i].shift; | |
2041 | mask = ata_get_mode_mask(ap, shift); | |
2042 | ||
2043 | x = fgb(mask); | |
2044 | if (x >= 0) { | |
2045 | *xfer_mode_out = xfer_mode_classes[i].base + x; | |
2046 | *xfer_shift_out = shift; | |
2047 | return 0; | |
2048 | } | |
2049 | } | |
2050 | ||
2051 | return -1; | |
2052 | } | |
2053 | ||
2054 | /** | |
2055 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
2056 | * @ap: Port associated with device @dev | |
2057 | * @dev: Device to which command will be sent | |
2058 | * | |
780a87f7 JG |
2059 | * Issue SET FEATURES - XFER MODE command to device @dev |
2060 | * on port @ap. | |
2061 | * | |
0cba632b JG |
2062 | * LOCKING: |
2063 | * PCI/etc. bus probe sem. | |
1da177e4 LT |
2064 | */ |
2065 | ||
2066 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) | |
2067 | { | |
2068 | DECLARE_COMPLETION(wait); | |
2069 | struct ata_queued_cmd *qc; | |
2070 | int rc; | |
2071 | unsigned long flags; | |
2072 | ||
2073 | /* set up set-features taskfile */ | |
2074 | DPRINTK("set features - xfer mode\n"); | |
2075 | ||
2076 | qc = ata_qc_new_init(ap, dev); | |
2077 | BUG_ON(qc == NULL); | |
2078 | ||
2079 | qc->tf.command = ATA_CMD_SET_FEATURES; | |
2080 | qc->tf.feature = SETFEATURES_XFER; | |
2081 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2082 | qc->tf.protocol = ATA_PROT_NODATA; | |
2083 | qc->tf.nsect = dev->xfer_mode; | |
2084 | ||
2085 | qc->waiting = &wait; | |
2086 | qc->complete_fn = ata_qc_complete_noop; | |
2087 | ||
2088 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2089 | rc = ata_qc_issue(qc); | |
2090 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2091 | ||
2092 | if (rc) | |
2093 | ata_port_disable(ap); | |
2094 | else | |
2095 | wait_for_completion(&wait); | |
2096 | ||
2097 | DPRINTK("EXIT\n"); | |
2098 | } | |
2099 | ||
2100 | /** | |
0cba632b JG |
2101 | * ata_sg_clean - Unmap DMA memory associated with command |
2102 | * @qc: Command containing DMA memory to be released | |
2103 | * | |
2104 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
2105 | * |
2106 | * LOCKING: | |
0cba632b | 2107 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2108 | */ |
2109 | ||
2110 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
2111 | { | |
2112 | struct ata_port *ap = qc->ap; | |
2113 | struct scatterlist *sg = qc->sg; | |
2114 | int dir = qc->dma_dir; | |
2115 | ||
2116 | assert(qc->flags & ATA_QCFLAG_DMAMAP); | |
2117 | assert(sg != NULL); | |
2118 | ||
2119 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
2120 | assert(qc->n_elem == 1); | |
2121 | ||
2122 | DPRINTK("unmapping %u sg elements\n", qc->n_elem); | |
2123 | ||
2124 | if (qc->flags & ATA_QCFLAG_SG) | |
2125 | dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2126 | else | |
2127 | dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]), | |
2128 | sg_dma_len(&sg[0]), dir); | |
2129 | ||
2130 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
2131 | qc->sg = NULL; | |
2132 | } | |
2133 | ||
2134 | /** | |
2135 | * ata_fill_sg - Fill PCI IDE PRD table | |
2136 | * @qc: Metadata associated with taskfile to be transferred | |
2137 | * | |
780a87f7 JG |
2138 | * Fill PCI IDE PRD (scatter-gather) table with segments |
2139 | * associated with the current disk command. | |
2140 | * | |
1da177e4 | 2141 | * LOCKING: |
780a87f7 | 2142 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2143 | * |
2144 | */ | |
2145 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
2146 | { | |
2147 | struct scatterlist *sg = qc->sg; | |
2148 | struct ata_port *ap = qc->ap; | |
2149 | unsigned int idx, nelem; | |
2150 | ||
2151 | assert(sg != NULL); | |
2152 | assert(qc->n_elem > 0); | |
2153 | ||
2154 | idx = 0; | |
2155 | for (nelem = qc->n_elem; nelem; nelem--,sg++) { | |
2156 | u32 addr, offset; | |
2157 | u32 sg_len, len; | |
2158 | ||
2159 | /* determine if physical DMA addr spans 64K boundary. | |
2160 | * Note h/w doesn't support 64-bit, so we unconditionally | |
2161 | * truncate dma_addr_t to u32. | |
2162 | */ | |
2163 | addr = (u32) sg_dma_address(sg); | |
2164 | sg_len = sg_dma_len(sg); | |
2165 | ||
2166 | while (sg_len) { | |
2167 | offset = addr & 0xffff; | |
2168 | len = sg_len; | |
2169 | if ((offset + sg_len) > 0x10000) | |
2170 | len = 0x10000 - offset; | |
2171 | ||
2172 | ap->prd[idx].addr = cpu_to_le32(addr); | |
2173 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
2174 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
2175 | ||
2176 | idx++; | |
2177 | sg_len -= len; | |
2178 | addr += len; | |
2179 | } | |
2180 | } | |
2181 | ||
2182 | if (idx) | |
2183 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
2184 | } | |
2185 | /** | |
2186 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
2187 | * @qc: Metadata associated with taskfile to check | |
2188 | * | |
780a87f7 JG |
2189 | * Allow low-level driver to filter ATA PACKET commands, returning |
2190 | * a status indicating whether or not it is OK to use DMA for the | |
2191 | * supplied PACKET command. | |
2192 | * | |
1da177e4 | 2193 | * LOCKING: |
0cba632b JG |
2194 | * spin_lock_irqsave(host_set lock) |
2195 | * | |
1da177e4 LT |
2196 | * RETURNS: 0 when ATAPI DMA can be used |
2197 | * nonzero otherwise | |
2198 | */ | |
2199 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
2200 | { | |
2201 | struct ata_port *ap = qc->ap; | |
2202 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
2203 | ||
2204 | if (ap->ops->check_atapi_dma) | |
2205 | rc = ap->ops->check_atapi_dma(qc); | |
2206 | ||
2207 | return rc; | |
2208 | } | |
2209 | /** | |
2210 | * ata_qc_prep - Prepare taskfile for submission | |
2211 | * @qc: Metadata associated with taskfile to be prepared | |
2212 | * | |
780a87f7 JG |
2213 | * Prepare ATA taskfile for submission. |
2214 | * | |
1da177e4 LT |
2215 | * LOCKING: |
2216 | * spin_lock_irqsave(host_set lock) | |
2217 | */ | |
2218 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
2219 | { | |
2220 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
2221 | return; | |
2222 | ||
2223 | ata_fill_sg(qc); | |
2224 | } | |
2225 | ||
0cba632b JG |
2226 | /** |
2227 | * ata_sg_init_one - Associate command with memory buffer | |
2228 | * @qc: Command to be associated | |
2229 | * @buf: Memory buffer | |
2230 | * @buflen: Length of memory buffer, in bytes. | |
2231 | * | |
2232 | * Initialize the data-related elements of queued_cmd @qc | |
2233 | * to point to a single memory buffer, @buf of byte length @buflen. | |
2234 | * | |
2235 | * LOCKING: | |
2236 | * spin_lock_irqsave(host_set lock) | |
2237 | */ | |
2238 | ||
0baab86b EF |
2239 | |
2240 | ||
2241 | /** | |
2242 | * ata_sg_init_one - Prepare a one-entry scatter-gather list. | |
2243 | * @qc: Queued command | |
2244 | * @buf: transfer buffer | |
2245 | * @buflen: length of buf | |
2246 | * | |
2247 | * Builds a single-entry scatter-gather list to initiate a | |
2248 | * transfer utilizing the specified buffer. | |
2249 | * | |
2250 | * LOCKING: | |
2251 | */ | |
1da177e4 LT |
2252 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
2253 | { | |
2254 | struct scatterlist *sg; | |
2255 | ||
2256 | qc->flags |= ATA_QCFLAG_SINGLE; | |
2257 | ||
2258 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
2259 | qc->sg = &qc->sgent; | |
2260 | qc->n_elem = 1; | |
2261 | qc->buf_virt = buf; | |
2262 | ||
2263 | sg = qc->sg; | |
2264 | sg->page = virt_to_page(buf); | |
2265 | sg->offset = (unsigned long) buf & ~PAGE_MASK; | |
32529e01 | 2266 | sg->length = buflen; |
1da177e4 LT |
2267 | } |
2268 | ||
0cba632b JG |
2269 | /** |
2270 | * ata_sg_init - Associate command with scatter-gather table. | |
2271 | * @qc: Command to be associated | |
2272 | * @sg: Scatter-gather table. | |
2273 | * @n_elem: Number of elements in s/g table. | |
2274 | * | |
2275 | * Initialize the data-related elements of queued_cmd @qc | |
2276 | * to point to a scatter-gather table @sg, containing @n_elem | |
2277 | * elements. | |
2278 | * | |
2279 | * LOCKING: | |
2280 | * spin_lock_irqsave(host_set lock) | |
2281 | */ | |
2282 | ||
0baab86b EF |
2283 | |
2284 | /** | |
2285 | * ata_sg_init - Assign a scatter gather list to a queued command | |
2286 | * @qc: Queued command | |
2287 | * @sg: Scatter-gather list | |
2288 | * @n_elem: length of sg list | |
2289 | * | |
2290 | * Attaches a scatter-gather list to a queued command. | |
2291 | * | |
2292 | * LOCKING: | |
2293 | */ | |
2294 | ||
1da177e4 LT |
2295 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
2296 | unsigned int n_elem) | |
2297 | { | |
2298 | qc->flags |= ATA_QCFLAG_SG; | |
2299 | qc->sg = sg; | |
2300 | qc->n_elem = n_elem; | |
2301 | } | |
2302 | ||
2303 | /** | |
0cba632b JG |
2304 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
2305 | * @qc: Command with memory buffer to be mapped. | |
2306 | * | |
2307 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
2308 | * |
2309 | * LOCKING: | |
2310 | * spin_lock_irqsave(host_set lock) | |
2311 | * | |
2312 | * RETURNS: | |
0cba632b | 2313 | * Zero on success, negative on error. |
1da177e4 LT |
2314 | */ |
2315 | ||
2316 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
2317 | { | |
2318 | struct ata_port *ap = qc->ap; | |
2319 | int dir = qc->dma_dir; | |
2320 | struct scatterlist *sg = qc->sg; | |
2321 | dma_addr_t dma_address; | |
2322 | ||
2323 | dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt, | |
32529e01 | 2324 | sg->length, dir); |
1da177e4 LT |
2325 | if (dma_mapping_error(dma_address)) |
2326 | return -1; | |
2327 | ||
2328 | sg_dma_address(sg) = dma_address; | |
32529e01 | 2329 | sg_dma_len(sg) = sg->length; |
1da177e4 LT |
2330 | |
2331 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), | |
2332 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2333 | ||
2334 | return 0; | |
2335 | } | |
2336 | ||
2337 | /** | |
0cba632b JG |
2338 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
2339 | * @qc: Command with scatter-gather table to be mapped. | |
2340 | * | |
2341 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
2342 | * |
2343 | * LOCKING: | |
2344 | * spin_lock_irqsave(host_set lock) | |
2345 | * | |
2346 | * RETURNS: | |
0cba632b | 2347 | * Zero on success, negative on error. |
1da177e4 LT |
2348 | * |
2349 | */ | |
2350 | ||
2351 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
2352 | { | |
2353 | struct ata_port *ap = qc->ap; | |
2354 | struct scatterlist *sg = qc->sg; | |
2355 | int n_elem, dir; | |
2356 | ||
2357 | VPRINTK("ENTER, ata%u\n", ap->id); | |
2358 | assert(qc->flags & ATA_QCFLAG_SG); | |
2359 | ||
2360 | dir = qc->dma_dir; | |
2361 | n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
2362 | if (n_elem < 1) | |
2363 | return -1; | |
2364 | ||
2365 | DPRINTK("%d sg elements mapped\n", n_elem); | |
2366 | ||
2367 | qc->n_elem = n_elem; | |
2368 | ||
2369 | return 0; | |
2370 | } | |
2371 | ||
2372 | /** | |
2373 | * ata_pio_poll - | |
2374 | * @ap: | |
2375 | * | |
2376 | * LOCKING: | |
0cba632b | 2377 | * None. (executing in kernel thread context) |
1da177e4 LT |
2378 | * |
2379 | * RETURNS: | |
2380 | * | |
2381 | */ | |
2382 | ||
2383 | static unsigned long ata_pio_poll(struct ata_port *ap) | |
2384 | { | |
2385 | u8 status; | |
2386 | unsigned int poll_state = PIO_ST_UNKNOWN; | |
2387 | unsigned int reg_state = PIO_ST_UNKNOWN; | |
2388 | const unsigned int tmout_state = PIO_ST_TMOUT; | |
2389 | ||
2390 | switch (ap->pio_task_state) { | |
2391 | case PIO_ST: | |
2392 | case PIO_ST_POLL: | |
2393 | poll_state = PIO_ST_POLL; | |
2394 | reg_state = PIO_ST; | |
2395 | break; | |
2396 | case PIO_ST_LAST: | |
2397 | case PIO_ST_LAST_POLL: | |
2398 | poll_state = PIO_ST_LAST_POLL; | |
2399 | reg_state = PIO_ST_LAST; | |
2400 | break; | |
2401 | default: | |
2402 | BUG(); | |
2403 | break; | |
2404 | } | |
2405 | ||
2406 | status = ata_chk_status(ap); | |
2407 | if (status & ATA_BUSY) { | |
2408 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
2409 | ap->pio_task_state = tmout_state; | |
2410 | return 0; | |
2411 | } | |
2412 | ap->pio_task_state = poll_state; | |
2413 | return ATA_SHORT_PAUSE; | |
2414 | } | |
2415 | ||
2416 | ap->pio_task_state = reg_state; | |
2417 | return 0; | |
2418 | } | |
2419 | ||
2420 | /** | |
2421 | * ata_pio_complete - | |
2422 | * @ap: | |
2423 | * | |
2424 | * LOCKING: | |
0cba632b | 2425 | * None. (executing in kernel thread context) |
1da177e4 LT |
2426 | */ |
2427 | ||
2428 | static void ata_pio_complete (struct ata_port *ap) | |
2429 | { | |
2430 | struct ata_queued_cmd *qc; | |
2431 | u8 drv_stat; | |
2432 | ||
2433 | /* | |
2434 | * This is purely hueristic. This is a fast path. | |
2435 | * Sometimes when we enter, BSY will be cleared in | |
2436 | * a chk-status or two. If not, the drive is probably seeking | |
2437 | * or something. Snooze for a couple msecs, then | |
2438 | * chk-status again. If still busy, fall back to | |
2439 | * PIO_ST_POLL state. | |
2440 | */ | |
2441 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2442 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
2443 | msleep(2); | |
2444 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | |
2445 | if (drv_stat & (ATA_BUSY | ATA_DRQ)) { | |
2446 | ap->pio_task_state = PIO_ST_LAST_POLL; | |
2447 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; | |
2448 | return; | |
2449 | } | |
2450 | } | |
2451 | ||
2452 | drv_stat = ata_wait_idle(ap); | |
2453 | if (!ata_ok(drv_stat)) { | |
2454 | ap->pio_task_state = PIO_ST_ERR; | |
2455 | return; | |
2456 | } | |
2457 | ||
2458 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2459 | assert(qc != NULL); | |
2460 | ||
2461 | ap->pio_task_state = PIO_ST_IDLE; | |
2462 | ||
2463 | ata_irq_on(ap); | |
2464 | ||
2465 | ata_qc_complete(qc, drv_stat); | |
2466 | } | |
2467 | ||
0baab86b EF |
2468 | |
2469 | /** | |
2470 | * swap_buf_le16 - | |
2471 | * @buf: Buffer to swap | |
2472 | * @buf_words: Number of 16-bit words in buffer. | |
2473 | * | |
2474 | * Swap halves of 16-bit words if needed to convert from | |
2475 | * little-endian byte order to native cpu byte order, or | |
2476 | * vice-versa. | |
2477 | * | |
2478 | * LOCKING: | |
2479 | */ | |
1da177e4 LT |
2480 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
2481 | { | |
2482 | #ifdef __BIG_ENDIAN | |
2483 | unsigned int i; | |
2484 | ||
2485 | for (i = 0; i < buf_words; i++) | |
2486 | buf[i] = le16_to_cpu(buf[i]); | |
2487 | #endif /* __BIG_ENDIAN */ | |
2488 | } | |
2489 | ||
2490 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, | |
2491 | unsigned int buflen, int write_data) | |
2492 | { | |
2493 | unsigned int i; | |
2494 | unsigned int words = buflen >> 1; | |
2495 | u16 *buf16 = (u16 *) buf; | |
2496 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
2497 | ||
2498 | if (write_data) { | |
2499 | for (i = 0; i < words; i++) | |
2500 | writew(le16_to_cpu(buf16[i]), mmio); | |
2501 | } else { | |
2502 | for (i = 0; i < words; i++) | |
2503 | buf16[i] = cpu_to_le16(readw(mmio)); | |
2504 | } | |
2505 | } | |
2506 | ||
2507 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, | |
2508 | unsigned int buflen, int write_data) | |
2509 | { | |
2510 | unsigned int dwords = buflen >> 1; | |
2511 | ||
2512 | if (write_data) | |
2513 | outsw(ap->ioaddr.data_addr, buf, dwords); | |
2514 | else | |
2515 | insw(ap->ioaddr.data_addr, buf, dwords); | |
2516 | } | |
2517 | ||
2518 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, | |
2519 | unsigned int buflen, int do_write) | |
2520 | { | |
2521 | if (ap->flags & ATA_FLAG_MMIO) | |
2522 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
2523 | else | |
2524 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
2525 | } | |
2526 | ||
2527 | static void ata_pio_sector(struct ata_queued_cmd *qc) | |
2528 | { | |
2529 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2530 | struct scatterlist *sg = qc->sg; | |
2531 | struct ata_port *ap = qc->ap; | |
2532 | struct page *page; | |
2533 | unsigned int offset; | |
2534 | unsigned char *buf; | |
2535 | ||
2536 | if (qc->cursect == (qc->nsect - 1)) | |
2537 | ap->pio_task_state = PIO_ST_LAST; | |
2538 | ||
2539 | page = sg[qc->cursg].page; | |
2540 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
2541 | ||
2542 | /* get the current page and offset */ | |
2543 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2544 | offset %= PAGE_SIZE; | |
2545 | ||
2546 | buf = kmap(page) + offset; | |
2547 | ||
2548 | qc->cursect++; | |
2549 | qc->cursg_ofs++; | |
2550 | ||
32529e01 | 2551 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
2552 | qc->cursg++; |
2553 | qc->cursg_ofs = 0; | |
2554 | } | |
2555 | ||
2556 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2557 | ||
2558 | /* do the actual data transfer */ | |
2559 | do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2560 | ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write); | |
2561 | ||
2562 | kunmap(page); | |
2563 | } | |
2564 | ||
2565 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) | |
2566 | { | |
2567 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
2568 | struct scatterlist *sg = qc->sg; | |
2569 | struct ata_port *ap = qc->ap; | |
2570 | struct page *page; | |
2571 | unsigned char *buf; | |
2572 | unsigned int offset, count; | |
2573 | ||
2574 | if (qc->curbytes == qc->nbytes - bytes) | |
2575 | ap->pio_task_state = PIO_ST_LAST; | |
2576 | ||
2577 | next_sg: | |
2578 | sg = &qc->sg[qc->cursg]; | |
2579 | ||
2580 | next_page: | |
2581 | page = sg->page; | |
2582 | offset = sg->offset + qc->cursg_ofs; | |
2583 | ||
2584 | /* get the current page and offset */ | |
2585 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
2586 | offset %= PAGE_SIZE; | |
2587 | ||
32529e01 | 2588 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
2589 | |
2590 | /* don't cross page boundaries */ | |
2591 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
2592 | ||
2593 | buf = kmap(page) + offset; | |
2594 | ||
2595 | bytes -= count; | |
2596 | qc->curbytes += count; | |
2597 | qc->cursg_ofs += count; | |
2598 | ||
32529e01 | 2599 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
2600 | qc->cursg++; |
2601 | qc->cursg_ofs = 0; | |
2602 | } | |
2603 | ||
2604 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2605 | ||
2606 | /* do the actual data transfer */ | |
2607 | ata_data_xfer(ap, buf, count, do_write); | |
2608 | ||
2609 | kunmap(page); | |
2610 | ||
2611 | if (bytes) { | |
32529e01 | 2612 | if (qc->cursg_ofs < sg->length) |
1da177e4 LT |
2613 | goto next_page; |
2614 | goto next_sg; | |
2615 | } | |
2616 | } | |
2617 | ||
2618 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) | |
2619 | { | |
2620 | struct ata_port *ap = qc->ap; | |
2621 | struct ata_device *dev = qc->dev; | |
2622 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
2623 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
2624 | ||
2625 | ap->ops->tf_read(ap, &qc->tf); | |
2626 | ireason = qc->tf.nsect; | |
2627 | bc_lo = qc->tf.lbam; | |
2628 | bc_hi = qc->tf.lbah; | |
2629 | bytes = (bc_hi << 8) | bc_lo; | |
2630 | ||
2631 | /* shall be cleared to zero, indicating xfer of data */ | |
2632 | if (ireason & (1 << 0)) | |
2633 | goto err_out; | |
2634 | ||
2635 | /* make sure transfer direction matches expected */ | |
2636 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
2637 | if (do_write != i_write) | |
2638 | goto err_out; | |
2639 | ||
2640 | __atapi_pio_bytes(qc, bytes); | |
2641 | ||
2642 | return; | |
2643 | ||
2644 | err_out: | |
2645 | printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", | |
2646 | ap->id, dev->devno); | |
2647 | ap->pio_task_state = PIO_ST_ERR; | |
2648 | } | |
2649 | ||
2650 | /** | |
2651 | * ata_pio_sector - | |
2652 | * @ap: | |
2653 | * | |
2654 | * LOCKING: | |
0cba632b | 2655 | * None. (executing in kernel thread context) |
1da177e4 LT |
2656 | */ |
2657 | ||
2658 | static void ata_pio_block(struct ata_port *ap) | |
2659 | { | |
2660 | struct ata_queued_cmd *qc; | |
2661 | u8 status; | |
2662 | ||
2663 | /* | |
2664 | * This is purely hueristic. This is a fast path. | |
2665 | * Sometimes when we enter, BSY will be cleared in | |
2666 | * a chk-status or two. If not, the drive is probably seeking | |
2667 | * or something. Snooze for a couple msecs, then | |
2668 | * chk-status again. If still busy, fall back to | |
2669 | * PIO_ST_POLL state. | |
2670 | */ | |
2671 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
2672 | if (status & ATA_BUSY) { | |
2673 | msleep(2); | |
2674 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
2675 | if (status & ATA_BUSY) { | |
2676 | ap->pio_task_state = PIO_ST_POLL; | |
2677 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; | |
2678 | return; | |
2679 | } | |
2680 | } | |
2681 | ||
2682 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2683 | assert(qc != NULL); | |
2684 | ||
2685 | if (is_atapi_taskfile(&qc->tf)) { | |
2686 | /* no more data to transfer or unsupported ATAPI command */ | |
2687 | if ((status & ATA_DRQ) == 0) { | |
2688 | ap->pio_task_state = PIO_ST_IDLE; | |
2689 | ||
2690 | ata_irq_on(ap); | |
2691 | ||
2692 | ata_qc_complete(qc, status); | |
2693 | return; | |
2694 | } | |
2695 | ||
2696 | atapi_pio_bytes(qc); | |
2697 | } else { | |
2698 | /* handle BSY=0, DRQ=0 as error */ | |
2699 | if ((status & ATA_DRQ) == 0) { | |
2700 | ap->pio_task_state = PIO_ST_ERR; | |
2701 | return; | |
2702 | } | |
2703 | ||
2704 | ata_pio_sector(qc); | |
2705 | } | |
2706 | } | |
2707 | ||
2708 | static void ata_pio_error(struct ata_port *ap) | |
2709 | { | |
2710 | struct ata_queued_cmd *qc; | |
2711 | u8 drv_stat; | |
2712 | ||
2713 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2714 | assert(qc != NULL); | |
2715 | ||
2716 | drv_stat = ata_chk_status(ap); | |
2717 | printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n", | |
2718 | ap->id, drv_stat); | |
2719 | ||
2720 | ap->pio_task_state = PIO_ST_IDLE; | |
2721 | ||
2722 | ata_irq_on(ap); | |
2723 | ||
2724 | ata_qc_complete(qc, drv_stat | ATA_ERR); | |
2725 | } | |
2726 | ||
2727 | static void ata_pio_task(void *_data) | |
2728 | { | |
2729 | struct ata_port *ap = _data; | |
2730 | unsigned long timeout = 0; | |
2731 | ||
2732 | switch (ap->pio_task_state) { | |
2733 | case PIO_ST_IDLE: | |
2734 | return; | |
2735 | ||
2736 | case PIO_ST: | |
2737 | ata_pio_block(ap); | |
2738 | break; | |
2739 | ||
2740 | case PIO_ST_LAST: | |
2741 | ata_pio_complete(ap); | |
2742 | break; | |
2743 | ||
2744 | case PIO_ST_POLL: | |
2745 | case PIO_ST_LAST_POLL: | |
2746 | timeout = ata_pio_poll(ap); | |
2747 | break; | |
2748 | ||
2749 | case PIO_ST_TMOUT: | |
2750 | case PIO_ST_ERR: | |
2751 | ata_pio_error(ap); | |
2752 | return; | |
2753 | } | |
2754 | ||
2755 | if (timeout) | |
2756 | queue_delayed_work(ata_wq, &ap->pio_task, | |
2757 | timeout); | |
2758 | else | |
2759 | queue_work(ata_wq, &ap->pio_task); | |
2760 | } | |
2761 | ||
2762 | static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev, | |
2763 | struct scsi_cmnd *cmd) | |
2764 | { | |
2765 | DECLARE_COMPLETION(wait); | |
2766 | struct ata_queued_cmd *qc; | |
2767 | unsigned long flags; | |
2768 | int rc; | |
2769 | ||
2770 | DPRINTK("ATAPI request sense\n"); | |
2771 | ||
2772 | qc = ata_qc_new_init(ap, dev); | |
2773 | BUG_ON(qc == NULL); | |
2774 | ||
2775 | /* FIXME: is this needed? */ | |
2776 | memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer)); | |
2777 | ||
2778 | ata_sg_init_one(qc, cmd->sense_buffer, sizeof(cmd->sense_buffer)); | |
2779 | qc->dma_dir = DMA_FROM_DEVICE; | |
2780 | ||
21b1ed74 | 2781 | memset(&qc->cdb, 0, ap->cdb_len); |
1da177e4 LT |
2782 | qc->cdb[0] = REQUEST_SENSE; |
2783 | qc->cdb[4] = SCSI_SENSE_BUFFERSIZE; | |
2784 | ||
2785 | qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2786 | qc->tf.command = ATA_CMD_PACKET; | |
2787 | ||
2788 | qc->tf.protocol = ATA_PROT_ATAPI; | |
2789 | qc->tf.lbam = (8 * 1024) & 0xff; | |
2790 | qc->tf.lbah = (8 * 1024) >> 8; | |
2791 | qc->nbytes = SCSI_SENSE_BUFFERSIZE; | |
2792 | ||
2793 | qc->waiting = &wait; | |
2794 | qc->complete_fn = ata_qc_complete_noop; | |
2795 | ||
2796 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
2797 | rc = ata_qc_issue(qc); | |
2798 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
2799 | ||
2800 | if (rc) | |
2801 | ata_port_disable(ap); | |
2802 | else | |
2803 | wait_for_completion(&wait); | |
2804 | ||
2805 | DPRINTK("EXIT\n"); | |
2806 | } | |
2807 | ||
2808 | /** | |
2809 | * ata_qc_timeout - Handle timeout of queued command | |
2810 | * @qc: Command that timed out | |
2811 | * | |
2812 | * Some part of the kernel (currently, only the SCSI layer) | |
2813 | * has noticed that the active command on port @ap has not | |
2814 | * completed after a specified length of time. Handle this | |
2815 | * condition by disabling DMA (if necessary) and completing | |
2816 | * transactions, with error if necessary. | |
2817 | * | |
2818 | * This also handles the case of the "lost interrupt", where | |
2819 | * for some reason (possibly hardware bug, possibly driver bug) | |
2820 | * an interrupt was not delivered to the driver, even though the | |
2821 | * transaction completed successfully. | |
2822 | * | |
2823 | * LOCKING: | |
0cba632b | 2824 | * Inherited from SCSI layer (none, can sleep) |
1da177e4 LT |
2825 | */ |
2826 | ||
2827 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | |
2828 | { | |
2829 | struct ata_port *ap = qc->ap; | |
2830 | struct ata_device *dev = qc->dev; | |
2831 | u8 host_stat = 0, drv_stat; | |
2832 | ||
2833 | DPRINTK("ENTER\n"); | |
2834 | ||
2835 | /* FIXME: doesn't this conflict with timeout handling? */ | |
2836 | if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) { | |
2837 | struct scsi_cmnd *cmd = qc->scsicmd; | |
2838 | ||
2839 | if (!scsi_eh_eflags_chk(cmd, SCSI_EH_CANCEL_CMD)) { | |
2840 | ||
2841 | /* finish completing original command */ | |
2842 | __ata_qc_complete(qc); | |
2843 | ||
2844 | atapi_request_sense(ap, dev, cmd); | |
2845 | ||
2846 | cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16); | |
2847 | scsi_finish_command(cmd); | |
2848 | ||
2849 | goto out; | |
2850 | } | |
2851 | } | |
2852 | ||
2853 | /* hack alert! We cannot use the supplied completion | |
2854 | * function from inside the ->eh_strategy_handler() thread. | |
2855 | * libata is the only user of ->eh_strategy_handler() in | |
2856 | * any kernel, so the default scsi_done() assumes it is | |
2857 | * not being called from the SCSI EH. | |
2858 | */ | |
2859 | qc->scsidone = scsi_finish_command; | |
2860 | ||
2861 | switch (qc->tf.protocol) { | |
2862 | ||
2863 | case ATA_PROT_DMA: | |
2864 | case ATA_PROT_ATAPI_DMA: | |
2865 | host_stat = ap->ops->bmdma_status(ap); | |
2866 | ||
2867 | /* before we do anything else, clear DMA-Start bit */ | |
2868 | ap->ops->bmdma_stop(ap); | |
2869 | ||
2870 | /* fall through */ | |
2871 | ||
2872 | default: | |
2873 | ata_altstatus(ap); | |
2874 | drv_stat = ata_chk_status(ap); | |
2875 | ||
2876 | /* ack bmdma irq events */ | |
2877 | ap->ops->irq_clear(ap); | |
2878 | ||
2879 | printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n", | |
2880 | ap->id, qc->tf.command, drv_stat, host_stat); | |
2881 | ||
2882 | /* complete taskfile transaction */ | |
2883 | ata_qc_complete(qc, drv_stat); | |
2884 | break; | |
2885 | } | |
2886 | out: | |
2887 | DPRINTK("EXIT\n"); | |
2888 | } | |
2889 | ||
2890 | /** | |
2891 | * ata_eng_timeout - Handle timeout of queued command | |
2892 | * @ap: Port on which timed-out command is active | |
2893 | * | |
2894 | * Some part of the kernel (currently, only the SCSI layer) | |
2895 | * has noticed that the active command on port @ap has not | |
2896 | * completed after a specified length of time. Handle this | |
2897 | * condition by disabling DMA (if necessary) and completing | |
2898 | * transactions, with error if necessary. | |
2899 | * | |
2900 | * This also handles the case of the "lost interrupt", where | |
2901 | * for some reason (possibly hardware bug, possibly driver bug) | |
2902 | * an interrupt was not delivered to the driver, even though the | |
2903 | * transaction completed successfully. | |
2904 | * | |
2905 | * LOCKING: | |
2906 | * Inherited from SCSI layer (none, can sleep) | |
2907 | */ | |
2908 | ||
2909 | void ata_eng_timeout(struct ata_port *ap) | |
2910 | { | |
2911 | struct ata_queued_cmd *qc; | |
2912 | ||
2913 | DPRINTK("ENTER\n"); | |
2914 | ||
2915 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
2916 | if (!qc) { | |
2917 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", | |
2918 | ap->id); | |
2919 | goto out; | |
2920 | } | |
2921 | ||
2922 | ata_qc_timeout(qc); | |
2923 | ||
2924 | out: | |
2925 | DPRINTK("EXIT\n"); | |
2926 | } | |
2927 | ||
2928 | /** | |
2929 | * ata_qc_new - Request an available ATA command, for queueing | |
2930 | * @ap: Port associated with device @dev | |
2931 | * @dev: Device from whom we request an available command structure | |
2932 | * | |
2933 | * LOCKING: | |
0cba632b | 2934 | * None. |
1da177e4 LT |
2935 | */ |
2936 | ||
2937 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
2938 | { | |
2939 | struct ata_queued_cmd *qc = NULL; | |
2940 | unsigned int i; | |
2941 | ||
2942 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
2943 | if (!test_and_set_bit(i, &ap->qactive)) { | |
2944 | qc = ata_qc_from_tag(ap, i); | |
2945 | break; | |
2946 | } | |
2947 | ||
2948 | if (qc) | |
2949 | qc->tag = i; | |
2950 | ||
2951 | return qc; | |
2952 | } | |
2953 | ||
2954 | /** | |
2955 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
2956 | * @ap: Port associated with device @dev | |
2957 | * @dev: Device from whom we request an available command structure | |
2958 | * | |
2959 | * LOCKING: | |
0cba632b | 2960 | * None. |
1da177e4 LT |
2961 | */ |
2962 | ||
2963 | struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | |
2964 | struct ata_device *dev) | |
2965 | { | |
2966 | struct ata_queued_cmd *qc; | |
2967 | ||
2968 | qc = ata_qc_new(ap); | |
2969 | if (qc) { | |
2970 | qc->sg = NULL; | |
2971 | qc->flags = 0; | |
2972 | qc->scsicmd = NULL; | |
2973 | qc->ap = ap; | |
2974 | qc->dev = dev; | |
2975 | qc->cursect = qc->cursg = qc->cursg_ofs = 0; | |
2976 | qc->nsect = 0; | |
2977 | qc->nbytes = qc->curbytes = 0; | |
2978 | ||
2979 | ata_tf_init(ap, &qc->tf, dev->devno); | |
2980 | ||
2981 | if (dev->flags & ATA_DFLAG_LBA48) | |
2982 | qc->tf.flags |= ATA_TFLAG_LBA48; | |
2983 | } | |
2984 | ||
2985 | return qc; | |
2986 | } | |
2987 | ||
2988 | static int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat) | |
2989 | { | |
2990 | return 0; | |
2991 | } | |
2992 | ||
2993 | static void __ata_qc_complete(struct ata_queued_cmd *qc) | |
2994 | { | |
2995 | struct ata_port *ap = qc->ap; | |
2996 | unsigned int tag, do_clear = 0; | |
2997 | ||
2998 | qc->flags = 0; | |
2999 | tag = qc->tag; | |
3000 | if (likely(ata_tag_valid(tag))) { | |
3001 | if (tag == ap->active_tag) | |
3002 | ap->active_tag = ATA_TAG_POISON; | |
3003 | qc->tag = ATA_TAG_POISON; | |
3004 | do_clear = 1; | |
3005 | } | |
3006 | ||
3007 | if (qc->waiting) { | |
3008 | struct completion *waiting = qc->waiting; | |
3009 | qc->waiting = NULL; | |
3010 | complete(waiting); | |
3011 | } | |
3012 | ||
3013 | if (likely(do_clear)) | |
3014 | clear_bit(tag, &ap->qactive); | |
3015 | } | |
3016 | ||
3017 | /** | |
3018 | * ata_qc_free - free unused ata_queued_cmd | |
3019 | * @qc: Command to complete | |
3020 | * | |
3021 | * Designed to free unused ata_queued_cmd object | |
3022 | * in case something prevents using it. | |
3023 | * | |
3024 | * LOCKING: | |
0cba632b | 3025 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3026 | * |
3027 | */ | |
3028 | void ata_qc_free(struct ata_queued_cmd *qc) | |
3029 | { | |
3030 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3031 | assert(qc->waiting == NULL); /* nothing should be waiting */ | |
3032 | ||
3033 | __ata_qc_complete(qc); | |
3034 | } | |
3035 | ||
3036 | /** | |
3037 | * ata_qc_complete - Complete an active ATA command | |
3038 | * @qc: Command to complete | |
0cba632b JG |
3039 | * @drv_stat: ATA Status register contents |
3040 | * | |
3041 | * Indicate to the mid and upper layers that an ATA | |
3042 | * command has completed, with either an ok or not-ok status. | |
1da177e4 LT |
3043 | * |
3044 | * LOCKING: | |
0cba632b | 3045 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3046 | * |
3047 | */ | |
3048 | ||
3049 | void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |
3050 | { | |
3051 | int rc; | |
3052 | ||
3053 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3054 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3055 | ||
3056 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3057 | ata_sg_clean(qc); | |
3058 | ||
3059 | /* call completion callback */ | |
3060 | rc = qc->complete_fn(qc, drv_stat); | |
21b1ed74 | 3061 | qc->flags &= ~ATA_QCFLAG_ACTIVE; |
1da177e4 LT |
3062 | |
3063 | /* if callback indicates not to complete command (non-zero), | |
3064 | * return immediately | |
3065 | */ | |
3066 | if (rc != 0) | |
3067 | return; | |
3068 | ||
3069 | __ata_qc_complete(qc); | |
3070 | ||
3071 | VPRINTK("EXIT\n"); | |
3072 | } | |
3073 | ||
3074 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
3075 | { | |
3076 | struct ata_port *ap = qc->ap; | |
3077 | ||
3078 | switch (qc->tf.protocol) { | |
3079 | case ATA_PROT_DMA: | |
3080 | case ATA_PROT_ATAPI_DMA: | |
3081 | return 1; | |
3082 | ||
3083 | case ATA_PROT_ATAPI: | |
3084 | case ATA_PROT_PIO: | |
3085 | case ATA_PROT_PIO_MULT: | |
3086 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
3087 | return 1; | |
3088 | ||
3089 | /* fall through */ | |
3090 | ||
3091 | default: | |
3092 | return 0; | |
3093 | } | |
3094 | ||
3095 | /* never reached */ | |
3096 | } | |
3097 | ||
3098 | /** | |
3099 | * ata_qc_issue - issue taskfile to device | |
3100 | * @qc: command to issue to device | |
3101 | * | |
3102 | * Prepare an ATA command to submission to device. | |
3103 | * This includes mapping the data into a DMA-able | |
3104 | * area, filling in the S/G table, and finally | |
3105 | * writing the taskfile to hardware, starting the command. | |
3106 | * | |
3107 | * LOCKING: | |
3108 | * spin_lock_irqsave(host_set lock) | |
3109 | * | |
3110 | * RETURNS: | |
3111 | * Zero on success, negative on error. | |
3112 | */ | |
3113 | ||
3114 | int ata_qc_issue(struct ata_queued_cmd *qc) | |
3115 | { | |
3116 | struct ata_port *ap = qc->ap; | |
3117 | ||
3118 | if (ata_should_dma_map(qc)) { | |
3119 | if (qc->flags & ATA_QCFLAG_SG) { | |
3120 | if (ata_sg_setup(qc)) | |
3121 | goto err_out; | |
3122 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { | |
3123 | if (ata_sg_setup_one(qc)) | |
3124 | goto err_out; | |
3125 | } | |
3126 | } else { | |
3127 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
3128 | } | |
3129 | ||
3130 | ap->ops->qc_prep(qc); | |
3131 | ||
3132 | qc->ap->active_tag = qc->tag; | |
3133 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
3134 | ||
3135 | return ap->ops->qc_issue(qc); | |
3136 | ||
3137 | err_out: | |
3138 | return -1; | |
3139 | } | |
3140 | ||
0baab86b | 3141 | |
1da177e4 LT |
3142 | /** |
3143 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
3144 | * @qc: command to issue to device | |
3145 | * | |
3146 | * Using various libata functions and hooks, this function | |
3147 | * starts an ATA command. ATA commands are grouped into | |
3148 | * classes called "protocols", and issuing each type of protocol | |
3149 | * is slightly different. | |
3150 | * | |
0baab86b EF |
3151 | * May be used as the qc_issue() entry in ata_port_operations. |
3152 | * | |
1da177e4 LT |
3153 | * LOCKING: |
3154 | * spin_lock_irqsave(host_set lock) | |
3155 | * | |
3156 | * RETURNS: | |
3157 | * Zero on success, negative on error. | |
3158 | */ | |
3159 | ||
3160 | int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |
3161 | { | |
3162 | struct ata_port *ap = qc->ap; | |
3163 | ||
3164 | ata_dev_select(ap, qc->dev->devno, 1, 0); | |
3165 | ||
3166 | switch (qc->tf.protocol) { | |
3167 | case ATA_PROT_NODATA: | |
3168 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3169 | break; | |
3170 | ||
3171 | case ATA_PROT_DMA: | |
3172 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
3173 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3174 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3175 | break; | |
3176 | ||
3177 | case ATA_PROT_PIO: /* load tf registers, initiate polling pio */ | |
3178 | ata_qc_set_polling(qc); | |
3179 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3180 | ap->pio_task_state = PIO_ST; | |
3181 | queue_work(ata_wq, &ap->pio_task); | |
3182 | break; | |
3183 | ||
3184 | case ATA_PROT_ATAPI: | |
3185 | ata_qc_set_polling(qc); | |
3186 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3187 | queue_work(ata_wq, &ap->packet_task); | |
3188 | break; | |
3189 | ||
3190 | case ATA_PROT_ATAPI_NODATA: | |
3191 | ata_tf_to_host_nolock(ap, &qc->tf); | |
3192 | queue_work(ata_wq, &ap->packet_task); | |
3193 | break; | |
3194 | ||
3195 | case ATA_PROT_ATAPI_DMA: | |
3196 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
3197 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3198 | queue_work(ata_wq, &ap->packet_task); | |
3199 | break; | |
3200 | ||
3201 | default: | |
3202 | WARN_ON(1); | |
3203 | return -1; | |
3204 | } | |
3205 | ||
3206 | return 0; | |
3207 | } | |
3208 | ||
3209 | /** | |
0baab86b | 3210 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction |
1da177e4 LT |
3211 | * @qc: Info associated with this ATA transaction. |
3212 | * | |
3213 | * LOCKING: | |
3214 | * spin_lock_irqsave(host_set lock) | |
3215 | */ | |
3216 | ||
3217 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |
3218 | { | |
3219 | struct ata_port *ap = qc->ap; | |
3220 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3221 | u8 dmactl; | |
3222 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3223 | ||
3224 | /* load PRD table addr. */ | |
3225 | mb(); /* make sure PRD table writes are visible to controller */ | |
3226 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); | |
3227 | ||
3228 | /* specify data direction, triple-check start bit is clear */ | |
3229 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3230 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3231 | if (!rw) | |
3232 | dmactl |= ATA_DMA_WR; | |
3233 | writeb(dmactl, mmio + ATA_DMA_CMD); | |
3234 | ||
3235 | /* issue r/w command */ | |
3236 | ap->ops->exec_command(ap, &qc->tf); | |
3237 | } | |
3238 | ||
3239 | /** | |
3240 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
3241 | * @qc: Info associated with this ATA transaction. | |
3242 | * | |
3243 | * LOCKING: | |
3244 | * spin_lock_irqsave(host_set lock) | |
3245 | */ | |
3246 | ||
3247 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) | |
3248 | { | |
3249 | struct ata_port *ap = qc->ap; | |
3250 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3251 | u8 dmactl; | |
3252 | ||
3253 | /* start host DMA transaction */ | |
3254 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3255 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | |
3256 | ||
3257 | /* Strictly, one may wish to issue a readb() here, to | |
3258 | * flush the mmio write. However, control also passes | |
3259 | * to the hardware at this point, and it will interrupt | |
3260 | * us when we are to resume control. So, in effect, | |
3261 | * we don't care when the mmio write flushes. | |
3262 | * Further, a read of the DMA status register _immediately_ | |
3263 | * following the write may not be what certain flaky hardware | |
3264 | * is expected, so I think it is best to not add a readb() | |
3265 | * without first all the MMIO ATA cards/mobos. | |
3266 | * Or maybe I'm just being paranoid. | |
3267 | */ | |
3268 | } | |
3269 | ||
3270 | /** | |
3271 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) | |
3272 | * @qc: Info associated with this ATA transaction. | |
3273 | * | |
3274 | * LOCKING: | |
3275 | * spin_lock_irqsave(host_set lock) | |
3276 | */ | |
3277 | ||
3278 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) | |
3279 | { | |
3280 | struct ata_port *ap = qc->ap; | |
3281 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3282 | u8 dmactl; | |
3283 | ||
3284 | /* load PRD table addr. */ | |
3285 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); | |
3286 | ||
3287 | /* specify data direction, triple-check start bit is clear */ | |
3288 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3289 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3290 | if (!rw) | |
3291 | dmactl |= ATA_DMA_WR; | |
3292 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3293 | ||
3294 | /* issue r/w command */ | |
3295 | ap->ops->exec_command(ap, &qc->tf); | |
3296 | } | |
3297 | ||
3298 | /** | |
3299 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) | |
3300 | * @qc: Info associated with this ATA transaction. | |
3301 | * | |
3302 | * LOCKING: | |
3303 | * spin_lock_irqsave(host_set lock) | |
3304 | */ | |
3305 | ||
3306 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) | |
3307 | { | |
3308 | struct ata_port *ap = qc->ap; | |
3309 | u8 dmactl; | |
3310 | ||
3311 | /* start host DMA transaction */ | |
3312 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3313 | outb(dmactl | ATA_DMA_START, | |
3314 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3315 | } | |
3316 | ||
0baab86b EF |
3317 | |
3318 | /** | |
3319 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
3320 | * @qc: Info associated with this ATA transaction. | |
3321 | * | |
3322 | * Writes the ATA_DMA_START flag to the DMA command register. | |
3323 | * | |
3324 | * May be used as the bmdma_start() entry in ata_port_operations. | |
3325 | * | |
3326 | * LOCKING: | |
3327 | * spin_lock_irqsave(host_set lock) | |
3328 | */ | |
1da177e4 LT |
3329 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
3330 | { | |
3331 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3332 | ata_bmdma_start_mmio(qc); | |
3333 | else | |
3334 | ata_bmdma_start_pio(qc); | |
3335 | } | |
3336 | ||
0baab86b EF |
3337 | |
3338 | /** | |
3339 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction | |
3340 | * @qc: Info associated with this ATA transaction. | |
3341 | * | |
3342 | * Writes address of PRD table to device's PRD Table Address | |
3343 | * register, sets the DMA control register, and calls | |
3344 | * ops->exec_command() to start the transfer. | |
3345 | * | |
3346 | * May be used as the bmdma_setup() entry in ata_port_operations. | |
3347 | * | |
3348 | * LOCKING: | |
3349 | * spin_lock_irqsave(host_set lock) | |
3350 | */ | |
1da177e4 LT |
3351 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
3352 | { | |
3353 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3354 | ata_bmdma_setup_mmio(qc); | |
3355 | else | |
3356 | ata_bmdma_setup_pio(qc); | |
3357 | } | |
3358 | ||
0baab86b EF |
3359 | |
3360 | /** | |
3361 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | |
decc6d0b | 3362 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3363 | * |
3364 | * Clear interrupt and error flags in DMA status register. | |
3365 | * | |
3366 | * May be used as the irq_clear() entry in ata_port_operations. | |
3367 | * | |
3368 | * LOCKING: | |
3369 | * spin_lock_irqsave(host_set lock) | |
3370 | */ | |
3371 | ||
1da177e4 LT |
3372 | void ata_bmdma_irq_clear(struct ata_port *ap) |
3373 | { | |
3374 | if (ap->flags & ATA_FLAG_MMIO) { | |
3375 | void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; | |
3376 | writeb(readb(mmio), mmio); | |
3377 | } else { | |
3378 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; | |
3379 | outb(inb(addr), addr); | |
3380 | } | |
3381 | ||
3382 | } | |
3383 | ||
0baab86b EF |
3384 | |
3385 | /** | |
3386 | * ata_bmdma_status - Read PCI IDE BMDMA status | |
decc6d0b | 3387 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3388 | * |
3389 | * Read and return BMDMA status register. | |
3390 | * | |
3391 | * May be used as the bmdma_status() entry in ata_port_operations. | |
3392 | * | |
3393 | * LOCKING: | |
3394 | * spin_lock_irqsave(host_set lock) | |
3395 | */ | |
3396 | ||
1da177e4 LT |
3397 | u8 ata_bmdma_status(struct ata_port *ap) |
3398 | { | |
3399 | u8 host_stat; | |
3400 | if (ap->flags & ATA_FLAG_MMIO) { | |
3401 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3402 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
3403 | } else | |
3404 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); | |
3405 | return host_stat; | |
3406 | } | |
3407 | ||
0baab86b EF |
3408 | |
3409 | /** | |
3410 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | |
decc6d0b | 3411 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3412 | * |
3413 | * Clears the ATA_DMA_START flag in the dma control register | |
3414 | * | |
3415 | * May be used as the bmdma_stop() entry in ata_port_operations. | |
3416 | * | |
3417 | * LOCKING: | |
3418 | * spin_lock_irqsave(host_set lock) | |
3419 | */ | |
3420 | ||
1da177e4 LT |
3421 | void ata_bmdma_stop(struct ata_port *ap) |
3422 | { | |
3423 | if (ap->flags & ATA_FLAG_MMIO) { | |
3424 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3425 | ||
3426 | /* clear start/stop bit */ | |
3427 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3428 | mmio + ATA_DMA_CMD); | |
3429 | } else { | |
3430 | /* clear start/stop bit */ | |
3431 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3432 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3433 | } | |
3434 | ||
3435 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | |
3436 | ata_altstatus(ap); /* dummy read */ | |
3437 | } | |
3438 | ||
3439 | /** | |
3440 | * ata_host_intr - Handle host interrupt for given (port, task) | |
3441 | * @ap: Port on which interrupt arrived (possibly...) | |
3442 | * @qc: Taskfile currently active in engine | |
3443 | * | |
3444 | * Handle host interrupt for given queued command. Currently, | |
3445 | * only DMA interrupts are handled. All other commands are | |
3446 | * handled via polling with interrupts disabled (nIEN bit). | |
3447 | * | |
3448 | * LOCKING: | |
3449 | * spin_lock_irqsave(host_set lock) | |
3450 | * | |
3451 | * RETURNS: | |
3452 | * One if interrupt was handled, zero if not (shared irq). | |
3453 | */ | |
3454 | ||
3455 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
3456 | struct ata_queued_cmd *qc) | |
3457 | { | |
3458 | u8 status, host_stat; | |
3459 | ||
3460 | switch (qc->tf.protocol) { | |
3461 | ||
3462 | case ATA_PROT_DMA: | |
3463 | case ATA_PROT_ATAPI_DMA: | |
3464 | case ATA_PROT_ATAPI: | |
3465 | /* check status of DMA engine */ | |
3466 | host_stat = ap->ops->bmdma_status(ap); | |
3467 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
3468 | ||
3469 | /* if it's not our irq... */ | |
3470 | if (!(host_stat & ATA_DMA_INTR)) | |
3471 | goto idle_irq; | |
3472 | ||
3473 | /* before we do anything else, clear DMA-Start bit */ | |
3474 | ap->ops->bmdma_stop(ap); | |
3475 | ||
3476 | /* fall through */ | |
3477 | ||
3478 | case ATA_PROT_ATAPI_NODATA: | |
3479 | case ATA_PROT_NODATA: | |
3480 | /* check altstatus */ | |
3481 | status = ata_altstatus(ap); | |
3482 | if (status & ATA_BUSY) | |
3483 | goto idle_irq; | |
3484 | ||
3485 | /* check main status, clearing INTRQ */ | |
3486 | status = ata_chk_status(ap); | |
3487 | if (unlikely(status & ATA_BUSY)) | |
3488 | goto idle_irq; | |
3489 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | |
3490 | ap->id, qc->tf.protocol, status); | |
3491 | ||
3492 | /* ack bmdma irq events */ | |
3493 | ap->ops->irq_clear(ap); | |
3494 | ||
3495 | /* complete taskfile transaction */ | |
3496 | ata_qc_complete(qc, status); | |
3497 | break; | |
3498 | ||
3499 | default: | |
3500 | goto idle_irq; | |
3501 | } | |
3502 | ||
3503 | return 1; /* irq handled */ | |
3504 | ||
3505 | idle_irq: | |
3506 | ap->stats.idle_irq++; | |
3507 | ||
3508 | #ifdef ATA_IRQ_TRAP | |
3509 | if ((ap->stats.idle_irq % 1000) == 0) { | |
3510 | handled = 1; | |
3511 | ata_irq_ack(ap, 0); /* debug trap */ | |
3512 | printk(KERN_WARNING "ata%d: irq trap\n", ap->id); | |
3513 | } | |
3514 | #endif | |
3515 | return 0; /* irq not handled */ | |
3516 | } | |
3517 | ||
3518 | /** | |
3519 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
3520 | * @irq: irq line (unused) |
3521 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
3522 | * @regs: unused |
3523 | * | |
0cba632b JG |
3524 | * Default interrupt handler for PCI IDE devices. Calls |
3525 | * ata_host_intr() for each port that is not disabled. | |
3526 | * | |
1da177e4 | 3527 | * LOCKING: |
0cba632b | 3528 | * Obtains host_set lock during operation. |
1da177e4 LT |
3529 | * |
3530 | * RETURNS: | |
0cba632b | 3531 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
3532 | * |
3533 | */ | |
3534 | ||
3535 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
3536 | { | |
3537 | struct ata_host_set *host_set = dev_instance; | |
3538 | unsigned int i; | |
3539 | unsigned int handled = 0; | |
3540 | unsigned long flags; | |
3541 | ||
3542 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
3543 | spin_lock_irqsave(&host_set->lock, flags); | |
3544 | ||
3545 | for (i = 0; i < host_set->n_ports; i++) { | |
3546 | struct ata_port *ap; | |
3547 | ||
3548 | ap = host_set->ports[i]; | |
3549 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | |
3550 | struct ata_queued_cmd *qc; | |
3551 | ||
3552 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
21b1ed74 AL |
3553 | if (qc && (!(qc->tf.ctl & ATA_NIEN)) && |
3554 | (qc->flags & ATA_QCFLAG_ACTIVE)) | |
1da177e4 LT |
3555 | handled |= ata_host_intr(ap, qc); |
3556 | } | |
3557 | } | |
3558 | ||
3559 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3560 | ||
3561 | return IRQ_RETVAL(handled); | |
3562 | } | |
3563 | ||
3564 | /** | |
3565 | * atapi_packet_task - Write CDB bytes to hardware | |
3566 | * @_data: Port to which ATAPI device is attached. | |
3567 | * | |
3568 | * When device has indicated its readiness to accept | |
3569 | * a CDB, this function is called. Send the CDB. | |
3570 | * If DMA is to be performed, exit immediately. | |
3571 | * Otherwise, we are in polling mode, so poll | |
3572 | * status under operation succeeds or fails. | |
3573 | * | |
3574 | * LOCKING: | |
3575 | * Kernel thread context (may sleep) | |
3576 | */ | |
3577 | ||
3578 | static void atapi_packet_task(void *_data) | |
3579 | { | |
3580 | struct ata_port *ap = _data; | |
3581 | struct ata_queued_cmd *qc; | |
3582 | u8 status; | |
3583 | ||
3584 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3585 | assert(qc != NULL); | |
3586 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3587 | ||
3588 | /* sleep-wait for BSY to clear */ | |
3589 | DPRINTK("busy wait\n"); | |
3590 | if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) | |
3591 | goto err_out; | |
3592 | ||
3593 | /* make sure DRQ is set */ | |
3594 | status = ata_chk_status(ap); | |
3595 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) | |
3596 | goto err_out; | |
3597 | ||
3598 | /* send SCSI cdb */ | |
3599 | DPRINTK("send cdb\n"); | |
3600 | assert(ap->cdb_len >= 12); | |
3601 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
3602 | ||
3603 | /* if we are DMA'ing, irq handler takes over from here */ | |
3604 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | |
3605 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3606 | ||
3607 | /* non-data commands are also handled via irq */ | |
3608 | else if (qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | |
3609 | /* do nothing */ | |
3610 | } | |
3611 | ||
3612 | /* PIO commands are handled by polling */ | |
3613 | else { | |
3614 | ap->pio_task_state = PIO_ST; | |
3615 | queue_work(ata_wq, &ap->pio_task); | |
3616 | } | |
3617 | ||
3618 | return; | |
3619 | ||
3620 | err_out: | |
3621 | ata_qc_complete(qc, ATA_ERR); | |
3622 | } | |
3623 | ||
0baab86b EF |
3624 | |
3625 | /** | |
3626 | * ata_port_start - Set port up for dma. | |
3627 | * @ap: Port to initialize | |
3628 | * | |
3629 | * Called just after data structures for each port are | |
3630 | * initialized. Allocates space for PRD table. | |
3631 | * | |
3632 | * May be used as the port_start() entry in ata_port_operations. | |
3633 | * | |
3634 | * LOCKING: | |
3635 | */ | |
3636 | ||
1da177e4 LT |
3637 | int ata_port_start (struct ata_port *ap) |
3638 | { | |
3639 | struct device *dev = ap->host_set->dev; | |
3640 | ||
3641 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
3642 | if (!ap->prd) | |
3643 | return -ENOMEM; | |
3644 | ||
3645 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); | |
3646 | ||
3647 | return 0; | |
3648 | } | |
3649 | ||
0baab86b EF |
3650 | |
3651 | /** | |
3652 | * ata_port_stop - Undo ata_port_start() | |
3653 | * @ap: Port to shut down | |
3654 | * | |
3655 | * Frees the PRD table. | |
3656 | * | |
3657 | * May be used as the port_stop() entry in ata_port_operations. | |
3658 | * | |
3659 | * LOCKING: | |
3660 | */ | |
3661 | ||
1da177e4 LT |
3662 | void ata_port_stop (struct ata_port *ap) |
3663 | { | |
3664 | struct device *dev = ap->host_set->dev; | |
3665 | ||
3666 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
3667 | } | |
3668 | ||
aa8f0dc6 JG |
3669 | void ata_host_stop (struct ata_host_set *host_set) |
3670 | { | |
3671 | if (host_set->mmio_base) | |
3672 | iounmap(host_set->mmio_base); | |
3673 | } | |
3674 | ||
3675 | ||
1da177e4 LT |
3676 | /** |
3677 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
3678 | * @ap: Port to unregister | |
3679 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
3680 | * | |
3681 | * LOCKING: | |
3682 | */ | |
3683 | ||
3684 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
3685 | { | |
3686 | struct Scsi_Host *sh = ap->host; | |
3687 | ||
3688 | DPRINTK("ENTER\n"); | |
3689 | ||
3690 | if (do_unregister) | |
3691 | scsi_remove_host(sh); | |
3692 | ||
3693 | ap->ops->port_stop(ap); | |
3694 | } | |
3695 | ||
3696 | /** | |
3697 | * ata_host_init - Initialize an ata_port structure | |
3698 | * @ap: Structure to initialize | |
3699 | * @host: associated SCSI mid-layer structure | |
3700 | * @host_set: Collection of hosts to which @ap belongs | |
3701 | * @ent: Probe information provided by low-level driver | |
3702 | * @port_no: Port number associated with this ata_port | |
3703 | * | |
0cba632b JG |
3704 | * Initialize a new ata_port structure, and its associated |
3705 | * scsi_host. | |
3706 | * | |
1da177e4 | 3707 | * LOCKING: |
0cba632b | 3708 | * Inherited from caller. |
1da177e4 LT |
3709 | * |
3710 | */ | |
3711 | ||
3712 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
3713 | struct ata_host_set *host_set, | |
3714 | struct ata_probe_ent *ent, unsigned int port_no) | |
3715 | { | |
3716 | unsigned int i; | |
3717 | ||
3718 | host->max_id = 16; | |
3719 | host->max_lun = 1; | |
3720 | host->max_channel = 1; | |
3721 | host->unique_id = ata_unique_id++; | |
3722 | host->max_cmd_len = 12; | |
3723 | scsi_set_device(host, ent->dev); | |
3724 | scsi_assign_lock(host, &host_set->lock); | |
3725 | ||
3726 | ap->flags = ATA_FLAG_PORT_DISABLED; | |
3727 | ap->id = host->unique_id; | |
3728 | ap->host = host; | |
3729 | ap->ctl = ATA_DEVCTL_OBS; | |
3730 | ap->host_set = host_set; | |
3731 | ap->port_no = port_no; | |
3732 | ap->hard_port_no = | |
3733 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
3734 | ap->pio_mask = ent->pio_mask; | |
3735 | ap->mwdma_mask = ent->mwdma_mask; | |
3736 | ap->udma_mask = ent->udma_mask; | |
3737 | ap->flags |= ent->host_flags; | |
3738 | ap->ops = ent->port_ops; | |
3739 | ap->cbl = ATA_CBL_NONE; | |
3740 | ap->active_tag = ATA_TAG_POISON; | |
3741 | ap->last_ctl = 0xFF; | |
3742 | ||
3743 | INIT_WORK(&ap->packet_task, atapi_packet_task, ap); | |
3744 | INIT_WORK(&ap->pio_task, ata_pio_task, ap); | |
3745 | ||
3746 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
3747 | ap->device[i].devno = i; | |
3748 | ||
3749 | #ifdef ATA_IRQ_TRAP | |
3750 | ap->stats.unhandled_irq = 1; | |
3751 | ap->stats.idle_irq = 1; | |
3752 | #endif | |
3753 | ||
3754 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
3755 | } | |
3756 | ||
3757 | /** | |
3758 | * ata_host_add - Attach low-level ATA driver to system | |
3759 | * @ent: Information provided by low-level driver | |
3760 | * @host_set: Collections of ports to which we add | |
3761 | * @port_no: Port number associated with this host | |
3762 | * | |
0cba632b JG |
3763 | * Attach low-level ATA driver to system. |
3764 | * | |
1da177e4 | 3765 | * LOCKING: |
0cba632b | 3766 | * PCI/etc. bus probe sem. |
1da177e4 LT |
3767 | * |
3768 | * RETURNS: | |
0cba632b | 3769 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
3770 | * |
3771 | */ | |
3772 | ||
3773 | static struct ata_port * ata_host_add(struct ata_probe_ent *ent, | |
3774 | struct ata_host_set *host_set, | |
3775 | unsigned int port_no) | |
3776 | { | |
3777 | struct Scsi_Host *host; | |
3778 | struct ata_port *ap; | |
3779 | int rc; | |
3780 | ||
3781 | DPRINTK("ENTER\n"); | |
3782 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
3783 | if (!host) | |
3784 | return NULL; | |
3785 | ||
3786 | ap = (struct ata_port *) &host->hostdata[0]; | |
3787 | ||
3788 | ata_host_init(ap, host, host_set, ent, port_no); | |
3789 | ||
3790 | rc = ap->ops->port_start(ap); | |
3791 | if (rc) | |
3792 | goto err_out; | |
3793 | ||
3794 | return ap; | |
3795 | ||
3796 | err_out: | |
3797 | scsi_host_put(host); | |
3798 | return NULL; | |
3799 | } | |
3800 | ||
3801 | /** | |
0cba632b JG |
3802 | * ata_device_add - Register hardware device with ATA and SCSI layers |
3803 | * @ent: Probe information describing hardware device to be registered | |
3804 | * | |
3805 | * This function processes the information provided in the probe | |
3806 | * information struct @ent, allocates the necessary ATA and SCSI | |
3807 | * host information structures, initializes them, and registers | |
3808 | * everything with requisite kernel subsystems. | |
3809 | * | |
3810 | * This function requests irqs, probes the ATA bus, and probes | |
3811 | * the SCSI bus. | |
1da177e4 LT |
3812 | * |
3813 | * LOCKING: | |
0cba632b | 3814 | * PCI/etc. bus probe sem. |
1da177e4 LT |
3815 | * |
3816 | * RETURNS: | |
0cba632b | 3817 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 LT |
3818 | * |
3819 | */ | |
3820 | ||
3821 | int ata_device_add(struct ata_probe_ent *ent) | |
3822 | { | |
3823 | unsigned int count = 0, i; | |
3824 | struct device *dev = ent->dev; | |
3825 | struct ata_host_set *host_set; | |
3826 | ||
3827 | DPRINTK("ENTER\n"); | |
3828 | /* alloc a container for our list of ATA ports (buses) */ | |
3829 | host_set = kmalloc(sizeof(struct ata_host_set) + | |
3830 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); | |
3831 | if (!host_set) | |
3832 | return 0; | |
3833 | memset(host_set, 0, sizeof(struct ata_host_set) + (ent->n_ports * sizeof(void *))); | |
3834 | spin_lock_init(&host_set->lock); | |
3835 | ||
3836 | host_set->dev = dev; | |
3837 | host_set->n_ports = ent->n_ports; | |
3838 | host_set->irq = ent->irq; | |
3839 | host_set->mmio_base = ent->mmio_base; | |
3840 | host_set->private_data = ent->private_data; | |
3841 | host_set->ops = ent->port_ops; | |
3842 | ||
3843 | /* register each port bound to this device */ | |
3844 | for (i = 0; i < ent->n_ports; i++) { | |
3845 | struct ata_port *ap; | |
3846 | unsigned long xfer_mode_mask; | |
3847 | ||
3848 | ap = ata_host_add(ent, host_set, i); | |
3849 | if (!ap) | |
3850 | goto err_out; | |
3851 | ||
3852 | host_set->ports[i] = ap; | |
3853 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
3854 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
3855 | (ap->pio_mask << ATA_SHIFT_PIO); | |
3856 | ||
3857 | /* print per-port info to dmesg */ | |
3858 | printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX " | |
3859 | "bmdma 0x%lX irq %lu\n", | |
3860 | ap->id, | |
3861 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
3862 | ata_mode_string(xfer_mode_mask), | |
3863 | ap->ioaddr.cmd_addr, | |
3864 | ap->ioaddr.ctl_addr, | |
3865 | ap->ioaddr.bmdma_addr, | |
3866 | ent->irq); | |
3867 | ||
3868 | ata_chk_status(ap); | |
3869 | host_set->ops->irq_clear(ap); | |
3870 | count++; | |
3871 | } | |
3872 | ||
3873 | if (!count) { | |
3874 | kfree(host_set); | |
3875 | return 0; | |
3876 | } | |
3877 | ||
3878 | /* obtain irq, that is shared between channels */ | |
3879 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
3880 | DRV_NAME, host_set)) | |
3881 | goto err_out; | |
3882 | ||
3883 | /* perform each probe synchronously */ | |
3884 | DPRINTK("probe begin\n"); | |
3885 | for (i = 0; i < count; i++) { | |
3886 | struct ata_port *ap; | |
3887 | int rc; | |
3888 | ||
3889 | ap = host_set->ports[i]; | |
3890 | ||
3891 | DPRINTK("ata%u: probe begin\n", ap->id); | |
3892 | rc = ata_bus_probe(ap); | |
3893 | DPRINTK("ata%u: probe end\n", ap->id); | |
3894 | ||
3895 | if (rc) { | |
3896 | /* FIXME: do something useful here? | |
3897 | * Current libata behavior will | |
3898 | * tear down everything when | |
3899 | * the module is removed | |
3900 | * or the h/w is unplugged. | |
3901 | */ | |
3902 | } | |
3903 | ||
3904 | rc = scsi_add_host(ap->host, dev); | |
3905 | if (rc) { | |
3906 | printk(KERN_ERR "ata%u: scsi_add_host failed\n", | |
3907 | ap->id); | |
3908 | /* FIXME: do something useful here */ | |
3909 | /* FIXME: handle unconditional calls to | |
3910 | * scsi_scan_host and ata_host_remove, below, | |
3911 | * at the very least | |
3912 | */ | |
3913 | } | |
3914 | } | |
3915 | ||
3916 | /* probes are done, now scan each port's disk(s) */ | |
3917 | DPRINTK("probe begin\n"); | |
3918 | for (i = 0; i < count; i++) { | |
3919 | struct ata_port *ap = host_set->ports[i]; | |
3920 | ||
3921 | scsi_scan_host(ap->host); | |
3922 | } | |
3923 | ||
3924 | dev_set_drvdata(dev, host_set); | |
3925 | ||
3926 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
3927 | return ent->n_ports; /* success */ | |
3928 | ||
3929 | err_out: | |
3930 | for (i = 0; i < count; i++) { | |
3931 | ata_host_remove(host_set->ports[i], 1); | |
3932 | scsi_host_put(host_set->ports[i]->host); | |
3933 | } | |
3934 | kfree(host_set); | |
3935 | VPRINTK("EXIT, returning 0\n"); | |
3936 | return 0; | |
3937 | } | |
3938 | ||
3939 | /** | |
3940 | * ata_scsi_release - SCSI layer callback hook for host unload | |
3941 | * @host: libata host to be unloaded | |
3942 | * | |
3943 | * Performs all duties necessary to shut down a libata port... | |
3944 | * Kill port kthread, disable port, and release resources. | |
3945 | * | |
3946 | * LOCKING: | |
3947 | * Inherited from SCSI layer. | |
3948 | * | |
3949 | * RETURNS: | |
3950 | * One. | |
3951 | */ | |
3952 | ||
3953 | int ata_scsi_release(struct Scsi_Host *host) | |
3954 | { | |
3955 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | |
3956 | ||
3957 | DPRINTK("ENTER\n"); | |
3958 | ||
3959 | ap->ops->port_disable(ap); | |
3960 | ata_host_remove(ap, 0); | |
3961 | ||
3962 | DPRINTK("EXIT\n"); | |
3963 | return 1; | |
3964 | } | |
3965 | ||
3966 | /** | |
3967 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
3968 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
3969 | * |
3970 | * Utility function which initializes data_addr, error_addr, | |
3971 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
3972 | * device_addr, status_addr, and command_addr to standard offsets | |
3973 | * relative to cmd_addr. | |
3974 | * | |
3975 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 3976 | */ |
0baab86b | 3977 | |
1da177e4 LT |
3978 | void ata_std_ports(struct ata_ioports *ioaddr) |
3979 | { | |
3980 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
3981 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
3982 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
3983 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
3984 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
3985 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
3986 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
3987 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
3988 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
3989 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
3990 | } | |
3991 | ||
3992 | static struct ata_probe_ent * | |
3993 | ata_probe_ent_alloc(struct device *dev, struct ata_port_info *port) | |
3994 | { | |
3995 | struct ata_probe_ent *probe_ent; | |
3996 | ||
3997 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); | |
3998 | if (!probe_ent) { | |
3999 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
4000 | kobject_name(&(dev->kobj))); | |
4001 | return NULL; | |
4002 | } | |
4003 | ||
4004 | memset(probe_ent, 0, sizeof(*probe_ent)); | |
4005 | ||
4006 | INIT_LIST_HEAD(&probe_ent->node); | |
4007 | probe_ent->dev = dev; | |
4008 | ||
4009 | probe_ent->sht = port->sht; | |
4010 | probe_ent->host_flags = port->host_flags; | |
4011 | probe_ent->pio_mask = port->pio_mask; | |
4012 | probe_ent->mwdma_mask = port->mwdma_mask; | |
4013 | probe_ent->udma_mask = port->udma_mask; | |
4014 | probe_ent->port_ops = port->port_ops; | |
4015 | ||
4016 | return probe_ent; | |
4017 | } | |
4018 | ||
0baab86b EF |
4019 | |
4020 | ||
4021 | /** | |
4022 | * ata_pci_init_native_mode - Initialize native-mode driver | |
4023 | * @pdev: pci device to be initialized | |
4024 | * @port: array[2] of pointers to port info structures. | |
4025 | * | |
4026 | * Utility function which allocates and initializes an | |
4027 | * ata_probe_ent structure for a standard dual-port | |
4028 | * PIO-based IDE controller. The returned ata_probe_ent | |
4029 | * structure can be passed to ata_device_add(). The returned | |
4030 | * ata_probe_ent structure should then be freed with kfree(). | |
4031 | */ | |
4032 | ||
1da177e4 LT |
4033 | #ifdef CONFIG_PCI |
4034 | struct ata_probe_ent * | |
4035 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port) | |
4036 | { | |
4037 | struct ata_probe_ent *probe_ent = | |
4038 | ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
4039 | if (!probe_ent) | |
4040 | return NULL; | |
4041 | ||
4042 | probe_ent->n_ports = 2; | |
4043 | probe_ent->irq = pdev->irq; | |
4044 | probe_ent->irq_flags = SA_SHIRQ; | |
4045 | ||
4046 | probe_ent->port[0].cmd_addr = pci_resource_start(pdev, 0); | |
4047 | probe_ent->port[0].altstatus_addr = | |
4048 | probe_ent->port[0].ctl_addr = | |
4049 | pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; | |
4050 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4); | |
4051 | ||
4052 | probe_ent->port[1].cmd_addr = pci_resource_start(pdev, 2); | |
4053 | probe_ent->port[1].altstatus_addr = | |
4054 | probe_ent->port[1].ctl_addr = | |
4055 | pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS; | |
4056 | probe_ent->port[1].bmdma_addr = pci_resource_start(pdev, 4) + 8; | |
4057 | ||
4058 | ata_std_ports(&probe_ent->port[0]); | |
4059 | ata_std_ports(&probe_ent->port[1]); | |
4060 | ||
4061 | return probe_ent; | |
4062 | } | |
4063 | ||
4064 | static struct ata_probe_ent * | |
4065 | ata_pci_init_legacy_mode(struct pci_dev *pdev, struct ata_port_info **port, | |
4066 | struct ata_probe_ent **ppe2) | |
4067 | { | |
4068 | struct ata_probe_ent *probe_ent, *probe_ent2; | |
4069 | ||
4070 | probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
4071 | if (!probe_ent) | |
4072 | return NULL; | |
4073 | probe_ent2 = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[1]); | |
4074 | if (!probe_ent2) { | |
4075 | kfree(probe_ent); | |
4076 | return NULL; | |
4077 | } | |
4078 | ||
4079 | probe_ent->n_ports = 1; | |
4080 | probe_ent->irq = 14; | |
4081 | ||
4082 | probe_ent->hard_port_no = 0; | |
4083 | probe_ent->legacy_mode = 1; | |
4084 | ||
4085 | probe_ent2->n_ports = 1; | |
4086 | probe_ent2->irq = 15; | |
4087 | ||
4088 | probe_ent2->hard_port_no = 1; | |
4089 | probe_ent2->legacy_mode = 1; | |
4090 | ||
4091 | probe_ent->port[0].cmd_addr = 0x1f0; | |
4092 | probe_ent->port[0].altstatus_addr = | |
4093 | probe_ent->port[0].ctl_addr = 0x3f6; | |
4094 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4); | |
4095 | ||
4096 | probe_ent2->port[0].cmd_addr = 0x170; | |
4097 | probe_ent2->port[0].altstatus_addr = | |
4098 | probe_ent2->port[0].ctl_addr = 0x376; | |
4099 | probe_ent2->port[0].bmdma_addr = pci_resource_start(pdev, 4)+8; | |
4100 | ||
4101 | ata_std_ports(&probe_ent->port[0]); | |
4102 | ata_std_ports(&probe_ent2->port[0]); | |
4103 | ||
4104 | *ppe2 = probe_ent2; | |
4105 | return probe_ent; | |
4106 | } | |
4107 | ||
4108 | /** | |
4109 | * ata_pci_init_one - Initialize/register PCI IDE host controller | |
4110 | * @pdev: Controller to be initialized | |
4111 | * @port_info: Information from low-level host driver | |
4112 | * @n_ports: Number of ports attached to host controller | |
4113 | * | |
0baab86b EF |
4114 | * This is a helper function which can be called from a driver's |
4115 | * xxx_init_one() probe function if the hardware uses traditional | |
4116 | * IDE taskfile registers. | |
4117 | * | |
4118 | * This function calls pci_enable_device(), reserves its register | |
4119 | * regions, sets the dma mask, enables bus master mode, and calls | |
4120 | * ata_device_add() | |
4121 | * | |
1da177e4 LT |
4122 | * LOCKING: |
4123 | * Inherited from PCI layer (may sleep). | |
4124 | * | |
4125 | * RETURNS: | |
0cba632b | 4126 | * Zero on success, negative on errno-based value on error. |
1da177e4 LT |
4127 | * |
4128 | */ | |
4129 | ||
4130 | int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, | |
4131 | unsigned int n_ports) | |
4132 | { | |
4133 | struct ata_probe_ent *probe_ent, *probe_ent2 = NULL; | |
4134 | struct ata_port_info *port[2]; | |
4135 | u8 tmp8, mask; | |
4136 | unsigned int legacy_mode = 0; | |
4137 | int disable_dev_on_err = 1; | |
4138 | int rc; | |
4139 | ||
4140 | DPRINTK("ENTER\n"); | |
4141 | ||
4142 | port[0] = port_info[0]; | |
4143 | if (n_ports > 1) | |
4144 | port[1] = port_info[1]; | |
4145 | else | |
4146 | port[1] = port[0]; | |
4147 | ||
4148 | if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 | |
4149 | && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { | |
4150 | /* TODO: support transitioning to native mode? */ | |
4151 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); | |
4152 | mask = (1 << 2) | (1 << 0); | |
4153 | if ((tmp8 & mask) != mask) | |
4154 | legacy_mode = (1 << 3); | |
4155 | } | |
4156 | ||
4157 | /* FIXME... */ | |
4158 | if ((!legacy_mode) && (n_ports > 1)) { | |
4159 | printk(KERN_ERR "ata: BUG: native mode, n_ports > 1\n"); | |
4160 | return -EINVAL; | |
4161 | } | |
4162 | ||
4163 | rc = pci_enable_device(pdev); | |
4164 | if (rc) | |
4165 | return rc; | |
4166 | ||
4167 | rc = pci_request_regions(pdev, DRV_NAME); | |
4168 | if (rc) { | |
4169 | disable_dev_on_err = 0; | |
4170 | goto err_out; | |
4171 | } | |
4172 | ||
4173 | if (legacy_mode) { | |
4174 | if (!request_region(0x1f0, 8, "libata")) { | |
4175 | struct resource *conflict, res; | |
4176 | res.start = 0x1f0; | |
4177 | res.end = 0x1f0 + 8 - 1; | |
4178 | conflict = ____request_resource(&ioport_resource, &res); | |
4179 | if (!strcmp(conflict->name, "libata")) | |
4180 | legacy_mode |= (1 << 0); | |
4181 | else { | |
4182 | disable_dev_on_err = 0; | |
4183 | printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n"); | |
4184 | } | |
4185 | } else | |
4186 | legacy_mode |= (1 << 0); | |
4187 | ||
4188 | if (!request_region(0x170, 8, "libata")) { | |
4189 | struct resource *conflict, res; | |
4190 | res.start = 0x170; | |
4191 | res.end = 0x170 + 8 - 1; | |
4192 | conflict = ____request_resource(&ioport_resource, &res); | |
4193 | if (!strcmp(conflict->name, "libata")) | |
4194 | legacy_mode |= (1 << 1); | |
4195 | else { | |
4196 | disable_dev_on_err = 0; | |
4197 | printk(KERN_WARNING "ata: 0x170 IDE port busy\n"); | |
4198 | } | |
4199 | } else | |
4200 | legacy_mode |= (1 << 1); | |
4201 | } | |
4202 | ||
4203 | /* we have legacy mode, but all ports are unavailable */ | |
4204 | if (legacy_mode == (1 << 3)) { | |
4205 | rc = -EBUSY; | |
4206 | goto err_out_regions; | |
4207 | } | |
4208 | ||
4209 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
4210 | if (rc) | |
4211 | goto err_out_regions; | |
4212 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
4213 | if (rc) | |
4214 | goto err_out_regions; | |
4215 | ||
4216 | if (legacy_mode) { | |
4217 | probe_ent = ata_pci_init_legacy_mode(pdev, port, &probe_ent2); | |
4218 | } else | |
4219 | probe_ent = ata_pci_init_native_mode(pdev, port); | |
4220 | if (!probe_ent) { | |
4221 | rc = -ENOMEM; | |
4222 | goto err_out_regions; | |
4223 | } | |
4224 | ||
4225 | pci_set_master(pdev); | |
4226 | ||
4227 | /* FIXME: check ata_device_add return */ | |
4228 | if (legacy_mode) { | |
4229 | if (legacy_mode & (1 << 0)) | |
4230 | ata_device_add(probe_ent); | |
4231 | if (legacy_mode & (1 << 1)) | |
4232 | ata_device_add(probe_ent2); | |
4233 | } else | |
4234 | ata_device_add(probe_ent); | |
4235 | ||
4236 | kfree(probe_ent); | |
4237 | kfree(probe_ent2); | |
4238 | ||
4239 | return 0; | |
4240 | ||
4241 | err_out_regions: | |
4242 | if (legacy_mode & (1 << 0)) | |
4243 | release_region(0x1f0, 8); | |
4244 | if (legacy_mode & (1 << 1)) | |
4245 | release_region(0x170, 8); | |
4246 | pci_release_regions(pdev); | |
4247 | err_out: | |
4248 | if (disable_dev_on_err) | |
4249 | pci_disable_device(pdev); | |
4250 | return rc; | |
4251 | } | |
4252 | ||
4253 | /** | |
4254 | * ata_pci_remove_one - PCI layer callback for device removal | |
4255 | * @pdev: PCI device that was removed | |
4256 | * | |
4257 | * PCI layer indicates to libata via this hook that | |
4258 | * hot-unplug or module unload event has occured. | |
4259 | * Handle this by unregistering all objects associated | |
4260 | * with this PCI device. Free those objects. Then finally | |
4261 | * release PCI resources and disable device. | |
4262 | * | |
4263 | * LOCKING: | |
4264 | * Inherited from PCI layer (may sleep). | |
4265 | */ | |
4266 | ||
4267 | void ata_pci_remove_one (struct pci_dev *pdev) | |
4268 | { | |
4269 | struct device *dev = pci_dev_to_dev(pdev); | |
4270 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
4271 | struct ata_port *ap; | |
4272 | unsigned int i; | |
4273 | ||
4274 | for (i = 0; i < host_set->n_ports; i++) { | |
4275 | ap = host_set->ports[i]; | |
4276 | ||
4277 | scsi_remove_host(ap->host); | |
4278 | } | |
4279 | ||
4280 | free_irq(host_set->irq, host_set); | |
1da177e4 LT |
4281 | |
4282 | for (i = 0; i < host_set->n_ports; i++) { | |
4283 | ap = host_set->ports[i]; | |
4284 | ||
4285 | ata_scsi_release(ap->host); | |
4286 | ||
4287 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4288 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4289 | ||
4290 | if (ioaddr->cmd_addr == 0x1f0) | |
4291 | release_region(0x1f0, 8); | |
4292 | else if (ioaddr->cmd_addr == 0x170) | |
4293 | release_region(0x170, 8); | |
4294 | } | |
4295 | ||
4296 | scsi_host_put(ap->host); | |
4297 | } | |
4298 | ||
aa8f0dc6 JG |
4299 | if (host_set->ops->host_stop) |
4300 | host_set->ops->host_stop(host_set); | |
4301 | ||
1da177e4 LT |
4302 | kfree(host_set); |
4303 | ||
4304 | pci_release_regions(pdev); | |
4305 | pci_disable_device(pdev); | |
4306 | dev_set_drvdata(dev, NULL); | |
4307 | } | |
4308 | ||
4309 | /* move to PCI subsystem */ | |
4310 | int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits) | |
4311 | { | |
4312 | unsigned long tmp = 0; | |
4313 | ||
4314 | switch (bits->width) { | |
4315 | case 1: { | |
4316 | u8 tmp8 = 0; | |
4317 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
4318 | tmp = tmp8; | |
4319 | break; | |
4320 | } | |
4321 | case 2: { | |
4322 | u16 tmp16 = 0; | |
4323 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
4324 | tmp = tmp16; | |
4325 | break; | |
4326 | } | |
4327 | case 4: { | |
4328 | u32 tmp32 = 0; | |
4329 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
4330 | tmp = tmp32; | |
4331 | break; | |
4332 | } | |
4333 | ||
4334 | default: | |
4335 | return -EINVAL; | |
4336 | } | |
4337 | ||
4338 | tmp &= bits->mask; | |
4339 | ||
4340 | return (tmp == bits->val) ? 1 : 0; | |
4341 | } | |
4342 | #endif /* CONFIG_PCI */ | |
4343 | ||
4344 | ||
1da177e4 LT |
4345 | static int __init ata_init(void) |
4346 | { | |
4347 | ata_wq = create_workqueue("ata"); | |
4348 | if (!ata_wq) | |
4349 | return -ENOMEM; | |
4350 | ||
4351 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
4352 | return 0; | |
4353 | } | |
4354 | ||
4355 | static void __exit ata_exit(void) | |
4356 | { | |
4357 | destroy_workqueue(ata_wq); | |
4358 | } | |
4359 | ||
4360 | module_init(ata_init); | |
4361 | module_exit(ata_exit); | |
4362 | ||
4363 | /* | |
4364 | * libata is essentially a library of internal helper functions for | |
4365 | * low-level ATA host controller drivers. As such, the API/ABI is | |
4366 | * likely to change as new drivers are added and updated. | |
4367 | * Do not depend on ABI/API stability. | |
4368 | */ | |
4369 | ||
4370 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
4371 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
4372 | EXPORT_SYMBOL_GPL(ata_device_add); | |
4373 | EXPORT_SYMBOL_GPL(ata_sg_init); | |
4374 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
4375 | EXPORT_SYMBOL_GPL(ata_qc_complete); | |
4376 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); | |
4377 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
4378 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
4379 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
4380 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
4381 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
4382 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
4383 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
4384 | EXPORT_SYMBOL_GPL(ata_check_status); | |
4385 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
4386 | EXPORT_SYMBOL_GPL(ata_chk_err); | |
4387 | EXPORT_SYMBOL_GPL(ata_exec_command); | |
4388 | EXPORT_SYMBOL_GPL(ata_port_start); | |
4389 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 4390 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 LT |
4391 | EXPORT_SYMBOL_GPL(ata_interrupt); |
4392 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
4393 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
4394 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
4395 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
4396 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
4397 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
4398 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
4399 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
4400 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
4401 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
4402 | EXPORT_SYMBOL_GPL(ata_port_disable); | |
4403 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); | |
4404 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
4405 | EXPORT_SYMBOL_GPL(ata_scsi_error); | |
4406 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
4407 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
4408 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
4409 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
4410 | EXPORT_SYMBOL_GPL(ata_dev_id_string); | |
4411 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); | |
4412 | ||
4413 | #ifdef CONFIG_PCI | |
4414 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
4415 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); | |
4416 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
4417 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
4418 | #endif /* CONFIG_PCI */ |