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Merge ../linux-2.6
[linux-block.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f
TH		 64static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
a6d5a51c
TH		 68static unsigned int ata_dev_xfermask(struct ata_port *ap,
69 struct ata_device *dev);
1da177e4
LT		 70
71static unsigned int ata_unique_id = 1;
72static struct workqueue_struct *ata_wq;
73
418dc1f5 74int atapi_enabled = 1;
1623c81e
JG		 75module_param(atapi_enabled, int, 0444);
76MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
77
c3c013a2
JG		 78int libata_fua = 0;
79module_param_named(fua, libata_fua, int, 0444);
80MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
81
1da177e4
LT		 82MODULE_AUTHOR("Jeff Garzik");
83MODULE_DESCRIPTION("Library module for ATA devices");
84MODULE_LICENSE("GPL");
85MODULE_VERSION(DRV_VERSION);
86
0baab86b 87
1da177e4
LT		 88/**
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
93 *
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
96 *
97 * LOCKING:
98 * Inherited from caller.
99 */
100
057ace5e 101void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 102{
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
108
109 fis[4] = tf->lbal;
110 fis[5] = tf->lbam;
111 fis[6] = tf->lbah;
112 fis[7] = tf->device;
113
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
118
119 fis[12] = tf->nsect;
120 fis[13] = tf->hob_nsect;
121 fis[14] = 0;
122 fis[15] = tf->ctl;
123
124 fis[16] = 0;
125 fis[17] = 0;
126 fis[18] = 0;
127 fis[19] = 0;
128}
129
130/**
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
134 *
e12a1be6 135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 136 *
137 * LOCKING:
138 * Inherited from caller.
139 */
140
057ace5e 141void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 142{
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
145
146 tf->lbal = fis[4];
147 tf->lbam = fis[5];
148 tf->lbah = fis[6];
149 tf->device = fis[7];
150
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
154
155 tf->nsect = fis[12];
156 tf->hob_nsect = fis[13];
157}
158
8cbd6df1
AL		 159static const u8 ata_rw_cmds[] = {
160 /* pio multi */
161 ATA_CMD_READ_MULTI,
162 ATA_CMD_WRITE_MULTI,
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 165 0,
166 0,
167 0,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 169 /* pio */
170 ATA_CMD_PIO_READ,
171 ATA_CMD_PIO_WRITE,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 174 0,
175 0,
176 0,
177 0,
8cbd6df1
AL		 178 /* dma */
179 ATA_CMD_READ,
180 ATA_CMD_WRITE,
181 ATA_CMD_READ_EXT,
9a3dccc4
TH		 182 ATA_CMD_WRITE_EXT,
183 0,
184 0,
185 0,
186 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 187};
1da177e4
LT		 188
189/**
8cbd6df1
AL		 190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
1da177e4 192 *
8cbd6df1
AL		 193 * Examine the device configuration and tf->flags to calculate
194 * the proper read/write commands and protocol to use.
1da177e4
LT		 195 *
196 * LOCKING:
197 * caller.
198 */
9a3dccc4 199int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 200{
8cbd6df1
AL		 201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
9a3dccc4 203 u8 cmd;
1da177e4 204
9a3dccc4 205 int index, fua, lba48, write;
8cbd6df1 206
9a3dccc4 207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 210
8cbd6df1
AL		 211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
9a3dccc4 213 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
0565c26d 217 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 218 } else {
219 tf->protocol = ATA_PROT_DMA;
9a3dccc4 220 index = 16;
8cbd6df1 221 }
1da177e4 222
9a3dccc4
TH		 223 cmd = ata_rw_cmds[index + fua + lba48 + write];
224 if (cmd) {
225 tf->command = cmd;
226 return 0;
227 }
228 return -1;
1da177e4
LT		 229}
230
cb95d562
TH		 231/**
232 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
233 * @pio_mask: pio_mask
234 * @mwdma_mask: mwdma_mask
235 * @udma_mask: udma_mask
236 *
237 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
238 * unsigned int xfer_mask.
239 *
240 * LOCKING:
241 * None.
242 *
243 * RETURNS:
244 * Packed xfer_mask.
245 */
246static unsigned int ata_pack_xfermask(unsigned int pio_mask,
247 unsigned int mwdma_mask,
248 unsigned int udma_mask)
249{
250 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
251 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
252 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
253}
254
255static const struct ata_xfer_ent {
256 unsigned int shift, bits;
257 u8 base;
258} ata_xfer_tbl[] = {
259 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
260 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
261 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
262 { -1, },
263};
264
265/**
266 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
267 * @xfer_mask: xfer_mask of interest
268 *
269 * Return matching XFER_* value for @xfer_mask. Only the highest
270 * bit of @xfer_mask is considered.
271 *
272 * LOCKING:
273 * None.
274 *
275 * RETURNS:
276 * Matching XFER_* value, 0 if no match found.
277 */
278static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
279{
280 int highbit = fls(xfer_mask) - 1;
281 const struct ata_xfer_ent *ent;
282
283 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
284 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
285 return ent->base + highbit - ent->shift;
286 return 0;
287}
288
289/**
290 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
291 * @xfer_mode: XFER_* of interest
292 *
293 * Return matching xfer_mask for @xfer_mode.
294 *
295 * LOCKING:
296 * None.
297 *
298 * RETURNS:
299 * Matching xfer_mask, 0 if no match found.
300 */
301static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
302{
303 const struct ata_xfer_ent *ent;
304
305 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
306 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
307 return 1 << (ent->shift + xfer_mode - ent->base);
308 return 0;
309}
310
311/**
312 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
313 * @xfer_mode: XFER_* of interest
314 *
315 * Return matching xfer_shift for @xfer_mode.
316 *
317 * LOCKING:
318 * None.
319 *
320 * RETURNS:
321 * Matching xfer_shift, -1 if no match found.
322 */
323static int ata_xfer_mode2shift(unsigned int xfer_mode)
324{
325 const struct ata_xfer_ent *ent;
326
327 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
328 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
329 return ent->shift;
330 return -1;
331}
332
1da177e4 333/**
1da7b0d0
TH		 334 * ata_mode_string - convert xfer_mask to string
335 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 336 *
337 * Determine string which represents the highest speed
1da7b0d0 338 * (highest bit in @modemask).
1da177e4
LT		 339 *
340 * LOCKING:
341 * None.
342 *
343 * RETURNS:
344 * Constant C string representing highest speed listed in
1da7b0d0 345 * @mode_mask, or the constant C string "<n/a>".
1da177e4 346 */
1da7b0d0 347static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 348{
75f554bc
TH		 349 static const char * const xfer_mode_str[] = {
350 "PIO0",
351 "PIO1",
352 "PIO2",
353 "PIO3",
354 "PIO4",
355 "MWDMA0",
356 "MWDMA1",
357 "MWDMA2",
358 "UDMA/16",
359 "UDMA/25",
360 "UDMA/33",
361 "UDMA/44",
362 "UDMA/66",
363 "UDMA/100",
364 "UDMA/133",
365 "UDMA7",
366 };
1da7b0d0 367 int highbit;
1da177e4 368
1da7b0d0
TH		 369 highbit = fls(xfer_mask) - 1;
370 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
371 return xfer_mode_str[highbit];
1da177e4 372 return "<n/a>";
1da177e4
LT		 373}
374
375/**
376 * ata_pio_devchk - PATA device presence detection
377 * @ap: ATA channel to examine
378 * @device: Device to examine (starting at zero)
379 *
380 * This technique was originally described in
381 * Hale Landis's ATADRVR (www.ata-atapi.com), and
382 * later found its way into the ATA/ATAPI spec.
383 *
384 * Write a pattern to the ATA shadow registers,
385 * and if a device is present, it will respond by
386 * correctly storing and echoing back the
387 * ATA shadow register contents.
388 *
389 * LOCKING:
390 * caller.
391 */
392
393static unsigned int ata_pio_devchk(struct ata_port *ap,
394 unsigned int device)
395{
396 struct ata_ioports *ioaddr = &ap->ioaddr;
397 u8 nsect, lbal;
398
399 ap->ops->dev_select(ap, device);
400
401 outb(0x55, ioaddr->nsect_addr);
402 outb(0xaa, ioaddr->lbal_addr);
403
404 outb(0xaa, ioaddr->nsect_addr);
405 outb(0x55, ioaddr->lbal_addr);
406
407 outb(0x55, ioaddr->nsect_addr);
408 outb(0xaa, ioaddr->lbal_addr);
409
410 nsect = inb(ioaddr->nsect_addr);
411 lbal = inb(ioaddr->lbal_addr);
412
413 if ((nsect == 0x55) && (lbal == 0xaa))
414 return 1; /* we found a device */
415
416 return 0; /* nothing found */
417}
418
419/**
420 * ata_mmio_devchk - PATA device presence detection
421 * @ap: ATA channel to examine
422 * @device: Device to examine (starting at zero)
423 *
424 * This technique was originally described in
425 * Hale Landis's ATADRVR (www.ata-atapi.com), and
426 * later found its way into the ATA/ATAPI spec.
427 *
428 * Write a pattern to the ATA shadow registers,
429 * and if a device is present, it will respond by
430 * correctly storing and echoing back the
431 * ATA shadow register contents.
432 *
433 * LOCKING:
434 * caller.
435 */
436
437static unsigned int ata_mmio_devchk(struct ata_port *ap,
438 unsigned int device)
439{
440 struct ata_ioports *ioaddr = &ap->ioaddr;
441 u8 nsect, lbal;
442
443 ap->ops->dev_select(ap, device);
444
445 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
446 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
447
448 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
449 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
450
451 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
452 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
453
454 nsect = readb((void __iomem *) ioaddr->nsect_addr);
455 lbal = readb((void __iomem *) ioaddr->lbal_addr);
456
457 if ((nsect == 0x55) && (lbal == 0xaa))
458 return 1; /* we found a device */
459
460 return 0; /* nothing found */
461}
462
463/**
464 * ata_devchk - PATA device presence detection
465 * @ap: ATA channel to examine
466 * @device: Device to examine (starting at zero)
467 *
468 * Dispatch ATA device presence detection, depending
469 * on whether we are using PIO or MMIO to talk to the
470 * ATA shadow registers.
471 *
472 * LOCKING:
473 * caller.
474 */
475
476static unsigned int ata_devchk(struct ata_port *ap,
477 unsigned int device)
478{
479 if (ap->flags & ATA_FLAG_MMIO)
480 return ata_mmio_devchk(ap, device);
481 return ata_pio_devchk(ap, device);
482}
483
484/**
485 * ata_dev_classify - determine device type based on ATA-spec signature
486 * @tf: ATA taskfile register set for device to be identified
487 *
488 * Determine from taskfile register contents whether a device is
489 * ATA or ATAPI, as per "Signature and persistence" section
490 * of ATA/PI spec (volume 1, sect 5.14).
491 *
492 * LOCKING:
493 * None.
494 *
495 * RETURNS:
496 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
497 * the event of failure.
498 */
499
057ace5e 500unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 501{
502 /* Apple's open source Darwin code hints that some devices only
503 * put a proper signature into the LBA mid/high registers,
504 * So, we only check those. It's sufficient for uniqueness.
505 */
506
507 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
508 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
509 DPRINTK("found ATA device by sig\n");
510 return ATA_DEV_ATA;
511 }
512
513 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
514 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
515 DPRINTK("found ATAPI device by sig\n");
516 return ATA_DEV_ATAPI;
517 }
518
519 DPRINTK("unknown device\n");
520 return ATA_DEV_UNKNOWN;
521}
522
523/**
524 * ata_dev_try_classify - Parse returned ATA device signature
525 * @ap: ATA channel to examine
526 * @device: Device to examine (starting at zero)
b4dc7623 527 * @r_err: Value of error register on completion
1da177e4
LT		 528 *
529 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
530 * an ATA/ATAPI-defined set of values is placed in the ATA
531 * shadow registers, indicating the results of device detection
532 * and diagnostics.
533 *
534 * Select the ATA device, and read the values from the ATA shadow
535 * registers. Then parse according to the Error register value,
536 * and the spec-defined values examined by ata_dev_classify().
537 *
538 * LOCKING:
539 * caller.
b4dc7623
TH		 540 *
541 * RETURNS:
542 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 543 */
544
b4dc7623
TH		 545static unsigned int
546ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 547{
1da177e4
LT		 548 struct ata_taskfile tf;
549 unsigned int class;
550 u8 err;
551
552 ap->ops->dev_select(ap, device);
553
554 memset(&tf, 0, sizeof(tf));
555
1da177e4 556 ap->ops->tf_read(ap, &tf);
0169e284 557 err = tf.feature;
b4dc7623
TH		 558 if (r_err)
559 *r_err = err;
1da177e4
LT		 560
561 /* see if device passed diags */
562 if (err == 1)
563 /* do nothing */ ;
564 else if ((device == 0) && (err == 0x81))
565 /* do nothing */ ;
566 else
b4dc7623 567 return ATA_DEV_NONE;
1da177e4 568
b4dc7623 569 /* determine if device is ATA or ATAPI */
1da177e4 570 class = ata_dev_classify(&tf);
b4dc7623 571
1da177e4 572 if (class == ATA_DEV_UNKNOWN)
b4dc7623 573 return ATA_DEV_NONE;
1da177e4 574 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 575 return ATA_DEV_NONE;
576 return class;
1da177e4
LT		 577}
578
579/**
6a62a04d 580 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 581 * @id: IDENTIFY DEVICE results we will examine
582 * @s: string into which data is output
583 * @ofs: offset into identify device page
584 * @len: length of string to return. must be an even number.
585 *
586 * The strings in the IDENTIFY DEVICE page are broken up into
587 * 16-bit chunks. Run through the string, and output each
588 * 8-bit chunk linearly, regardless of platform.
589 *
590 * LOCKING:
591 * caller.
592 */
593
6a62a04d
TH		 594void ata_id_string(const u16 *id, unsigned char *s,
595 unsigned int ofs, unsigned int len)
1da177e4
LT		 596{
597 unsigned int c;
598
599 while (len > 0) {
600 c = id[ofs] >> 8;
601 *s = c;
602 s++;
603
604 c = id[ofs] & 0xff;
605 *s = c;
606 s++;
607
608 ofs++;
609 len -= 2;
610 }
611}
612
0e949ff3 613/**
6a62a04d 614 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 615 * @id: IDENTIFY DEVICE results we will examine
616 * @s: string into which data is output
617 * @ofs: offset into identify device page
618 * @len: length of string to return. must be an odd number.
619 *
6a62a04d 620 * This function is identical to ata_id_string except that it
0e949ff3
TH		 621 * trims trailing spaces and terminates the resulting string with
622 * null. @len must be actual maximum length (even number) + 1.
623 *
624 * LOCKING:
625 * caller.
626 */
6a62a04d
TH		 627void ata_id_c_string(const u16 *id, unsigned char *s,
628 unsigned int ofs, unsigned int len)
0e949ff3
TH		 629{
630 unsigned char *p;
631
632 WARN_ON(!(len & 1));
633
6a62a04d 634 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 635
636 p = s + strnlen(s, len - 1);
637 while (p > s && p[-1] == ' ')
638 p--;
639 *p = '\0';
640}
0baab86b 641
2940740b
TH		 642static u64 ata_id_n_sectors(const u16 *id)
643{
644 if (ata_id_has_lba(id)) {
645 if (ata_id_has_lba48(id))
646 return ata_id_u64(id, 100);
647 else
648 return ata_id_u32(id, 60);
649 } else {
650 if (ata_id_current_chs_valid(id))
651 return ata_id_u32(id, 57);
652 else
653 return id[1] * id[3] * id[6];
654 }
655}
656
0baab86b
EF		 657/**
658 * ata_noop_dev_select - Select device 0/1 on ATA bus
659 * @ap: ATA channel to manipulate
660 * @device: ATA device (numbered from zero) to select
661 *
662 * This function performs no actual function.
663 *
664 * May be used as the dev_select() entry in ata_port_operations.
665 *
666 * LOCKING:
667 * caller.
668 */
1da177e4
LT		 669void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
670{
671}
672
0baab86b 673
1da177e4
LT		 674/**
675 * ata_std_dev_select - Select device 0/1 on ATA bus
676 * @ap: ATA channel to manipulate
677 * @device: ATA device (numbered from zero) to select
678 *
679 * Use the method defined in the ATA specification to
680 * make either device 0, or device 1, active on the
0baab86b
EF		 681 * ATA channel. Works with both PIO and MMIO.
682 *
683 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 684 *
685 * LOCKING:
686 * caller.
687 */
688
689void ata_std_dev_select (struct ata_port *ap, unsigned int device)
690{
691 u8 tmp;
692
693 if (device == 0)
694 tmp = ATA_DEVICE_OBS;
695 else
696 tmp = ATA_DEVICE_OBS | ATA_DEV1;
697
698 if (ap->flags & ATA_FLAG_MMIO) {
699 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
700 } else {
701 outb(tmp, ap->ioaddr.device_addr);
702 }
703 ata_pause(ap); /* needed; also flushes, for mmio */
704}
705
706/**
707 * ata_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 * @wait: non-zero to wait for Status register BSY bit to clear
711 * @can_sleep: non-zero if context allows sleeping
712 *
713 * Use the method defined in the ATA specification to
714 * make either device 0, or device 1, active on the
715 * ATA channel.
716 *
717 * This is a high-level version of ata_std_dev_select(),
718 * which additionally provides the services of inserting
719 * the proper pauses and status polling, where needed.
720 *
721 * LOCKING:
722 * caller.
723 */
724
725void ata_dev_select(struct ata_port *ap, unsigned int device,
726 unsigned int wait, unsigned int can_sleep)
727{
728 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
729 ap->id, device, wait);
730
731 if (wait)
732 ata_wait_idle(ap);
733
734 ap->ops->dev_select(ap, device);
735
736 if (wait) {
737 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
738 msleep(150);
739 ata_wait_idle(ap);
740 }
741}
742
743/**
744 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 745 * @id: IDENTIFY DEVICE page to dump
1da177e4 746 *
0bd3300a
TH		 747 * Dump selected 16-bit words from the given IDENTIFY DEVICE
748 * page.
1da177e4
LT		 749 *
750 * LOCKING:
751 * caller.
752 */
753
0bd3300a 754static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 755{
756 DPRINTK("49==0x%04x "
757 "53==0x%04x "
758 "63==0x%04x "
759 "64==0x%04x "
760 "75==0x%04x \n",
0bd3300a
TH		 761 id[49],
762 id[53],
763 id[63],
764 id[64],
765 id[75]);
1da177e4
LT		 766 DPRINTK("80==0x%04x "
767 "81==0x%04x "
768 "82==0x%04x "
769 "83==0x%04x "
770 "84==0x%04x \n",
0bd3300a
TH		 771 id[80],
772 id[81],
773 id[82],
774 id[83],
775 id[84]);
1da177e4
LT		 776 DPRINTK("88==0x%04x "
777 "93==0x%04x\n",
0bd3300a
TH		 778 id[88],
779 id[93]);
1da177e4
LT		 780}
781
cb95d562
TH		 782/**
783 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
784 * @id: IDENTIFY data to compute xfer mask from
785 *
786 * Compute the xfermask for this device. This is not as trivial
787 * as it seems if we must consider early devices correctly.
788 *
789 * FIXME: pre IDE drive timing (do we care ?).
790 *
791 * LOCKING:
792 * None.
793 *
794 * RETURNS:
795 * Computed xfermask
796 */
797static unsigned int ata_id_xfermask(const u16 *id)
798{
799 unsigned int pio_mask, mwdma_mask, udma_mask;
800
801 /* Usual case. Word 53 indicates word 64 is valid */
802 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
803 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
804 pio_mask <<= 3;
805 pio_mask |= 0x7;
806 } else {
807 /* If word 64 isn't valid then Word 51 high byte holds
808 * the PIO timing number for the maximum. Turn it into
809 * a mask.
810 */
811 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
812
813 /* But wait.. there's more. Design your standards by
814 * committee and you too can get a free iordy field to
815 * process. However its the speeds not the modes that
816 * are supported... Note drivers using the timing API
817 * will get this right anyway
818 */
819 }
820
821 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 822
823 udma_mask = 0;
824 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
825 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 826
827 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
828}
829
86e45b6b
TH		 830/**
831 * ata_port_queue_task - Queue port_task
832 * @ap: The ata_port to queue port_task for
833 *
834 * Schedule @fn(@data) for execution after @delay jiffies using
835 * port_task. There is one port_task per port and it's the
836 * user(low level driver)'s responsibility to make sure that only
837 * one task is active at any given time.
838 *
839 * libata core layer takes care of synchronization between
840 * port_task and EH. ata_port_queue_task() may be ignored for EH
841 * synchronization.
842 *
843 * LOCKING:
844 * Inherited from caller.
845 */
846void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
847 unsigned long delay)
848{
849 int rc;
850
2e755f68 851 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 852 return;
853
854 PREPARE_WORK(&ap->port_task, fn, data);
855
856 if (!delay)
857 rc = queue_work(ata_wq, &ap->port_task);
858 else
859 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
860
861 /* rc == 0 means that another user is using port task */
862 WARN_ON(rc == 0);
863}
864
865/**
866 * ata_port_flush_task - Flush port_task
867 * @ap: The ata_port to flush port_task for
868 *
869 * After this function completes, port_task is guranteed not to
870 * be running or scheduled.
871 *
872 * LOCKING:
873 * Kernel thread context (may sleep)
874 */
875void ata_port_flush_task(struct ata_port *ap)
876{
877 unsigned long flags;
878
879 DPRINTK("ENTER\n");
880
881 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 882 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 883 spin_unlock_irqrestore(&ap->host_set->lock, flags);
884
885 DPRINTK("flush #1\n");
886 flush_workqueue(ata_wq);
887
888 /*
889 * At this point, if a task is running, it's guaranteed to see
890 * the FLUSH flag; thus, it will never queue pio tasks again.
891 * Cancel and flush.
892 */
893 if (!cancel_delayed_work(&ap->port_task)) {
894 DPRINTK("flush #2\n");
895 flush_workqueue(ata_wq);
896 }
897
898 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 899 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 900 spin_unlock_irqrestore(&ap->host_set->lock, flags);
901
902 DPRINTK("EXIT\n");
903}
904
77853bf2 905void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 906{
77853bf2 907 struct completion *waiting = qc->private_data;
a2a7a662 908
77853bf2 909 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 910 complete(waiting);
a2a7a662
TH		 911}
912
913/**
914 * ata_exec_internal - execute libata internal command
915 * @ap: Port to which the command is sent
916 * @dev: Device to which the command is sent
917 * @tf: Taskfile registers for the command and the result
918 * @dma_dir: Data tranfer direction of the command
919 * @buf: Data buffer of the command
920 * @buflen: Length of data buffer
921 *
922 * Executes libata internal command with timeout. @tf contains
923 * command on entry and result on return. Timeout and error
924 * conditions are reported via return value. No recovery action
925 * is taken after a command times out. It's caller's duty to
926 * clean up after timeout.
927 *
928 * LOCKING:
929 * None. Should be called with kernel context, might sleep.
930 */
931
932static unsigned
933ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
934 struct ata_taskfile *tf,
935 int dma_dir, void *buf, unsigned int buflen)
936{
937 u8 command = tf->command;
938 struct ata_queued_cmd *qc;
939 DECLARE_COMPLETION(wait);
940 unsigned long flags;
77853bf2 941 unsigned int err_mask;
a2a7a662
TH		 942
943 spin_lock_irqsave(&ap->host_set->lock, flags);
944
945 qc = ata_qc_new_init(ap, dev);
946 BUG_ON(qc == NULL);
947
948 qc->tf = *tf;
949 qc->dma_dir = dma_dir;
950 if (dma_dir != DMA_NONE) {
951 ata_sg_init_one(qc, buf, buflen);
952 qc->nsect = buflen / ATA_SECT_SIZE;
953 }
954
77853bf2 955 qc->private_data = &wait;
a2a7a662
TH		 956 qc->complete_fn = ata_qc_complete_internal;
957
9a3d9eb0
TH		 958 qc->err_mask = ata_qc_issue(qc);
959 if (qc->err_mask)
8e436af9 960 ata_qc_complete(qc);
a2a7a662
TH		 961
962 spin_unlock_irqrestore(&ap->host_set->lock, flags);
963
964 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
965 spin_lock_irqsave(&ap->host_set->lock, flags);
966
967 /* We're racing with irq here. If we lose, the
968 * following test prevents us from completing the qc
969 * again. If completion irq occurs after here but
970 * before the caller cleans up, it will result in a
971 * spurious interrupt. We can live with that.
972 */
77853bf2 973 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 974 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 975 ata_qc_complete(qc);
976 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
977 ap->id, command);
978 }
979
980 spin_unlock_irqrestore(&ap->host_set->lock, flags);
981 }
982
77853bf2
TH		 983 *tf = qc->tf;
984 err_mask = qc->err_mask;
985
986 ata_qc_free(qc);
987
988 return err_mask;
a2a7a662
TH		 989}
990
1bc4ccff
AC		 991/**
992 * ata_pio_need_iordy - check if iordy needed
993 * @adev: ATA device
994 *
995 * Check if the current speed of the device requires IORDY. Used
996 * by various controllers for chip configuration.
997 */
998
999unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1000{
1001 int pio;
1002 int speed = adev->pio_mode - XFER_PIO_0;
1003
1004 if (speed < 2)
1005 return 0;
1006 if (speed > 2)
1007 return 1;
1008
1009 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1010
1011 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1012 pio = adev->id[ATA_ID_EIDE_PIO];
1013 /* Is the speed faster than the drive allows non IORDY ? */
1014 if (pio) {
1015 /* This is cycle times not frequency - watch the logic! */
1016 if (pio > 240) /* PIO2 is 240nS per cycle */
1017 return 1;
1018 return 0;
1019 }
1020 }
1021 return 0;
1022}
1023
1da177e4 1024/**
49016aca
TH		 1025 * ata_dev_read_id - Read ID data from the specified device
1026 * @ap: port on which target device resides
1027 * @dev: target device
1028 * @p_class: pointer to class of the target device (may be changed)
1029 * @post_reset: is this read ID post-reset?
d9572b1d 1030 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1031 *
49016aca
TH		 1032 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1033 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1034 * devices. This function also takes care of EDD signature
1035 * misreporting (to be removed once EDD support is gone) and
1036 * issues ATA_CMD_INIT_DEV_PARAMS for pre-ATA4 drives.
1da177e4
LT		 1037 *
1038 * LOCKING:
49016aca
TH		 1039 * Kernel thread context (may sleep)
1040 *
1041 * RETURNS:
1042 * 0 on success, -errno otherwise.
1da177e4 1043 */
49016aca 1044static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1045 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1046{
49016aca 1047 unsigned int class = *p_class;
1da177e4 1048 unsigned int using_edd;
a0123703 1049 struct ata_taskfile tf;
49016aca 1050 unsigned int err_mask = 0;
d9572b1d 1051 u16 *id;
49016aca
TH		 1052 const char *reason;
1053 int rc;
1da177e4 1054
49016aca 1055 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1056
61eb066a
TH		 1057 if (ap->ops->probe_reset ||
1058 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1da177e4
LT		 1059 using_edd = 0;
1060 else
1061 using_edd = 1;
1062
49016aca 1063 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1064
d9572b1d
TH		 1065 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1066 if (id == NULL) {
1067 rc = -ENOMEM;
1068 reason = "out of memory";
1069 goto err_out;
1070 }
1071
49016aca
TH		 1072 retry:
1073 ata_tf_init(ap, &tf, dev->devno);
a0123703 1074
49016aca
TH		 1075 switch (class) {
1076 case ATA_DEV_ATA:
a0123703 1077 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1078 break;
1079 case ATA_DEV_ATAPI:
a0123703 1080 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1081 break;
1082 default:
1083 rc = -ENODEV;
1084 reason = "unsupported class";
1085 goto err_out;
1da177e4
LT		 1086 }
1087
a0123703 1088 tf.protocol = ATA_PROT_PIO;
1da177e4 1089
a0123703 1090 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1091 id, sizeof(id[0]) * ATA_ID_WORDS);
1da177e4 1092
a0123703 1093 if (err_mask) {
49016aca
TH		 1094 rc = -EIO;
1095 reason = "I/O error";
1096
a0123703
TH		 1097 if (err_mask & ~AC_ERR_DEV)
1098 goto err_out;
0169e284 1099
1da177e4
LT		 1100 /*
1101 * arg! EDD works for all test cases, but seems to return
1102 * the ATA signature for some ATAPI devices. Until the
1103 * reason for this is found and fixed, we fix up the mess
1104 * here. If IDENTIFY DEVICE returns command aborted
1105 * (as ATAPI devices do), then we issue an
1106 * IDENTIFY PACKET DEVICE.
1107 *
1108 * ATA software reset (SRST, the default) does not appear
1109 * to have this problem.
1110 */
49016aca 1111 if ((using_edd) && (class == ATA_DEV_ATA)) {
a0123703 1112 u8 err = tf.feature;
1da177e4 1113 if (err & ATA_ABORTED) {
49016aca 1114 class = ATA_DEV_ATAPI;
1da177e4
LT		 1115 goto retry;
1116 }
1117 }
1118 goto err_out;
1119 }
1120
49016aca 1121 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1122
49016aca
TH		 1123 /* sanity check */
1124 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1125 rc = -EINVAL;
1126 reason = "device reports illegal type";
1127 goto err_out;
1128 }
1129
1130 if (post_reset && class == ATA_DEV_ATA) {
1131 /*
1132 * The exact sequence expected by certain pre-ATA4 drives is:
1133 * SRST RESET
1134 * IDENTIFY
1135 * INITIALIZE DEVICE PARAMETERS
1136 * anything else..
1137 * Some drives were very specific about that exact sequence.
1138 */
1139 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1140 err_mask = ata_dev_init_params(ap, dev);
1141 if (err_mask) {
1142 rc = -EIO;
1143 reason = "INIT_DEV_PARAMS failed";
1144 goto err_out;
1145 }
1146
1147 /* current CHS translation info (id[53-58]) might be
1148 * changed. reread the identify device info.
1149 */
1150 post_reset = 0;
1151 goto retry;
1152 }
1153 }
1154
1155 *p_class = class;
d9572b1d 1156 *p_id = id;
49016aca
TH		 1157 return 0;
1158
1159 err_out:
1160 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1161 ap->id, dev->devno, reason);
d9572b1d 1162 kfree(id);
49016aca
TH		 1163 return rc;
1164}
1165
4b2f3ede
TH		 1166static inline u8 ata_dev_knobble(const struct ata_port *ap,
1167 struct ata_device *dev)
1168{
1169 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1170}
1171
49016aca 1172/**
ffeae418
TH		 1173 * ata_dev_configure - Configure the specified ATA/ATAPI device
1174 * @ap: Port on which target device resides
1175 * @dev: Target device to configure
4c2d721a 1176 * @print_info: Enable device info printout
ffeae418
TH		 1177 *
1178 * Configure @dev according to @dev->id. Generic and low-level
1179 * driver specific fixups are also applied.
49016aca
TH		 1180 *
1181 * LOCKING:
ffeae418
TH		 1182 * Kernel thread context (may sleep)
1183 *
1184 * RETURNS:
1185 * 0 on success, -errno otherwise
49016aca 1186 */
4c2d721a
TH		 1187static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1188 int print_info)
49016aca 1189{
1148c3a7 1190 const u16 *id = dev->id;
ff8854b2 1191 unsigned int xfer_mask;
49016aca
TH		 1192 int i, rc;
1193
1194 if (!ata_dev_present(dev)) {
1195 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1196 ap->id, dev->devno);
1197 return 0;
49016aca
TH		 1198 }
1199
ffeae418 1200 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1201
c39f5ebe
TH		 1202 /* print device capabilities */
1203 if (print_info)
1204 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1205 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1206 ap->id, dev->devno, id[49], id[82], id[83],
1207 id[84], id[85], id[86], id[87], id[88]);
1208
208a9933
TH		 1209 /* initialize to-be-configured parameters */
1210 dev->flags = 0;
1211 dev->max_sectors = 0;
1212 dev->cdb_len = 0;
1213 dev->n_sectors = 0;
1214 dev->cylinders = 0;
1215 dev->heads = 0;
1216 dev->sectors = 0;
1217
1da177e4
LT		 1218 /*
1219 * common ATA, ATAPI feature tests
1220 */
1221
8bf62ece 1222 /* we require DMA support (bits 8 of word 49) */
1148c3a7 1223 if (!ata_id_has_dma(id)) {
8bf62ece 1224 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
ffeae418 1225 rc = -EINVAL;
1da177e4
LT		 1226 goto err_out_nosup;
1227 }
1228
ff8854b2 1229 /* find max transfer mode; for printk only */
1148c3a7 1230 xfer_mask = ata_id_xfermask(id);
1da177e4 1231
1148c3a7 1232 ata_dump_id(id);
1da177e4
LT		 1233
1234 /* ATA-specific feature tests */
1235 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1236 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1237
1148c3a7 1238 if (ata_id_has_lba(id)) {
4c2d721a 1239 const char *lba_desc;
8bf62ece 1240
4c2d721a
TH		 1241 lba_desc = "LBA";
1242 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1243 if (ata_id_has_lba48(id)) {
8bf62ece 1244 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1245 lba_desc = "LBA48";
1246 }
8bf62ece
AL		 1247
1248 /* print device info to dmesg */
4c2d721a
TH		 1249 if (print_info)
1250 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1251 "max %s, %Lu sectors: %s\n",
1252 ap->id, dev->devno,
1148c3a7 1253 ata_id_major_version(id),
ff8854b2 1254 ata_mode_string(xfer_mask),
4c2d721a
TH		 1255 (unsigned long long)dev->n_sectors,
1256 lba_desc);
ffeae418 1257 } else {
8bf62ece
AL		 1258 /* CHS */
1259
1260 /* Default translation */
1148c3a7
TH		 1261 dev->cylinders = id[1];
1262 dev->heads = id[3];
1263 dev->sectors = id[6];
8bf62ece 1264
1148c3a7 1265 if (ata_id_current_chs_valid(id)) {
8bf62ece 1266 /* Current CHS translation is valid. */
1148c3a7
TH		 1267 dev->cylinders = id[54];
1268 dev->heads = id[55];
1269 dev->sectors = id[56];
8bf62ece
AL		 1270 }
1271
1272 /* print device info to dmesg */
4c2d721a
TH		 1273 if (print_info)
1274 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1275 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1276 ap->id, dev->devno,
1148c3a7 1277 ata_id_major_version(id),
ff8854b2 1278 ata_mode_string(xfer_mask),
4c2d721a
TH		 1279 (unsigned long long)dev->n_sectors,
1280 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1281 }
1282
6e7846e9 1283 dev->cdb_len = 16;
1da177e4
LT		 1284 }
1285
1286 /* ATAPI-specific feature tests */
2c13b7ce 1287 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1288 rc = atapi_cdb_len(id);
1da177e4
LT		 1289 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1290 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1291 rc = -EINVAL;
1da177e4
LT		 1292 goto err_out_nosup;
1293 }
6e7846e9 1294 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1295
1296 /* print device info to dmesg */
4c2d721a
TH		 1297 if (print_info)
1298 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1299 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1300 }
1301
6e7846e9
TH		 1302 ap->host->max_cmd_len = 0;
1303 for (i = 0; i < ATA_MAX_DEVICES; i++)
1304 ap->host->max_cmd_len = max_t(unsigned int,
1305 ap->host->max_cmd_len,
1306 ap->device[i].cdb_len);
1307
4b2f3ede
TH		 1308 /* limit bridge transfers to udma5, 200 sectors */
1309 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1310 if (print_info)
1311 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1312 ap->id, dev->devno);
4b2f3ede
TH		 1313 ap->udma_mask &= ATA_UDMA5;
1314 dev->max_sectors = ATA_MAX_SECTORS;
1315 }
1316
1317 if (ap->ops->dev_config)
1318 ap->ops->dev_config(ap, dev);
1319
1da177e4 1320 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1321 return 0;
1da177e4
LT		 1322
1323err_out_nosup:
1324 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
ffeae418 1325 ap->id, dev->devno);
1da177e4 1326 DPRINTK("EXIT, err\n");
ffeae418 1327 return rc;
1da177e4
LT		 1328}
1329
1330/**
1331 * ata_bus_probe - Reset and probe ATA bus
1332 * @ap: Bus to probe
1333 *
0cba632b
JG		 1334 * Master ATA bus probing function. Initiates a hardware-dependent
1335 * bus reset, then attempts to identify any devices found on
1336 * the bus.
1337 *
1da177e4 1338 * LOCKING:
0cba632b 1339 * PCI/etc. bus probe sem.
1da177e4
LT		 1340 *
1341 * RETURNS:
1342 * Zero on success, non-zero on error.
1343 */
1344
1345static int ata_bus_probe(struct ata_port *ap)
1346{
28ca5c57
TH		 1347 unsigned int classes[ATA_MAX_DEVICES];
1348 unsigned int i, rc, found = 0;
1da177e4 1349
28ca5c57 1350 ata_port_probe(ap);
c19ba8af 1351
2044470c
TH		 1352 /* reset and determine device classes */
1353 for (i = 0; i < ATA_MAX_DEVICES; i++)
1354 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1355
2044470c 1356 if (ap->ops->probe_reset) {
c19ba8af 1357 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1358 if (rc) {
1359 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1360 return rc;
c19ba8af 1361 }
28ca5c57 1362 } else {
c19ba8af
TH		 1363 ap->ops->phy_reset(ap);
1364
2044470c
TH		 1365 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1366 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1367 classes[i] = ap->device[i].class;
2044470c 1368
28ca5c57
TH		 1369 ata_port_probe(ap);
1370 }
1da177e4 1371
2044470c
TH		 1372 for (i = 0; i < ATA_MAX_DEVICES; i++)
1373 if (classes[i] == ATA_DEV_UNKNOWN)
1374 classes[i] = ATA_DEV_NONE;
1375
28ca5c57 1376 /* read IDENTIFY page and configure devices */
1da177e4 1377 for (i = 0; i < ATA_MAX_DEVICES; i++) {
ffeae418
TH		 1378 struct ata_device *dev = &ap->device[i];
1379
28ca5c57
TH		 1380 dev->class = classes[i];
1381
ffeae418
TH		 1382 if (!ata_dev_present(dev))
1383 continue;
1384
1385 WARN_ON(dev->id != NULL);
1386 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1387 dev->class = ATA_DEV_NONE;
1388 continue;
1389 }
1390
4c2d721a 1391 if (ata_dev_configure(ap, dev, 1)) {
ffeae418
TH		 1392 dev->class++; /* disable device */
1393 continue;
1da177e4 1394 }
ffeae418 1395
ffeae418 1396 found = 1;
1da177e4
LT		 1397 }
1398
28ca5c57 1399 if (!found)
1da177e4
LT		 1400 goto err_out_disable;
1401
1402 ata_set_mode(ap);
1403 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1404 goto err_out_disable;
1405
1406 return 0;
1407
1408err_out_disable:
1409 ap->ops->port_disable(ap);
1da177e4
LT		 1410 return -1;
1411}
1412
1413/**
0cba632b
JG		 1414 * ata_port_probe - Mark port as enabled
1415 * @ap: Port for which we indicate enablement
1da177e4 1416 *
0cba632b
JG		 1417 * Modify @ap data structure such that the system
1418 * thinks that the entire port is enabled.
1419 *
1420 * LOCKING: host_set lock, or some other form of
1421 * serialization.
1da177e4
LT		 1422 */
1423
1424void ata_port_probe(struct ata_port *ap)
1425{
1426 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1427}
1428
3be680b7
TH		 1429/**
1430 * sata_print_link_status - Print SATA link status
1431 * @ap: SATA port to printk link status about
1432 *
1433 * This function prints link speed and status of a SATA link.
1434 *
1435 * LOCKING:
1436 * None.
1437 */
1438static void sata_print_link_status(struct ata_port *ap)
1439{
1440 u32 sstatus, tmp;
1441 const char *speed;
1442
1443 if (!ap->ops->scr_read)
1444 return;
1445
1446 sstatus = scr_read(ap, SCR_STATUS);
1447
1448 if (sata_dev_present(ap)) {
1449 tmp = (sstatus >> 4) & 0xf;
1450 if (tmp & (1 << 0))
1451 speed = "1.5";
1452 else if (tmp & (1 << 1))
1453 speed = "3.0";
1454 else
1455 speed = "<unknown>";
1456 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1457 ap->id, speed, sstatus);
1458 } else {
1459 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1460 ap->id, sstatus);
1461 }
1462}
1463
1da177e4 1464/**
780a87f7
JG		 1465 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1466 * @ap: SATA port associated with target SATA PHY.
1da177e4 1467 *
780a87f7
JG		 1468 * This function issues commands to standard SATA Sxxx
1469 * PHY registers, to wake up the phy (and device), and
1470 * clear any reset condition.
1da177e4
LT		 1471 *
1472 * LOCKING:
0cba632b 1473 * PCI/etc. bus probe sem.
1da177e4
LT		 1474 *
1475 */
1476void __sata_phy_reset(struct ata_port *ap)
1477{
1478 u32 sstatus;
1479 unsigned long timeout = jiffies + (HZ * 5);
1480
1481 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1482 /* issue phy wake/reset */
1483 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1484 /* Couldn't find anything in SATA I/II specs, but
1485 * AHCI-1.1 10.4.2 says at least 1 ms. */
1486 mdelay(1);
1da177e4 1487 }
cdcca89e 1488 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1489
1490 /* wait for phy to become ready, if necessary */
1491 do {
1492 msleep(200);
1493 sstatus = scr_read(ap, SCR_STATUS);
1494 if ((sstatus & 0xf) != 1)
1495 break;
1496 } while (time_before(jiffies, timeout));
1497
3be680b7
TH		 1498 /* print link status */
1499 sata_print_link_status(ap);
656563e3 1500
3be680b7
TH		 1501 /* TODO: phy layer with polling, timeouts, etc. */
1502 if (sata_dev_present(ap))
1da177e4 1503 ata_port_probe(ap);
3be680b7 1504 else
1da177e4 1505 ata_port_disable(ap);
1da177e4
LT		 1506
1507 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1508 return;
1509
1510 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1511 ata_port_disable(ap);
1512 return;
1513 }
1514
1515 ap->cbl = ATA_CBL_SATA;
1516}
1517
1518/**
780a87f7
JG		 1519 * sata_phy_reset - Reset SATA bus.
1520 * @ap: SATA port associated with target SATA PHY.
1da177e4 1521 *
780a87f7
JG		 1522 * This function resets the SATA bus, and then probes
1523 * the bus for devices.
1da177e4
LT		 1524 *
1525 * LOCKING:
0cba632b 1526 * PCI/etc. bus probe sem.
1da177e4
LT		 1527 *
1528 */
1529void sata_phy_reset(struct ata_port *ap)
1530{
1531 __sata_phy_reset(ap);
1532 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1533 return;
1534 ata_bus_reset(ap);
1535}
1536
1537/**
780a87f7
JG		 1538 * ata_port_disable - Disable port.
1539 * @ap: Port to be disabled.
1da177e4 1540 *
780a87f7
JG		 1541 * Modify @ap data structure such that the system
1542 * thinks that the entire port is disabled, and should
1543 * never attempt to probe or communicate with devices
1544 * on this port.
1545 *
1546 * LOCKING: host_set lock, or some other form of
1547 * serialization.
1da177e4
LT		 1548 */
1549
1550void ata_port_disable(struct ata_port *ap)
1551{
1552 ap->device[0].class = ATA_DEV_NONE;
1553 ap->device[1].class = ATA_DEV_NONE;
1554 ap->flags |= ATA_FLAG_PORT_DISABLED;
1555}
1556
452503f9
AC		 1557/*
1558 * This mode timing computation functionality is ported over from
1559 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1560 */
1561/*
1562 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1563 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1564 * for PIO 5, which is a nonstandard extension and UDMA6, which
1565 * is currently supported only by Maxtor drives.
1566 */
1567
1568static const struct ata_timing ata_timing[] = {
1569
1570 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1571 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1572 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1573 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1574
1575 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1576 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1577 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1578
1579/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1580
1581 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1582 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1583 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1584
1585 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1586 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1587 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1588
1589/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1590 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1591 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1592
1593 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1594 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1595 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1596
1597/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1598
1599 { 0xFF }
1600};
1601
1602#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1603#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1604
1605static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1606{
1607 q->setup = EZ(t->setup * 1000, T);
1608 q->act8b = EZ(t->act8b * 1000, T);
1609 q->rec8b = EZ(t->rec8b * 1000, T);
1610 q->cyc8b = EZ(t->cyc8b * 1000, T);
1611 q->active = EZ(t->active * 1000, T);
1612 q->recover = EZ(t->recover * 1000, T);
1613 q->cycle = EZ(t->cycle * 1000, T);
1614 q->udma = EZ(t->udma * 1000, UT);
1615}
1616
1617void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1618 struct ata_timing *m, unsigned int what)
1619{
1620 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1621 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1622 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1623 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1624 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1625 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1626 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1627 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1628}
1629
1630static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1631{
1632 const struct ata_timing *t;
1633
1634 for (t = ata_timing; t->mode != speed; t++)
91190758 1635 if (t->mode == 0xFF)
452503f9
AC		 1636 return NULL;
1637 return t;
1638}
1639
1640int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1641 struct ata_timing *t, int T, int UT)
1642{
1643 const struct ata_timing *s;
1644 struct ata_timing p;
1645
1646 /*
1647 * Find the mode.
75b1f2f8 1648 */
452503f9
AC		 1649
1650 if (!(s = ata_timing_find_mode(speed)))
1651 return -EINVAL;
1652
75b1f2f8
AL		 1653 memcpy(t, s, sizeof(*s));
1654
452503f9
AC		 1655 /*
1656 * If the drive is an EIDE drive, it can tell us it needs extended
1657 * PIO/MW_DMA cycle timing.
1658 */
1659
1660 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1661 memset(&p, 0, sizeof(p));
1662 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1663 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1664 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1665 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1666 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1667 }
1668 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1669 }
1670
1671 /*
1672 * Convert the timing to bus clock counts.
1673 */
1674
75b1f2f8 1675 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1676
1677 /*
c893a3ae
RD		 1678 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1679 * S.M.A.R.T * and some other commands. We have to ensure that the
1680 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1681 */
1682
1683 if (speed > XFER_PIO_4) {
1684 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1685 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1686 }
1687
1688 /*
c893a3ae 1689 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1690 */
1691
1692 if (t->act8b + t->rec8b < t->cyc8b) {
1693 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1694 t->rec8b = t->cyc8b - t->act8b;
1695 }
1696
1697 if (t->active + t->recover < t->cycle) {
1698 t->active += (t->cycle - (t->active + t->recover)) / 2;
1699 t->recover = t->cycle - t->active;
1700 }
1701
1702 return 0;
1703}
1704
1da177e4
LT		 1705static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1706{
1da177e4
LT		 1707 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1708 return;
1709
1710 if (dev->xfer_shift == ATA_SHIFT_PIO)
1711 dev->flags |= ATA_DFLAG_PIO;
1712
1713 ata_dev_set_xfermode(ap, dev);
1714
48a8a14f
TH		 1715 if (ata_dev_revalidate(ap, dev, 0)) {
1716 printk(KERN_ERR "ata%u: failed to revalidate after set "
1717 "xfermode, disabled\n", ap->id);
1718 ata_port_disable(ap);
1719 }
1720
23e71c3d
TH		 1721 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1722 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1723
1724 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1725 ap->id, dev->devno,
1726 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1da177e4
LT		 1727}
1728
1729static int ata_host_set_pio(struct ata_port *ap)
1730{
a6d5a51c 1731 int i;
1da177e4
LT		 1732
1733 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1734 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1735
1736 if (!ata_dev_present(dev))
1737 continue;
1738
1739 if (!dev->pio_mode) {
1740 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1741 return -1;
1da177e4 1742 }
a6d5a51c
TH		 1743
1744 dev->xfer_mode = dev->pio_mode;
1745 dev->xfer_shift = ATA_SHIFT_PIO;
1746 if (ap->ops->set_piomode)
1747 ap->ops->set_piomode(ap, dev);
1da177e4
LT		 1748 }
1749
1750 return 0;
1751}
1752
a6d5a51c 1753static void ata_host_set_dma(struct ata_port *ap)
1da177e4
LT		 1754{
1755 int i;
1756
1757 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1758 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1759
1760 if (!ata_dev_present(dev) || !dev->dma_mode)
1761 continue;
1762
1763 dev->xfer_mode = dev->dma_mode;
1764 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1765 if (ap->ops->set_dmamode)
1766 ap->ops->set_dmamode(ap, dev);
1da177e4
LT		 1767 }
1768}
1769
1770/**
1771 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1772 * @ap: port on which timings will be programmed
1773 *
780a87f7
JG		 1774 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1775 *
1da177e4 1776 * LOCKING:
0cba632b 1777 * PCI/etc. bus probe sem.
1da177e4
LT		 1778 */
1779static void ata_set_mode(struct ata_port *ap)
1780{
a6d5a51c 1781 int i, rc;
1da177e4 1782
a6d5a51c
TH		 1783 /* step 1: calculate xfer_mask */
1784 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1785 struct ata_device *dev = &ap->device[i];
1786 unsigned int xfer_mask;
1787
1788 if (!ata_dev_present(dev))
1789 continue;
1790
1791 xfer_mask = ata_dev_xfermask(ap, dev);
1da177e4 1792
a6d5a51c
TH		 1793 dev->pio_mode = ata_xfer_mask2mode(xfer_mask & ATA_MASK_PIO);
1794 dev->dma_mode = ata_xfer_mask2mode(xfer_mask & (ATA_MASK_MWDMA |
1795 ATA_MASK_UDMA));
1796 }
1797
1798 /* step 2: always set host PIO timings */
1799 rc = ata_host_set_pio(ap);
1da177e4
LT		 1800 if (rc)
1801 goto err_out;
1802
a6d5a51c
TH		 1803 /* step 3: set host DMA timings */
1804 ata_host_set_dma(ap);
1da177e4
LT		 1805
1806 /* step 4: update devices' xfer mode */
a6d5a51c
TH		 1807 for (i = 0; i < ATA_MAX_DEVICES; i++)
1808 ata_dev_set_mode(ap, &ap->device[i]);
1da177e4
LT		 1809
1810 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1811 return;
1812
1813 if (ap->ops->post_set_mode)
1814 ap->ops->post_set_mode(ap);
1815
1da177e4
LT		 1816 return;
1817
1818err_out:
1819 ata_port_disable(ap);
1820}
1821
1fdffbce
JG		 1822/**
1823 * ata_tf_to_host - issue ATA taskfile to host controller
1824 * @ap: port to which command is being issued
1825 * @tf: ATA taskfile register set
1826 *
1827 * Issues ATA taskfile register set to ATA host controller,
1828 * with proper synchronization with interrupt handler and
1829 * other threads.
1830 *
1831 * LOCKING:
1832 * spin_lock_irqsave(host_set lock)
1833 */
1834
1835static inline void ata_tf_to_host(struct ata_port *ap,
1836 const struct ata_taskfile *tf)
1837{
1838 ap->ops->tf_load(ap, tf);
1839 ap->ops->exec_command(ap, tf);
1840}
1841
1da177e4
LT		 1842/**
1843 * ata_busy_sleep - sleep until BSY clears, or timeout
1844 * @ap: port containing status register to be polled
1845 * @tmout_pat: impatience timeout
1846 * @tmout: overall timeout
1847 *
780a87f7
JG		 1848 * Sleep until ATA Status register bit BSY clears,
1849 * or a timeout occurs.
1850 *
1851 * LOCKING: None.
1da177e4
LT		 1852 */
1853
6f8b9958
TH		 1854unsigned int ata_busy_sleep (struct ata_port *ap,
1855 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1856{
1857 unsigned long timer_start, timeout;
1858 u8 status;
1859
1860 status = ata_busy_wait(ap, ATA_BUSY, 300);
1861 timer_start = jiffies;
1862 timeout = timer_start + tmout_pat;
1863 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1864 msleep(50);
1865 status = ata_busy_wait(ap, ATA_BUSY, 3);
1866 }
1867
1868 if (status & ATA_BUSY)
1869 printk(KERN_WARNING "ata%u is slow to respond, "
1870 "please be patient\n", ap->id);
1871
1872 timeout = timer_start + tmout;
1873 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1874 msleep(50);
1875 status = ata_chk_status(ap);
1876 }
1877
1878 if (status & ATA_BUSY) {
1879 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1880 ap->id, tmout / HZ);
1881 return 1;
1882 }
1883
1884 return 0;
1885}
1886
1887static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1888{
1889 struct ata_ioports *ioaddr = &ap->ioaddr;
1890 unsigned int dev0 = devmask & (1 << 0);
1891 unsigned int dev1 = devmask & (1 << 1);
1892 unsigned long timeout;
1893
1894 /* if device 0 was found in ata_devchk, wait for its
1895 * BSY bit to clear
1896 */
1897 if (dev0)
1898 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1899
1900 /* if device 1 was found in ata_devchk, wait for
1901 * register access, then wait for BSY to clear
1902 */
1903 timeout = jiffies + ATA_TMOUT_BOOT;
1904 while (dev1) {
1905 u8 nsect, lbal;
1906
1907 ap->ops->dev_select(ap, 1);
1908 if (ap->flags & ATA_FLAG_MMIO) {
1909 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1910 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1911 } else {
1912 nsect = inb(ioaddr->nsect_addr);
1913 lbal = inb(ioaddr->lbal_addr);
1914 }
1915 if ((nsect == 1) && (lbal == 1))
1916 break;
1917 if (time_after(jiffies, timeout)) {
1918 dev1 = 0;
1919 break;
1920 }
1921 msleep(50); /* give drive a breather */
1922 }
1923 if (dev1)
1924 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1925
1926 /* is all this really necessary? */
1927 ap->ops->dev_select(ap, 0);
1928 if (dev1)
1929 ap->ops->dev_select(ap, 1);
1930 if (dev0)
1931 ap->ops->dev_select(ap, 0);
1932}
1933
1934/**
0cba632b
JG		 1935 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1936 * @ap: Port to reset and probe
1937 *
1938 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1939 * probe the bus. Not often used these days.
1da177e4
LT		 1940 *
1941 * LOCKING:
0cba632b 1942 * PCI/etc. bus probe sem.
e5338254 1943 * Obtains host_set lock.
1da177e4
LT		 1944 *
1945 */
1946
1947static unsigned int ata_bus_edd(struct ata_port *ap)
1948{
1949 struct ata_taskfile tf;
e5338254 1950 unsigned long flags;
1da177e4
LT		 1951
1952 /* set up execute-device-diag (bus reset) taskfile */
1953 /* also, take interrupts to a known state (disabled) */
1954 DPRINTK("execute-device-diag\n");
1955 ata_tf_init(ap, &tf, 0);
1956 tf.ctl |= ATA_NIEN;
1957 tf.command = ATA_CMD_EDD;
1958 tf.protocol = ATA_PROT_NODATA;
1959
1960 /* do bus reset */
e5338254 1961 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1962 ata_tf_to_host(ap, &tf);
e5338254 1963 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1964
1965 /* spec says at least 2ms. but who knows with those
1966 * crazy ATAPI devices...
1967 */
1968 msleep(150);
1969
1970 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1971}
1972
1973static unsigned int ata_bus_softreset(struct ata_port *ap,
1974 unsigned int devmask)
1975{
1976 struct ata_ioports *ioaddr = &ap->ioaddr;
1977
1978 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1979
1980 /* software reset. causes dev0 to be selected */
1981 if (ap->flags & ATA_FLAG_MMIO) {
1982 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1983 udelay(20); /* FIXME: flush */
1984 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1985 udelay(20); /* FIXME: flush */
1986 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1987 } else {
1988 outb(ap->ctl, ioaddr->ctl_addr);
1989 udelay(10);
1990 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1991 udelay(10);
1992 outb(ap->ctl, ioaddr->ctl_addr);
1993 }
1994
1995 /* spec mandates ">= 2ms" before checking status.
1996 * We wait 150ms, because that was the magic delay used for
1997 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1998 * between when the ATA command register is written, and then
1999 * status is checked. Because waiting for "a while" before
2000 * checking status is fine, post SRST, we perform this magic
2001 * delay here as well.
2002 */
2003 msleep(150);
2004
2005 ata_bus_post_reset(ap, devmask);
2006
2007 return 0;
2008}
2009
2010/**
2011 * ata_bus_reset - reset host port and associated ATA channel
2012 * @ap: port to reset
2013 *
2014 * This is typically the first time we actually start issuing
2015 * commands to the ATA channel. We wait for BSY to clear, then
2016 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2017 * result. Determine what devices, if any, are on the channel
2018 * by looking at the device 0/1 error register. Look at the signature
2019 * stored in each device's taskfile registers, to determine if
2020 * the device is ATA or ATAPI.
2021 *
2022 * LOCKING:
0cba632b
JG		 2023 * PCI/etc. bus probe sem.
2024 * Obtains host_set lock.
1da177e4
LT		 2025 *
2026 * SIDE EFFECTS:
2027 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2028 */
2029
2030void ata_bus_reset(struct ata_port *ap)
2031{
2032 struct ata_ioports *ioaddr = &ap->ioaddr;
2033 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2034 u8 err;
2035 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2036
2037 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2038
2039 /* determine if device 0/1 are present */
2040 if (ap->flags & ATA_FLAG_SATA_RESET)
2041 dev0 = 1;
2042 else {
2043 dev0 = ata_devchk(ap, 0);
2044 if (slave_possible)
2045 dev1 = ata_devchk(ap, 1);
2046 }
2047
2048 if (dev0)
2049 devmask |= (1 << 0);
2050 if (dev1)
2051 devmask |= (1 << 1);
2052
2053 /* select device 0 again */
2054 ap->ops->dev_select(ap, 0);
2055
2056 /* issue bus reset */
2057 if (ap->flags & ATA_FLAG_SRST)
2058 rc = ata_bus_softreset(ap, devmask);
2059 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2060 /* set up device control */
2061 if (ap->flags & ATA_FLAG_MMIO)
2062 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2063 else
2064 outb(ap->ctl, ioaddr->ctl_addr);
2065 rc = ata_bus_edd(ap);
2066 }
2067
2068 if (rc)
2069 goto err_out;
2070
2071 /*
2072 * determine by signature whether we have ATA or ATAPI devices
2073 */
b4dc7623 2074 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2075 if ((slave_possible) && (err != 0x81))
b4dc7623 2076 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2077
2078 /* re-enable interrupts */
2079 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2080 ata_irq_on(ap);
2081
2082 /* is double-select really necessary? */
2083 if (ap->device[1].class != ATA_DEV_NONE)
2084 ap->ops->dev_select(ap, 1);
2085 if (ap->device[0].class != ATA_DEV_NONE)
2086 ap->ops->dev_select(ap, 0);
2087
2088 /* if no devices were detected, disable this port */
2089 if ((ap->device[0].class == ATA_DEV_NONE) &&
2090 (ap->device[1].class == ATA_DEV_NONE))
2091 goto err_out;
2092
2093 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2094 /* set up device control for ATA_FLAG_SATA_RESET */
2095 if (ap->flags & ATA_FLAG_MMIO)
2096 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2097 else
2098 outb(ap->ctl, ioaddr->ctl_addr);
2099 }
2100
2101 DPRINTK("EXIT\n");
2102 return;
2103
2104err_out:
2105 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2106 ap->ops->port_disable(ap);
2107
2108 DPRINTK("EXIT\n");
2109}
2110
7a7921e8
TH		 2111static int sata_phy_resume(struct ata_port *ap)
2112{
2113 unsigned long timeout = jiffies + (HZ * 5);
2114 u32 sstatus;
2115
2116 scr_write_flush(ap, SCR_CONTROL, 0x300);
2117
2118 /* Wait for phy to become ready, if necessary. */
2119 do {
2120 msleep(200);
2121 sstatus = scr_read(ap, SCR_STATUS);
2122 if ((sstatus & 0xf) != 1)
2123 return 0;
2124 } while (time_before(jiffies, timeout));
2125
2126 return -1;
2127}
2128
8a19ac89
TH		 2129/**
2130 * ata_std_probeinit - initialize probing
2131 * @ap: port to be probed
2132 *
2133 * @ap is about to be probed. Initialize it. This function is
2134 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2135 *
2136 * NOTE!!! Do not use this function as probeinit if a low level
2137 * driver implements only hardreset. Just pass NULL as probeinit
2138 * in that case. Using this function is probably okay but doing
2139 * so makes reset sequence different from the original
2140 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 2141 */
2142extern void ata_std_probeinit(struct ata_port *ap)
2143{
3a39746a 2144 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 2145 sata_phy_resume(ap);
3a39746a
TH		 2146 if (sata_dev_present(ap))
2147 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2148 }
8a19ac89
TH		 2149}
2150
c2bd5804
TH		 2151/**
2152 * ata_std_softreset - reset host port via ATA SRST
2153 * @ap: port to reset
2154 * @verbose: fail verbosely
2155 * @classes: resulting classes of attached devices
2156 *
2157 * Reset host port using ATA SRST. This function is to be used
2158 * as standard callback for ata_drive_*_reset() functions.
2159 *
2160 * LOCKING:
2161 * Kernel thread context (may sleep)
2162 *
2163 * RETURNS:
2164 * 0 on success, -errno otherwise.
2165 */
2166int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2167{
2168 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2169 unsigned int devmask = 0, err_mask;
2170 u8 err;
2171
2172 DPRINTK("ENTER\n");
2173
3a39746a
TH		 2174 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2175 classes[0] = ATA_DEV_NONE;
2176 goto out;
2177 }
2178
c2bd5804
TH		 2179 /* determine if device 0/1 are present */
2180 if (ata_devchk(ap, 0))
2181 devmask |= (1 << 0);
2182 if (slave_possible && ata_devchk(ap, 1))
2183 devmask |= (1 << 1);
2184
c2bd5804
TH		 2185 /* select device 0 again */
2186 ap->ops->dev_select(ap, 0);
2187
2188 /* issue bus reset */
2189 DPRINTK("about to softreset, devmask=%x\n", devmask);
2190 err_mask = ata_bus_softreset(ap, devmask);
2191 if (err_mask) {
2192 if (verbose)
2193 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2194 ap->id, err_mask);
2195 else
2196 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2197 err_mask);
2198 return -EIO;
2199 }
2200
2201 /* determine by signature whether we have ATA or ATAPI devices */
2202 classes[0] = ata_dev_try_classify(ap, 0, &err);
2203 if (slave_possible && err != 0x81)
2204 classes[1] = ata_dev_try_classify(ap, 1, &err);
2205
3a39746a 2206 out:
c2bd5804
TH		 2207 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2208 return 0;
2209}
2210
2211/**
2212 * sata_std_hardreset - reset host port via SATA phy reset
2213 * @ap: port to reset
2214 * @verbose: fail verbosely
2215 * @class: resulting class of attached device
2216 *
2217 * SATA phy-reset host port using DET bits of SControl register.
2218 * This function is to be used as standard callback for
2219 * ata_drive_*_reset().
2220 *
2221 * LOCKING:
2222 * Kernel thread context (may sleep)
2223 *
2224 * RETURNS:
2225 * 0 on success, -errno otherwise.
2226 */
2227int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2228{
c2bd5804
TH		 2229 DPRINTK("ENTER\n");
2230
2231 /* Issue phy wake/reset */
2232 scr_write_flush(ap, SCR_CONTROL, 0x301);
2233
2234 /*
2235 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2236 * 10.4.2 says at least 1 ms.
2237 */
2238 msleep(1);
2239
7a7921e8
TH		 2240 /* Bring phy back */
2241 sata_phy_resume(ap);
c2bd5804 2242
c2bd5804
TH		 2243 /* TODO: phy layer with polling, timeouts, etc. */
2244 if (!sata_dev_present(ap)) {
2245 *class = ATA_DEV_NONE;
2246 DPRINTK("EXIT, link offline\n");
2247 return 0;
2248 }
2249
2250 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2251 if (verbose)
2252 printk(KERN_ERR "ata%u: COMRESET failed "
2253 "(device not ready)\n", ap->id);
2254 else
2255 DPRINTK("EXIT, device not ready\n");
2256 return -EIO;
2257 }
2258
3a39746a
TH		 2259 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2260
c2bd5804
TH		 2261 *class = ata_dev_try_classify(ap, 0, NULL);
2262
2263 DPRINTK("EXIT, class=%u\n", *class);
2264 return 0;
2265}
2266
2267/**
2268 * ata_std_postreset - standard postreset callback
2269 * @ap: the target ata_port
2270 * @classes: classes of attached devices
2271 *
2272 * This function is invoked after a successful reset. Note that
2273 * the device might have been reset more than once using
2274 * different reset methods before postreset is invoked.
c2bd5804
TH		 2275 *
2276 * This function is to be used as standard callback for
2277 * ata_drive_*_reset().
2278 *
2279 * LOCKING:
2280 * Kernel thread context (may sleep)
2281 */
2282void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2283{
2284 DPRINTK("ENTER\n");
2285
56497bd5 2286 /* set cable type if it isn't already set */
c2bd5804
TH		 2287 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2288 ap->cbl = ATA_CBL_SATA;
2289
2290 /* print link status */
2291 if (ap->cbl == ATA_CBL_SATA)
2292 sata_print_link_status(ap);
2293
3a39746a
TH		 2294 /* re-enable interrupts */
2295 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2296 ata_irq_on(ap);
c2bd5804
TH		 2297
2298 /* is double-select really necessary? */
2299 if (classes[0] != ATA_DEV_NONE)
2300 ap->ops->dev_select(ap, 1);
2301 if (classes[1] != ATA_DEV_NONE)
2302 ap->ops->dev_select(ap, 0);
2303
3a39746a
TH		 2304 /* bail out if no device is present */
2305 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2306 DPRINTK("EXIT, no device\n");
2307 return;
2308 }
2309
2310 /* set up device control */
2311 if (ap->ioaddr.ctl_addr) {
2312 if (ap->flags & ATA_FLAG_MMIO)
2313 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2314 else
2315 outb(ap->ctl, ap->ioaddr.ctl_addr);
2316 }
c2bd5804
TH		 2317
2318 DPRINTK("EXIT\n");
2319}
2320
2321/**
2322 * ata_std_probe_reset - standard probe reset method
2323 * @ap: prot to perform probe-reset
2324 * @classes: resulting classes of attached devices
2325 *
2326 * The stock off-the-shelf ->probe_reset method.
2327 *
2328 * LOCKING:
2329 * Kernel thread context (may sleep)
2330 *
2331 * RETURNS:
2332 * 0 on success, -errno otherwise.
2333 */
2334int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2335{
2336 ata_reset_fn_t hardreset;
2337
2338 hardreset = NULL;
b911fc3a 2339 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2340 hardreset = sata_std_hardreset;
2341
8a19ac89 2342 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2343 ata_std_softreset, hardreset,
c2bd5804
TH		 2344 ata_std_postreset, classes);
2345}
2346
a62c0fc5
TH		 2347static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2348 ata_postreset_fn_t postreset,
2349 unsigned int *classes)
2350{
2351 int i, rc;
2352
2353 for (i = 0; i < ATA_MAX_DEVICES; i++)
2354 classes[i] = ATA_DEV_UNKNOWN;
2355
2356 rc = reset(ap, 0, classes);
2357 if (rc)
2358 return rc;
2359
2360 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2361 * is complete and convert all ATA_DEV_UNKNOWN to
2362 * ATA_DEV_NONE.
2363 */
2364 for (i = 0; i < ATA_MAX_DEVICES; i++)
2365 if (classes[i] != ATA_DEV_UNKNOWN)
2366 break;
2367
2368 if (i < ATA_MAX_DEVICES)
2369 for (i = 0; i < ATA_MAX_DEVICES; i++)
2370 if (classes[i] == ATA_DEV_UNKNOWN)
2371 classes[i] = ATA_DEV_NONE;
2372
2373 if (postreset)
2374 postreset(ap, classes);
2375
2376 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2377}
2378
2379/**
2380 * ata_drive_probe_reset - Perform probe reset with given methods
2381 * @ap: port to reset
7944ea95 2382 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2383 * @softreset: softreset method (can be NULL)
2384 * @hardreset: hardreset method (can be NULL)
2385 * @postreset: postreset method (can be NULL)
2386 * @classes: resulting classes of attached devices
2387 *
2388 * Reset the specified port and classify attached devices using
2389 * given methods. This function prefers softreset but tries all
2390 * possible reset sequences to reset and classify devices. This
2391 * function is intended to be used for constructing ->probe_reset
2392 * callback by low level drivers.
2393 *
2394 * Reset methods should follow the following rules.
2395 *
2396 * - Return 0 on sucess, -errno on failure.
2397 * - If classification is supported, fill classes[] with
2398 * recognized class codes.
2399 * - If classification is not supported, leave classes[] alone.
2400 * - If verbose is non-zero, print error message on failure;
2401 * otherwise, shut up.
2402 *
2403 * LOCKING:
2404 * Kernel thread context (may sleep)
2405 *
2406 * RETURNS:
2407 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2408 * if classification fails, and any error code from reset
2409 * methods.
2410 */
7944ea95 2411int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2412 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2413 ata_postreset_fn_t postreset, unsigned int *classes)
2414{
2415 int rc = -EINVAL;
2416
7944ea95
TH		 2417 if (probeinit)
2418 probeinit(ap);
2419
a62c0fc5
TH		 2420 if (softreset) {
2421 rc = do_probe_reset(ap, softreset, postreset, classes);
2422 if (rc == 0)
2423 return 0;
2424 }
2425
2426 if (!hardreset)
2427 return rc;
2428
2429 rc = do_probe_reset(ap, hardreset, postreset, classes);
2430 if (rc == 0 || rc != -ENODEV)
2431 return rc;
2432
2433 if (softreset)
2434 rc = do_probe_reset(ap, softreset, postreset, classes);
2435
2436 return rc;
2437}
2438
623a3128
TH		 2439/**
2440 * ata_dev_same_device - Determine whether new ID matches configured device
2441 * @ap: port on which the device to compare against resides
2442 * @dev: device to compare against
2443 * @new_class: class of the new device
2444 * @new_id: IDENTIFY page of the new device
2445 *
2446 * Compare @new_class and @new_id against @dev and determine
2447 * whether @dev is the device indicated by @new_class and
2448 * @new_id.
2449 *
2450 * LOCKING:
2451 * None.
2452 *
2453 * RETURNS:
2454 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2455 */
2456static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2457 unsigned int new_class, const u16 *new_id)
2458{
2459 const u16 *old_id = dev->id;
2460 unsigned char model[2][41], serial[2][21];
2461 u64 new_n_sectors;
2462
2463 if (dev->class != new_class) {
2464 printk(KERN_INFO
2465 "ata%u: dev %u class mismatch %d != %d\n",
2466 ap->id, dev->devno, dev->class, new_class);
2467 return 0;
2468 }
2469
2470 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2471 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2472 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2473 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2474 new_n_sectors = ata_id_n_sectors(new_id);
2475
2476 if (strcmp(model[0], model[1])) {
2477 printk(KERN_INFO
2478 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2479 ap->id, dev->devno, model[0], model[1]);
2480 return 0;
2481 }
2482
2483 if (strcmp(serial[0], serial[1])) {
2484 printk(KERN_INFO
2485 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2486 ap->id, dev->devno, serial[0], serial[1]);
2487 return 0;
2488 }
2489
2490 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2491 printk(KERN_INFO
2492 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2493 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2494 (unsigned long long)new_n_sectors);
2495 return 0;
2496 }
2497
2498 return 1;
2499}
2500
2501/**
2502 * ata_dev_revalidate - Revalidate ATA device
2503 * @ap: port on which the device to revalidate resides
2504 * @dev: device to revalidate
2505 * @post_reset: is this revalidation after reset?
2506 *
2507 * Re-read IDENTIFY page and make sure @dev is still attached to
2508 * the port.
2509 *
2510 * LOCKING:
2511 * Kernel thread context (may sleep)
2512 *
2513 * RETURNS:
2514 * 0 on success, negative errno otherwise
2515 */
2516int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2517 int post_reset)
2518{
2519 unsigned int class;
2520 u16 *id;
2521 int rc;
2522
2523 if (!ata_dev_present(dev))
2524 return -ENODEV;
2525
2526 class = dev->class;
2527 id = NULL;
2528
2529 /* allocate & read ID data */
2530 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2531 if (rc)
2532 goto fail;
2533
2534 /* is the device still there? */
2535 if (!ata_dev_same_device(ap, dev, class, id)) {
2536 rc = -ENODEV;
2537 goto fail;
2538 }
2539
2540 kfree(dev->id);
2541 dev->id = id;
2542
2543 /* configure device according to the new ID */
2544 return ata_dev_configure(ap, dev, 0);
2545
2546 fail:
2547 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2548 ap->id, dev->devno, rc);
2549 kfree(id);
2550 return rc;
2551}
2552
98ac62de 2553static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2554 "WDC AC11000H",
2555 "WDC AC22100H",
2556 "WDC AC32500H",
2557 "WDC AC33100H",
2558 "WDC AC31600H",
2559 "WDC AC32100H",
2560 "WDC AC23200L",
2561 "Compaq CRD-8241B",
2562 "CRD-8400B",
2563 "CRD-8480B",
2564 "CRD-8482B",
2565 "CRD-84",
2566 "SanDisk SDP3B",
2567 "SanDisk SDP3B-64",
2568 "SANYO CD-ROM CRD",
2569 "HITACHI CDR-8",
2570 "HITACHI CDR-8335",
2571 "HITACHI CDR-8435",
2572 "Toshiba CD-ROM XM-6202B",
e922256a 2573 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2574 "CD-532E-A",
2575 "E-IDE CD-ROM CR-840",
2576 "CD-ROM Drive/F5A",
2577 "WPI CDD-820",
2578 "SAMSUNG CD-ROM SC-148C",
2579 "SAMSUNG CD-ROM SC",
2580 "SanDisk SDP3B-64",
1da177e4
LT		 2581 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2582 "_NEC DV5800A",
2583};
2584
057ace5e 2585static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2586{
2e02671d 2587 unsigned char model_num[41];
1da177e4
LT		 2588 int i;
2589
6a62a04d 2590 ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num));
1da177e4
LT		 2591
2592 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2593 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2594 return 1;
2595
2596 return 0;
2597}
2598
a6d5a51c
TH		 2599/**
2600 * ata_dev_xfermask - Compute supported xfermask of the given device
2601 * @ap: Port on which the device to compute xfermask for resides
2602 * @dev: Device to compute xfermask for
2603 *
2604 * Compute supported xfermask of @dev. This function is
2605 * responsible for applying all known limits including host
2606 * controller limits, device blacklist, etc...
2607 *
2608 * LOCKING:
2609 * None.
2610 *
2611 * RETURNS:
2612 * Computed xfermask.
2613 */
2614static unsigned int ata_dev_xfermask(struct ata_port *ap,
2615 struct ata_device *dev)
1da177e4 2616{
a6d5a51c
TH		 2617 unsigned long xfer_mask;
2618 int i;
1da177e4 2619
a6d5a51c
TH		 2620 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2621 ap->udma_mask);
1da177e4 2622
a6d5a51c
TH		 2623 /* use port-wide xfermask for now */
2624 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2625 struct ata_device *d = &ap->device[i];
2626 if (!ata_dev_present(d))
2627 continue;
2628 xfer_mask &= ata_id_xfermask(d->id);
2629 if (ata_dma_blacklisted(d))
2630 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2631 }
2632
a6d5a51c
TH		 2633 if (ata_dma_blacklisted(dev))
2634 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2635 "disabling DMA\n", ap->id, dev->devno);
2636
2637 return xfer_mask;
1da177e4
LT		 2638}
2639
1da177e4
LT		 2640/**
2641 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2642 * @ap: Port associated with device @dev
2643 * @dev: Device to which command will be sent
2644 *
780a87f7
JG		 2645 * Issue SET FEATURES - XFER MODE command to device @dev
2646 * on port @ap.
2647 *
1da177e4 2648 * LOCKING:
0cba632b 2649 * PCI/etc. bus probe sem.
1da177e4
LT		 2650 */
2651
2652static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2653{
a0123703 2654 struct ata_taskfile tf;
1da177e4
LT		 2655
2656 /* set up set-features taskfile */
2657 DPRINTK("set features - xfer mode\n");
2658
a0123703
TH		 2659 ata_tf_init(ap, &tf, dev->devno);
2660 tf.command = ATA_CMD_SET_FEATURES;
2661 tf.feature = SETFEATURES_XFER;
2662 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2663 tf.protocol = ATA_PROT_NODATA;
2664 tf.nsect = dev->xfer_mode;
1da177e4 2665
a0123703
TH		 2666 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2667 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2668 ap->id);
1da177e4 2669 ata_port_disable(ap);
a0123703 2670 }
1da177e4
LT		 2671
2672 DPRINTK("EXIT\n");
2673}
2674
8bf62ece
AL		 2675/**
2676 * ata_dev_init_params - Issue INIT DEV PARAMS command
2677 * @ap: Port associated with device @dev
2678 * @dev: Device to which command will be sent
2679 *
2680 * LOCKING:
6aff8f1f
TH		 2681 * Kernel thread context (may sleep)
2682 *
2683 * RETURNS:
2684 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2685 */
2686
6aff8f1f
TH		 2687static unsigned int ata_dev_init_params(struct ata_port *ap,
2688 struct ata_device *dev)
8bf62ece 2689{
a0123703 2690 struct ata_taskfile tf;
6aff8f1f 2691 unsigned int err_mask;
8bf62ece
AL		 2692 u16 sectors = dev->id[6];
2693 u16 heads = dev->id[3];
2694
2695 /* Number of sectors per track 1-255. Number of heads 1-16 */
2696 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
6aff8f1f 2697 return 0;
8bf62ece
AL		 2698
2699 /* set up init dev params taskfile */
2700 DPRINTK("init dev params \n");
2701
a0123703
TH		 2702 ata_tf_init(ap, &tf, dev->devno);
2703 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2704 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2705 tf.protocol = ATA_PROT_NODATA;
2706 tf.nsect = sectors;
2707 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2708
6aff8f1f 2709 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2710
6aff8f1f
TH		 2711 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2712 return err_mask;
8bf62ece
AL		 2713}
2714
1da177e4 2715/**
0cba632b
JG		 2716 * ata_sg_clean - Unmap DMA memory associated with command
2717 * @qc: Command containing DMA memory to be released
2718 *
2719 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2720 *
2721 * LOCKING:
0cba632b 2722 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2723 */
2724
2725static void ata_sg_clean(struct ata_queued_cmd *qc)
2726{
2727 struct ata_port *ap = qc->ap;
cedc9a47 2728 struct scatterlist *sg = qc->__sg;
1da177e4 2729 int dir = qc->dma_dir;
cedc9a47 2730 void *pad_buf = NULL;
1da177e4 2731
a4631474
TH		 2732 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2733 WARN_ON(sg == NULL);
1da177e4
LT		 2734
2735 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2736 WARN_ON(qc->n_elem > 1);
1da177e4 2737
2c13b7ce 2738 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2739
cedc9a47
JG		 2740 /* if we padded the buffer out to 32-bit bound, and data
2741 * xfer direction is from-device, we must copy from the
2742 * pad buffer back into the supplied buffer
2743 */
2744 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2745 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2746
2747 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2748 if (qc->n_elem)
2749 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2750 /* restore last sg */
2751 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2752 if (pad_buf) {
2753 struct scatterlist *psg = &qc->pad_sgent;
2754 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2755 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2756 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2757 }
2758 } else {
2e242fa9 2759 if (qc->n_elem)
e1410f2d
JG		 2760 dma_unmap_single(ap->host_set->dev,
2761 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2762 dir);
cedc9a47
JG		 2763 /* restore sg */
2764 sg->length += qc->pad_len;
2765 if (pad_buf)
2766 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2767 pad_buf, qc->pad_len);
2768 }
1da177e4
LT		 2769
2770 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2771 qc->__sg = NULL;
1da177e4
LT		 2772}
2773
2774/**
2775 * ata_fill_sg - Fill PCI IDE PRD table
2776 * @qc: Metadata associated with taskfile to be transferred
2777 *
780a87f7
JG		 2778 * Fill PCI IDE PRD (scatter-gather) table with segments
2779 * associated with the current disk command.
2780 *
1da177e4 2781 * LOCKING:
780a87f7 2782 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2783 *
2784 */
2785static void ata_fill_sg(struct ata_queued_cmd *qc)
2786{
1da177e4 2787 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2788 struct scatterlist *sg;
2789 unsigned int idx;
1da177e4 2790
a4631474 2791 WARN_ON(qc->__sg == NULL);
f131883e 2792 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2793
2794 idx = 0;
cedc9a47 2795 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2796 u32 addr, offset;
2797 u32 sg_len, len;
2798
2799 /* determine if physical DMA addr spans 64K boundary.
2800 * Note h/w doesn't support 64-bit, so we unconditionally
2801 * truncate dma_addr_t to u32.
2802 */
2803 addr = (u32) sg_dma_address(sg);
2804 sg_len = sg_dma_len(sg);
2805
2806 while (sg_len) {
2807 offset = addr & 0xffff;
2808 len = sg_len;
2809 if ((offset + sg_len) > 0x10000)
2810 len = 0x10000 - offset;
2811
2812 ap->prd[idx].addr = cpu_to_le32(addr);
2813 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2814 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2815
2816 idx++;
2817 sg_len -= len;
2818 addr += len;
2819 }
2820 }
2821
2822 if (idx)
2823 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2824}
2825/**
2826 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2827 * @qc: Metadata associated with taskfile to check
2828 *
780a87f7
JG		 2829 * Allow low-level driver to filter ATA PACKET commands, returning
2830 * a status indicating whether or not it is OK to use DMA for the
2831 * supplied PACKET command.
2832 *
1da177e4 2833 * LOCKING:
0cba632b
JG		 2834 * spin_lock_irqsave(host_set lock)
2835 *
1da177e4
LT		 2836 * RETURNS: 0 when ATAPI DMA can be used
2837 * nonzero otherwise
2838 */
2839int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2840{
2841 struct ata_port *ap = qc->ap;
2842 int rc = 0; /* Assume ATAPI DMA is OK by default */
2843
2844 if (ap->ops->check_atapi_dma)
2845 rc = ap->ops->check_atapi_dma(qc);
2846
2847 return rc;
2848}
2849/**
2850 * ata_qc_prep - Prepare taskfile for submission
2851 * @qc: Metadata associated with taskfile to be prepared
2852 *
780a87f7
JG		 2853 * Prepare ATA taskfile for submission.
2854 *
1da177e4
LT		 2855 * LOCKING:
2856 * spin_lock_irqsave(host_set lock)
2857 */
2858void ata_qc_prep(struct ata_queued_cmd *qc)
2859{
2860 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2861 return;
2862
2863 ata_fill_sg(qc);
2864}
2865
0cba632b
JG		 2866/**
2867 * ata_sg_init_one - Associate command with memory buffer
2868 * @qc: Command to be associated
2869 * @buf: Memory buffer
2870 * @buflen: Length of memory buffer, in bytes.
2871 *
2872 * Initialize the data-related elements of queued_cmd @qc
2873 * to point to a single memory buffer, @buf of byte length @buflen.
2874 *
2875 * LOCKING:
2876 * spin_lock_irqsave(host_set lock)
2877 */
2878
1da177e4
LT		 2879void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2880{
2881 struct scatterlist *sg;
2882
2883 qc->flags |= ATA_QCFLAG_SINGLE;
2884
2885 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2886 qc->__sg = &qc->sgent;
1da177e4 2887 qc->n_elem = 1;
cedc9a47 2888 qc->orig_n_elem = 1;
1da177e4
LT		 2889 qc->buf_virt = buf;
2890
cedc9a47 2891 sg = qc->__sg;
f0612bbc 2892 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2893}
2894
0cba632b
JG		 2895/**
2896 * ata_sg_init - Associate command with scatter-gather table.
2897 * @qc: Command to be associated
2898 * @sg: Scatter-gather table.
2899 * @n_elem: Number of elements in s/g table.
2900 *
2901 * Initialize the data-related elements of queued_cmd @qc
2902 * to point to a scatter-gather table @sg, containing @n_elem
2903 * elements.
2904 *
2905 * LOCKING:
2906 * spin_lock_irqsave(host_set lock)
2907 */
2908
1da177e4
LT		 2909void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2910 unsigned int n_elem)
2911{
2912 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2913 qc->__sg = sg;
1da177e4 2914 qc->n_elem = n_elem;
cedc9a47 2915 qc->orig_n_elem = n_elem;
1da177e4
LT		 2916}
2917
2918/**
0cba632b
JG		 2919 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2920 * @qc: Command with memory buffer to be mapped.
2921 *
2922 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2923 *
2924 * LOCKING:
2925 * spin_lock_irqsave(host_set lock)
2926 *
2927 * RETURNS:
0cba632b 2928 * Zero on success, negative on error.
1da177e4
LT		 2929 */
2930
2931static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2932{
2933 struct ata_port *ap = qc->ap;
2934 int dir = qc->dma_dir;
cedc9a47 2935 struct scatterlist *sg = qc->__sg;
1da177e4 2936 dma_addr_t dma_address;
2e242fa9 2937 int trim_sg = 0;
1da177e4 2938
cedc9a47
JG		 2939 /* we must lengthen transfers to end on a 32-bit boundary */
2940 qc->pad_len = sg->length & 3;
2941 if (qc->pad_len) {
2942 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2943 struct scatterlist *psg = &qc->pad_sgent;
2944
a4631474 2945 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2946
2947 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2948
2949 if (qc->tf.flags & ATA_TFLAG_WRITE)
2950 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2951 qc->pad_len);
2952
2953 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2954 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2955 /* trim sg */
2956 sg->length -= qc->pad_len;
2e242fa9
TH		 2957 if (sg->length == 0)
2958 trim_sg = 1;
cedc9a47
JG		 2959
2960 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2961 sg->length, qc->pad_len);
2962 }
2963
2e242fa9
TH		 2964 if (trim_sg) {
2965 qc->n_elem--;
e1410f2d
JG		 2966 goto skip_map;
2967 }
2968
1da177e4 2969 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2970 sg->length, dir);
537a95d9
TH		 2971 if (dma_mapping_error(dma_address)) {
2972 /* restore sg */
2973 sg->length += qc->pad_len;
1da177e4 2974 return -1;
537a95d9 2975 }
1da177e4
LT		 2976
2977 sg_dma_address(sg) = dma_address;
32529e01 2978 sg_dma_len(sg) = sg->length;
1da177e4 2979
2e242fa9 2980skip_map:
1da177e4
LT		 2981 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2982 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2983
2984 return 0;
2985}
2986
2987/**
0cba632b
JG		 2988 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2989 * @qc: Command with scatter-gather table to be mapped.
2990 *
2991 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2992 *
2993 * LOCKING:
2994 * spin_lock_irqsave(host_set lock)
2995 *
2996 * RETURNS:
0cba632b 2997 * Zero on success, negative on error.
1da177e4
LT		 2998 *
2999 */
3000
3001static int ata_sg_setup(struct ata_queued_cmd *qc)
3002{
3003 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3004 struct scatterlist *sg = qc->__sg;
3005 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3006 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3007
3008 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3009 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3010
cedc9a47
JG		 3011 /* we must lengthen transfers to end on a 32-bit boundary */
3012 qc->pad_len = lsg->length & 3;
3013 if (qc->pad_len) {
3014 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3015 struct scatterlist *psg = &qc->pad_sgent;
3016 unsigned int offset;
3017
a4631474 3018 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3019
3020 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3021
3022 /*
3023 * psg->page/offset are used to copy to-be-written
3024 * data in this function or read data in ata_sg_clean.
3025 */
3026 offset = lsg->offset + lsg->length - qc->pad_len;
3027 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3028 psg->offset = offset_in_page(offset);
3029
3030 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3031 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3032 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3033 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3034 }
3035
3036 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3037 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3038 /* trim last sg */
3039 lsg->length -= qc->pad_len;
e1410f2d
JG		 3040 if (lsg->length == 0)
3041 trim_sg = 1;
cedc9a47
JG		 3042
3043 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3044 qc->n_elem - 1, lsg->length, qc->pad_len);
3045 }
3046
e1410f2d
JG		 3047 pre_n_elem = qc->n_elem;
3048 if (trim_sg && pre_n_elem)
3049 pre_n_elem--;
3050
3051 if (!pre_n_elem) {
3052 n_elem = 0;
3053 goto skip_map;
3054 }
3055
1da177e4 3056 dir = qc->dma_dir;
e1410f2d 3057 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3058 if (n_elem < 1) {
3059 /* restore last sg */
3060 lsg->length += qc->pad_len;
1da177e4 3061 return -1;
537a95d9 3062 }
1da177e4
LT		 3063
3064 DPRINTK("%d sg elements mapped\n", n_elem);
3065
e1410f2d 3066skip_map:
1da177e4
LT		 3067 qc->n_elem = n_elem;
3068
3069 return 0;
3070}
3071
40e8c82c
TH		 3072/**
3073 * ata_poll_qc_complete - turn irq back on and finish qc
3074 * @qc: Command to complete
8e8b77dd 3075 * @err_mask: ATA status register content
40e8c82c
TH		 3076 *
3077 * LOCKING:
3078 * None. (grabs host lock)
3079 */
3080
a22e2eb0 3081void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3082{
3083 struct ata_port *ap = qc->ap;
b8f6153e 3084 unsigned long flags;
40e8c82c 3085
b8f6153e 3086 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3087 ap->flags &= ~ATA_FLAG_NOINTR;
3088 ata_irq_on(ap);
a22e2eb0 3089 ata_qc_complete(qc);
b8f6153e 3090 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3091}
3092
1da177e4 3093/**
c893a3ae 3094 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3095 * @ap: the target ata_port
1da177e4
LT		 3096 *
3097 * LOCKING:
0cba632b 3098 * None. (executing in kernel thread context)
1da177e4
LT		 3099 *
3100 * RETURNS:
6f0ef4fa 3101 * timeout value to use
1da177e4
LT		 3102 */
3103
3104static unsigned long ata_pio_poll(struct ata_port *ap)
3105{
c14b8331 3106 struct ata_queued_cmd *qc;
1da177e4 3107 u8 status;
14be71f4
AL		 3108 unsigned int poll_state = HSM_ST_UNKNOWN;
3109 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3110
c14b8331 3111 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3112 WARN_ON(qc == NULL);
c14b8331 3113
14be71f4
AL		 3114 switch (ap->hsm_task_state) {
3115 case HSM_ST:
3116 case HSM_ST_POLL:
3117 poll_state = HSM_ST_POLL;
3118 reg_state = HSM_ST;
1da177e4 3119 break;
14be71f4
AL		 3120 case HSM_ST_LAST:
3121 case HSM_ST_LAST_POLL:
3122 poll_state = HSM_ST_LAST_POLL;
3123 reg_state = HSM_ST_LAST;
1da177e4
LT		 3124 break;
3125 default:
3126 BUG();
3127 break;
3128 }
3129
3130 status = ata_chk_status(ap);
3131 if (status & ATA_BUSY) {
3132 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3133 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3134 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3135 return 0;
3136 }
14be71f4 3137 ap->hsm_task_state = poll_state;
1da177e4
LT		 3138 return ATA_SHORT_PAUSE;
3139 }
3140
14be71f4 3141 ap->hsm_task_state = reg_state;
1da177e4
LT		 3142 return 0;
3143}
3144
3145/**
6f0ef4fa
RD		 3146 * ata_pio_complete - check if drive is busy or idle
3147 * @ap: the target ata_port
1da177e4
LT		 3148 *
3149 * LOCKING:
0cba632b 3150 * None. (executing in kernel thread context)
7fb6ec28
JG		 3151 *
3152 * RETURNS:
3153 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3154 */
3155
7fb6ec28 3156static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3157{
3158 struct ata_queued_cmd *qc;
3159 u8 drv_stat;
3160
3161 /*
31433ea3
AC		 3162 * This is purely heuristic. This is a fast path. Sometimes when
3163 * we enter, BSY will be cleared in a chk-status or two. If not,
3164 * the drive is probably seeking or something. Snooze for a couple
3165 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3166 * HSM_ST_POLL state.
1da177e4 3167 */
fe79e683
AL		 3168 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3169 if (drv_stat & ATA_BUSY) {
1da177e4 3170 msleep(2);
fe79e683
AL		 3171 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3172 if (drv_stat & ATA_BUSY) {
14be71f4 3173 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3174 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3175 return 0;
1da177e4
LT		 3176 }
3177 }
3178
c14b8331 3179 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3180 WARN_ON(qc == NULL);
c14b8331 3181
1da177e4
LT		 3182 drv_stat = ata_wait_idle(ap);
3183 if (!ata_ok(drv_stat)) {
1c848984 3184 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3185 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3186 return 0;
1da177e4
LT		 3187 }
3188
14be71f4 3189 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3190
a4631474 3191 WARN_ON(qc->err_mask);
a22e2eb0 3192 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3193
3194 /* another command may start at this point */
3195
3196 return 1;
1da177e4
LT		 3197}
3198
0baab86b
EF		 3199
3200/**
c893a3ae 3201 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3202 * @buf: Buffer to swap
3203 * @buf_words: Number of 16-bit words in buffer.
3204 *
3205 * Swap halves of 16-bit words if needed to convert from
3206 * little-endian byte order to native cpu byte order, or
3207 * vice-versa.
3208 *
3209 * LOCKING:
6f0ef4fa 3210 * Inherited from caller.
0baab86b 3211 */
1da177e4
LT		 3212void swap_buf_le16(u16 *buf, unsigned int buf_words)
3213{
3214#ifdef __BIG_ENDIAN
3215 unsigned int i;
3216
3217 for (i = 0; i < buf_words; i++)
3218 buf[i] = le16_to_cpu(buf[i]);
3219#endif /* __BIG_ENDIAN */
3220}
3221
6ae4cfb5
AL		 3222/**
3223 * ata_mmio_data_xfer - Transfer data by MMIO
3224 * @ap: port to read/write
3225 * @buf: data buffer
3226 * @buflen: buffer length
344babaa 3227 * @write_data: read/write
6ae4cfb5
AL		 3228 *
3229 * Transfer data from/to the device data register by MMIO.
3230 *
3231 * LOCKING:
3232 * Inherited from caller.
6ae4cfb5
AL		 3233 */
3234
1da177e4
LT		 3235static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3236 unsigned int buflen, int write_data)
3237{
3238 unsigned int i;
3239 unsigned int words = buflen >> 1;
3240 u16 *buf16 = (u16 *) buf;
3241 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3242
6ae4cfb5 3243 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3244 if (write_data) {
3245 for (i = 0; i < words; i++)
3246 writew(le16_to_cpu(buf16[i]), mmio);
3247 } else {
3248 for (i = 0; i < words; i++)
3249 buf16[i] = cpu_to_le16(readw(mmio));
3250 }
6ae4cfb5
AL		 3251
3252 /* Transfer trailing 1 byte, if any. */
3253 if (unlikely(buflen & 0x01)) {
3254 u16 align_buf[1] = { 0 };
3255 unsigned char *trailing_buf = buf + buflen - 1;
3256
3257 if (write_data) {
3258 memcpy(align_buf, trailing_buf, 1);
3259 writew(le16_to_cpu(align_buf[0]), mmio);
3260 } else {
3261 align_buf[0] = cpu_to_le16(readw(mmio));
3262 memcpy(trailing_buf, align_buf, 1);
3263 }
3264 }
1da177e4
LT		 3265}
3266
6ae4cfb5
AL		 3267/**
3268 * ata_pio_data_xfer - Transfer data by PIO
3269 * @ap: port to read/write
3270 * @buf: data buffer
3271 * @buflen: buffer length
344babaa 3272 * @write_data: read/write
6ae4cfb5
AL		 3273 *
3274 * Transfer data from/to the device data register by PIO.
3275 *
3276 * LOCKING:
3277 * Inherited from caller.
6ae4cfb5
AL		 3278 */
3279
1da177e4
LT		 3280static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3281 unsigned int buflen, int write_data)
3282{
6ae4cfb5 3283 unsigned int words = buflen >> 1;
1da177e4 3284
6ae4cfb5 3285 /* Transfer multiple of 2 bytes */
1da177e4 3286 if (write_data)
6ae4cfb5 3287 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3288 else
6ae4cfb5
AL		 3289 insw(ap->ioaddr.data_addr, buf, words);
3290
3291 /* Transfer trailing 1 byte, if any. */
3292 if (unlikely(buflen & 0x01)) {
3293 u16 align_buf[1] = { 0 };
3294 unsigned char *trailing_buf = buf + buflen - 1;
3295
3296 if (write_data) {
3297 memcpy(align_buf, trailing_buf, 1);
3298 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3299 } else {
3300 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3301 memcpy(trailing_buf, align_buf, 1);
3302 }
3303 }
1da177e4
LT		 3304}
3305
6ae4cfb5
AL		 3306/**
3307 * ata_data_xfer - Transfer data from/to the data register.
3308 * @ap: port to read/write
3309 * @buf: data buffer
3310 * @buflen: buffer length
3311 * @do_write: read/write
3312 *
3313 * Transfer data from/to the device data register.
3314 *
3315 * LOCKING:
3316 * Inherited from caller.
6ae4cfb5
AL		 3317 */
3318
1da177e4
LT		 3319static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3320 unsigned int buflen, int do_write)
3321{
a1bd9e68
AC		 3322 /* Make the crap hardware pay the costs not the good stuff */
3323 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3324 unsigned long flags;
3325 local_irq_save(flags);
3326 if (ap->flags & ATA_FLAG_MMIO)
3327 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3328 else
3329 ata_pio_data_xfer(ap, buf, buflen, do_write);
3330 local_irq_restore(flags);
3331 } else {
3332 if (ap->flags & ATA_FLAG_MMIO)
3333 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3334 else
3335 ata_pio_data_xfer(ap, buf, buflen, do_write);
3336 }
1da177e4
LT		 3337}
3338
6ae4cfb5
AL		 3339/**
3340 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3341 * @qc: Command on going
3342 *
3343 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3344 *
3345 * LOCKING:
3346 * Inherited from caller.
3347 */
3348
1da177e4
LT		 3349static void ata_pio_sector(struct ata_queued_cmd *qc)
3350{
3351 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3352 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3353 struct ata_port *ap = qc->ap;
3354 struct page *page;
3355 unsigned int offset;
3356 unsigned char *buf;
3357
3358 if (qc->cursect == (qc->nsect - 1))
14be71f4 3359 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3360
3361 page = sg[qc->cursg].page;
3362 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3363
3364 /* get the current page and offset */
3365 page = nth_page(page, (offset >> PAGE_SHIFT));
3366 offset %= PAGE_SIZE;
3367
3368 buf = kmap(page) + offset;
3369
3370 qc->cursect++;
3371 qc->cursg_ofs++;
3372
32529e01 3373 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3374 qc->cursg++;
3375 qc->cursg_ofs = 0;
3376 }
3377
3378 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3379
3380 /* do the actual data transfer */
3381 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3382 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3383
3384 kunmap(page);
3385}
3386
6ae4cfb5
AL		 3387/**
3388 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3389 * @qc: Command on going
3390 * @bytes: number of bytes
3391 *
3392 * Transfer Transfer data from/to the ATAPI device.
3393 *
3394 * LOCKING:
3395 * Inherited from caller.
3396 *
3397 */
3398
1da177e4
LT		 3399static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3400{
3401 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3402 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3403 struct ata_port *ap = qc->ap;
3404 struct page *page;
3405 unsigned char *buf;
3406 unsigned int offset, count;
3407
563a6e1f 3408 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3409 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3410
3411next_sg:
563a6e1f 3412 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3413 /*
563a6e1f
AL		 3414 * The end of qc->sg is reached and the device expects
3415 * more data to transfer. In order not to overrun qc->sg
3416 * and fulfill length specified in the byte count register,
3417 * - for read case, discard trailing data from the device
3418 * - for write case, padding zero data to the device
3419 */
3420 u16 pad_buf[1] = { 0 };
3421 unsigned int words = bytes >> 1;
3422 unsigned int i;
3423
3424 if (words) /* warning if bytes > 1 */
7fb6ec28 3425 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3426 ap->id, bytes);
3427
3428 for (i = 0; i < words; i++)
3429 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3430
14be71f4 3431 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3432 return;
3433 }
3434
cedc9a47 3435 sg = &qc->__sg[qc->cursg];
1da177e4 3436
1da177e4
LT		 3437 page = sg->page;
3438 offset = sg->offset + qc->cursg_ofs;
3439
3440 /* get the current page and offset */
3441 page = nth_page(page, (offset >> PAGE_SHIFT));
3442 offset %= PAGE_SIZE;
3443
6952df03 3444 /* don't overrun current sg */
32529e01 3445 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3446
3447 /* don't cross page boundaries */
3448 count = min(count, (unsigned int)PAGE_SIZE - offset);
3449
3450 buf = kmap(page) + offset;
3451
3452 bytes -= count;
3453 qc->curbytes += count;
3454 qc->cursg_ofs += count;
3455
32529e01 3456 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3457 qc->cursg++;
3458 qc->cursg_ofs = 0;
3459 }
3460
3461 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3462
3463 /* do the actual data transfer */
3464 ata_data_xfer(ap, buf, count, do_write);
3465
3466 kunmap(page);
3467
563a6e1f 3468 if (bytes)
1da177e4 3469 goto next_sg;
1da177e4
LT		 3470}
3471
6ae4cfb5
AL		 3472/**
3473 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3474 * @qc: Command on going
3475 *
3476 * Transfer Transfer data from/to the ATAPI device.
3477 *
3478 * LOCKING:
3479 * Inherited from caller.
6ae4cfb5
AL		 3480 */
3481
1da177e4
LT		 3482static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3483{
3484 struct ata_port *ap = qc->ap;
3485 struct ata_device *dev = qc->dev;
3486 unsigned int ireason, bc_lo, bc_hi, bytes;
3487 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3488
3489 ap->ops->tf_read(ap, &qc->tf);
3490 ireason = qc->tf.nsect;
3491 bc_lo = qc->tf.lbam;
3492 bc_hi = qc->tf.lbah;
3493 bytes = (bc_hi << 8) | bc_lo;
3494
3495 /* shall be cleared to zero, indicating xfer of data */
3496 if (ireason & (1 << 0))
3497 goto err_out;
3498
3499 /* make sure transfer direction matches expected */
3500 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3501 if (do_write != i_write)
3502 goto err_out;
3503
3504 __atapi_pio_bytes(qc, bytes);
3505
3506 return;
3507
3508err_out:
3509 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3510 ap->id, dev->devno);
11a56d24 3511 qc->err_mask |= AC_ERR_HSM;
14be71f4 3512 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3513}
3514
3515/**
6f0ef4fa
RD		 3516 * ata_pio_block - start PIO on a block
3517 * @ap: the target ata_port
1da177e4
LT		 3518 *
3519 * LOCKING:
0cba632b 3520 * None. (executing in kernel thread context)
1da177e4
LT		 3521 */
3522
3523static void ata_pio_block(struct ata_port *ap)
3524{
3525 struct ata_queued_cmd *qc;
3526 u8 status;
3527
3528 /*
6f0ef4fa 3529 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3530 * Sometimes when we enter, BSY will be cleared in
3531 * a chk-status or two. If not, the drive is probably seeking
3532 * or something. Snooze for a couple msecs, then
3533 * chk-status again. If still busy, fall back to
14be71f4 3534 * HSM_ST_POLL state.
1da177e4
LT		 3535 */
3536 status = ata_busy_wait(ap, ATA_BUSY, 5);
3537 if (status & ATA_BUSY) {
3538 msleep(2);
3539 status = ata_busy_wait(ap, ATA_BUSY, 10);
3540 if (status & ATA_BUSY) {
14be71f4 3541 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3542 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3543 return;
3544 }
3545 }
3546
3547 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3548 WARN_ON(qc == NULL);
1da177e4 3549
fe79e683
AL		 3550 /* check error */
3551 if (status & (ATA_ERR | ATA_DF)) {
3552 qc->err_mask |= AC_ERR_DEV;
3553 ap->hsm_task_state = HSM_ST_ERR;
3554 return;
3555 }
3556
3557 /* transfer data if any */
1da177e4 3558 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3559 /* DRQ=0 means no more data to transfer */
1da177e4 3560 if ((status & ATA_DRQ) == 0) {
14be71f4 3561 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3562 return;
3563 }
3564
3565 atapi_pio_bytes(qc);
3566 } else {
3567 /* handle BSY=0, DRQ=0 as error */
3568 if ((status & ATA_DRQ) == 0) {
11a56d24 3569 qc->err_mask |= AC_ERR_HSM;
14be71f4 3570 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3571 return;
3572 }
3573
3574 ata_pio_sector(qc);
3575 }
3576}
3577
3578static void ata_pio_error(struct ata_port *ap)
3579{
3580 struct ata_queued_cmd *qc;
a7dac447 3581
1da177e4 3582 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3583 WARN_ON(qc == NULL);
1da177e4 3584
0565c26d
AL		 3585 if (qc->tf.command != ATA_CMD_PACKET)
3586 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3587
1c848984
AL		 3588 /* make sure qc->err_mask is available to
3589 * know what's wrong and recover
3590 */
a4631474 3591 WARN_ON(qc->err_mask == 0);
1c848984 3592
14be71f4 3593 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3594
a22e2eb0 3595 ata_poll_qc_complete(qc);
1da177e4
LT		 3596}
3597
3598static void ata_pio_task(void *_data)
3599{
3600 struct ata_port *ap = _data;
7fb6ec28
JG		 3601 unsigned long timeout;
3602 int qc_completed;
3603
3604fsm_start:
3605 timeout = 0;
3606 qc_completed = 0;
1da177e4 3607
14be71f4
AL		 3608 switch (ap->hsm_task_state) {
3609 case HSM_ST_IDLE:
1da177e4
LT		 3610 return;
3611
14be71f4 3612 case HSM_ST:
1da177e4
LT		 3613 ata_pio_block(ap);
3614 break;
3615
14be71f4 3616 case HSM_ST_LAST:
7fb6ec28 3617 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3618 break;
3619
14be71f4
AL		 3620 case HSM_ST_POLL:
3621 case HSM_ST_LAST_POLL:
1da177e4
LT		 3622 timeout = ata_pio_poll(ap);
3623 break;
3624
14be71f4
AL		 3625 case HSM_ST_TMOUT:
3626 case HSM_ST_ERR:
1da177e4
LT		 3627 ata_pio_error(ap);
3628 return;
3629 }
3630
3631 if (timeout)
8061f5f0 3632 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3633 else if (!qc_completed)
3634 goto fsm_start;
1da177e4
LT		 3635}
3636
8061f5f0
TH		 3637/**
3638 * atapi_packet_task - Write CDB bytes to hardware
3639 * @_data: Port to which ATAPI device is attached.
3640 *
3641 * When device has indicated its readiness to accept
3642 * a CDB, this function is called. Send the CDB.
3643 * If DMA is to be performed, exit immediately.
3644 * Otherwise, we are in polling mode, so poll
3645 * status under operation succeeds or fails.
3646 *
3647 * LOCKING:
3648 * Kernel thread context (may sleep)
3649 */
3650
3651static void atapi_packet_task(void *_data)
3652{
3653 struct ata_port *ap = _data;
3654 struct ata_queued_cmd *qc;
3655 u8 status;
3656
3657 qc = ata_qc_from_tag(ap, ap->active_tag);
3658 WARN_ON(qc == NULL);
3659 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3660
3661 /* sleep-wait for BSY to clear */
3662 DPRINTK("busy wait\n");
3663 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3664 qc->err_mask |= AC_ERR_TIMEOUT;
3665 goto err_out;
3666 }
3667
3668 /* make sure DRQ is set */
3669 status = ata_chk_status(ap);
3670 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3671 qc->err_mask |= AC_ERR_HSM;
3672 goto err_out;
3673 }
3674
3675 /* send SCSI cdb */
3676 DPRINTK("send cdb\n");
3677 WARN_ON(qc->dev->cdb_len < 12);
3678
3679 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3680 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3681 unsigned long flags;
3682
3683 /* Once we're done issuing command and kicking bmdma,
3684 * irq handler takes over. To not lose irq, we need
3685 * to clear NOINTR flag before sending cdb, but
3686 * interrupt handler shouldn't be invoked before we're
3687 * finished. Hence, the following locking.
3688 */
3689 spin_lock_irqsave(&ap->host_set->lock, flags);
3690 ap->flags &= ~ATA_FLAG_NOINTR;
3691 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3692 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3693 ap->ops->bmdma_start(qc); /* initiate bmdma */
3694 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3695 } else {
3696 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3697
3698 /* PIO commands are handled by polling */
3699 ap->hsm_task_state = HSM_ST;
3700 ata_port_queue_task(ap, ata_pio_task, ap, 0);
3701 }
3702
3703 return;
3704
3705err_out:
3706 ata_poll_qc_complete(qc);
3707}
3708
1da177e4
LT		 3709/**
3710 * ata_qc_timeout - Handle timeout of queued command
3711 * @qc: Command that timed out
3712 *
3713 * Some part of the kernel (currently, only the SCSI layer)
3714 * has noticed that the active command on port @ap has not
3715 * completed after a specified length of time. Handle this
3716 * condition by disabling DMA (if necessary) and completing
3717 * transactions, with error if necessary.
3718 *
3719 * This also handles the case of the "lost interrupt", where
3720 * for some reason (possibly hardware bug, possibly driver bug)
3721 * an interrupt was not delivered to the driver, even though the
3722 * transaction completed successfully.
3723 *
3724 * LOCKING:
0cba632b 3725 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3726 */
3727
3728static void ata_qc_timeout(struct ata_queued_cmd *qc)
3729{
3730 struct ata_port *ap = qc->ap;
b8f6153e 3731 struct ata_host_set *host_set = ap->host_set;
1da177e4 3732 u8 host_stat = 0, drv_stat;
b8f6153e 3733 unsigned long flags;
1da177e4
LT		 3734
3735 DPRINTK("ENTER\n");
3736
c18d06f8
TH		 3737 ap->hsm_task_state = HSM_ST_IDLE;
3738
b8f6153e
JG		 3739 spin_lock_irqsave(&host_set->lock, flags);
3740
1da177e4
LT		 3741 switch (qc->tf.protocol) {
3742
3743 case ATA_PROT_DMA:
3744 case ATA_PROT_ATAPI_DMA:
3745 host_stat = ap->ops->bmdma_status(ap);
3746
3747 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3748 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3749
3750 /* fall through */
3751
3752 default:
3753 ata_altstatus(ap);
3754 drv_stat = ata_chk_status(ap);
3755
3756 /* ack bmdma irq events */
3757 ap->ops->irq_clear(ap);
3758
3759 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3760 ap->id, qc->tf.command, drv_stat, host_stat);
3761
3762 /* complete taskfile transaction */
a22e2eb0 3763 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3764 break;
3765 }
b8f6153e
JG		 3766
3767 spin_unlock_irqrestore(&host_set->lock, flags);
3768
a72ec4ce
TH		 3769 ata_eh_qc_complete(qc);
3770
1da177e4
LT		 3771 DPRINTK("EXIT\n");
3772}
3773
3774/**
3775 * ata_eng_timeout - Handle timeout of queued command
3776 * @ap: Port on which timed-out command is active
3777 *
3778 * Some part of the kernel (currently, only the SCSI layer)
3779 * has noticed that the active command on port @ap has not
3780 * completed after a specified length of time. Handle this
3781 * condition by disabling DMA (if necessary) and completing
3782 * transactions, with error if necessary.
3783 *
3784 * This also handles the case of the "lost interrupt", where
3785 * for some reason (possibly hardware bug, possibly driver bug)
3786 * an interrupt was not delivered to the driver, even though the
3787 * transaction completed successfully.
3788 *
3789 * LOCKING:
3790 * Inherited from SCSI layer (none, can sleep)
3791 */
3792
3793void ata_eng_timeout(struct ata_port *ap)
3794{
1da177e4
LT		 3795 DPRINTK("ENTER\n");
3796
f6379020 3797 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3798
1da177e4
LT		 3799 DPRINTK("EXIT\n");
3800}
3801
3802/**
3803 * ata_qc_new - Request an available ATA command, for queueing
3804 * @ap: Port associated with device @dev
3805 * @dev: Device from whom we request an available command structure
3806 *
3807 * LOCKING:
0cba632b 3808 * None.
1da177e4
LT		 3809 */
3810
3811static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3812{
3813 struct ata_queued_cmd *qc = NULL;
3814 unsigned int i;
3815
3816 for (i = 0; i < ATA_MAX_QUEUE; i++)
3817 if (!test_and_set_bit(i, &ap->qactive)) {
3818 qc = ata_qc_from_tag(ap, i);
3819 break;
3820 }
3821
3822 if (qc)
3823 qc->tag = i;
3824
3825 return qc;
3826}
3827
3828/**
3829 * ata_qc_new_init - Request an available ATA command, and initialize it
3830 * @ap: Port associated with device @dev
3831 * @dev: Device from whom we request an available command structure
3832 *
3833 * LOCKING:
0cba632b 3834 * None.
1da177e4
LT		 3835 */
3836
3837struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3838 struct ata_device *dev)
3839{
3840 struct ata_queued_cmd *qc;
3841
3842 qc = ata_qc_new(ap);
3843 if (qc) {
1da177e4
LT		 3844 qc->scsicmd = NULL;
3845 qc->ap = ap;
3846 qc->dev = dev;
1da177e4 3847
2c13b7ce 3848 ata_qc_reinit(qc);
1da177e4
LT		 3849 }
3850
3851 return qc;
3852}
3853
1da177e4
LT		 3854/**
3855 * ata_qc_free - free unused ata_queued_cmd
3856 * @qc: Command to complete
3857 *
3858 * Designed to free unused ata_queued_cmd object
3859 * in case something prevents using it.
3860 *
3861 * LOCKING:
0cba632b 3862 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3863 */
3864void ata_qc_free(struct ata_queued_cmd *qc)
3865{
4ba946e9
TH		 3866 struct ata_port *ap = qc->ap;
3867 unsigned int tag;
3868
a4631474 3869 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3870
4ba946e9
TH		 3871 qc->flags = 0;
3872 tag = qc->tag;
3873 if (likely(ata_tag_valid(tag))) {
3874 if (tag == ap->active_tag)
3875 ap->active_tag = ATA_TAG_POISON;
3876 qc->tag = ATA_TAG_POISON;
3877 clear_bit(tag, &ap->qactive);
3878 }
1da177e4
LT		 3879}
3880
76014427 3881void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3882{
a4631474
TH		 3883 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3884 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3885
3886 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3887 ata_sg_clean(qc);
3888
3f3791d3
AL		 3889 /* atapi: mark qc as inactive to prevent the interrupt handler
3890 * from completing the command twice later, before the error handler
3891 * is called. (when rc != 0 and atapi request sense is needed)
3892 */
3893 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3894
1da177e4 3895 /* call completion callback */
77853bf2 3896 qc->complete_fn(qc);
1da177e4
LT		 3897}
3898
3899static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3900{
3901 struct ata_port *ap = qc->ap;
3902
3903 switch (qc->tf.protocol) {
3904 case ATA_PROT_DMA:
3905 case ATA_PROT_ATAPI_DMA:
3906 return 1;
3907
3908 case ATA_PROT_ATAPI:
3909 case ATA_PROT_PIO:
3910 case ATA_PROT_PIO_MULT:
3911 if (ap->flags & ATA_FLAG_PIO_DMA)
3912 return 1;
3913
3914 /* fall through */
3915
3916 default:
3917 return 0;
3918 }
3919
3920 /* never reached */
3921}
3922
3923/**
3924 * ata_qc_issue - issue taskfile to device
3925 * @qc: command to issue to device
3926 *
3927 * Prepare an ATA command to submission to device.
3928 * This includes mapping the data into a DMA-able
3929 * area, filling in the S/G table, and finally
3930 * writing the taskfile to hardware, starting the command.
3931 *
3932 * LOCKING:
3933 * spin_lock_irqsave(host_set lock)
3934 *
3935 * RETURNS:
9a3d9eb0 3936 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3937 */
3938
9a3d9eb0 3939unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3940{
3941 struct ata_port *ap = qc->ap;
3942
3943 if (ata_should_dma_map(qc)) {
3944 if (qc->flags & ATA_QCFLAG_SG) {
3945 if (ata_sg_setup(qc))
8e436af9 3946 goto sg_err;
1da177e4
LT		 3947 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3948 if (ata_sg_setup_one(qc))
8e436af9 3949 goto sg_err;
1da177e4
LT		 3950 }
3951 } else {
3952 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3953 }
3954
3955 ap->ops->qc_prep(qc);
3956
3957 qc->ap->active_tag = qc->tag;
3958 qc->flags |= ATA_QCFLAG_ACTIVE;
3959
3960 return ap->ops->qc_issue(qc);
3961
8e436af9
TH		 3962sg_err:
3963 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 3964 return AC_ERR_SYSTEM;
1da177e4
LT		 3965}
3966
0baab86b 3967
1da177e4
LT		 3968/**
3969 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3970 * @qc: command to issue to device
3971 *
3972 * Using various libata functions and hooks, this function
3973 * starts an ATA command. ATA commands are grouped into
3974 * classes called "protocols", and issuing each type of protocol
3975 * is slightly different.
3976 *
0baab86b
EF		 3977 * May be used as the qc_issue() entry in ata_port_operations.
3978 *
1da177e4
LT		 3979 * LOCKING:
3980 * spin_lock_irqsave(host_set lock)
3981 *
3982 * RETURNS:
9a3d9eb0 3983 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3984 */
3985
9a3d9eb0 3986unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 3987{
3988 struct ata_port *ap = qc->ap;
3989
3990 ata_dev_select(ap, qc->dev->devno, 1, 0);
3991
3992 switch (qc->tf.protocol) {
3993 case ATA_PROT_NODATA:
e5338254 3994 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 3995 break;
3996
3997 case ATA_PROT_DMA:
3998 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3999 ap->ops->bmdma_setup(qc); /* set up bmdma */
4000 ap->ops->bmdma_start(qc); /* initiate bmdma */
4001 break;
4002
4003 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4004 ata_qc_set_polling(qc);
e5338254 4005 ata_tf_to_host(ap, &qc->tf);
14be71f4 4006 ap->hsm_task_state = HSM_ST;
8061f5f0 4007 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4008 break;
4009
4010 case ATA_PROT_ATAPI:
4011 ata_qc_set_polling(qc);
e5338254 4012 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4013 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4014 break;
4015
4016 case ATA_PROT_ATAPI_NODATA:
c1389503 4017 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4018 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4019 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4020 break;
4021
4022 case ATA_PROT_ATAPI_DMA:
c1389503 4023 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4024 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4025 ap->ops->bmdma_setup(qc); /* set up bmdma */
8061f5f0 4026 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4027 break;
4028
4029 default:
4030 WARN_ON(1);
9a3d9eb0 4031 return AC_ERR_SYSTEM;
1da177e4
LT		 4032 }
4033
4034 return 0;
4035}
4036
4037/**
0baab86b 4038 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 4039 * @qc: Info associated with this ATA transaction.
4040 *
4041 * LOCKING:
4042 * spin_lock_irqsave(host_set lock)
4043 */
4044
4045static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
4046{
4047 struct ata_port *ap = qc->ap;
4048 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4049 u8 dmactl;
4050 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4051
4052 /* load PRD table addr. */
4053 mb(); /* make sure PRD table writes are visible to controller */
4054 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
4055
4056 /* specify data direction, triple-check start bit is clear */
4057 dmactl = readb(mmio + ATA_DMA_CMD);
4058 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4059 if (!rw)
4060 dmactl |= ATA_DMA_WR;
4061 writeb(dmactl, mmio + ATA_DMA_CMD);
4062
4063 /* issue r/w command */
4064 ap->ops->exec_command(ap, &qc->tf);
4065}
4066
4067/**
b73fc89f 4068 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 4069 * @qc: Info associated with this ATA transaction.
4070 *
4071 * LOCKING:
4072 * spin_lock_irqsave(host_set lock)
4073 */
4074
4075static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4076{
4077 struct ata_port *ap = qc->ap;
4078 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4079 u8 dmactl;
4080
4081 /* start host DMA transaction */
4082 dmactl = readb(mmio + ATA_DMA_CMD);
4083 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4084
4085 /* Strictly, one may wish to issue a readb() here, to
4086 * flush the mmio write. However, control also passes
4087 * to the hardware at this point, and it will interrupt
4088 * us when we are to resume control. So, in effect,
4089 * we don't care when the mmio write flushes.
4090 * Further, a read of the DMA status register _immediately_
4091 * following the write may not be what certain flaky hardware
4092 * is expected, so I think it is best to not add a readb()
4093 * without first all the MMIO ATA cards/mobos.
4094 * Or maybe I'm just being paranoid.
4095 */
4096}
4097
4098/**
4099 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4100 * @qc: Info associated with this ATA transaction.
4101 *
4102 * LOCKING:
4103 * spin_lock_irqsave(host_set lock)
4104 */
4105
4106static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4107{
4108 struct ata_port *ap = qc->ap;
4109 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4110 u8 dmactl;
4111
4112 /* load PRD table addr. */
4113 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4114
4115 /* specify data direction, triple-check start bit is clear */
4116 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4117 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4118 if (!rw)
4119 dmactl |= ATA_DMA_WR;
4120 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4121
4122 /* issue r/w command */
4123 ap->ops->exec_command(ap, &qc->tf);
4124}
4125
4126/**
4127 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4128 * @qc: Info associated with this ATA transaction.
4129 *
4130 * LOCKING:
4131 * spin_lock_irqsave(host_set lock)
4132 */
4133
4134static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4135{
4136 struct ata_port *ap = qc->ap;
4137 u8 dmactl;
4138
4139 /* start host DMA transaction */
4140 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4141 outb(dmactl | ATA_DMA_START,
4142 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4143}
4144
0baab86b
EF		 4145
4146/**
4147 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4148 * @qc: Info associated with this ATA transaction.
4149 *
4150 * Writes the ATA_DMA_START flag to the DMA command register.
4151 *
4152 * May be used as the bmdma_start() entry in ata_port_operations.
4153 *
4154 * LOCKING:
4155 * spin_lock_irqsave(host_set lock)
4156 */
1da177e4
LT		 4157void ata_bmdma_start(struct ata_queued_cmd *qc)
4158{
4159 if (qc->ap->flags & ATA_FLAG_MMIO)
4160 ata_bmdma_start_mmio(qc);
4161 else
4162 ata_bmdma_start_pio(qc);
4163}
4164
0baab86b
EF		 4165
4166/**
4167 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4168 * @qc: Info associated with this ATA transaction.
4169 *
4170 * Writes address of PRD table to device's PRD Table Address
4171 * register, sets the DMA control register, and calls
4172 * ops->exec_command() to start the transfer.
4173 *
4174 * May be used as the bmdma_setup() entry in ata_port_operations.
4175 *
4176 * LOCKING:
4177 * spin_lock_irqsave(host_set lock)
4178 */
1da177e4
LT		 4179void ata_bmdma_setup(struct ata_queued_cmd *qc)
4180{
4181 if (qc->ap->flags & ATA_FLAG_MMIO)
4182 ata_bmdma_setup_mmio(qc);
4183 else
4184 ata_bmdma_setup_pio(qc);
4185}
4186
0baab86b
EF		 4187
4188/**
4189 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 4190 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4191 *
4192 * Clear interrupt and error flags in DMA status register.
4193 *
4194 * May be used as the irq_clear() entry in ata_port_operations.
4195 *
4196 * LOCKING:
4197 * spin_lock_irqsave(host_set lock)
4198 */
4199
1da177e4
LT		 4200void ata_bmdma_irq_clear(struct ata_port *ap)
4201{
4202 if (ap->flags & ATA_FLAG_MMIO) {
4203 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4204 writeb(readb(mmio), mmio);
4205 } else {
4206 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4207 outb(inb(addr), addr);
4208 }
4209
4210}
4211
0baab86b
EF		 4212
4213/**
4214 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 4215 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4216 *
4217 * Read and return BMDMA status register.
4218 *
4219 * May be used as the bmdma_status() entry in ata_port_operations.
4220 *
4221 * LOCKING:
4222 * spin_lock_irqsave(host_set lock)
4223 */
4224
1da177e4
LT		 4225u8 ata_bmdma_status(struct ata_port *ap)
4226{
4227 u8 host_stat;
4228 if (ap->flags & ATA_FLAG_MMIO) {
4229 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4230 host_stat = readb(mmio + ATA_DMA_STATUS);
4231 } else
ee500aab 4232 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 4233 return host_stat;
4234}
4235
0baab86b
EF		 4236
4237/**
4238 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4239 * @qc: Command we are ending DMA for
0baab86b
EF		 4240 *
4241 * Clears the ATA_DMA_START flag in the dma control register
4242 *
4243 * May be used as the bmdma_stop() entry in ata_port_operations.
4244 *
4245 * LOCKING:
4246 * spin_lock_irqsave(host_set lock)
4247 */
4248
b73fc89f 4249void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4250{
b73fc89f 4251 struct ata_port *ap = qc->ap;
1da177e4
LT		 4252 if (ap->flags & ATA_FLAG_MMIO) {
4253 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4254
4255 /* clear start/stop bit */
4256 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4257 mmio + ATA_DMA_CMD);
4258 } else {
4259 /* clear start/stop bit */
4260 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4261 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4262 }
4263
4264 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4265 ata_altstatus(ap); /* dummy read */
4266}
4267
4268/**
4269 * ata_host_intr - Handle host interrupt for given (port, task)
4270 * @ap: Port on which interrupt arrived (possibly...)
4271 * @qc: Taskfile currently active in engine
4272 *
4273 * Handle host interrupt for given queued command. Currently,
4274 * only DMA interrupts are handled. All other commands are
4275 * handled via polling with interrupts disabled (nIEN bit).
4276 *
4277 * LOCKING:
4278 * spin_lock_irqsave(host_set lock)
4279 *
4280 * RETURNS:
4281 * One if interrupt was handled, zero if not (shared irq).
4282 */
4283
4284inline unsigned int ata_host_intr (struct ata_port *ap,
4285 struct ata_queued_cmd *qc)
4286{
4287 u8 status, host_stat;
4288
4289 switch (qc->tf.protocol) {
4290
4291 case ATA_PROT_DMA:
4292 case ATA_PROT_ATAPI_DMA:
4293 case ATA_PROT_ATAPI:
4294 /* check status of DMA engine */
4295 host_stat = ap->ops->bmdma_status(ap);
4296 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4297
4298 /* if it's not our irq... */
4299 if (!(host_stat & ATA_DMA_INTR))
4300 goto idle_irq;
4301
4302 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4303 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4304
4305 /* fall through */
4306
4307 case ATA_PROT_ATAPI_NODATA:
4308 case ATA_PROT_NODATA:
4309 /* check altstatus */
4310 status = ata_altstatus(ap);
4311 if (status & ATA_BUSY)
4312 goto idle_irq;
4313
4314 /* check main status, clearing INTRQ */
4315 status = ata_chk_status(ap);
4316 if (unlikely(status & ATA_BUSY))
4317 goto idle_irq;
4318 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4319 ap->id, qc->tf.protocol, status);
4320
4321 /* ack bmdma irq events */
4322 ap->ops->irq_clear(ap);
4323
4324 /* complete taskfile transaction */
a22e2eb0
AL		 4325 qc->err_mask |= ac_err_mask(status);
4326 ata_qc_complete(qc);
1da177e4
LT		 4327 break;
4328
4329 default:
4330 goto idle_irq;
4331 }
4332
4333 return 1; /* irq handled */
4334
4335idle_irq:
4336 ap->stats.idle_irq++;
4337
4338#ifdef ATA_IRQ_TRAP
4339 if ((ap->stats.idle_irq % 1000) == 0) {
4340 handled = 1;
4341 ata_irq_ack(ap, 0); /* debug trap */
4342 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4343 }
4344#endif
4345 return 0; /* irq not handled */
4346}
4347
4348/**
4349 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4350 * @irq: irq line (unused)
4351 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4352 * @regs: unused
4353 *
0cba632b
JG		 4354 * Default interrupt handler for PCI IDE devices. Calls
4355 * ata_host_intr() for each port that is not disabled.
4356 *
1da177e4 4357 * LOCKING:
0cba632b 4358 * Obtains host_set lock during operation.
1da177e4
LT		 4359 *
4360 * RETURNS:
0cba632b 4361 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4362 */
4363
4364irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4365{
4366 struct ata_host_set *host_set = dev_instance;
4367 unsigned int i;
4368 unsigned int handled = 0;
4369 unsigned long flags;
4370
4371 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4372 spin_lock_irqsave(&host_set->lock, flags);
4373
4374 for (i = 0; i < host_set->n_ports; i++) {
4375 struct ata_port *ap;
4376
4377 ap = host_set->ports[i];
c1389503
TH		 4378 if (ap &&
4379 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4380 struct ata_queued_cmd *qc;
4381
4382 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4383 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4384 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4385 handled |= ata_host_intr(ap, qc);
4386 }
4387 }
4388
4389 spin_unlock_irqrestore(&host_set->lock, flags);
4390
4391 return IRQ_RETVAL(handled);
4392}
4393
0baab86b 4394
9b847548
JA		 4395/*
4396 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4397 * without filling any other registers
4398 */
4399static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4400 u8 cmd)
4401{
4402 struct ata_taskfile tf;
4403 int err;
4404
4405 ata_tf_init(ap, &tf, dev->devno);
4406
4407 tf.command = cmd;
4408 tf.flags |= ATA_TFLAG_DEVICE;
4409 tf.protocol = ATA_PROT_NODATA;
4410
4411 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4412 if (err)
4413 printk(KERN_ERR "%s: ata command failed: %d\n",
4414 __FUNCTION__, err);
4415
4416 return err;
4417}
4418
4419static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4420{
4421 u8 cmd;
4422
4423 if (!ata_try_flush_cache(dev))
4424 return 0;
4425
4426 if (ata_id_has_flush_ext(dev->id))
4427 cmd = ATA_CMD_FLUSH_EXT;
4428 else
4429 cmd = ATA_CMD_FLUSH;
4430
4431 return ata_do_simple_cmd(ap, dev, cmd);
4432}
4433
4434static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4435{
4436 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4437}
4438
4439static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4440{
4441 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4442}
4443
4444/**
4445 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4446 * @ap: port the device is connected to
4447 * @dev: the device to resume
9b847548
JA		 4448 *
4449 * Kick the drive back into action, by sending it an idle immediate
4450 * command and making sure its transfer mode matches between drive
4451 * and host.
4452 *
4453 */
4454int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4455{
4456 if (ap->flags & ATA_FLAG_SUSPENDED) {
4457 ap->flags &= ~ATA_FLAG_SUSPENDED;
4458 ata_set_mode(ap);
4459 }
4460 if (!ata_dev_present(dev))
4461 return 0;
4462 if (dev->class == ATA_DEV_ATA)
4463 ata_start_drive(ap, dev);
4464
4465 return 0;
4466}
4467
4468/**
4469 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4470 * @ap: port the device is connected to
4471 * @dev: the device to suspend
9b847548
JA		 4472 *
4473 * Flush the cache on the drive, if appropriate, then issue a
4474 * standbynow command.
9b847548
JA		 4475 */
4476int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4477{
4478 if (!ata_dev_present(dev))
4479 return 0;
4480 if (dev->class == ATA_DEV_ATA)
4481 ata_flush_cache(ap, dev);
4482
4483 ata_standby_drive(ap, dev);
4484 ap->flags |= ATA_FLAG_SUSPENDED;
4485 return 0;
4486}
4487
c893a3ae
RD		 4488/**
4489 * ata_port_start - Set port up for dma.
4490 * @ap: Port to initialize
4491 *
4492 * Called just after data structures for each port are
4493 * initialized. Allocates space for PRD table.
4494 *
4495 * May be used as the port_start() entry in ata_port_operations.
4496 *
4497 * LOCKING:
4498 * Inherited from caller.
4499 */
4500
1da177e4
LT		 4501int ata_port_start (struct ata_port *ap)
4502{
4503 struct device *dev = ap->host_set->dev;
6037d6bb 4504 int rc;
1da177e4
LT		 4505
4506 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4507 if (!ap->prd)
4508 return -ENOMEM;
4509
6037d6bb
JG		 4510 rc = ata_pad_alloc(ap, dev);
4511 if (rc) {
cedc9a47 4512 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4513 return rc;
cedc9a47
JG		 4514 }
4515
1da177e4
LT		 4516 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4517
4518 return 0;
4519}
4520
0baab86b
EF		 4521
4522/**
4523 * ata_port_stop - Undo ata_port_start()
4524 * @ap: Port to shut down
4525 *
4526 * Frees the PRD table.
4527 *
4528 * May be used as the port_stop() entry in ata_port_operations.
4529 *
4530 * LOCKING:
6f0ef4fa 4531 * Inherited from caller.
0baab86b
EF		 4532 */
4533
1da177e4
LT		 4534void ata_port_stop (struct ata_port *ap)
4535{
4536 struct device *dev = ap->host_set->dev;
4537
4538 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4539 ata_pad_free(ap, dev);
1da177e4
LT		 4540}
4541
aa8f0dc6
JG		 4542void ata_host_stop (struct ata_host_set *host_set)
4543{
4544 if (host_set->mmio_base)
4545 iounmap(host_set->mmio_base);
4546}
4547
4548
1da177e4
LT		 4549/**
4550 * ata_host_remove - Unregister SCSI host structure with upper layers
4551 * @ap: Port to unregister
4552 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4553 *
4554 * LOCKING:
6f0ef4fa 4555 * Inherited from caller.
1da177e4
LT		 4556 */
4557
4558static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4559{
4560 struct Scsi_Host *sh = ap->host;
4561
4562 DPRINTK("ENTER\n");
4563
4564 if (do_unregister)
4565 scsi_remove_host(sh);
4566
4567 ap->ops->port_stop(ap);
4568}
4569
4570/**
4571 * ata_host_init - Initialize an ata_port structure
4572 * @ap: Structure to initialize
4573 * @host: associated SCSI mid-layer structure
4574 * @host_set: Collection of hosts to which @ap belongs
4575 * @ent: Probe information provided by low-level driver
4576 * @port_no: Port number associated with this ata_port
4577 *
0cba632b
JG		 4578 * Initialize a new ata_port structure, and its associated
4579 * scsi_host.
4580 *
1da177e4 4581 * LOCKING:
0cba632b 4582 * Inherited from caller.
1da177e4
LT		 4583 */
4584
4585static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4586 struct ata_host_set *host_set,
057ace5e 4587 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4588{
4589 unsigned int i;
4590
4591 host->max_id = 16;
4592 host->max_lun = 1;
4593 host->max_channel = 1;
4594 host->unique_id = ata_unique_id++;
4595 host->max_cmd_len = 12;
12413197 4596
1da177e4
LT		 4597 ap->flags = ATA_FLAG_PORT_DISABLED;
4598 ap->id = host->unique_id;
4599 ap->host = host;
4600 ap->ctl = ATA_DEVCTL_OBS;
4601 ap->host_set = host_set;
4602 ap->port_no = port_no;
4603 ap->hard_port_no =
4604 ent->legacy_mode ? ent->hard_port_no : port_no;
4605 ap->pio_mask = ent->pio_mask;
4606 ap->mwdma_mask = ent->mwdma_mask;
4607 ap->udma_mask = ent->udma_mask;
4608 ap->flags |= ent->host_flags;
4609 ap->ops = ent->port_ops;
4610 ap->cbl = ATA_CBL_NONE;
4611 ap->active_tag = ATA_TAG_POISON;
4612 ap->last_ctl = 0xFF;
4613
86e45b6b 4614 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4615 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4616
4617 for (i = 0; i < ATA_MAX_DEVICES; i++)
4618 ap->device[i].devno = i;
4619
4620#ifdef ATA_IRQ_TRAP
4621 ap->stats.unhandled_irq = 1;
4622 ap->stats.idle_irq = 1;
4623#endif
4624
4625 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4626}
4627
4628/**
4629 * ata_host_add - Attach low-level ATA driver to system
4630 * @ent: Information provided by low-level driver
4631 * @host_set: Collections of ports to which we add
4632 * @port_no: Port number associated with this host
4633 *
0cba632b
JG		 4634 * Attach low-level ATA driver to system.
4635 *
1da177e4 4636 * LOCKING:
0cba632b 4637 * PCI/etc. bus probe sem.
1da177e4
LT		 4638 *
4639 * RETURNS:
0cba632b 4640 * New ata_port on success, for NULL on error.
1da177e4
LT		 4641 */
4642
057ace5e 4643static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4644 struct ata_host_set *host_set,
4645 unsigned int port_no)
4646{
4647 struct Scsi_Host *host;
4648 struct ata_port *ap;
4649 int rc;
4650
4651 DPRINTK("ENTER\n");
4652 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4653 if (!host)
4654 return NULL;
4655
4656 ap = (struct ata_port *) &host->hostdata[0];
4657
4658 ata_host_init(ap, host, host_set, ent, port_no);
4659
4660 rc = ap->ops->port_start(ap);
4661 if (rc)
4662 goto err_out;
4663
4664 return ap;
4665
4666err_out:
4667 scsi_host_put(host);
4668 return NULL;
4669}
4670
4671/**
0cba632b
JG		 4672 * ata_device_add - Register hardware device with ATA and SCSI layers
4673 * @ent: Probe information describing hardware device to be registered
4674 *
4675 * This function processes the information provided in the probe
4676 * information struct @ent, allocates the necessary ATA and SCSI
4677 * host information structures, initializes them, and registers
4678 * everything with requisite kernel subsystems.
4679 *
4680 * This function requests irqs, probes the ATA bus, and probes
4681 * the SCSI bus.
1da177e4
LT		 4682 *
4683 * LOCKING:
0cba632b 4684 * PCI/etc. bus probe sem.
1da177e4
LT		 4685 *
4686 * RETURNS:
0cba632b 4687 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4688 */
4689
057ace5e 4690int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4691{
4692 unsigned int count = 0, i;
4693 struct device *dev = ent->dev;
4694 struct ata_host_set *host_set;
4695
4696 DPRINTK("ENTER\n");
4697 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4698 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4699 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4700 if (!host_set)
4701 return 0;
1da177e4
LT		 4702 spin_lock_init(&host_set->lock);
4703
4704 host_set->dev = dev;
4705 host_set->n_ports = ent->n_ports;
4706 host_set->irq = ent->irq;
4707 host_set->mmio_base = ent->mmio_base;
4708 host_set->private_data = ent->private_data;
4709 host_set->ops = ent->port_ops;
4710
4711 /* register each port bound to this device */
4712 for (i = 0; i < ent->n_ports; i++) {
4713 struct ata_port *ap;
4714 unsigned long xfer_mode_mask;
4715
4716 ap = ata_host_add(ent, host_set, i);
4717 if (!ap)
4718 goto err_out;
4719
4720 host_set->ports[i] = ap;
4721 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4722 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4723 (ap->pio_mask << ATA_SHIFT_PIO);
4724
4725 /* print per-port info to dmesg */
4726 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4727 "bmdma 0x%lX irq %lu\n",
4728 ap->id,
4729 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4730 ata_mode_string(xfer_mode_mask),
4731 ap->ioaddr.cmd_addr,
4732 ap->ioaddr.ctl_addr,
4733 ap->ioaddr.bmdma_addr,
4734 ent->irq);
4735
4736 ata_chk_status(ap);
4737 host_set->ops->irq_clear(ap);
4738 count++;
4739 }
4740
57f3bda8
RD		 4741 if (!count)
4742 goto err_free_ret;
1da177e4
LT		 4743
4744 /* obtain irq, that is shared between channels */
4745 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4746 DRV_NAME, host_set))
4747 goto err_out;
4748
4749 /* perform each probe synchronously */
4750 DPRINTK("probe begin\n");
4751 for (i = 0; i < count; i++) {
4752 struct ata_port *ap;
4753 int rc;
4754
4755 ap = host_set->ports[i];
4756
c893a3ae 4757 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4758 rc = ata_bus_probe(ap);
c893a3ae 4759 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4760
4761 if (rc) {
4762 /* FIXME: do something useful here?
4763 * Current libata behavior will
4764 * tear down everything when
4765 * the module is removed
4766 * or the h/w is unplugged.
4767 */
4768 }
4769
4770 rc = scsi_add_host(ap->host, dev);
4771 if (rc) {
4772 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4773 ap->id);
4774 /* FIXME: do something useful here */
4775 /* FIXME: handle unconditional calls to
4776 * scsi_scan_host and ata_host_remove, below,
4777 * at the very least
4778 */
4779 }
4780 }
4781
4782 /* probes are done, now scan each port's disk(s) */
c893a3ae 4783 DPRINTK("host probe begin\n");
1da177e4
LT		 4784 for (i = 0; i < count; i++) {
4785 struct ata_port *ap = host_set->ports[i];
4786
644dd0cc 4787 ata_scsi_scan_host(ap);
1da177e4
LT		 4788 }
4789
4790 dev_set_drvdata(dev, host_set);
4791
4792 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4793 return ent->n_ports; /* success */
4794
4795err_out:
4796 for (i = 0; i < count; i++) {
4797 ata_host_remove(host_set->ports[i], 1);
4798 scsi_host_put(host_set->ports[i]->host);
4799 }
57f3bda8 4800err_free_ret:
1da177e4
LT		 4801 kfree(host_set);
4802 VPRINTK("EXIT, returning 0\n");
4803 return 0;
4804}
4805
17b14451
AC		 4806/**
4807 * ata_host_set_remove - PCI layer callback for device removal
4808 * @host_set: ATA host set that was removed
4809 *
4810 * Unregister all objects associated with this host set. Free those
4811 * objects.
4812 *
4813 * LOCKING:
4814 * Inherited from calling layer (may sleep).
4815 */
4816
17b14451
AC		 4817void ata_host_set_remove(struct ata_host_set *host_set)
4818{
4819 struct ata_port *ap;
4820 unsigned int i;
4821
4822 for (i = 0; i < host_set->n_ports; i++) {
4823 ap = host_set->ports[i];
4824 scsi_remove_host(ap->host);
4825 }
4826
4827 free_irq(host_set->irq, host_set);
4828
4829 for (i = 0; i < host_set->n_ports; i++) {
4830 ap = host_set->ports[i];
4831
4832 ata_scsi_release(ap->host);
4833
4834 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4835 struct ata_ioports *ioaddr = &ap->ioaddr;
4836
4837 if (ioaddr->cmd_addr == 0x1f0)
4838 release_region(0x1f0, 8);
4839 else if (ioaddr->cmd_addr == 0x170)
4840 release_region(0x170, 8);
4841 }
4842
4843 scsi_host_put(ap->host);
4844 }
4845
4846 if (host_set->ops->host_stop)
4847 host_set->ops->host_stop(host_set);
4848
4849 kfree(host_set);
4850}
4851
1da177e4
LT		 4852/**
4853 * ata_scsi_release - SCSI layer callback hook for host unload
4854 * @host: libata host to be unloaded
4855 *
4856 * Performs all duties necessary to shut down a libata port...
4857 * Kill port kthread, disable port, and release resources.
4858 *
4859 * LOCKING:
4860 * Inherited from SCSI layer.
4861 *
4862 * RETURNS:
4863 * One.
4864 */
4865
4866int ata_scsi_release(struct Scsi_Host *host)
4867{
4868 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4869 int i;
1da177e4
LT		 4870
4871 DPRINTK("ENTER\n");
4872
4873 ap->ops->port_disable(ap);
4874 ata_host_remove(ap, 0);
d9572b1d
TH		 4875 for (i = 0; i < ATA_MAX_DEVICES; i++)
4876 kfree(ap->device[i].id);
1da177e4
LT		 4877
4878 DPRINTK("EXIT\n");
4879 return 1;
4880}
4881
4882/**
4883 * ata_std_ports - initialize ioaddr with standard port offsets.
4884 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4885 *
4886 * Utility function which initializes data_addr, error_addr,
4887 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4888 * device_addr, status_addr, and command_addr to standard offsets
4889 * relative to cmd_addr.
4890 *
4891 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4892 */
0baab86b 4893
1da177e4
LT		 4894void ata_std_ports(struct ata_ioports *ioaddr)
4895{
4896 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4897 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4898 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4899 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4900 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4901 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4902 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4903 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4904 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4905 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4906}
4907
0baab86b 4908
374b1873
JG		 4909#ifdef CONFIG_PCI
4910
4911void ata_pci_host_stop (struct ata_host_set *host_set)
4912{
4913 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4914
4915 pci_iounmap(pdev, host_set->mmio_base);
4916}
4917
1da177e4
LT		 4918/**
4919 * ata_pci_remove_one - PCI layer callback for device removal
4920 * @pdev: PCI device that was removed
4921 *
4922 * PCI layer indicates to libata via this hook that
6f0ef4fa 4923 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4924 * Handle this by unregistering all objects associated
4925 * with this PCI device. Free those objects. Then finally
4926 * release PCI resources and disable device.
4927 *
4928 * LOCKING:
4929 * Inherited from PCI layer (may sleep).
4930 */
4931
4932void ata_pci_remove_one (struct pci_dev *pdev)
4933{
4934 struct device *dev = pci_dev_to_dev(pdev);
4935 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4936
17b14451 4937 ata_host_set_remove(host_set);
1da177e4
LT		 4938 pci_release_regions(pdev);
4939 pci_disable_device(pdev);
4940 dev_set_drvdata(dev, NULL);
4941}
4942
4943/* move to PCI subsystem */
057ace5e 4944int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4945{
4946 unsigned long tmp = 0;
4947
4948 switch (bits->width) {
4949 case 1: {
4950 u8 tmp8 = 0;
4951 pci_read_config_byte(pdev, bits->reg, &tmp8);
4952 tmp = tmp8;
4953 break;
4954 }
4955 case 2: {
4956 u16 tmp16 = 0;
4957 pci_read_config_word(pdev, bits->reg, &tmp16);
4958 tmp = tmp16;
4959 break;
4960 }
4961 case 4: {
4962 u32 tmp32 = 0;
4963 pci_read_config_dword(pdev, bits->reg, &tmp32);
4964 tmp = tmp32;
4965 break;
4966 }
4967
4968 default:
4969 return -EINVAL;
4970 }
4971
4972 tmp &= bits->mask;
4973
4974 return (tmp == bits->val) ? 1 : 0;
4975}
9b847548
JA		 4976
4977int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4978{
4979 pci_save_state(pdev);
4980 pci_disable_device(pdev);
4981 pci_set_power_state(pdev, PCI_D3hot);
4982 return 0;
4983}
4984
4985int ata_pci_device_resume(struct pci_dev *pdev)
4986{
4987 pci_set_power_state(pdev, PCI_D0);
4988 pci_restore_state(pdev);
4989 pci_enable_device(pdev);
4990 pci_set_master(pdev);
4991 return 0;
4992}
1da177e4
LT		 4993#endif /* CONFIG_PCI */
4994
4995
1da177e4
LT		 4996static int __init ata_init(void)
4997{
4998 ata_wq = create_workqueue("ata");
4999 if (!ata_wq)
5000 return -ENOMEM;
5001
5002 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5003 return 0;
5004}
5005
5006static void __exit ata_exit(void)
5007{
5008 destroy_workqueue(ata_wq);
5009}
5010
5011module_init(ata_init);
5012module_exit(ata_exit);
5013
67846b30
JG		 5014static unsigned long ratelimit_time;
5015static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5016
5017int ata_ratelimit(void)
5018{
5019 int rc;
5020 unsigned long flags;
5021
5022 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5023
5024 if (time_after(jiffies, ratelimit_time)) {
5025 rc = 1;
5026 ratelimit_time = jiffies + (HZ/5);
5027 } else
5028 rc = 0;
5029
5030 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5031
5032 return rc;
5033}
5034
1da177e4
LT		 5035/*
5036 * libata is essentially a library of internal helper functions for
5037 * low-level ATA host controller drivers. As such, the API/ABI is
5038 * likely to change as new drivers are added and updated.
5039 * Do not depend on ABI/API stability.
5040 */
5041
5042EXPORT_SYMBOL_GPL(ata_std_bios_param);
5043EXPORT_SYMBOL_GPL(ata_std_ports);
5044EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5045EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5046EXPORT_SYMBOL_GPL(ata_sg_init);
5047EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5048EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5049EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5050EXPORT_SYMBOL_GPL(ata_eng_timeout);
5051EXPORT_SYMBOL_GPL(ata_tf_load);
5052EXPORT_SYMBOL_GPL(ata_tf_read);
5053EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5054EXPORT_SYMBOL_GPL(ata_std_dev_select);
5055EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5056EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5057EXPORT_SYMBOL_GPL(ata_check_status);
5058EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5059EXPORT_SYMBOL_GPL(ata_exec_command);
5060EXPORT_SYMBOL_GPL(ata_port_start);
5061EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5062EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5063EXPORT_SYMBOL_GPL(ata_interrupt);
5064EXPORT_SYMBOL_GPL(ata_qc_prep);
5065EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5066EXPORT_SYMBOL_GPL(ata_bmdma_start);
5067EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5068EXPORT_SYMBOL_GPL(ata_bmdma_status);
5069EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5070EXPORT_SYMBOL_GPL(ata_port_probe);
5071EXPORT_SYMBOL_GPL(sata_phy_reset);
5072EXPORT_SYMBOL_GPL(__sata_phy_reset);
5073EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5074EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5075EXPORT_SYMBOL_GPL(ata_std_softreset);
5076EXPORT_SYMBOL_GPL(sata_std_hardreset);
5077EXPORT_SYMBOL_GPL(ata_std_postreset);
5078EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5079EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5080EXPORT_SYMBOL_GPL(ata_dev_revalidate);
1da177e4 5081EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5082EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5083EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5084EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5085EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5086EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 5087EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 5088EXPORT_SYMBOL_GPL(ata_scsi_error);
5089EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5090EXPORT_SYMBOL_GPL(ata_scsi_release);
5091EXPORT_SYMBOL_GPL(ata_host_intr);
5092EXPORT_SYMBOL_GPL(ata_dev_classify);
6a62a04d
TH		 5093EXPORT_SYMBOL_GPL(ata_id_string);
5094EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5095EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5096EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5097EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5098
1bc4ccff 5099EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5100EXPORT_SYMBOL_GPL(ata_timing_compute);
5101EXPORT_SYMBOL_GPL(ata_timing_merge);
5102
1da177e4
LT		 5103#ifdef CONFIG_PCI
5104EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5105EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5106EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5107EXPORT_SYMBOL_GPL(ata_pci_init_one);
5108EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5109EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5110EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 5111#endif /* CONFIG_PCI */
9b847548
JA		 5112
5113EXPORT_SYMBOL_GPL(ata_device_suspend);
5114EXPORT_SYMBOL_GPL(ata_device_resume);
5115EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5116EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux 6.x block layer and io_uring tree(s)