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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
1da177e4 LT |
35 | #include <linux/kernel.h> |
36 | #include <linux/module.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/list.h> | |
40 | #include <linux/mm.h> | |
41 | #include <linux/highmem.h> | |
42 | #include <linux/spinlock.h> | |
43 | #include <linux/blkdev.h> | |
44 | #include <linux/delay.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/completion.h> | |
48 | #include <linux/suspend.h> | |
49 | #include <linux/workqueue.h> | |
67846b30 | 50 | #include <linux/jiffies.h> |
378f058c | 51 | #include <linux/scatterlist.h> |
1da177e4 | 52 | #include <scsi/scsi.h> |
1da177e4 | 53 | #include "scsi_priv.h" |
193515d5 | 54 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
55 | #include <scsi/scsi_host.h> |
56 | #include <linux/libata.h> | |
57 | #include <asm/io.h> | |
58 | #include <asm/semaphore.h> | |
59 | #include <asm/byteorder.h> | |
60 | ||
61 | #include "libata.h" | |
62 | ||
d7bb4cc7 | 63 | /* debounce timing parameters in msecs { interval, duration, timeout } */ |
e9c83914 TH |
64 | const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; |
65 | const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; | |
66 | const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; | |
d7bb4cc7 | 67 | |
3373efd8 TH |
68 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
69 | u16 heads, u16 sectors); | |
70 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
71 | static void ata_dev_xfermask(struct ata_device *dev); | |
1da177e4 LT |
72 | |
73 | static unsigned int ata_unique_id = 1; | |
74 | static struct workqueue_struct *ata_wq; | |
75 | ||
453b07ac TH |
76 | struct workqueue_struct *ata_aux_wq; |
77 | ||
418dc1f5 | 78 | int atapi_enabled = 1; |
1623c81e JG |
79 | module_param(atapi_enabled, int, 0444); |
80 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
81 | ||
95de719a AL |
82 | int atapi_dmadir = 0; |
83 | module_param(atapi_dmadir, int, 0444); | |
84 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
85 | ||
c3c013a2 JG |
86 | int libata_fua = 0; |
87 | module_param_named(fua, libata_fua, int, 0444); | |
88 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
89 | ||
a8601e5f AM |
90 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; |
91 | module_param(ata_probe_timeout, int, 0444); | |
92 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | |
93 | ||
1da177e4 LT |
94 | MODULE_AUTHOR("Jeff Garzik"); |
95 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
96 | MODULE_LICENSE("GPL"); | |
97 | MODULE_VERSION(DRV_VERSION); | |
98 | ||
0baab86b | 99 | |
1da177e4 LT |
100 | /** |
101 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
102 | * @tf: Taskfile to convert | |
103 | * @fis: Buffer into which data will output | |
104 | * @pmp: Port multiplier port | |
105 | * | |
106 | * Converts a standard ATA taskfile to a Serial ATA | |
107 | * FIS structure (Register - Host to Device). | |
108 | * | |
109 | * LOCKING: | |
110 | * Inherited from caller. | |
111 | */ | |
112 | ||
057ace5e | 113 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
114 | { |
115 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
116 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
117 | bit 7 indicates Command FIS */ | |
118 | fis[2] = tf->command; | |
119 | fis[3] = tf->feature; | |
120 | ||
121 | fis[4] = tf->lbal; | |
122 | fis[5] = tf->lbam; | |
123 | fis[6] = tf->lbah; | |
124 | fis[7] = tf->device; | |
125 | ||
126 | fis[8] = tf->hob_lbal; | |
127 | fis[9] = tf->hob_lbam; | |
128 | fis[10] = tf->hob_lbah; | |
129 | fis[11] = tf->hob_feature; | |
130 | ||
131 | fis[12] = tf->nsect; | |
132 | fis[13] = tf->hob_nsect; | |
133 | fis[14] = 0; | |
134 | fis[15] = tf->ctl; | |
135 | ||
136 | fis[16] = 0; | |
137 | fis[17] = 0; | |
138 | fis[18] = 0; | |
139 | fis[19] = 0; | |
140 | } | |
141 | ||
142 | /** | |
143 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
144 | * @fis: Buffer from which data will be input | |
145 | * @tf: Taskfile to output | |
146 | * | |
e12a1be6 | 147 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
148 | * |
149 | * LOCKING: | |
150 | * Inherited from caller. | |
151 | */ | |
152 | ||
057ace5e | 153 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
154 | { |
155 | tf->command = fis[2]; /* status */ | |
156 | tf->feature = fis[3]; /* error */ | |
157 | ||
158 | tf->lbal = fis[4]; | |
159 | tf->lbam = fis[5]; | |
160 | tf->lbah = fis[6]; | |
161 | tf->device = fis[7]; | |
162 | ||
163 | tf->hob_lbal = fis[8]; | |
164 | tf->hob_lbam = fis[9]; | |
165 | tf->hob_lbah = fis[10]; | |
166 | ||
167 | tf->nsect = fis[12]; | |
168 | tf->hob_nsect = fis[13]; | |
169 | } | |
170 | ||
8cbd6df1 AL |
171 | static const u8 ata_rw_cmds[] = { |
172 | /* pio multi */ | |
173 | ATA_CMD_READ_MULTI, | |
174 | ATA_CMD_WRITE_MULTI, | |
175 | ATA_CMD_READ_MULTI_EXT, | |
176 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
177 | 0, |
178 | 0, | |
179 | 0, | |
180 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
181 | /* pio */ |
182 | ATA_CMD_PIO_READ, | |
183 | ATA_CMD_PIO_WRITE, | |
184 | ATA_CMD_PIO_READ_EXT, | |
185 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
186 | 0, |
187 | 0, | |
188 | 0, | |
189 | 0, | |
8cbd6df1 AL |
190 | /* dma */ |
191 | ATA_CMD_READ, | |
192 | ATA_CMD_WRITE, | |
193 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
194 | ATA_CMD_WRITE_EXT, |
195 | 0, | |
196 | 0, | |
197 | 0, | |
198 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 199 | }; |
1da177e4 LT |
200 | |
201 | /** | |
8cbd6df1 AL |
202 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
203 | * @qc: command to examine and configure | |
1da177e4 | 204 | * |
2e9edbf8 | 205 | * Examine the device configuration and tf->flags to calculate |
8cbd6df1 | 206 | * the proper read/write commands and protocol to use. |
1da177e4 LT |
207 | * |
208 | * LOCKING: | |
209 | * caller. | |
210 | */ | |
9a3dccc4 | 211 | int ata_rwcmd_protocol(struct ata_queued_cmd *qc) |
1da177e4 | 212 | { |
8cbd6df1 AL |
213 | struct ata_taskfile *tf = &qc->tf; |
214 | struct ata_device *dev = qc->dev; | |
9a3dccc4 | 215 | u8 cmd; |
1da177e4 | 216 | |
9a3dccc4 | 217 | int index, fua, lba48, write; |
2e9edbf8 | 218 | |
9a3dccc4 | 219 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
220 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
221 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 222 | |
8cbd6df1 AL |
223 | if (dev->flags & ATA_DFLAG_PIO) { |
224 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 225 | index = dev->multi_count ? 0 : 8; |
8d238e01 AC |
226 | } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) { |
227 | /* Unable to use DMA due to host limitation */ | |
228 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 229 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
230 | } else { |
231 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 232 | index = 16; |
8cbd6df1 | 233 | } |
1da177e4 | 234 | |
9a3dccc4 TH |
235 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
236 | if (cmd) { | |
237 | tf->command = cmd; | |
238 | return 0; | |
239 | } | |
240 | return -1; | |
1da177e4 LT |
241 | } |
242 | ||
cb95d562 TH |
243 | /** |
244 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
245 | * @pio_mask: pio_mask | |
246 | * @mwdma_mask: mwdma_mask | |
247 | * @udma_mask: udma_mask | |
248 | * | |
249 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
250 | * unsigned int xfer_mask. | |
251 | * | |
252 | * LOCKING: | |
253 | * None. | |
254 | * | |
255 | * RETURNS: | |
256 | * Packed xfer_mask. | |
257 | */ | |
258 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
259 | unsigned int mwdma_mask, | |
260 | unsigned int udma_mask) | |
261 | { | |
262 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
263 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
264 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
265 | } | |
266 | ||
c0489e4e TH |
267 | /** |
268 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
269 | * @xfer_mask: xfer_mask to unpack | |
270 | * @pio_mask: resulting pio_mask | |
271 | * @mwdma_mask: resulting mwdma_mask | |
272 | * @udma_mask: resulting udma_mask | |
273 | * | |
274 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
275 | * Any NULL distination masks will be ignored. | |
276 | */ | |
277 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
278 | unsigned int *pio_mask, | |
279 | unsigned int *mwdma_mask, | |
280 | unsigned int *udma_mask) | |
281 | { | |
282 | if (pio_mask) | |
283 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
284 | if (mwdma_mask) | |
285 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
286 | if (udma_mask) | |
287 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
288 | } | |
289 | ||
cb95d562 | 290 | static const struct ata_xfer_ent { |
be9a50c8 | 291 | int shift, bits; |
cb95d562 TH |
292 | u8 base; |
293 | } ata_xfer_tbl[] = { | |
294 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
295 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
296 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
297 | { -1, }, | |
298 | }; | |
299 | ||
300 | /** | |
301 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
302 | * @xfer_mask: xfer_mask of interest | |
303 | * | |
304 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
305 | * bit of @xfer_mask is considered. | |
306 | * | |
307 | * LOCKING: | |
308 | * None. | |
309 | * | |
310 | * RETURNS: | |
311 | * Matching XFER_* value, 0 if no match found. | |
312 | */ | |
313 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
314 | { | |
315 | int highbit = fls(xfer_mask) - 1; | |
316 | const struct ata_xfer_ent *ent; | |
317 | ||
318 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
319 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
320 | return ent->base + highbit - ent->shift; | |
321 | return 0; | |
322 | } | |
323 | ||
324 | /** | |
325 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
326 | * @xfer_mode: XFER_* of interest | |
327 | * | |
328 | * Return matching xfer_mask for @xfer_mode. | |
329 | * | |
330 | * LOCKING: | |
331 | * None. | |
332 | * | |
333 | * RETURNS: | |
334 | * Matching xfer_mask, 0 if no match found. | |
335 | */ | |
336 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
337 | { | |
338 | const struct ata_xfer_ent *ent; | |
339 | ||
340 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
341 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
342 | return 1 << (ent->shift + xfer_mode - ent->base); | |
343 | return 0; | |
344 | } | |
345 | ||
346 | /** | |
347 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
348 | * @xfer_mode: XFER_* of interest | |
349 | * | |
350 | * Return matching xfer_shift for @xfer_mode. | |
351 | * | |
352 | * LOCKING: | |
353 | * None. | |
354 | * | |
355 | * RETURNS: | |
356 | * Matching xfer_shift, -1 if no match found. | |
357 | */ | |
358 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
359 | { | |
360 | const struct ata_xfer_ent *ent; | |
361 | ||
362 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
363 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
364 | return ent->shift; | |
365 | return -1; | |
366 | } | |
367 | ||
1da177e4 | 368 | /** |
1da7b0d0 TH |
369 | * ata_mode_string - convert xfer_mask to string |
370 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
371 | * |
372 | * Determine string which represents the highest speed | |
1da7b0d0 | 373 | * (highest bit in @modemask). |
1da177e4 LT |
374 | * |
375 | * LOCKING: | |
376 | * None. | |
377 | * | |
378 | * RETURNS: | |
379 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 380 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 | 381 | */ |
1da7b0d0 | 382 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 383 | { |
75f554bc TH |
384 | static const char * const xfer_mode_str[] = { |
385 | "PIO0", | |
386 | "PIO1", | |
387 | "PIO2", | |
388 | "PIO3", | |
389 | "PIO4", | |
390 | "MWDMA0", | |
391 | "MWDMA1", | |
392 | "MWDMA2", | |
393 | "UDMA/16", | |
394 | "UDMA/25", | |
395 | "UDMA/33", | |
396 | "UDMA/44", | |
397 | "UDMA/66", | |
398 | "UDMA/100", | |
399 | "UDMA/133", | |
400 | "UDMA7", | |
401 | }; | |
1da7b0d0 | 402 | int highbit; |
1da177e4 | 403 | |
1da7b0d0 TH |
404 | highbit = fls(xfer_mask) - 1; |
405 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
406 | return xfer_mode_str[highbit]; | |
1da177e4 | 407 | return "<n/a>"; |
1da177e4 LT |
408 | } |
409 | ||
4c360c81 TH |
410 | static const char *sata_spd_string(unsigned int spd) |
411 | { | |
412 | static const char * const spd_str[] = { | |
413 | "1.5 Gbps", | |
414 | "3.0 Gbps", | |
415 | }; | |
416 | ||
417 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
418 | return "<unknown>"; | |
419 | return spd_str[spd - 1]; | |
420 | } | |
421 | ||
3373efd8 | 422 | void ata_dev_disable(struct ata_device *dev) |
0b8efb0a | 423 | { |
0dd4b21f | 424 | if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) { |
f15a1daf | 425 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); |
0b8efb0a TH |
426 | dev->class++; |
427 | } | |
428 | } | |
429 | ||
1da177e4 LT |
430 | /** |
431 | * ata_pio_devchk - PATA device presence detection | |
432 | * @ap: ATA channel to examine | |
433 | * @device: Device to examine (starting at zero) | |
434 | * | |
435 | * This technique was originally described in | |
436 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
437 | * later found its way into the ATA/ATAPI spec. | |
438 | * | |
439 | * Write a pattern to the ATA shadow registers, | |
440 | * and if a device is present, it will respond by | |
441 | * correctly storing and echoing back the | |
442 | * ATA shadow register contents. | |
443 | * | |
444 | * LOCKING: | |
445 | * caller. | |
446 | */ | |
447 | ||
448 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
449 | unsigned int device) | |
450 | { | |
451 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
452 | u8 nsect, lbal; | |
453 | ||
454 | ap->ops->dev_select(ap, device); | |
455 | ||
456 | outb(0x55, ioaddr->nsect_addr); | |
457 | outb(0xaa, ioaddr->lbal_addr); | |
458 | ||
459 | outb(0xaa, ioaddr->nsect_addr); | |
460 | outb(0x55, ioaddr->lbal_addr); | |
461 | ||
462 | outb(0x55, ioaddr->nsect_addr); | |
463 | outb(0xaa, ioaddr->lbal_addr); | |
464 | ||
465 | nsect = inb(ioaddr->nsect_addr); | |
466 | lbal = inb(ioaddr->lbal_addr); | |
467 | ||
468 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
469 | return 1; /* we found a device */ | |
470 | ||
471 | return 0; /* nothing found */ | |
472 | } | |
473 | ||
474 | /** | |
475 | * ata_mmio_devchk - PATA device presence detection | |
476 | * @ap: ATA channel to examine | |
477 | * @device: Device to examine (starting at zero) | |
478 | * | |
479 | * This technique was originally described in | |
480 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
481 | * later found its way into the ATA/ATAPI spec. | |
482 | * | |
483 | * Write a pattern to the ATA shadow registers, | |
484 | * and if a device is present, it will respond by | |
485 | * correctly storing and echoing back the | |
486 | * ATA shadow register contents. | |
487 | * | |
488 | * LOCKING: | |
489 | * caller. | |
490 | */ | |
491 | ||
492 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
493 | unsigned int device) | |
494 | { | |
495 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
496 | u8 nsect, lbal; | |
497 | ||
498 | ap->ops->dev_select(ap, device); | |
499 | ||
500 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
501 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
502 | ||
503 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
504 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
505 | ||
506 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
507 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
508 | ||
509 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
510 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
511 | ||
512 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
513 | return 1; /* we found a device */ | |
514 | ||
515 | return 0; /* nothing found */ | |
516 | } | |
517 | ||
518 | /** | |
519 | * ata_devchk - PATA device presence detection | |
520 | * @ap: ATA channel to examine | |
521 | * @device: Device to examine (starting at zero) | |
522 | * | |
523 | * Dispatch ATA device presence detection, depending | |
524 | * on whether we are using PIO or MMIO to talk to the | |
525 | * ATA shadow registers. | |
526 | * | |
527 | * LOCKING: | |
528 | * caller. | |
529 | */ | |
530 | ||
531 | static unsigned int ata_devchk(struct ata_port *ap, | |
532 | unsigned int device) | |
533 | { | |
534 | if (ap->flags & ATA_FLAG_MMIO) | |
535 | return ata_mmio_devchk(ap, device); | |
536 | return ata_pio_devchk(ap, device); | |
537 | } | |
538 | ||
539 | /** | |
540 | * ata_dev_classify - determine device type based on ATA-spec signature | |
541 | * @tf: ATA taskfile register set for device to be identified | |
542 | * | |
543 | * Determine from taskfile register contents whether a device is | |
544 | * ATA or ATAPI, as per "Signature and persistence" section | |
545 | * of ATA/PI spec (volume 1, sect 5.14). | |
546 | * | |
547 | * LOCKING: | |
548 | * None. | |
549 | * | |
550 | * RETURNS: | |
551 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
552 | * the event of failure. | |
553 | */ | |
554 | ||
057ace5e | 555 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
556 | { |
557 | /* Apple's open source Darwin code hints that some devices only | |
558 | * put a proper signature into the LBA mid/high registers, | |
559 | * So, we only check those. It's sufficient for uniqueness. | |
560 | */ | |
561 | ||
562 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
563 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
564 | DPRINTK("found ATA device by sig\n"); | |
565 | return ATA_DEV_ATA; | |
566 | } | |
567 | ||
568 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
569 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
570 | DPRINTK("found ATAPI device by sig\n"); | |
571 | return ATA_DEV_ATAPI; | |
572 | } | |
573 | ||
574 | DPRINTK("unknown device\n"); | |
575 | return ATA_DEV_UNKNOWN; | |
576 | } | |
577 | ||
578 | /** | |
579 | * ata_dev_try_classify - Parse returned ATA device signature | |
580 | * @ap: ATA channel to examine | |
581 | * @device: Device to examine (starting at zero) | |
b4dc7623 | 582 | * @r_err: Value of error register on completion |
1da177e4 LT |
583 | * |
584 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
585 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
586 | * shadow registers, indicating the results of device detection | |
587 | * and diagnostics. | |
588 | * | |
589 | * Select the ATA device, and read the values from the ATA shadow | |
590 | * registers. Then parse according to the Error register value, | |
591 | * and the spec-defined values examined by ata_dev_classify(). | |
592 | * | |
593 | * LOCKING: | |
594 | * caller. | |
b4dc7623 TH |
595 | * |
596 | * RETURNS: | |
597 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 LT |
598 | */ |
599 | ||
b4dc7623 TH |
600 | static unsigned int |
601 | ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) | |
1da177e4 | 602 | { |
1da177e4 LT |
603 | struct ata_taskfile tf; |
604 | unsigned int class; | |
605 | u8 err; | |
606 | ||
607 | ap->ops->dev_select(ap, device); | |
608 | ||
609 | memset(&tf, 0, sizeof(tf)); | |
610 | ||
1da177e4 | 611 | ap->ops->tf_read(ap, &tf); |
0169e284 | 612 | err = tf.feature; |
b4dc7623 TH |
613 | if (r_err) |
614 | *r_err = err; | |
1da177e4 LT |
615 | |
616 | /* see if device passed diags */ | |
617 | if (err == 1) | |
618 | /* do nothing */ ; | |
619 | else if ((device == 0) && (err == 0x81)) | |
620 | /* do nothing */ ; | |
621 | else | |
b4dc7623 | 622 | return ATA_DEV_NONE; |
1da177e4 | 623 | |
b4dc7623 | 624 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 625 | class = ata_dev_classify(&tf); |
b4dc7623 | 626 | |
1da177e4 | 627 | if (class == ATA_DEV_UNKNOWN) |
b4dc7623 | 628 | return ATA_DEV_NONE; |
1da177e4 | 629 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) |
b4dc7623 TH |
630 | return ATA_DEV_NONE; |
631 | return class; | |
1da177e4 LT |
632 | } |
633 | ||
634 | /** | |
6a62a04d | 635 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
636 | * @id: IDENTIFY DEVICE results we will examine |
637 | * @s: string into which data is output | |
638 | * @ofs: offset into identify device page | |
639 | * @len: length of string to return. must be an even number. | |
640 | * | |
641 | * The strings in the IDENTIFY DEVICE page are broken up into | |
642 | * 16-bit chunks. Run through the string, and output each | |
643 | * 8-bit chunk linearly, regardless of platform. | |
644 | * | |
645 | * LOCKING: | |
646 | * caller. | |
647 | */ | |
648 | ||
6a62a04d TH |
649 | void ata_id_string(const u16 *id, unsigned char *s, |
650 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
651 | { |
652 | unsigned int c; | |
653 | ||
654 | while (len > 0) { | |
655 | c = id[ofs] >> 8; | |
656 | *s = c; | |
657 | s++; | |
658 | ||
659 | c = id[ofs] & 0xff; | |
660 | *s = c; | |
661 | s++; | |
662 | ||
663 | ofs++; | |
664 | len -= 2; | |
665 | } | |
666 | } | |
667 | ||
0e949ff3 | 668 | /** |
6a62a04d | 669 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
670 | * @id: IDENTIFY DEVICE results we will examine |
671 | * @s: string into which data is output | |
672 | * @ofs: offset into identify device page | |
673 | * @len: length of string to return. must be an odd number. | |
674 | * | |
6a62a04d | 675 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
676 | * trims trailing spaces and terminates the resulting string with |
677 | * null. @len must be actual maximum length (even number) + 1. | |
678 | * | |
679 | * LOCKING: | |
680 | * caller. | |
681 | */ | |
6a62a04d TH |
682 | void ata_id_c_string(const u16 *id, unsigned char *s, |
683 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
684 | { |
685 | unsigned char *p; | |
686 | ||
687 | WARN_ON(!(len & 1)); | |
688 | ||
6a62a04d | 689 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
690 | |
691 | p = s + strnlen(s, len - 1); | |
692 | while (p > s && p[-1] == ' ') | |
693 | p--; | |
694 | *p = '\0'; | |
695 | } | |
0baab86b | 696 | |
2940740b TH |
697 | static u64 ata_id_n_sectors(const u16 *id) |
698 | { | |
699 | if (ata_id_has_lba(id)) { | |
700 | if (ata_id_has_lba48(id)) | |
701 | return ata_id_u64(id, 100); | |
702 | else | |
703 | return ata_id_u32(id, 60); | |
704 | } else { | |
705 | if (ata_id_current_chs_valid(id)) | |
706 | return ata_id_u32(id, 57); | |
707 | else | |
708 | return id[1] * id[3] * id[6]; | |
709 | } | |
710 | } | |
711 | ||
0baab86b EF |
712 | /** |
713 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
714 | * @ap: ATA channel to manipulate | |
715 | * @device: ATA device (numbered from zero) to select | |
716 | * | |
717 | * This function performs no actual function. | |
718 | * | |
719 | * May be used as the dev_select() entry in ata_port_operations. | |
720 | * | |
721 | * LOCKING: | |
722 | * caller. | |
723 | */ | |
1da177e4 LT |
724 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
725 | { | |
726 | } | |
727 | ||
0baab86b | 728 | |
1da177e4 LT |
729 | /** |
730 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
731 | * @ap: ATA channel to manipulate | |
732 | * @device: ATA device (numbered from zero) to select | |
733 | * | |
734 | * Use the method defined in the ATA specification to | |
735 | * make either device 0, or device 1, active on the | |
0baab86b EF |
736 | * ATA channel. Works with both PIO and MMIO. |
737 | * | |
738 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
739 | * |
740 | * LOCKING: | |
741 | * caller. | |
742 | */ | |
743 | ||
744 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
745 | { | |
746 | u8 tmp; | |
747 | ||
748 | if (device == 0) | |
749 | tmp = ATA_DEVICE_OBS; | |
750 | else | |
751 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
752 | ||
753 | if (ap->flags & ATA_FLAG_MMIO) { | |
754 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
755 | } else { | |
756 | outb(tmp, ap->ioaddr.device_addr); | |
757 | } | |
758 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
759 | } | |
760 | ||
761 | /** | |
762 | * ata_dev_select - Select device 0/1 on ATA bus | |
763 | * @ap: ATA channel to manipulate | |
764 | * @device: ATA device (numbered from zero) to select | |
765 | * @wait: non-zero to wait for Status register BSY bit to clear | |
766 | * @can_sleep: non-zero if context allows sleeping | |
767 | * | |
768 | * Use the method defined in the ATA specification to | |
769 | * make either device 0, or device 1, active on the | |
770 | * ATA channel. | |
771 | * | |
772 | * This is a high-level version of ata_std_dev_select(), | |
773 | * which additionally provides the services of inserting | |
774 | * the proper pauses and status polling, where needed. | |
775 | * | |
776 | * LOCKING: | |
777 | * caller. | |
778 | */ | |
779 | ||
780 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
781 | unsigned int wait, unsigned int can_sleep) | |
782 | { | |
88574551 | 783 | if (ata_msg_probe(ap)) |
0dd4b21f | 784 | ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: " |
88574551 | 785 | "device %u, wait %u\n", ap->id, device, wait); |
1da177e4 LT |
786 | |
787 | if (wait) | |
788 | ata_wait_idle(ap); | |
789 | ||
790 | ap->ops->dev_select(ap, device); | |
791 | ||
792 | if (wait) { | |
793 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
794 | msleep(150); | |
795 | ata_wait_idle(ap); | |
796 | } | |
797 | } | |
798 | ||
799 | /** | |
800 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 801 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 802 | * |
0bd3300a TH |
803 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
804 | * page. | |
1da177e4 LT |
805 | * |
806 | * LOCKING: | |
807 | * caller. | |
808 | */ | |
809 | ||
0bd3300a | 810 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
811 | { |
812 | DPRINTK("49==0x%04x " | |
813 | "53==0x%04x " | |
814 | "63==0x%04x " | |
815 | "64==0x%04x " | |
816 | "75==0x%04x \n", | |
0bd3300a TH |
817 | id[49], |
818 | id[53], | |
819 | id[63], | |
820 | id[64], | |
821 | id[75]); | |
1da177e4 LT |
822 | DPRINTK("80==0x%04x " |
823 | "81==0x%04x " | |
824 | "82==0x%04x " | |
825 | "83==0x%04x " | |
826 | "84==0x%04x \n", | |
0bd3300a TH |
827 | id[80], |
828 | id[81], | |
829 | id[82], | |
830 | id[83], | |
831 | id[84]); | |
1da177e4 LT |
832 | DPRINTK("88==0x%04x " |
833 | "93==0x%04x\n", | |
0bd3300a TH |
834 | id[88], |
835 | id[93]); | |
1da177e4 LT |
836 | } |
837 | ||
cb95d562 TH |
838 | /** |
839 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
840 | * @id: IDENTIFY data to compute xfer mask from | |
841 | * | |
842 | * Compute the xfermask for this device. This is not as trivial | |
843 | * as it seems if we must consider early devices correctly. | |
844 | * | |
845 | * FIXME: pre IDE drive timing (do we care ?). | |
846 | * | |
847 | * LOCKING: | |
848 | * None. | |
849 | * | |
850 | * RETURNS: | |
851 | * Computed xfermask | |
852 | */ | |
853 | static unsigned int ata_id_xfermask(const u16 *id) | |
854 | { | |
855 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
856 | ||
857 | /* Usual case. Word 53 indicates word 64 is valid */ | |
858 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
859 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
860 | pio_mask <<= 3; | |
861 | pio_mask |= 0x7; | |
862 | } else { | |
863 | /* If word 64 isn't valid then Word 51 high byte holds | |
864 | * the PIO timing number for the maximum. Turn it into | |
865 | * a mask. | |
866 | */ | |
867 | pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | |
868 | ||
869 | /* But wait.. there's more. Design your standards by | |
870 | * committee and you too can get a free iordy field to | |
871 | * process. However its the speeds not the modes that | |
872 | * are supported... Note drivers using the timing API | |
873 | * will get this right anyway | |
874 | */ | |
875 | } | |
876 | ||
877 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
fb21f0d0 TH |
878 | |
879 | udma_mask = 0; | |
880 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
881 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
cb95d562 TH |
882 | |
883 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
884 | } | |
885 | ||
86e45b6b TH |
886 | /** |
887 | * ata_port_queue_task - Queue port_task | |
888 | * @ap: The ata_port to queue port_task for | |
e2a7f77a RD |
889 | * @fn: workqueue function to be scheduled |
890 | * @data: data value to pass to workqueue function | |
891 | * @delay: delay time for workqueue function | |
86e45b6b TH |
892 | * |
893 | * Schedule @fn(@data) for execution after @delay jiffies using | |
894 | * port_task. There is one port_task per port and it's the | |
895 | * user(low level driver)'s responsibility to make sure that only | |
896 | * one task is active at any given time. | |
897 | * | |
898 | * libata core layer takes care of synchronization between | |
899 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
900 | * synchronization. | |
901 | * | |
902 | * LOCKING: | |
903 | * Inherited from caller. | |
904 | */ | |
905 | void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data, | |
906 | unsigned long delay) | |
907 | { | |
908 | int rc; | |
909 | ||
b51e9e5d | 910 | if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK) |
86e45b6b TH |
911 | return; |
912 | ||
913 | PREPARE_WORK(&ap->port_task, fn, data); | |
914 | ||
915 | if (!delay) | |
916 | rc = queue_work(ata_wq, &ap->port_task); | |
917 | else | |
918 | rc = queue_delayed_work(ata_wq, &ap->port_task, delay); | |
919 | ||
920 | /* rc == 0 means that another user is using port task */ | |
921 | WARN_ON(rc == 0); | |
922 | } | |
923 | ||
924 | /** | |
925 | * ata_port_flush_task - Flush port_task | |
926 | * @ap: The ata_port to flush port_task for | |
927 | * | |
928 | * After this function completes, port_task is guranteed not to | |
929 | * be running or scheduled. | |
930 | * | |
931 | * LOCKING: | |
932 | * Kernel thread context (may sleep) | |
933 | */ | |
934 | void ata_port_flush_task(struct ata_port *ap) | |
935 | { | |
936 | unsigned long flags; | |
937 | ||
938 | DPRINTK("ENTER\n"); | |
939 | ||
ba6a1308 | 940 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 941 | ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK; |
ba6a1308 | 942 | spin_unlock_irqrestore(ap->lock, flags); |
86e45b6b TH |
943 | |
944 | DPRINTK("flush #1\n"); | |
945 | flush_workqueue(ata_wq); | |
946 | ||
947 | /* | |
948 | * At this point, if a task is running, it's guaranteed to see | |
949 | * the FLUSH flag; thus, it will never queue pio tasks again. | |
950 | * Cancel and flush. | |
951 | */ | |
952 | if (!cancel_delayed_work(&ap->port_task)) { | |
0dd4b21f | 953 | if (ata_msg_ctl(ap)) |
88574551 TH |
954 | ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n", |
955 | __FUNCTION__); | |
86e45b6b TH |
956 | flush_workqueue(ata_wq); |
957 | } | |
958 | ||
ba6a1308 | 959 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 960 | ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK; |
ba6a1308 | 961 | spin_unlock_irqrestore(ap->lock, flags); |
86e45b6b | 962 | |
0dd4b21f BP |
963 | if (ata_msg_ctl(ap)) |
964 | ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); | |
86e45b6b TH |
965 | } |
966 | ||
77853bf2 | 967 | void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 968 | { |
77853bf2 | 969 | struct completion *waiting = qc->private_data; |
a2a7a662 | 970 | |
a2a7a662 | 971 | complete(waiting); |
a2a7a662 TH |
972 | } |
973 | ||
974 | /** | |
975 | * ata_exec_internal - execute libata internal command | |
a2a7a662 TH |
976 | * @dev: Device to which the command is sent |
977 | * @tf: Taskfile registers for the command and the result | |
d69cf37d | 978 | * @cdb: CDB for packet command |
a2a7a662 TH |
979 | * @dma_dir: Data tranfer direction of the command |
980 | * @buf: Data buffer of the command | |
981 | * @buflen: Length of data buffer | |
982 | * | |
983 | * Executes libata internal command with timeout. @tf contains | |
984 | * command on entry and result on return. Timeout and error | |
985 | * conditions are reported via return value. No recovery action | |
986 | * is taken after a command times out. It's caller's duty to | |
987 | * clean up after timeout. | |
988 | * | |
989 | * LOCKING: | |
990 | * None. Should be called with kernel context, might sleep. | |
551e8889 TH |
991 | * |
992 | * RETURNS: | |
993 | * Zero on success, AC_ERR_* mask on failure | |
a2a7a662 | 994 | */ |
3373efd8 | 995 | unsigned ata_exec_internal(struct ata_device *dev, |
1ad8e7f9 TH |
996 | struct ata_taskfile *tf, const u8 *cdb, |
997 | int dma_dir, void *buf, unsigned int buflen) | |
a2a7a662 | 998 | { |
3373efd8 | 999 | struct ata_port *ap = dev->ap; |
a2a7a662 TH |
1000 | u8 command = tf->command; |
1001 | struct ata_queued_cmd *qc; | |
2ab7db1f | 1002 | unsigned int tag, preempted_tag; |
dedaf2b0 | 1003 | u32 preempted_sactive, preempted_qc_active; |
60be6b9a | 1004 | DECLARE_COMPLETION_ONSTACK(wait); |
a2a7a662 | 1005 | unsigned long flags; |
77853bf2 | 1006 | unsigned int err_mask; |
d95a717f | 1007 | int rc; |
a2a7a662 | 1008 | |
ba6a1308 | 1009 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 | 1010 | |
e3180499 | 1011 | /* no internal command while frozen */ |
b51e9e5d | 1012 | if (ap->pflags & ATA_PFLAG_FROZEN) { |
ba6a1308 | 1013 | spin_unlock_irqrestore(ap->lock, flags); |
e3180499 TH |
1014 | return AC_ERR_SYSTEM; |
1015 | } | |
1016 | ||
2ab7db1f | 1017 | /* initialize internal qc */ |
a2a7a662 | 1018 | |
2ab7db1f TH |
1019 | /* XXX: Tag 0 is used for drivers with legacy EH as some |
1020 | * drivers choke if any other tag is given. This breaks | |
1021 | * ata_tag_internal() test for those drivers. Don't use new | |
1022 | * EH stuff without converting to it. | |
1023 | */ | |
1024 | if (ap->ops->error_handler) | |
1025 | tag = ATA_TAG_INTERNAL; | |
1026 | else | |
1027 | tag = 0; | |
1028 | ||
6cec4a39 | 1029 | if (test_and_set_bit(tag, &ap->qc_allocated)) |
2ab7db1f | 1030 | BUG(); |
f69499f4 | 1031 | qc = __ata_qc_from_tag(ap, tag); |
2ab7db1f TH |
1032 | |
1033 | qc->tag = tag; | |
1034 | qc->scsicmd = NULL; | |
1035 | qc->ap = ap; | |
1036 | qc->dev = dev; | |
1037 | ata_qc_reinit(qc); | |
1038 | ||
1039 | preempted_tag = ap->active_tag; | |
dedaf2b0 TH |
1040 | preempted_sactive = ap->sactive; |
1041 | preempted_qc_active = ap->qc_active; | |
2ab7db1f | 1042 | ap->active_tag = ATA_TAG_POISON; |
dedaf2b0 TH |
1043 | ap->sactive = 0; |
1044 | ap->qc_active = 0; | |
2ab7db1f TH |
1045 | |
1046 | /* prepare & issue qc */ | |
a2a7a662 | 1047 | qc->tf = *tf; |
d69cf37d TH |
1048 | if (cdb) |
1049 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
e61e0672 | 1050 | qc->flags |= ATA_QCFLAG_RESULT_TF; |
a2a7a662 TH |
1051 | qc->dma_dir = dma_dir; |
1052 | if (dma_dir != DMA_NONE) { | |
1053 | ata_sg_init_one(qc, buf, buflen); | |
1054 | qc->nsect = buflen / ATA_SECT_SIZE; | |
1055 | } | |
1056 | ||
77853bf2 | 1057 | qc->private_data = &wait; |
a2a7a662 TH |
1058 | qc->complete_fn = ata_qc_complete_internal; |
1059 | ||
8e0e694a | 1060 | ata_qc_issue(qc); |
a2a7a662 | 1061 | |
ba6a1308 | 1062 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 | 1063 | |
a8601e5f | 1064 | rc = wait_for_completion_timeout(&wait, ata_probe_timeout); |
d95a717f TH |
1065 | |
1066 | ata_port_flush_task(ap); | |
41ade50c | 1067 | |
d95a717f | 1068 | if (!rc) { |
ba6a1308 | 1069 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 TH |
1070 | |
1071 | /* We're racing with irq here. If we lose, the | |
1072 | * following test prevents us from completing the qc | |
d95a717f TH |
1073 | * twice. If we win, the port is frozen and will be |
1074 | * cleaned up by ->post_internal_cmd(). | |
a2a7a662 | 1075 | */ |
77853bf2 | 1076 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
d95a717f TH |
1077 | qc->err_mask |= AC_ERR_TIMEOUT; |
1078 | ||
1079 | if (ap->ops->error_handler) | |
1080 | ata_port_freeze(ap); | |
1081 | else | |
1082 | ata_qc_complete(qc); | |
f15a1daf | 1083 | |
0dd4b21f BP |
1084 | if (ata_msg_warn(ap)) |
1085 | ata_dev_printk(dev, KERN_WARNING, | |
88574551 | 1086 | "qc timeout (cmd 0x%x)\n", command); |
a2a7a662 TH |
1087 | } |
1088 | ||
ba6a1308 | 1089 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 TH |
1090 | } |
1091 | ||
d95a717f TH |
1092 | /* do post_internal_cmd */ |
1093 | if (ap->ops->post_internal_cmd) | |
1094 | ap->ops->post_internal_cmd(qc); | |
1095 | ||
1096 | if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) { | |
0dd4b21f | 1097 | if (ata_msg_warn(ap)) |
88574551 | 1098 | ata_dev_printk(dev, KERN_WARNING, |
0dd4b21f | 1099 | "zero err_mask for failed " |
88574551 | 1100 | "internal command, assuming AC_ERR_OTHER\n"); |
d95a717f TH |
1101 | qc->err_mask |= AC_ERR_OTHER; |
1102 | } | |
1103 | ||
15869303 | 1104 | /* finish up */ |
ba6a1308 | 1105 | spin_lock_irqsave(ap->lock, flags); |
15869303 | 1106 | |
e61e0672 | 1107 | *tf = qc->result_tf; |
77853bf2 TH |
1108 | err_mask = qc->err_mask; |
1109 | ||
1110 | ata_qc_free(qc); | |
2ab7db1f | 1111 | ap->active_tag = preempted_tag; |
dedaf2b0 TH |
1112 | ap->sactive = preempted_sactive; |
1113 | ap->qc_active = preempted_qc_active; | |
77853bf2 | 1114 | |
1f7dd3e9 TH |
1115 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. |
1116 | * Until those drivers are fixed, we detect the condition | |
1117 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1118 | * port. | |
1119 | * | |
1120 | * Note that this doesn't change any behavior as internal | |
1121 | * command failure results in disabling the device in the | |
1122 | * higher layer for LLDDs without new reset/EH callbacks. | |
1123 | * | |
1124 | * Kill the following code as soon as those drivers are fixed. | |
1125 | */ | |
198e0fed | 1126 | if (ap->flags & ATA_FLAG_DISABLED) { |
1f7dd3e9 TH |
1127 | err_mask |= AC_ERR_SYSTEM; |
1128 | ata_port_probe(ap); | |
1129 | } | |
1130 | ||
ba6a1308 | 1131 | spin_unlock_irqrestore(ap->lock, flags); |
15869303 | 1132 | |
77853bf2 | 1133 | return err_mask; |
a2a7a662 TH |
1134 | } |
1135 | ||
977e6b9f TH |
1136 | /** |
1137 | * ata_do_simple_cmd - execute simple internal command | |
1138 | * @dev: Device to which the command is sent | |
1139 | * @cmd: Opcode to execute | |
1140 | * | |
1141 | * Execute a 'simple' command, that only consists of the opcode | |
1142 | * 'cmd' itself, without filling any other registers | |
1143 | * | |
1144 | * LOCKING: | |
1145 | * Kernel thread context (may sleep). | |
1146 | * | |
1147 | * RETURNS: | |
1148 | * Zero on success, AC_ERR_* mask on failure | |
e58eb583 | 1149 | */ |
77b08fb5 | 1150 | unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) |
e58eb583 TH |
1151 | { |
1152 | struct ata_taskfile tf; | |
e58eb583 TH |
1153 | |
1154 | ata_tf_init(dev, &tf); | |
1155 | ||
1156 | tf.command = cmd; | |
1157 | tf.flags |= ATA_TFLAG_DEVICE; | |
1158 | tf.protocol = ATA_PROT_NODATA; | |
1159 | ||
977e6b9f | 1160 | return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
e58eb583 TH |
1161 | } |
1162 | ||
1bc4ccff AC |
1163 | /** |
1164 | * ata_pio_need_iordy - check if iordy needed | |
1165 | * @adev: ATA device | |
1166 | * | |
1167 | * Check if the current speed of the device requires IORDY. Used | |
1168 | * by various controllers for chip configuration. | |
1169 | */ | |
1170 | ||
1171 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |
1172 | { | |
1173 | int pio; | |
1174 | int speed = adev->pio_mode - XFER_PIO_0; | |
1175 | ||
1176 | if (speed < 2) | |
1177 | return 0; | |
1178 | if (speed > 2) | |
1179 | return 1; | |
2e9edbf8 | 1180 | |
1bc4ccff AC |
1181 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ |
1182 | ||
1183 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ | |
1184 | pio = adev->id[ATA_ID_EIDE_PIO]; | |
1185 | /* Is the speed faster than the drive allows non IORDY ? */ | |
1186 | if (pio) { | |
1187 | /* This is cycle times not frequency - watch the logic! */ | |
1188 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
1189 | return 1; | |
1190 | return 0; | |
1191 | } | |
1192 | } | |
1193 | return 0; | |
1194 | } | |
1195 | ||
1da177e4 | 1196 | /** |
49016aca | 1197 | * ata_dev_read_id - Read ID data from the specified device |
49016aca TH |
1198 | * @dev: target device |
1199 | * @p_class: pointer to class of the target device (may be changed) | |
1200 | * @post_reset: is this read ID post-reset? | |
fe635c7e | 1201 | * @id: buffer to read IDENTIFY data into |
1da177e4 | 1202 | * |
49016aca TH |
1203 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1204 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
aec5c3c1 TH |
1205 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS |
1206 | * for pre-ATA4 drives. | |
1da177e4 LT |
1207 | * |
1208 | * LOCKING: | |
49016aca TH |
1209 | * Kernel thread context (may sleep) |
1210 | * | |
1211 | * RETURNS: | |
1212 | * 0 on success, -errno otherwise. | |
1da177e4 | 1213 | */ |
a9beec95 TH |
1214 | int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, |
1215 | int post_reset, u16 *id) | |
1da177e4 | 1216 | { |
3373efd8 | 1217 | struct ata_port *ap = dev->ap; |
49016aca | 1218 | unsigned int class = *p_class; |
a0123703 | 1219 | struct ata_taskfile tf; |
49016aca TH |
1220 | unsigned int err_mask = 0; |
1221 | const char *reason; | |
1222 | int rc; | |
1da177e4 | 1223 | |
0dd4b21f | 1224 | if (ata_msg_ctl(ap)) |
88574551 TH |
1225 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", |
1226 | __FUNCTION__, ap->id, dev->devno); | |
1da177e4 | 1227 | |
49016aca | 1228 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
1da177e4 | 1229 | |
49016aca | 1230 | retry: |
3373efd8 | 1231 | ata_tf_init(dev, &tf); |
a0123703 | 1232 | |
49016aca TH |
1233 | switch (class) { |
1234 | case ATA_DEV_ATA: | |
a0123703 | 1235 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1236 | break; |
1237 | case ATA_DEV_ATAPI: | |
a0123703 | 1238 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1239 | break; |
1240 | default: | |
1241 | rc = -ENODEV; | |
1242 | reason = "unsupported class"; | |
1243 | goto err_out; | |
1da177e4 LT |
1244 | } |
1245 | ||
a0123703 | 1246 | tf.protocol = ATA_PROT_PIO; |
1da177e4 | 1247 | |
3373efd8 | 1248 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, |
49016aca | 1249 | id, sizeof(id[0]) * ATA_ID_WORDS); |
a0123703 | 1250 | if (err_mask) { |
49016aca TH |
1251 | rc = -EIO; |
1252 | reason = "I/O error"; | |
1da177e4 LT |
1253 | goto err_out; |
1254 | } | |
1255 | ||
49016aca | 1256 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 | 1257 | |
49016aca | 1258 | /* sanity check */ |
692785e7 | 1259 | if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) { |
49016aca TH |
1260 | rc = -EINVAL; |
1261 | reason = "device reports illegal type"; | |
1262 | goto err_out; | |
1263 | } | |
1264 | ||
1265 | if (post_reset && class == ATA_DEV_ATA) { | |
1266 | /* | |
1267 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1268 | * SRST RESET | |
1269 | * IDENTIFY | |
1270 | * INITIALIZE DEVICE PARAMETERS | |
1271 | * anything else.. | |
1272 | * Some drives were very specific about that exact sequence. | |
1273 | */ | |
1274 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
3373efd8 | 1275 | err_mask = ata_dev_init_params(dev, id[3], id[6]); |
49016aca TH |
1276 | if (err_mask) { |
1277 | rc = -EIO; | |
1278 | reason = "INIT_DEV_PARAMS failed"; | |
1279 | goto err_out; | |
1280 | } | |
1281 | ||
1282 | /* current CHS translation info (id[53-58]) might be | |
1283 | * changed. reread the identify device info. | |
1284 | */ | |
1285 | post_reset = 0; | |
1286 | goto retry; | |
1287 | } | |
1288 | } | |
1289 | ||
1290 | *p_class = class; | |
fe635c7e | 1291 | |
49016aca TH |
1292 | return 0; |
1293 | ||
1294 | err_out: | |
88574551 | 1295 | if (ata_msg_warn(ap)) |
0dd4b21f | 1296 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " |
88574551 | 1297 | "(%s, err_mask=0x%x)\n", reason, err_mask); |
49016aca TH |
1298 | return rc; |
1299 | } | |
1300 | ||
3373efd8 | 1301 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
4b2f3ede | 1302 | { |
3373efd8 | 1303 | return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); |
4b2f3ede TH |
1304 | } |
1305 | ||
a6e6ce8e TH |
1306 | static void ata_dev_config_ncq(struct ata_device *dev, |
1307 | char *desc, size_t desc_sz) | |
1308 | { | |
1309 | struct ata_port *ap = dev->ap; | |
1310 | int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); | |
1311 | ||
1312 | if (!ata_id_has_ncq(dev->id)) { | |
1313 | desc[0] = '\0'; | |
1314 | return; | |
1315 | } | |
1316 | ||
1317 | if (ap->flags & ATA_FLAG_NCQ) { | |
1318 | hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1); | |
1319 | dev->flags |= ATA_DFLAG_NCQ; | |
1320 | } | |
1321 | ||
1322 | if (hdepth >= ddepth) | |
1323 | snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); | |
1324 | else | |
1325 | snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); | |
1326 | } | |
1327 | ||
e6d902a3 BK |
1328 | static void ata_set_port_max_cmd_len(struct ata_port *ap) |
1329 | { | |
1330 | int i; | |
1331 | ||
1332 | if (ap->host) { | |
1333 | ap->host->max_cmd_len = 0; | |
1334 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1335 | ap->host->max_cmd_len = max_t(unsigned int, | |
1336 | ap->host->max_cmd_len, | |
1337 | ap->device[i].cdb_len); | |
1338 | } | |
1339 | } | |
1340 | ||
49016aca | 1341 | /** |
ffeae418 | 1342 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
ffeae418 | 1343 | * @dev: Target device to configure |
4c2d721a | 1344 | * @print_info: Enable device info printout |
ffeae418 TH |
1345 | * |
1346 | * Configure @dev according to @dev->id. Generic and low-level | |
1347 | * driver specific fixups are also applied. | |
49016aca TH |
1348 | * |
1349 | * LOCKING: | |
ffeae418 TH |
1350 | * Kernel thread context (may sleep) |
1351 | * | |
1352 | * RETURNS: | |
1353 | * 0 on success, -errno otherwise | |
49016aca | 1354 | */ |
a9beec95 | 1355 | int ata_dev_configure(struct ata_device *dev, int print_info) |
49016aca | 1356 | { |
3373efd8 | 1357 | struct ata_port *ap = dev->ap; |
1148c3a7 | 1358 | const u16 *id = dev->id; |
ff8854b2 | 1359 | unsigned int xfer_mask; |
e6d902a3 | 1360 | int rc; |
49016aca | 1361 | |
0dd4b21f | 1362 | if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { |
88574551 TH |
1363 | ata_dev_printk(dev, KERN_INFO, |
1364 | "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1365 | __FUNCTION__, ap->id, dev->devno); | |
ffeae418 | 1366 | return 0; |
49016aca TH |
1367 | } |
1368 | ||
0dd4b21f | 1369 | if (ata_msg_probe(ap)) |
88574551 TH |
1370 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n", |
1371 | __FUNCTION__, ap->id, dev->devno); | |
1da177e4 | 1372 | |
c39f5ebe | 1373 | /* print device capabilities */ |
0dd4b21f | 1374 | if (ata_msg_probe(ap)) |
88574551 TH |
1375 | ata_dev_printk(dev, KERN_DEBUG, |
1376 | "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " | |
1377 | "85:%04x 86:%04x 87:%04x 88:%04x\n", | |
0dd4b21f | 1378 | __FUNCTION__, |
f15a1daf TH |
1379 | id[49], id[82], id[83], id[84], |
1380 | id[85], id[86], id[87], id[88]); | |
c39f5ebe | 1381 | |
208a9933 | 1382 | /* initialize to-be-configured parameters */ |
ea1dd4e1 | 1383 | dev->flags &= ~ATA_DFLAG_CFG_MASK; |
208a9933 TH |
1384 | dev->max_sectors = 0; |
1385 | dev->cdb_len = 0; | |
1386 | dev->n_sectors = 0; | |
1387 | dev->cylinders = 0; | |
1388 | dev->heads = 0; | |
1389 | dev->sectors = 0; | |
1390 | ||
1da177e4 LT |
1391 | /* |
1392 | * common ATA, ATAPI feature tests | |
1393 | */ | |
1394 | ||
ff8854b2 | 1395 | /* find max transfer mode; for printk only */ |
1148c3a7 | 1396 | xfer_mask = ata_id_xfermask(id); |
1da177e4 | 1397 | |
0dd4b21f BP |
1398 | if (ata_msg_probe(ap)) |
1399 | ata_dump_id(id); | |
1da177e4 LT |
1400 | |
1401 | /* ATA-specific feature tests */ | |
1402 | if (dev->class == ATA_DEV_ATA) { | |
1148c3a7 | 1403 | dev->n_sectors = ata_id_n_sectors(id); |
2940740b | 1404 | |
1148c3a7 | 1405 | if (ata_id_has_lba(id)) { |
4c2d721a | 1406 | const char *lba_desc; |
a6e6ce8e | 1407 | char ncq_desc[20]; |
8bf62ece | 1408 | |
4c2d721a TH |
1409 | lba_desc = "LBA"; |
1410 | dev->flags |= ATA_DFLAG_LBA; | |
1148c3a7 | 1411 | if (ata_id_has_lba48(id)) { |
8bf62ece | 1412 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a TH |
1413 | lba_desc = "LBA48"; |
1414 | } | |
8bf62ece | 1415 | |
a6e6ce8e TH |
1416 | /* config NCQ */ |
1417 | ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); | |
1418 | ||
8bf62ece | 1419 | /* print device info to dmesg */ |
5afc8142 | 1420 | if (ata_msg_drv(ap) && print_info) |
f15a1daf | 1421 | ata_dev_printk(dev, KERN_INFO, "ATA-%d, " |
a6e6ce8e | 1422 | "max %s, %Lu sectors: %s %s\n", |
f15a1daf TH |
1423 | ata_id_major_version(id), |
1424 | ata_mode_string(xfer_mask), | |
1425 | (unsigned long long)dev->n_sectors, | |
a6e6ce8e | 1426 | lba_desc, ncq_desc); |
ffeae418 | 1427 | } else { |
8bf62ece AL |
1428 | /* CHS */ |
1429 | ||
1430 | /* Default translation */ | |
1148c3a7 TH |
1431 | dev->cylinders = id[1]; |
1432 | dev->heads = id[3]; | |
1433 | dev->sectors = id[6]; | |
8bf62ece | 1434 | |
1148c3a7 | 1435 | if (ata_id_current_chs_valid(id)) { |
8bf62ece | 1436 | /* Current CHS translation is valid. */ |
1148c3a7 TH |
1437 | dev->cylinders = id[54]; |
1438 | dev->heads = id[55]; | |
1439 | dev->sectors = id[56]; | |
8bf62ece AL |
1440 | } |
1441 | ||
1442 | /* print device info to dmesg */ | |
5afc8142 | 1443 | if (ata_msg_drv(ap) && print_info) |
f15a1daf TH |
1444 | ata_dev_printk(dev, KERN_INFO, "ATA-%d, " |
1445 | "max %s, %Lu sectors: CHS %u/%u/%u\n", | |
1446 | ata_id_major_version(id), | |
1447 | ata_mode_string(xfer_mask), | |
1448 | (unsigned long long)dev->n_sectors, | |
88574551 TH |
1449 | dev->cylinders, dev->heads, |
1450 | dev->sectors); | |
1da177e4 LT |
1451 | } |
1452 | ||
07f6f7d0 AL |
1453 | if (dev->id[59] & 0x100) { |
1454 | dev->multi_count = dev->id[59] & 0xff; | |
5afc8142 | 1455 | if (ata_msg_drv(ap) && print_info) |
88574551 TH |
1456 | ata_dev_printk(dev, KERN_INFO, |
1457 | "ata%u: dev %u multi count %u\n", | |
1458 | ap->id, dev->devno, dev->multi_count); | |
07f6f7d0 AL |
1459 | } |
1460 | ||
6e7846e9 | 1461 | dev->cdb_len = 16; |
1da177e4 LT |
1462 | } |
1463 | ||
1464 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1465 | else if (dev->class == ATA_DEV_ATAPI) { |
08a556db AL |
1466 | char *cdb_intr_string = ""; |
1467 | ||
1148c3a7 | 1468 | rc = atapi_cdb_len(id); |
1da177e4 | 1469 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
0dd4b21f | 1470 | if (ata_msg_warn(ap)) |
88574551 TH |
1471 | ata_dev_printk(dev, KERN_WARNING, |
1472 | "unsupported CDB len\n"); | |
ffeae418 | 1473 | rc = -EINVAL; |
1da177e4 LT |
1474 | goto err_out_nosup; |
1475 | } | |
6e7846e9 | 1476 | dev->cdb_len = (unsigned int) rc; |
1da177e4 | 1477 | |
08a556db | 1478 | if (ata_id_cdb_intr(dev->id)) { |
312f7da2 | 1479 | dev->flags |= ATA_DFLAG_CDB_INTR; |
08a556db AL |
1480 | cdb_intr_string = ", CDB intr"; |
1481 | } | |
312f7da2 | 1482 | |
1da177e4 | 1483 | /* print device info to dmesg */ |
5afc8142 | 1484 | if (ata_msg_drv(ap) && print_info) |
12436c30 TH |
1485 | ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n", |
1486 | ata_mode_string(xfer_mask), | |
1487 | cdb_intr_string); | |
1da177e4 LT |
1488 | } |
1489 | ||
e6d902a3 | 1490 | ata_set_port_max_cmd_len(ap); |
6e7846e9 | 1491 | |
4b2f3ede | 1492 | /* limit bridge transfers to udma5, 200 sectors */ |
3373efd8 | 1493 | if (ata_dev_knobble(dev)) { |
5afc8142 | 1494 | if (ata_msg_drv(ap) && print_info) |
f15a1daf TH |
1495 | ata_dev_printk(dev, KERN_INFO, |
1496 | "applying bridge limits\n"); | |
5a529139 | 1497 | dev->udma_mask &= ATA_UDMA5; |
4b2f3ede TH |
1498 | dev->max_sectors = ATA_MAX_SECTORS; |
1499 | } | |
1500 | ||
1501 | if (ap->ops->dev_config) | |
1502 | ap->ops->dev_config(ap, dev); | |
1503 | ||
0dd4b21f BP |
1504 | if (ata_msg_probe(ap)) |
1505 | ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", | |
1506 | __FUNCTION__, ata_chk_status(ap)); | |
ffeae418 | 1507 | return 0; |
1da177e4 LT |
1508 | |
1509 | err_out_nosup: | |
0dd4b21f | 1510 | if (ata_msg_probe(ap)) |
88574551 TH |
1511 | ata_dev_printk(dev, KERN_DEBUG, |
1512 | "%s: EXIT, err\n", __FUNCTION__); | |
ffeae418 | 1513 | return rc; |
1da177e4 LT |
1514 | } |
1515 | ||
1516 | /** | |
1517 | * ata_bus_probe - Reset and probe ATA bus | |
1518 | * @ap: Bus to probe | |
1519 | * | |
0cba632b JG |
1520 | * Master ATA bus probing function. Initiates a hardware-dependent |
1521 | * bus reset, then attempts to identify any devices found on | |
1522 | * the bus. | |
1523 | * | |
1da177e4 | 1524 | * LOCKING: |
0cba632b | 1525 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1526 | * |
1527 | * RETURNS: | |
96072e69 | 1528 | * Zero on success, negative errno otherwise. |
1da177e4 LT |
1529 | */ |
1530 | ||
80289167 | 1531 | int ata_bus_probe(struct ata_port *ap) |
1da177e4 | 1532 | { |
28ca5c57 | 1533 | unsigned int classes[ATA_MAX_DEVICES]; |
14d2bac1 TH |
1534 | int tries[ATA_MAX_DEVICES]; |
1535 | int i, rc, down_xfermask; | |
e82cbdb9 | 1536 | struct ata_device *dev; |
1da177e4 | 1537 | |
28ca5c57 | 1538 | ata_port_probe(ap); |
c19ba8af | 1539 | |
14d2bac1 TH |
1540 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1541 | tries[i] = ATA_PROBE_MAX_TRIES; | |
1542 | ||
1543 | retry: | |
1544 | down_xfermask = 0; | |
1545 | ||
2044470c | 1546 | /* reset and determine device classes */ |
52783c5d | 1547 | ap->ops->phy_reset(ap); |
2061a47a | 1548 | |
52783c5d TH |
1549 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
1550 | dev = &ap->device[i]; | |
c19ba8af | 1551 | |
52783c5d TH |
1552 | if (!(ap->flags & ATA_FLAG_DISABLED) && |
1553 | dev->class != ATA_DEV_UNKNOWN) | |
1554 | classes[dev->devno] = dev->class; | |
1555 | else | |
1556 | classes[dev->devno] = ATA_DEV_NONE; | |
2044470c | 1557 | |
52783c5d | 1558 | dev->class = ATA_DEV_UNKNOWN; |
28ca5c57 | 1559 | } |
1da177e4 | 1560 | |
52783c5d | 1561 | ata_port_probe(ap); |
2044470c | 1562 | |
b6079ca4 AC |
1563 | /* after the reset the device state is PIO 0 and the controller |
1564 | state is undefined. Record the mode */ | |
1565 | ||
1566 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1567 | ap->device[i].pio_mode = XFER_PIO_0; | |
1568 | ||
28ca5c57 | 1569 | /* read IDENTIFY page and configure devices */ |
1da177e4 | 1570 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e82cbdb9 | 1571 | dev = &ap->device[i]; |
28ca5c57 | 1572 | |
ec573755 TH |
1573 | if (tries[i]) |
1574 | dev->class = classes[i]; | |
ffeae418 | 1575 | |
14d2bac1 | 1576 | if (!ata_dev_enabled(dev)) |
ffeae418 | 1577 | continue; |
ffeae418 | 1578 | |
3373efd8 | 1579 | rc = ata_dev_read_id(dev, &dev->class, 1, dev->id); |
14d2bac1 TH |
1580 | if (rc) |
1581 | goto fail; | |
1582 | ||
3373efd8 | 1583 | rc = ata_dev_configure(dev, 1); |
14d2bac1 TH |
1584 | if (rc) |
1585 | goto fail; | |
1da177e4 LT |
1586 | } |
1587 | ||
e82cbdb9 | 1588 | /* configure transfer mode */ |
3adcebb2 | 1589 | rc = ata_set_mode(ap, &dev); |
51713d35 TH |
1590 | if (rc) { |
1591 | down_xfermask = 1; | |
1592 | goto fail; | |
e82cbdb9 | 1593 | } |
1da177e4 | 1594 | |
e82cbdb9 TH |
1595 | for (i = 0; i < ATA_MAX_DEVICES; i++) |
1596 | if (ata_dev_enabled(&ap->device[i])) | |
1597 | return 0; | |
1da177e4 | 1598 | |
e82cbdb9 TH |
1599 | /* no device present, disable port */ |
1600 | ata_port_disable(ap); | |
1da177e4 | 1601 | ap->ops->port_disable(ap); |
96072e69 | 1602 | return -ENODEV; |
14d2bac1 TH |
1603 | |
1604 | fail: | |
1605 | switch (rc) { | |
1606 | case -EINVAL: | |
1607 | case -ENODEV: | |
1608 | tries[dev->devno] = 0; | |
1609 | break; | |
1610 | case -EIO: | |
3c567b7d | 1611 | sata_down_spd_limit(ap); |
14d2bac1 TH |
1612 | /* fall through */ |
1613 | default: | |
1614 | tries[dev->devno]--; | |
1615 | if (down_xfermask && | |
3373efd8 | 1616 | ata_down_xfermask_limit(dev, tries[dev->devno] == 1)) |
14d2bac1 TH |
1617 | tries[dev->devno] = 0; |
1618 | } | |
1619 | ||
ec573755 | 1620 | if (!tries[dev->devno]) { |
3373efd8 TH |
1621 | ata_down_xfermask_limit(dev, 1); |
1622 | ata_dev_disable(dev); | |
ec573755 TH |
1623 | } |
1624 | ||
14d2bac1 | 1625 | goto retry; |
1da177e4 LT |
1626 | } |
1627 | ||
1628 | /** | |
0cba632b JG |
1629 | * ata_port_probe - Mark port as enabled |
1630 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1631 | * |
0cba632b JG |
1632 | * Modify @ap data structure such that the system |
1633 | * thinks that the entire port is enabled. | |
1634 | * | |
1635 | * LOCKING: host_set lock, or some other form of | |
1636 | * serialization. | |
1da177e4 LT |
1637 | */ |
1638 | ||
1639 | void ata_port_probe(struct ata_port *ap) | |
1640 | { | |
198e0fed | 1641 | ap->flags &= ~ATA_FLAG_DISABLED; |
1da177e4 LT |
1642 | } |
1643 | ||
3be680b7 TH |
1644 | /** |
1645 | * sata_print_link_status - Print SATA link status | |
1646 | * @ap: SATA port to printk link status about | |
1647 | * | |
1648 | * This function prints link speed and status of a SATA link. | |
1649 | * | |
1650 | * LOCKING: | |
1651 | * None. | |
1652 | */ | |
1653 | static void sata_print_link_status(struct ata_port *ap) | |
1654 | { | |
6d5f9732 | 1655 | u32 sstatus, scontrol, tmp; |
3be680b7 | 1656 | |
81952c54 | 1657 | if (sata_scr_read(ap, SCR_STATUS, &sstatus)) |
3be680b7 | 1658 | return; |
81952c54 | 1659 | sata_scr_read(ap, SCR_CONTROL, &scontrol); |
3be680b7 | 1660 | |
81952c54 | 1661 | if (ata_port_online(ap)) { |
3be680b7 | 1662 | tmp = (sstatus >> 4) & 0xf; |
f15a1daf TH |
1663 | ata_port_printk(ap, KERN_INFO, |
1664 | "SATA link up %s (SStatus %X SControl %X)\n", | |
1665 | sata_spd_string(tmp), sstatus, scontrol); | |
3be680b7 | 1666 | } else { |
f15a1daf TH |
1667 | ata_port_printk(ap, KERN_INFO, |
1668 | "SATA link down (SStatus %X SControl %X)\n", | |
1669 | sstatus, scontrol); | |
3be680b7 TH |
1670 | } |
1671 | } | |
1672 | ||
1da177e4 | 1673 | /** |
780a87f7 JG |
1674 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1675 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1676 | * |
780a87f7 JG |
1677 | * This function issues commands to standard SATA Sxxx |
1678 | * PHY registers, to wake up the phy (and device), and | |
1679 | * clear any reset condition. | |
1da177e4 LT |
1680 | * |
1681 | * LOCKING: | |
0cba632b | 1682 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1683 | * |
1684 | */ | |
1685 | void __sata_phy_reset(struct ata_port *ap) | |
1686 | { | |
1687 | u32 sstatus; | |
1688 | unsigned long timeout = jiffies + (HZ * 5); | |
1689 | ||
1690 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e | 1691 | /* issue phy wake/reset */ |
81952c54 | 1692 | sata_scr_write_flush(ap, SCR_CONTROL, 0x301); |
62ba2841 TH |
1693 | /* Couldn't find anything in SATA I/II specs, but |
1694 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1695 | mdelay(1); | |
1da177e4 | 1696 | } |
81952c54 TH |
1697 | /* phy wake/clear reset */ |
1698 | sata_scr_write_flush(ap, SCR_CONTROL, 0x300); | |
1da177e4 LT |
1699 | |
1700 | /* wait for phy to become ready, if necessary */ | |
1701 | do { | |
1702 | msleep(200); | |
81952c54 | 1703 | sata_scr_read(ap, SCR_STATUS, &sstatus); |
1da177e4 LT |
1704 | if ((sstatus & 0xf) != 1) |
1705 | break; | |
1706 | } while (time_before(jiffies, timeout)); | |
1707 | ||
3be680b7 TH |
1708 | /* print link status */ |
1709 | sata_print_link_status(ap); | |
656563e3 | 1710 | |
3be680b7 | 1711 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 1712 | if (!ata_port_offline(ap)) |
1da177e4 | 1713 | ata_port_probe(ap); |
3be680b7 | 1714 | else |
1da177e4 | 1715 | ata_port_disable(ap); |
1da177e4 | 1716 | |
198e0fed | 1717 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
1718 | return; |
1719 | ||
1720 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1721 | ata_port_disable(ap); | |
1722 | return; | |
1723 | } | |
1724 | ||
1725 | ap->cbl = ATA_CBL_SATA; | |
1726 | } | |
1727 | ||
1728 | /** | |
780a87f7 JG |
1729 | * sata_phy_reset - Reset SATA bus. |
1730 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1731 | * |
780a87f7 JG |
1732 | * This function resets the SATA bus, and then probes |
1733 | * the bus for devices. | |
1da177e4 LT |
1734 | * |
1735 | * LOCKING: | |
0cba632b | 1736 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1737 | * |
1738 | */ | |
1739 | void sata_phy_reset(struct ata_port *ap) | |
1740 | { | |
1741 | __sata_phy_reset(ap); | |
198e0fed | 1742 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
1743 | return; |
1744 | ata_bus_reset(ap); | |
1745 | } | |
1746 | ||
ebdfca6e AC |
1747 | /** |
1748 | * ata_dev_pair - return other device on cable | |
ebdfca6e AC |
1749 | * @adev: device |
1750 | * | |
1751 | * Obtain the other device on the same cable, or if none is | |
1752 | * present NULL is returned | |
1753 | */ | |
2e9edbf8 | 1754 | |
3373efd8 | 1755 | struct ata_device *ata_dev_pair(struct ata_device *adev) |
ebdfca6e | 1756 | { |
3373efd8 | 1757 | struct ata_port *ap = adev->ap; |
ebdfca6e | 1758 | struct ata_device *pair = &ap->device[1 - adev->devno]; |
e1211e3f | 1759 | if (!ata_dev_enabled(pair)) |
ebdfca6e AC |
1760 | return NULL; |
1761 | return pair; | |
1762 | } | |
1763 | ||
1da177e4 | 1764 | /** |
780a87f7 JG |
1765 | * ata_port_disable - Disable port. |
1766 | * @ap: Port to be disabled. | |
1da177e4 | 1767 | * |
780a87f7 JG |
1768 | * Modify @ap data structure such that the system |
1769 | * thinks that the entire port is disabled, and should | |
1770 | * never attempt to probe or communicate with devices | |
1771 | * on this port. | |
1772 | * | |
1773 | * LOCKING: host_set lock, or some other form of | |
1774 | * serialization. | |
1da177e4 LT |
1775 | */ |
1776 | ||
1777 | void ata_port_disable(struct ata_port *ap) | |
1778 | { | |
1779 | ap->device[0].class = ATA_DEV_NONE; | |
1780 | ap->device[1].class = ATA_DEV_NONE; | |
198e0fed | 1781 | ap->flags |= ATA_FLAG_DISABLED; |
1da177e4 LT |
1782 | } |
1783 | ||
1c3fae4d | 1784 | /** |
3c567b7d | 1785 | * sata_down_spd_limit - adjust SATA spd limit downward |
1c3fae4d TH |
1786 | * @ap: Port to adjust SATA spd limit for |
1787 | * | |
1788 | * Adjust SATA spd limit of @ap downward. Note that this | |
1789 | * function only adjusts the limit. The change must be applied | |
3c567b7d | 1790 | * using sata_set_spd(). |
1c3fae4d TH |
1791 | * |
1792 | * LOCKING: | |
1793 | * Inherited from caller. | |
1794 | * | |
1795 | * RETURNS: | |
1796 | * 0 on success, negative errno on failure | |
1797 | */ | |
3c567b7d | 1798 | int sata_down_spd_limit(struct ata_port *ap) |
1c3fae4d | 1799 | { |
81952c54 TH |
1800 | u32 sstatus, spd, mask; |
1801 | int rc, highbit; | |
1c3fae4d | 1802 | |
81952c54 TH |
1803 | rc = sata_scr_read(ap, SCR_STATUS, &sstatus); |
1804 | if (rc) | |
1805 | return rc; | |
1c3fae4d TH |
1806 | |
1807 | mask = ap->sata_spd_limit; | |
1808 | if (mask <= 1) | |
1809 | return -EINVAL; | |
1810 | highbit = fls(mask) - 1; | |
1811 | mask &= ~(1 << highbit); | |
1812 | ||
81952c54 | 1813 | spd = (sstatus >> 4) & 0xf; |
1c3fae4d TH |
1814 | if (spd <= 1) |
1815 | return -EINVAL; | |
1816 | spd--; | |
1817 | mask &= (1 << spd) - 1; | |
1818 | if (!mask) | |
1819 | return -EINVAL; | |
1820 | ||
1821 | ap->sata_spd_limit = mask; | |
1822 | ||
f15a1daf TH |
1823 | ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", |
1824 | sata_spd_string(fls(mask))); | |
1c3fae4d TH |
1825 | |
1826 | return 0; | |
1827 | } | |
1828 | ||
3c567b7d | 1829 | static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) |
1c3fae4d TH |
1830 | { |
1831 | u32 spd, limit; | |
1832 | ||
1833 | if (ap->sata_spd_limit == UINT_MAX) | |
1834 | limit = 0; | |
1835 | else | |
1836 | limit = fls(ap->sata_spd_limit); | |
1837 | ||
1838 | spd = (*scontrol >> 4) & 0xf; | |
1839 | *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); | |
1840 | ||
1841 | return spd != limit; | |
1842 | } | |
1843 | ||
1844 | /** | |
3c567b7d | 1845 | * sata_set_spd_needed - is SATA spd configuration needed |
1c3fae4d TH |
1846 | * @ap: Port in question |
1847 | * | |
1848 | * Test whether the spd limit in SControl matches | |
1849 | * @ap->sata_spd_limit. This function is used to determine | |
1850 | * whether hardreset is necessary to apply SATA spd | |
1851 | * configuration. | |
1852 | * | |
1853 | * LOCKING: | |
1854 | * Inherited from caller. | |
1855 | * | |
1856 | * RETURNS: | |
1857 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
1858 | */ | |
3c567b7d | 1859 | int sata_set_spd_needed(struct ata_port *ap) |
1c3fae4d TH |
1860 | { |
1861 | u32 scontrol; | |
1862 | ||
81952c54 | 1863 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) |
1c3fae4d TH |
1864 | return 0; |
1865 | ||
3c567b7d | 1866 | return __sata_set_spd_needed(ap, &scontrol); |
1c3fae4d TH |
1867 | } |
1868 | ||
1869 | /** | |
3c567b7d | 1870 | * sata_set_spd - set SATA spd according to spd limit |
1c3fae4d TH |
1871 | * @ap: Port to set SATA spd for |
1872 | * | |
1873 | * Set SATA spd of @ap according to sata_spd_limit. | |
1874 | * | |
1875 | * LOCKING: | |
1876 | * Inherited from caller. | |
1877 | * | |
1878 | * RETURNS: | |
1879 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
81952c54 | 1880 | * changed. Negative errno if SCR registers are inaccessible. |
1c3fae4d | 1881 | */ |
3c567b7d | 1882 | int sata_set_spd(struct ata_port *ap) |
1c3fae4d TH |
1883 | { |
1884 | u32 scontrol; | |
81952c54 | 1885 | int rc; |
1c3fae4d | 1886 | |
81952c54 TH |
1887 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
1888 | return rc; | |
1c3fae4d | 1889 | |
3c567b7d | 1890 | if (!__sata_set_spd_needed(ap, &scontrol)) |
1c3fae4d TH |
1891 | return 0; |
1892 | ||
81952c54 TH |
1893 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) |
1894 | return rc; | |
1895 | ||
1c3fae4d TH |
1896 | return 1; |
1897 | } | |
1898 | ||
452503f9 AC |
1899 | /* |
1900 | * This mode timing computation functionality is ported over from | |
1901 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
1902 | */ | |
1903 | /* | |
1904 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | |
1905 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | |
1906 | * for PIO 5, which is a nonstandard extension and UDMA6, which | |
2e9edbf8 | 1907 | * is currently supported only by Maxtor drives. |
452503f9 AC |
1908 | */ |
1909 | ||
1910 | static const struct ata_timing ata_timing[] = { | |
1911 | ||
1912 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
1913 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
1914 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
1915 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
1916 | ||
1917 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, | |
1918 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
1919 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
1920 | ||
1921 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2e9edbf8 | 1922 | |
452503f9 AC |
1923 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, |
1924 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
1925 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2e9edbf8 | 1926 | |
452503f9 AC |
1927 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, |
1928 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
1929 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
1930 | ||
1931 | /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */ | |
1932 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, | |
1933 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
1934 | ||
1935 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
1936 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
1937 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
1938 | ||
1939 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
1940 | ||
1941 | { 0xFF } | |
1942 | }; | |
1943 | ||
1944 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
1945 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
1946 | ||
1947 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
1948 | { | |
1949 | q->setup = EZ(t->setup * 1000, T); | |
1950 | q->act8b = EZ(t->act8b * 1000, T); | |
1951 | q->rec8b = EZ(t->rec8b * 1000, T); | |
1952 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
1953 | q->active = EZ(t->active * 1000, T); | |
1954 | q->recover = EZ(t->recover * 1000, T); | |
1955 | q->cycle = EZ(t->cycle * 1000, T); | |
1956 | q->udma = EZ(t->udma * 1000, UT); | |
1957 | } | |
1958 | ||
1959 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
1960 | struct ata_timing *m, unsigned int what) | |
1961 | { | |
1962 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
1963 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
1964 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
1965 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
1966 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
1967 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
1968 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
1969 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
1970 | } | |
1971 | ||
1972 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
1973 | { | |
1974 | const struct ata_timing *t; | |
1975 | ||
1976 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 1977 | if (t->mode == 0xFF) |
452503f9 | 1978 | return NULL; |
2e9edbf8 | 1979 | return t; |
452503f9 AC |
1980 | } |
1981 | ||
1982 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
1983 | struct ata_timing *t, int T, int UT) | |
1984 | { | |
1985 | const struct ata_timing *s; | |
1986 | struct ata_timing p; | |
1987 | ||
1988 | /* | |
2e9edbf8 | 1989 | * Find the mode. |
75b1f2f8 | 1990 | */ |
452503f9 AC |
1991 | |
1992 | if (!(s = ata_timing_find_mode(speed))) | |
1993 | return -EINVAL; | |
1994 | ||
75b1f2f8 AL |
1995 | memcpy(t, s, sizeof(*s)); |
1996 | ||
452503f9 AC |
1997 | /* |
1998 | * If the drive is an EIDE drive, it can tell us it needs extended | |
1999 | * PIO/MW_DMA cycle timing. | |
2000 | */ | |
2001 | ||
2002 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
2003 | memset(&p, 0, sizeof(p)); | |
2004 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
2005 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
2006 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
2007 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
2008 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
2009 | } | |
2010 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
2011 | } | |
2012 | ||
2013 | /* | |
2014 | * Convert the timing to bus clock counts. | |
2015 | */ | |
2016 | ||
75b1f2f8 | 2017 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
2018 | |
2019 | /* | |
c893a3ae RD |
2020 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
2021 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
2022 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
2023 | */ |
2024 | ||
2025 | if (speed > XFER_PIO_4) { | |
2026 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
2027 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
2028 | } | |
2029 | ||
2030 | /* | |
c893a3ae | 2031 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
2032 | */ |
2033 | ||
2034 | if (t->act8b + t->rec8b < t->cyc8b) { | |
2035 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
2036 | t->rec8b = t->cyc8b - t->act8b; | |
2037 | } | |
2038 | ||
2039 | if (t->active + t->recover < t->cycle) { | |
2040 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
2041 | t->recover = t->cycle - t->active; | |
2042 | } | |
2043 | ||
2044 | return 0; | |
2045 | } | |
2046 | ||
cf176e1a TH |
2047 | /** |
2048 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
cf176e1a TH |
2049 | * @dev: Device to adjust xfer masks |
2050 | * @force_pio0: Force PIO0 | |
2051 | * | |
2052 | * Adjust xfer masks of @dev downward. Note that this function | |
2053 | * does not apply the change. Invoking ata_set_mode() afterwards | |
2054 | * will apply the limit. | |
2055 | * | |
2056 | * LOCKING: | |
2057 | * Inherited from caller. | |
2058 | * | |
2059 | * RETURNS: | |
2060 | * 0 on success, negative errno on failure | |
2061 | */ | |
3373efd8 | 2062 | int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0) |
cf176e1a TH |
2063 | { |
2064 | unsigned long xfer_mask; | |
2065 | int highbit; | |
2066 | ||
2067 | xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask, | |
2068 | dev->udma_mask); | |
2069 | ||
2070 | if (!xfer_mask) | |
2071 | goto fail; | |
2072 | /* don't gear down to MWDMA from UDMA, go directly to PIO */ | |
2073 | if (xfer_mask & ATA_MASK_UDMA) | |
2074 | xfer_mask &= ~ATA_MASK_MWDMA; | |
2075 | ||
2076 | highbit = fls(xfer_mask) - 1; | |
2077 | xfer_mask &= ~(1 << highbit); | |
2078 | if (force_pio0) | |
2079 | xfer_mask &= 1 << ATA_SHIFT_PIO; | |
2080 | if (!xfer_mask) | |
2081 | goto fail; | |
2082 | ||
2083 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
2084 | &dev->udma_mask); | |
2085 | ||
f15a1daf TH |
2086 | ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n", |
2087 | ata_mode_string(xfer_mask)); | |
cf176e1a TH |
2088 | |
2089 | return 0; | |
2090 | ||
2091 | fail: | |
2092 | return -EINVAL; | |
2093 | } | |
2094 | ||
3373efd8 | 2095 | static int ata_dev_set_mode(struct ata_device *dev) |
1da177e4 | 2096 | { |
83206a29 TH |
2097 | unsigned int err_mask; |
2098 | int rc; | |
1da177e4 | 2099 | |
e8384607 | 2100 | dev->flags &= ~ATA_DFLAG_PIO; |
1da177e4 LT |
2101 | if (dev->xfer_shift == ATA_SHIFT_PIO) |
2102 | dev->flags |= ATA_DFLAG_PIO; | |
2103 | ||
3373efd8 | 2104 | err_mask = ata_dev_set_xfermode(dev); |
83206a29 | 2105 | if (err_mask) { |
f15a1daf TH |
2106 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " |
2107 | "(err_mask=0x%x)\n", err_mask); | |
83206a29 TH |
2108 | return -EIO; |
2109 | } | |
1da177e4 | 2110 | |
3373efd8 | 2111 | rc = ata_dev_revalidate(dev, 0); |
5eb45c02 | 2112 | if (rc) |
83206a29 | 2113 | return rc; |
48a8a14f | 2114 | |
23e71c3d TH |
2115 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
2116 | dev->xfer_shift, (int)dev->xfer_mode); | |
1da177e4 | 2117 | |
f15a1daf TH |
2118 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", |
2119 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
83206a29 | 2120 | return 0; |
1da177e4 LT |
2121 | } |
2122 | ||
1da177e4 LT |
2123 | /** |
2124 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
2125 | * @ap: port on which timings will be programmed | |
e82cbdb9 | 2126 | * @r_failed_dev: out paramter for failed device |
1da177e4 | 2127 | * |
e82cbdb9 TH |
2128 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If |
2129 | * ata_set_mode() fails, pointer to the failing device is | |
2130 | * returned in @r_failed_dev. | |
780a87f7 | 2131 | * |
1da177e4 | 2132 | * LOCKING: |
0cba632b | 2133 | * PCI/etc. bus probe sem. |
e82cbdb9 TH |
2134 | * |
2135 | * RETURNS: | |
2136 | * 0 on success, negative errno otherwise | |
1da177e4 | 2137 | */ |
1ad8e7f9 | 2138 | int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) |
1da177e4 | 2139 | { |
e8e0619f | 2140 | struct ata_device *dev; |
e82cbdb9 | 2141 | int i, rc = 0, used_dma = 0, found = 0; |
1da177e4 | 2142 | |
3adcebb2 TH |
2143 | /* has private set_mode? */ |
2144 | if (ap->ops->set_mode) { | |
2145 | /* FIXME: make ->set_mode handle no device case and | |
2146 | * return error code and failing device on failure. | |
2147 | */ | |
2148 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
02670bf3 | 2149 | if (ata_dev_ready(&ap->device[i])) { |
3adcebb2 TH |
2150 | ap->ops->set_mode(ap); |
2151 | break; | |
2152 | } | |
2153 | } | |
2154 | return 0; | |
2155 | } | |
2156 | ||
a6d5a51c TH |
2157 | /* step 1: calculate xfer_mask */ |
2158 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
acf356b1 | 2159 | unsigned int pio_mask, dma_mask; |
a6d5a51c | 2160 | |
e8e0619f TH |
2161 | dev = &ap->device[i]; |
2162 | ||
e1211e3f | 2163 | if (!ata_dev_enabled(dev)) |
a6d5a51c TH |
2164 | continue; |
2165 | ||
3373efd8 | 2166 | ata_dev_xfermask(dev); |
1da177e4 | 2167 | |
acf356b1 TH |
2168 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); |
2169 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
2170 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); | |
2171 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
5444a6f4 | 2172 | |
4f65977d | 2173 | found = 1; |
5444a6f4 AC |
2174 | if (dev->dma_mode) |
2175 | used_dma = 1; | |
a6d5a51c | 2176 | } |
4f65977d | 2177 | if (!found) |
e82cbdb9 | 2178 | goto out; |
a6d5a51c TH |
2179 | |
2180 | /* step 2: always set host PIO timings */ | |
e8e0619f TH |
2181 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2182 | dev = &ap->device[i]; | |
2183 | if (!ata_dev_enabled(dev)) | |
2184 | continue; | |
2185 | ||
2186 | if (!dev->pio_mode) { | |
f15a1daf | 2187 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); |
e8e0619f | 2188 | rc = -EINVAL; |
e82cbdb9 | 2189 | goto out; |
e8e0619f TH |
2190 | } |
2191 | ||
2192 | dev->xfer_mode = dev->pio_mode; | |
2193 | dev->xfer_shift = ATA_SHIFT_PIO; | |
2194 | if (ap->ops->set_piomode) | |
2195 | ap->ops->set_piomode(ap, dev); | |
2196 | } | |
1da177e4 | 2197 | |
a6d5a51c | 2198 | /* step 3: set host DMA timings */ |
e8e0619f TH |
2199 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
2200 | dev = &ap->device[i]; | |
2201 | ||
2202 | if (!ata_dev_enabled(dev) || !dev->dma_mode) | |
2203 | continue; | |
2204 | ||
2205 | dev->xfer_mode = dev->dma_mode; | |
2206 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
2207 | if (ap->ops->set_dmamode) | |
2208 | ap->ops->set_dmamode(ap, dev); | |
2209 | } | |
1da177e4 LT |
2210 | |
2211 | /* step 4: update devices' xfer mode */ | |
83206a29 | 2212 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
e8e0619f | 2213 | dev = &ap->device[i]; |
1da177e4 | 2214 | |
02670bf3 TH |
2215 | /* don't udpate suspended devices' xfer mode */ |
2216 | if (!ata_dev_ready(dev)) | |
83206a29 TH |
2217 | continue; |
2218 | ||
3373efd8 | 2219 | rc = ata_dev_set_mode(dev); |
5bbc53f4 | 2220 | if (rc) |
e82cbdb9 | 2221 | goto out; |
83206a29 | 2222 | } |
1da177e4 | 2223 | |
e8e0619f TH |
2224 | /* Record simplex status. If we selected DMA then the other |
2225 | * host channels are not permitted to do so. | |
5444a6f4 | 2226 | */ |
5444a6f4 AC |
2227 | if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX)) |
2228 | ap->host_set->simplex_claimed = 1; | |
2229 | ||
e8e0619f | 2230 | /* step5: chip specific finalisation */ |
1da177e4 LT |
2231 | if (ap->ops->post_set_mode) |
2232 | ap->ops->post_set_mode(ap); | |
2233 | ||
e82cbdb9 TH |
2234 | out: |
2235 | if (rc) | |
2236 | *r_failed_dev = dev; | |
2237 | return rc; | |
1da177e4 LT |
2238 | } |
2239 | ||
1fdffbce JG |
2240 | /** |
2241 | * ata_tf_to_host - issue ATA taskfile to host controller | |
2242 | * @ap: port to which command is being issued | |
2243 | * @tf: ATA taskfile register set | |
2244 | * | |
2245 | * Issues ATA taskfile register set to ATA host controller, | |
2246 | * with proper synchronization with interrupt handler and | |
2247 | * other threads. | |
2248 | * | |
2249 | * LOCKING: | |
2250 | * spin_lock_irqsave(host_set lock) | |
2251 | */ | |
2252 | ||
2253 | static inline void ata_tf_to_host(struct ata_port *ap, | |
2254 | const struct ata_taskfile *tf) | |
2255 | { | |
2256 | ap->ops->tf_load(ap, tf); | |
2257 | ap->ops->exec_command(ap, tf); | |
2258 | } | |
2259 | ||
1da177e4 LT |
2260 | /** |
2261 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
2262 | * @ap: port containing status register to be polled | |
2263 | * @tmout_pat: impatience timeout | |
2264 | * @tmout: overall timeout | |
2265 | * | |
780a87f7 JG |
2266 | * Sleep until ATA Status register bit BSY clears, |
2267 | * or a timeout occurs. | |
2268 | * | |
2269 | * LOCKING: None. | |
1da177e4 LT |
2270 | */ |
2271 | ||
6f8b9958 TH |
2272 | unsigned int ata_busy_sleep (struct ata_port *ap, |
2273 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
2274 | { |
2275 | unsigned long timer_start, timeout; | |
2276 | u8 status; | |
2277 | ||
2278 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
2279 | timer_start = jiffies; | |
2280 | timeout = timer_start + tmout_pat; | |
2281 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
2282 | msleep(50); | |
2283 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
2284 | } | |
2285 | ||
2286 | if (status & ATA_BUSY) | |
f15a1daf TH |
2287 | ata_port_printk(ap, KERN_WARNING, |
2288 | "port is slow to respond, please be patient\n"); | |
1da177e4 LT |
2289 | |
2290 | timeout = timer_start + tmout; | |
2291 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
2292 | msleep(50); | |
2293 | status = ata_chk_status(ap); | |
2294 | } | |
2295 | ||
2296 | if (status & ATA_BUSY) { | |
f15a1daf TH |
2297 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
2298 | "(%lu secs)\n", tmout / HZ); | |
1da177e4 LT |
2299 | return 1; |
2300 | } | |
2301 | ||
2302 | return 0; | |
2303 | } | |
2304 | ||
2305 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
2306 | { | |
2307 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2308 | unsigned int dev0 = devmask & (1 << 0); | |
2309 | unsigned int dev1 = devmask & (1 << 1); | |
2310 | unsigned long timeout; | |
2311 | ||
2312 | /* if device 0 was found in ata_devchk, wait for its | |
2313 | * BSY bit to clear | |
2314 | */ | |
2315 | if (dev0) | |
2316 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2317 | ||
2318 | /* if device 1 was found in ata_devchk, wait for | |
2319 | * register access, then wait for BSY to clear | |
2320 | */ | |
2321 | timeout = jiffies + ATA_TMOUT_BOOT; | |
2322 | while (dev1) { | |
2323 | u8 nsect, lbal; | |
2324 | ||
2325 | ap->ops->dev_select(ap, 1); | |
2326 | if (ap->flags & ATA_FLAG_MMIO) { | |
2327 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
2328 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
2329 | } else { | |
2330 | nsect = inb(ioaddr->nsect_addr); | |
2331 | lbal = inb(ioaddr->lbal_addr); | |
2332 | } | |
2333 | if ((nsect == 1) && (lbal == 1)) | |
2334 | break; | |
2335 | if (time_after(jiffies, timeout)) { | |
2336 | dev1 = 0; | |
2337 | break; | |
2338 | } | |
2339 | msleep(50); /* give drive a breather */ | |
2340 | } | |
2341 | if (dev1) | |
2342 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2343 | ||
2344 | /* is all this really necessary? */ | |
2345 | ap->ops->dev_select(ap, 0); | |
2346 | if (dev1) | |
2347 | ap->ops->dev_select(ap, 1); | |
2348 | if (dev0) | |
2349 | ap->ops->dev_select(ap, 0); | |
2350 | } | |
2351 | ||
1da177e4 LT |
2352 | static unsigned int ata_bus_softreset(struct ata_port *ap, |
2353 | unsigned int devmask) | |
2354 | { | |
2355 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2356 | ||
2357 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
2358 | ||
2359 | /* software reset. causes dev0 to be selected */ | |
2360 | if (ap->flags & ATA_FLAG_MMIO) { | |
2361 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2362 | udelay(20); /* FIXME: flush */ | |
2363 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
2364 | udelay(20); /* FIXME: flush */ | |
2365 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2366 | } else { | |
2367 | outb(ap->ctl, ioaddr->ctl_addr); | |
2368 | udelay(10); | |
2369 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2370 | udelay(10); | |
2371 | outb(ap->ctl, ioaddr->ctl_addr); | |
2372 | } | |
2373 | ||
2374 | /* spec mandates ">= 2ms" before checking status. | |
2375 | * We wait 150ms, because that was the magic delay used for | |
2376 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2377 | * between when the ATA command register is written, and then | |
2378 | * status is checked. Because waiting for "a while" before | |
2379 | * checking status is fine, post SRST, we perform this magic | |
2380 | * delay here as well. | |
09c7ad79 AC |
2381 | * |
2382 | * Old drivers/ide uses the 2mS rule and then waits for ready | |
1da177e4 LT |
2383 | */ |
2384 | msleep(150); | |
2385 | ||
2e9edbf8 | 2386 | /* Before we perform post reset processing we want to see if |
298a41ca TH |
2387 | * the bus shows 0xFF because the odd clown forgets the D7 |
2388 | * pulldown resistor. | |
2389 | */ | |
987d2f05 | 2390 | if (ata_check_status(ap) == 0xFF) { |
f15a1daf | 2391 | ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n"); |
298a41ca | 2392 | return AC_ERR_OTHER; |
987d2f05 | 2393 | } |
09c7ad79 | 2394 | |
1da177e4 LT |
2395 | ata_bus_post_reset(ap, devmask); |
2396 | ||
2397 | return 0; | |
2398 | } | |
2399 | ||
2400 | /** | |
2401 | * ata_bus_reset - reset host port and associated ATA channel | |
2402 | * @ap: port to reset | |
2403 | * | |
2404 | * This is typically the first time we actually start issuing | |
2405 | * commands to the ATA channel. We wait for BSY to clear, then | |
2406 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2407 | * result. Determine what devices, if any, are on the channel | |
2408 | * by looking at the device 0/1 error register. Look at the signature | |
2409 | * stored in each device's taskfile registers, to determine if | |
2410 | * the device is ATA or ATAPI. | |
2411 | * | |
2412 | * LOCKING: | |
0cba632b JG |
2413 | * PCI/etc. bus probe sem. |
2414 | * Obtains host_set lock. | |
1da177e4 LT |
2415 | * |
2416 | * SIDE EFFECTS: | |
198e0fed | 2417 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
1da177e4 LT |
2418 | */ |
2419 | ||
2420 | void ata_bus_reset(struct ata_port *ap) | |
2421 | { | |
2422 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2423 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2424 | u8 err; | |
aec5c3c1 | 2425 | unsigned int dev0, dev1 = 0, devmask = 0; |
1da177e4 LT |
2426 | |
2427 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2428 | ||
2429 | /* determine if device 0/1 are present */ | |
2430 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2431 | dev0 = 1; | |
2432 | else { | |
2433 | dev0 = ata_devchk(ap, 0); | |
2434 | if (slave_possible) | |
2435 | dev1 = ata_devchk(ap, 1); | |
2436 | } | |
2437 | ||
2438 | if (dev0) | |
2439 | devmask |= (1 << 0); | |
2440 | if (dev1) | |
2441 | devmask |= (1 << 1); | |
2442 | ||
2443 | /* select device 0 again */ | |
2444 | ap->ops->dev_select(ap, 0); | |
2445 | ||
2446 | /* issue bus reset */ | |
2447 | if (ap->flags & ATA_FLAG_SRST) | |
aec5c3c1 TH |
2448 | if (ata_bus_softreset(ap, devmask)) |
2449 | goto err_out; | |
1da177e4 LT |
2450 | |
2451 | /* | |
2452 | * determine by signature whether we have ATA or ATAPI devices | |
2453 | */ | |
b4dc7623 | 2454 | ap->device[0].class = ata_dev_try_classify(ap, 0, &err); |
1da177e4 | 2455 | if ((slave_possible) && (err != 0x81)) |
b4dc7623 | 2456 | ap->device[1].class = ata_dev_try_classify(ap, 1, &err); |
1da177e4 LT |
2457 | |
2458 | /* re-enable interrupts */ | |
2459 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2460 | ata_irq_on(ap); | |
2461 | ||
2462 | /* is double-select really necessary? */ | |
2463 | if (ap->device[1].class != ATA_DEV_NONE) | |
2464 | ap->ops->dev_select(ap, 1); | |
2465 | if (ap->device[0].class != ATA_DEV_NONE) | |
2466 | ap->ops->dev_select(ap, 0); | |
2467 | ||
2468 | /* if no devices were detected, disable this port */ | |
2469 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2470 | (ap->device[1].class == ATA_DEV_NONE)) | |
2471 | goto err_out; | |
2472 | ||
2473 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2474 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2475 | if (ap->flags & ATA_FLAG_MMIO) | |
2476 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2477 | else | |
2478 | outb(ap->ctl, ioaddr->ctl_addr); | |
2479 | } | |
2480 | ||
2481 | DPRINTK("EXIT\n"); | |
2482 | return; | |
2483 | ||
2484 | err_out: | |
f15a1daf | 2485 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
1da177e4 LT |
2486 | ap->ops->port_disable(ap); |
2487 | ||
2488 | DPRINTK("EXIT\n"); | |
2489 | } | |
2490 | ||
d7bb4cc7 TH |
2491 | /** |
2492 | * sata_phy_debounce - debounce SATA phy status | |
2493 | * @ap: ATA port to debounce SATA phy status for | |
2494 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2495 | * | |
2496 | * Make sure SStatus of @ap reaches stable state, determined by | |
2497 | * holding the same value where DET is not 1 for @duration polled | |
2498 | * every @interval, before @timeout. Timeout constraints the | |
2499 | * beginning of the stable state. Because, after hot unplugging, | |
2500 | * DET gets stuck at 1 on some controllers, this functions waits | |
2501 | * until timeout then returns 0 if DET is stable at 1. | |
2502 | * | |
2503 | * LOCKING: | |
2504 | * Kernel thread context (may sleep) | |
2505 | * | |
2506 | * RETURNS: | |
2507 | * 0 on success, -errno on failure. | |
2508 | */ | |
2509 | int sata_phy_debounce(struct ata_port *ap, const unsigned long *params) | |
7a7921e8 | 2510 | { |
d7bb4cc7 TH |
2511 | unsigned long interval_msec = params[0]; |
2512 | unsigned long duration = params[1] * HZ / 1000; | |
2513 | unsigned long timeout = jiffies + params[2] * HZ / 1000; | |
2514 | unsigned long last_jiffies; | |
2515 | u32 last, cur; | |
2516 | int rc; | |
2517 | ||
2518 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2519 | return rc; | |
2520 | cur &= 0xf; | |
2521 | ||
2522 | last = cur; | |
2523 | last_jiffies = jiffies; | |
2524 | ||
2525 | while (1) { | |
2526 | msleep(interval_msec); | |
2527 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2528 | return rc; | |
2529 | cur &= 0xf; | |
2530 | ||
2531 | /* DET stable? */ | |
2532 | if (cur == last) { | |
2533 | if (cur == 1 && time_before(jiffies, timeout)) | |
2534 | continue; | |
2535 | if (time_after(jiffies, last_jiffies + duration)) | |
2536 | return 0; | |
2537 | continue; | |
2538 | } | |
2539 | ||
2540 | /* unstable, start over */ | |
2541 | last = cur; | |
2542 | last_jiffies = jiffies; | |
2543 | ||
2544 | /* check timeout */ | |
2545 | if (time_after(jiffies, timeout)) | |
2546 | return -EBUSY; | |
2547 | } | |
2548 | } | |
2549 | ||
2550 | /** | |
2551 | * sata_phy_resume - resume SATA phy | |
2552 | * @ap: ATA port to resume SATA phy for | |
2553 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2554 | * | |
2555 | * Resume SATA phy of @ap and debounce it. | |
2556 | * | |
2557 | * LOCKING: | |
2558 | * Kernel thread context (may sleep) | |
2559 | * | |
2560 | * RETURNS: | |
2561 | * 0 on success, -errno on failure. | |
2562 | */ | |
2563 | int sata_phy_resume(struct ata_port *ap, const unsigned long *params) | |
2564 | { | |
2565 | u32 scontrol; | |
81952c54 TH |
2566 | int rc; |
2567 | ||
2568 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
2569 | return rc; | |
7a7921e8 | 2570 | |
852ee16a | 2571 | scontrol = (scontrol & 0x0f0) | 0x300; |
81952c54 TH |
2572 | |
2573 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2574 | return rc; | |
7a7921e8 | 2575 | |
d7bb4cc7 TH |
2576 | /* Some PHYs react badly if SStatus is pounded immediately |
2577 | * after resuming. Delay 200ms before debouncing. | |
2578 | */ | |
2579 | msleep(200); | |
7a7921e8 | 2580 | |
d7bb4cc7 | 2581 | return sata_phy_debounce(ap, params); |
7a7921e8 TH |
2582 | } |
2583 | ||
f5914a46 TH |
2584 | static void ata_wait_spinup(struct ata_port *ap) |
2585 | { | |
2586 | struct ata_eh_context *ehc = &ap->eh_context; | |
2587 | unsigned long end, secs; | |
2588 | int rc; | |
2589 | ||
2590 | /* first, debounce phy if SATA */ | |
2591 | if (ap->cbl == ATA_CBL_SATA) { | |
e9c83914 | 2592 | rc = sata_phy_debounce(ap, sata_deb_timing_hotplug); |
f5914a46 TH |
2593 | |
2594 | /* if debounced successfully and offline, no need to wait */ | |
2595 | if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap)) | |
2596 | return; | |
2597 | } | |
2598 | ||
2599 | /* okay, let's give the drive time to spin up */ | |
2600 | end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000; | |
2601 | secs = ((end - jiffies) + HZ - 1) / HZ; | |
2602 | ||
2603 | if (time_after(jiffies, end)) | |
2604 | return; | |
2605 | ||
2606 | if (secs > 5) | |
2607 | ata_port_printk(ap, KERN_INFO, "waiting for device to spin up " | |
2608 | "(%lu secs)\n", secs); | |
2609 | ||
2610 | schedule_timeout_uninterruptible(end - jiffies); | |
2611 | } | |
2612 | ||
2613 | /** | |
2614 | * ata_std_prereset - prepare for reset | |
2615 | * @ap: ATA port to be reset | |
2616 | * | |
2617 | * @ap is about to be reset. Initialize it. | |
2618 | * | |
2619 | * LOCKING: | |
2620 | * Kernel thread context (may sleep) | |
2621 | * | |
2622 | * RETURNS: | |
2623 | * 0 on success, -errno otherwise. | |
2624 | */ | |
2625 | int ata_std_prereset(struct ata_port *ap) | |
2626 | { | |
2627 | struct ata_eh_context *ehc = &ap->eh_context; | |
e9c83914 | 2628 | const unsigned long *timing = sata_ehc_deb_timing(ehc); |
f5914a46 TH |
2629 | int rc; |
2630 | ||
28324304 TH |
2631 | /* handle link resume & hotplug spinup */ |
2632 | if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && | |
2633 | (ap->flags & ATA_FLAG_HRST_TO_RESUME)) | |
2634 | ehc->i.action |= ATA_EH_HARDRESET; | |
2635 | ||
2636 | if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) && | |
2637 | (ap->flags & ATA_FLAG_SKIP_D2H_BSY)) | |
2638 | ata_wait_spinup(ap); | |
f5914a46 TH |
2639 | |
2640 | /* if we're about to do hardreset, nothing more to do */ | |
2641 | if (ehc->i.action & ATA_EH_HARDRESET) | |
2642 | return 0; | |
2643 | ||
2644 | /* if SATA, resume phy */ | |
2645 | if (ap->cbl == ATA_CBL_SATA) { | |
f5914a46 TH |
2646 | rc = sata_phy_resume(ap, timing); |
2647 | if (rc && rc != -EOPNOTSUPP) { | |
2648 | /* phy resume failed */ | |
2649 | ata_port_printk(ap, KERN_WARNING, "failed to resume " | |
2650 | "link for reset (errno=%d)\n", rc); | |
2651 | return rc; | |
2652 | } | |
2653 | } | |
2654 | ||
2655 | /* Wait for !BSY if the controller can wait for the first D2H | |
2656 | * Reg FIS and we don't know that no device is attached. | |
2657 | */ | |
2658 | if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) | |
2659 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2660 | ||
2661 | return 0; | |
2662 | } | |
2663 | ||
c2bd5804 TH |
2664 | /** |
2665 | * ata_std_softreset - reset host port via ATA SRST | |
2666 | * @ap: port to reset | |
c2bd5804 TH |
2667 | * @classes: resulting classes of attached devices |
2668 | * | |
52783c5d | 2669 | * Reset host port using ATA SRST. |
c2bd5804 TH |
2670 | * |
2671 | * LOCKING: | |
2672 | * Kernel thread context (may sleep) | |
2673 | * | |
2674 | * RETURNS: | |
2675 | * 0 on success, -errno otherwise. | |
2676 | */ | |
2bf2cb26 | 2677 | int ata_std_softreset(struct ata_port *ap, unsigned int *classes) |
c2bd5804 TH |
2678 | { |
2679 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2680 | unsigned int devmask = 0, err_mask; | |
2681 | u8 err; | |
2682 | ||
2683 | DPRINTK("ENTER\n"); | |
2684 | ||
81952c54 | 2685 | if (ata_port_offline(ap)) { |
3a39746a TH |
2686 | classes[0] = ATA_DEV_NONE; |
2687 | goto out; | |
2688 | } | |
2689 | ||
c2bd5804 TH |
2690 | /* determine if device 0/1 are present */ |
2691 | if (ata_devchk(ap, 0)) | |
2692 | devmask |= (1 << 0); | |
2693 | if (slave_possible && ata_devchk(ap, 1)) | |
2694 | devmask |= (1 << 1); | |
2695 | ||
c2bd5804 TH |
2696 | /* select device 0 again */ |
2697 | ap->ops->dev_select(ap, 0); | |
2698 | ||
2699 | /* issue bus reset */ | |
2700 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
2701 | err_mask = ata_bus_softreset(ap, devmask); | |
2702 | if (err_mask) { | |
f15a1daf TH |
2703 | ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n", |
2704 | err_mask); | |
c2bd5804 TH |
2705 | return -EIO; |
2706 | } | |
2707 | ||
2708 | /* determine by signature whether we have ATA or ATAPI devices */ | |
2709 | classes[0] = ata_dev_try_classify(ap, 0, &err); | |
2710 | if (slave_possible && err != 0x81) | |
2711 | classes[1] = ata_dev_try_classify(ap, 1, &err); | |
2712 | ||
3a39746a | 2713 | out: |
c2bd5804 TH |
2714 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
2715 | return 0; | |
2716 | } | |
2717 | ||
2718 | /** | |
2719 | * sata_std_hardreset - reset host port via SATA phy reset | |
2720 | * @ap: port to reset | |
c2bd5804 TH |
2721 | * @class: resulting class of attached device |
2722 | * | |
2723 | * SATA phy-reset host port using DET bits of SControl register. | |
c2bd5804 TH |
2724 | * |
2725 | * LOCKING: | |
2726 | * Kernel thread context (may sleep) | |
2727 | * | |
2728 | * RETURNS: | |
2729 | * 0 on success, -errno otherwise. | |
2730 | */ | |
2bf2cb26 | 2731 | int sata_std_hardreset(struct ata_port *ap, unsigned int *class) |
c2bd5804 | 2732 | { |
e9c83914 TH |
2733 | struct ata_eh_context *ehc = &ap->eh_context; |
2734 | const unsigned long *timing = sata_ehc_deb_timing(ehc); | |
852ee16a | 2735 | u32 scontrol; |
81952c54 | 2736 | int rc; |
852ee16a | 2737 | |
c2bd5804 TH |
2738 | DPRINTK("ENTER\n"); |
2739 | ||
3c567b7d | 2740 | if (sata_set_spd_needed(ap)) { |
1c3fae4d TH |
2741 | /* SATA spec says nothing about how to reconfigure |
2742 | * spd. To be on the safe side, turn off phy during | |
2743 | * reconfiguration. This works for at least ICH7 AHCI | |
2744 | * and Sil3124. | |
2745 | */ | |
81952c54 TH |
2746 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2747 | return rc; | |
2748 | ||
1c3fae4d | 2749 | scontrol = (scontrol & 0x0f0) | 0x302; |
81952c54 TH |
2750 | |
2751 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2752 | return rc; | |
1c3fae4d | 2753 | |
3c567b7d | 2754 | sata_set_spd(ap); |
1c3fae4d TH |
2755 | } |
2756 | ||
2757 | /* issue phy wake/reset */ | |
81952c54 TH |
2758 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) |
2759 | return rc; | |
2760 | ||
852ee16a | 2761 | scontrol = (scontrol & 0x0f0) | 0x301; |
81952c54 TH |
2762 | |
2763 | if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) | |
2764 | return rc; | |
c2bd5804 | 2765 | |
1c3fae4d | 2766 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
c2bd5804 TH |
2767 | * 10.4.2 says at least 1 ms. |
2768 | */ | |
2769 | msleep(1); | |
2770 | ||
1c3fae4d | 2771 | /* bring phy back */ |
e9c83914 | 2772 | sata_phy_resume(ap, timing); |
c2bd5804 | 2773 | |
c2bd5804 | 2774 | /* TODO: phy layer with polling, timeouts, etc. */ |
81952c54 | 2775 | if (ata_port_offline(ap)) { |
c2bd5804 TH |
2776 | *class = ATA_DEV_NONE; |
2777 | DPRINTK("EXIT, link offline\n"); | |
2778 | return 0; | |
2779 | } | |
2780 | ||
2781 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
f15a1daf TH |
2782 | ata_port_printk(ap, KERN_ERR, |
2783 | "COMRESET failed (device not ready)\n"); | |
c2bd5804 TH |
2784 | return -EIO; |
2785 | } | |
2786 | ||
3a39746a TH |
2787 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
2788 | ||
c2bd5804 TH |
2789 | *class = ata_dev_try_classify(ap, 0, NULL); |
2790 | ||
2791 | DPRINTK("EXIT, class=%u\n", *class); | |
2792 | return 0; | |
2793 | } | |
2794 | ||
2795 | /** | |
2796 | * ata_std_postreset - standard postreset callback | |
2797 | * @ap: the target ata_port | |
2798 | * @classes: classes of attached devices | |
2799 | * | |
2800 | * This function is invoked after a successful reset. Note that | |
2801 | * the device might have been reset more than once using | |
2802 | * different reset methods before postreset is invoked. | |
c2bd5804 | 2803 | * |
c2bd5804 TH |
2804 | * LOCKING: |
2805 | * Kernel thread context (may sleep) | |
2806 | */ | |
2807 | void ata_std_postreset(struct ata_port *ap, unsigned int *classes) | |
2808 | { | |
dc2b3515 TH |
2809 | u32 serror; |
2810 | ||
c2bd5804 TH |
2811 | DPRINTK("ENTER\n"); |
2812 | ||
c2bd5804 | 2813 | /* print link status */ |
81952c54 | 2814 | sata_print_link_status(ap); |
c2bd5804 | 2815 | |
dc2b3515 TH |
2816 | /* clear SError */ |
2817 | if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) | |
2818 | sata_scr_write(ap, SCR_ERROR, serror); | |
2819 | ||
3a39746a | 2820 | /* re-enable interrupts */ |
e3180499 TH |
2821 | if (!ap->ops->error_handler) { |
2822 | /* FIXME: hack. create a hook instead */ | |
2823 | if (ap->ioaddr.ctl_addr) | |
2824 | ata_irq_on(ap); | |
2825 | } | |
c2bd5804 TH |
2826 | |
2827 | /* is double-select really necessary? */ | |
2828 | if (classes[0] != ATA_DEV_NONE) | |
2829 | ap->ops->dev_select(ap, 1); | |
2830 | if (classes[1] != ATA_DEV_NONE) | |
2831 | ap->ops->dev_select(ap, 0); | |
2832 | ||
3a39746a TH |
2833 | /* bail out if no device is present */ |
2834 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
2835 | DPRINTK("EXIT, no device\n"); | |
2836 | return; | |
2837 | } | |
2838 | ||
2839 | /* set up device control */ | |
2840 | if (ap->ioaddr.ctl_addr) { | |
2841 | if (ap->flags & ATA_FLAG_MMIO) | |
2842 | writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
2843 | else | |
2844 | outb(ap->ctl, ap->ioaddr.ctl_addr); | |
2845 | } | |
c2bd5804 TH |
2846 | |
2847 | DPRINTK("EXIT\n"); | |
2848 | } | |
2849 | ||
623a3128 TH |
2850 | /** |
2851 | * ata_dev_same_device - Determine whether new ID matches configured device | |
623a3128 TH |
2852 | * @dev: device to compare against |
2853 | * @new_class: class of the new device | |
2854 | * @new_id: IDENTIFY page of the new device | |
2855 | * | |
2856 | * Compare @new_class and @new_id against @dev and determine | |
2857 | * whether @dev is the device indicated by @new_class and | |
2858 | * @new_id. | |
2859 | * | |
2860 | * LOCKING: | |
2861 | * None. | |
2862 | * | |
2863 | * RETURNS: | |
2864 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
2865 | */ | |
3373efd8 TH |
2866 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, |
2867 | const u16 *new_id) | |
623a3128 TH |
2868 | { |
2869 | const u16 *old_id = dev->id; | |
2870 | unsigned char model[2][41], serial[2][21]; | |
2871 | u64 new_n_sectors; | |
2872 | ||
2873 | if (dev->class != new_class) { | |
f15a1daf TH |
2874 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", |
2875 | dev->class, new_class); | |
623a3128 TH |
2876 | return 0; |
2877 | } | |
2878 | ||
2879 | ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0])); | |
2880 | ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1])); | |
2881 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0])); | |
2882 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1])); | |
2883 | new_n_sectors = ata_id_n_sectors(new_id); | |
2884 | ||
2885 | if (strcmp(model[0], model[1])) { | |
f15a1daf TH |
2886 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " |
2887 | "'%s' != '%s'\n", model[0], model[1]); | |
623a3128 TH |
2888 | return 0; |
2889 | } | |
2890 | ||
2891 | if (strcmp(serial[0], serial[1])) { | |
f15a1daf TH |
2892 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " |
2893 | "'%s' != '%s'\n", serial[0], serial[1]); | |
623a3128 TH |
2894 | return 0; |
2895 | } | |
2896 | ||
2897 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { | |
f15a1daf TH |
2898 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " |
2899 | "%llu != %llu\n", | |
2900 | (unsigned long long)dev->n_sectors, | |
2901 | (unsigned long long)new_n_sectors); | |
623a3128 TH |
2902 | return 0; |
2903 | } | |
2904 | ||
2905 | return 1; | |
2906 | } | |
2907 | ||
2908 | /** | |
2909 | * ata_dev_revalidate - Revalidate ATA device | |
623a3128 TH |
2910 | * @dev: device to revalidate |
2911 | * @post_reset: is this revalidation after reset? | |
2912 | * | |
2913 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
2914 | * the port. | |
2915 | * | |
2916 | * LOCKING: | |
2917 | * Kernel thread context (may sleep) | |
2918 | * | |
2919 | * RETURNS: | |
2920 | * 0 on success, negative errno otherwise | |
2921 | */ | |
3373efd8 | 2922 | int ata_dev_revalidate(struct ata_device *dev, int post_reset) |
623a3128 | 2923 | { |
5eb45c02 | 2924 | unsigned int class = dev->class; |
f15a1daf | 2925 | u16 *id = (void *)dev->ap->sector_buf; |
623a3128 TH |
2926 | int rc; |
2927 | ||
5eb45c02 TH |
2928 | if (!ata_dev_enabled(dev)) { |
2929 | rc = -ENODEV; | |
2930 | goto fail; | |
2931 | } | |
623a3128 | 2932 | |
fe635c7e | 2933 | /* read ID data */ |
3373efd8 | 2934 | rc = ata_dev_read_id(dev, &class, post_reset, id); |
623a3128 TH |
2935 | if (rc) |
2936 | goto fail; | |
2937 | ||
2938 | /* is the device still there? */ | |
3373efd8 | 2939 | if (!ata_dev_same_device(dev, class, id)) { |
623a3128 TH |
2940 | rc = -ENODEV; |
2941 | goto fail; | |
2942 | } | |
2943 | ||
fe635c7e | 2944 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); |
623a3128 TH |
2945 | |
2946 | /* configure device according to the new ID */ | |
3373efd8 | 2947 | rc = ata_dev_configure(dev, 0); |
5eb45c02 TH |
2948 | if (rc == 0) |
2949 | return 0; | |
623a3128 TH |
2950 | |
2951 | fail: | |
f15a1daf | 2952 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); |
623a3128 TH |
2953 | return rc; |
2954 | } | |
2955 | ||
98ac62de | 2956 | static const char * const ata_dma_blacklist [] = { |
f4b15fef AC |
2957 | "WDC AC11000H", NULL, |
2958 | "WDC AC22100H", NULL, | |
2959 | "WDC AC32500H", NULL, | |
2960 | "WDC AC33100H", NULL, | |
2961 | "WDC AC31600H", NULL, | |
2962 | "WDC AC32100H", "24.09P07", | |
2963 | "WDC AC23200L", "21.10N21", | |
2964 | "Compaq CRD-8241B", NULL, | |
2965 | "CRD-8400B", NULL, | |
2966 | "CRD-8480B", NULL, | |
2967 | "CRD-8482B", NULL, | |
2968 | "CRD-84", NULL, | |
2969 | "SanDisk SDP3B", NULL, | |
2970 | "SanDisk SDP3B-64", NULL, | |
2971 | "SANYO CD-ROM CRD", NULL, | |
2972 | "HITACHI CDR-8", NULL, | |
2e9edbf8 | 2973 | "HITACHI CDR-8335", NULL, |
f4b15fef | 2974 | "HITACHI CDR-8435", NULL, |
2e9edbf8 JG |
2975 | "Toshiba CD-ROM XM-6202B", NULL, |
2976 | "TOSHIBA CD-ROM XM-1702BC", NULL, | |
2977 | "CD-532E-A", NULL, | |
2978 | "E-IDE CD-ROM CR-840", NULL, | |
2979 | "CD-ROM Drive/F5A", NULL, | |
2980 | "WPI CDD-820", NULL, | |
f4b15fef | 2981 | "SAMSUNG CD-ROM SC-148C", NULL, |
2e9edbf8 | 2982 | "SAMSUNG CD-ROM SC", NULL, |
f4b15fef AC |
2983 | "SanDisk SDP3B-64", NULL, |
2984 | "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL, | |
2985 | "_NEC DV5800A", NULL, | |
2986 | "SAMSUNG CD-ROM SN-124", "N001" | |
1da177e4 | 2987 | }; |
2e9edbf8 | 2988 | |
f4b15fef AC |
2989 | static int ata_strim(char *s, size_t len) |
2990 | { | |
2991 | len = strnlen(s, len); | |
2992 | ||
2993 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
2994 | while ((len > 0) && (s[len - 1] == ' ')) { | |
2995 | len--; | |
2996 | s[len] = 0; | |
2997 | } | |
2998 | return len; | |
2999 | } | |
1da177e4 | 3000 | |
057ace5e | 3001 | static int ata_dma_blacklisted(const struct ata_device *dev) |
1da177e4 | 3002 | { |
f4b15fef AC |
3003 | unsigned char model_num[40]; |
3004 | unsigned char model_rev[16]; | |
3005 | unsigned int nlen, rlen; | |
1da177e4 LT |
3006 | int i; |
3007 | ||
3a778275 AL |
3008 | /* We don't support polling DMA. |
3009 | * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) | |
3010 | * if the LLDD handles only interrupts in the HSM_ST_LAST state. | |
3011 | */ | |
3012 | if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) && | |
3013 | (dev->flags & ATA_DFLAG_CDB_INTR)) | |
3014 | return 1; | |
3015 | ||
f4b15fef AC |
3016 | ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS, |
3017 | sizeof(model_num)); | |
3018 | ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS, | |
3019 | sizeof(model_rev)); | |
3020 | nlen = ata_strim(model_num, sizeof(model_num)); | |
3021 | rlen = ata_strim(model_rev, sizeof(model_rev)); | |
1da177e4 | 3022 | |
f4b15fef AC |
3023 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) { |
3024 | if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) { | |
3025 | if (ata_dma_blacklist[i+1] == NULL) | |
3026 | return 1; | |
3027 | if (!strncmp(ata_dma_blacklist[i], model_rev, rlen)) | |
3028 | return 1; | |
3029 | } | |
3030 | } | |
1da177e4 LT |
3031 | return 0; |
3032 | } | |
3033 | ||
a6d5a51c TH |
3034 | /** |
3035 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
a6d5a51c TH |
3036 | * @dev: Device to compute xfermask for |
3037 | * | |
acf356b1 TH |
3038 | * Compute supported xfermask of @dev and store it in |
3039 | * dev->*_mask. This function is responsible for applying all | |
3040 | * known limits including host controller limits, device | |
3041 | * blacklist, etc... | |
a6d5a51c | 3042 | * |
600511e8 TH |
3043 | * FIXME: The current implementation limits all transfer modes to |
3044 | * the fastest of the lowested device on the port. This is not | |
05c8e0ac | 3045 | * required on most controllers. |
600511e8 | 3046 | * |
a6d5a51c TH |
3047 | * LOCKING: |
3048 | * None. | |
a6d5a51c | 3049 | */ |
3373efd8 | 3050 | static void ata_dev_xfermask(struct ata_device *dev) |
1da177e4 | 3051 | { |
3373efd8 | 3052 | struct ata_port *ap = dev->ap; |
5444a6f4 | 3053 | struct ata_host_set *hs = ap->host_set; |
a6d5a51c TH |
3054 | unsigned long xfer_mask; |
3055 | int i; | |
1da177e4 | 3056 | |
565083e1 TH |
3057 | xfer_mask = ata_pack_xfermask(ap->pio_mask, |
3058 | ap->mwdma_mask, ap->udma_mask); | |
3059 | ||
3060 | /* Apply cable rule here. Don't apply it early because when | |
3061 | * we handle hot plug the cable type can itself change. | |
3062 | */ | |
3063 | if (ap->cbl == ATA_CBL_PATA40) | |
3064 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
1da177e4 | 3065 | |
5444a6f4 | 3066 | /* FIXME: Use port-wide xfermask for now */ |
a6d5a51c TH |
3067 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
3068 | struct ata_device *d = &ap->device[i]; | |
565083e1 TH |
3069 | |
3070 | if (ata_dev_absent(d)) | |
3071 | continue; | |
3072 | ||
3073 | if (ata_dev_disabled(d)) { | |
3074 | /* to avoid violating device selection timing */ | |
3075 | xfer_mask &= ata_pack_xfermask(d->pio_mask, | |
3076 | UINT_MAX, UINT_MAX); | |
a6d5a51c | 3077 | continue; |
565083e1 TH |
3078 | } |
3079 | ||
3080 | xfer_mask &= ata_pack_xfermask(d->pio_mask, | |
3081 | d->mwdma_mask, d->udma_mask); | |
a6d5a51c TH |
3082 | xfer_mask &= ata_id_xfermask(d->id); |
3083 | if (ata_dma_blacklisted(d)) | |
3084 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
1da177e4 LT |
3085 | } |
3086 | ||
a6d5a51c | 3087 | if (ata_dma_blacklisted(dev)) |
f15a1daf TH |
3088 | ata_dev_printk(dev, KERN_WARNING, |
3089 | "device is on DMA blacklist, disabling DMA\n"); | |
a6d5a51c | 3090 | |
5444a6f4 AC |
3091 | if (hs->flags & ATA_HOST_SIMPLEX) { |
3092 | if (hs->simplex_claimed) | |
3093 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
3094 | } | |
565083e1 | 3095 | |
5444a6f4 AC |
3096 | if (ap->ops->mode_filter) |
3097 | xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask); | |
3098 | ||
565083e1 TH |
3099 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, |
3100 | &dev->mwdma_mask, &dev->udma_mask); | |
1da177e4 LT |
3101 | } |
3102 | ||
1da177e4 LT |
3103 | /** |
3104 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
1da177e4 LT |
3105 | * @dev: Device to which command will be sent |
3106 | * | |
780a87f7 JG |
3107 | * Issue SET FEATURES - XFER MODE command to device @dev |
3108 | * on port @ap. | |
3109 | * | |
1da177e4 | 3110 | * LOCKING: |
0cba632b | 3111 | * PCI/etc. bus probe sem. |
83206a29 TH |
3112 | * |
3113 | * RETURNS: | |
3114 | * 0 on success, AC_ERR_* mask otherwise. | |
1da177e4 LT |
3115 | */ |
3116 | ||
3373efd8 | 3117 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) |
1da177e4 | 3118 | { |
a0123703 | 3119 | struct ata_taskfile tf; |
83206a29 | 3120 | unsigned int err_mask; |
1da177e4 LT |
3121 | |
3122 | /* set up set-features taskfile */ | |
3123 | DPRINTK("set features - xfer mode\n"); | |
3124 | ||
3373efd8 | 3125 | ata_tf_init(dev, &tf); |
a0123703 TH |
3126 | tf.command = ATA_CMD_SET_FEATURES; |
3127 | tf.feature = SETFEATURES_XFER; | |
3128 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3129 | tf.protocol = ATA_PROT_NODATA; | |
3130 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 3131 | |
3373efd8 | 3132 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
1da177e4 | 3133 | |
83206a29 TH |
3134 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3135 | return err_mask; | |
1da177e4 LT |
3136 | } |
3137 | ||
8bf62ece AL |
3138 | /** |
3139 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
8bf62ece | 3140 | * @dev: Device to which command will be sent |
e2a7f77a RD |
3141 | * @heads: Number of heads (taskfile parameter) |
3142 | * @sectors: Number of sectors (taskfile parameter) | |
8bf62ece AL |
3143 | * |
3144 | * LOCKING: | |
6aff8f1f TH |
3145 | * Kernel thread context (may sleep) |
3146 | * | |
3147 | * RETURNS: | |
3148 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece | 3149 | */ |
3373efd8 TH |
3150 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
3151 | u16 heads, u16 sectors) | |
8bf62ece | 3152 | { |
a0123703 | 3153 | struct ata_taskfile tf; |
6aff8f1f | 3154 | unsigned int err_mask; |
8bf62ece AL |
3155 | |
3156 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
3157 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
00b6f5e9 | 3158 | return AC_ERR_INVALID; |
8bf62ece AL |
3159 | |
3160 | /* set up init dev params taskfile */ | |
3161 | DPRINTK("init dev params \n"); | |
3162 | ||
3373efd8 | 3163 | ata_tf_init(dev, &tf); |
a0123703 TH |
3164 | tf.command = ATA_CMD_INIT_DEV_PARAMS; |
3165 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3166 | tf.protocol = ATA_PROT_NODATA; | |
3167 | tf.nsect = sectors; | |
3168 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 3169 | |
3373efd8 | 3170 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); |
8bf62ece | 3171 | |
6aff8f1f TH |
3172 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
3173 | return err_mask; | |
8bf62ece AL |
3174 | } |
3175 | ||
1da177e4 | 3176 | /** |
0cba632b JG |
3177 | * ata_sg_clean - Unmap DMA memory associated with command |
3178 | * @qc: Command containing DMA memory to be released | |
3179 | * | |
3180 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
3181 | * |
3182 | * LOCKING: | |
0cba632b | 3183 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3184 | */ |
3185 | ||
3186 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
3187 | { | |
3188 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 3189 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3190 | int dir = qc->dma_dir; |
cedc9a47 | 3191 | void *pad_buf = NULL; |
1da177e4 | 3192 | |
a4631474 TH |
3193 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
3194 | WARN_ON(sg == NULL); | |
1da177e4 LT |
3195 | |
3196 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 3197 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 3198 | |
2c13b7ce | 3199 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 3200 | |
cedc9a47 JG |
3201 | /* if we padded the buffer out to 32-bit bound, and data |
3202 | * xfer direction is from-device, we must copy from the | |
3203 | * pad buffer back into the supplied buffer | |
3204 | */ | |
3205 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
3206 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3207 | ||
3208 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d | 3209 | if (qc->n_elem) |
2f1f610b | 3210 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); |
cedc9a47 JG |
3211 | /* restore last sg */ |
3212 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
3213 | if (pad_buf) { | |
3214 | struct scatterlist *psg = &qc->pad_sgent; | |
3215 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3216 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 3217 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3218 | } |
3219 | } else { | |
2e242fa9 | 3220 | if (qc->n_elem) |
2f1f610b | 3221 | dma_unmap_single(ap->dev, |
e1410f2d JG |
3222 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), |
3223 | dir); | |
cedc9a47 JG |
3224 | /* restore sg */ |
3225 | sg->length += qc->pad_len; | |
3226 | if (pad_buf) | |
3227 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
3228 | pad_buf, qc->pad_len); | |
3229 | } | |
1da177e4 LT |
3230 | |
3231 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 3232 | qc->__sg = NULL; |
1da177e4 LT |
3233 | } |
3234 | ||
3235 | /** | |
3236 | * ata_fill_sg - Fill PCI IDE PRD table | |
3237 | * @qc: Metadata associated with taskfile to be transferred | |
3238 | * | |
780a87f7 JG |
3239 | * Fill PCI IDE PRD (scatter-gather) table with segments |
3240 | * associated with the current disk command. | |
3241 | * | |
1da177e4 | 3242 | * LOCKING: |
780a87f7 | 3243 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3244 | * |
3245 | */ | |
3246 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
3247 | { | |
1da177e4 | 3248 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
3249 | struct scatterlist *sg; |
3250 | unsigned int idx; | |
1da177e4 | 3251 | |
a4631474 | 3252 | WARN_ON(qc->__sg == NULL); |
f131883e | 3253 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
3254 | |
3255 | idx = 0; | |
cedc9a47 | 3256 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
3257 | u32 addr, offset; |
3258 | u32 sg_len, len; | |
3259 | ||
3260 | /* determine if physical DMA addr spans 64K boundary. | |
3261 | * Note h/w doesn't support 64-bit, so we unconditionally | |
3262 | * truncate dma_addr_t to u32. | |
3263 | */ | |
3264 | addr = (u32) sg_dma_address(sg); | |
3265 | sg_len = sg_dma_len(sg); | |
3266 | ||
3267 | while (sg_len) { | |
3268 | offset = addr & 0xffff; | |
3269 | len = sg_len; | |
3270 | if ((offset + sg_len) > 0x10000) | |
3271 | len = 0x10000 - offset; | |
3272 | ||
3273 | ap->prd[idx].addr = cpu_to_le32(addr); | |
3274 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
3275 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
3276 | ||
3277 | idx++; | |
3278 | sg_len -= len; | |
3279 | addr += len; | |
3280 | } | |
3281 | } | |
3282 | ||
3283 | if (idx) | |
3284 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
3285 | } | |
3286 | /** | |
3287 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
3288 | * @qc: Metadata associated with taskfile to check | |
3289 | * | |
780a87f7 JG |
3290 | * Allow low-level driver to filter ATA PACKET commands, returning |
3291 | * a status indicating whether or not it is OK to use DMA for the | |
3292 | * supplied PACKET command. | |
3293 | * | |
1da177e4 | 3294 | * LOCKING: |
0cba632b JG |
3295 | * spin_lock_irqsave(host_set lock) |
3296 | * | |
1da177e4 LT |
3297 | * RETURNS: 0 when ATAPI DMA can be used |
3298 | * nonzero otherwise | |
3299 | */ | |
3300 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
3301 | { | |
3302 | struct ata_port *ap = qc->ap; | |
3303 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
3304 | ||
3305 | if (ap->ops->check_atapi_dma) | |
3306 | rc = ap->ops->check_atapi_dma(qc); | |
3307 | ||
3308 | return rc; | |
3309 | } | |
3310 | /** | |
3311 | * ata_qc_prep - Prepare taskfile for submission | |
3312 | * @qc: Metadata associated with taskfile to be prepared | |
3313 | * | |
780a87f7 JG |
3314 | * Prepare ATA taskfile for submission. |
3315 | * | |
1da177e4 LT |
3316 | * LOCKING: |
3317 | * spin_lock_irqsave(host_set lock) | |
3318 | */ | |
3319 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
3320 | { | |
3321 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3322 | return; | |
3323 | ||
3324 | ata_fill_sg(qc); | |
3325 | } | |
3326 | ||
e46834cd BK |
3327 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } |
3328 | ||
0cba632b JG |
3329 | /** |
3330 | * ata_sg_init_one - Associate command with memory buffer | |
3331 | * @qc: Command to be associated | |
3332 | * @buf: Memory buffer | |
3333 | * @buflen: Length of memory buffer, in bytes. | |
3334 | * | |
3335 | * Initialize the data-related elements of queued_cmd @qc | |
3336 | * to point to a single memory buffer, @buf of byte length @buflen. | |
3337 | * | |
3338 | * LOCKING: | |
3339 | * spin_lock_irqsave(host_set lock) | |
3340 | */ | |
3341 | ||
1da177e4 LT |
3342 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
3343 | { | |
3344 | struct scatterlist *sg; | |
3345 | ||
3346 | qc->flags |= ATA_QCFLAG_SINGLE; | |
3347 | ||
3348 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
cedc9a47 | 3349 | qc->__sg = &qc->sgent; |
1da177e4 | 3350 | qc->n_elem = 1; |
cedc9a47 | 3351 | qc->orig_n_elem = 1; |
1da177e4 | 3352 | qc->buf_virt = buf; |
233277ca | 3353 | qc->nbytes = buflen; |
1da177e4 | 3354 | |
cedc9a47 | 3355 | sg = qc->__sg; |
f0612bbc | 3356 | sg_init_one(sg, buf, buflen); |
1da177e4 LT |
3357 | } |
3358 | ||
0cba632b JG |
3359 | /** |
3360 | * ata_sg_init - Associate command with scatter-gather table. | |
3361 | * @qc: Command to be associated | |
3362 | * @sg: Scatter-gather table. | |
3363 | * @n_elem: Number of elements in s/g table. | |
3364 | * | |
3365 | * Initialize the data-related elements of queued_cmd @qc | |
3366 | * to point to a scatter-gather table @sg, containing @n_elem | |
3367 | * elements. | |
3368 | * | |
3369 | * LOCKING: | |
3370 | * spin_lock_irqsave(host_set lock) | |
3371 | */ | |
3372 | ||
1da177e4 LT |
3373 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
3374 | unsigned int n_elem) | |
3375 | { | |
3376 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 3377 | qc->__sg = sg; |
1da177e4 | 3378 | qc->n_elem = n_elem; |
cedc9a47 | 3379 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
3380 | } |
3381 | ||
3382 | /** | |
0cba632b JG |
3383 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
3384 | * @qc: Command with memory buffer to be mapped. | |
3385 | * | |
3386 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
3387 | * |
3388 | * LOCKING: | |
3389 | * spin_lock_irqsave(host_set lock) | |
3390 | * | |
3391 | * RETURNS: | |
0cba632b | 3392 | * Zero on success, negative on error. |
1da177e4 LT |
3393 | */ |
3394 | ||
3395 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
3396 | { | |
3397 | struct ata_port *ap = qc->ap; | |
3398 | int dir = qc->dma_dir; | |
cedc9a47 | 3399 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 3400 | dma_addr_t dma_address; |
2e242fa9 | 3401 | int trim_sg = 0; |
1da177e4 | 3402 | |
cedc9a47 JG |
3403 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3404 | qc->pad_len = sg->length & 3; | |
3405 | if (qc->pad_len) { | |
3406 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3407 | struct scatterlist *psg = &qc->pad_sgent; | |
3408 | ||
a4631474 | 3409 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3410 | |
3411 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3412 | ||
3413 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
3414 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
3415 | qc->pad_len); | |
3416 | ||
3417 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3418 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3419 | /* trim sg */ | |
3420 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
3421 | if (sg->length == 0) |
3422 | trim_sg = 1; | |
cedc9a47 JG |
3423 | |
3424 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
3425 | sg->length, qc->pad_len); | |
3426 | } | |
3427 | ||
2e242fa9 TH |
3428 | if (trim_sg) { |
3429 | qc->n_elem--; | |
e1410f2d JG |
3430 | goto skip_map; |
3431 | } | |
3432 | ||
2f1f610b | 3433 | dma_address = dma_map_single(ap->dev, qc->buf_virt, |
32529e01 | 3434 | sg->length, dir); |
537a95d9 TH |
3435 | if (dma_mapping_error(dma_address)) { |
3436 | /* restore sg */ | |
3437 | sg->length += qc->pad_len; | |
1da177e4 | 3438 | return -1; |
537a95d9 | 3439 | } |
1da177e4 LT |
3440 | |
3441 | sg_dma_address(sg) = dma_address; | |
32529e01 | 3442 | sg_dma_len(sg) = sg->length; |
1da177e4 | 3443 | |
2e242fa9 | 3444 | skip_map: |
1da177e4 LT |
3445 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
3446 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3447 | ||
3448 | return 0; | |
3449 | } | |
3450 | ||
3451 | /** | |
0cba632b JG |
3452 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
3453 | * @qc: Command with scatter-gather table to be mapped. | |
3454 | * | |
3455 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
3456 | * |
3457 | * LOCKING: | |
3458 | * spin_lock_irqsave(host_set lock) | |
3459 | * | |
3460 | * RETURNS: | |
0cba632b | 3461 | * Zero on success, negative on error. |
1da177e4 LT |
3462 | * |
3463 | */ | |
3464 | ||
3465 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
3466 | { | |
3467 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
3468 | struct scatterlist *sg = qc->__sg; |
3469 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 3470 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 LT |
3471 | |
3472 | VPRINTK("ENTER, ata%u\n", ap->id); | |
a4631474 | 3473 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 3474 | |
cedc9a47 JG |
3475 | /* we must lengthen transfers to end on a 32-bit boundary */ |
3476 | qc->pad_len = lsg->length & 3; | |
3477 | if (qc->pad_len) { | |
3478 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3479 | struct scatterlist *psg = &qc->pad_sgent; | |
3480 | unsigned int offset; | |
3481 | ||
a4631474 | 3482 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
3483 | |
3484 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3485 | ||
3486 | /* | |
3487 | * psg->page/offset are used to copy to-be-written | |
3488 | * data in this function or read data in ata_sg_clean. | |
3489 | */ | |
3490 | offset = lsg->offset + lsg->length - qc->pad_len; | |
3491 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
3492 | psg->offset = offset_in_page(offset); | |
3493 | ||
3494 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
3495 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3496 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 3497 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
3498 | } |
3499 | ||
3500 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3501 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3502 | /* trim last sg */ | |
3503 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
3504 | if (lsg->length == 0) |
3505 | trim_sg = 1; | |
cedc9a47 JG |
3506 | |
3507 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
3508 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
3509 | } | |
3510 | ||
e1410f2d JG |
3511 | pre_n_elem = qc->n_elem; |
3512 | if (trim_sg && pre_n_elem) | |
3513 | pre_n_elem--; | |
3514 | ||
3515 | if (!pre_n_elem) { | |
3516 | n_elem = 0; | |
3517 | goto skip_map; | |
3518 | } | |
3519 | ||
1da177e4 | 3520 | dir = qc->dma_dir; |
2f1f610b | 3521 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
3522 | if (n_elem < 1) { |
3523 | /* restore last sg */ | |
3524 | lsg->length += qc->pad_len; | |
1da177e4 | 3525 | return -1; |
537a95d9 | 3526 | } |
1da177e4 LT |
3527 | |
3528 | DPRINTK("%d sg elements mapped\n", n_elem); | |
3529 | ||
e1410f2d | 3530 | skip_map: |
1da177e4 LT |
3531 | qc->n_elem = n_elem; |
3532 | ||
3533 | return 0; | |
3534 | } | |
3535 | ||
0baab86b | 3536 | /** |
c893a3ae | 3537 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
3538 | * @buf: Buffer to swap |
3539 | * @buf_words: Number of 16-bit words in buffer. | |
3540 | * | |
3541 | * Swap halves of 16-bit words if needed to convert from | |
3542 | * little-endian byte order to native cpu byte order, or | |
3543 | * vice-versa. | |
3544 | * | |
3545 | * LOCKING: | |
6f0ef4fa | 3546 | * Inherited from caller. |
0baab86b | 3547 | */ |
1da177e4 LT |
3548 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
3549 | { | |
3550 | #ifdef __BIG_ENDIAN | |
3551 | unsigned int i; | |
3552 | ||
3553 | for (i = 0; i < buf_words; i++) | |
3554 | buf[i] = le16_to_cpu(buf[i]); | |
3555 | #endif /* __BIG_ENDIAN */ | |
3556 | } | |
3557 | ||
6ae4cfb5 AL |
3558 | /** |
3559 | * ata_mmio_data_xfer - Transfer data by MMIO | |
bf717b11 | 3560 | * @adev: device for this I/O |
6ae4cfb5 AL |
3561 | * @buf: data buffer |
3562 | * @buflen: buffer length | |
344babaa | 3563 | * @write_data: read/write |
6ae4cfb5 AL |
3564 | * |
3565 | * Transfer data from/to the device data register by MMIO. | |
3566 | * | |
3567 | * LOCKING: | |
3568 | * Inherited from caller. | |
6ae4cfb5 AL |
3569 | */ |
3570 | ||
88574551 | 3571 | void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, |
a6b2c5d4 | 3572 | unsigned int buflen, int write_data) |
1da177e4 | 3573 | { |
a6b2c5d4 | 3574 | struct ata_port *ap = adev->ap; |
1da177e4 LT |
3575 | unsigned int i; |
3576 | unsigned int words = buflen >> 1; | |
3577 | u16 *buf16 = (u16 *) buf; | |
3578 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
3579 | ||
6ae4cfb5 | 3580 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
3581 | if (write_data) { |
3582 | for (i = 0; i < words; i++) | |
3583 | writew(le16_to_cpu(buf16[i]), mmio); | |
3584 | } else { | |
3585 | for (i = 0; i < words; i++) | |
3586 | buf16[i] = cpu_to_le16(readw(mmio)); | |
3587 | } | |
6ae4cfb5 AL |
3588 | |
3589 | /* Transfer trailing 1 byte, if any. */ | |
3590 | if (unlikely(buflen & 0x01)) { | |
3591 | u16 align_buf[1] = { 0 }; | |
3592 | unsigned char *trailing_buf = buf + buflen - 1; | |
3593 | ||
3594 | if (write_data) { | |
3595 | memcpy(align_buf, trailing_buf, 1); | |
3596 | writew(le16_to_cpu(align_buf[0]), mmio); | |
3597 | } else { | |
3598 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
3599 | memcpy(trailing_buf, align_buf, 1); | |
3600 | } | |
3601 | } | |
1da177e4 LT |
3602 | } |
3603 | ||
6ae4cfb5 AL |
3604 | /** |
3605 | * ata_pio_data_xfer - Transfer data by PIO | |
a6b2c5d4 | 3606 | * @adev: device to target |
6ae4cfb5 AL |
3607 | * @buf: data buffer |
3608 | * @buflen: buffer length | |
344babaa | 3609 | * @write_data: read/write |
6ae4cfb5 AL |
3610 | * |
3611 | * Transfer data from/to the device data register by PIO. | |
3612 | * | |
3613 | * LOCKING: | |
3614 | * Inherited from caller. | |
6ae4cfb5 AL |
3615 | */ |
3616 | ||
88574551 | 3617 | void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf, |
a6b2c5d4 | 3618 | unsigned int buflen, int write_data) |
1da177e4 | 3619 | { |
a6b2c5d4 | 3620 | struct ata_port *ap = adev->ap; |
6ae4cfb5 | 3621 | unsigned int words = buflen >> 1; |
1da177e4 | 3622 | |
6ae4cfb5 | 3623 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 3624 | if (write_data) |
6ae4cfb5 | 3625 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 3626 | else |
6ae4cfb5 AL |
3627 | insw(ap->ioaddr.data_addr, buf, words); |
3628 | ||
3629 | /* Transfer trailing 1 byte, if any. */ | |
3630 | if (unlikely(buflen & 0x01)) { | |
3631 | u16 align_buf[1] = { 0 }; | |
3632 | unsigned char *trailing_buf = buf + buflen - 1; | |
3633 | ||
3634 | if (write_data) { | |
3635 | memcpy(align_buf, trailing_buf, 1); | |
3636 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3637 | } else { | |
3638 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
3639 | memcpy(trailing_buf, align_buf, 1); | |
3640 | } | |
3641 | } | |
1da177e4 LT |
3642 | } |
3643 | ||
75e99585 AC |
3644 | /** |
3645 | * ata_pio_data_xfer_noirq - Transfer data by PIO | |
3646 | * @adev: device to target | |
3647 | * @buf: data buffer | |
3648 | * @buflen: buffer length | |
3649 | * @write_data: read/write | |
3650 | * | |
88574551 | 3651 | * Transfer data from/to the device data register by PIO. Do the |
75e99585 AC |
3652 | * transfer with interrupts disabled. |
3653 | * | |
3654 | * LOCKING: | |
3655 | * Inherited from caller. | |
3656 | */ | |
3657 | ||
3658 | void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, | |
3659 | unsigned int buflen, int write_data) | |
3660 | { | |
3661 | unsigned long flags; | |
3662 | local_irq_save(flags); | |
3663 | ata_pio_data_xfer(adev, buf, buflen, write_data); | |
3664 | local_irq_restore(flags); | |
3665 | } | |
3666 | ||
3667 | ||
6ae4cfb5 AL |
3668 | /** |
3669 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
3670 | * @qc: Command on going | |
3671 | * | |
3672 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
3673 | * | |
3674 | * LOCKING: | |
3675 | * Inherited from caller. | |
3676 | */ | |
3677 | ||
1da177e4 LT |
3678 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
3679 | { | |
3680 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3681 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3682 | struct ata_port *ap = qc->ap; |
3683 | struct page *page; | |
3684 | unsigned int offset; | |
3685 | unsigned char *buf; | |
3686 | ||
3687 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 3688 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3689 | |
3690 | page = sg[qc->cursg].page; | |
3691 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
3692 | ||
3693 | /* get the current page and offset */ | |
3694 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3695 | offset %= PAGE_SIZE; | |
3696 | ||
1da177e4 LT |
3697 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
3698 | ||
91b8b313 AL |
3699 | if (PageHighMem(page)) { |
3700 | unsigned long flags; | |
3701 | ||
a6b2c5d4 | 3702 | /* FIXME: use a bounce buffer */ |
91b8b313 AL |
3703 | local_irq_save(flags); |
3704 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 3705 | |
91b8b313 | 3706 | /* do the actual data transfer */ |
a6b2c5d4 | 3707 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
1da177e4 | 3708 | |
91b8b313 AL |
3709 | kunmap_atomic(buf, KM_IRQ0); |
3710 | local_irq_restore(flags); | |
3711 | } else { | |
3712 | buf = page_address(page); | |
a6b2c5d4 | 3713 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); |
91b8b313 | 3714 | } |
1da177e4 LT |
3715 | |
3716 | qc->cursect++; | |
3717 | qc->cursg_ofs++; | |
3718 | ||
32529e01 | 3719 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
3720 | qc->cursg++; |
3721 | qc->cursg_ofs = 0; | |
3722 | } | |
1da177e4 | 3723 | } |
1da177e4 | 3724 | |
07f6f7d0 AL |
3725 | /** |
3726 | * ata_pio_sectors - Transfer one or many 512-byte sectors. | |
3727 | * @qc: Command on going | |
3728 | * | |
c81e29b4 | 3729 | * Transfer one or many ATA_SECT_SIZE of data from/to the |
07f6f7d0 AL |
3730 | * ATA device for the DRQ request. |
3731 | * | |
3732 | * LOCKING: | |
3733 | * Inherited from caller. | |
3734 | */ | |
1da177e4 | 3735 | |
07f6f7d0 AL |
3736 | static void ata_pio_sectors(struct ata_queued_cmd *qc) |
3737 | { | |
3738 | if (is_multi_taskfile(&qc->tf)) { | |
3739 | /* READ/WRITE MULTIPLE */ | |
3740 | unsigned int nsect; | |
3741 | ||
587005de | 3742 | WARN_ON(qc->dev->multi_count == 0); |
1da177e4 | 3743 | |
07f6f7d0 AL |
3744 | nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count); |
3745 | while (nsect--) | |
3746 | ata_pio_sector(qc); | |
3747 | } else | |
3748 | ata_pio_sector(qc); | |
3749 | } | |
3750 | ||
c71c1857 AL |
3751 | /** |
3752 | * atapi_send_cdb - Write CDB bytes to hardware | |
3753 | * @ap: Port to which ATAPI device is attached. | |
3754 | * @qc: Taskfile currently active | |
3755 | * | |
3756 | * When device has indicated its readiness to accept | |
3757 | * a CDB, this function is called. Send the CDB. | |
3758 | * | |
3759 | * LOCKING: | |
3760 | * caller. | |
3761 | */ | |
3762 | ||
3763 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
3764 | { | |
3765 | /* send SCSI cdb */ | |
3766 | DPRINTK("send cdb\n"); | |
db024d53 | 3767 | WARN_ON(qc->dev->cdb_len < 12); |
c71c1857 | 3768 | |
a6b2c5d4 | 3769 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); |
c71c1857 AL |
3770 | ata_altstatus(ap); /* flush */ |
3771 | ||
3772 | switch (qc->tf.protocol) { | |
3773 | case ATA_PROT_ATAPI: | |
3774 | ap->hsm_task_state = HSM_ST; | |
3775 | break; | |
3776 | case ATA_PROT_ATAPI_NODATA: | |
3777 | ap->hsm_task_state = HSM_ST_LAST; | |
3778 | break; | |
3779 | case ATA_PROT_ATAPI_DMA: | |
3780 | ap->hsm_task_state = HSM_ST_LAST; | |
3781 | /* initiate bmdma */ | |
3782 | ap->ops->bmdma_start(qc); | |
3783 | break; | |
3784 | } | |
1da177e4 LT |
3785 | } |
3786 | ||
6ae4cfb5 AL |
3787 | /** |
3788 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3789 | * @qc: Command on going | |
3790 | * @bytes: number of bytes | |
3791 | * | |
3792 | * Transfer Transfer data from/to the ATAPI device. | |
3793 | * | |
3794 | * LOCKING: | |
3795 | * Inherited from caller. | |
3796 | * | |
3797 | */ | |
3798 | ||
1da177e4 LT |
3799 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
3800 | { | |
3801 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3802 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3803 | struct ata_port *ap = qc->ap; |
3804 | struct page *page; | |
3805 | unsigned char *buf; | |
3806 | unsigned int offset, count; | |
3807 | ||
563a6e1f | 3808 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 3809 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3810 | |
3811 | next_sg: | |
563a6e1f | 3812 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 3813 | /* |
563a6e1f AL |
3814 | * The end of qc->sg is reached and the device expects |
3815 | * more data to transfer. In order not to overrun qc->sg | |
3816 | * and fulfill length specified in the byte count register, | |
3817 | * - for read case, discard trailing data from the device | |
3818 | * - for write case, padding zero data to the device | |
3819 | */ | |
3820 | u16 pad_buf[1] = { 0 }; | |
3821 | unsigned int words = bytes >> 1; | |
3822 | unsigned int i; | |
3823 | ||
3824 | if (words) /* warning if bytes > 1 */ | |
f15a1daf TH |
3825 | ata_dev_printk(qc->dev, KERN_WARNING, |
3826 | "%u bytes trailing data\n", bytes); | |
563a6e1f AL |
3827 | |
3828 | for (i = 0; i < words; i++) | |
a6b2c5d4 | 3829 | ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write); |
563a6e1f | 3830 | |
14be71f4 | 3831 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
3832 | return; |
3833 | } | |
3834 | ||
cedc9a47 | 3835 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 3836 | |
1da177e4 LT |
3837 | page = sg->page; |
3838 | offset = sg->offset + qc->cursg_ofs; | |
3839 | ||
3840 | /* get the current page and offset */ | |
3841 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3842 | offset %= PAGE_SIZE; | |
3843 | ||
6952df03 | 3844 | /* don't overrun current sg */ |
32529e01 | 3845 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
3846 | |
3847 | /* don't cross page boundaries */ | |
3848 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
3849 | ||
7282aa4b AL |
3850 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
3851 | ||
91b8b313 AL |
3852 | if (PageHighMem(page)) { |
3853 | unsigned long flags; | |
3854 | ||
a6b2c5d4 | 3855 | /* FIXME: use bounce buffer */ |
91b8b313 AL |
3856 | local_irq_save(flags); |
3857 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 3858 | |
91b8b313 | 3859 | /* do the actual data transfer */ |
a6b2c5d4 | 3860 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
7282aa4b | 3861 | |
91b8b313 AL |
3862 | kunmap_atomic(buf, KM_IRQ0); |
3863 | local_irq_restore(flags); | |
3864 | } else { | |
3865 | buf = page_address(page); | |
a6b2c5d4 | 3866 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
91b8b313 | 3867 | } |
1da177e4 LT |
3868 | |
3869 | bytes -= count; | |
3870 | qc->curbytes += count; | |
3871 | qc->cursg_ofs += count; | |
3872 | ||
32529e01 | 3873 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
3874 | qc->cursg++; |
3875 | qc->cursg_ofs = 0; | |
3876 | } | |
3877 | ||
563a6e1f | 3878 | if (bytes) |
1da177e4 | 3879 | goto next_sg; |
1da177e4 LT |
3880 | } |
3881 | ||
6ae4cfb5 AL |
3882 | /** |
3883 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3884 | * @qc: Command on going | |
3885 | * | |
3886 | * Transfer Transfer data from/to the ATAPI device. | |
3887 | * | |
3888 | * LOCKING: | |
3889 | * Inherited from caller. | |
6ae4cfb5 AL |
3890 | */ |
3891 | ||
1da177e4 LT |
3892 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
3893 | { | |
3894 | struct ata_port *ap = qc->ap; | |
3895 | struct ata_device *dev = qc->dev; | |
3896 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
3897 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
3898 | ||
eec4c3f3 AL |
3899 | /* Abuse qc->result_tf for temp storage of intermediate TF |
3900 | * here to save some kernel stack usage. | |
3901 | * For normal completion, qc->result_tf is not relevant. For | |
3902 | * error, qc->result_tf is later overwritten by ata_qc_complete(). | |
3903 | * So, the correctness of qc->result_tf is not affected. | |
3904 | */ | |
3905 | ap->ops->tf_read(ap, &qc->result_tf); | |
3906 | ireason = qc->result_tf.nsect; | |
3907 | bc_lo = qc->result_tf.lbam; | |
3908 | bc_hi = qc->result_tf.lbah; | |
1da177e4 LT |
3909 | bytes = (bc_hi << 8) | bc_lo; |
3910 | ||
3911 | /* shall be cleared to zero, indicating xfer of data */ | |
3912 | if (ireason & (1 << 0)) | |
3913 | goto err_out; | |
3914 | ||
3915 | /* make sure transfer direction matches expected */ | |
3916 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
3917 | if (do_write != i_write) | |
3918 | goto err_out; | |
3919 | ||
312f7da2 AL |
3920 | VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes); |
3921 | ||
1da177e4 LT |
3922 | __atapi_pio_bytes(qc, bytes); |
3923 | ||
3924 | return; | |
3925 | ||
3926 | err_out: | |
f15a1daf | 3927 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); |
11a56d24 | 3928 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 3929 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3930 | } |
3931 | ||
3932 | /** | |
c234fb00 AL |
3933 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. |
3934 | * @ap: the target ata_port | |
3935 | * @qc: qc on going | |
1da177e4 | 3936 | * |
c234fb00 AL |
3937 | * RETURNS: |
3938 | * 1 if ok in workqueue, 0 otherwise. | |
1da177e4 | 3939 | */ |
c234fb00 AL |
3940 | |
3941 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) | |
1da177e4 | 3942 | { |
c234fb00 AL |
3943 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
3944 | return 1; | |
1da177e4 | 3945 | |
c234fb00 AL |
3946 | if (ap->hsm_task_state == HSM_ST_FIRST) { |
3947 | if (qc->tf.protocol == ATA_PROT_PIO && | |
3948 | (qc->tf.flags & ATA_TFLAG_WRITE)) | |
3949 | return 1; | |
1da177e4 | 3950 | |
c234fb00 AL |
3951 | if (is_atapi_taskfile(&qc->tf) && |
3952 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
3953 | return 1; | |
fe79e683 AL |
3954 | } |
3955 | ||
c234fb00 AL |
3956 | return 0; |
3957 | } | |
1da177e4 | 3958 | |
c17ea20d TH |
3959 | /** |
3960 | * ata_hsm_qc_complete - finish a qc running on standard HSM | |
3961 | * @qc: Command to complete | |
3962 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
3963 | * | |
3964 | * Finish @qc which is running on standard HSM. | |
3965 | * | |
3966 | * LOCKING: | |
3967 | * If @in_wq is zero, spin_lock_irqsave(host_set lock). | |
3968 | * Otherwise, none on entry and grabs host lock. | |
3969 | */ | |
3970 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) | |
3971 | { | |
3972 | struct ata_port *ap = qc->ap; | |
3973 | unsigned long flags; | |
3974 | ||
3975 | if (ap->ops->error_handler) { | |
3976 | if (in_wq) { | |
ba6a1308 | 3977 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d TH |
3978 | |
3979 | /* EH might have kicked in while host_set lock | |
3980 | * is released. | |
3981 | */ | |
3982 | qc = ata_qc_from_tag(ap, qc->tag); | |
3983 | if (qc) { | |
3984 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { | |
3985 | ata_irq_on(ap); | |
3986 | ata_qc_complete(qc); | |
3987 | } else | |
3988 | ata_port_freeze(ap); | |
3989 | } | |
3990 | ||
ba6a1308 | 3991 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
3992 | } else { |
3993 | if (likely(!(qc->err_mask & AC_ERR_HSM))) | |
3994 | ata_qc_complete(qc); | |
3995 | else | |
3996 | ata_port_freeze(ap); | |
3997 | } | |
3998 | } else { | |
3999 | if (in_wq) { | |
ba6a1308 | 4000 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d TH |
4001 | ata_irq_on(ap); |
4002 | ata_qc_complete(qc); | |
ba6a1308 | 4003 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
4004 | } else |
4005 | ata_qc_complete(qc); | |
4006 | } | |
1da177e4 | 4007 | |
c81e29b4 | 4008 | ata_altstatus(ap); /* flush */ |
c17ea20d TH |
4009 | } |
4010 | ||
bb5cb290 AL |
4011 | /** |
4012 | * ata_hsm_move - move the HSM to the next state. | |
4013 | * @ap: the target ata_port | |
4014 | * @qc: qc on going | |
4015 | * @status: current device status | |
4016 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4017 | * | |
4018 | * RETURNS: | |
4019 | * 1 when poll next status needed, 0 otherwise. | |
4020 | */ | |
9a1004d0 TH |
4021 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, |
4022 | u8 status, int in_wq) | |
e2cec771 | 4023 | { |
bb5cb290 AL |
4024 | unsigned long flags = 0; |
4025 | int poll_next; | |
4026 | ||
6912ccd5 AL |
4027 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); |
4028 | ||
bb5cb290 AL |
4029 | /* Make sure ata_qc_issue_prot() does not throw things |
4030 | * like DMA polling into the workqueue. Notice that | |
4031 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). | |
4032 | */ | |
c234fb00 | 4033 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); |
bb5cb290 | 4034 | |
e2cec771 | 4035 | fsm_start: |
999bb6f4 AL |
4036 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
4037 | ap->id, qc->tf.protocol, ap->hsm_task_state, status); | |
4038 | ||
e2cec771 AL |
4039 | switch (ap->hsm_task_state) { |
4040 | case HSM_ST_FIRST: | |
bb5cb290 AL |
4041 | /* Send first data block or PACKET CDB */ |
4042 | ||
4043 | /* If polling, we will stay in the work queue after | |
4044 | * sending the data. Otherwise, interrupt handler | |
4045 | * takes over after sending the data. | |
4046 | */ | |
4047 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
4048 | ||
e2cec771 | 4049 | /* check device status */ |
3655d1d3 AL |
4050 | if (unlikely((status & ATA_DRQ) == 0)) { |
4051 | /* handle BSY=0, DRQ=0 as error */ | |
4052 | if (likely(status & (ATA_ERR | ATA_DF))) | |
4053 | /* device stops HSM for abort/error */ | |
4054 | qc->err_mask |= AC_ERR_DEV; | |
4055 | else | |
4056 | /* HSM violation. Let EH handle this */ | |
4057 | qc->err_mask |= AC_ERR_HSM; | |
4058 | ||
14be71f4 | 4059 | ap->hsm_task_state = HSM_ST_ERR; |
e2cec771 | 4060 | goto fsm_start; |
1da177e4 LT |
4061 | } |
4062 | ||
71601958 AL |
4063 | /* Device should not ask for data transfer (DRQ=1) |
4064 | * when it finds something wrong. | |
eee6c32f AL |
4065 | * We ignore DRQ here and stop the HSM by |
4066 | * changing hsm_task_state to HSM_ST_ERR and | |
4067 | * let the EH abort the command or reset the device. | |
71601958 AL |
4068 | */ |
4069 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4070 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4071 | ap->id, status); | |
3655d1d3 | 4072 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4073 | ap->hsm_task_state = HSM_ST_ERR; |
4074 | goto fsm_start; | |
71601958 | 4075 | } |
1da177e4 | 4076 | |
bb5cb290 AL |
4077 | /* Send the CDB (atapi) or the first data block (ata pio out). |
4078 | * During the state transition, interrupt handler shouldn't | |
4079 | * be invoked before the data transfer is complete and | |
4080 | * hsm_task_state is changed. Hence, the following locking. | |
4081 | */ | |
4082 | if (in_wq) | |
ba6a1308 | 4083 | spin_lock_irqsave(ap->lock, flags); |
1da177e4 | 4084 | |
bb5cb290 AL |
4085 | if (qc->tf.protocol == ATA_PROT_PIO) { |
4086 | /* PIO data out protocol. | |
4087 | * send first data block. | |
4088 | */ | |
0565c26d | 4089 | |
bb5cb290 AL |
4090 | /* ata_pio_sectors() might change the state |
4091 | * to HSM_ST_LAST. so, the state is changed here | |
4092 | * before ata_pio_sectors(). | |
4093 | */ | |
4094 | ap->hsm_task_state = HSM_ST; | |
4095 | ata_pio_sectors(qc); | |
4096 | ata_altstatus(ap); /* flush */ | |
4097 | } else | |
4098 | /* send CDB */ | |
4099 | atapi_send_cdb(ap, qc); | |
4100 | ||
4101 | if (in_wq) | |
ba6a1308 | 4102 | spin_unlock_irqrestore(ap->lock, flags); |
bb5cb290 AL |
4103 | |
4104 | /* if polling, ata_pio_task() handles the rest. | |
4105 | * otherwise, interrupt handler takes over from here. | |
4106 | */ | |
e2cec771 | 4107 | break; |
1c848984 | 4108 | |
e2cec771 AL |
4109 | case HSM_ST: |
4110 | /* complete command or read/write the data register */ | |
4111 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
4112 | /* ATAPI PIO protocol */ | |
4113 | if ((status & ATA_DRQ) == 0) { | |
3655d1d3 AL |
4114 | /* No more data to transfer or device error. |
4115 | * Device error will be tagged in HSM_ST_LAST. | |
4116 | */ | |
e2cec771 AL |
4117 | ap->hsm_task_state = HSM_ST_LAST; |
4118 | goto fsm_start; | |
4119 | } | |
1da177e4 | 4120 | |
71601958 AL |
4121 | /* Device should not ask for data transfer (DRQ=1) |
4122 | * when it finds something wrong. | |
eee6c32f AL |
4123 | * We ignore DRQ here and stop the HSM by |
4124 | * changing hsm_task_state to HSM_ST_ERR and | |
4125 | * let the EH abort the command or reset the device. | |
71601958 AL |
4126 | */ |
4127 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4128 | printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n", | |
4129 | ap->id, status); | |
3655d1d3 | 4130 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
4131 | ap->hsm_task_state = HSM_ST_ERR; |
4132 | goto fsm_start; | |
71601958 | 4133 | } |
1da177e4 | 4134 | |
e2cec771 | 4135 | atapi_pio_bytes(qc); |
7fb6ec28 | 4136 | |
e2cec771 AL |
4137 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) |
4138 | /* bad ireason reported by device */ | |
4139 | goto fsm_start; | |
1da177e4 | 4140 | |
e2cec771 AL |
4141 | } else { |
4142 | /* ATA PIO protocol */ | |
4143 | if (unlikely((status & ATA_DRQ) == 0)) { | |
4144 | /* handle BSY=0, DRQ=0 as error */ | |
3655d1d3 AL |
4145 | if (likely(status & (ATA_ERR | ATA_DF))) |
4146 | /* device stops HSM for abort/error */ | |
4147 | qc->err_mask |= AC_ERR_DEV; | |
4148 | else | |
4149 | /* HSM violation. Let EH handle this */ | |
4150 | qc->err_mask |= AC_ERR_HSM; | |
4151 | ||
e2cec771 AL |
4152 | ap->hsm_task_state = HSM_ST_ERR; |
4153 | goto fsm_start; | |
4154 | } | |
1da177e4 | 4155 | |
eee6c32f AL |
4156 | /* For PIO reads, some devices may ask for |
4157 | * data transfer (DRQ=1) alone with ERR=1. | |
4158 | * We respect DRQ here and transfer one | |
4159 | * block of junk data before changing the | |
4160 | * hsm_task_state to HSM_ST_ERR. | |
4161 | * | |
4162 | * For PIO writes, ERR=1 DRQ=1 doesn't make | |
4163 | * sense since the data block has been | |
4164 | * transferred to the device. | |
71601958 AL |
4165 | */ |
4166 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
71601958 AL |
4167 | /* data might be corrputed */ |
4168 | qc->err_mask |= AC_ERR_DEV; | |
eee6c32f AL |
4169 | |
4170 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { | |
4171 | ata_pio_sectors(qc); | |
4172 | ata_altstatus(ap); | |
4173 | status = ata_wait_idle(ap); | |
4174 | } | |
4175 | ||
3655d1d3 AL |
4176 | if (status & (ATA_BUSY | ATA_DRQ)) |
4177 | qc->err_mask |= AC_ERR_HSM; | |
4178 | ||
eee6c32f AL |
4179 | /* ata_pio_sectors() might change the |
4180 | * state to HSM_ST_LAST. so, the state | |
4181 | * is changed after ata_pio_sectors(). | |
4182 | */ | |
4183 | ap->hsm_task_state = HSM_ST_ERR; | |
4184 | goto fsm_start; | |
71601958 AL |
4185 | } |
4186 | ||
e2cec771 AL |
4187 | ata_pio_sectors(qc); |
4188 | ||
4189 | if (ap->hsm_task_state == HSM_ST_LAST && | |
4190 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
4191 | /* all data read */ | |
4192 | ata_altstatus(ap); | |
52a32205 | 4193 | status = ata_wait_idle(ap); |
e2cec771 AL |
4194 | goto fsm_start; |
4195 | } | |
4196 | } | |
4197 | ||
4198 | ata_altstatus(ap); /* flush */ | |
bb5cb290 | 4199 | poll_next = 1; |
1da177e4 LT |
4200 | break; |
4201 | ||
14be71f4 | 4202 | case HSM_ST_LAST: |
6912ccd5 AL |
4203 | if (unlikely(!ata_ok(status))) { |
4204 | qc->err_mask |= __ac_err_mask(status); | |
e2cec771 AL |
4205 | ap->hsm_task_state = HSM_ST_ERR; |
4206 | goto fsm_start; | |
4207 | } | |
4208 | ||
4209 | /* no more data to transfer */ | |
4332a771 AL |
4210 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", |
4211 | ap->id, qc->dev->devno, status); | |
e2cec771 | 4212 | |
6912ccd5 AL |
4213 | WARN_ON(qc->err_mask); |
4214 | ||
e2cec771 | 4215 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 4216 | |
e2cec771 | 4217 | /* complete taskfile transaction */ |
c17ea20d | 4218 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4219 | |
4220 | poll_next = 0; | |
1da177e4 LT |
4221 | break; |
4222 | ||
14be71f4 | 4223 | case HSM_ST_ERR: |
e2cec771 AL |
4224 | /* make sure qc->err_mask is available to |
4225 | * know what's wrong and recover | |
4226 | */ | |
4227 | WARN_ON(qc->err_mask == 0); | |
4228 | ||
4229 | ap->hsm_task_state = HSM_ST_IDLE; | |
bb5cb290 | 4230 | |
999bb6f4 | 4231 | /* complete taskfile transaction */ |
c17ea20d | 4232 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
4233 | |
4234 | poll_next = 0; | |
e2cec771 AL |
4235 | break; |
4236 | default: | |
bb5cb290 | 4237 | poll_next = 0; |
6912ccd5 | 4238 | BUG(); |
1da177e4 LT |
4239 | } |
4240 | ||
bb5cb290 | 4241 | return poll_next; |
1da177e4 LT |
4242 | } |
4243 | ||
1da177e4 | 4244 | static void ata_pio_task(void *_data) |
8061f5f0 | 4245 | { |
c91af2c8 TH |
4246 | struct ata_queued_cmd *qc = _data; |
4247 | struct ata_port *ap = qc->ap; | |
8061f5f0 | 4248 | u8 status; |
a1af3734 | 4249 | int poll_next; |
8061f5f0 | 4250 | |
7fb6ec28 | 4251 | fsm_start: |
a1af3734 | 4252 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); |
8061f5f0 | 4253 | |
a1af3734 AL |
4254 | /* |
4255 | * This is purely heuristic. This is a fast path. | |
4256 | * Sometimes when we enter, BSY will be cleared in | |
4257 | * a chk-status or two. If not, the drive is probably seeking | |
4258 | * or something. Snooze for a couple msecs, then | |
4259 | * chk-status again. If still busy, queue delayed work. | |
4260 | */ | |
4261 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
4262 | if (status & ATA_BUSY) { | |
4263 | msleep(2); | |
4264 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
4265 | if (status & ATA_BUSY) { | |
31ce6dae | 4266 | ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); |
a1af3734 AL |
4267 | return; |
4268 | } | |
8061f5f0 TH |
4269 | } |
4270 | ||
a1af3734 AL |
4271 | /* move the HSM */ |
4272 | poll_next = ata_hsm_move(ap, qc, status, 1); | |
8061f5f0 | 4273 | |
a1af3734 AL |
4274 | /* another command or interrupt handler |
4275 | * may be running at this point. | |
4276 | */ | |
4277 | if (poll_next) | |
7fb6ec28 | 4278 | goto fsm_start; |
8061f5f0 TH |
4279 | } |
4280 | ||
1da177e4 LT |
4281 | /** |
4282 | * ata_qc_new - Request an available ATA command, for queueing | |
4283 | * @ap: Port associated with device @dev | |
4284 | * @dev: Device from whom we request an available command structure | |
4285 | * | |
4286 | * LOCKING: | |
0cba632b | 4287 | * None. |
1da177e4 LT |
4288 | */ |
4289 | ||
4290 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
4291 | { | |
4292 | struct ata_queued_cmd *qc = NULL; | |
4293 | unsigned int i; | |
4294 | ||
e3180499 | 4295 | /* no command while frozen */ |
b51e9e5d | 4296 | if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) |
e3180499 TH |
4297 | return NULL; |
4298 | ||
2ab7db1f TH |
4299 | /* the last tag is reserved for internal command. */ |
4300 | for (i = 0; i < ATA_MAX_QUEUE - 1; i++) | |
6cec4a39 | 4301 | if (!test_and_set_bit(i, &ap->qc_allocated)) { |
f69499f4 | 4302 | qc = __ata_qc_from_tag(ap, i); |
1da177e4 LT |
4303 | break; |
4304 | } | |
4305 | ||
4306 | if (qc) | |
4307 | qc->tag = i; | |
4308 | ||
4309 | return qc; | |
4310 | } | |
4311 | ||
4312 | /** | |
4313 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
1da177e4 LT |
4314 | * @dev: Device from whom we request an available command structure |
4315 | * | |
4316 | * LOCKING: | |
0cba632b | 4317 | * None. |
1da177e4 LT |
4318 | */ |
4319 | ||
3373efd8 | 4320 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) |
1da177e4 | 4321 | { |
3373efd8 | 4322 | struct ata_port *ap = dev->ap; |
1da177e4 LT |
4323 | struct ata_queued_cmd *qc; |
4324 | ||
4325 | qc = ata_qc_new(ap); | |
4326 | if (qc) { | |
1da177e4 LT |
4327 | qc->scsicmd = NULL; |
4328 | qc->ap = ap; | |
4329 | qc->dev = dev; | |
1da177e4 | 4330 | |
2c13b7ce | 4331 | ata_qc_reinit(qc); |
1da177e4 LT |
4332 | } |
4333 | ||
4334 | return qc; | |
4335 | } | |
4336 | ||
1da177e4 LT |
4337 | /** |
4338 | * ata_qc_free - free unused ata_queued_cmd | |
4339 | * @qc: Command to complete | |
4340 | * | |
4341 | * Designed to free unused ata_queued_cmd object | |
4342 | * in case something prevents using it. | |
4343 | * | |
4344 | * LOCKING: | |
0cba632b | 4345 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
4346 | */ |
4347 | void ata_qc_free(struct ata_queued_cmd *qc) | |
4348 | { | |
4ba946e9 TH |
4349 | struct ata_port *ap = qc->ap; |
4350 | unsigned int tag; | |
4351 | ||
a4631474 | 4352 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 4353 | |
4ba946e9 TH |
4354 | qc->flags = 0; |
4355 | tag = qc->tag; | |
4356 | if (likely(ata_tag_valid(tag))) { | |
4ba946e9 | 4357 | qc->tag = ATA_TAG_POISON; |
6cec4a39 | 4358 | clear_bit(tag, &ap->qc_allocated); |
4ba946e9 | 4359 | } |
1da177e4 LT |
4360 | } |
4361 | ||
76014427 | 4362 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 4363 | { |
dedaf2b0 TH |
4364 | struct ata_port *ap = qc->ap; |
4365 | ||
a4631474 TH |
4366 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4367 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
4368 | |
4369 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4370 | ata_sg_clean(qc); | |
4371 | ||
7401abf2 | 4372 | /* command should be marked inactive atomically with qc completion */ |
dedaf2b0 TH |
4373 | if (qc->tf.protocol == ATA_PROT_NCQ) |
4374 | ap->sactive &= ~(1 << qc->tag); | |
4375 | else | |
4376 | ap->active_tag = ATA_TAG_POISON; | |
7401abf2 | 4377 | |
3f3791d3 AL |
4378 | /* atapi: mark qc as inactive to prevent the interrupt handler |
4379 | * from completing the command twice later, before the error handler | |
4380 | * is called. (when rc != 0 and atapi request sense is needed) | |
4381 | */ | |
4382 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
dedaf2b0 | 4383 | ap->qc_active &= ~(1 << qc->tag); |
3f3791d3 | 4384 | |
1da177e4 | 4385 | /* call completion callback */ |
77853bf2 | 4386 | qc->complete_fn(qc); |
1da177e4 LT |
4387 | } |
4388 | ||
f686bcb8 TH |
4389 | /** |
4390 | * ata_qc_complete - Complete an active ATA command | |
4391 | * @qc: Command to complete | |
4392 | * @err_mask: ATA Status register contents | |
4393 | * | |
4394 | * Indicate to the mid and upper layers that an ATA | |
4395 | * command has completed, with either an ok or not-ok status. | |
4396 | * | |
4397 | * LOCKING: | |
4398 | * spin_lock_irqsave(host_set lock) | |
4399 | */ | |
4400 | void ata_qc_complete(struct ata_queued_cmd *qc) | |
4401 | { | |
4402 | struct ata_port *ap = qc->ap; | |
4403 | ||
4404 | /* XXX: New EH and old EH use different mechanisms to | |
4405 | * synchronize EH with regular execution path. | |
4406 | * | |
4407 | * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. | |
4408 | * Normal execution path is responsible for not accessing a | |
4409 | * failed qc. libata core enforces the rule by returning NULL | |
4410 | * from ata_qc_from_tag() for failed qcs. | |
4411 | * | |
4412 | * Old EH depends on ata_qc_complete() nullifying completion | |
4413 | * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does | |
4414 | * not synchronize with interrupt handler. Only PIO task is | |
4415 | * taken care of. | |
4416 | */ | |
4417 | if (ap->ops->error_handler) { | |
b51e9e5d | 4418 | WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); |
f686bcb8 TH |
4419 | |
4420 | if (unlikely(qc->err_mask)) | |
4421 | qc->flags |= ATA_QCFLAG_FAILED; | |
4422 | ||
4423 | if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { | |
4424 | if (!ata_tag_internal(qc->tag)) { | |
4425 | /* always fill result TF for failed qc */ | |
4426 | ap->ops->tf_read(ap, &qc->result_tf); | |
4427 | ata_qc_schedule_eh(qc); | |
4428 | return; | |
4429 | } | |
4430 | } | |
4431 | ||
4432 | /* read result TF if requested */ | |
4433 | if (qc->flags & ATA_QCFLAG_RESULT_TF) | |
4434 | ap->ops->tf_read(ap, &qc->result_tf); | |
4435 | ||
4436 | __ata_qc_complete(qc); | |
4437 | } else { | |
4438 | if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) | |
4439 | return; | |
4440 | ||
4441 | /* read result TF if failed or requested */ | |
4442 | if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) | |
4443 | ap->ops->tf_read(ap, &qc->result_tf); | |
4444 | ||
4445 | __ata_qc_complete(qc); | |
4446 | } | |
4447 | } | |
4448 | ||
dedaf2b0 TH |
4449 | /** |
4450 | * ata_qc_complete_multiple - Complete multiple qcs successfully | |
4451 | * @ap: port in question | |
4452 | * @qc_active: new qc_active mask | |
4453 | * @finish_qc: LLDD callback invoked before completing a qc | |
4454 | * | |
4455 | * Complete in-flight commands. This functions is meant to be | |
4456 | * called from low-level driver's interrupt routine to complete | |
4457 | * requests normally. ap->qc_active and @qc_active is compared | |
4458 | * and commands are completed accordingly. | |
4459 | * | |
4460 | * LOCKING: | |
4461 | * spin_lock_irqsave(host_set lock) | |
4462 | * | |
4463 | * RETURNS: | |
4464 | * Number of completed commands on success, -errno otherwise. | |
4465 | */ | |
4466 | int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, | |
4467 | void (*finish_qc)(struct ata_queued_cmd *)) | |
4468 | { | |
4469 | int nr_done = 0; | |
4470 | u32 done_mask; | |
4471 | int i; | |
4472 | ||
4473 | done_mask = ap->qc_active ^ qc_active; | |
4474 | ||
4475 | if (unlikely(done_mask & qc_active)) { | |
4476 | ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " | |
4477 | "(%08x->%08x)\n", ap->qc_active, qc_active); | |
4478 | return -EINVAL; | |
4479 | } | |
4480 | ||
4481 | for (i = 0; i < ATA_MAX_QUEUE; i++) { | |
4482 | struct ata_queued_cmd *qc; | |
4483 | ||
4484 | if (!(done_mask & (1 << i))) | |
4485 | continue; | |
4486 | ||
4487 | if ((qc = ata_qc_from_tag(ap, i))) { | |
4488 | if (finish_qc) | |
4489 | finish_qc(qc); | |
4490 | ata_qc_complete(qc); | |
4491 | nr_done++; | |
4492 | } | |
4493 | } | |
4494 | ||
4495 | return nr_done; | |
4496 | } | |
4497 | ||
1da177e4 LT |
4498 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) |
4499 | { | |
4500 | struct ata_port *ap = qc->ap; | |
4501 | ||
4502 | switch (qc->tf.protocol) { | |
3dc1d881 | 4503 | case ATA_PROT_NCQ: |
1da177e4 LT |
4504 | case ATA_PROT_DMA: |
4505 | case ATA_PROT_ATAPI_DMA: | |
4506 | return 1; | |
4507 | ||
4508 | case ATA_PROT_ATAPI: | |
4509 | case ATA_PROT_PIO: | |
1da177e4 LT |
4510 | if (ap->flags & ATA_FLAG_PIO_DMA) |
4511 | return 1; | |
4512 | ||
4513 | /* fall through */ | |
4514 | ||
4515 | default: | |
4516 | return 0; | |
4517 | } | |
4518 | ||
4519 | /* never reached */ | |
4520 | } | |
4521 | ||
4522 | /** | |
4523 | * ata_qc_issue - issue taskfile to device | |
4524 | * @qc: command to issue to device | |
4525 | * | |
4526 | * Prepare an ATA command to submission to device. | |
4527 | * This includes mapping the data into a DMA-able | |
4528 | * area, filling in the S/G table, and finally | |
4529 | * writing the taskfile to hardware, starting the command. | |
4530 | * | |
4531 | * LOCKING: | |
4532 | * spin_lock_irqsave(host_set lock) | |
1da177e4 | 4533 | */ |
8e0e694a | 4534 | void ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
4535 | { |
4536 | struct ata_port *ap = qc->ap; | |
4537 | ||
dedaf2b0 TH |
4538 | /* Make sure only one non-NCQ command is outstanding. The |
4539 | * check is skipped for old EH because it reuses active qc to | |
4540 | * request ATAPI sense. | |
4541 | */ | |
4542 | WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag)); | |
4543 | ||
4544 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
4545 | WARN_ON(ap->sactive & (1 << qc->tag)); | |
4546 | ap->sactive |= 1 << qc->tag; | |
4547 | } else { | |
4548 | WARN_ON(ap->sactive); | |
4549 | ap->active_tag = qc->tag; | |
4550 | } | |
4551 | ||
e4a70e76 | 4552 | qc->flags |= ATA_QCFLAG_ACTIVE; |
dedaf2b0 | 4553 | ap->qc_active |= 1 << qc->tag; |
e4a70e76 | 4554 | |
1da177e4 LT |
4555 | if (ata_should_dma_map(qc)) { |
4556 | if (qc->flags & ATA_QCFLAG_SG) { | |
4557 | if (ata_sg_setup(qc)) | |
8e436af9 | 4558 | goto sg_err; |
1da177e4 LT |
4559 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
4560 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 4561 | goto sg_err; |
1da177e4 LT |
4562 | } |
4563 | } else { | |
4564 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
4565 | } | |
4566 | ||
4567 | ap->ops->qc_prep(qc); | |
4568 | ||
8e0e694a TH |
4569 | qc->err_mask |= ap->ops->qc_issue(qc); |
4570 | if (unlikely(qc->err_mask)) | |
4571 | goto err; | |
4572 | return; | |
1da177e4 | 4573 | |
8e436af9 TH |
4574 | sg_err: |
4575 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
8e0e694a TH |
4576 | qc->err_mask |= AC_ERR_SYSTEM; |
4577 | err: | |
4578 | ata_qc_complete(qc); | |
1da177e4 LT |
4579 | } |
4580 | ||
4581 | /** | |
4582 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
4583 | * @qc: command to issue to device | |
4584 | * | |
4585 | * Using various libata functions and hooks, this function | |
4586 | * starts an ATA command. ATA commands are grouped into | |
4587 | * classes called "protocols", and issuing each type of protocol | |
4588 | * is slightly different. | |
4589 | * | |
0baab86b EF |
4590 | * May be used as the qc_issue() entry in ata_port_operations. |
4591 | * | |
1da177e4 LT |
4592 | * LOCKING: |
4593 | * spin_lock_irqsave(host_set lock) | |
4594 | * | |
4595 | * RETURNS: | |
9a3d9eb0 | 4596 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
4597 | */ |
4598 | ||
9a3d9eb0 | 4599 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
4600 | { |
4601 | struct ata_port *ap = qc->ap; | |
4602 | ||
e50362ec AL |
4603 | /* Use polling pio if the LLD doesn't handle |
4604 | * interrupt driven pio and atapi CDB interrupt. | |
4605 | */ | |
4606 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
4607 | switch (qc->tf.protocol) { | |
4608 | case ATA_PROT_PIO: | |
4609 | case ATA_PROT_ATAPI: | |
4610 | case ATA_PROT_ATAPI_NODATA: | |
4611 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
4612 | break; | |
4613 | case ATA_PROT_ATAPI_DMA: | |
4614 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
3a778275 | 4615 | /* see ata_dma_blacklisted() */ |
e50362ec AL |
4616 | BUG(); |
4617 | break; | |
4618 | default: | |
4619 | break; | |
4620 | } | |
4621 | } | |
4622 | ||
312f7da2 | 4623 | /* select the device */ |
1da177e4 LT |
4624 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
4625 | ||
312f7da2 | 4626 | /* start the command */ |
1da177e4 LT |
4627 | switch (qc->tf.protocol) { |
4628 | case ATA_PROT_NODATA: | |
312f7da2 AL |
4629 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4630 | ata_qc_set_polling(qc); | |
4631 | ||
e5338254 | 4632 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
4633 | ap->hsm_task_state = HSM_ST_LAST; |
4634 | ||
4635 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 4636 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
312f7da2 | 4637 | |
1da177e4 LT |
4638 | break; |
4639 | ||
4640 | case ATA_PROT_DMA: | |
587005de | 4641 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 4642 | |
1da177e4 LT |
4643 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
4644 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
4645 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 4646 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
4647 | break; |
4648 | ||
312f7da2 AL |
4649 | case ATA_PROT_PIO: |
4650 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
4651 | ata_qc_set_polling(qc); | |
1da177e4 | 4652 | |
e5338254 | 4653 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 | 4654 | |
54f00389 AL |
4655 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
4656 | /* PIO data out protocol */ | |
4657 | ap->hsm_task_state = HSM_ST_FIRST; | |
31ce6dae | 4658 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
4659 | |
4660 | /* always send first data block using | |
e27486db | 4661 | * the ata_pio_task() codepath. |
54f00389 | 4662 | */ |
312f7da2 | 4663 | } else { |
54f00389 AL |
4664 | /* PIO data in protocol */ |
4665 | ap->hsm_task_state = HSM_ST; | |
4666 | ||
4667 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 4668 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
4669 | |
4670 | /* if polling, ata_pio_task() handles the rest. | |
4671 | * otherwise, interrupt handler takes over from here. | |
4672 | */ | |
312f7da2 AL |
4673 | } |
4674 | ||
1da177e4 LT |
4675 | break; |
4676 | ||
1da177e4 | 4677 | case ATA_PROT_ATAPI: |
1da177e4 | 4678 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
4679 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
4680 | ata_qc_set_polling(qc); | |
4681 | ||
e5338254 | 4682 | ata_tf_to_host(ap, &qc->tf); |
f6ef65e6 | 4683 | |
312f7da2 AL |
4684 | ap->hsm_task_state = HSM_ST_FIRST; |
4685 | ||
4686 | /* send cdb by polling if no cdb interrupt */ | |
4687 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
4688 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
31ce6dae | 4689 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
4690 | break; |
4691 | ||
4692 | case ATA_PROT_ATAPI_DMA: | |
587005de | 4693 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 4694 | |
1da177e4 LT |
4695 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
4696 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
4697 | ap->hsm_task_state = HSM_ST_FIRST; |
4698 | ||
4699 | /* send cdb by polling if no cdb interrupt */ | |
4700 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
31ce6dae | 4701 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
4702 | break; |
4703 | ||
4704 | default: | |
4705 | WARN_ON(1); | |
9a3d9eb0 | 4706 | return AC_ERR_SYSTEM; |
1da177e4 LT |
4707 | } |
4708 | ||
4709 | return 0; | |
4710 | } | |
4711 | ||
1da177e4 LT |
4712 | /** |
4713 | * ata_host_intr - Handle host interrupt for given (port, task) | |
4714 | * @ap: Port on which interrupt arrived (possibly...) | |
4715 | * @qc: Taskfile currently active in engine | |
4716 | * | |
4717 | * Handle host interrupt for given queued command. Currently, | |
4718 | * only DMA interrupts are handled. All other commands are | |
4719 | * handled via polling with interrupts disabled (nIEN bit). | |
4720 | * | |
4721 | * LOCKING: | |
4722 | * spin_lock_irqsave(host_set lock) | |
4723 | * | |
4724 | * RETURNS: | |
4725 | * One if interrupt was handled, zero if not (shared irq). | |
4726 | */ | |
4727 | ||
4728 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
4729 | struct ata_queued_cmd *qc) | |
4730 | { | |
312f7da2 | 4731 | u8 status, host_stat = 0; |
1da177e4 | 4732 | |
312f7da2 AL |
4733 | VPRINTK("ata%u: protocol %d task_state %d\n", |
4734 | ap->id, qc->tf.protocol, ap->hsm_task_state); | |
1da177e4 | 4735 | |
312f7da2 AL |
4736 | /* Check whether we are expecting interrupt in this state */ |
4737 | switch (ap->hsm_task_state) { | |
4738 | case HSM_ST_FIRST: | |
6912ccd5 AL |
4739 | /* Some pre-ATAPI-4 devices assert INTRQ |
4740 | * at this state when ready to receive CDB. | |
4741 | */ | |
1da177e4 | 4742 | |
312f7da2 AL |
4743 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. |
4744 | * The flag was turned on only for atapi devices. | |
4745 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
4746 | */ | |
4747 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 4748 | goto idle_irq; |
1da177e4 | 4749 | break; |
312f7da2 AL |
4750 | case HSM_ST_LAST: |
4751 | if (qc->tf.protocol == ATA_PROT_DMA || | |
4752 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
4753 | /* check status of DMA engine */ | |
4754 | host_stat = ap->ops->bmdma_status(ap); | |
4755 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
4756 | ||
4757 | /* if it's not our irq... */ | |
4758 | if (!(host_stat & ATA_DMA_INTR)) | |
4759 | goto idle_irq; | |
4760 | ||
4761 | /* before we do anything else, clear DMA-Start bit */ | |
4762 | ap->ops->bmdma_stop(qc); | |
a4f16610 AL |
4763 | |
4764 | if (unlikely(host_stat & ATA_DMA_ERR)) { | |
4765 | /* error when transfering data to/from memory */ | |
4766 | qc->err_mask |= AC_ERR_HOST_BUS; | |
4767 | ap->hsm_task_state = HSM_ST_ERR; | |
4768 | } | |
312f7da2 AL |
4769 | } |
4770 | break; | |
4771 | case HSM_ST: | |
4772 | break; | |
1da177e4 LT |
4773 | default: |
4774 | goto idle_irq; | |
4775 | } | |
4776 | ||
312f7da2 AL |
4777 | /* check altstatus */ |
4778 | status = ata_altstatus(ap); | |
4779 | if (status & ATA_BUSY) | |
4780 | goto idle_irq; | |
1da177e4 | 4781 | |
312f7da2 AL |
4782 | /* check main status, clearing INTRQ */ |
4783 | status = ata_chk_status(ap); | |
4784 | if (unlikely(status & ATA_BUSY)) | |
4785 | goto idle_irq; | |
1da177e4 | 4786 | |
312f7da2 AL |
4787 | /* ack bmdma irq events */ |
4788 | ap->ops->irq_clear(ap); | |
1da177e4 | 4789 | |
bb5cb290 | 4790 | ata_hsm_move(ap, qc, status, 0); |
1da177e4 LT |
4791 | return 1; /* irq handled */ |
4792 | ||
4793 | idle_irq: | |
4794 | ap->stats.idle_irq++; | |
4795 | ||
4796 | #ifdef ATA_IRQ_TRAP | |
4797 | if ((ap->stats.idle_irq % 1000) == 0) { | |
1da177e4 | 4798 | ata_irq_ack(ap, 0); /* debug trap */ |
f15a1daf | 4799 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
23cfce89 | 4800 | return 1; |
1da177e4 LT |
4801 | } |
4802 | #endif | |
4803 | return 0; /* irq not handled */ | |
4804 | } | |
4805 | ||
4806 | /** | |
4807 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
4808 | * @irq: irq line (unused) |
4809 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
4810 | * @regs: unused |
4811 | * | |
0cba632b JG |
4812 | * Default interrupt handler for PCI IDE devices. Calls |
4813 | * ata_host_intr() for each port that is not disabled. | |
4814 | * | |
1da177e4 | 4815 | * LOCKING: |
0cba632b | 4816 | * Obtains host_set lock during operation. |
1da177e4 LT |
4817 | * |
4818 | * RETURNS: | |
0cba632b | 4819 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
4820 | */ |
4821 | ||
4822 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
4823 | { | |
4824 | struct ata_host_set *host_set = dev_instance; | |
4825 | unsigned int i; | |
4826 | unsigned int handled = 0; | |
4827 | unsigned long flags; | |
4828 | ||
4829 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
4830 | spin_lock_irqsave(&host_set->lock, flags); | |
4831 | ||
4832 | for (i = 0; i < host_set->n_ports; i++) { | |
4833 | struct ata_port *ap; | |
4834 | ||
4835 | ap = host_set->ports[i]; | |
c1389503 | 4836 | if (ap && |
029f5468 | 4837 | !(ap->flags & ATA_FLAG_DISABLED)) { |
1da177e4 LT |
4838 | struct ata_queued_cmd *qc; |
4839 | ||
4840 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
312f7da2 | 4841 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 4842 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
4843 | handled |= ata_host_intr(ap, qc); |
4844 | } | |
4845 | } | |
4846 | ||
4847 | spin_unlock_irqrestore(&host_set->lock, flags); | |
4848 | ||
4849 | return IRQ_RETVAL(handled); | |
4850 | } | |
4851 | ||
34bf2170 TH |
4852 | /** |
4853 | * sata_scr_valid - test whether SCRs are accessible | |
4854 | * @ap: ATA port to test SCR accessibility for | |
4855 | * | |
4856 | * Test whether SCRs are accessible for @ap. | |
4857 | * | |
4858 | * LOCKING: | |
4859 | * None. | |
4860 | * | |
4861 | * RETURNS: | |
4862 | * 1 if SCRs are accessible, 0 otherwise. | |
4863 | */ | |
4864 | int sata_scr_valid(struct ata_port *ap) | |
4865 | { | |
4866 | return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read; | |
4867 | } | |
4868 | ||
4869 | /** | |
4870 | * sata_scr_read - read SCR register of the specified port | |
4871 | * @ap: ATA port to read SCR for | |
4872 | * @reg: SCR to read | |
4873 | * @val: Place to store read value | |
4874 | * | |
4875 | * Read SCR register @reg of @ap into *@val. This function is | |
4876 | * guaranteed to succeed if the cable type of the port is SATA | |
4877 | * and the port implements ->scr_read. | |
4878 | * | |
4879 | * LOCKING: | |
4880 | * None. | |
4881 | * | |
4882 | * RETURNS: | |
4883 | * 0 on success, negative errno on failure. | |
4884 | */ | |
4885 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | |
4886 | { | |
4887 | if (sata_scr_valid(ap)) { | |
4888 | *val = ap->ops->scr_read(ap, reg); | |
4889 | return 0; | |
4890 | } | |
4891 | return -EOPNOTSUPP; | |
4892 | } | |
4893 | ||
4894 | /** | |
4895 | * sata_scr_write - write SCR register of the specified port | |
4896 | * @ap: ATA port to write SCR for | |
4897 | * @reg: SCR to write | |
4898 | * @val: value to write | |
4899 | * | |
4900 | * Write @val to SCR register @reg of @ap. This function is | |
4901 | * guaranteed to succeed if the cable type of the port is SATA | |
4902 | * and the port implements ->scr_read. | |
4903 | * | |
4904 | * LOCKING: | |
4905 | * None. | |
4906 | * | |
4907 | * RETURNS: | |
4908 | * 0 on success, negative errno on failure. | |
4909 | */ | |
4910 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) | |
4911 | { | |
4912 | if (sata_scr_valid(ap)) { | |
4913 | ap->ops->scr_write(ap, reg, val); | |
4914 | return 0; | |
4915 | } | |
4916 | return -EOPNOTSUPP; | |
4917 | } | |
4918 | ||
4919 | /** | |
4920 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
4921 | * @ap: ATA port to write SCR for | |
4922 | * @reg: SCR to write | |
4923 | * @val: value to write | |
4924 | * | |
4925 | * This function is identical to sata_scr_write() except that this | |
4926 | * function performs flush after writing to the register. | |
4927 | * | |
4928 | * LOCKING: | |
4929 | * None. | |
4930 | * | |
4931 | * RETURNS: | |
4932 | * 0 on success, negative errno on failure. | |
4933 | */ | |
4934 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) | |
4935 | { | |
4936 | if (sata_scr_valid(ap)) { | |
4937 | ap->ops->scr_write(ap, reg, val); | |
4938 | ap->ops->scr_read(ap, reg); | |
4939 | return 0; | |
4940 | } | |
4941 | return -EOPNOTSUPP; | |
4942 | } | |
4943 | ||
4944 | /** | |
4945 | * ata_port_online - test whether the given port is online | |
4946 | * @ap: ATA port to test | |
4947 | * | |
4948 | * Test whether @ap is online. Note that this function returns 0 | |
4949 | * if online status of @ap cannot be obtained, so | |
4950 | * ata_port_online(ap) != !ata_port_offline(ap). | |
4951 | * | |
4952 | * LOCKING: | |
4953 | * None. | |
4954 | * | |
4955 | * RETURNS: | |
4956 | * 1 if the port online status is available and online. | |
4957 | */ | |
4958 | int ata_port_online(struct ata_port *ap) | |
4959 | { | |
4960 | u32 sstatus; | |
4961 | ||
4962 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) | |
4963 | return 1; | |
4964 | return 0; | |
4965 | } | |
4966 | ||
4967 | /** | |
4968 | * ata_port_offline - test whether the given port is offline | |
4969 | * @ap: ATA port to test | |
4970 | * | |
4971 | * Test whether @ap is offline. Note that this function returns | |
4972 | * 0 if offline status of @ap cannot be obtained, so | |
4973 | * ata_port_online(ap) != !ata_port_offline(ap). | |
4974 | * | |
4975 | * LOCKING: | |
4976 | * None. | |
4977 | * | |
4978 | * RETURNS: | |
4979 | * 1 if the port offline status is available and offline. | |
4980 | */ | |
4981 | int ata_port_offline(struct ata_port *ap) | |
4982 | { | |
4983 | u32 sstatus; | |
4984 | ||
4985 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) | |
4986 | return 1; | |
4987 | return 0; | |
4988 | } | |
0baab86b | 4989 | |
77b08fb5 | 4990 | int ata_flush_cache(struct ata_device *dev) |
9b847548 | 4991 | { |
977e6b9f | 4992 | unsigned int err_mask; |
9b847548 JA |
4993 | u8 cmd; |
4994 | ||
4995 | if (!ata_try_flush_cache(dev)) | |
4996 | return 0; | |
4997 | ||
4998 | if (ata_id_has_flush_ext(dev->id)) | |
4999 | cmd = ATA_CMD_FLUSH_EXT; | |
5000 | else | |
5001 | cmd = ATA_CMD_FLUSH; | |
5002 | ||
977e6b9f TH |
5003 | err_mask = ata_do_simple_cmd(dev, cmd); |
5004 | if (err_mask) { | |
5005 | ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); | |
5006 | return -EIO; | |
5007 | } | |
5008 | ||
5009 | return 0; | |
9b847548 JA |
5010 | } |
5011 | ||
500530f6 TH |
5012 | static int ata_host_set_request_pm(struct ata_host_set *host_set, |
5013 | pm_message_t mesg, unsigned int action, | |
5014 | unsigned int ehi_flags, int wait) | |
5015 | { | |
5016 | unsigned long flags; | |
5017 | int i, rc; | |
5018 | ||
5019 | for (i = 0; i < host_set->n_ports; i++) { | |
5020 | struct ata_port *ap = host_set->ports[i]; | |
5021 | ||
5022 | /* Previous resume operation might still be in | |
5023 | * progress. Wait for PM_PENDING to clear. | |
5024 | */ | |
5025 | if (ap->pflags & ATA_PFLAG_PM_PENDING) { | |
5026 | ata_port_wait_eh(ap); | |
5027 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5028 | } | |
5029 | ||
5030 | /* request PM ops to EH */ | |
5031 | spin_lock_irqsave(ap->lock, flags); | |
5032 | ||
5033 | ap->pm_mesg = mesg; | |
5034 | if (wait) { | |
5035 | rc = 0; | |
5036 | ap->pm_result = &rc; | |
5037 | } | |
5038 | ||
5039 | ap->pflags |= ATA_PFLAG_PM_PENDING; | |
5040 | ap->eh_info.action |= action; | |
5041 | ap->eh_info.flags |= ehi_flags; | |
5042 | ||
5043 | ata_port_schedule_eh(ap); | |
5044 | ||
5045 | spin_unlock_irqrestore(ap->lock, flags); | |
5046 | ||
5047 | /* wait and check result */ | |
5048 | if (wait) { | |
5049 | ata_port_wait_eh(ap); | |
5050 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5051 | if (rc) | |
5052 | return rc; | |
5053 | } | |
5054 | } | |
5055 | ||
5056 | return 0; | |
5057 | } | |
5058 | ||
5059 | /** | |
5060 | * ata_host_set_suspend - suspend host_set | |
5061 | * @host_set: host_set to suspend | |
5062 | * @mesg: PM message | |
5063 | * | |
5064 | * Suspend @host_set. Actual operation is performed by EH. This | |
5065 | * function requests EH to perform PM operations and waits for EH | |
5066 | * to finish. | |
5067 | * | |
5068 | * LOCKING: | |
5069 | * Kernel thread context (may sleep). | |
5070 | * | |
5071 | * RETURNS: | |
5072 | * 0 on success, -errno on failure. | |
5073 | */ | |
5074 | int ata_host_set_suspend(struct ata_host_set *host_set, pm_message_t mesg) | |
5075 | { | |
5076 | int i, j, rc; | |
5077 | ||
5078 | rc = ata_host_set_request_pm(host_set, mesg, 0, ATA_EHI_QUIET, 1); | |
5079 | if (rc) | |
5080 | goto fail; | |
5081 | ||
5082 | /* EH is quiescent now. Fail if we have any ready device. | |
5083 | * This happens if hotplug occurs between completion of device | |
5084 | * suspension and here. | |
5085 | */ | |
5086 | for (i = 0; i < host_set->n_ports; i++) { | |
5087 | struct ata_port *ap = host_set->ports[i]; | |
5088 | ||
5089 | for (j = 0; j < ATA_MAX_DEVICES; j++) { | |
5090 | struct ata_device *dev = &ap->device[j]; | |
5091 | ||
5092 | if (ata_dev_ready(dev)) { | |
5093 | ata_port_printk(ap, KERN_WARNING, | |
5094 | "suspend failed, device %d " | |
5095 | "still active\n", dev->devno); | |
5096 | rc = -EBUSY; | |
5097 | goto fail; | |
5098 | } | |
5099 | } | |
5100 | } | |
5101 | ||
5102 | host_set->dev->power.power_state = mesg; | |
5103 | return 0; | |
5104 | ||
5105 | fail: | |
5106 | ata_host_set_resume(host_set); | |
5107 | return rc; | |
5108 | } | |
5109 | ||
5110 | /** | |
5111 | * ata_host_set_resume - resume host_set | |
5112 | * @host_set: host_set to resume | |
5113 | * | |
5114 | * Resume @host_set. Actual operation is performed by EH. This | |
5115 | * function requests EH to perform PM operations and returns. | |
5116 | * Note that all resume operations are performed parallely. | |
5117 | * | |
5118 | * LOCKING: | |
5119 | * Kernel thread context (may sleep). | |
5120 | */ | |
5121 | void ata_host_set_resume(struct ata_host_set *host_set) | |
5122 | { | |
5123 | ata_host_set_request_pm(host_set, PMSG_ON, ATA_EH_SOFTRESET, | |
5124 | ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); | |
5125 | host_set->dev->power.power_state = PMSG_ON; | |
5126 | } | |
5127 | ||
c893a3ae RD |
5128 | /** |
5129 | * ata_port_start - Set port up for dma. | |
5130 | * @ap: Port to initialize | |
5131 | * | |
5132 | * Called just after data structures for each port are | |
5133 | * initialized. Allocates space for PRD table. | |
5134 | * | |
5135 | * May be used as the port_start() entry in ata_port_operations. | |
5136 | * | |
5137 | * LOCKING: | |
5138 | * Inherited from caller. | |
5139 | */ | |
5140 | ||
1da177e4 LT |
5141 | int ata_port_start (struct ata_port *ap) |
5142 | { | |
2f1f610b | 5143 | struct device *dev = ap->dev; |
6037d6bb | 5144 | int rc; |
1da177e4 LT |
5145 | |
5146 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
5147 | if (!ap->prd) | |
5148 | return -ENOMEM; | |
5149 | ||
6037d6bb JG |
5150 | rc = ata_pad_alloc(ap, dev); |
5151 | if (rc) { | |
cedc9a47 | 5152 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 5153 | return rc; |
cedc9a47 JG |
5154 | } |
5155 | ||
1da177e4 LT |
5156 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
5157 | ||
5158 | return 0; | |
5159 | } | |
5160 | ||
0baab86b EF |
5161 | |
5162 | /** | |
5163 | * ata_port_stop - Undo ata_port_start() | |
5164 | * @ap: Port to shut down | |
5165 | * | |
5166 | * Frees the PRD table. | |
5167 | * | |
5168 | * May be used as the port_stop() entry in ata_port_operations. | |
5169 | * | |
5170 | * LOCKING: | |
6f0ef4fa | 5171 | * Inherited from caller. |
0baab86b EF |
5172 | */ |
5173 | ||
1da177e4 LT |
5174 | void ata_port_stop (struct ata_port *ap) |
5175 | { | |
2f1f610b | 5176 | struct device *dev = ap->dev; |
1da177e4 LT |
5177 | |
5178 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 5179 | ata_pad_free(ap, dev); |
1da177e4 LT |
5180 | } |
5181 | ||
aa8f0dc6 JG |
5182 | void ata_host_stop (struct ata_host_set *host_set) |
5183 | { | |
5184 | if (host_set->mmio_base) | |
5185 | iounmap(host_set->mmio_base); | |
5186 | } | |
5187 | ||
3ef3b43d TH |
5188 | /** |
5189 | * ata_dev_init - Initialize an ata_device structure | |
5190 | * @dev: Device structure to initialize | |
5191 | * | |
5192 | * Initialize @dev in preparation for probing. | |
5193 | * | |
5194 | * LOCKING: | |
5195 | * Inherited from caller. | |
5196 | */ | |
5197 | void ata_dev_init(struct ata_device *dev) | |
5198 | { | |
5199 | struct ata_port *ap = dev->ap; | |
72fa4b74 TH |
5200 | unsigned long flags; |
5201 | ||
5a04bf4b TH |
5202 | /* SATA spd limit is bound to the first device */ |
5203 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5204 | ||
72fa4b74 TH |
5205 | /* High bits of dev->flags are used to record warm plug |
5206 | * requests which occur asynchronously. Synchronize using | |
5207 | * host_set lock. | |
5208 | */ | |
ba6a1308 | 5209 | spin_lock_irqsave(ap->lock, flags); |
72fa4b74 | 5210 | dev->flags &= ~ATA_DFLAG_INIT_MASK; |
ba6a1308 | 5211 | spin_unlock_irqrestore(ap->lock, flags); |
3ef3b43d | 5212 | |
72fa4b74 TH |
5213 | memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, |
5214 | sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); | |
3ef3b43d TH |
5215 | dev->pio_mask = UINT_MAX; |
5216 | dev->mwdma_mask = UINT_MAX; | |
5217 | dev->udma_mask = UINT_MAX; | |
5218 | } | |
5219 | ||
1da177e4 | 5220 | /** |
155a8a9c | 5221 | * ata_port_init - Initialize an ata_port structure |
1da177e4 | 5222 | * @ap: Structure to initialize |
1da177e4 LT |
5223 | * @host_set: Collection of hosts to which @ap belongs |
5224 | * @ent: Probe information provided by low-level driver | |
5225 | * @port_no: Port number associated with this ata_port | |
5226 | * | |
155a8a9c | 5227 | * Initialize a new ata_port structure. |
0cba632b | 5228 | * |
1da177e4 | 5229 | * LOCKING: |
0cba632b | 5230 | * Inherited from caller. |
1da177e4 | 5231 | */ |
155a8a9c BK |
5232 | void ata_port_init(struct ata_port *ap, struct ata_host_set *host_set, |
5233 | const struct ata_probe_ent *ent, unsigned int port_no) | |
1da177e4 LT |
5234 | { |
5235 | unsigned int i; | |
5236 | ||
ba6a1308 | 5237 | ap->lock = &host_set->lock; |
198e0fed | 5238 | ap->flags = ATA_FLAG_DISABLED; |
155a8a9c | 5239 | ap->id = ata_unique_id++; |
1da177e4 LT |
5240 | ap->ctl = ATA_DEVCTL_OBS; |
5241 | ap->host_set = host_set; | |
2f1f610b | 5242 | ap->dev = ent->dev; |
1da177e4 LT |
5243 | ap->port_no = port_no; |
5244 | ap->hard_port_no = | |
5245 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
5246 | ap->pio_mask = ent->pio_mask; | |
5247 | ap->mwdma_mask = ent->mwdma_mask; | |
5248 | ap->udma_mask = ent->udma_mask; | |
5249 | ap->flags |= ent->host_flags; | |
5250 | ap->ops = ent->port_ops; | |
5a04bf4b | 5251 | ap->hw_sata_spd_limit = UINT_MAX; |
1da177e4 LT |
5252 | ap->active_tag = ATA_TAG_POISON; |
5253 | ap->last_ctl = 0xFF; | |
bd5d825c BP |
5254 | |
5255 | #if defined(ATA_VERBOSE_DEBUG) | |
5256 | /* turn on all debugging levels */ | |
5257 | ap->msg_enable = 0x00FF; | |
5258 | #elif defined(ATA_DEBUG) | |
5259 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; | |
88574551 | 5260 | #else |
0dd4b21f | 5261 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; |
bd5d825c | 5262 | #endif |
1da177e4 | 5263 | |
86e45b6b | 5264 | INIT_WORK(&ap->port_task, NULL, NULL); |
580b2102 | 5265 | INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap); |
3057ac3c | 5266 | INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap); |
a72ec4ce | 5267 | INIT_LIST_HEAD(&ap->eh_done_q); |
c6cf9e99 | 5268 | init_waitqueue_head(&ap->eh_wait_q); |
1da177e4 | 5269 | |
838df628 TH |
5270 | /* set cable type */ |
5271 | ap->cbl = ATA_CBL_NONE; | |
5272 | if (ap->flags & ATA_FLAG_SATA) | |
5273 | ap->cbl = ATA_CBL_SATA; | |
5274 | ||
acf356b1 TH |
5275 | for (i = 0; i < ATA_MAX_DEVICES; i++) { |
5276 | struct ata_device *dev = &ap->device[i]; | |
38d87234 | 5277 | dev->ap = ap; |
72fa4b74 | 5278 | dev->devno = i; |
3ef3b43d | 5279 | ata_dev_init(dev); |
acf356b1 | 5280 | } |
1da177e4 LT |
5281 | |
5282 | #ifdef ATA_IRQ_TRAP | |
5283 | ap->stats.unhandled_irq = 1; | |
5284 | ap->stats.idle_irq = 1; | |
5285 | #endif | |
5286 | ||
5287 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
5288 | } | |
5289 | ||
155a8a9c | 5290 | /** |
4608c160 TH |
5291 | * ata_port_init_shost - Initialize SCSI host associated with ATA port |
5292 | * @ap: ATA port to initialize SCSI host for | |
5293 | * @shost: SCSI host associated with @ap | |
155a8a9c | 5294 | * |
4608c160 | 5295 | * Initialize SCSI host @shost associated with ATA port @ap. |
155a8a9c BK |
5296 | * |
5297 | * LOCKING: | |
5298 | * Inherited from caller. | |
5299 | */ | |
4608c160 | 5300 | static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost) |
155a8a9c | 5301 | { |
4608c160 | 5302 | ap->host = shost; |
155a8a9c | 5303 | |
4608c160 TH |
5304 | shost->unique_id = ap->id; |
5305 | shost->max_id = 16; | |
5306 | shost->max_lun = 1; | |
5307 | shost->max_channel = 1; | |
5308 | shost->max_cmd_len = 12; | |
155a8a9c BK |
5309 | } |
5310 | ||
1da177e4 | 5311 | /** |
996139f1 | 5312 | * ata_port_add - Attach low-level ATA driver to system |
1da177e4 LT |
5313 | * @ent: Information provided by low-level driver |
5314 | * @host_set: Collections of ports to which we add | |
5315 | * @port_no: Port number associated with this host | |
5316 | * | |
0cba632b JG |
5317 | * Attach low-level ATA driver to system. |
5318 | * | |
1da177e4 | 5319 | * LOCKING: |
0cba632b | 5320 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5321 | * |
5322 | * RETURNS: | |
0cba632b | 5323 | * New ata_port on success, for NULL on error. |
1da177e4 | 5324 | */ |
996139f1 | 5325 | static struct ata_port * ata_port_add(const struct ata_probe_ent *ent, |
1da177e4 LT |
5326 | struct ata_host_set *host_set, |
5327 | unsigned int port_no) | |
5328 | { | |
996139f1 | 5329 | struct Scsi_Host *shost; |
1da177e4 LT |
5330 | struct ata_port *ap; |
5331 | int rc; | |
5332 | ||
5333 | DPRINTK("ENTER\n"); | |
aec5c3c1 | 5334 | |
52783c5d | 5335 | if (!ent->port_ops->error_handler && |
aec5c3c1 TH |
5336 | !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) { |
5337 | printk(KERN_ERR "ata%u: no reset mechanism available\n", | |
5338 | port_no); | |
5339 | return NULL; | |
5340 | } | |
5341 | ||
996139f1 JG |
5342 | shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); |
5343 | if (!shost) | |
1da177e4 LT |
5344 | return NULL; |
5345 | ||
996139f1 | 5346 | shost->transportt = &ata_scsi_transport_template; |
30afc84c | 5347 | |
996139f1 | 5348 | ap = ata_shost_to_port(shost); |
1da177e4 | 5349 | |
4608c160 | 5350 | ata_port_init(ap, host_set, ent, port_no); |
996139f1 | 5351 | ata_port_init_shost(ap, shost); |
1da177e4 LT |
5352 | |
5353 | rc = ap->ops->port_start(ap); | |
5354 | if (rc) | |
5355 | goto err_out; | |
5356 | ||
5357 | return ap; | |
5358 | ||
5359 | err_out: | |
996139f1 | 5360 | scsi_host_put(shost); |
1da177e4 LT |
5361 | return NULL; |
5362 | } | |
5363 | ||
b03732f0 BK |
5364 | /** |
5365 | * ata_sas_host_init - Initialize a host_set struct | |
5366 | * @host_set: host_set to initialize | |
5367 | * @dev: device host_set is attached to | |
5368 | * @flags: host_set flags | |
5369 | * @ops: port_ops | |
5370 | * | |
5371 | * LOCKING: | |
5372 | * PCI/etc. bus probe sem. | |
5373 | * | |
5374 | */ | |
5375 | ||
5376 | void ata_host_set_init(struct ata_host_set *host_set, | |
5377 | struct device *dev, unsigned long flags, | |
5378 | const struct ata_port_operations *ops) | |
5379 | { | |
5380 | spin_lock_init(&host_set->lock); | |
5381 | host_set->dev = dev; | |
5382 | host_set->flags = flags; | |
5383 | host_set->ops = ops; | |
5384 | } | |
5385 | ||
1da177e4 | 5386 | /** |
0cba632b JG |
5387 | * ata_device_add - Register hardware device with ATA and SCSI layers |
5388 | * @ent: Probe information describing hardware device to be registered | |
5389 | * | |
5390 | * This function processes the information provided in the probe | |
5391 | * information struct @ent, allocates the necessary ATA and SCSI | |
5392 | * host information structures, initializes them, and registers | |
5393 | * everything with requisite kernel subsystems. | |
5394 | * | |
5395 | * This function requests irqs, probes the ATA bus, and probes | |
5396 | * the SCSI bus. | |
1da177e4 LT |
5397 | * |
5398 | * LOCKING: | |
0cba632b | 5399 | * PCI/etc. bus probe sem. |
1da177e4 LT |
5400 | * |
5401 | * RETURNS: | |
0cba632b | 5402 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 | 5403 | */ |
057ace5e | 5404 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 LT |
5405 | { |
5406 | unsigned int count = 0, i; | |
5407 | struct device *dev = ent->dev; | |
5408 | struct ata_host_set *host_set; | |
39b07ce6 | 5409 | int rc; |
1da177e4 LT |
5410 | |
5411 | DPRINTK("ENTER\n"); | |
5412 | /* alloc a container for our list of ATA ports (buses) */ | |
57f3bda8 | 5413 | host_set = kzalloc(sizeof(struct ata_host_set) + |
1da177e4 LT |
5414 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); |
5415 | if (!host_set) | |
5416 | return 0; | |
1da177e4 | 5417 | |
b03732f0 | 5418 | ata_host_set_init(host_set, dev, ent->host_set_flags, ent->port_ops); |
1da177e4 LT |
5419 | host_set->n_ports = ent->n_ports; |
5420 | host_set->irq = ent->irq; | |
5421 | host_set->mmio_base = ent->mmio_base; | |
5422 | host_set->private_data = ent->private_data; | |
1da177e4 LT |
5423 | |
5424 | /* register each port bound to this device */ | |
5425 | for (i = 0; i < ent->n_ports; i++) { | |
5426 | struct ata_port *ap; | |
5427 | unsigned long xfer_mode_mask; | |
5428 | ||
996139f1 | 5429 | ap = ata_port_add(ent, host_set, i); |
1da177e4 LT |
5430 | if (!ap) |
5431 | goto err_out; | |
5432 | ||
5433 | host_set->ports[i] = ap; | |
5434 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
5435 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
5436 | (ap->pio_mask << ATA_SHIFT_PIO); | |
5437 | ||
5438 | /* print per-port info to dmesg */ | |
f15a1daf TH |
5439 | ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX " |
5440 | "ctl 0x%lX bmdma 0x%lX irq %lu\n", | |
5441 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
5442 | ata_mode_string(xfer_mode_mask), | |
5443 | ap->ioaddr.cmd_addr, | |
5444 | ap->ioaddr.ctl_addr, | |
5445 | ap->ioaddr.bmdma_addr, | |
5446 | ent->irq); | |
1da177e4 LT |
5447 | |
5448 | ata_chk_status(ap); | |
5449 | host_set->ops->irq_clear(ap); | |
e3180499 | 5450 | ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */ |
1da177e4 LT |
5451 | count++; |
5452 | } | |
5453 | ||
57f3bda8 RD |
5454 | if (!count) |
5455 | goto err_free_ret; | |
1da177e4 LT |
5456 | |
5457 | /* obtain irq, that is shared between channels */ | |
39b07ce6 JG |
5458 | rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, |
5459 | DRV_NAME, host_set); | |
5460 | if (rc) { | |
5461 | dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", | |
5462 | ent->irq, rc); | |
1da177e4 | 5463 | goto err_out; |
39b07ce6 | 5464 | } |
1da177e4 LT |
5465 | |
5466 | /* perform each probe synchronously */ | |
5467 | DPRINTK("probe begin\n"); | |
5468 | for (i = 0; i < count; i++) { | |
5469 | struct ata_port *ap; | |
5a04bf4b | 5470 | u32 scontrol; |
1da177e4 LT |
5471 | int rc; |
5472 | ||
5473 | ap = host_set->ports[i]; | |
5474 | ||
5a04bf4b TH |
5475 | /* init sata_spd_limit to the current value */ |
5476 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { | |
5477 | int spd = (scontrol >> 4) & 0xf; | |
5478 | ap->hw_sata_spd_limit &= (1 << spd) - 1; | |
5479 | } | |
5480 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5481 | ||
1da177e4 LT |
5482 | rc = scsi_add_host(ap->host, dev); |
5483 | if (rc) { | |
f15a1daf | 5484 | ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n"); |
1da177e4 LT |
5485 | /* FIXME: do something useful here */ |
5486 | /* FIXME: handle unconditional calls to | |
5487 | * scsi_scan_host and ata_host_remove, below, | |
5488 | * at the very least | |
5489 | */ | |
5490 | } | |
3e706399 | 5491 | |
52783c5d | 5492 | if (ap->ops->error_handler) { |
1cdaf534 | 5493 | struct ata_eh_info *ehi = &ap->eh_info; |
3e706399 TH |
5494 | unsigned long flags; |
5495 | ||
5496 | ata_port_probe(ap); | |
5497 | ||
5498 | /* kick EH for boot probing */ | |
ba6a1308 | 5499 | spin_lock_irqsave(ap->lock, flags); |
3e706399 | 5500 | |
1cdaf534 TH |
5501 | ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1; |
5502 | ehi->action |= ATA_EH_SOFTRESET; | |
5503 | ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; | |
3e706399 | 5504 | |
b51e9e5d | 5505 | ap->pflags |= ATA_PFLAG_LOADING; |
3e706399 TH |
5506 | ata_port_schedule_eh(ap); |
5507 | ||
ba6a1308 | 5508 | spin_unlock_irqrestore(ap->lock, flags); |
3e706399 TH |
5509 | |
5510 | /* wait for EH to finish */ | |
5511 | ata_port_wait_eh(ap); | |
5512 | } else { | |
5513 | DPRINTK("ata%u: bus probe begin\n", ap->id); | |
5514 | rc = ata_bus_probe(ap); | |
5515 | DPRINTK("ata%u: bus probe end\n", ap->id); | |
5516 | ||
5517 | if (rc) { | |
5518 | /* FIXME: do something useful here? | |
5519 | * Current libata behavior will | |
5520 | * tear down everything when | |
5521 | * the module is removed | |
5522 | * or the h/w is unplugged. | |
5523 | */ | |
5524 | } | |
5525 | } | |
1da177e4 LT |
5526 | } |
5527 | ||
5528 | /* probes are done, now scan each port's disk(s) */ | |
c893a3ae | 5529 | DPRINTK("host probe begin\n"); |
1da177e4 LT |
5530 | for (i = 0; i < count; i++) { |
5531 | struct ata_port *ap = host_set->ports[i]; | |
5532 | ||
644dd0cc | 5533 | ata_scsi_scan_host(ap); |
1da177e4 LT |
5534 | } |
5535 | ||
5536 | dev_set_drvdata(dev, host_set); | |
5537 | ||
5538 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
5539 | return ent->n_ports; /* success */ | |
5540 | ||
5541 | err_out: | |
5542 | for (i = 0; i < count; i++) { | |
6543bc07 | 5543 | struct ata_port *ap = host_set->ports[i]; |
77f3f879 TH |
5544 | if (ap) { |
5545 | ap->ops->port_stop(ap); | |
5546 | scsi_host_put(ap->host); | |
5547 | } | |
1da177e4 | 5548 | } |
57f3bda8 | 5549 | err_free_ret: |
1da177e4 LT |
5550 | kfree(host_set); |
5551 | VPRINTK("EXIT, returning 0\n"); | |
5552 | return 0; | |
5553 | } | |
5554 | ||
720ba126 TH |
5555 | /** |
5556 | * ata_port_detach - Detach ATA port in prepration of device removal | |
5557 | * @ap: ATA port to be detached | |
5558 | * | |
5559 | * Detach all ATA devices and the associated SCSI devices of @ap; | |
5560 | * then, remove the associated SCSI host. @ap is guaranteed to | |
5561 | * be quiescent on return from this function. | |
5562 | * | |
5563 | * LOCKING: | |
5564 | * Kernel thread context (may sleep). | |
5565 | */ | |
5566 | void ata_port_detach(struct ata_port *ap) | |
5567 | { | |
5568 | unsigned long flags; | |
5569 | int i; | |
5570 | ||
5571 | if (!ap->ops->error_handler) | |
c3cf30a9 | 5572 | goto skip_eh; |
720ba126 TH |
5573 | |
5574 | /* tell EH we're leaving & flush EH */ | |
ba6a1308 | 5575 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 5576 | ap->pflags |= ATA_PFLAG_UNLOADING; |
ba6a1308 | 5577 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5578 | |
5579 | ata_port_wait_eh(ap); | |
5580 | ||
5581 | /* EH is now guaranteed to see UNLOADING, so no new device | |
5582 | * will be attached. Disable all existing devices. | |
5583 | */ | |
ba6a1308 | 5584 | spin_lock_irqsave(ap->lock, flags); |
720ba126 TH |
5585 | |
5586 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
5587 | ata_dev_disable(&ap->device[i]); | |
5588 | ||
ba6a1308 | 5589 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5590 | |
5591 | /* Final freeze & EH. All in-flight commands are aborted. EH | |
5592 | * will be skipped and retrials will be terminated with bad | |
5593 | * target. | |
5594 | */ | |
ba6a1308 | 5595 | spin_lock_irqsave(ap->lock, flags); |
720ba126 | 5596 | ata_port_freeze(ap); /* won't be thawed */ |
ba6a1308 | 5597 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
5598 | |
5599 | ata_port_wait_eh(ap); | |
5600 | ||
5601 | /* Flush hotplug task. The sequence is similar to | |
5602 | * ata_port_flush_task(). | |
5603 | */ | |
5604 | flush_workqueue(ata_aux_wq); | |
5605 | cancel_delayed_work(&ap->hotplug_task); | |
5606 | flush_workqueue(ata_aux_wq); | |
5607 | ||
c3cf30a9 | 5608 | skip_eh: |
720ba126 TH |
5609 | /* remove the associated SCSI host */ |
5610 | scsi_remove_host(ap->host); | |
5611 | } | |
5612 | ||
17b14451 AC |
5613 | /** |
5614 | * ata_host_set_remove - PCI layer callback for device removal | |
5615 | * @host_set: ATA host set that was removed | |
5616 | * | |
2e9edbf8 | 5617 | * Unregister all objects associated with this host set. Free those |
17b14451 AC |
5618 | * objects. |
5619 | * | |
5620 | * LOCKING: | |
5621 | * Inherited from calling layer (may sleep). | |
5622 | */ | |
5623 | ||
17b14451 AC |
5624 | void ata_host_set_remove(struct ata_host_set *host_set) |
5625 | { | |
17b14451 AC |
5626 | unsigned int i; |
5627 | ||
720ba126 TH |
5628 | for (i = 0; i < host_set->n_ports; i++) |
5629 | ata_port_detach(host_set->ports[i]); | |
17b14451 AC |
5630 | |
5631 | free_irq(host_set->irq, host_set); | |
5632 | ||
5633 | for (i = 0; i < host_set->n_ports; i++) { | |
720ba126 | 5634 | struct ata_port *ap = host_set->ports[i]; |
17b14451 AC |
5635 | |
5636 | ata_scsi_release(ap->host); | |
5637 | ||
5638 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
5639 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
5640 | ||
5641 | if (ioaddr->cmd_addr == 0x1f0) | |
5642 | release_region(0x1f0, 8); | |
5643 | else if (ioaddr->cmd_addr == 0x170) | |
5644 | release_region(0x170, 8); | |
5645 | } | |
5646 | ||
5647 | scsi_host_put(ap->host); | |
5648 | } | |
5649 | ||
5650 | if (host_set->ops->host_stop) | |
5651 | host_set->ops->host_stop(host_set); | |
5652 | ||
5653 | kfree(host_set); | |
5654 | } | |
5655 | ||
1da177e4 LT |
5656 | /** |
5657 | * ata_scsi_release - SCSI layer callback hook for host unload | |
5658 | * @host: libata host to be unloaded | |
5659 | * | |
5660 | * Performs all duties necessary to shut down a libata port... | |
5661 | * Kill port kthread, disable port, and release resources. | |
5662 | * | |
5663 | * LOCKING: | |
5664 | * Inherited from SCSI layer. | |
5665 | * | |
5666 | * RETURNS: | |
5667 | * One. | |
5668 | */ | |
5669 | ||
5670 | int ata_scsi_release(struct Scsi_Host *host) | |
5671 | { | |
35bb94b1 | 5672 | struct ata_port *ap = ata_shost_to_port(host); |
1da177e4 LT |
5673 | |
5674 | DPRINTK("ENTER\n"); | |
5675 | ||
5676 | ap->ops->port_disable(ap); | |
6543bc07 | 5677 | ap->ops->port_stop(ap); |
1da177e4 LT |
5678 | |
5679 | DPRINTK("EXIT\n"); | |
5680 | return 1; | |
5681 | } | |
5682 | ||
f6d950e2 BK |
5683 | struct ata_probe_ent * |
5684 | ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port) | |
5685 | { | |
5686 | struct ata_probe_ent *probe_ent; | |
5687 | ||
5688 | probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); | |
5689 | if (!probe_ent) { | |
5690 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
5691 | kobject_name(&(dev->kobj))); | |
5692 | return NULL; | |
5693 | } | |
5694 | ||
5695 | INIT_LIST_HEAD(&probe_ent->node); | |
5696 | probe_ent->dev = dev; | |
5697 | ||
5698 | probe_ent->sht = port->sht; | |
5699 | probe_ent->host_flags = port->host_flags; | |
5700 | probe_ent->pio_mask = port->pio_mask; | |
5701 | probe_ent->mwdma_mask = port->mwdma_mask; | |
5702 | probe_ent->udma_mask = port->udma_mask; | |
5703 | probe_ent->port_ops = port->port_ops; | |
5704 | ||
5705 | return probe_ent; | |
5706 | } | |
5707 | ||
1da177e4 LT |
5708 | /** |
5709 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
5710 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
5711 | * |
5712 | * Utility function which initializes data_addr, error_addr, | |
5713 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
5714 | * device_addr, status_addr, and command_addr to standard offsets | |
5715 | * relative to cmd_addr. | |
5716 | * | |
5717 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 5718 | */ |
0baab86b | 5719 | |
1da177e4 LT |
5720 | void ata_std_ports(struct ata_ioports *ioaddr) |
5721 | { | |
5722 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
5723 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
5724 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
5725 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
5726 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
5727 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
5728 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
5729 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
5730 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
5731 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
5732 | } | |
5733 | ||
0baab86b | 5734 | |
374b1873 JG |
5735 | #ifdef CONFIG_PCI |
5736 | ||
5737 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
5738 | { | |
5739 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
5740 | ||
5741 | pci_iounmap(pdev, host_set->mmio_base); | |
5742 | } | |
5743 | ||
1da177e4 LT |
5744 | /** |
5745 | * ata_pci_remove_one - PCI layer callback for device removal | |
5746 | * @pdev: PCI device that was removed | |
5747 | * | |
5748 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 5749 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
5750 | * Handle this by unregistering all objects associated |
5751 | * with this PCI device. Free those objects. Then finally | |
5752 | * release PCI resources and disable device. | |
5753 | * | |
5754 | * LOCKING: | |
5755 | * Inherited from PCI layer (may sleep). | |
5756 | */ | |
5757 | ||
5758 | void ata_pci_remove_one (struct pci_dev *pdev) | |
5759 | { | |
5760 | struct device *dev = pci_dev_to_dev(pdev); | |
5761 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
f0eb62b8 | 5762 | struct ata_host_set *host_set2 = host_set->next; |
1da177e4 | 5763 | |
17b14451 | 5764 | ata_host_set_remove(host_set); |
f0eb62b8 TH |
5765 | if (host_set2) |
5766 | ata_host_set_remove(host_set2); | |
5767 | ||
1da177e4 LT |
5768 | pci_release_regions(pdev); |
5769 | pci_disable_device(pdev); | |
5770 | dev_set_drvdata(dev, NULL); | |
5771 | } | |
5772 | ||
5773 | /* move to PCI subsystem */ | |
057ace5e | 5774 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
5775 | { |
5776 | unsigned long tmp = 0; | |
5777 | ||
5778 | switch (bits->width) { | |
5779 | case 1: { | |
5780 | u8 tmp8 = 0; | |
5781 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
5782 | tmp = tmp8; | |
5783 | break; | |
5784 | } | |
5785 | case 2: { | |
5786 | u16 tmp16 = 0; | |
5787 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
5788 | tmp = tmp16; | |
5789 | break; | |
5790 | } | |
5791 | case 4: { | |
5792 | u32 tmp32 = 0; | |
5793 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
5794 | tmp = tmp32; | |
5795 | break; | |
5796 | } | |
5797 | ||
5798 | default: | |
5799 | return -EINVAL; | |
5800 | } | |
5801 | ||
5802 | tmp &= bits->mask; | |
5803 | ||
5804 | return (tmp == bits->val) ? 1 : 0; | |
5805 | } | |
9b847548 | 5806 | |
3c5100c1 | 5807 | void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) |
9b847548 JA |
5808 | { |
5809 | pci_save_state(pdev); | |
500530f6 | 5810 | |
3c5100c1 | 5811 | if (mesg.event == PM_EVENT_SUSPEND) { |
500530f6 TH |
5812 | pci_disable_device(pdev); |
5813 | pci_set_power_state(pdev, PCI_D3hot); | |
5814 | } | |
9b847548 JA |
5815 | } |
5816 | ||
500530f6 | 5817 | void ata_pci_device_do_resume(struct pci_dev *pdev) |
9b847548 JA |
5818 | { |
5819 | pci_set_power_state(pdev, PCI_D0); | |
5820 | pci_restore_state(pdev); | |
5821 | pci_enable_device(pdev); | |
5822 | pci_set_master(pdev); | |
500530f6 TH |
5823 | } |
5824 | ||
3c5100c1 | 5825 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) |
500530f6 TH |
5826 | { |
5827 | struct ata_host_set *host_set = dev_get_drvdata(&pdev->dev); | |
5828 | int rc = 0; | |
5829 | ||
3c5100c1 | 5830 | rc = ata_host_set_suspend(host_set, mesg); |
500530f6 TH |
5831 | if (rc) |
5832 | return rc; | |
5833 | ||
5834 | if (host_set->next) { | |
3c5100c1 | 5835 | rc = ata_host_set_suspend(host_set->next, mesg); |
500530f6 TH |
5836 | if (rc) { |
5837 | ata_host_set_resume(host_set); | |
5838 | return rc; | |
5839 | } | |
5840 | } | |
5841 | ||
3c5100c1 | 5842 | ata_pci_device_do_suspend(pdev, mesg); |
500530f6 TH |
5843 | |
5844 | return 0; | |
5845 | } | |
5846 | ||
5847 | int ata_pci_device_resume(struct pci_dev *pdev) | |
5848 | { | |
5849 | struct ata_host_set *host_set = dev_get_drvdata(&pdev->dev); | |
5850 | ||
5851 | ata_pci_device_do_resume(pdev); | |
5852 | ata_host_set_resume(host_set); | |
5853 | if (host_set->next) | |
5854 | ata_host_set_resume(host_set->next); | |
5855 | ||
9b847548 JA |
5856 | return 0; |
5857 | } | |
1da177e4 LT |
5858 | #endif /* CONFIG_PCI */ |
5859 | ||
5860 | ||
1da177e4 LT |
5861 | static int __init ata_init(void) |
5862 | { | |
a8601e5f | 5863 | ata_probe_timeout *= HZ; |
1da177e4 LT |
5864 | ata_wq = create_workqueue("ata"); |
5865 | if (!ata_wq) | |
5866 | return -ENOMEM; | |
5867 | ||
453b07ac TH |
5868 | ata_aux_wq = create_singlethread_workqueue("ata_aux"); |
5869 | if (!ata_aux_wq) { | |
5870 | destroy_workqueue(ata_wq); | |
5871 | return -ENOMEM; | |
5872 | } | |
5873 | ||
1da177e4 LT |
5874 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); |
5875 | return 0; | |
5876 | } | |
5877 | ||
5878 | static void __exit ata_exit(void) | |
5879 | { | |
5880 | destroy_workqueue(ata_wq); | |
453b07ac | 5881 | destroy_workqueue(ata_aux_wq); |
1da177e4 LT |
5882 | } |
5883 | ||
5884 | module_init(ata_init); | |
5885 | module_exit(ata_exit); | |
5886 | ||
67846b30 | 5887 | static unsigned long ratelimit_time; |
34af946a | 5888 | static DEFINE_SPINLOCK(ata_ratelimit_lock); |
67846b30 JG |
5889 | |
5890 | int ata_ratelimit(void) | |
5891 | { | |
5892 | int rc; | |
5893 | unsigned long flags; | |
5894 | ||
5895 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
5896 | ||
5897 | if (time_after(jiffies, ratelimit_time)) { | |
5898 | rc = 1; | |
5899 | ratelimit_time = jiffies + (HZ/5); | |
5900 | } else | |
5901 | rc = 0; | |
5902 | ||
5903 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
5904 | ||
5905 | return rc; | |
5906 | } | |
5907 | ||
c22daff4 TH |
5908 | /** |
5909 | * ata_wait_register - wait until register value changes | |
5910 | * @reg: IO-mapped register | |
5911 | * @mask: Mask to apply to read register value | |
5912 | * @val: Wait condition | |
5913 | * @interval_msec: polling interval in milliseconds | |
5914 | * @timeout_msec: timeout in milliseconds | |
5915 | * | |
5916 | * Waiting for some bits of register to change is a common | |
5917 | * operation for ATA controllers. This function reads 32bit LE | |
5918 | * IO-mapped register @reg and tests for the following condition. | |
5919 | * | |
5920 | * (*@reg & mask) != val | |
5921 | * | |
5922 | * If the condition is met, it returns; otherwise, the process is | |
5923 | * repeated after @interval_msec until timeout. | |
5924 | * | |
5925 | * LOCKING: | |
5926 | * Kernel thread context (may sleep) | |
5927 | * | |
5928 | * RETURNS: | |
5929 | * The final register value. | |
5930 | */ | |
5931 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
5932 | unsigned long interval_msec, | |
5933 | unsigned long timeout_msec) | |
5934 | { | |
5935 | unsigned long timeout; | |
5936 | u32 tmp; | |
5937 | ||
5938 | tmp = ioread32(reg); | |
5939 | ||
5940 | /* Calculate timeout _after_ the first read to make sure | |
5941 | * preceding writes reach the controller before starting to | |
5942 | * eat away the timeout. | |
5943 | */ | |
5944 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
5945 | ||
5946 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
5947 | msleep(interval_msec); | |
5948 | tmp = ioread32(reg); | |
5949 | } | |
5950 | ||
5951 | return tmp; | |
5952 | } | |
5953 | ||
1da177e4 LT |
5954 | /* |
5955 | * libata is essentially a library of internal helper functions for | |
5956 | * low-level ATA host controller drivers. As such, the API/ABI is | |
5957 | * likely to change as new drivers are added and updated. | |
5958 | * Do not depend on ABI/API stability. | |
5959 | */ | |
5960 | ||
e9c83914 TH |
5961 | EXPORT_SYMBOL_GPL(sata_deb_timing_normal); |
5962 | EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); | |
5963 | EXPORT_SYMBOL_GPL(sata_deb_timing_long); | |
1da177e4 LT |
5964 | EXPORT_SYMBOL_GPL(ata_std_bios_param); |
5965 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
b03732f0 | 5966 | EXPORT_SYMBOL_GPL(ata_host_set_init); |
1da177e4 | 5967 | EXPORT_SYMBOL_GPL(ata_device_add); |
720ba126 | 5968 | EXPORT_SYMBOL_GPL(ata_port_detach); |
17b14451 | 5969 | EXPORT_SYMBOL_GPL(ata_host_set_remove); |
1da177e4 LT |
5970 | EXPORT_SYMBOL_GPL(ata_sg_init); |
5971 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
9a1004d0 | 5972 | EXPORT_SYMBOL_GPL(ata_hsm_move); |
f686bcb8 | 5973 | EXPORT_SYMBOL_GPL(ata_qc_complete); |
dedaf2b0 | 5974 | EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); |
1da177e4 | 5975 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
1da177e4 LT |
5976 | EXPORT_SYMBOL_GPL(ata_tf_load); |
5977 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
5978 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
5979 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
5980 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
5981 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
5982 | EXPORT_SYMBOL_GPL(ata_check_status); | |
5983 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
5984 | EXPORT_SYMBOL_GPL(ata_exec_command); |
5985 | EXPORT_SYMBOL_GPL(ata_port_start); | |
5986 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 5987 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 | 5988 | EXPORT_SYMBOL_GPL(ata_interrupt); |
a6b2c5d4 AC |
5989 | EXPORT_SYMBOL_GPL(ata_mmio_data_xfer); |
5990 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer); | |
75e99585 | 5991 | EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq); |
1da177e4 | 5992 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
e46834cd | 5993 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); |
1da177e4 LT |
5994 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
5995 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
5996 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
5997 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
5998 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
6d97dbd7 TH |
5999 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); |
6000 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); | |
6001 | EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); | |
6002 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); | |
6003 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); | |
1da177e4 | 6004 | EXPORT_SYMBOL_GPL(ata_port_probe); |
3c567b7d | 6005 | EXPORT_SYMBOL_GPL(sata_set_spd); |
d7bb4cc7 TH |
6006 | EXPORT_SYMBOL_GPL(sata_phy_debounce); |
6007 | EXPORT_SYMBOL_GPL(sata_phy_resume); | |
1da177e4 LT |
6008 | EXPORT_SYMBOL_GPL(sata_phy_reset); |
6009 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
6010 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
f5914a46 | 6011 | EXPORT_SYMBOL_GPL(ata_std_prereset); |
c2bd5804 TH |
6012 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
6013 | EXPORT_SYMBOL_GPL(sata_std_hardreset); | |
6014 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
623a3128 | 6015 | EXPORT_SYMBOL_GPL(ata_dev_revalidate); |
2e9edbf8 JG |
6016 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
6017 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
1da177e4 | 6018 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 6019 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
c22daff4 | 6020 | EXPORT_SYMBOL_GPL(ata_wait_register); |
6f8b9958 | 6021 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
86e45b6b | 6022 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
6023 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
6024 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
1da177e4 | 6025 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
83c47bcb | 6026 | EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); |
a6e6ce8e | 6027 | EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); |
1da177e4 LT |
6028 | EXPORT_SYMBOL_GPL(ata_scsi_release); |
6029 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
34bf2170 TH |
6030 | EXPORT_SYMBOL_GPL(sata_scr_valid); |
6031 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
6032 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
6033 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
6034 | EXPORT_SYMBOL_GPL(ata_port_online); | |
6035 | EXPORT_SYMBOL_GPL(ata_port_offline); | |
500530f6 TH |
6036 | EXPORT_SYMBOL_GPL(ata_host_set_suspend); |
6037 | EXPORT_SYMBOL_GPL(ata_host_set_resume); | |
6a62a04d TH |
6038 | EXPORT_SYMBOL_GPL(ata_id_string); |
6039 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
1da177e4 LT |
6040 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
6041 | ||
1bc4ccff | 6042 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
6043 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
6044 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
6045 | ||
1da177e4 LT |
6046 | #ifdef CONFIG_PCI |
6047 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 6048 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
6049 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
6050 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
6051 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
500530f6 TH |
6052 | EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); |
6053 | EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); | |
9b847548 JA |
6054 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
6055 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
67951ade AC |
6056 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
6057 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
1da177e4 | 6058 | #endif /* CONFIG_PCI */ |
9b847548 | 6059 | |
9b847548 JA |
6060 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); |
6061 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); | |
ece1d636 | 6062 | |
ece1d636 | 6063 | EXPORT_SYMBOL_GPL(ata_eng_timeout); |
7b70fc03 TH |
6064 | EXPORT_SYMBOL_GPL(ata_port_schedule_eh); |
6065 | EXPORT_SYMBOL_GPL(ata_port_abort); | |
e3180499 TH |
6066 | EXPORT_SYMBOL_GPL(ata_port_freeze); |
6067 | EXPORT_SYMBOL_GPL(ata_eh_freeze_port); | |
6068 | EXPORT_SYMBOL_GPL(ata_eh_thaw_port); | |
ece1d636 TH |
6069 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
6070 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
022bdb07 | 6071 | EXPORT_SYMBOL_GPL(ata_do_eh); |