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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
35 | #include <linux/config.h> | |
36 | #include <linux/kernel.h> | |
37 | #include <linux/module.h> | |
38 | #include <linux/pci.h> | |
39 | #include <linux/init.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/mm.h> | |
42 | #include <linux/highmem.h> | |
43 | #include <linux/spinlock.h> | |
44 | #include <linux/blkdev.h> | |
45 | #include <linux/delay.h> | |
46 | #include <linux/timer.h> | |
47 | #include <linux/interrupt.h> | |
48 | #include <linux/completion.h> | |
49 | #include <linux/suspend.h> | |
50 | #include <linux/workqueue.h> | |
67846b30 | 51 | #include <linux/jiffies.h> |
378f058c | 52 | #include <linux/scatterlist.h> |
1da177e4 | 53 | #include <scsi/scsi.h> |
1da177e4 | 54 | #include "scsi_priv.h" |
193515d5 | 55 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
56 | #include <scsi/scsi_host.h> |
57 | #include <linux/libata.h> | |
58 | #include <asm/io.h> | |
59 | #include <asm/semaphore.h> | |
60 | #include <asm/byteorder.h> | |
61 | ||
62 | #include "libata.h" | |
63 | ||
64 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
65 | unsigned long tmout_pat, | |
66 | unsigned long tmout); | |
59a10b17 | 67 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev); |
8bf62ece | 68 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev); |
1da177e4 LT |
69 | static void ata_set_mode(struct ata_port *ap); |
70 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev); | |
057ace5e | 71 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift); |
1da177e4 | 72 | static int fgb(u32 bitmap); |
057ace5e | 73 | static int ata_choose_xfer_mode(const struct ata_port *ap, |
1da177e4 LT |
74 | u8 *xfer_mode_out, |
75 | unsigned int *xfer_shift_out); | |
1da177e4 LT |
76 | static void __ata_qc_complete(struct ata_queued_cmd *qc); |
77 | ||
78 | static unsigned int ata_unique_id = 1; | |
79 | static struct workqueue_struct *ata_wq; | |
80 | ||
1623c81e JG |
81 | int atapi_enabled = 0; |
82 | module_param(atapi_enabled, int, 0444); | |
83 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
84 | ||
1da177e4 LT |
85 | MODULE_AUTHOR("Jeff Garzik"); |
86 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
87 | MODULE_LICENSE("GPL"); | |
88 | MODULE_VERSION(DRV_VERSION); | |
89 | ||
90 | /** | |
6f0ef4fa | 91 | * ata_tf_load_pio - send taskfile registers to host controller |
1da177e4 LT |
92 | * @ap: Port to which output is sent |
93 | * @tf: ATA taskfile register set | |
94 | * | |
95 | * Outputs ATA taskfile to standard ATA host controller. | |
96 | * | |
97 | * LOCKING: | |
98 | * Inherited from caller. | |
99 | */ | |
100 | ||
057ace5e | 101 | static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
102 | { |
103 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
104 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
105 | ||
106 | if (tf->ctl != ap->last_ctl) { | |
107 | outb(tf->ctl, ioaddr->ctl_addr); | |
108 | ap->last_ctl = tf->ctl; | |
109 | ata_wait_idle(ap); | |
110 | } | |
111 | ||
112 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
113 | outb(tf->hob_feature, ioaddr->feature_addr); | |
114 | outb(tf->hob_nsect, ioaddr->nsect_addr); | |
115 | outb(tf->hob_lbal, ioaddr->lbal_addr); | |
116 | outb(tf->hob_lbam, ioaddr->lbam_addr); | |
117 | outb(tf->hob_lbah, ioaddr->lbah_addr); | |
118 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
119 | tf->hob_feature, | |
120 | tf->hob_nsect, | |
121 | tf->hob_lbal, | |
122 | tf->hob_lbam, | |
123 | tf->hob_lbah); | |
124 | } | |
125 | ||
126 | if (is_addr) { | |
127 | outb(tf->feature, ioaddr->feature_addr); | |
128 | outb(tf->nsect, ioaddr->nsect_addr); | |
129 | outb(tf->lbal, ioaddr->lbal_addr); | |
130 | outb(tf->lbam, ioaddr->lbam_addr); | |
131 | outb(tf->lbah, ioaddr->lbah_addr); | |
132 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
133 | tf->feature, | |
134 | tf->nsect, | |
135 | tf->lbal, | |
136 | tf->lbam, | |
137 | tf->lbah); | |
138 | } | |
139 | ||
140 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
141 | outb(tf->device, ioaddr->device_addr); | |
142 | VPRINTK("device 0x%X\n", tf->device); | |
143 | } | |
144 | ||
145 | ata_wait_idle(ap); | |
146 | } | |
147 | ||
148 | /** | |
149 | * ata_tf_load_mmio - send taskfile registers to host controller | |
150 | * @ap: Port to which output is sent | |
151 | * @tf: ATA taskfile register set | |
152 | * | |
153 | * Outputs ATA taskfile to standard ATA host controller using MMIO. | |
154 | * | |
155 | * LOCKING: | |
156 | * Inherited from caller. | |
157 | */ | |
158 | ||
057ace5e | 159 | static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
160 | { |
161 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
162 | unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; | |
163 | ||
164 | if (tf->ctl != ap->last_ctl) { | |
165 | writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr); | |
166 | ap->last_ctl = tf->ctl; | |
167 | ata_wait_idle(ap); | |
168 | } | |
169 | ||
170 | if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { | |
171 | writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr); | |
172 | writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr); | |
173 | writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr); | |
174 | writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr); | |
175 | writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr); | |
176 | VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n", | |
177 | tf->hob_feature, | |
178 | tf->hob_nsect, | |
179 | tf->hob_lbal, | |
180 | tf->hob_lbam, | |
181 | tf->hob_lbah); | |
182 | } | |
183 | ||
184 | if (is_addr) { | |
185 | writeb(tf->feature, (void __iomem *) ioaddr->feature_addr); | |
186 | writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr); | |
187 | writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr); | |
188 | writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr); | |
189 | writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr); | |
190 | VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", | |
191 | tf->feature, | |
192 | tf->nsect, | |
193 | tf->lbal, | |
194 | tf->lbam, | |
195 | tf->lbah); | |
196 | } | |
197 | ||
198 | if (tf->flags & ATA_TFLAG_DEVICE) { | |
199 | writeb(tf->device, (void __iomem *) ioaddr->device_addr); | |
200 | VPRINTK("device 0x%X\n", tf->device); | |
201 | } | |
202 | ||
203 | ata_wait_idle(ap); | |
204 | } | |
205 | ||
0baab86b EF |
206 | |
207 | /** | |
208 | * ata_tf_load - send taskfile registers to host controller | |
209 | * @ap: Port to which output is sent | |
210 | * @tf: ATA taskfile register set | |
211 | * | |
212 | * Outputs ATA taskfile to standard ATA host controller using MMIO | |
213 | * or PIO as indicated by the ATA_FLAG_MMIO flag. | |
214 | * Writes the control, feature, nsect, lbal, lbam, and lbah registers. | |
215 | * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect, | |
216 | * hob_lbal, hob_lbam, and hob_lbah. | |
217 | * | |
218 | * This function waits for idle (!BUSY and !DRQ) after writing | |
219 | * registers. If the control register has a new value, this | |
220 | * function also waits for idle after writing control and before | |
221 | * writing the remaining registers. | |
222 | * | |
223 | * May be used as the tf_load() entry in ata_port_operations. | |
224 | * | |
225 | * LOCKING: | |
226 | * Inherited from caller. | |
227 | */ | |
057ace5e | 228 | void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
229 | { |
230 | if (ap->flags & ATA_FLAG_MMIO) | |
231 | ata_tf_load_mmio(ap, tf); | |
232 | else | |
233 | ata_tf_load_pio(ap, tf); | |
234 | } | |
235 | ||
236 | /** | |
0baab86b | 237 | * ata_exec_command_pio - issue ATA command to host controller |
1da177e4 LT |
238 | * @ap: port to which command is being issued |
239 | * @tf: ATA taskfile register set | |
240 | * | |
0baab86b | 241 | * Issues PIO write to ATA command register, with proper |
1da177e4 LT |
242 | * synchronization with interrupt handler / other threads. |
243 | * | |
244 | * LOCKING: | |
245 | * spin_lock_irqsave(host_set lock) | |
246 | */ | |
247 | ||
057ace5e | 248 | static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
249 | { |
250 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
251 | ||
252 | outb(tf->command, ap->ioaddr.command_addr); | |
253 | ata_pause(ap); | |
254 | } | |
255 | ||
256 | ||
257 | /** | |
258 | * ata_exec_command_mmio - issue ATA command to host controller | |
259 | * @ap: port to which command is being issued | |
260 | * @tf: ATA taskfile register set | |
261 | * | |
262 | * Issues MMIO write to ATA command register, with proper | |
263 | * synchronization with interrupt handler / other threads. | |
264 | * | |
265 | * LOCKING: | |
266 | * spin_lock_irqsave(host_set lock) | |
267 | */ | |
268 | ||
057ace5e | 269 | static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
270 | { |
271 | DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command); | |
272 | ||
273 | writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr); | |
274 | ata_pause(ap); | |
275 | } | |
276 | ||
0baab86b EF |
277 | |
278 | /** | |
279 | * ata_exec_command - issue ATA command to host controller | |
280 | * @ap: port to which command is being issued | |
281 | * @tf: ATA taskfile register set | |
282 | * | |
283 | * Issues PIO/MMIO write to ATA command register, with proper | |
284 | * synchronization with interrupt handler / other threads. | |
285 | * | |
286 | * LOCKING: | |
287 | * spin_lock_irqsave(host_set lock) | |
288 | */ | |
057ace5e | 289 | void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) |
1da177e4 LT |
290 | { |
291 | if (ap->flags & ATA_FLAG_MMIO) | |
292 | ata_exec_command_mmio(ap, tf); | |
293 | else | |
294 | ata_exec_command_pio(ap, tf); | |
295 | } | |
296 | ||
1da177e4 LT |
297 | /** |
298 | * ata_tf_to_host - issue ATA taskfile to host controller | |
299 | * @ap: port to which command is being issued | |
300 | * @tf: ATA taskfile register set | |
301 | * | |
302 | * Issues ATA taskfile register set to ATA host controller, | |
303 | * with proper synchronization with interrupt handler and | |
304 | * other threads. | |
305 | * | |
306 | * LOCKING: | |
1da177e4 LT |
307 | * spin_lock_irqsave(host_set lock) |
308 | */ | |
309 | ||
e5338254 JG |
310 | static inline void ata_tf_to_host(struct ata_port *ap, |
311 | const struct ata_taskfile *tf) | |
1da177e4 LT |
312 | { |
313 | ap->ops->tf_load(ap, tf); | |
314 | ap->ops->exec_command(ap, tf); | |
315 | } | |
316 | ||
317 | /** | |
0baab86b | 318 | * ata_tf_read_pio - input device's ATA taskfile shadow registers |
1da177e4 LT |
319 | * @ap: Port from which input is read |
320 | * @tf: ATA taskfile register set for storing input | |
321 | * | |
322 | * Reads ATA taskfile registers for currently-selected device | |
323 | * into @tf. | |
324 | * | |
325 | * LOCKING: | |
326 | * Inherited from caller. | |
327 | */ | |
328 | ||
329 | static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf) | |
330 | { | |
331 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
332 | ||
ac19bff2 | 333 | tf->command = ata_check_status(ap); |
0169e284 | 334 | tf->feature = inb(ioaddr->error_addr); |
1da177e4 LT |
335 | tf->nsect = inb(ioaddr->nsect_addr); |
336 | tf->lbal = inb(ioaddr->lbal_addr); | |
337 | tf->lbam = inb(ioaddr->lbam_addr); | |
338 | tf->lbah = inb(ioaddr->lbah_addr); | |
339 | tf->device = inb(ioaddr->device_addr); | |
340 | ||
341 | if (tf->flags & ATA_TFLAG_LBA48) { | |
342 | outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr); | |
343 | tf->hob_feature = inb(ioaddr->error_addr); | |
344 | tf->hob_nsect = inb(ioaddr->nsect_addr); | |
345 | tf->hob_lbal = inb(ioaddr->lbal_addr); | |
346 | tf->hob_lbam = inb(ioaddr->lbam_addr); | |
347 | tf->hob_lbah = inb(ioaddr->lbah_addr); | |
348 | } | |
349 | } | |
350 | ||
351 | /** | |
352 | * ata_tf_read_mmio - input device's ATA taskfile shadow registers | |
353 | * @ap: Port from which input is read | |
354 | * @tf: ATA taskfile register set for storing input | |
355 | * | |
356 | * Reads ATA taskfile registers for currently-selected device | |
357 | * into @tf via MMIO. | |
358 | * | |
359 | * LOCKING: | |
360 | * Inherited from caller. | |
361 | */ | |
362 | ||
363 | static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf) | |
364 | { | |
365 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
366 | ||
ac19bff2 | 367 | tf->command = ata_check_status(ap); |
0169e284 | 368 | tf->feature = readb((void __iomem *)ioaddr->error_addr); |
1da177e4 LT |
369 | tf->nsect = readb((void __iomem *)ioaddr->nsect_addr); |
370 | tf->lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
371 | tf->lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
372 | tf->lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
373 | tf->device = readb((void __iomem *)ioaddr->device_addr); | |
374 | ||
375 | if (tf->flags & ATA_TFLAG_LBA48) { | |
376 | writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr); | |
377 | tf->hob_feature = readb((void __iomem *)ioaddr->error_addr); | |
378 | tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr); | |
379 | tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr); | |
380 | tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr); | |
381 | tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr); | |
382 | } | |
383 | } | |
384 | ||
0baab86b EF |
385 | |
386 | /** | |
387 | * ata_tf_read - input device's ATA taskfile shadow registers | |
388 | * @ap: Port from which input is read | |
389 | * @tf: ATA taskfile register set for storing input | |
390 | * | |
391 | * Reads ATA taskfile registers for currently-selected device | |
392 | * into @tf. | |
393 | * | |
394 | * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48 | |
395 | * is set, also reads the hob registers. | |
396 | * | |
397 | * May be used as the tf_read() entry in ata_port_operations. | |
398 | * | |
399 | * LOCKING: | |
400 | * Inherited from caller. | |
401 | */ | |
1da177e4 LT |
402 | void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
403 | { | |
404 | if (ap->flags & ATA_FLAG_MMIO) | |
405 | ata_tf_read_mmio(ap, tf); | |
406 | else | |
407 | ata_tf_read_pio(ap, tf); | |
408 | } | |
409 | ||
410 | /** | |
411 | * ata_check_status_pio - Read device status reg & clear interrupt | |
412 | * @ap: port where the device is | |
413 | * | |
414 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 415 | * and return its value. This also clears pending interrupts |
1da177e4 LT |
416 | * from this device |
417 | * | |
418 | * LOCKING: | |
419 | * Inherited from caller. | |
420 | */ | |
421 | static u8 ata_check_status_pio(struct ata_port *ap) | |
422 | { | |
423 | return inb(ap->ioaddr.status_addr); | |
424 | } | |
425 | ||
426 | /** | |
427 | * ata_check_status_mmio - Read device status reg & clear interrupt | |
428 | * @ap: port where the device is | |
429 | * | |
430 | * Reads ATA taskfile status register for currently-selected device | |
0baab86b | 431 | * via MMIO and return its value. This also clears pending interrupts |
1da177e4 LT |
432 | * from this device |
433 | * | |
434 | * LOCKING: | |
435 | * Inherited from caller. | |
436 | */ | |
437 | static u8 ata_check_status_mmio(struct ata_port *ap) | |
438 | { | |
439 | return readb((void __iomem *) ap->ioaddr.status_addr); | |
440 | } | |
441 | ||
0baab86b EF |
442 | |
443 | /** | |
444 | * ata_check_status - Read device status reg & clear interrupt | |
445 | * @ap: port where the device is | |
446 | * | |
447 | * Reads ATA taskfile status register for currently-selected device | |
448 | * and return its value. This also clears pending interrupts | |
449 | * from this device | |
450 | * | |
451 | * May be used as the check_status() entry in ata_port_operations. | |
452 | * | |
453 | * LOCKING: | |
454 | * Inherited from caller. | |
455 | */ | |
1da177e4 LT |
456 | u8 ata_check_status(struct ata_port *ap) |
457 | { | |
458 | if (ap->flags & ATA_FLAG_MMIO) | |
459 | return ata_check_status_mmio(ap); | |
460 | return ata_check_status_pio(ap); | |
461 | } | |
462 | ||
0baab86b EF |
463 | |
464 | /** | |
465 | * ata_altstatus - Read device alternate status reg | |
466 | * @ap: port where the device is | |
467 | * | |
468 | * Reads ATA taskfile alternate status register for | |
469 | * currently-selected device and return its value. | |
470 | * | |
471 | * Note: may NOT be used as the check_altstatus() entry in | |
472 | * ata_port_operations. | |
473 | * | |
474 | * LOCKING: | |
475 | * Inherited from caller. | |
476 | */ | |
1da177e4 LT |
477 | u8 ata_altstatus(struct ata_port *ap) |
478 | { | |
479 | if (ap->ops->check_altstatus) | |
480 | return ap->ops->check_altstatus(ap); | |
481 | ||
482 | if (ap->flags & ATA_FLAG_MMIO) | |
483 | return readb((void __iomem *)ap->ioaddr.altstatus_addr); | |
484 | return inb(ap->ioaddr.altstatus_addr); | |
485 | } | |
486 | ||
0baab86b | 487 | |
1da177e4 LT |
488 | /** |
489 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
490 | * @tf: Taskfile to convert | |
491 | * @fis: Buffer into which data will output | |
492 | * @pmp: Port multiplier port | |
493 | * | |
494 | * Converts a standard ATA taskfile to a Serial ATA | |
495 | * FIS structure (Register - Host to Device). | |
496 | * | |
497 | * LOCKING: | |
498 | * Inherited from caller. | |
499 | */ | |
500 | ||
057ace5e | 501 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) |
1da177e4 LT |
502 | { |
503 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
504 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
505 | bit 7 indicates Command FIS */ | |
506 | fis[2] = tf->command; | |
507 | fis[3] = tf->feature; | |
508 | ||
509 | fis[4] = tf->lbal; | |
510 | fis[5] = tf->lbam; | |
511 | fis[6] = tf->lbah; | |
512 | fis[7] = tf->device; | |
513 | ||
514 | fis[8] = tf->hob_lbal; | |
515 | fis[9] = tf->hob_lbam; | |
516 | fis[10] = tf->hob_lbah; | |
517 | fis[11] = tf->hob_feature; | |
518 | ||
519 | fis[12] = tf->nsect; | |
520 | fis[13] = tf->hob_nsect; | |
521 | fis[14] = 0; | |
522 | fis[15] = tf->ctl; | |
523 | ||
524 | fis[16] = 0; | |
525 | fis[17] = 0; | |
526 | fis[18] = 0; | |
527 | fis[19] = 0; | |
528 | } | |
529 | ||
530 | /** | |
531 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
532 | * @fis: Buffer from which data will be input | |
533 | * @tf: Taskfile to output | |
534 | * | |
e12a1be6 | 535 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
536 | * |
537 | * LOCKING: | |
538 | * Inherited from caller. | |
539 | */ | |
540 | ||
057ace5e | 541 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
542 | { |
543 | tf->command = fis[2]; /* status */ | |
544 | tf->feature = fis[3]; /* error */ | |
545 | ||
546 | tf->lbal = fis[4]; | |
547 | tf->lbam = fis[5]; | |
548 | tf->lbah = fis[6]; | |
549 | tf->device = fis[7]; | |
550 | ||
551 | tf->hob_lbal = fis[8]; | |
552 | tf->hob_lbam = fis[9]; | |
553 | tf->hob_lbah = fis[10]; | |
554 | ||
555 | tf->nsect = fis[12]; | |
556 | tf->hob_nsect = fis[13]; | |
557 | } | |
558 | ||
8cbd6df1 AL |
559 | static const u8 ata_rw_cmds[] = { |
560 | /* pio multi */ | |
561 | ATA_CMD_READ_MULTI, | |
562 | ATA_CMD_WRITE_MULTI, | |
563 | ATA_CMD_READ_MULTI_EXT, | |
564 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
565 | 0, |
566 | 0, | |
567 | 0, | |
568 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
569 | /* pio */ |
570 | ATA_CMD_PIO_READ, | |
571 | ATA_CMD_PIO_WRITE, | |
572 | ATA_CMD_PIO_READ_EXT, | |
573 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
574 | 0, |
575 | 0, | |
576 | 0, | |
577 | 0, | |
8cbd6df1 AL |
578 | /* dma */ |
579 | ATA_CMD_READ, | |
580 | ATA_CMD_WRITE, | |
581 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
582 | ATA_CMD_WRITE_EXT, |
583 | 0, | |
584 | 0, | |
585 | 0, | |
586 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 587 | }; |
1da177e4 LT |
588 | |
589 | /** | |
8cbd6df1 AL |
590 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
591 | * @qc: command to examine and configure | |
1da177e4 | 592 | * |
8cbd6df1 AL |
593 | * Examine the device configuration and tf->flags to calculate |
594 | * the proper read/write commands and protocol to use. | |
1da177e4 LT |
595 | * |
596 | * LOCKING: | |
597 | * caller. | |
598 | */ | |
9a3dccc4 | 599 | int ata_rwcmd_protocol(struct ata_queued_cmd *qc) |
1da177e4 | 600 | { |
8cbd6df1 AL |
601 | struct ata_taskfile *tf = &qc->tf; |
602 | struct ata_device *dev = qc->dev; | |
9a3dccc4 | 603 | u8 cmd; |
1da177e4 | 604 | |
9a3dccc4 | 605 | int index, fua, lba48, write; |
8cbd6df1 | 606 | |
9a3dccc4 | 607 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
608 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
609 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 610 | |
8cbd6df1 AL |
611 | if (dev->flags & ATA_DFLAG_PIO) { |
612 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 613 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
614 | } else { |
615 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 616 | index = 16; |
8cbd6df1 | 617 | } |
1da177e4 | 618 | |
9a3dccc4 TH |
619 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
620 | if (cmd) { | |
621 | tf->command = cmd; | |
622 | return 0; | |
623 | } | |
624 | return -1; | |
1da177e4 LT |
625 | } |
626 | ||
98ac62de | 627 | static const char * const xfer_mode_str[] = { |
1da177e4 LT |
628 | "UDMA/16", |
629 | "UDMA/25", | |
630 | "UDMA/33", | |
631 | "UDMA/44", | |
632 | "UDMA/66", | |
633 | "UDMA/100", | |
634 | "UDMA/133", | |
635 | "UDMA7", | |
636 | "MWDMA0", | |
637 | "MWDMA1", | |
638 | "MWDMA2", | |
639 | "PIO0", | |
640 | "PIO1", | |
641 | "PIO2", | |
642 | "PIO3", | |
643 | "PIO4", | |
644 | }; | |
645 | ||
646 | /** | |
647 | * ata_udma_string - convert UDMA bit offset to string | |
648 | * @mask: mask of bits supported; only highest bit counts. | |
649 | * | |
650 | * Determine string which represents the highest speed | |
651 | * (highest bit in @udma_mask). | |
652 | * | |
653 | * LOCKING: | |
654 | * None. | |
655 | * | |
656 | * RETURNS: | |
657 | * Constant C string representing highest speed listed in | |
658 | * @udma_mask, or the constant C string "<n/a>". | |
659 | */ | |
660 | ||
661 | static const char *ata_mode_string(unsigned int mask) | |
662 | { | |
663 | int i; | |
664 | ||
665 | for (i = 7; i >= 0; i--) | |
666 | if (mask & (1 << i)) | |
667 | goto out; | |
668 | for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--) | |
669 | if (mask & (1 << i)) | |
670 | goto out; | |
671 | for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--) | |
672 | if (mask & (1 << i)) | |
673 | goto out; | |
674 | ||
675 | return "<n/a>"; | |
676 | ||
677 | out: | |
678 | return xfer_mode_str[i]; | |
679 | } | |
680 | ||
681 | /** | |
682 | * ata_pio_devchk - PATA device presence detection | |
683 | * @ap: ATA channel to examine | |
684 | * @device: Device to examine (starting at zero) | |
685 | * | |
686 | * This technique was originally described in | |
687 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
688 | * later found its way into the ATA/ATAPI spec. | |
689 | * | |
690 | * Write a pattern to the ATA shadow registers, | |
691 | * and if a device is present, it will respond by | |
692 | * correctly storing and echoing back the | |
693 | * ATA shadow register contents. | |
694 | * | |
695 | * LOCKING: | |
696 | * caller. | |
697 | */ | |
698 | ||
699 | static unsigned int ata_pio_devchk(struct ata_port *ap, | |
700 | unsigned int device) | |
701 | { | |
702 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
703 | u8 nsect, lbal; | |
704 | ||
705 | ap->ops->dev_select(ap, device); | |
706 | ||
707 | outb(0x55, ioaddr->nsect_addr); | |
708 | outb(0xaa, ioaddr->lbal_addr); | |
709 | ||
710 | outb(0xaa, ioaddr->nsect_addr); | |
711 | outb(0x55, ioaddr->lbal_addr); | |
712 | ||
713 | outb(0x55, ioaddr->nsect_addr); | |
714 | outb(0xaa, ioaddr->lbal_addr); | |
715 | ||
716 | nsect = inb(ioaddr->nsect_addr); | |
717 | lbal = inb(ioaddr->lbal_addr); | |
718 | ||
719 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
720 | return 1; /* we found a device */ | |
721 | ||
722 | return 0; /* nothing found */ | |
723 | } | |
724 | ||
725 | /** | |
726 | * ata_mmio_devchk - PATA device presence detection | |
727 | * @ap: ATA channel to examine | |
728 | * @device: Device to examine (starting at zero) | |
729 | * | |
730 | * This technique was originally described in | |
731 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
732 | * later found its way into the ATA/ATAPI spec. | |
733 | * | |
734 | * Write a pattern to the ATA shadow registers, | |
735 | * and if a device is present, it will respond by | |
736 | * correctly storing and echoing back the | |
737 | * ATA shadow register contents. | |
738 | * | |
739 | * LOCKING: | |
740 | * caller. | |
741 | */ | |
742 | ||
743 | static unsigned int ata_mmio_devchk(struct ata_port *ap, | |
744 | unsigned int device) | |
745 | { | |
746 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
747 | u8 nsect, lbal; | |
748 | ||
749 | ap->ops->dev_select(ap, device); | |
750 | ||
751 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
752 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
753 | ||
754 | writeb(0xaa, (void __iomem *) ioaddr->nsect_addr); | |
755 | writeb(0x55, (void __iomem *) ioaddr->lbal_addr); | |
756 | ||
757 | writeb(0x55, (void __iomem *) ioaddr->nsect_addr); | |
758 | writeb(0xaa, (void __iomem *) ioaddr->lbal_addr); | |
759 | ||
760 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
761 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
762 | ||
763 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
764 | return 1; /* we found a device */ | |
765 | ||
766 | return 0; /* nothing found */ | |
767 | } | |
768 | ||
769 | /** | |
770 | * ata_devchk - PATA device presence detection | |
771 | * @ap: ATA channel to examine | |
772 | * @device: Device to examine (starting at zero) | |
773 | * | |
774 | * Dispatch ATA device presence detection, depending | |
775 | * on whether we are using PIO or MMIO to talk to the | |
776 | * ATA shadow registers. | |
777 | * | |
778 | * LOCKING: | |
779 | * caller. | |
780 | */ | |
781 | ||
782 | static unsigned int ata_devchk(struct ata_port *ap, | |
783 | unsigned int device) | |
784 | { | |
785 | if (ap->flags & ATA_FLAG_MMIO) | |
786 | return ata_mmio_devchk(ap, device); | |
787 | return ata_pio_devchk(ap, device); | |
788 | } | |
789 | ||
790 | /** | |
791 | * ata_dev_classify - determine device type based on ATA-spec signature | |
792 | * @tf: ATA taskfile register set for device to be identified | |
793 | * | |
794 | * Determine from taskfile register contents whether a device is | |
795 | * ATA or ATAPI, as per "Signature and persistence" section | |
796 | * of ATA/PI spec (volume 1, sect 5.14). | |
797 | * | |
798 | * LOCKING: | |
799 | * None. | |
800 | * | |
801 | * RETURNS: | |
802 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
803 | * the event of failure. | |
804 | */ | |
805 | ||
057ace5e | 806 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
807 | { |
808 | /* Apple's open source Darwin code hints that some devices only | |
809 | * put a proper signature into the LBA mid/high registers, | |
810 | * So, we only check those. It's sufficient for uniqueness. | |
811 | */ | |
812 | ||
813 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
814 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
815 | DPRINTK("found ATA device by sig\n"); | |
816 | return ATA_DEV_ATA; | |
817 | } | |
818 | ||
819 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
820 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
821 | DPRINTK("found ATAPI device by sig\n"); | |
822 | return ATA_DEV_ATAPI; | |
823 | } | |
824 | ||
825 | DPRINTK("unknown device\n"); | |
826 | return ATA_DEV_UNKNOWN; | |
827 | } | |
828 | ||
829 | /** | |
830 | * ata_dev_try_classify - Parse returned ATA device signature | |
831 | * @ap: ATA channel to examine | |
832 | * @device: Device to examine (starting at zero) | |
833 | * | |
834 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
835 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
836 | * shadow registers, indicating the results of device detection | |
837 | * and diagnostics. | |
838 | * | |
839 | * Select the ATA device, and read the values from the ATA shadow | |
840 | * registers. Then parse according to the Error register value, | |
841 | * and the spec-defined values examined by ata_dev_classify(). | |
842 | * | |
843 | * LOCKING: | |
844 | * caller. | |
845 | */ | |
846 | ||
847 | static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device) | |
848 | { | |
849 | struct ata_device *dev = &ap->device[device]; | |
850 | struct ata_taskfile tf; | |
851 | unsigned int class; | |
852 | u8 err; | |
853 | ||
854 | ap->ops->dev_select(ap, device); | |
855 | ||
856 | memset(&tf, 0, sizeof(tf)); | |
857 | ||
1da177e4 | 858 | ap->ops->tf_read(ap, &tf); |
0169e284 | 859 | err = tf.feature; |
1da177e4 LT |
860 | |
861 | dev->class = ATA_DEV_NONE; | |
862 | ||
863 | /* see if device passed diags */ | |
864 | if (err == 1) | |
865 | /* do nothing */ ; | |
866 | else if ((device == 0) && (err == 0x81)) | |
867 | /* do nothing */ ; | |
868 | else | |
869 | return err; | |
870 | ||
871 | /* determine if device if ATA or ATAPI */ | |
872 | class = ata_dev_classify(&tf); | |
873 | if (class == ATA_DEV_UNKNOWN) | |
874 | return err; | |
875 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
876 | return err; | |
877 | ||
878 | dev->class = class; | |
879 | ||
880 | return err; | |
881 | } | |
882 | ||
883 | /** | |
884 | * ata_dev_id_string - Convert IDENTIFY DEVICE page into string | |
885 | * @id: IDENTIFY DEVICE results we will examine | |
886 | * @s: string into which data is output | |
887 | * @ofs: offset into identify device page | |
888 | * @len: length of string to return. must be an even number. | |
889 | * | |
890 | * The strings in the IDENTIFY DEVICE page are broken up into | |
891 | * 16-bit chunks. Run through the string, and output each | |
892 | * 8-bit chunk linearly, regardless of platform. | |
893 | * | |
894 | * LOCKING: | |
895 | * caller. | |
896 | */ | |
897 | ||
057ace5e | 898 | void ata_dev_id_string(const u16 *id, unsigned char *s, |
1da177e4 LT |
899 | unsigned int ofs, unsigned int len) |
900 | { | |
901 | unsigned int c; | |
902 | ||
903 | while (len > 0) { | |
904 | c = id[ofs] >> 8; | |
905 | *s = c; | |
906 | s++; | |
907 | ||
908 | c = id[ofs] & 0xff; | |
909 | *s = c; | |
910 | s++; | |
911 | ||
912 | ofs++; | |
913 | len -= 2; | |
914 | } | |
915 | } | |
916 | ||
0baab86b EF |
917 | |
918 | /** | |
919 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
920 | * @ap: ATA channel to manipulate | |
921 | * @device: ATA device (numbered from zero) to select | |
922 | * | |
923 | * This function performs no actual function. | |
924 | * | |
925 | * May be used as the dev_select() entry in ata_port_operations. | |
926 | * | |
927 | * LOCKING: | |
928 | * caller. | |
929 | */ | |
1da177e4 LT |
930 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) |
931 | { | |
932 | } | |
933 | ||
0baab86b | 934 | |
1da177e4 LT |
935 | /** |
936 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
937 | * @ap: ATA channel to manipulate | |
938 | * @device: ATA device (numbered from zero) to select | |
939 | * | |
940 | * Use the method defined in the ATA specification to | |
941 | * make either device 0, or device 1, active on the | |
0baab86b EF |
942 | * ATA channel. Works with both PIO and MMIO. |
943 | * | |
944 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
945 | * |
946 | * LOCKING: | |
947 | * caller. | |
948 | */ | |
949 | ||
950 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
951 | { | |
952 | u8 tmp; | |
953 | ||
954 | if (device == 0) | |
955 | tmp = ATA_DEVICE_OBS; | |
956 | else | |
957 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
958 | ||
959 | if (ap->flags & ATA_FLAG_MMIO) { | |
960 | writeb(tmp, (void __iomem *) ap->ioaddr.device_addr); | |
961 | } else { | |
962 | outb(tmp, ap->ioaddr.device_addr); | |
963 | } | |
964 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
965 | } | |
966 | ||
967 | /** | |
968 | * ata_dev_select - Select device 0/1 on ATA bus | |
969 | * @ap: ATA channel to manipulate | |
970 | * @device: ATA device (numbered from zero) to select | |
971 | * @wait: non-zero to wait for Status register BSY bit to clear | |
972 | * @can_sleep: non-zero if context allows sleeping | |
973 | * | |
974 | * Use the method defined in the ATA specification to | |
975 | * make either device 0, or device 1, active on the | |
976 | * ATA channel. | |
977 | * | |
978 | * This is a high-level version of ata_std_dev_select(), | |
979 | * which additionally provides the services of inserting | |
980 | * the proper pauses and status polling, where needed. | |
981 | * | |
982 | * LOCKING: | |
983 | * caller. | |
984 | */ | |
985 | ||
986 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
987 | unsigned int wait, unsigned int can_sleep) | |
988 | { | |
989 | VPRINTK("ENTER, ata%u: device %u, wait %u\n", | |
990 | ap->id, device, wait); | |
991 | ||
992 | if (wait) | |
993 | ata_wait_idle(ap); | |
994 | ||
995 | ap->ops->dev_select(ap, device); | |
996 | ||
997 | if (wait) { | |
998 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
999 | msleep(150); | |
1000 | ata_wait_idle(ap); | |
1001 | } | |
1002 | } | |
1003 | ||
1004 | /** | |
1005 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
1006 | * @dev: Device whose IDENTIFY DEVICE page we will dump | |
1007 | * | |
1008 | * Dump selected 16-bit words from a detected device's | |
1009 | * IDENTIFY PAGE page. | |
1010 | * | |
1011 | * LOCKING: | |
1012 | * caller. | |
1013 | */ | |
1014 | ||
057ace5e | 1015 | static inline void ata_dump_id(const struct ata_device *dev) |
1da177e4 LT |
1016 | { |
1017 | DPRINTK("49==0x%04x " | |
1018 | "53==0x%04x " | |
1019 | "63==0x%04x " | |
1020 | "64==0x%04x " | |
1021 | "75==0x%04x \n", | |
1022 | dev->id[49], | |
1023 | dev->id[53], | |
1024 | dev->id[63], | |
1025 | dev->id[64], | |
1026 | dev->id[75]); | |
1027 | DPRINTK("80==0x%04x " | |
1028 | "81==0x%04x " | |
1029 | "82==0x%04x " | |
1030 | "83==0x%04x " | |
1031 | "84==0x%04x \n", | |
1032 | dev->id[80], | |
1033 | dev->id[81], | |
1034 | dev->id[82], | |
1035 | dev->id[83], | |
1036 | dev->id[84]); | |
1037 | DPRINTK("88==0x%04x " | |
1038 | "93==0x%04x\n", | |
1039 | dev->id[88], | |
1040 | dev->id[93]); | |
1041 | } | |
1042 | ||
11e29e21 AC |
1043 | /* |
1044 | * Compute the PIO modes available for this device. This is not as | |
1045 | * trivial as it seems if we must consider early devices correctly. | |
1046 | * | |
1047 | * FIXME: pre IDE drive timing (do we care ?). | |
1048 | */ | |
1049 | ||
057ace5e | 1050 | static unsigned int ata_pio_modes(const struct ata_device *adev) |
11e29e21 AC |
1051 | { |
1052 | u16 modes; | |
1053 | ||
1054 | /* Usual case. Word 53 indicates word 88 is valid */ | |
1055 | if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) { | |
1056 | modes = adev->id[ATA_ID_PIO_MODES] & 0x03; | |
1057 | modes <<= 3; | |
1058 | modes |= 0x7; | |
1059 | return modes; | |
1060 | } | |
1061 | ||
1062 | /* If word 88 isn't valid then Word 51 holds the PIO timing number | |
1063 | for the maximum. Turn it into a mask and return it */ | |
1064 | modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ; | |
1065 | return modes; | |
1066 | } | |
1067 | ||
a2a7a662 TH |
1068 | struct ata_exec_internal_arg { |
1069 | unsigned int err_mask; | |
1070 | struct ata_taskfile *tf; | |
1071 | struct completion *waiting; | |
1072 | }; | |
1073 | ||
1074 | int ata_qc_complete_internal(struct ata_queued_cmd *qc) | |
1075 | { | |
1076 | struct ata_exec_internal_arg *arg = qc->private_data; | |
1077 | struct completion *waiting = arg->waiting; | |
1078 | ||
1079 | if (!(qc->err_mask & ~AC_ERR_DEV)) | |
1080 | qc->ap->ops->tf_read(qc->ap, arg->tf); | |
1081 | arg->err_mask = qc->err_mask; | |
1082 | arg->waiting = NULL; | |
1083 | complete(waiting); | |
1084 | ||
1085 | return 0; | |
1086 | } | |
1087 | ||
1088 | /** | |
1089 | * ata_exec_internal - execute libata internal command | |
1090 | * @ap: Port to which the command is sent | |
1091 | * @dev: Device to which the command is sent | |
1092 | * @tf: Taskfile registers for the command and the result | |
1093 | * @dma_dir: Data tranfer direction of the command | |
1094 | * @buf: Data buffer of the command | |
1095 | * @buflen: Length of data buffer | |
1096 | * | |
1097 | * Executes libata internal command with timeout. @tf contains | |
1098 | * command on entry and result on return. Timeout and error | |
1099 | * conditions are reported via return value. No recovery action | |
1100 | * is taken after a command times out. It's caller's duty to | |
1101 | * clean up after timeout. | |
1102 | * | |
1103 | * LOCKING: | |
1104 | * None. Should be called with kernel context, might sleep. | |
1105 | */ | |
1106 | ||
1107 | static unsigned | |
1108 | ata_exec_internal(struct ata_port *ap, struct ata_device *dev, | |
1109 | struct ata_taskfile *tf, | |
1110 | int dma_dir, void *buf, unsigned int buflen) | |
1111 | { | |
1112 | u8 command = tf->command; | |
1113 | struct ata_queued_cmd *qc; | |
1114 | DECLARE_COMPLETION(wait); | |
1115 | unsigned long flags; | |
1116 | struct ata_exec_internal_arg arg; | |
1117 | ||
1118 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1119 | ||
1120 | qc = ata_qc_new_init(ap, dev); | |
1121 | BUG_ON(qc == NULL); | |
1122 | ||
1123 | qc->tf = *tf; | |
1124 | qc->dma_dir = dma_dir; | |
1125 | if (dma_dir != DMA_NONE) { | |
1126 | ata_sg_init_one(qc, buf, buflen); | |
1127 | qc->nsect = buflen / ATA_SECT_SIZE; | |
1128 | } | |
1129 | ||
1130 | arg.waiting = &wait; | |
1131 | arg.tf = tf; | |
1132 | qc->private_data = &arg; | |
1133 | qc->complete_fn = ata_qc_complete_internal; | |
1134 | ||
1135 | if (ata_qc_issue(qc)) | |
1136 | goto issue_fail; | |
1137 | ||
1138 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1139 | ||
1140 | if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) { | |
1141 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
1142 | ||
1143 | /* We're racing with irq here. If we lose, the | |
1144 | * following test prevents us from completing the qc | |
1145 | * again. If completion irq occurs after here but | |
1146 | * before the caller cleans up, it will result in a | |
1147 | * spurious interrupt. We can live with that. | |
1148 | */ | |
1149 | if (arg.waiting) { | |
1150 | qc->err_mask = AC_ERR_OTHER; | |
1151 | ata_qc_complete(qc); | |
1152 | printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n", | |
1153 | ap->id, command); | |
1154 | } | |
1155 | ||
1156 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1157 | } | |
1158 | ||
1159 | return arg.err_mask; | |
1160 | ||
1161 | issue_fail: | |
1162 | ata_qc_free(qc); | |
1163 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
1164 | return AC_ERR_OTHER; | |
1165 | } | |
1166 | ||
1da177e4 LT |
1167 | /** |
1168 | * ata_dev_identify - obtain IDENTIFY x DEVICE page | |
1169 | * @ap: port on which device we wish to probe resides | |
1170 | * @device: device bus address, starting at zero | |
1171 | * | |
1172 | * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE | |
1173 | * command, and read back the 512-byte device information page. | |
1174 | * The device information page is fed to us via the standard | |
1175 | * PIO-IN protocol, but we hand-code it here. (TODO: investigate | |
1176 | * using standard PIO-IN paths) | |
1177 | * | |
1178 | * After reading the device information page, we use several | |
1179 | * bits of information from it to initialize data structures | |
1180 | * that will be used during the lifetime of the ata_device. | |
1181 | * Other data from the info page is used to disqualify certain | |
1182 | * older ATA devices we do not wish to support. | |
1183 | * | |
1184 | * LOCKING: | |
1185 | * Inherited from caller. Some functions called by this function | |
1186 | * obtain the host_set lock. | |
1187 | */ | |
1188 | ||
1189 | static void ata_dev_identify(struct ata_port *ap, unsigned int device) | |
1190 | { | |
1191 | struct ata_device *dev = &ap->device[device]; | |
8bf62ece | 1192 | unsigned int major_version; |
1da177e4 LT |
1193 | u16 tmp; |
1194 | unsigned long xfer_modes; | |
1da177e4 | 1195 | unsigned int using_edd; |
a0123703 TH |
1196 | struct ata_taskfile tf; |
1197 | unsigned int err_mask; | |
1da177e4 LT |
1198 | int rc; |
1199 | ||
1200 | if (!ata_dev_present(dev)) { | |
1201 | DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n", | |
1202 | ap->id, device); | |
1203 | return; | |
1204 | } | |
1205 | ||
1206 | if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET)) | |
1207 | using_edd = 0; | |
1208 | else | |
1209 | using_edd = 1; | |
1210 | ||
1211 | DPRINTK("ENTER, host %u, dev %u\n", ap->id, device); | |
1212 | ||
1213 | assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI || | |
1214 | dev->class == ATA_DEV_NONE); | |
1215 | ||
1216 | ata_dev_select(ap, device, 1, 1); /* select device 0/1 */ | |
1217 | ||
1da177e4 | 1218 | retry: |
a0123703 TH |
1219 | ata_tf_init(ap, &tf, device); |
1220 | ||
1da177e4 | 1221 | if (dev->class == ATA_DEV_ATA) { |
a0123703 | 1222 | tf.command = ATA_CMD_ID_ATA; |
1da177e4 LT |
1223 | DPRINTK("do ATA identify\n"); |
1224 | } else { | |
a0123703 | 1225 | tf.command = ATA_CMD_ID_ATAPI; |
1da177e4 LT |
1226 | DPRINTK("do ATAPI identify\n"); |
1227 | } | |
1228 | ||
a0123703 | 1229 | tf.protocol = ATA_PROT_PIO; |
1da177e4 | 1230 | |
a0123703 TH |
1231 | err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE, |
1232 | dev->id, sizeof(dev->id)); | |
1da177e4 | 1233 | |
a0123703 TH |
1234 | if (err_mask) { |
1235 | if (err_mask & ~AC_ERR_DEV) | |
1236 | goto err_out; | |
0169e284 | 1237 | |
1da177e4 LT |
1238 | /* |
1239 | * arg! EDD works for all test cases, but seems to return | |
1240 | * the ATA signature for some ATAPI devices. Until the | |
1241 | * reason for this is found and fixed, we fix up the mess | |
1242 | * here. If IDENTIFY DEVICE returns command aborted | |
1243 | * (as ATAPI devices do), then we issue an | |
1244 | * IDENTIFY PACKET DEVICE. | |
1245 | * | |
1246 | * ATA software reset (SRST, the default) does not appear | |
1247 | * to have this problem. | |
1248 | */ | |
7c398335 | 1249 | if ((using_edd) && (dev->class == ATA_DEV_ATA)) { |
a0123703 | 1250 | u8 err = tf.feature; |
1da177e4 LT |
1251 | if (err & ATA_ABORTED) { |
1252 | dev->class = ATA_DEV_ATAPI; | |
1da177e4 LT |
1253 | goto retry; |
1254 | } | |
1255 | } | |
1256 | goto err_out; | |
1257 | } | |
1258 | ||
1259 | swap_buf_le16(dev->id, ATA_ID_WORDS); | |
1260 | ||
1261 | /* print device capabilities */ | |
1262 | printk(KERN_DEBUG "ata%u: dev %u cfg " | |
1263 | "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1264 | ap->id, device, dev->id[49], | |
1265 | dev->id[82], dev->id[83], dev->id[84], | |
1266 | dev->id[85], dev->id[86], dev->id[87], | |
1267 | dev->id[88]); | |
1268 | ||
1269 | /* | |
1270 | * common ATA, ATAPI feature tests | |
1271 | */ | |
1272 | ||
8bf62ece AL |
1273 | /* we require DMA support (bits 8 of word 49) */ |
1274 | if (!ata_id_has_dma(dev->id)) { | |
1275 | printk(KERN_DEBUG "ata%u: no dma\n", ap->id); | |
1da177e4 LT |
1276 | goto err_out_nosup; |
1277 | } | |
1278 | ||
1279 | /* quick-n-dirty find max transfer mode; for printk only */ | |
1280 | xfer_modes = dev->id[ATA_ID_UDMA_MODES]; | |
1281 | if (!xfer_modes) | |
1282 | xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA; | |
11e29e21 AC |
1283 | if (!xfer_modes) |
1284 | xfer_modes = ata_pio_modes(dev); | |
1da177e4 LT |
1285 | |
1286 | ata_dump_id(dev); | |
1287 | ||
1288 | /* ATA-specific feature tests */ | |
1289 | if (dev->class == ATA_DEV_ATA) { | |
1290 | if (!ata_id_is_ata(dev->id)) /* sanity check */ | |
1291 | goto err_out_nosup; | |
1292 | ||
8bf62ece | 1293 | /* get major version */ |
1da177e4 | 1294 | tmp = dev->id[ATA_ID_MAJOR_VER]; |
8bf62ece AL |
1295 | for (major_version = 14; major_version >= 1; major_version--) |
1296 | if (tmp & (1 << major_version)) | |
1da177e4 LT |
1297 | break; |
1298 | ||
8bf62ece AL |
1299 | /* |
1300 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1301 | * SRST RESET | |
1302 | * IDENTIFY | |
1303 | * INITIALIZE DEVICE PARAMETERS | |
1304 | * anything else.. | |
1305 | * Some drives were very specific about that exact sequence. | |
1306 | */ | |
59a10b17 | 1307 | if (major_version < 4 || (!ata_id_has_lba(dev->id))) { |
8bf62ece AL |
1308 | ata_dev_init_params(ap, dev); |
1309 | ||
59a10b17 AL |
1310 | /* current CHS translation info (id[53-58]) might be |
1311 | * changed. reread the identify device info. | |
1312 | */ | |
1313 | ata_dev_reread_id(ap, dev); | |
1314 | } | |
1315 | ||
8bf62ece AL |
1316 | if (ata_id_has_lba(dev->id)) { |
1317 | dev->flags |= ATA_DFLAG_LBA; | |
1318 | ||
1319 | if (ata_id_has_lba48(dev->id)) { | |
1320 | dev->flags |= ATA_DFLAG_LBA48; | |
1321 | dev->n_sectors = ata_id_u64(dev->id, 100); | |
1322 | } else { | |
1323 | dev->n_sectors = ata_id_u32(dev->id, 60); | |
1324 | } | |
1325 | ||
1326 | /* print device info to dmesg */ | |
1327 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n", | |
1328 | ap->id, device, | |
1329 | major_version, | |
1330 | ata_mode_string(xfer_modes), | |
1331 | (unsigned long long)dev->n_sectors, | |
1332 | dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA"); | |
1333 | } else { | |
1334 | /* CHS */ | |
1335 | ||
1336 | /* Default translation */ | |
1337 | dev->cylinders = dev->id[1]; | |
1338 | dev->heads = dev->id[3]; | |
1339 | dev->sectors = dev->id[6]; | |
1340 | dev->n_sectors = dev->cylinders * dev->heads * dev->sectors; | |
1341 | ||
1342 | if (ata_id_current_chs_valid(dev->id)) { | |
1343 | /* Current CHS translation is valid. */ | |
1344 | dev->cylinders = dev->id[54]; | |
1345 | dev->heads = dev->id[55]; | |
1346 | dev->sectors = dev->id[56]; | |
1347 | ||
1348 | dev->n_sectors = ata_id_u32(dev->id, 57); | |
1349 | } | |
1350 | ||
1351 | /* print device info to dmesg */ | |
1352 | printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n", | |
1353 | ap->id, device, | |
1354 | major_version, | |
1355 | ata_mode_string(xfer_modes), | |
1356 | (unsigned long long)dev->n_sectors, | |
1357 | (int)dev->cylinders, (int)dev->heads, (int)dev->sectors); | |
1da177e4 | 1358 | |
1da177e4 LT |
1359 | } |
1360 | ||
1361 | ap->host->max_cmd_len = 16; | |
1da177e4 LT |
1362 | } |
1363 | ||
1364 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 1365 | else if (dev->class == ATA_DEV_ATAPI) { |
1da177e4 LT |
1366 | if (ata_id_is_ata(dev->id)) /* sanity check */ |
1367 | goto err_out_nosup; | |
1368 | ||
1369 | rc = atapi_cdb_len(dev->id); | |
1370 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1371 | printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id); | |
1372 | goto err_out_nosup; | |
1373 | } | |
1374 | ap->cdb_len = (unsigned int) rc; | |
1375 | ap->host->max_cmd_len = (unsigned char) ap->cdb_len; | |
1376 | ||
1377 | /* print device info to dmesg */ | |
1378 | printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n", | |
1379 | ap->id, device, | |
1380 | ata_mode_string(xfer_modes)); | |
1381 | } | |
1382 | ||
1383 | DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap)); | |
1384 | return; | |
1385 | ||
1386 | err_out_nosup: | |
1387 | printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n", | |
1388 | ap->id, device); | |
1389 | err_out: | |
1390 | dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */ | |
1391 | DPRINTK("EXIT, err\n"); | |
1392 | } | |
1393 | ||
6f2f3812 | 1394 | |
057ace5e | 1395 | static inline u8 ata_dev_knobble(const struct ata_port *ap) |
6f2f3812 BC |
1396 | { |
1397 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id))); | |
1398 | } | |
1399 | ||
1400 | /** | |
1401 | * ata_dev_config - Run device specific handlers and check for | |
1402 | * SATA->PATA bridges | |
8a60a071 | 1403 | * @ap: Bus |
6f2f3812 BC |
1404 | * @i: Device |
1405 | * | |
1406 | * LOCKING: | |
1407 | */ | |
8a60a071 | 1408 | |
6f2f3812 BC |
1409 | void ata_dev_config(struct ata_port *ap, unsigned int i) |
1410 | { | |
1411 | /* limit bridge transfers to udma5, 200 sectors */ | |
1412 | if (ata_dev_knobble(ap)) { | |
1413 | printk(KERN_INFO "ata%u(%u): applying bridge limits\n", | |
1414 | ap->id, ap->device->devno); | |
1415 | ap->udma_mask &= ATA_UDMA5; | |
1416 | ap->host->max_sectors = ATA_MAX_SECTORS; | |
1417 | ap->host->hostt->max_sectors = ATA_MAX_SECTORS; | |
1418 | ap->device->flags |= ATA_DFLAG_LOCK_SECTORS; | |
1419 | } | |
1420 | ||
1421 | if (ap->ops->dev_config) | |
1422 | ap->ops->dev_config(ap, &ap->device[i]); | |
1423 | } | |
1424 | ||
1da177e4 LT |
1425 | /** |
1426 | * ata_bus_probe - Reset and probe ATA bus | |
1427 | * @ap: Bus to probe | |
1428 | * | |
0cba632b JG |
1429 | * Master ATA bus probing function. Initiates a hardware-dependent |
1430 | * bus reset, then attempts to identify any devices found on | |
1431 | * the bus. | |
1432 | * | |
1da177e4 | 1433 | * LOCKING: |
0cba632b | 1434 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1435 | * |
1436 | * RETURNS: | |
1437 | * Zero on success, non-zero on error. | |
1438 | */ | |
1439 | ||
1440 | static int ata_bus_probe(struct ata_port *ap) | |
1441 | { | |
1442 | unsigned int i, found = 0; | |
1443 | ||
1444 | ap->ops->phy_reset(ap); | |
1445 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1446 | goto err_out; | |
1447 | ||
1448 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1449 | ata_dev_identify(ap, i); | |
1450 | if (ata_dev_present(&ap->device[i])) { | |
1451 | found = 1; | |
6f2f3812 | 1452 | ata_dev_config(ap,i); |
1da177e4 LT |
1453 | } |
1454 | } | |
1455 | ||
1456 | if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1457 | goto err_out_disable; | |
1458 | ||
1459 | ata_set_mode(ap); | |
1460 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1461 | goto err_out_disable; | |
1462 | ||
1463 | return 0; | |
1464 | ||
1465 | err_out_disable: | |
1466 | ap->ops->port_disable(ap); | |
1467 | err_out: | |
1468 | return -1; | |
1469 | } | |
1470 | ||
1471 | /** | |
0cba632b JG |
1472 | * ata_port_probe - Mark port as enabled |
1473 | * @ap: Port for which we indicate enablement | |
1da177e4 | 1474 | * |
0cba632b JG |
1475 | * Modify @ap data structure such that the system |
1476 | * thinks that the entire port is enabled. | |
1477 | * | |
1478 | * LOCKING: host_set lock, or some other form of | |
1479 | * serialization. | |
1da177e4 LT |
1480 | */ |
1481 | ||
1482 | void ata_port_probe(struct ata_port *ap) | |
1483 | { | |
1484 | ap->flags &= ~ATA_FLAG_PORT_DISABLED; | |
1485 | } | |
1486 | ||
1487 | /** | |
780a87f7 JG |
1488 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
1489 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1490 | * |
780a87f7 JG |
1491 | * This function issues commands to standard SATA Sxxx |
1492 | * PHY registers, to wake up the phy (and device), and | |
1493 | * clear any reset condition. | |
1da177e4 LT |
1494 | * |
1495 | * LOCKING: | |
0cba632b | 1496 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1497 | * |
1498 | */ | |
1499 | void __sata_phy_reset(struct ata_port *ap) | |
1500 | { | |
1501 | u32 sstatus; | |
1502 | unsigned long timeout = jiffies + (HZ * 5); | |
1503 | ||
1504 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e BR |
1505 | /* issue phy wake/reset */ |
1506 | scr_write_flush(ap, SCR_CONTROL, 0x301); | |
62ba2841 TH |
1507 | /* Couldn't find anything in SATA I/II specs, but |
1508 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
1509 | mdelay(1); | |
1da177e4 | 1510 | } |
cdcca89e | 1511 | scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */ |
1da177e4 LT |
1512 | |
1513 | /* wait for phy to become ready, if necessary */ | |
1514 | do { | |
1515 | msleep(200); | |
1516 | sstatus = scr_read(ap, SCR_STATUS); | |
1517 | if ((sstatus & 0xf) != 1) | |
1518 | break; | |
1519 | } while (time_before(jiffies, timeout)); | |
1520 | ||
1521 | /* TODO: phy layer with polling, timeouts, etc. */ | |
656563e3 JG |
1522 | sstatus = scr_read(ap, SCR_STATUS); |
1523 | if (sata_dev_present(ap)) { | |
1524 | const char *speed; | |
1525 | u32 tmp; | |
1526 | ||
1527 | tmp = (sstatus >> 4) & 0xf; | |
1528 | if (tmp & (1 << 0)) | |
1529 | speed = "1.5"; | |
1530 | else if (tmp & (1 << 1)) | |
1531 | speed = "3.0"; | |
1532 | else | |
1533 | speed = "<unknown>"; | |
1534 | printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n", | |
1535 | ap->id, speed, sstatus); | |
1da177e4 | 1536 | ata_port_probe(ap); |
656563e3 JG |
1537 | } else { |
1538 | printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n", | |
1da177e4 LT |
1539 | ap->id, sstatus); |
1540 | ata_port_disable(ap); | |
1541 | } | |
1542 | ||
1543 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1544 | return; | |
1545 | ||
1546 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
1547 | ata_port_disable(ap); | |
1548 | return; | |
1549 | } | |
1550 | ||
1551 | ap->cbl = ATA_CBL_SATA; | |
1552 | } | |
1553 | ||
1554 | /** | |
780a87f7 JG |
1555 | * sata_phy_reset - Reset SATA bus. |
1556 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 1557 | * |
780a87f7 JG |
1558 | * This function resets the SATA bus, and then probes |
1559 | * the bus for devices. | |
1da177e4 LT |
1560 | * |
1561 | * LOCKING: | |
0cba632b | 1562 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1563 | * |
1564 | */ | |
1565 | void sata_phy_reset(struct ata_port *ap) | |
1566 | { | |
1567 | __sata_phy_reset(ap); | |
1568 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1569 | return; | |
1570 | ata_bus_reset(ap); | |
1571 | } | |
1572 | ||
1573 | /** | |
780a87f7 JG |
1574 | * ata_port_disable - Disable port. |
1575 | * @ap: Port to be disabled. | |
1da177e4 | 1576 | * |
780a87f7 JG |
1577 | * Modify @ap data structure such that the system |
1578 | * thinks that the entire port is disabled, and should | |
1579 | * never attempt to probe or communicate with devices | |
1580 | * on this port. | |
1581 | * | |
1582 | * LOCKING: host_set lock, or some other form of | |
1583 | * serialization. | |
1da177e4 LT |
1584 | */ |
1585 | ||
1586 | void ata_port_disable(struct ata_port *ap) | |
1587 | { | |
1588 | ap->device[0].class = ATA_DEV_NONE; | |
1589 | ap->device[1].class = ATA_DEV_NONE; | |
1590 | ap->flags |= ATA_FLAG_PORT_DISABLED; | |
1591 | } | |
1592 | ||
452503f9 AC |
1593 | /* |
1594 | * This mode timing computation functionality is ported over from | |
1595 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
1596 | */ | |
1597 | /* | |
1598 | * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | |
1599 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | |
1600 | * for PIO 5, which is a nonstandard extension and UDMA6, which | |
1601 | * is currently supported only by Maxtor drives. | |
1602 | */ | |
1603 | ||
1604 | static const struct ata_timing ata_timing[] = { | |
1605 | ||
1606 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
1607 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
1608 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
1609 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
1610 | ||
1611 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, | |
1612 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
1613 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
1614 | ||
1615 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
1616 | ||
1617 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, | |
1618 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
1619 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
1620 | ||
1621 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, | |
1622 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
1623 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
1624 | ||
1625 | /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */ | |
1626 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, | |
1627 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
1628 | ||
1629 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
1630 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
1631 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
1632 | ||
1633 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
1634 | ||
1635 | { 0xFF } | |
1636 | }; | |
1637 | ||
1638 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
1639 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
1640 | ||
1641 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
1642 | { | |
1643 | q->setup = EZ(t->setup * 1000, T); | |
1644 | q->act8b = EZ(t->act8b * 1000, T); | |
1645 | q->rec8b = EZ(t->rec8b * 1000, T); | |
1646 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
1647 | q->active = EZ(t->active * 1000, T); | |
1648 | q->recover = EZ(t->recover * 1000, T); | |
1649 | q->cycle = EZ(t->cycle * 1000, T); | |
1650 | q->udma = EZ(t->udma * 1000, UT); | |
1651 | } | |
1652 | ||
1653 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
1654 | struct ata_timing *m, unsigned int what) | |
1655 | { | |
1656 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
1657 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
1658 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
1659 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
1660 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
1661 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
1662 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
1663 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
1664 | } | |
1665 | ||
1666 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
1667 | { | |
1668 | const struct ata_timing *t; | |
1669 | ||
1670 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 1671 | if (t->mode == 0xFF) |
452503f9 AC |
1672 | return NULL; |
1673 | return t; | |
1674 | } | |
1675 | ||
1676 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
1677 | struct ata_timing *t, int T, int UT) | |
1678 | { | |
1679 | const struct ata_timing *s; | |
1680 | struct ata_timing p; | |
1681 | ||
1682 | /* | |
1683 | * Find the mode. | |
75b1f2f8 | 1684 | */ |
452503f9 AC |
1685 | |
1686 | if (!(s = ata_timing_find_mode(speed))) | |
1687 | return -EINVAL; | |
1688 | ||
75b1f2f8 AL |
1689 | memcpy(t, s, sizeof(*s)); |
1690 | ||
452503f9 AC |
1691 | /* |
1692 | * If the drive is an EIDE drive, it can tell us it needs extended | |
1693 | * PIO/MW_DMA cycle timing. | |
1694 | */ | |
1695 | ||
1696 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
1697 | memset(&p, 0, sizeof(p)); | |
1698 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
1699 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
1700 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
1701 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
1702 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
1703 | } | |
1704 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
1705 | } | |
1706 | ||
1707 | /* | |
1708 | * Convert the timing to bus clock counts. | |
1709 | */ | |
1710 | ||
75b1f2f8 | 1711 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
1712 | |
1713 | /* | |
1714 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T | |
1715 | * and some other commands. We have to ensure that the DMA cycle timing is | |
1716 | * slower/equal than the fastest PIO timing. | |
1717 | */ | |
1718 | ||
1719 | if (speed > XFER_PIO_4) { | |
1720 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
1721 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
1722 | } | |
1723 | ||
1724 | /* | |
1725 | * Lenghten active & recovery time so that cycle time is correct. | |
1726 | */ | |
1727 | ||
1728 | if (t->act8b + t->rec8b < t->cyc8b) { | |
1729 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
1730 | t->rec8b = t->cyc8b - t->act8b; | |
1731 | } | |
1732 | ||
1733 | if (t->active + t->recover < t->cycle) { | |
1734 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
1735 | t->recover = t->cycle - t->active; | |
1736 | } | |
1737 | ||
1738 | return 0; | |
1739 | } | |
1740 | ||
057ace5e | 1741 | static const struct { |
1da177e4 LT |
1742 | unsigned int shift; |
1743 | u8 base; | |
1744 | } xfer_mode_classes[] = { | |
1745 | { ATA_SHIFT_UDMA, XFER_UDMA_0 }, | |
1746 | { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 }, | |
1747 | { ATA_SHIFT_PIO, XFER_PIO_0 }, | |
1748 | }; | |
1749 | ||
858119e1 | 1750 | static u8 base_from_shift(unsigned int shift) |
1da177e4 LT |
1751 | { |
1752 | int i; | |
1753 | ||
1754 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) | |
1755 | if (xfer_mode_classes[i].shift == shift) | |
1756 | return xfer_mode_classes[i].base; | |
1757 | ||
1758 | return 0xff; | |
1759 | } | |
1760 | ||
1761 | static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev) | |
1762 | { | |
1763 | int ofs, idx; | |
1764 | u8 base; | |
1765 | ||
1766 | if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED)) | |
1767 | return; | |
1768 | ||
1769 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
1770 | dev->flags |= ATA_DFLAG_PIO; | |
1771 | ||
1772 | ata_dev_set_xfermode(ap, dev); | |
1773 | ||
1774 | base = base_from_shift(dev->xfer_shift); | |
1775 | ofs = dev->xfer_mode - base; | |
1776 | idx = ofs + dev->xfer_shift; | |
1777 | WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str)); | |
1778 | ||
1779 | DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n", | |
1780 | idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs); | |
1781 | ||
1782 | printk(KERN_INFO "ata%u: dev %u configured for %s\n", | |
1783 | ap->id, dev->devno, xfer_mode_str[idx]); | |
1784 | } | |
1785 | ||
1786 | static int ata_host_set_pio(struct ata_port *ap) | |
1787 | { | |
1788 | unsigned int mask; | |
1789 | int x, i; | |
1790 | u8 base, xfer_mode; | |
1791 | ||
1792 | mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO); | |
1793 | x = fgb(mask); | |
1794 | if (x < 0) { | |
1795 | printk(KERN_WARNING "ata%u: no PIO support\n", ap->id); | |
1796 | return -1; | |
1797 | } | |
1798 | ||
1799 | base = base_from_shift(ATA_SHIFT_PIO); | |
1800 | xfer_mode = base + x; | |
1801 | ||
1802 | DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n", | |
1803 | (int)base, (int)xfer_mode, mask, x); | |
1804 | ||
1805 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1806 | struct ata_device *dev = &ap->device[i]; | |
1807 | if (ata_dev_present(dev)) { | |
1808 | dev->pio_mode = xfer_mode; | |
1809 | dev->xfer_mode = xfer_mode; | |
1810 | dev->xfer_shift = ATA_SHIFT_PIO; | |
1811 | if (ap->ops->set_piomode) | |
1812 | ap->ops->set_piomode(ap, dev); | |
1813 | } | |
1814 | } | |
1815 | ||
1816 | return 0; | |
1817 | } | |
1818 | ||
1819 | static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode, | |
1820 | unsigned int xfer_shift) | |
1821 | { | |
1822 | int i; | |
1823 | ||
1824 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1825 | struct ata_device *dev = &ap->device[i]; | |
1826 | if (ata_dev_present(dev)) { | |
1827 | dev->dma_mode = xfer_mode; | |
1828 | dev->xfer_mode = xfer_mode; | |
1829 | dev->xfer_shift = xfer_shift; | |
1830 | if (ap->ops->set_dmamode) | |
1831 | ap->ops->set_dmamode(ap, dev); | |
1832 | } | |
1833 | } | |
1834 | } | |
1835 | ||
1836 | /** | |
1837 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
1838 | * @ap: port on which timings will be programmed | |
1839 | * | |
780a87f7 JG |
1840 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). |
1841 | * | |
1da177e4 | 1842 | * LOCKING: |
0cba632b | 1843 | * PCI/etc. bus probe sem. |
1da177e4 LT |
1844 | * |
1845 | */ | |
1846 | static void ata_set_mode(struct ata_port *ap) | |
1847 | { | |
8cbd6df1 | 1848 | unsigned int xfer_shift; |
1da177e4 LT |
1849 | u8 xfer_mode; |
1850 | int rc; | |
1851 | ||
1852 | /* step 1: always set host PIO timings */ | |
1853 | rc = ata_host_set_pio(ap); | |
1854 | if (rc) | |
1855 | goto err_out; | |
1856 | ||
1857 | /* step 2: choose the best data xfer mode */ | |
1858 | xfer_mode = xfer_shift = 0; | |
1859 | rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift); | |
1860 | if (rc) | |
1861 | goto err_out; | |
1862 | ||
1863 | /* step 3: if that xfer mode isn't PIO, set host DMA timings */ | |
1864 | if (xfer_shift != ATA_SHIFT_PIO) | |
1865 | ata_host_set_dma(ap, xfer_mode, xfer_shift); | |
1866 | ||
1867 | /* step 4: update devices' xfer mode */ | |
1868 | ata_dev_set_mode(ap, &ap->device[0]); | |
1869 | ata_dev_set_mode(ap, &ap->device[1]); | |
1870 | ||
1871 | if (ap->flags & ATA_FLAG_PORT_DISABLED) | |
1872 | return; | |
1873 | ||
1874 | if (ap->ops->post_set_mode) | |
1875 | ap->ops->post_set_mode(ap); | |
1876 | ||
1da177e4 LT |
1877 | return; |
1878 | ||
1879 | err_out: | |
1880 | ata_port_disable(ap); | |
1881 | } | |
1882 | ||
1883 | /** | |
1884 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
1885 | * @ap: port containing status register to be polled | |
1886 | * @tmout_pat: impatience timeout | |
1887 | * @tmout: overall timeout | |
1888 | * | |
780a87f7 JG |
1889 | * Sleep until ATA Status register bit BSY clears, |
1890 | * or a timeout occurs. | |
1891 | * | |
1892 | * LOCKING: None. | |
1da177e4 LT |
1893 | * |
1894 | */ | |
1895 | ||
1896 | static unsigned int ata_busy_sleep (struct ata_port *ap, | |
1897 | unsigned long tmout_pat, | |
1898 | unsigned long tmout) | |
1899 | { | |
1900 | unsigned long timer_start, timeout; | |
1901 | u8 status; | |
1902 | ||
1903 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
1904 | timer_start = jiffies; | |
1905 | timeout = timer_start + tmout_pat; | |
1906 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1907 | msleep(50); | |
1908 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
1909 | } | |
1910 | ||
1911 | if (status & ATA_BUSY) | |
1912 | printk(KERN_WARNING "ata%u is slow to respond, " | |
1913 | "please be patient\n", ap->id); | |
1914 | ||
1915 | timeout = timer_start + tmout; | |
1916 | while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) { | |
1917 | msleep(50); | |
1918 | status = ata_chk_status(ap); | |
1919 | } | |
1920 | ||
1921 | if (status & ATA_BUSY) { | |
1922 | printk(KERN_ERR "ata%u failed to respond (%lu secs)\n", | |
1923 | ap->id, tmout / HZ); | |
1924 | return 1; | |
1925 | } | |
1926 | ||
1927 | return 0; | |
1928 | } | |
1929 | ||
1930 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
1931 | { | |
1932 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
1933 | unsigned int dev0 = devmask & (1 << 0); | |
1934 | unsigned int dev1 = devmask & (1 << 1); | |
1935 | unsigned long timeout; | |
1936 | ||
1937 | /* if device 0 was found in ata_devchk, wait for its | |
1938 | * BSY bit to clear | |
1939 | */ | |
1940 | if (dev0) | |
1941 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1942 | ||
1943 | /* if device 1 was found in ata_devchk, wait for | |
1944 | * register access, then wait for BSY to clear | |
1945 | */ | |
1946 | timeout = jiffies + ATA_TMOUT_BOOT; | |
1947 | while (dev1) { | |
1948 | u8 nsect, lbal; | |
1949 | ||
1950 | ap->ops->dev_select(ap, 1); | |
1951 | if (ap->flags & ATA_FLAG_MMIO) { | |
1952 | nsect = readb((void __iomem *) ioaddr->nsect_addr); | |
1953 | lbal = readb((void __iomem *) ioaddr->lbal_addr); | |
1954 | } else { | |
1955 | nsect = inb(ioaddr->nsect_addr); | |
1956 | lbal = inb(ioaddr->lbal_addr); | |
1957 | } | |
1958 | if ((nsect == 1) && (lbal == 1)) | |
1959 | break; | |
1960 | if (time_after(jiffies, timeout)) { | |
1961 | dev1 = 0; | |
1962 | break; | |
1963 | } | |
1964 | msleep(50); /* give drive a breather */ | |
1965 | } | |
1966 | if (dev1) | |
1967 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
1968 | ||
1969 | /* is all this really necessary? */ | |
1970 | ap->ops->dev_select(ap, 0); | |
1971 | if (dev1) | |
1972 | ap->ops->dev_select(ap, 1); | |
1973 | if (dev0) | |
1974 | ap->ops->dev_select(ap, 0); | |
1975 | } | |
1976 | ||
1977 | /** | |
0cba632b JG |
1978 | * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command. |
1979 | * @ap: Port to reset and probe | |
1980 | * | |
1981 | * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and | |
1982 | * probe the bus. Not often used these days. | |
1da177e4 LT |
1983 | * |
1984 | * LOCKING: | |
0cba632b | 1985 | * PCI/etc. bus probe sem. |
e5338254 | 1986 | * Obtains host_set lock. |
1da177e4 LT |
1987 | * |
1988 | */ | |
1989 | ||
1990 | static unsigned int ata_bus_edd(struct ata_port *ap) | |
1991 | { | |
1992 | struct ata_taskfile tf; | |
e5338254 | 1993 | unsigned long flags; |
1da177e4 LT |
1994 | |
1995 | /* set up execute-device-diag (bus reset) taskfile */ | |
1996 | /* also, take interrupts to a known state (disabled) */ | |
1997 | DPRINTK("execute-device-diag\n"); | |
1998 | ata_tf_init(ap, &tf, 0); | |
1999 | tf.ctl |= ATA_NIEN; | |
2000 | tf.command = ATA_CMD_EDD; | |
2001 | tf.protocol = ATA_PROT_NODATA; | |
2002 | ||
2003 | /* do bus reset */ | |
e5338254 | 2004 | spin_lock_irqsave(&ap->host_set->lock, flags); |
1da177e4 | 2005 | ata_tf_to_host(ap, &tf); |
e5338254 | 2006 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
1da177e4 LT |
2007 | |
2008 | /* spec says at least 2ms. but who knows with those | |
2009 | * crazy ATAPI devices... | |
2010 | */ | |
2011 | msleep(150); | |
2012 | ||
2013 | return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2014 | } | |
2015 | ||
2016 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
2017 | unsigned int devmask) | |
2018 | { | |
2019 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2020 | ||
2021 | DPRINTK("ata%u: bus reset via SRST\n", ap->id); | |
2022 | ||
2023 | /* software reset. causes dev0 to be selected */ | |
2024 | if (ap->flags & ATA_FLAG_MMIO) { | |
2025 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2026 | udelay(20); /* FIXME: flush */ | |
2027 | writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr); | |
2028 | udelay(20); /* FIXME: flush */ | |
2029 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2030 | } else { | |
2031 | outb(ap->ctl, ioaddr->ctl_addr); | |
2032 | udelay(10); | |
2033 | outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2034 | udelay(10); | |
2035 | outb(ap->ctl, ioaddr->ctl_addr); | |
2036 | } | |
2037 | ||
2038 | /* spec mandates ">= 2ms" before checking status. | |
2039 | * We wait 150ms, because that was the magic delay used for | |
2040 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2041 | * between when the ATA command register is written, and then | |
2042 | * status is checked. Because waiting for "a while" before | |
2043 | * checking status is fine, post SRST, we perform this magic | |
2044 | * delay here as well. | |
2045 | */ | |
2046 | msleep(150); | |
2047 | ||
2048 | ata_bus_post_reset(ap, devmask); | |
2049 | ||
2050 | return 0; | |
2051 | } | |
2052 | ||
2053 | /** | |
2054 | * ata_bus_reset - reset host port and associated ATA channel | |
2055 | * @ap: port to reset | |
2056 | * | |
2057 | * This is typically the first time we actually start issuing | |
2058 | * commands to the ATA channel. We wait for BSY to clear, then | |
2059 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2060 | * result. Determine what devices, if any, are on the channel | |
2061 | * by looking at the device 0/1 error register. Look at the signature | |
2062 | * stored in each device's taskfile registers, to determine if | |
2063 | * the device is ATA or ATAPI. | |
2064 | * | |
2065 | * LOCKING: | |
0cba632b JG |
2066 | * PCI/etc. bus probe sem. |
2067 | * Obtains host_set lock. | |
1da177e4 LT |
2068 | * |
2069 | * SIDE EFFECTS: | |
2070 | * Sets ATA_FLAG_PORT_DISABLED if bus reset fails. | |
2071 | */ | |
2072 | ||
2073 | void ata_bus_reset(struct ata_port *ap) | |
2074 | { | |
2075 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2076 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2077 | u8 err; | |
2078 | unsigned int dev0, dev1 = 0, rc = 0, devmask = 0; | |
2079 | ||
2080 | DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no); | |
2081 | ||
2082 | /* determine if device 0/1 are present */ | |
2083 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2084 | dev0 = 1; | |
2085 | else { | |
2086 | dev0 = ata_devchk(ap, 0); | |
2087 | if (slave_possible) | |
2088 | dev1 = ata_devchk(ap, 1); | |
2089 | } | |
2090 | ||
2091 | if (dev0) | |
2092 | devmask |= (1 << 0); | |
2093 | if (dev1) | |
2094 | devmask |= (1 << 1); | |
2095 | ||
2096 | /* select device 0 again */ | |
2097 | ap->ops->dev_select(ap, 0); | |
2098 | ||
2099 | /* issue bus reset */ | |
2100 | if (ap->flags & ATA_FLAG_SRST) | |
2101 | rc = ata_bus_softreset(ap, devmask); | |
2102 | else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) { | |
2103 | /* set up device control */ | |
2104 | if (ap->flags & ATA_FLAG_MMIO) | |
2105 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2106 | else | |
2107 | outb(ap->ctl, ioaddr->ctl_addr); | |
2108 | rc = ata_bus_edd(ap); | |
2109 | } | |
2110 | ||
2111 | if (rc) | |
2112 | goto err_out; | |
2113 | ||
2114 | /* | |
2115 | * determine by signature whether we have ATA or ATAPI devices | |
2116 | */ | |
2117 | err = ata_dev_try_classify(ap, 0); | |
2118 | if ((slave_possible) && (err != 0x81)) | |
2119 | ata_dev_try_classify(ap, 1); | |
2120 | ||
2121 | /* re-enable interrupts */ | |
2122 | if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */ | |
2123 | ata_irq_on(ap); | |
2124 | ||
2125 | /* is double-select really necessary? */ | |
2126 | if (ap->device[1].class != ATA_DEV_NONE) | |
2127 | ap->ops->dev_select(ap, 1); | |
2128 | if (ap->device[0].class != ATA_DEV_NONE) | |
2129 | ap->ops->dev_select(ap, 0); | |
2130 | ||
2131 | /* if no devices were detected, disable this port */ | |
2132 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2133 | (ap->device[1].class == ATA_DEV_NONE)) | |
2134 | goto err_out; | |
2135 | ||
2136 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2137 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2138 | if (ap->flags & ATA_FLAG_MMIO) | |
2139 | writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); | |
2140 | else | |
2141 | outb(ap->ctl, ioaddr->ctl_addr); | |
2142 | } | |
2143 | ||
2144 | DPRINTK("EXIT\n"); | |
2145 | return; | |
2146 | ||
2147 | err_out: | |
2148 | printk(KERN_ERR "ata%u: disabling port\n", ap->id); | |
2149 | ap->ops->port_disable(ap); | |
2150 | ||
2151 | DPRINTK("EXIT\n"); | |
2152 | } | |
2153 | ||
057ace5e JG |
2154 | static void ata_pr_blacklisted(const struct ata_port *ap, |
2155 | const struct ata_device *dev) | |
1da177e4 LT |
2156 | { |
2157 | printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n", | |
2158 | ap->id, dev->devno); | |
2159 | } | |
2160 | ||
98ac62de | 2161 | static const char * const ata_dma_blacklist [] = { |
1da177e4 LT |
2162 | "WDC AC11000H", |
2163 | "WDC AC22100H", | |
2164 | "WDC AC32500H", | |
2165 | "WDC AC33100H", | |
2166 | "WDC AC31600H", | |
2167 | "WDC AC32100H", | |
2168 | "WDC AC23200L", | |
2169 | "Compaq CRD-8241B", | |
2170 | "CRD-8400B", | |
2171 | "CRD-8480B", | |
2172 | "CRD-8482B", | |
2173 | "CRD-84", | |
2174 | "SanDisk SDP3B", | |
2175 | "SanDisk SDP3B-64", | |
2176 | "SANYO CD-ROM CRD", | |
2177 | "HITACHI CDR-8", | |
2178 | "HITACHI CDR-8335", | |
2179 | "HITACHI CDR-8435", | |
2180 | "Toshiba CD-ROM XM-6202B", | |
e922256a | 2181 | "TOSHIBA CD-ROM XM-1702BC", |
1da177e4 LT |
2182 | "CD-532E-A", |
2183 | "E-IDE CD-ROM CR-840", | |
2184 | "CD-ROM Drive/F5A", | |
2185 | "WPI CDD-820", | |
2186 | "SAMSUNG CD-ROM SC-148C", | |
2187 | "SAMSUNG CD-ROM SC", | |
2188 | "SanDisk SDP3B-64", | |
1da177e4 LT |
2189 | "ATAPI CD-ROM DRIVE 40X MAXIMUM", |
2190 | "_NEC DV5800A", | |
2191 | }; | |
2192 | ||
057ace5e | 2193 | static int ata_dma_blacklisted(const struct ata_device *dev) |
1da177e4 LT |
2194 | { |
2195 | unsigned char model_num[40]; | |
2196 | char *s; | |
2197 | unsigned int len; | |
2198 | int i; | |
2199 | ||
2200 | ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS, | |
2201 | sizeof(model_num)); | |
2202 | s = &model_num[0]; | |
2203 | len = strnlen(s, sizeof(model_num)); | |
2204 | ||
2205 | /* ATAPI specifies that empty space is blank-filled; remove blanks */ | |
2206 | while ((len > 0) && (s[len - 1] == ' ')) { | |
2207 | len--; | |
2208 | s[len] = 0; | |
2209 | } | |
2210 | ||
2211 | for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++) | |
2212 | if (!strncmp(ata_dma_blacklist[i], s, len)) | |
2213 | return 1; | |
2214 | ||
2215 | return 0; | |
2216 | } | |
2217 | ||
057ace5e | 2218 | static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift) |
1da177e4 | 2219 | { |
057ace5e | 2220 | const struct ata_device *master, *slave; |
1da177e4 LT |
2221 | unsigned int mask; |
2222 | ||
2223 | master = &ap->device[0]; | |
2224 | slave = &ap->device[1]; | |
2225 | ||
2226 | assert (ata_dev_present(master) || ata_dev_present(slave)); | |
2227 | ||
2228 | if (shift == ATA_SHIFT_UDMA) { | |
2229 | mask = ap->udma_mask; | |
2230 | if (ata_dev_present(master)) { | |
2231 | mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff); | |
057ace5e | 2232 | if (ata_dma_blacklisted(master)) { |
1da177e4 LT |
2233 | mask = 0; |
2234 | ata_pr_blacklisted(ap, master); | |
2235 | } | |
2236 | } | |
2237 | if (ata_dev_present(slave)) { | |
2238 | mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff); | |
057ace5e | 2239 | if (ata_dma_blacklisted(slave)) { |
1da177e4 LT |
2240 | mask = 0; |
2241 | ata_pr_blacklisted(ap, slave); | |
2242 | } | |
2243 | } | |
2244 | } | |
2245 | else if (shift == ATA_SHIFT_MWDMA) { | |
2246 | mask = ap->mwdma_mask; | |
2247 | if (ata_dev_present(master)) { | |
2248 | mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07); | |
057ace5e | 2249 | if (ata_dma_blacklisted(master)) { |
1da177e4 LT |
2250 | mask = 0; |
2251 | ata_pr_blacklisted(ap, master); | |
2252 | } | |
2253 | } | |
2254 | if (ata_dev_present(slave)) { | |
2255 | mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07); | |
057ace5e | 2256 | if (ata_dma_blacklisted(slave)) { |
1da177e4 LT |
2257 | mask = 0; |
2258 | ata_pr_blacklisted(ap, slave); | |
2259 | } | |
2260 | } | |
2261 | } | |
2262 | else if (shift == ATA_SHIFT_PIO) { | |
2263 | mask = ap->pio_mask; | |
2264 | if (ata_dev_present(master)) { | |
2265 | /* spec doesn't return explicit support for | |
2266 | * PIO0-2, so we fake it | |
2267 | */ | |
2268 | u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03; | |
2269 | tmp_mode <<= 3; | |
2270 | tmp_mode |= 0x7; | |
2271 | mask &= tmp_mode; | |
2272 | } | |
2273 | if (ata_dev_present(slave)) { | |
2274 | /* spec doesn't return explicit support for | |
2275 | * PIO0-2, so we fake it | |
2276 | */ | |
2277 | u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03; | |
2278 | tmp_mode <<= 3; | |
2279 | tmp_mode |= 0x7; | |
2280 | mask &= tmp_mode; | |
2281 | } | |
2282 | } | |
2283 | else { | |
2284 | mask = 0xffffffff; /* shut up compiler warning */ | |
2285 | BUG(); | |
2286 | } | |
2287 | ||
2288 | return mask; | |
2289 | } | |
2290 | ||
2291 | /* find greatest bit */ | |
2292 | static int fgb(u32 bitmap) | |
2293 | { | |
2294 | unsigned int i; | |
2295 | int x = -1; | |
2296 | ||
2297 | for (i = 0; i < 32; i++) | |
2298 | if (bitmap & (1 << i)) | |
2299 | x = i; | |
2300 | ||
2301 | return x; | |
2302 | } | |
2303 | ||
2304 | /** | |
2305 | * ata_choose_xfer_mode - attempt to find best transfer mode | |
2306 | * @ap: Port for which an xfer mode will be selected | |
2307 | * @xfer_mode_out: (output) SET FEATURES - XFER MODE code | |
2308 | * @xfer_shift_out: (output) bit shift that selects this mode | |
2309 | * | |
0cba632b JG |
2310 | * Based on host and device capabilities, determine the |
2311 | * maximum transfer mode that is amenable to all. | |
2312 | * | |
1da177e4 | 2313 | * LOCKING: |
0cba632b | 2314 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2315 | * |
2316 | * RETURNS: | |
2317 | * Zero on success, negative on error. | |
2318 | */ | |
2319 | ||
057ace5e | 2320 | static int ata_choose_xfer_mode(const struct ata_port *ap, |
1da177e4 LT |
2321 | u8 *xfer_mode_out, |
2322 | unsigned int *xfer_shift_out) | |
2323 | { | |
2324 | unsigned int mask, shift; | |
2325 | int x, i; | |
2326 | ||
2327 | for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) { | |
2328 | shift = xfer_mode_classes[i].shift; | |
2329 | mask = ata_get_mode_mask(ap, shift); | |
2330 | ||
2331 | x = fgb(mask); | |
2332 | if (x >= 0) { | |
2333 | *xfer_mode_out = xfer_mode_classes[i].base + x; | |
2334 | *xfer_shift_out = shift; | |
2335 | return 0; | |
2336 | } | |
2337 | } | |
2338 | ||
2339 | return -1; | |
2340 | } | |
2341 | ||
2342 | /** | |
2343 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
2344 | * @ap: Port associated with device @dev | |
2345 | * @dev: Device to which command will be sent | |
2346 | * | |
780a87f7 JG |
2347 | * Issue SET FEATURES - XFER MODE command to device @dev |
2348 | * on port @ap. | |
2349 | * | |
1da177e4 | 2350 | * LOCKING: |
0cba632b | 2351 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2352 | */ |
2353 | ||
2354 | static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev) | |
2355 | { | |
a0123703 | 2356 | struct ata_taskfile tf; |
1da177e4 LT |
2357 | |
2358 | /* set up set-features taskfile */ | |
2359 | DPRINTK("set features - xfer mode\n"); | |
2360 | ||
a0123703 TH |
2361 | ata_tf_init(ap, &tf, dev->devno); |
2362 | tf.command = ATA_CMD_SET_FEATURES; | |
2363 | tf.feature = SETFEATURES_XFER; | |
2364 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2365 | tf.protocol = ATA_PROT_NODATA; | |
2366 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 2367 | |
a0123703 TH |
2368 | if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) { |
2369 | printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n", | |
2370 | ap->id); | |
1da177e4 | 2371 | ata_port_disable(ap); |
a0123703 | 2372 | } |
1da177e4 LT |
2373 | |
2374 | DPRINTK("EXIT\n"); | |
2375 | } | |
2376 | ||
59a10b17 AL |
2377 | /** |
2378 | * ata_dev_reread_id - Reread the device identify device info | |
2379 | * @ap: port where the device is | |
2380 | * @dev: device to reread the identify device info | |
2381 | * | |
2382 | * LOCKING: | |
2383 | */ | |
2384 | ||
2385 | static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev) | |
2386 | { | |
a0123703 | 2387 | struct ata_taskfile tf; |
59a10b17 | 2388 | |
a0123703 | 2389 | ata_tf_init(ap, &tf, dev->devno); |
59a10b17 AL |
2390 | |
2391 | if (dev->class == ATA_DEV_ATA) { | |
a0123703 | 2392 | tf.command = ATA_CMD_ID_ATA; |
59a10b17 AL |
2393 | DPRINTK("do ATA identify\n"); |
2394 | } else { | |
a0123703 | 2395 | tf.command = ATA_CMD_ID_ATAPI; |
59a10b17 AL |
2396 | DPRINTK("do ATAPI identify\n"); |
2397 | } | |
2398 | ||
a0123703 TH |
2399 | tf.flags |= ATA_TFLAG_DEVICE; |
2400 | tf.protocol = ATA_PROT_PIO; | |
59a10b17 | 2401 | |
a0123703 TH |
2402 | if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE, |
2403 | dev->id, sizeof(dev->id))) | |
59a10b17 AL |
2404 | goto err_out; |
2405 | ||
59a10b17 AL |
2406 | swap_buf_le16(dev->id, ATA_ID_WORDS); |
2407 | ||
2408 | ata_dump_id(dev); | |
2409 | ||
2410 | DPRINTK("EXIT\n"); | |
2411 | ||
2412 | return; | |
2413 | err_out: | |
a0123703 | 2414 | printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id); |
59a10b17 AL |
2415 | ata_port_disable(ap); |
2416 | } | |
2417 | ||
8bf62ece AL |
2418 | /** |
2419 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
2420 | * @ap: Port associated with device @dev | |
2421 | * @dev: Device to which command will be sent | |
2422 | * | |
2423 | * LOCKING: | |
2424 | */ | |
2425 | ||
2426 | static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev) | |
2427 | { | |
a0123703 | 2428 | struct ata_taskfile tf; |
8bf62ece AL |
2429 | u16 sectors = dev->id[6]; |
2430 | u16 heads = dev->id[3]; | |
2431 | ||
2432 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
2433 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
2434 | return; | |
2435 | ||
2436 | /* set up init dev params taskfile */ | |
2437 | DPRINTK("init dev params \n"); | |
2438 | ||
a0123703 TH |
2439 | ata_tf_init(ap, &tf, dev->devno); |
2440 | tf.command = ATA_CMD_INIT_DEV_PARAMS; | |
2441 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
2442 | tf.protocol = ATA_PROT_NODATA; | |
2443 | tf.nsect = sectors; | |
2444 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 2445 | |
a0123703 TH |
2446 | if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) { |
2447 | printk(KERN_ERR "ata%u: failed to init parameters, disabled\n", | |
2448 | ap->id); | |
8bf62ece | 2449 | ata_port_disable(ap); |
a0123703 | 2450 | } |
8bf62ece AL |
2451 | |
2452 | DPRINTK("EXIT\n"); | |
2453 | } | |
2454 | ||
1da177e4 | 2455 | /** |
0cba632b JG |
2456 | * ata_sg_clean - Unmap DMA memory associated with command |
2457 | * @qc: Command containing DMA memory to be released | |
2458 | * | |
2459 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
2460 | * |
2461 | * LOCKING: | |
0cba632b | 2462 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2463 | */ |
2464 | ||
2465 | static void ata_sg_clean(struct ata_queued_cmd *qc) | |
2466 | { | |
2467 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 2468 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 2469 | int dir = qc->dma_dir; |
cedc9a47 | 2470 | void *pad_buf = NULL; |
1da177e4 LT |
2471 | |
2472 | assert(qc->flags & ATA_QCFLAG_DMAMAP); | |
2473 | assert(sg != NULL); | |
2474 | ||
2475 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
2476 | assert(qc->n_elem == 1); | |
2477 | ||
2c13b7ce | 2478 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 2479 | |
cedc9a47 JG |
2480 | /* if we padded the buffer out to 32-bit bound, and data |
2481 | * xfer direction is from-device, we must copy from the | |
2482 | * pad buffer back into the supplied buffer | |
2483 | */ | |
2484 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
2485 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2486 | ||
2487 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d JG |
2488 | if (qc->n_elem) |
2489 | dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir); | |
cedc9a47 JG |
2490 | /* restore last sg */ |
2491 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
2492 | if (pad_buf) { | |
2493 | struct scatterlist *psg = &qc->pad_sgent; | |
2494 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
2495 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
dfa15988 | 2496 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
2497 | } |
2498 | } else { | |
e1410f2d JG |
2499 | if (sg_dma_len(&sg[0]) > 0) |
2500 | dma_unmap_single(ap->host_set->dev, | |
2501 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), | |
2502 | dir); | |
cedc9a47 JG |
2503 | /* restore sg */ |
2504 | sg->length += qc->pad_len; | |
2505 | if (pad_buf) | |
2506 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
2507 | pad_buf, qc->pad_len); | |
2508 | } | |
1da177e4 LT |
2509 | |
2510 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 2511 | qc->__sg = NULL; |
1da177e4 LT |
2512 | } |
2513 | ||
2514 | /** | |
2515 | * ata_fill_sg - Fill PCI IDE PRD table | |
2516 | * @qc: Metadata associated with taskfile to be transferred | |
2517 | * | |
780a87f7 JG |
2518 | * Fill PCI IDE PRD (scatter-gather) table with segments |
2519 | * associated with the current disk command. | |
2520 | * | |
1da177e4 | 2521 | * LOCKING: |
780a87f7 | 2522 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
2523 | * |
2524 | */ | |
2525 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
2526 | { | |
1da177e4 | 2527 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
2528 | struct scatterlist *sg; |
2529 | unsigned int idx; | |
1da177e4 | 2530 | |
cedc9a47 | 2531 | assert(qc->__sg != NULL); |
1da177e4 LT |
2532 | assert(qc->n_elem > 0); |
2533 | ||
2534 | idx = 0; | |
cedc9a47 | 2535 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
2536 | u32 addr, offset; |
2537 | u32 sg_len, len; | |
2538 | ||
2539 | /* determine if physical DMA addr spans 64K boundary. | |
2540 | * Note h/w doesn't support 64-bit, so we unconditionally | |
2541 | * truncate dma_addr_t to u32. | |
2542 | */ | |
2543 | addr = (u32) sg_dma_address(sg); | |
2544 | sg_len = sg_dma_len(sg); | |
2545 | ||
2546 | while (sg_len) { | |
2547 | offset = addr & 0xffff; | |
2548 | len = sg_len; | |
2549 | if ((offset + sg_len) > 0x10000) | |
2550 | len = 0x10000 - offset; | |
2551 | ||
2552 | ap->prd[idx].addr = cpu_to_le32(addr); | |
2553 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
2554 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
2555 | ||
2556 | idx++; | |
2557 | sg_len -= len; | |
2558 | addr += len; | |
2559 | } | |
2560 | } | |
2561 | ||
2562 | if (idx) | |
2563 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
2564 | } | |
2565 | /** | |
2566 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
2567 | * @qc: Metadata associated with taskfile to check | |
2568 | * | |
780a87f7 JG |
2569 | * Allow low-level driver to filter ATA PACKET commands, returning |
2570 | * a status indicating whether or not it is OK to use DMA for the | |
2571 | * supplied PACKET command. | |
2572 | * | |
1da177e4 | 2573 | * LOCKING: |
0cba632b JG |
2574 | * spin_lock_irqsave(host_set lock) |
2575 | * | |
1da177e4 LT |
2576 | * RETURNS: 0 when ATAPI DMA can be used |
2577 | * nonzero otherwise | |
2578 | */ | |
2579 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
2580 | { | |
2581 | struct ata_port *ap = qc->ap; | |
2582 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
2583 | ||
2584 | if (ap->ops->check_atapi_dma) | |
2585 | rc = ap->ops->check_atapi_dma(qc); | |
2586 | ||
2587 | return rc; | |
2588 | } | |
2589 | /** | |
2590 | * ata_qc_prep - Prepare taskfile for submission | |
2591 | * @qc: Metadata associated with taskfile to be prepared | |
2592 | * | |
780a87f7 JG |
2593 | * Prepare ATA taskfile for submission. |
2594 | * | |
1da177e4 LT |
2595 | * LOCKING: |
2596 | * spin_lock_irqsave(host_set lock) | |
2597 | */ | |
2598 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
2599 | { | |
2600 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
2601 | return; | |
2602 | ||
2603 | ata_fill_sg(qc); | |
2604 | } | |
2605 | ||
0cba632b JG |
2606 | /** |
2607 | * ata_sg_init_one - Associate command with memory buffer | |
2608 | * @qc: Command to be associated | |
2609 | * @buf: Memory buffer | |
2610 | * @buflen: Length of memory buffer, in bytes. | |
2611 | * | |
2612 | * Initialize the data-related elements of queued_cmd @qc | |
2613 | * to point to a single memory buffer, @buf of byte length @buflen. | |
2614 | * | |
2615 | * LOCKING: | |
2616 | * spin_lock_irqsave(host_set lock) | |
2617 | */ | |
2618 | ||
1da177e4 LT |
2619 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
2620 | { | |
2621 | struct scatterlist *sg; | |
2622 | ||
2623 | qc->flags |= ATA_QCFLAG_SINGLE; | |
2624 | ||
2625 | memset(&qc->sgent, 0, sizeof(qc->sgent)); | |
cedc9a47 | 2626 | qc->__sg = &qc->sgent; |
1da177e4 | 2627 | qc->n_elem = 1; |
cedc9a47 | 2628 | qc->orig_n_elem = 1; |
1da177e4 LT |
2629 | qc->buf_virt = buf; |
2630 | ||
cedc9a47 | 2631 | sg = qc->__sg; |
f0612bbc | 2632 | sg_init_one(sg, buf, buflen); |
1da177e4 LT |
2633 | } |
2634 | ||
0cba632b JG |
2635 | /** |
2636 | * ata_sg_init - Associate command with scatter-gather table. | |
2637 | * @qc: Command to be associated | |
2638 | * @sg: Scatter-gather table. | |
2639 | * @n_elem: Number of elements in s/g table. | |
2640 | * | |
2641 | * Initialize the data-related elements of queued_cmd @qc | |
2642 | * to point to a scatter-gather table @sg, containing @n_elem | |
2643 | * elements. | |
2644 | * | |
2645 | * LOCKING: | |
2646 | * spin_lock_irqsave(host_set lock) | |
2647 | */ | |
2648 | ||
1da177e4 LT |
2649 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
2650 | unsigned int n_elem) | |
2651 | { | |
2652 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 2653 | qc->__sg = sg; |
1da177e4 | 2654 | qc->n_elem = n_elem; |
cedc9a47 | 2655 | qc->orig_n_elem = n_elem; |
1da177e4 LT |
2656 | } |
2657 | ||
2658 | /** | |
0cba632b JG |
2659 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
2660 | * @qc: Command with memory buffer to be mapped. | |
2661 | * | |
2662 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
2663 | * |
2664 | * LOCKING: | |
2665 | * spin_lock_irqsave(host_set lock) | |
2666 | * | |
2667 | * RETURNS: | |
0cba632b | 2668 | * Zero on success, negative on error. |
1da177e4 LT |
2669 | */ |
2670 | ||
2671 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
2672 | { | |
2673 | struct ata_port *ap = qc->ap; | |
2674 | int dir = qc->dma_dir; | |
cedc9a47 | 2675 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
2676 | dma_addr_t dma_address; |
2677 | ||
cedc9a47 JG |
2678 | /* we must lengthen transfers to end on a 32-bit boundary */ |
2679 | qc->pad_len = sg->length & 3; | |
2680 | if (qc->pad_len) { | |
2681 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2682 | struct scatterlist *psg = &qc->pad_sgent; | |
2683 | ||
2684 | assert(qc->dev->class == ATA_DEV_ATAPI); | |
2685 | ||
2686 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
2687 | ||
2688 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
2689 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
2690 | qc->pad_len); | |
2691 | ||
2692 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
2693 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
2694 | /* trim sg */ | |
2695 | sg->length -= qc->pad_len; | |
2696 | ||
2697 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
2698 | sg->length, qc->pad_len); | |
2699 | } | |
2700 | ||
e1410f2d JG |
2701 | if (!sg->length) { |
2702 | sg_dma_address(sg) = 0; | |
2703 | goto skip_map; | |
2704 | } | |
2705 | ||
1da177e4 | 2706 | dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt, |
32529e01 | 2707 | sg->length, dir); |
537a95d9 TH |
2708 | if (dma_mapping_error(dma_address)) { |
2709 | /* restore sg */ | |
2710 | sg->length += qc->pad_len; | |
1da177e4 | 2711 | return -1; |
537a95d9 | 2712 | } |
1da177e4 LT |
2713 | |
2714 | sg_dma_address(sg) = dma_address; | |
e1410f2d | 2715 | skip_map: |
32529e01 | 2716 | sg_dma_len(sg) = sg->length; |
1da177e4 LT |
2717 | |
2718 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), | |
2719 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
2720 | ||
2721 | return 0; | |
2722 | } | |
2723 | ||
2724 | /** | |
0cba632b JG |
2725 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
2726 | * @qc: Command with scatter-gather table to be mapped. | |
2727 | * | |
2728 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
2729 | * |
2730 | * LOCKING: | |
2731 | * spin_lock_irqsave(host_set lock) | |
2732 | * | |
2733 | * RETURNS: | |
0cba632b | 2734 | * Zero on success, negative on error. |
1da177e4 LT |
2735 | * |
2736 | */ | |
2737 | ||
2738 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
2739 | { | |
2740 | struct ata_port *ap = qc->ap; | |
cedc9a47 JG |
2741 | struct scatterlist *sg = qc->__sg; |
2742 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
e1410f2d | 2743 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 LT |
2744 | |
2745 | VPRINTK("ENTER, ata%u\n", ap->id); | |
2746 | assert(qc->flags & ATA_QCFLAG_SG); | |
2747 | ||
cedc9a47 JG |
2748 | /* we must lengthen transfers to end on a 32-bit boundary */ |
2749 | qc->pad_len = lsg->length & 3; | |
2750 | if (qc->pad_len) { | |
2751 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
2752 | struct scatterlist *psg = &qc->pad_sgent; | |
2753 | unsigned int offset; | |
2754 | ||
2755 | assert(qc->dev->class == ATA_DEV_ATAPI); | |
2756 | ||
2757 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
2758 | ||
2759 | /* | |
2760 | * psg->page/offset are used to copy to-be-written | |
2761 | * data in this function or read data in ata_sg_clean. | |
2762 | */ | |
2763 | offset = lsg->offset + lsg->length - qc->pad_len; | |
2764 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
2765 | psg->offset = offset_in_page(offset); | |
2766 | ||
2767 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
2768 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
2769 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
dfa15988 | 2770 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
2771 | } |
2772 | ||
2773 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
2774 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
2775 | /* trim last sg */ | |
2776 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
2777 | if (lsg->length == 0) |
2778 | trim_sg = 1; | |
cedc9a47 JG |
2779 | |
2780 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
2781 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
2782 | } | |
2783 | ||
e1410f2d JG |
2784 | pre_n_elem = qc->n_elem; |
2785 | if (trim_sg && pre_n_elem) | |
2786 | pre_n_elem--; | |
2787 | ||
2788 | if (!pre_n_elem) { | |
2789 | n_elem = 0; | |
2790 | goto skip_map; | |
2791 | } | |
2792 | ||
1da177e4 | 2793 | dir = qc->dma_dir; |
e1410f2d | 2794 | n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
2795 | if (n_elem < 1) { |
2796 | /* restore last sg */ | |
2797 | lsg->length += qc->pad_len; | |
1da177e4 | 2798 | return -1; |
537a95d9 | 2799 | } |
1da177e4 LT |
2800 | |
2801 | DPRINTK("%d sg elements mapped\n", n_elem); | |
2802 | ||
e1410f2d | 2803 | skip_map: |
1da177e4 LT |
2804 | qc->n_elem = n_elem; |
2805 | ||
2806 | return 0; | |
2807 | } | |
2808 | ||
40e8c82c TH |
2809 | /** |
2810 | * ata_poll_qc_complete - turn irq back on and finish qc | |
2811 | * @qc: Command to complete | |
8e8b77dd | 2812 | * @err_mask: ATA status register content |
40e8c82c TH |
2813 | * |
2814 | * LOCKING: | |
2815 | * None. (grabs host lock) | |
2816 | */ | |
2817 | ||
a22e2eb0 | 2818 | void ata_poll_qc_complete(struct ata_queued_cmd *qc) |
40e8c82c TH |
2819 | { |
2820 | struct ata_port *ap = qc->ap; | |
b8f6153e | 2821 | unsigned long flags; |
40e8c82c | 2822 | |
b8f6153e | 2823 | spin_lock_irqsave(&ap->host_set->lock, flags); |
40e8c82c TH |
2824 | ap->flags &= ~ATA_FLAG_NOINTR; |
2825 | ata_irq_on(ap); | |
a22e2eb0 | 2826 | ata_qc_complete(qc); |
b8f6153e | 2827 | spin_unlock_irqrestore(&ap->host_set->lock, flags); |
40e8c82c TH |
2828 | } |
2829 | ||
1da177e4 LT |
2830 | /** |
2831 | * ata_pio_poll - | |
6f0ef4fa | 2832 | * @ap: the target ata_port |
1da177e4 LT |
2833 | * |
2834 | * LOCKING: | |
0cba632b | 2835 | * None. (executing in kernel thread context) |
1da177e4 LT |
2836 | * |
2837 | * RETURNS: | |
6f0ef4fa | 2838 | * timeout value to use |
1da177e4 LT |
2839 | */ |
2840 | ||
2841 | static unsigned long ata_pio_poll(struct ata_port *ap) | |
2842 | { | |
c14b8331 | 2843 | struct ata_queued_cmd *qc; |
1da177e4 | 2844 | u8 status; |
14be71f4 AL |
2845 | unsigned int poll_state = HSM_ST_UNKNOWN; |
2846 | unsigned int reg_state = HSM_ST_UNKNOWN; | |
14be71f4 | 2847 | |
c14b8331 AL |
2848 | qc = ata_qc_from_tag(ap, ap->active_tag); |
2849 | assert(qc != NULL); | |
2850 | ||
14be71f4 AL |
2851 | switch (ap->hsm_task_state) { |
2852 | case HSM_ST: | |
2853 | case HSM_ST_POLL: | |
2854 | poll_state = HSM_ST_POLL; | |
2855 | reg_state = HSM_ST; | |
1da177e4 | 2856 | break; |
14be71f4 AL |
2857 | case HSM_ST_LAST: |
2858 | case HSM_ST_LAST_POLL: | |
2859 | poll_state = HSM_ST_LAST_POLL; | |
2860 | reg_state = HSM_ST_LAST; | |
1da177e4 LT |
2861 | break; |
2862 | default: | |
2863 | BUG(); | |
2864 | break; | |
2865 | } | |
2866 | ||
2867 | status = ata_chk_status(ap); | |
2868 | if (status & ATA_BUSY) { | |
2869 | if (time_after(jiffies, ap->pio_task_timeout)) { | |
1c848984 | 2870 | qc->err_mask |= AC_ERR_ATA_BUS; |
7c398335 | 2871 | ap->hsm_task_state = HSM_ST_TMOUT; |
1da177e4 LT |
2872 | return 0; |
2873 | } | |
14be71f4 | 2874 | ap->hsm_task_state = poll_state; |
1da177e4 LT |
2875 | return ATA_SHORT_PAUSE; |
2876 | } | |
2877 | ||
14be71f4 | 2878 | ap->hsm_task_state = reg_state; |
1da177e4 LT |
2879 | return 0; |
2880 | } | |
2881 | ||
2882 | /** | |
6f0ef4fa RD |
2883 | * ata_pio_complete - check if drive is busy or idle |
2884 | * @ap: the target ata_port | |
1da177e4 LT |
2885 | * |
2886 | * LOCKING: | |
0cba632b | 2887 | * None. (executing in kernel thread context) |
7fb6ec28 JG |
2888 | * |
2889 | * RETURNS: | |
2890 | * Non-zero if qc completed, zero otherwise. | |
1da177e4 LT |
2891 | */ |
2892 | ||
7fb6ec28 | 2893 | static int ata_pio_complete (struct ata_port *ap) |
1da177e4 LT |
2894 | { |
2895 | struct ata_queued_cmd *qc; | |
2896 | u8 drv_stat; | |
2897 | ||
2898 | /* | |
31433ea3 AC |
2899 | * This is purely heuristic. This is a fast path. Sometimes when |
2900 | * we enter, BSY will be cleared in a chk-status or two. If not, | |
2901 | * the drive is probably seeking or something. Snooze for a couple | |
2902 | * msecs, then chk-status again. If still busy, fall back to | |
14be71f4 | 2903 | * HSM_ST_POLL state. |
1da177e4 | 2904 | */ |
fe79e683 AL |
2905 | drv_stat = ata_busy_wait(ap, ATA_BUSY, 10); |
2906 | if (drv_stat & ATA_BUSY) { | |
1da177e4 | 2907 | msleep(2); |
fe79e683 AL |
2908 | drv_stat = ata_busy_wait(ap, ATA_BUSY, 10); |
2909 | if (drv_stat & ATA_BUSY) { | |
14be71f4 | 2910 | ap->hsm_task_state = HSM_ST_LAST_POLL; |
1da177e4 | 2911 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
7fb6ec28 | 2912 | return 0; |
1da177e4 LT |
2913 | } |
2914 | } | |
2915 | ||
c14b8331 AL |
2916 | qc = ata_qc_from_tag(ap, ap->active_tag); |
2917 | assert(qc != NULL); | |
2918 | ||
1da177e4 LT |
2919 | drv_stat = ata_wait_idle(ap); |
2920 | if (!ata_ok(drv_stat)) { | |
1c848984 | 2921 | qc->err_mask |= __ac_err_mask(drv_stat); |
14be71f4 | 2922 | ap->hsm_task_state = HSM_ST_ERR; |
7fb6ec28 | 2923 | return 0; |
1da177e4 LT |
2924 | } |
2925 | ||
14be71f4 | 2926 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 2927 | |
a22e2eb0 AL |
2928 | assert(qc->err_mask == 0); |
2929 | ata_poll_qc_complete(qc); | |
7fb6ec28 JG |
2930 | |
2931 | /* another command may start at this point */ | |
2932 | ||
2933 | return 1; | |
1da177e4 LT |
2934 | } |
2935 | ||
0baab86b EF |
2936 | |
2937 | /** | |
6f0ef4fa | 2938 | * swap_buf_le16 - swap halves of 16-words in place |
0baab86b EF |
2939 | * @buf: Buffer to swap |
2940 | * @buf_words: Number of 16-bit words in buffer. | |
2941 | * | |
2942 | * Swap halves of 16-bit words if needed to convert from | |
2943 | * little-endian byte order to native cpu byte order, or | |
2944 | * vice-versa. | |
2945 | * | |
2946 | * LOCKING: | |
6f0ef4fa | 2947 | * Inherited from caller. |
0baab86b | 2948 | */ |
1da177e4 LT |
2949 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
2950 | { | |
2951 | #ifdef __BIG_ENDIAN | |
2952 | unsigned int i; | |
2953 | ||
2954 | for (i = 0; i < buf_words; i++) | |
2955 | buf[i] = le16_to_cpu(buf[i]); | |
2956 | #endif /* __BIG_ENDIAN */ | |
2957 | } | |
2958 | ||
6ae4cfb5 AL |
2959 | /** |
2960 | * ata_mmio_data_xfer - Transfer data by MMIO | |
2961 | * @ap: port to read/write | |
2962 | * @buf: data buffer | |
2963 | * @buflen: buffer length | |
344babaa | 2964 | * @write_data: read/write |
6ae4cfb5 AL |
2965 | * |
2966 | * Transfer data from/to the device data register by MMIO. | |
2967 | * | |
2968 | * LOCKING: | |
2969 | * Inherited from caller. | |
6ae4cfb5 AL |
2970 | */ |
2971 | ||
1da177e4 LT |
2972 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2973 | unsigned int buflen, int write_data) | |
2974 | { | |
2975 | unsigned int i; | |
2976 | unsigned int words = buflen >> 1; | |
2977 | u16 *buf16 = (u16 *) buf; | |
2978 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | |
2979 | ||
6ae4cfb5 | 2980 | /* Transfer multiple of 2 bytes */ |
1da177e4 LT |
2981 | if (write_data) { |
2982 | for (i = 0; i < words; i++) | |
2983 | writew(le16_to_cpu(buf16[i]), mmio); | |
2984 | } else { | |
2985 | for (i = 0; i < words; i++) | |
2986 | buf16[i] = cpu_to_le16(readw(mmio)); | |
2987 | } | |
6ae4cfb5 AL |
2988 | |
2989 | /* Transfer trailing 1 byte, if any. */ | |
2990 | if (unlikely(buflen & 0x01)) { | |
2991 | u16 align_buf[1] = { 0 }; | |
2992 | unsigned char *trailing_buf = buf + buflen - 1; | |
2993 | ||
2994 | if (write_data) { | |
2995 | memcpy(align_buf, trailing_buf, 1); | |
2996 | writew(le16_to_cpu(align_buf[0]), mmio); | |
2997 | } else { | |
2998 | align_buf[0] = cpu_to_le16(readw(mmio)); | |
2999 | memcpy(trailing_buf, align_buf, 1); | |
3000 | } | |
3001 | } | |
1da177e4 LT |
3002 | } |
3003 | ||
6ae4cfb5 AL |
3004 | /** |
3005 | * ata_pio_data_xfer - Transfer data by PIO | |
3006 | * @ap: port to read/write | |
3007 | * @buf: data buffer | |
3008 | * @buflen: buffer length | |
344babaa | 3009 | * @write_data: read/write |
6ae4cfb5 AL |
3010 | * |
3011 | * Transfer data from/to the device data register by PIO. | |
3012 | * | |
3013 | * LOCKING: | |
3014 | * Inherited from caller. | |
6ae4cfb5 AL |
3015 | */ |
3016 | ||
1da177e4 LT |
3017 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
3018 | unsigned int buflen, int write_data) | |
3019 | { | |
6ae4cfb5 | 3020 | unsigned int words = buflen >> 1; |
1da177e4 | 3021 | |
6ae4cfb5 | 3022 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 3023 | if (write_data) |
6ae4cfb5 | 3024 | outsw(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 3025 | else |
6ae4cfb5 AL |
3026 | insw(ap->ioaddr.data_addr, buf, words); |
3027 | ||
3028 | /* Transfer trailing 1 byte, if any. */ | |
3029 | if (unlikely(buflen & 0x01)) { | |
3030 | u16 align_buf[1] = { 0 }; | |
3031 | unsigned char *trailing_buf = buf + buflen - 1; | |
3032 | ||
3033 | if (write_data) { | |
3034 | memcpy(align_buf, trailing_buf, 1); | |
3035 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3036 | } else { | |
3037 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | |
3038 | memcpy(trailing_buf, align_buf, 1); | |
3039 | } | |
3040 | } | |
1da177e4 LT |
3041 | } |
3042 | ||
6ae4cfb5 AL |
3043 | /** |
3044 | * ata_data_xfer - Transfer data from/to the data register. | |
3045 | * @ap: port to read/write | |
3046 | * @buf: data buffer | |
3047 | * @buflen: buffer length | |
3048 | * @do_write: read/write | |
3049 | * | |
3050 | * Transfer data from/to the device data register. | |
3051 | * | |
3052 | * LOCKING: | |
3053 | * Inherited from caller. | |
6ae4cfb5 AL |
3054 | */ |
3055 | ||
1da177e4 LT |
3056 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
3057 | unsigned int buflen, int do_write) | |
3058 | { | |
3059 | if (ap->flags & ATA_FLAG_MMIO) | |
3060 | ata_mmio_data_xfer(ap, buf, buflen, do_write); | |
3061 | else | |
3062 | ata_pio_data_xfer(ap, buf, buflen, do_write); | |
3063 | } | |
3064 | ||
6ae4cfb5 AL |
3065 | /** |
3066 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
3067 | * @qc: Command on going | |
3068 | * | |
3069 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
3070 | * | |
3071 | * LOCKING: | |
3072 | * Inherited from caller. | |
3073 | */ | |
3074 | ||
1da177e4 LT |
3075 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
3076 | { | |
3077 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3078 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3079 | struct ata_port *ap = qc->ap; |
3080 | struct page *page; | |
3081 | unsigned int offset; | |
3082 | unsigned char *buf; | |
3083 | ||
3084 | if (qc->cursect == (qc->nsect - 1)) | |
14be71f4 | 3085 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3086 | |
3087 | page = sg[qc->cursg].page; | |
3088 | offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE; | |
3089 | ||
3090 | /* get the current page and offset */ | |
3091 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3092 | offset %= PAGE_SIZE; | |
3093 | ||
3094 | buf = kmap(page) + offset; | |
3095 | ||
3096 | qc->cursect++; | |
3097 | qc->cursg_ofs++; | |
3098 | ||
32529e01 | 3099 | if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) { |
1da177e4 LT |
3100 | qc->cursg++; |
3101 | qc->cursg_ofs = 0; | |
3102 | } | |
3103 | ||
3104 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3105 | ||
3106 | /* do the actual data transfer */ | |
3107 | do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3108 | ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write); | |
3109 | ||
3110 | kunmap(page); | |
3111 | } | |
3112 | ||
6ae4cfb5 AL |
3113 | /** |
3114 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3115 | * @qc: Command on going | |
3116 | * @bytes: number of bytes | |
3117 | * | |
3118 | * Transfer Transfer data from/to the ATAPI device. | |
3119 | * | |
3120 | * LOCKING: | |
3121 | * Inherited from caller. | |
3122 | * | |
3123 | */ | |
3124 | ||
1da177e4 LT |
3125 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
3126 | { | |
3127 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 3128 | struct scatterlist *sg = qc->__sg; |
1da177e4 LT |
3129 | struct ata_port *ap = qc->ap; |
3130 | struct page *page; | |
3131 | unsigned char *buf; | |
3132 | unsigned int offset, count; | |
3133 | ||
563a6e1f | 3134 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 3135 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3136 | |
3137 | next_sg: | |
563a6e1f | 3138 | if (unlikely(qc->cursg >= qc->n_elem)) { |
7fb6ec28 | 3139 | /* |
563a6e1f AL |
3140 | * The end of qc->sg is reached and the device expects |
3141 | * more data to transfer. In order not to overrun qc->sg | |
3142 | * and fulfill length specified in the byte count register, | |
3143 | * - for read case, discard trailing data from the device | |
3144 | * - for write case, padding zero data to the device | |
3145 | */ | |
3146 | u16 pad_buf[1] = { 0 }; | |
3147 | unsigned int words = bytes >> 1; | |
3148 | unsigned int i; | |
3149 | ||
3150 | if (words) /* warning if bytes > 1 */ | |
7fb6ec28 | 3151 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", |
563a6e1f AL |
3152 | ap->id, bytes); |
3153 | ||
3154 | for (i = 0; i < words; i++) | |
3155 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | |
3156 | ||
14be71f4 | 3157 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
3158 | return; |
3159 | } | |
3160 | ||
cedc9a47 | 3161 | sg = &qc->__sg[qc->cursg]; |
1da177e4 | 3162 | |
1da177e4 LT |
3163 | page = sg->page; |
3164 | offset = sg->offset + qc->cursg_ofs; | |
3165 | ||
3166 | /* get the current page and offset */ | |
3167 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
3168 | offset %= PAGE_SIZE; | |
3169 | ||
6952df03 | 3170 | /* don't overrun current sg */ |
32529e01 | 3171 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
3172 | |
3173 | /* don't cross page boundaries */ | |
3174 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
3175 | ||
3176 | buf = kmap(page) + offset; | |
3177 | ||
3178 | bytes -= count; | |
3179 | qc->curbytes += count; | |
3180 | qc->cursg_ofs += count; | |
3181 | ||
32529e01 | 3182 | if (qc->cursg_ofs == sg->length) { |
1da177e4 LT |
3183 | qc->cursg++; |
3184 | qc->cursg_ofs = 0; | |
3185 | } | |
3186 | ||
3187 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3188 | ||
3189 | /* do the actual data transfer */ | |
3190 | ata_data_xfer(ap, buf, count, do_write); | |
3191 | ||
3192 | kunmap(page); | |
3193 | ||
563a6e1f | 3194 | if (bytes) |
1da177e4 | 3195 | goto next_sg; |
1da177e4 LT |
3196 | } |
3197 | ||
6ae4cfb5 AL |
3198 | /** |
3199 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
3200 | * @qc: Command on going | |
3201 | * | |
3202 | * Transfer Transfer data from/to the ATAPI device. | |
3203 | * | |
3204 | * LOCKING: | |
3205 | * Inherited from caller. | |
6ae4cfb5 AL |
3206 | */ |
3207 | ||
1da177e4 LT |
3208 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
3209 | { | |
3210 | struct ata_port *ap = qc->ap; | |
3211 | struct ata_device *dev = qc->dev; | |
3212 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
3213 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
3214 | ||
3215 | ap->ops->tf_read(ap, &qc->tf); | |
3216 | ireason = qc->tf.nsect; | |
3217 | bc_lo = qc->tf.lbam; | |
3218 | bc_hi = qc->tf.lbah; | |
3219 | bytes = (bc_hi << 8) | bc_lo; | |
3220 | ||
3221 | /* shall be cleared to zero, indicating xfer of data */ | |
3222 | if (ireason & (1 << 0)) | |
3223 | goto err_out; | |
3224 | ||
3225 | /* make sure transfer direction matches expected */ | |
3226 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
3227 | if (do_write != i_write) | |
3228 | goto err_out; | |
3229 | ||
3230 | __atapi_pio_bytes(qc, bytes); | |
3231 | ||
3232 | return; | |
3233 | ||
3234 | err_out: | |
3235 | printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n", | |
3236 | ap->id, dev->devno); | |
1c848984 | 3237 | qc->err_mask |= AC_ERR_ATA_BUS; |
14be71f4 | 3238 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3239 | } |
3240 | ||
3241 | /** | |
6f0ef4fa RD |
3242 | * ata_pio_block - start PIO on a block |
3243 | * @ap: the target ata_port | |
1da177e4 LT |
3244 | * |
3245 | * LOCKING: | |
0cba632b | 3246 | * None. (executing in kernel thread context) |
1da177e4 LT |
3247 | */ |
3248 | ||
3249 | static void ata_pio_block(struct ata_port *ap) | |
3250 | { | |
3251 | struct ata_queued_cmd *qc; | |
3252 | u8 status; | |
3253 | ||
3254 | /* | |
6f0ef4fa | 3255 | * This is purely heuristic. This is a fast path. |
1da177e4 LT |
3256 | * Sometimes when we enter, BSY will be cleared in |
3257 | * a chk-status or two. If not, the drive is probably seeking | |
3258 | * or something. Snooze for a couple msecs, then | |
3259 | * chk-status again. If still busy, fall back to | |
14be71f4 | 3260 | * HSM_ST_POLL state. |
1da177e4 LT |
3261 | */ |
3262 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
3263 | if (status & ATA_BUSY) { | |
3264 | msleep(2); | |
3265 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
3266 | if (status & ATA_BUSY) { | |
14be71f4 | 3267 | ap->hsm_task_state = HSM_ST_POLL; |
1da177e4 LT |
3268 | ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO; |
3269 | return; | |
3270 | } | |
3271 | } | |
3272 | ||
3273 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3274 | assert(qc != NULL); | |
3275 | ||
fe79e683 AL |
3276 | /* check error */ |
3277 | if (status & (ATA_ERR | ATA_DF)) { | |
3278 | qc->err_mask |= AC_ERR_DEV; | |
3279 | ap->hsm_task_state = HSM_ST_ERR; | |
3280 | return; | |
3281 | } | |
3282 | ||
3283 | /* transfer data if any */ | |
1da177e4 | 3284 | if (is_atapi_taskfile(&qc->tf)) { |
fe79e683 | 3285 | /* DRQ=0 means no more data to transfer */ |
1da177e4 | 3286 | if ((status & ATA_DRQ) == 0) { |
14be71f4 | 3287 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
3288 | return; |
3289 | } | |
3290 | ||
3291 | atapi_pio_bytes(qc); | |
3292 | } else { | |
3293 | /* handle BSY=0, DRQ=0 as error */ | |
3294 | if ((status & ATA_DRQ) == 0) { | |
1c848984 | 3295 | qc->err_mask |= AC_ERR_ATA_BUS; |
14be71f4 | 3296 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
3297 | return; |
3298 | } | |
3299 | ||
3300 | ata_pio_sector(qc); | |
3301 | } | |
3302 | } | |
3303 | ||
3304 | static void ata_pio_error(struct ata_port *ap) | |
3305 | { | |
3306 | struct ata_queued_cmd *qc; | |
a7dac447 JG |
3307 | |
3308 | printk(KERN_WARNING "ata%u: PIO error\n", ap->id); | |
1da177e4 LT |
3309 | |
3310 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
3311 | assert(qc != NULL); | |
3312 | ||
1c848984 AL |
3313 | /* make sure qc->err_mask is available to |
3314 | * know what's wrong and recover | |
3315 | */ | |
3316 | assert(qc->err_mask); | |
3317 | ||
14be71f4 | 3318 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 3319 | |
a22e2eb0 | 3320 | ata_poll_qc_complete(qc); |
1da177e4 LT |
3321 | } |
3322 | ||
3323 | static void ata_pio_task(void *_data) | |
3324 | { | |
3325 | struct ata_port *ap = _data; | |
7fb6ec28 JG |
3326 | unsigned long timeout; |
3327 | int qc_completed; | |
3328 | ||
3329 | fsm_start: | |
3330 | timeout = 0; | |
3331 | qc_completed = 0; | |
1da177e4 | 3332 | |
14be71f4 AL |
3333 | switch (ap->hsm_task_state) { |
3334 | case HSM_ST_IDLE: | |
1da177e4 LT |
3335 | return; |
3336 | ||
14be71f4 | 3337 | case HSM_ST: |
1da177e4 LT |
3338 | ata_pio_block(ap); |
3339 | break; | |
3340 | ||
14be71f4 | 3341 | case HSM_ST_LAST: |
7fb6ec28 | 3342 | qc_completed = ata_pio_complete(ap); |
1da177e4 LT |
3343 | break; |
3344 | ||
14be71f4 AL |
3345 | case HSM_ST_POLL: |
3346 | case HSM_ST_LAST_POLL: | |
1da177e4 LT |
3347 | timeout = ata_pio_poll(ap); |
3348 | break; | |
3349 | ||
14be71f4 AL |
3350 | case HSM_ST_TMOUT: |
3351 | case HSM_ST_ERR: | |
1da177e4 LT |
3352 | ata_pio_error(ap); |
3353 | return; | |
3354 | } | |
3355 | ||
3356 | if (timeout) | |
7fb6ec28 JG |
3357 | queue_delayed_work(ata_wq, &ap->pio_task, timeout); |
3358 | else if (!qc_completed) | |
3359 | goto fsm_start; | |
1da177e4 LT |
3360 | } |
3361 | ||
1da177e4 LT |
3362 | /** |
3363 | * ata_qc_timeout - Handle timeout of queued command | |
3364 | * @qc: Command that timed out | |
3365 | * | |
3366 | * Some part of the kernel (currently, only the SCSI layer) | |
3367 | * has noticed that the active command on port @ap has not | |
3368 | * completed after a specified length of time. Handle this | |
3369 | * condition by disabling DMA (if necessary) and completing | |
3370 | * transactions, with error if necessary. | |
3371 | * | |
3372 | * This also handles the case of the "lost interrupt", where | |
3373 | * for some reason (possibly hardware bug, possibly driver bug) | |
3374 | * an interrupt was not delivered to the driver, even though the | |
3375 | * transaction completed successfully. | |
3376 | * | |
3377 | * LOCKING: | |
0cba632b | 3378 | * Inherited from SCSI layer (none, can sleep) |
1da177e4 LT |
3379 | */ |
3380 | ||
3381 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | |
3382 | { | |
3383 | struct ata_port *ap = qc->ap; | |
b8f6153e | 3384 | struct ata_host_set *host_set = ap->host_set; |
1da177e4 | 3385 | u8 host_stat = 0, drv_stat; |
b8f6153e | 3386 | unsigned long flags; |
1da177e4 LT |
3387 | |
3388 | DPRINTK("ENTER\n"); | |
3389 | ||
b8f6153e JG |
3390 | spin_lock_irqsave(&host_set->lock, flags); |
3391 | ||
1da177e4 LT |
3392 | /* hack alert! We cannot use the supplied completion |
3393 | * function from inside the ->eh_strategy_handler() thread. | |
3394 | * libata is the only user of ->eh_strategy_handler() in | |
3395 | * any kernel, so the default scsi_done() assumes it is | |
3396 | * not being called from the SCSI EH. | |
3397 | */ | |
3398 | qc->scsidone = scsi_finish_command; | |
3399 | ||
3400 | switch (qc->tf.protocol) { | |
3401 | ||
3402 | case ATA_PROT_DMA: | |
3403 | case ATA_PROT_ATAPI_DMA: | |
3404 | host_stat = ap->ops->bmdma_status(ap); | |
3405 | ||
3406 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3407 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
3408 | |
3409 | /* fall through */ | |
3410 | ||
3411 | default: | |
3412 | ata_altstatus(ap); | |
3413 | drv_stat = ata_chk_status(ap); | |
3414 | ||
3415 | /* ack bmdma irq events */ | |
3416 | ap->ops->irq_clear(ap); | |
3417 | ||
3418 | printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n", | |
3419 | ap->id, qc->tf.command, drv_stat, host_stat); | |
3420 | ||
3421 | /* complete taskfile transaction */ | |
a22e2eb0 AL |
3422 | qc->err_mask |= ac_err_mask(drv_stat); |
3423 | ata_qc_complete(qc); | |
1da177e4 LT |
3424 | break; |
3425 | } | |
b8f6153e JG |
3426 | |
3427 | spin_unlock_irqrestore(&host_set->lock, flags); | |
3428 | ||
1da177e4 LT |
3429 | DPRINTK("EXIT\n"); |
3430 | } | |
3431 | ||
3432 | /** | |
3433 | * ata_eng_timeout - Handle timeout of queued command | |
3434 | * @ap: Port on which timed-out command is active | |
3435 | * | |
3436 | * Some part of the kernel (currently, only the SCSI layer) | |
3437 | * has noticed that the active command on port @ap has not | |
3438 | * completed after a specified length of time. Handle this | |
3439 | * condition by disabling DMA (if necessary) and completing | |
3440 | * transactions, with error if necessary. | |
3441 | * | |
3442 | * This also handles the case of the "lost interrupt", where | |
3443 | * for some reason (possibly hardware bug, possibly driver bug) | |
3444 | * an interrupt was not delivered to the driver, even though the | |
3445 | * transaction completed successfully. | |
3446 | * | |
3447 | * LOCKING: | |
3448 | * Inherited from SCSI layer (none, can sleep) | |
3449 | */ | |
3450 | ||
3451 | void ata_eng_timeout(struct ata_port *ap) | |
3452 | { | |
3453 | struct ata_queued_cmd *qc; | |
3454 | ||
3455 | DPRINTK("ENTER\n"); | |
3456 | ||
3457 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
e12669e7 JG |
3458 | if (qc) |
3459 | ata_qc_timeout(qc); | |
3460 | else { | |
1da177e4 LT |
3461 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", |
3462 | ap->id); | |
3463 | goto out; | |
3464 | } | |
3465 | ||
1da177e4 LT |
3466 | out: |
3467 | DPRINTK("EXIT\n"); | |
3468 | } | |
3469 | ||
3470 | /** | |
3471 | * ata_qc_new - Request an available ATA command, for queueing | |
3472 | * @ap: Port associated with device @dev | |
3473 | * @dev: Device from whom we request an available command structure | |
3474 | * | |
3475 | * LOCKING: | |
0cba632b | 3476 | * None. |
1da177e4 LT |
3477 | */ |
3478 | ||
3479 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
3480 | { | |
3481 | struct ata_queued_cmd *qc = NULL; | |
3482 | unsigned int i; | |
3483 | ||
3484 | for (i = 0; i < ATA_MAX_QUEUE; i++) | |
3485 | if (!test_and_set_bit(i, &ap->qactive)) { | |
3486 | qc = ata_qc_from_tag(ap, i); | |
3487 | break; | |
3488 | } | |
3489 | ||
3490 | if (qc) | |
3491 | qc->tag = i; | |
3492 | ||
3493 | return qc; | |
3494 | } | |
3495 | ||
3496 | /** | |
3497 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
3498 | * @ap: Port associated with device @dev | |
3499 | * @dev: Device from whom we request an available command structure | |
3500 | * | |
3501 | * LOCKING: | |
0cba632b | 3502 | * None. |
1da177e4 LT |
3503 | */ |
3504 | ||
3505 | struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, | |
3506 | struct ata_device *dev) | |
3507 | { | |
3508 | struct ata_queued_cmd *qc; | |
3509 | ||
3510 | qc = ata_qc_new(ap); | |
3511 | if (qc) { | |
1da177e4 LT |
3512 | qc->scsicmd = NULL; |
3513 | qc->ap = ap; | |
3514 | qc->dev = dev; | |
1da177e4 | 3515 | |
2c13b7ce | 3516 | ata_qc_reinit(qc); |
1da177e4 LT |
3517 | } |
3518 | ||
3519 | return qc; | |
3520 | } | |
3521 | ||
1da177e4 LT |
3522 | static void __ata_qc_complete(struct ata_queued_cmd *qc) |
3523 | { | |
3524 | struct ata_port *ap = qc->ap; | |
b5632303 | 3525 | unsigned int tag; |
1da177e4 LT |
3526 | |
3527 | qc->flags = 0; | |
3528 | tag = qc->tag; | |
3529 | if (likely(ata_tag_valid(tag))) { | |
3530 | if (tag == ap->active_tag) | |
3531 | ap->active_tag = ATA_TAG_POISON; | |
3532 | qc->tag = ATA_TAG_POISON; | |
1da177e4 | 3533 | clear_bit(tag, &ap->qactive); |
b5632303 | 3534 | } |
1da177e4 LT |
3535 | } |
3536 | ||
3537 | /** | |
3538 | * ata_qc_free - free unused ata_queued_cmd | |
3539 | * @qc: Command to complete | |
3540 | * | |
3541 | * Designed to free unused ata_queued_cmd object | |
3542 | * in case something prevents using it. | |
3543 | * | |
3544 | * LOCKING: | |
0cba632b | 3545 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3546 | */ |
3547 | void ata_qc_free(struct ata_queued_cmd *qc) | |
3548 | { | |
3549 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
1da177e4 LT |
3550 | |
3551 | __ata_qc_complete(qc); | |
3552 | } | |
3553 | ||
3554 | /** | |
3555 | * ata_qc_complete - Complete an active ATA command | |
3556 | * @qc: Command to complete | |
8e8b77dd | 3557 | * @err_mask: ATA Status register contents |
0cba632b JG |
3558 | * |
3559 | * Indicate to the mid and upper layers that an ATA | |
3560 | * command has completed, with either an ok or not-ok status. | |
1da177e4 LT |
3561 | * |
3562 | * LOCKING: | |
0cba632b | 3563 | * spin_lock_irqsave(host_set lock) |
1da177e4 LT |
3564 | */ |
3565 | ||
a22e2eb0 | 3566 | void ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 LT |
3567 | { |
3568 | int rc; | |
3569 | ||
3570 | assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */ | |
3571 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
3572 | ||
3573 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3574 | ata_sg_clean(qc); | |
3575 | ||
3f3791d3 AL |
3576 | /* atapi: mark qc as inactive to prevent the interrupt handler |
3577 | * from completing the command twice later, before the error handler | |
3578 | * is called. (when rc != 0 and atapi request sense is needed) | |
3579 | */ | |
3580 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
3581 | ||
1da177e4 | 3582 | /* call completion callback */ |
a22e2eb0 | 3583 | rc = qc->complete_fn(qc); |
1da177e4 LT |
3584 | |
3585 | /* if callback indicates not to complete command (non-zero), | |
3586 | * return immediately | |
3587 | */ | |
3588 | if (rc != 0) | |
3589 | return; | |
3590 | ||
3591 | __ata_qc_complete(qc); | |
3592 | ||
3593 | VPRINTK("EXIT\n"); | |
3594 | } | |
3595 | ||
3596 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
3597 | { | |
3598 | struct ata_port *ap = qc->ap; | |
3599 | ||
3600 | switch (qc->tf.protocol) { | |
3601 | case ATA_PROT_DMA: | |
3602 | case ATA_PROT_ATAPI_DMA: | |
3603 | return 1; | |
3604 | ||
3605 | case ATA_PROT_ATAPI: | |
3606 | case ATA_PROT_PIO: | |
3607 | case ATA_PROT_PIO_MULT: | |
3608 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
3609 | return 1; | |
3610 | ||
3611 | /* fall through */ | |
3612 | ||
3613 | default: | |
3614 | return 0; | |
3615 | } | |
3616 | ||
3617 | /* never reached */ | |
3618 | } | |
3619 | ||
3620 | /** | |
3621 | * ata_qc_issue - issue taskfile to device | |
3622 | * @qc: command to issue to device | |
3623 | * | |
3624 | * Prepare an ATA command to submission to device. | |
3625 | * This includes mapping the data into a DMA-able | |
3626 | * area, filling in the S/G table, and finally | |
3627 | * writing the taskfile to hardware, starting the command. | |
3628 | * | |
3629 | * LOCKING: | |
3630 | * spin_lock_irqsave(host_set lock) | |
3631 | * | |
3632 | * RETURNS: | |
3633 | * Zero on success, negative on error. | |
3634 | */ | |
3635 | ||
3636 | int ata_qc_issue(struct ata_queued_cmd *qc) | |
3637 | { | |
3638 | struct ata_port *ap = qc->ap; | |
3639 | ||
3640 | if (ata_should_dma_map(qc)) { | |
3641 | if (qc->flags & ATA_QCFLAG_SG) { | |
3642 | if (ata_sg_setup(qc)) | |
3643 | goto err_out; | |
3644 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { | |
3645 | if (ata_sg_setup_one(qc)) | |
3646 | goto err_out; | |
3647 | } | |
3648 | } else { | |
3649 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
3650 | } | |
3651 | ||
3652 | ap->ops->qc_prep(qc); | |
3653 | ||
3654 | qc->ap->active_tag = qc->tag; | |
3655 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
3656 | ||
3657 | return ap->ops->qc_issue(qc); | |
3658 | ||
3659 | err_out: | |
3660 | return -1; | |
3661 | } | |
3662 | ||
0baab86b | 3663 | |
1da177e4 LT |
3664 | /** |
3665 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
3666 | * @qc: command to issue to device | |
3667 | * | |
3668 | * Using various libata functions and hooks, this function | |
3669 | * starts an ATA command. ATA commands are grouped into | |
3670 | * classes called "protocols", and issuing each type of protocol | |
3671 | * is slightly different. | |
3672 | * | |
0baab86b EF |
3673 | * May be used as the qc_issue() entry in ata_port_operations. |
3674 | * | |
1da177e4 LT |
3675 | * LOCKING: |
3676 | * spin_lock_irqsave(host_set lock) | |
3677 | * | |
3678 | * RETURNS: | |
3679 | * Zero on success, negative on error. | |
3680 | */ | |
3681 | ||
3682 | int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |
3683 | { | |
3684 | struct ata_port *ap = qc->ap; | |
3685 | ||
3686 | ata_dev_select(ap, qc->dev->devno, 1, 0); | |
3687 | ||
3688 | switch (qc->tf.protocol) { | |
3689 | case ATA_PROT_NODATA: | |
e5338254 | 3690 | ata_tf_to_host(ap, &qc->tf); |
1da177e4 LT |
3691 | break; |
3692 | ||
3693 | case ATA_PROT_DMA: | |
3694 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
3695 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3696 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
3697 | break; | |
3698 | ||
3699 | case ATA_PROT_PIO: /* load tf registers, initiate polling pio */ | |
3700 | ata_qc_set_polling(qc); | |
e5338254 | 3701 | ata_tf_to_host(ap, &qc->tf); |
14be71f4 | 3702 | ap->hsm_task_state = HSM_ST; |
1da177e4 LT |
3703 | queue_work(ata_wq, &ap->pio_task); |
3704 | break; | |
3705 | ||
3706 | case ATA_PROT_ATAPI: | |
3707 | ata_qc_set_polling(qc); | |
e5338254 | 3708 | ata_tf_to_host(ap, &qc->tf); |
1da177e4 LT |
3709 | queue_work(ata_wq, &ap->packet_task); |
3710 | break; | |
3711 | ||
3712 | case ATA_PROT_ATAPI_NODATA: | |
c1389503 | 3713 | ap->flags |= ATA_FLAG_NOINTR; |
e5338254 | 3714 | ata_tf_to_host(ap, &qc->tf); |
1da177e4 LT |
3715 | queue_work(ata_wq, &ap->packet_task); |
3716 | break; | |
3717 | ||
3718 | case ATA_PROT_ATAPI_DMA: | |
c1389503 | 3719 | ap->flags |= ATA_FLAG_NOINTR; |
1da177e4 LT |
3720 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
3721 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
3722 | queue_work(ata_wq, &ap->packet_task); | |
3723 | break; | |
3724 | ||
3725 | default: | |
3726 | WARN_ON(1); | |
3727 | return -1; | |
3728 | } | |
3729 | ||
3730 | return 0; | |
3731 | } | |
3732 | ||
3733 | /** | |
0baab86b | 3734 | * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction |
1da177e4 LT |
3735 | * @qc: Info associated with this ATA transaction. |
3736 | * | |
3737 | * LOCKING: | |
3738 | * spin_lock_irqsave(host_set lock) | |
3739 | */ | |
3740 | ||
3741 | static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |
3742 | { | |
3743 | struct ata_port *ap = qc->ap; | |
3744 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3745 | u8 dmactl; | |
3746 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3747 | ||
3748 | /* load PRD table addr. */ | |
3749 | mb(); /* make sure PRD table writes are visible to controller */ | |
3750 | writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS); | |
3751 | ||
3752 | /* specify data direction, triple-check start bit is clear */ | |
3753 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3754 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3755 | if (!rw) | |
3756 | dmactl |= ATA_DMA_WR; | |
3757 | writeb(dmactl, mmio + ATA_DMA_CMD); | |
3758 | ||
3759 | /* issue r/w command */ | |
3760 | ap->ops->exec_command(ap, &qc->tf); | |
3761 | } | |
3762 | ||
3763 | /** | |
b73fc89f | 3764 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction |
1da177e4 LT |
3765 | * @qc: Info associated with this ATA transaction. |
3766 | * | |
3767 | * LOCKING: | |
3768 | * spin_lock_irqsave(host_set lock) | |
3769 | */ | |
3770 | ||
3771 | static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc) | |
3772 | { | |
3773 | struct ata_port *ap = qc->ap; | |
3774 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3775 | u8 dmactl; | |
3776 | ||
3777 | /* start host DMA transaction */ | |
3778 | dmactl = readb(mmio + ATA_DMA_CMD); | |
3779 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | |
3780 | ||
3781 | /* Strictly, one may wish to issue a readb() here, to | |
3782 | * flush the mmio write. However, control also passes | |
3783 | * to the hardware at this point, and it will interrupt | |
3784 | * us when we are to resume control. So, in effect, | |
3785 | * we don't care when the mmio write flushes. | |
3786 | * Further, a read of the DMA status register _immediately_ | |
3787 | * following the write may not be what certain flaky hardware | |
3788 | * is expected, so I think it is best to not add a readb() | |
3789 | * without first all the MMIO ATA cards/mobos. | |
3790 | * Or maybe I'm just being paranoid. | |
3791 | */ | |
3792 | } | |
3793 | ||
3794 | /** | |
3795 | * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO) | |
3796 | * @qc: Info associated with this ATA transaction. | |
3797 | * | |
3798 | * LOCKING: | |
3799 | * spin_lock_irqsave(host_set lock) | |
3800 | */ | |
3801 | ||
3802 | static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc) | |
3803 | { | |
3804 | struct ata_port *ap = qc->ap; | |
3805 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); | |
3806 | u8 dmactl; | |
3807 | ||
3808 | /* load PRD table addr. */ | |
3809 | outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); | |
3810 | ||
3811 | /* specify data direction, triple-check start bit is clear */ | |
3812 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3813 | dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); | |
3814 | if (!rw) | |
3815 | dmactl |= ATA_DMA_WR; | |
3816 | outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3817 | ||
3818 | /* issue r/w command */ | |
3819 | ap->ops->exec_command(ap, &qc->tf); | |
3820 | } | |
3821 | ||
3822 | /** | |
3823 | * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO) | |
3824 | * @qc: Info associated with this ATA transaction. | |
3825 | * | |
3826 | * LOCKING: | |
3827 | * spin_lock_irqsave(host_set lock) | |
3828 | */ | |
3829 | ||
3830 | static void ata_bmdma_start_pio (struct ata_queued_cmd *qc) | |
3831 | { | |
3832 | struct ata_port *ap = qc->ap; | |
3833 | u8 dmactl; | |
3834 | ||
3835 | /* start host DMA transaction */ | |
3836 | dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3837 | outb(dmactl | ATA_DMA_START, | |
3838 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3839 | } | |
3840 | ||
0baab86b EF |
3841 | |
3842 | /** | |
3843 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | |
3844 | * @qc: Info associated with this ATA transaction. | |
3845 | * | |
3846 | * Writes the ATA_DMA_START flag to the DMA command register. | |
3847 | * | |
3848 | * May be used as the bmdma_start() entry in ata_port_operations. | |
3849 | * | |
3850 | * LOCKING: | |
3851 | * spin_lock_irqsave(host_set lock) | |
3852 | */ | |
1da177e4 LT |
3853 | void ata_bmdma_start(struct ata_queued_cmd *qc) |
3854 | { | |
3855 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3856 | ata_bmdma_start_mmio(qc); | |
3857 | else | |
3858 | ata_bmdma_start_pio(qc); | |
3859 | } | |
3860 | ||
0baab86b EF |
3861 | |
3862 | /** | |
3863 | * ata_bmdma_setup - Set up PCI IDE BMDMA transaction | |
3864 | * @qc: Info associated with this ATA transaction. | |
3865 | * | |
3866 | * Writes address of PRD table to device's PRD Table Address | |
3867 | * register, sets the DMA control register, and calls | |
3868 | * ops->exec_command() to start the transfer. | |
3869 | * | |
3870 | * May be used as the bmdma_setup() entry in ata_port_operations. | |
3871 | * | |
3872 | * LOCKING: | |
3873 | * spin_lock_irqsave(host_set lock) | |
3874 | */ | |
1da177e4 LT |
3875 | void ata_bmdma_setup(struct ata_queued_cmd *qc) |
3876 | { | |
3877 | if (qc->ap->flags & ATA_FLAG_MMIO) | |
3878 | ata_bmdma_setup_mmio(qc); | |
3879 | else | |
3880 | ata_bmdma_setup_pio(qc); | |
3881 | } | |
3882 | ||
0baab86b EF |
3883 | |
3884 | /** | |
3885 | * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. | |
decc6d0b | 3886 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3887 | * |
3888 | * Clear interrupt and error flags in DMA status register. | |
3889 | * | |
3890 | * May be used as the irq_clear() entry in ata_port_operations. | |
3891 | * | |
3892 | * LOCKING: | |
3893 | * spin_lock_irqsave(host_set lock) | |
3894 | */ | |
3895 | ||
1da177e4 LT |
3896 | void ata_bmdma_irq_clear(struct ata_port *ap) |
3897 | { | |
3898 | if (ap->flags & ATA_FLAG_MMIO) { | |
3899 | void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS; | |
3900 | writeb(readb(mmio), mmio); | |
3901 | } else { | |
3902 | unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS; | |
3903 | outb(inb(addr), addr); | |
3904 | } | |
3905 | ||
3906 | } | |
3907 | ||
0baab86b EF |
3908 | |
3909 | /** | |
3910 | * ata_bmdma_status - Read PCI IDE BMDMA status | |
decc6d0b | 3911 | * @ap: Port associated with this ATA transaction. |
0baab86b EF |
3912 | * |
3913 | * Read and return BMDMA status register. | |
3914 | * | |
3915 | * May be used as the bmdma_status() entry in ata_port_operations. | |
3916 | * | |
3917 | * LOCKING: | |
3918 | * spin_lock_irqsave(host_set lock) | |
3919 | */ | |
3920 | ||
1da177e4 LT |
3921 | u8 ata_bmdma_status(struct ata_port *ap) |
3922 | { | |
3923 | u8 host_stat; | |
3924 | if (ap->flags & ATA_FLAG_MMIO) { | |
3925 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3926 | host_stat = readb(mmio + ATA_DMA_STATUS); | |
3927 | } else | |
ee500aab | 3928 | host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); |
1da177e4 LT |
3929 | return host_stat; |
3930 | } | |
3931 | ||
0baab86b EF |
3932 | |
3933 | /** | |
3934 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | |
b73fc89f | 3935 | * @qc: Command we are ending DMA for |
0baab86b EF |
3936 | * |
3937 | * Clears the ATA_DMA_START flag in the dma control register | |
3938 | * | |
3939 | * May be used as the bmdma_stop() entry in ata_port_operations. | |
3940 | * | |
3941 | * LOCKING: | |
3942 | * spin_lock_irqsave(host_set lock) | |
3943 | */ | |
3944 | ||
b73fc89f | 3945 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
1da177e4 | 3946 | { |
b73fc89f | 3947 | struct ata_port *ap = qc->ap; |
1da177e4 LT |
3948 | if (ap->flags & ATA_FLAG_MMIO) { |
3949 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | |
3950 | ||
3951 | /* clear start/stop bit */ | |
3952 | writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3953 | mmio + ATA_DMA_CMD); | |
3954 | } else { | |
3955 | /* clear start/stop bit */ | |
3956 | outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START, | |
3957 | ap->ioaddr.bmdma_addr + ATA_DMA_CMD); | |
3958 | } | |
3959 | ||
3960 | /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ | |
3961 | ata_altstatus(ap); /* dummy read */ | |
3962 | } | |
3963 | ||
3964 | /** | |
3965 | * ata_host_intr - Handle host interrupt for given (port, task) | |
3966 | * @ap: Port on which interrupt arrived (possibly...) | |
3967 | * @qc: Taskfile currently active in engine | |
3968 | * | |
3969 | * Handle host interrupt for given queued command. Currently, | |
3970 | * only DMA interrupts are handled. All other commands are | |
3971 | * handled via polling with interrupts disabled (nIEN bit). | |
3972 | * | |
3973 | * LOCKING: | |
3974 | * spin_lock_irqsave(host_set lock) | |
3975 | * | |
3976 | * RETURNS: | |
3977 | * One if interrupt was handled, zero if not (shared irq). | |
3978 | */ | |
3979 | ||
3980 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
3981 | struct ata_queued_cmd *qc) | |
3982 | { | |
3983 | u8 status, host_stat; | |
3984 | ||
3985 | switch (qc->tf.protocol) { | |
3986 | ||
3987 | case ATA_PROT_DMA: | |
3988 | case ATA_PROT_ATAPI_DMA: | |
3989 | case ATA_PROT_ATAPI: | |
3990 | /* check status of DMA engine */ | |
3991 | host_stat = ap->ops->bmdma_status(ap); | |
3992 | VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat); | |
3993 | ||
3994 | /* if it's not our irq... */ | |
3995 | if (!(host_stat & ATA_DMA_INTR)) | |
3996 | goto idle_irq; | |
3997 | ||
3998 | /* before we do anything else, clear DMA-Start bit */ | |
b73fc89f | 3999 | ap->ops->bmdma_stop(qc); |
1da177e4 LT |
4000 | |
4001 | /* fall through */ | |
4002 | ||
4003 | case ATA_PROT_ATAPI_NODATA: | |
4004 | case ATA_PROT_NODATA: | |
4005 | /* check altstatus */ | |
4006 | status = ata_altstatus(ap); | |
4007 | if (status & ATA_BUSY) | |
4008 | goto idle_irq; | |
4009 | ||
4010 | /* check main status, clearing INTRQ */ | |
4011 | status = ata_chk_status(ap); | |
4012 | if (unlikely(status & ATA_BUSY)) | |
4013 | goto idle_irq; | |
4014 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | |
4015 | ap->id, qc->tf.protocol, status); | |
4016 | ||
4017 | /* ack bmdma irq events */ | |
4018 | ap->ops->irq_clear(ap); | |
4019 | ||
4020 | /* complete taskfile transaction */ | |
a22e2eb0 AL |
4021 | qc->err_mask |= ac_err_mask(status); |
4022 | ata_qc_complete(qc); | |
1da177e4 LT |
4023 | break; |
4024 | ||
4025 | default: | |
4026 | goto idle_irq; | |
4027 | } | |
4028 | ||
4029 | return 1; /* irq handled */ | |
4030 | ||
4031 | idle_irq: | |
4032 | ap->stats.idle_irq++; | |
4033 | ||
4034 | #ifdef ATA_IRQ_TRAP | |
4035 | if ((ap->stats.idle_irq % 1000) == 0) { | |
4036 | handled = 1; | |
4037 | ata_irq_ack(ap, 0); /* debug trap */ | |
4038 | printk(KERN_WARNING "ata%d: irq trap\n", ap->id); | |
4039 | } | |
4040 | #endif | |
4041 | return 0; /* irq not handled */ | |
4042 | } | |
4043 | ||
4044 | /** | |
4045 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b JG |
4046 | * @irq: irq line (unused) |
4047 | * @dev_instance: pointer to our ata_host_set information structure | |
1da177e4 LT |
4048 | * @regs: unused |
4049 | * | |
0cba632b JG |
4050 | * Default interrupt handler for PCI IDE devices. Calls |
4051 | * ata_host_intr() for each port that is not disabled. | |
4052 | * | |
1da177e4 | 4053 | * LOCKING: |
0cba632b | 4054 | * Obtains host_set lock during operation. |
1da177e4 LT |
4055 | * |
4056 | * RETURNS: | |
0cba632b | 4057 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
4058 | */ |
4059 | ||
4060 | irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |
4061 | { | |
4062 | struct ata_host_set *host_set = dev_instance; | |
4063 | unsigned int i; | |
4064 | unsigned int handled = 0; | |
4065 | unsigned long flags; | |
4066 | ||
4067 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
4068 | spin_lock_irqsave(&host_set->lock, flags); | |
4069 | ||
4070 | for (i = 0; i < host_set->n_ports; i++) { | |
4071 | struct ata_port *ap; | |
4072 | ||
4073 | ap = host_set->ports[i]; | |
c1389503 TH |
4074 | if (ap && |
4075 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | |
1da177e4 LT |
4076 | struct ata_queued_cmd *qc; |
4077 | ||
4078 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
21b1ed74 AL |
4079 | if (qc && (!(qc->tf.ctl & ATA_NIEN)) && |
4080 | (qc->flags & ATA_QCFLAG_ACTIVE)) | |
1da177e4 LT |
4081 | handled |= ata_host_intr(ap, qc); |
4082 | } | |
4083 | } | |
4084 | ||
4085 | spin_unlock_irqrestore(&host_set->lock, flags); | |
4086 | ||
4087 | return IRQ_RETVAL(handled); | |
4088 | } | |
4089 | ||
4090 | /** | |
4091 | * atapi_packet_task - Write CDB bytes to hardware | |
4092 | * @_data: Port to which ATAPI device is attached. | |
4093 | * | |
4094 | * When device has indicated its readiness to accept | |
4095 | * a CDB, this function is called. Send the CDB. | |
4096 | * If DMA is to be performed, exit immediately. | |
4097 | * Otherwise, we are in polling mode, so poll | |
4098 | * status under operation succeeds or fails. | |
4099 | * | |
4100 | * LOCKING: | |
4101 | * Kernel thread context (may sleep) | |
4102 | */ | |
4103 | ||
4104 | static void atapi_packet_task(void *_data) | |
4105 | { | |
4106 | struct ata_port *ap = _data; | |
4107 | struct ata_queued_cmd *qc; | |
4108 | u8 status; | |
4109 | ||
4110 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
4111 | assert(qc != NULL); | |
4112 | assert(qc->flags & ATA_QCFLAG_ACTIVE); | |
4113 | ||
4114 | /* sleep-wait for BSY to clear */ | |
4115 | DPRINTK("busy wait\n"); | |
d8fe452b AL |
4116 | if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) { |
4117 | qc->err_mask |= AC_ERR_ATA_BUS; | |
4118 | goto err_out; | |
4119 | } | |
1da177e4 LT |
4120 | |
4121 | /* make sure DRQ is set */ | |
4122 | status = ata_chk_status(ap); | |
d8fe452b AL |
4123 | if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) { |
4124 | qc->err_mask |= AC_ERR_ATA_BUS; | |
1da177e4 | 4125 | goto err_out; |
d8fe452b | 4126 | } |
1da177e4 LT |
4127 | |
4128 | /* send SCSI cdb */ | |
4129 | DPRINTK("send cdb\n"); | |
4130 | assert(ap->cdb_len >= 12); | |
1da177e4 | 4131 | |
c1389503 TH |
4132 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || |
4133 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | |
4134 | unsigned long flags; | |
1da177e4 | 4135 | |
c1389503 TH |
4136 | /* Once we're done issuing command and kicking bmdma, |
4137 | * irq handler takes over. To not lose irq, we need | |
4138 | * to clear NOINTR flag before sending cdb, but | |
4139 | * interrupt handler shouldn't be invoked before we're | |
4140 | * finished. Hence, the following locking. | |
4141 | */ | |
4142 | spin_lock_irqsave(&ap->host_set->lock, flags); | |
4143 | ap->flags &= ~ATA_FLAG_NOINTR; | |
4144 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
4145 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | |
4146 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
4147 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | |
4148 | } else { | |
4149 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | |
1da177e4 | 4150 | |
c1389503 | 4151 | /* PIO commands are handled by polling */ |
14be71f4 | 4152 | ap->hsm_task_state = HSM_ST; |
1da177e4 LT |
4153 | queue_work(ata_wq, &ap->pio_task); |
4154 | } | |
4155 | ||
4156 | return; | |
4157 | ||
4158 | err_out: | |
a22e2eb0 | 4159 | ata_poll_qc_complete(qc); |
1da177e4 LT |
4160 | } |
4161 | ||
0baab86b EF |
4162 | |
4163 | /** | |
4164 | * ata_port_start - Set port up for dma. | |
4165 | * @ap: Port to initialize | |
4166 | * | |
4167 | * Called just after data structures for each port are | |
4168 | * initialized. Allocates space for PRD table. | |
4169 | * | |
4170 | * May be used as the port_start() entry in ata_port_operations. | |
4171 | * | |
4172 | * LOCKING: | |
6f0ef4fa | 4173 | * Inherited from caller. |
0baab86b EF |
4174 | */ |
4175 | ||
9b847548 JA |
4176 | /* |
4177 | * Execute a 'simple' command, that only consists of the opcode 'cmd' itself, | |
4178 | * without filling any other registers | |
4179 | */ | |
4180 | static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev, | |
4181 | u8 cmd) | |
4182 | { | |
4183 | struct ata_taskfile tf; | |
4184 | int err; | |
4185 | ||
4186 | ata_tf_init(ap, &tf, dev->devno); | |
4187 | ||
4188 | tf.command = cmd; | |
4189 | tf.flags |= ATA_TFLAG_DEVICE; | |
4190 | tf.protocol = ATA_PROT_NODATA; | |
4191 | ||
4192 | err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0); | |
4193 | if (err) | |
4194 | printk(KERN_ERR "%s: ata command failed: %d\n", | |
4195 | __FUNCTION__, err); | |
4196 | ||
4197 | return err; | |
4198 | } | |
4199 | ||
4200 | static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev) | |
4201 | { | |
4202 | u8 cmd; | |
4203 | ||
4204 | if (!ata_try_flush_cache(dev)) | |
4205 | return 0; | |
4206 | ||
4207 | if (ata_id_has_flush_ext(dev->id)) | |
4208 | cmd = ATA_CMD_FLUSH_EXT; | |
4209 | else | |
4210 | cmd = ATA_CMD_FLUSH; | |
4211 | ||
4212 | return ata_do_simple_cmd(ap, dev, cmd); | |
4213 | } | |
4214 | ||
4215 | static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev) | |
4216 | { | |
4217 | return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1); | |
4218 | } | |
4219 | ||
4220 | static int ata_start_drive(struct ata_port *ap, struct ata_device *dev) | |
4221 | { | |
4222 | return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE); | |
4223 | } | |
4224 | ||
4225 | /** | |
4226 | * ata_device_resume - wakeup a previously suspended devices | |
4227 | * | |
4228 | * Kick the drive back into action, by sending it an idle immediate | |
4229 | * command and making sure its transfer mode matches between drive | |
4230 | * and host. | |
4231 | * | |
4232 | */ | |
4233 | int ata_device_resume(struct ata_port *ap, struct ata_device *dev) | |
4234 | { | |
4235 | if (ap->flags & ATA_FLAG_SUSPENDED) { | |
4236 | ap->flags &= ~ATA_FLAG_SUSPENDED; | |
4237 | ata_set_mode(ap); | |
4238 | } | |
4239 | if (!ata_dev_present(dev)) | |
4240 | return 0; | |
4241 | if (dev->class == ATA_DEV_ATA) | |
4242 | ata_start_drive(ap, dev); | |
4243 | ||
4244 | return 0; | |
4245 | } | |
4246 | ||
4247 | /** | |
4248 | * ata_device_suspend - prepare a device for suspend | |
4249 | * | |
4250 | * Flush the cache on the drive, if appropriate, then issue a | |
4251 | * standbynow command. | |
4252 | * | |
4253 | */ | |
4254 | int ata_device_suspend(struct ata_port *ap, struct ata_device *dev) | |
4255 | { | |
4256 | if (!ata_dev_present(dev)) | |
4257 | return 0; | |
4258 | if (dev->class == ATA_DEV_ATA) | |
4259 | ata_flush_cache(ap, dev); | |
4260 | ||
4261 | ata_standby_drive(ap, dev); | |
4262 | ap->flags |= ATA_FLAG_SUSPENDED; | |
4263 | return 0; | |
4264 | } | |
4265 | ||
1da177e4 LT |
4266 | int ata_port_start (struct ata_port *ap) |
4267 | { | |
4268 | struct device *dev = ap->host_set->dev; | |
6037d6bb | 4269 | int rc; |
1da177e4 LT |
4270 | |
4271 | ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL); | |
4272 | if (!ap->prd) | |
4273 | return -ENOMEM; | |
4274 | ||
6037d6bb JG |
4275 | rc = ata_pad_alloc(ap, dev); |
4276 | if (rc) { | |
cedc9a47 | 4277 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); |
6037d6bb | 4278 | return rc; |
cedc9a47 JG |
4279 | } |
4280 | ||
1da177e4 LT |
4281 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma); |
4282 | ||
4283 | return 0; | |
4284 | } | |
4285 | ||
0baab86b EF |
4286 | |
4287 | /** | |
4288 | * ata_port_stop - Undo ata_port_start() | |
4289 | * @ap: Port to shut down | |
4290 | * | |
4291 | * Frees the PRD table. | |
4292 | * | |
4293 | * May be used as the port_stop() entry in ata_port_operations. | |
4294 | * | |
4295 | * LOCKING: | |
6f0ef4fa | 4296 | * Inherited from caller. |
0baab86b EF |
4297 | */ |
4298 | ||
1da177e4 LT |
4299 | void ata_port_stop (struct ata_port *ap) |
4300 | { | |
4301 | struct device *dev = ap->host_set->dev; | |
4302 | ||
4303 | dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma); | |
6037d6bb | 4304 | ata_pad_free(ap, dev); |
1da177e4 LT |
4305 | } |
4306 | ||
aa8f0dc6 JG |
4307 | void ata_host_stop (struct ata_host_set *host_set) |
4308 | { | |
4309 | if (host_set->mmio_base) | |
4310 | iounmap(host_set->mmio_base); | |
4311 | } | |
4312 | ||
4313 | ||
1da177e4 LT |
4314 | /** |
4315 | * ata_host_remove - Unregister SCSI host structure with upper layers | |
4316 | * @ap: Port to unregister | |
4317 | * @do_unregister: 1 if we fully unregister, 0 to just stop the port | |
4318 | * | |
4319 | * LOCKING: | |
6f0ef4fa | 4320 | * Inherited from caller. |
1da177e4 LT |
4321 | */ |
4322 | ||
4323 | static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister) | |
4324 | { | |
4325 | struct Scsi_Host *sh = ap->host; | |
4326 | ||
4327 | DPRINTK("ENTER\n"); | |
4328 | ||
4329 | if (do_unregister) | |
4330 | scsi_remove_host(sh); | |
4331 | ||
4332 | ap->ops->port_stop(ap); | |
4333 | } | |
4334 | ||
4335 | /** | |
4336 | * ata_host_init - Initialize an ata_port structure | |
4337 | * @ap: Structure to initialize | |
4338 | * @host: associated SCSI mid-layer structure | |
4339 | * @host_set: Collection of hosts to which @ap belongs | |
4340 | * @ent: Probe information provided by low-level driver | |
4341 | * @port_no: Port number associated with this ata_port | |
4342 | * | |
0cba632b JG |
4343 | * Initialize a new ata_port structure, and its associated |
4344 | * scsi_host. | |
4345 | * | |
1da177e4 | 4346 | * LOCKING: |
0cba632b | 4347 | * Inherited from caller. |
1da177e4 LT |
4348 | */ |
4349 | ||
4350 | static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host, | |
4351 | struct ata_host_set *host_set, | |
057ace5e | 4352 | const struct ata_probe_ent *ent, unsigned int port_no) |
1da177e4 LT |
4353 | { |
4354 | unsigned int i; | |
4355 | ||
4356 | host->max_id = 16; | |
4357 | host->max_lun = 1; | |
4358 | host->max_channel = 1; | |
4359 | host->unique_id = ata_unique_id++; | |
4360 | host->max_cmd_len = 12; | |
12413197 | 4361 | |
1da177e4 LT |
4362 | ap->flags = ATA_FLAG_PORT_DISABLED; |
4363 | ap->id = host->unique_id; | |
4364 | ap->host = host; | |
4365 | ap->ctl = ATA_DEVCTL_OBS; | |
4366 | ap->host_set = host_set; | |
4367 | ap->port_no = port_no; | |
4368 | ap->hard_port_no = | |
4369 | ent->legacy_mode ? ent->hard_port_no : port_no; | |
4370 | ap->pio_mask = ent->pio_mask; | |
4371 | ap->mwdma_mask = ent->mwdma_mask; | |
4372 | ap->udma_mask = ent->udma_mask; | |
4373 | ap->flags |= ent->host_flags; | |
4374 | ap->ops = ent->port_ops; | |
4375 | ap->cbl = ATA_CBL_NONE; | |
4376 | ap->active_tag = ATA_TAG_POISON; | |
4377 | ap->last_ctl = 0xFF; | |
4378 | ||
4379 | INIT_WORK(&ap->packet_task, atapi_packet_task, ap); | |
4380 | INIT_WORK(&ap->pio_task, ata_pio_task, ap); | |
4381 | ||
4382 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
4383 | ap->device[i].devno = i; | |
4384 | ||
4385 | #ifdef ATA_IRQ_TRAP | |
4386 | ap->stats.unhandled_irq = 1; | |
4387 | ap->stats.idle_irq = 1; | |
4388 | #endif | |
4389 | ||
4390 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
4391 | } | |
4392 | ||
4393 | /** | |
4394 | * ata_host_add - Attach low-level ATA driver to system | |
4395 | * @ent: Information provided by low-level driver | |
4396 | * @host_set: Collections of ports to which we add | |
4397 | * @port_no: Port number associated with this host | |
4398 | * | |
0cba632b JG |
4399 | * Attach low-level ATA driver to system. |
4400 | * | |
1da177e4 | 4401 | * LOCKING: |
0cba632b | 4402 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4403 | * |
4404 | * RETURNS: | |
0cba632b | 4405 | * New ata_port on success, for NULL on error. |
1da177e4 LT |
4406 | */ |
4407 | ||
057ace5e | 4408 | static struct ata_port * ata_host_add(const struct ata_probe_ent *ent, |
1da177e4 LT |
4409 | struct ata_host_set *host_set, |
4410 | unsigned int port_no) | |
4411 | { | |
4412 | struct Scsi_Host *host; | |
4413 | struct ata_port *ap; | |
4414 | int rc; | |
4415 | ||
4416 | DPRINTK("ENTER\n"); | |
4417 | host = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
4418 | if (!host) | |
4419 | return NULL; | |
4420 | ||
4421 | ap = (struct ata_port *) &host->hostdata[0]; | |
4422 | ||
4423 | ata_host_init(ap, host, host_set, ent, port_no); | |
4424 | ||
4425 | rc = ap->ops->port_start(ap); | |
4426 | if (rc) | |
4427 | goto err_out; | |
4428 | ||
4429 | return ap; | |
4430 | ||
4431 | err_out: | |
4432 | scsi_host_put(host); | |
4433 | return NULL; | |
4434 | } | |
4435 | ||
4436 | /** | |
0cba632b JG |
4437 | * ata_device_add - Register hardware device with ATA and SCSI layers |
4438 | * @ent: Probe information describing hardware device to be registered | |
4439 | * | |
4440 | * This function processes the information provided in the probe | |
4441 | * information struct @ent, allocates the necessary ATA and SCSI | |
4442 | * host information structures, initializes them, and registers | |
4443 | * everything with requisite kernel subsystems. | |
4444 | * | |
4445 | * This function requests irqs, probes the ATA bus, and probes | |
4446 | * the SCSI bus. | |
1da177e4 LT |
4447 | * |
4448 | * LOCKING: | |
0cba632b | 4449 | * PCI/etc. bus probe sem. |
1da177e4 LT |
4450 | * |
4451 | * RETURNS: | |
0cba632b | 4452 | * Number of ports registered. Zero on error (no ports registered). |
1da177e4 LT |
4453 | */ |
4454 | ||
057ace5e | 4455 | int ata_device_add(const struct ata_probe_ent *ent) |
1da177e4 LT |
4456 | { |
4457 | unsigned int count = 0, i; | |
4458 | struct device *dev = ent->dev; | |
4459 | struct ata_host_set *host_set; | |
4460 | ||
4461 | DPRINTK("ENTER\n"); | |
4462 | /* alloc a container for our list of ATA ports (buses) */ | |
57f3bda8 | 4463 | host_set = kzalloc(sizeof(struct ata_host_set) + |
1da177e4 LT |
4464 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); |
4465 | if (!host_set) | |
4466 | return 0; | |
1da177e4 LT |
4467 | spin_lock_init(&host_set->lock); |
4468 | ||
4469 | host_set->dev = dev; | |
4470 | host_set->n_ports = ent->n_ports; | |
4471 | host_set->irq = ent->irq; | |
4472 | host_set->mmio_base = ent->mmio_base; | |
4473 | host_set->private_data = ent->private_data; | |
4474 | host_set->ops = ent->port_ops; | |
4475 | ||
4476 | /* register each port bound to this device */ | |
4477 | for (i = 0; i < ent->n_ports; i++) { | |
4478 | struct ata_port *ap; | |
4479 | unsigned long xfer_mode_mask; | |
4480 | ||
4481 | ap = ata_host_add(ent, host_set, i); | |
4482 | if (!ap) | |
4483 | goto err_out; | |
4484 | ||
4485 | host_set->ports[i] = ap; | |
4486 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
4487 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
4488 | (ap->pio_mask << ATA_SHIFT_PIO); | |
4489 | ||
4490 | /* print per-port info to dmesg */ | |
4491 | printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX " | |
4492 | "bmdma 0x%lX irq %lu\n", | |
4493 | ap->id, | |
4494 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
4495 | ata_mode_string(xfer_mode_mask), | |
4496 | ap->ioaddr.cmd_addr, | |
4497 | ap->ioaddr.ctl_addr, | |
4498 | ap->ioaddr.bmdma_addr, | |
4499 | ent->irq); | |
4500 | ||
4501 | ata_chk_status(ap); | |
4502 | host_set->ops->irq_clear(ap); | |
4503 | count++; | |
4504 | } | |
4505 | ||
57f3bda8 RD |
4506 | if (!count) |
4507 | goto err_free_ret; | |
1da177e4 LT |
4508 | |
4509 | /* obtain irq, that is shared between channels */ | |
4510 | if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags, | |
4511 | DRV_NAME, host_set)) | |
4512 | goto err_out; | |
4513 | ||
4514 | /* perform each probe synchronously */ | |
4515 | DPRINTK("probe begin\n"); | |
4516 | for (i = 0; i < count; i++) { | |
4517 | struct ata_port *ap; | |
4518 | int rc; | |
4519 | ||
4520 | ap = host_set->ports[i]; | |
4521 | ||
4522 | DPRINTK("ata%u: probe begin\n", ap->id); | |
4523 | rc = ata_bus_probe(ap); | |
4524 | DPRINTK("ata%u: probe end\n", ap->id); | |
4525 | ||
4526 | if (rc) { | |
4527 | /* FIXME: do something useful here? | |
4528 | * Current libata behavior will | |
4529 | * tear down everything when | |
4530 | * the module is removed | |
4531 | * or the h/w is unplugged. | |
4532 | */ | |
4533 | } | |
4534 | ||
4535 | rc = scsi_add_host(ap->host, dev); | |
4536 | if (rc) { | |
4537 | printk(KERN_ERR "ata%u: scsi_add_host failed\n", | |
4538 | ap->id); | |
4539 | /* FIXME: do something useful here */ | |
4540 | /* FIXME: handle unconditional calls to | |
4541 | * scsi_scan_host and ata_host_remove, below, | |
4542 | * at the very least | |
4543 | */ | |
4544 | } | |
4545 | } | |
4546 | ||
4547 | /* probes are done, now scan each port's disk(s) */ | |
4548 | DPRINTK("probe begin\n"); | |
4549 | for (i = 0; i < count; i++) { | |
4550 | struct ata_port *ap = host_set->ports[i]; | |
4551 | ||
644dd0cc | 4552 | ata_scsi_scan_host(ap); |
1da177e4 LT |
4553 | } |
4554 | ||
4555 | dev_set_drvdata(dev, host_set); | |
4556 | ||
4557 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
4558 | return ent->n_ports; /* success */ | |
4559 | ||
4560 | err_out: | |
4561 | for (i = 0; i < count; i++) { | |
4562 | ata_host_remove(host_set->ports[i], 1); | |
4563 | scsi_host_put(host_set->ports[i]->host); | |
4564 | } | |
57f3bda8 | 4565 | err_free_ret: |
1da177e4 LT |
4566 | kfree(host_set); |
4567 | VPRINTK("EXIT, returning 0\n"); | |
4568 | return 0; | |
4569 | } | |
4570 | ||
17b14451 AC |
4571 | /** |
4572 | * ata_host_set_remove - PCI layer callback for device removal | |
4573 | * @host_set: ATA host set that was removed | |
4574 | * | |
4575 | * Unregister all objects associated with this host set. Free those | |
4576 | * objects. | |
4577 | * | |
4578 | * LOCKING: | |
4579 | * Inherited from calling layer (may sleep). | |
4580 | */ | |
4581 | ||
17b14451 AC |
4582 | void ata_host_set_remove(struct ata_host_set *host_set) |
4583 | { | |
4584 | struct ata_port *ap; | |
4585 | unsigned int i; | |
4586 | ||
4587 | for (i = 0; i < host_set->n_ports; i++) { | |
4588 | ap = host_set->ports[i]; | |
4589 | scsi_remove_host(ap->host); | |
4590 | } | |
4591 | ||
4592 | free_irq(host_set->irq, host_set); | |
4593 | ||
4594 | for (i = 0; i < host_set->n_ports; i++) { | |
4595 | ap = host_set->ports[i]; | |
4596 | ||
4597 | ata_scsi_release(ap->host); | |
4598 | ||
4599 | if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) { | |
4600 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
4601 | ||
4602 | if (ioaddr->cmd_addr == 0x1f0) | |
4603 | release_region(0x1f0, 8); | |
4604 | else if (ioaddr->cmd_addr == 0x170) | |
4605 | release_region(0x170, 8); | |
4606 | } | |
4607 | ||
4608 | scsi_host_put(ap->host); | |
4609 | } | |
4610 | ||
4611 | if (host_set->ops->host_stop) | |
4612 | host_set->ops->host_stop(host_set); | |
4613 | ||
4614 | kfree(host_set); | |
4615 | } | |
4616 | ||
1da177e4 LT |
4617 | /** |
4618 | * ata_scsi_release - SCSI layer callback hook for host unload | |
4619 | * @host: libata host to be unloaded | |
4620 | * | |
4621 | * Performs all duties necessary to shut down a libata port... | |
4622 | * Kill port kthread, disable port, and release resources. | |
4623 | * | |
4624 | * LOCKING: | |
4625 | * Inherited from SCSI layer. | |
4626 | * | |
4627 | * RETURNS: | |
4628 | * One. | |
4629 | */ | |
4630 | ||
4631 | int ata_scsi_release(struct Scsi_Host *host) | |
4632 | { | |
4633 | struct ata_port *ap = (struct ata_port *) &host->hostdata[0]; | |
4634 | ||
4635 | DPRINTK("ENTER\n"); | |
4636 | ||
4637 | ap->ops->port_disable(ap); | |
4638 | ata_host_remove(ap, 0); | |
4639 | ||
4640 | DPRINTK("EXIT\n"); | |
4641 | return 1; | |
4642 | } | |
4643 | ||
4644 | /** | |
4645 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
4646 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
4647 | * |
4648 | * Utility function which initializes data_addr, error_addr, | |
4649 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
4650 | * device_addr, status_addr, and command_addr to standard offsets | |
4651 | * relative to cmd_addr. | |
4652 | * | |
4653 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 4654 | */ |
0baab86b | 4655 | |
1da177e4 LT |
4656 | void ata_std_ports(struct ata_ioports *ioaddr) |
4657 | { | |
4658 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
4659 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
4660 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
4661 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
4662 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
4663 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
4664 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
4665 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
4666 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
4667 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
4668 | } | |
4669 | ||
4670 | static struct ata_probe_ent * | |
057ace5e | 4671 | ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port) |
1da177e4 LT |
4672 | { |
4673 | struct ata_probe_ent *probe_ent; | |
4674 | ||
57f3bda8 | 4675 | probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL); |
1da177e4 LT |
4676 | if (!probe_ent) { |
4677 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
4678 | kobject_name(&(dev->kobj))); | |
4679 | return NULL; | |
4680 | } | |
4681 | ||
1da177e4 LT |
4682 | INIT_LIST_HEAD(&probe_ent->node); |
4683 | probe_ent->dev = dev; | |
4684 | ||
4685 | probe_ent->sht = port->sht; | |
4686 | probe_ent->host_flags = port->host_flags; | |
4687 | probe_ent->pio_mask = port->pio_mask; | |
4688 | probe_ent->mwdma_mask = port->mwdma_mask; | |
4689 | probe_ent->udma_mask = port->udma_mask; | |
4690 | probe_ent->port_ops = port->port_ops; | |
4691 | ||
4692 | return probe_ent; | |
4693 | } | |
4694 | ||
0baab86b EF |
4695 | |
4696 | ||
374b1873 JG |
4697 | #ifdef CONFIG_PCI |
4698 | ||
4699 | void ata_pci_host_stop (struct ata_host_set *host_set) | |
4700 | { | |
4701 | struct pci_dev *pdev = to_pci_dev(host_set->dev); | |
4702 | ||
4703 | pci_iounmap(pdev, host_set->mmio_base); | |
4704 | } | |
4705 | ||
0baab86b EF |
4706 | /** |
4707 | * ata_pci_init_native_mode - Initialize native-mode driver | |
4708 | * @pdev: pci device to be initialized | |
4709 | * @port: array[2] of pointers to port info structures. | |
47a86593 | 4710 | * @ports: bitmap of ports present |
0baab86b EF |
4711 | * |
4712 | * Utility function which allocates and initializes an | |
4713 | * ata_probe_ent structure for a standard dual-port | |
4714 | * PIO-based IDE controller. The returned ata_probe_ent | |
4715 | * structure can be passed to ata_device_add(). The returned | |
4716 | * ata_probe_ent structure should then be freed with kfree(). | |
47a86593 AC |
4717 | * |
4718 | * The caller need only pass the address of the primary port, the | |
4719 | * secondary will be deduced automatically. If the device has non | |
4720 | * standard secondary port mappings this function can be called twice, | |
4721 | * once for each interface. | |
0baab86b EF |
4722 | */ |
4723 | ||
1da177e4 | 4724 | struct ata_probe_ent * |
47a86593 | 4725 | ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports) |
1da177e4 LT |
4726 | { |
4727 | struct ata_probe_ent *probe_ent = | |
4728 | ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]); | |
47a86593 AC |
4729 | int p = 0; |
4730 | ||
1da177e4 LT |
4731 | if (!probe_ent) |
4732 | return NULL; | |
4733 | ||
1da177e4 LT |
4734 | probe_ent->irq = pdev->irq; |
4735 | probe_ent->irq_flags = SA_SHIRQ; | |
e99f8b5e | 4736 | probe_ent->private_data = port[0]->private_data; |
1da177e4 | 4737 | |
47a86593 AC |
4738 | if (ports & ATA_PORT_PRIMARY) { |
4739 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0); | |
4740 | probe_ent->port[p].altstatus_addr = | |
4741 | probe_ent->port[p].ctl_addr = | |
4742 | pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS; | |
4743 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4); | |
4744 | ata_std_ports(&probe_ent->port[p]); | |
4745 | p++; | |
4746 | } | |
1da177e4 | 4747 | |
47a86593 AC |
4748 | if (ports & ATA_PORT_SECONDARY) { |
4749 | probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2); | |
4750 | probe_ent->port[p].altstatus_addr = | |
4751 | probe_ent->port[p].ctl_addr = | |
4752 | pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS; | |
4753 | probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8; | |
4754 | ata_std_ports(&probe_ent->port[p]); | |
4755 | p++; | |
4756 | } | |
1da177e4 | 4757 | |
47a86593 | 4758 | probe_ent->n_ports = p; |
1da177e4 LT |
4759 | return probe_ent; |
4760 | } | |
4761 | ||
0f0d5192 | 4762 | static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num) |
1da177e4 | 4763 | { |
47a86593 | 4764 | struct ata_probe_ent *probe_ent; |
1da177e4 | 4765 | |
0f0d5192 | 4766 | probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port); |
1da177e4 LT |
4767 | if (!probe_ent) |
4768 | return NULL; | |
1da177e4 | 4769 | |
1da177e4 | 4770 | probe_ent->legacy_mode = 1; |
47a86593 AC |
4771 | probe_ent->n_ports = 1; |
4772 | probe_ent->hard_port_no = port_num; | |
e99f8b5e | 4773 | probe_ent->private_data = port->private_data; |
47a86593 AC |
4774 | |
4775 | switch(port_num) | |
4776 | { | |
4777 | case 0: | |
4778 | probe_ent->irq = 14; | |
4779 | probe_ent->port[0].cmd_addr = 0x1f0; | |
4780 | probe_ent->port[0].altstatus_addr = | |
4781 | probe_ent->port[0].ctl_addr = 0x3f6; | |
4782 | break; | |
4783 | case 1: | |
4784 | probe_ent->irq = 15; | |
4785 | probe_ent->port[0].cmd_addr = 0x170; | |
4786 | probe_ent->port[0].altstatus_addr = | |
4787 | probe_ent->port[0].ctl_addr = 0x376; | |
4788 | break; | |
4789 | } | |
4790 | probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num; | |
1da177e4 | 4791 | ata_std_ports(&probe_ent->port[0]); |
1da177e4 LT |
4792 | return probe_ent; |
4793 | } | |
4794 | ||
4795 | /** | |
4796 | * ata_pci_init_one - Initialize/register PCI IDE host controller | |
4797 | * @pdev: Controller to be initialized | |
4798 | * @port_info: Information from low-level host driver | |
4799 | * @n_ports: Number of ports attached to host controller | |
4800 | * | |
0baab86b EF |
4801 | * This is a helper function which can be called from a driver's |
4802 | * xxx_init_one() probe function if the hardware uses traditional | |
4803 | * IDE taskfile registers. | |
4804 | * | |
4805 | * This function calls pci_enable_device(), reserves its register | |
4806 | * regions, sets the dma mask, enables bus master mode, and calls | |
4807 | * ata_device_add() | |
4808 | * | |
1da177e4 LT |
4809 | * LOCKING: |
4810 | * Inherited from PCI layer (may sleep). | |
4811 | * | |
4812 | * RETURNS: | |
0cba632b | 4813 | * Zero on success, negative on errno-based value on error. |
1da177e4 LT |
4814 | */ |
4815 | ||
4816 | int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, | |
4817 | unsigned int n_ports) | |
4818 | { | |
47a86593 | 4819 | struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL; |
1da177e4 LT |
4820 | struct ata_port_info *port[2]; |
4821 | u8 tmp8, mask; | |
4822 | unsigned int legacy_mode = 0; | |
4823 | int disable_dev_on_err = 1; | |
4824 | int rc; | |
4825 | ||
4826 | DPRINTK("ENTER\n"); | |
4827 | ||
4828 | port[0] = port_info[0]; | |
4829 | if (n_ports > 1) | |
4830 | port[1] = port_info[1]; | |
4831 | else | |
4832 | port[1] = port[0]; | |
4833 | ||
4834 | if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0 | |
4835 | && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { | |
47a86593 | 4836 | /* TODO: What if one channel is in native mode ... */ |
1da177e4 LT |
4837 | pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); |
4838 | mask = (1 << 2) | (1 << 0); | |
4839 | if ((tmp8 & mask) != mask) | |
4840 | legacy_mode = (1 << 3); | |
4841 | } | |
4842 | ||
4843 | /* FIXME... */ | |
47a86593 AC |
4844 | if ((!legacy_mode) && (n_ports > 2)) { |
4845 | printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n"); | |
4846 | n_ports = 2; | |
4847 | /* For now */ | |
1da177e4 LT |
4848 | } |
4849 | ||
47a86593 AC |
4850 | /* FIXME: Really for ATA it isn't safe because the device may be |
4851 | multi-purpose and we want to leave it alone if it was already | |
4852 | enabled. Secondly for shared use as Arjan says we want refcounting | |
4853 | ||
4854 | Checking dev->is_enabled is insufficient as this is not set at | |
4855 | boot for the primary video which is BIOS enabled | |
4856 | */ | |
4857 | ||
1da177e4 LT |
4858 | rc = pci_enable_device(pdev); |
4859 | if (rc) | |
4860 | return rc; | |
4861 | ||
4862 | rc = pci_request_regions(pdev, DRV_NAME); | |
4863 | if (rc) { | |
4864 | disable_dev_on_err = 0; | |
4865 | goto err_out; | |
4866 | } | |
4867 | ||
47a86593 | 4868 | /* FIXME: Should use platform specific mappers for legacy port ranges */ |
1da177e4 LT |
4869 | if (legacy_mode) { |
4870 | if (!request_region(0x1f0, 8, "libata")) { | |
4871 | struct resource *conflict, res; | |
4872 | res.start = 0x1f0; | |
4873 | res.end = 0x1f0 + 8 - 1; | |
4874 | conflict = ____request_resource(&ioport_resource, &res); | |
4875 | if (!strcmp(conflict->name, "libata")) | |
4876 | legacy_mode |= (1 << 0); | |
4877 | else { | |
4878 | disable_dev_on_err = 0; | |
4879 | printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n"); | |
4880 | } | |
4881 | } else | |
4882 | legacy_mode |= (1 << 0); | |
4883 | ||
4884 | if (!request_region(0x170, 8, "libata")) { | |
4885 | struct resource *conflict, res; | |
4886 | res.start = 0x170; | |
4887 | res.end = 0x170 + 8 - 1; | |
4888 | conflict = ____request_resource(&ioport_resource, &res); | |
4889 | if (!strcmp(conflict->name, "libata")) | |
4890 | legacy_mode |= (1 << 1); | |
4891 | else { | |
4892 | disable_dev_on_err = 0; | |
4893 | printk(KERN_WARNING "ata: 0x170 IDE port busy\n"); | |
4894 | } | |
4895 | } else | |
4896 | legacy_mode |= (1 << 1); | |
4897 | } | |
4898 | ||
4899 | /* we have legacy mode, but all ports are unavailable */ | |
4900 | if (legacy_mode == (1 << 3)) { | |
4901 | rc = -EBUSY; | |
4902 | goto err_out_regions; | |
4903 | } | |
4904 | ||
4905 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); | |
4906 | if (rc) | |
4907 | goto err_out_regions; | |
4908 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); | |
4909 | if (rc) | |
4910 | goto err_out_regions; | |
4911 | ||
4912 | if (legacy_mode) { | |
47a86593 | 4913 | if (legacy_mode & (1 << 0)) |
0f0d5192 | 4914 | probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0); |
47a86593 | 4915 | if (legacy_mode & (1 << 1)) |
0f0d5192 | 4916 | probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1); |
47a86593 AC |
4917 | } else { |
4918 | if (n_ports == 2) | |
4919 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY); | |
4920 | else | |
4921 | probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY); | |
4922 | } | |
4923 | if (!probe_ent && !probe_ent2) { | |
1da177e4 LT |
4924 | rc = -ENOMEM; |
4925 | goto err_out_regions; | |
4926 | } | |
4927 | ||
4928 | pci_set_master(pdev); | |
4929 | ||
4930 | /* FIXME: check ata_device_add return */ | |
4931 | if (legacy_mode) { | |
4932 | if (legacy_mode & (1 << 0)) | |
4933 | ata_device_add(probe_ent); | |
4934 | if (legacy_mode & (1 << 1)) | |
4935 | ata_device_add(probe_ent2); | |
4936 | } else | |
4937 | ata_device_add(probe_ent); | |
4938 | ||
4939 | kfree(probe_ent); | |
4940 | kfree(probe_ent2); | |
4941 | ||
4942 | return 0; | |
4943 | ||
4944 | err_out_regions: | |
4945 | if (legacy_mode & (1 << 0)) | |
4946 | release_region(0x1f0, 8); | |
4947 | if (legacy_mode & (1 << 1)) | |
4948 | release_region(0x170, 8); | |
4949 | pci_release_regions(pdev); | |
4950 | err_out: | |
4951 | if (disable_dev_on_err) | |
4952 | pci_disable_device(pdev); | |
4953 | return rc; | |
4954 | } | |
4955 | ||
4956 | /** | |
4957 | * ata_pci_remove_one - PCI layer callback for device removal | |
4958 | * @pdev: PCI device that was removed | |
4959 | * | |
4960 | * PCI layer indicates to libata via this hook that | |
6f0ef4fa | 4961 | * hot-unplug or module unload event has occurred. |
1da177e4 LT |
4962 | * Handle this by unregistering all objects associated |
4963 | * with this PCI device. Free those objects. Then finally | |
4964 | * release PCI resources and disable device. | |
4965 | * | |
4966 | * LOCKING: | |
4967 | * Inherited from PCI layer (may sleep). | |
4968 | */ | |
4969 | ||
4970 | void ata_pci_remove_one (struct pci_dev *pdev) | |
4971 | { | |
4972 | struct device *dev = pci_dev_to_dev(pdev); | |
4973 | struct ata_host_set *host_set = dev_get_drvdata(dev); | |
1da177e4 | 4974 | |
17b14451 | 4975 | ata_host_set_remove(host_set); |
1da177e4 LT |
4976 | pci_release_regions(pdev); |
4977 | pci_disable_device(pdev); | |
4978 | dev_set_drvdata(dev, NULL); | |
4979 | } | |
4980 | ||
4981 | /* move to PCI subsystem */ | |
057ace5e | 4982 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
4983 | { |
4984 | unsigned long tmp = 0; | |
4985 | ||
4986 | switch (bits->width) { | |
4987 | case 1: { | |
4988 | u8 tmp8 = 0; | |
4989 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
4990 | tmp = tmp8; | |
4991 | break; | |
4992 | } | |
4993 | case 2: { | |
4994 | u16 tmp16 = 0; | |
4995 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
4996 | tmp = tmp16; | |
4997 | break; | |
4998 | } | |
4999 | case 4: { | |
5000 | u32 tmp32 = 0; | |
5001 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
5002 | tmp = tmp32; | |
5003 | break; | |
5004 | } | |
5005 | ||
5006 | default: | |
5007 | return -EINVAL; | |
5008 | } | |
5009 | ||
5010 | tmp &= bits->mask; | |
5011 | ||
5012 | return (tmp == bits->val) ? 1 : 0; | |
5013 | } | |
9b847548 JA |
5014 | |
5015 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state) | |
5016 | { | |
5017 | pci_save_state(pdev); | |
5018 | pci_disable_device(pdev); | |
5019 | pci_set_power_state(pdev, PCI_D3hot); | |
5020 | return 0; | |
5021 | } | |
5022 | ||
5023 | int ata_pci_device_resume(struct pci_dev *pdev) | |
5024 | { | |
5025 | pci_set_power_state(pdev, PCI_D0); | |
5026 | pci_restore_state(pdev); | |
5027 | pci_enable_device(pdev); | |
5028 | pci_set_master(pdev); | |
5029 | return 0; | |
5030 | } | |
1da177e4 LT |
5031 | #endif /* CONFIG_PCI */ |
5032 | ||
5033 | ||
1da177e4 LT |
5034 | static int __init ata_init(void) |
5035 | { | |
5036 | ata_wq = create_workqueue("ata"); | |
5037 | if (!ata_wq) | |
5038 | return -ENOMEM; | |
5039 | ||
5040 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
5041 | return 0; | |
5042 | } | |
5043 | ||
5044 | static void __exit ata_exit(void) | |
5045 | { | |
5046 | destroy_workqueue(ata_wq); | |
5047 | } | |
5048 | ||
5049 | module_init(ata_init); | |
5050 | module_exit(ata_exit); | |
5051 | ||
67846b30 JG |
5052 | static unsigned long ratelimit_time; |
5053 | static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED; | |
5054 | ||
5055 | int ata_ratelimit(void) | |
5056 | { | |
5057 | int rc; | |
5058 | unsigned long flags; | |
5059 | ||
5060 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
5061 | ||
5062 | if (time_after(jiffies, ratelimit_time)) { | |
5063 | rc = 1; | |
5064 | ratelimit_time = jiffies + (HZ/5); | |
5065 | } else | |
5066 | rc = 0; | |
5067 | ||
5068 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
5069 | ||
5070 | return rc; | |
5071 | } | |
5072 | ||
1da177e4 LT |
5073 | /* |
5074 | * libata is essentially a library of internal helper functions for | |
5075 | * low-level ATA host controller drivers. As such, the API/ABI is | |
5076 | * likely to change as new drivers are added and updated. | |
5077 | * Do not depend on ABI/API stability. | |
5078 | */ | |
5079 | ||
5080 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
5081 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
5082 | EXPORT_SYMBOL_GPL(ata_device_add); | |
17b14451 | 5083 | EXPORT_SYMBOL_GPL(ata_host_set_remove); |
1da177e4 LT |
5084 | EXPORT_SYMBOL_GPL(ata_sg_init); |
5085 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
5086 | EXPORT_SYMBOL_GPL(ata_qc_complete); | |
5087 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); | |
5088 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
5089 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
5090 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
5091 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
5092 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
5093 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
5094 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
5095 | EXPORT_SYMBOL_GPL(ata_check_status); | |
5096 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
5097 | EXPORT_SYMBOL_GPL(ata_exec_command); |
5098 | EXPORT_SYMBOL_GPL(ata_port_start); | |
5099 | EXPORT_SYMBOL_GPL(ata_port_stop); | |
aa8f0dc6 | 5100 | EXPORT_SYMBOL_GPL(ata_host_stop); |
1da177e4 LT |
5101 | EXPORT_SYMBOL_GPL(ata_interrupt); |
5102 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
5103 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
5104 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
5105 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
5106 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
5107 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
5108 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
5109 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
5110 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
5111 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
5112 | EXPORT_SYMBOL_GPL(ata_port_disable); | |
67846b30 | 5113 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
1da177e4 LT |
5114 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
5115 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
5116 | EXPORT_SYMBOL_GPL(ata_scsi_error); | |
5117 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
5118 | EXPORT_SYMBOL_GPL(ata_scsi_release); | |
5119 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
5120 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
5121 | EXPORT_SYMBOL_GPL(ata_dev_id_string); | |
6f2f3812 | 5122 | EXPORT_SYMBOL_GPL(ata_dev_config); |
1da177e4 LT |
5123 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
5124 | ||
452503f9 AC |
5125 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
5126 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
5127 | ||
1da177e4 LT |
5128 | #ifdef CONFIG_PCI |
5129 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
374b1873 | 5130 | EXPORT_SYMBOL_GPL(ata_pci_host_stop); |
1da177e4 LT |
5131 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); |
5132 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
5133 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
9b847548 JA |
5134 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
5135 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
1da177e4 | 5136 | #endif /* CONFIG_PCI */ |
9b847548 JA |
5137 | |
5138 | EXPORT_SYMBOL_GPL(ata_device_suspend); | |
5139 | EXPORT_SYMBOL_GPL(ata_device_resume); | |
5140 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); | |
5141 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); |