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[SCSI] hpsa: remove unneeded include of seq_file.h
[linux-block.git] / drivers / scsi / hpsa.c
CommitLineData
edd16368
SC		 1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
e5a44df8 26#include <linux/pci-aspm.h>
edd16368
SC		 27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/fs.h>
31#include <linux/timer.h>
edd16368
SC		 32#include <linux/init.h>
33#include <linux/spinlock.h>
edd16368
SC		 34#include <linux/compat.h>
35#include <linux/blktrace_api.h>
36#include <linux/uaccess.h>
37#include <linux/io.h>
38#include <linux/dma-mapping.h>
39#include <linux/completion.h>
40#include <linux/moduleparam.h>
41#include <scsi/scsi.h>
42#include <scsi/scsi_cmnd.h>
43#include <scsi/scsi_device.h>
44#include <scsi/scsi_host.h>
667e23d4 45#include <scsi/scsi_tcq.h>
edd16368
SC		 46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
60063497 49#include <linux/atomic.h>
edd16368 50#include <linux/kthread.h>
a0c12413 51#include <linux/jiffies.h>
edd16368
SC		 52#include "hpsa_cmd.h"
53#include "hpsa.h"
54
55/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
e481cce8 56#define HPSA_DRIVER_VERSION "3.4.0-1"
edd16368 57#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
f79cfec6 58#define HPSA "hpsa"
edd16368
SC		 59
60/* How long to wait (in milliseconds) for board to go into simple mode */
61#define MAX_CONFIG_WAIT 30000
62#define MAX_IOCTL_CONFIG_WAIT 1000
63
64/*define how many times we will try a command because of bus resets */
65#define MAX_CMD_RETRIES 3
66
67/* Embedded module documentation macros - see modules.h */
68MODULE_AUTHOR("Hewlett-Packard Company");
69MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
70 HPSA_DRIVER_VERSION);
71MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
72MODULE_VERSION(HPSA_DRIVER_VERSION);
73MODULE_LICENSE("GPL");
74
75static int hpsa_allow_any;
76module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
77MODULE_PARM_DESC(hpsa_allow_any,
78 "Allow hpsa driver to access unknown HP Smart Array hardware");
02ec19c8
SC		 79static int hpsa_simple_mode;
80module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
81MODULE_PARM_DESC(hpsa_simple_mode,
82 "Use 'simple mode' rather than 'performant mode'");
edd16368
SC		 83
84/* define the PCI info for the cards we can control */
85static const struct pci_device_id hpsa_pci_device_id[] = {
edd16368
SC		 86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
163dbcd8
MM		 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
f8b01eb9 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
9143a961 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
163dbcd8 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334D},
9143a961 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
fe0c9610
MM		 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
97b9f53d
MM		 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
7c03b870 122 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
6798cc0a 123 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
edd16368
SC		 124 {0,}
125};
126
127MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
128
129/* board_id = Subsystem Device ID & Vendor ID
130 * product = Marketing Name for the board
131 * access = Address of the struct of function pointers
132 */
133static struct board_type products[] = {
edd16368
SC		 134 {0x3241103C, "Smart Array P212", &SA5_access},
135 {0x3243103C, "Smart Array P410", &SA5_access},
136 {0x3245103C, "Smart Array P410i", &SA5_access},
137 {0x3247103C, "Smart Array P411", &SA5_access},
138 {0x3249103C, "Smart Array P812", &SA5_access},
163dbcd8
MM		 139 {0x324A103C, "Smart Array P712m", &SA5_access},
140 {0x324B103C, "Smart Array P711m", &SA5_access},
fe0c9610
MM		 141 {0x3350103C, "Smart Array P222", &SA5_access},
142 {0x3351103C, "Smart Array P420", &SA5_access},
143 {0x3352103C, "Smart Array P421", &SA5_access},
144 {0x3353103C, "Smart Array P822", &SA5_access},
163dbcd8 145 {0x334D103C, "Smart Array P822se", &SA5_access},
fe0c9610
MM		 146 {0x3354103C, "Smart Array P420i", &SA5_access},
147 {0x3355103C, "Smart Array P220i", &SA5_access},
148 {0x3356103C, "Smart Array P721m", &SA5_access},
1fd6c8e3
MM		 149 {0x1921103C, "Smart Array P830i", &SA5_access},
150 {0x1922103C, "Smart Array P430", &SA5_access},
151 {0x1923103C, "Smart Array P431", &SA5_access},
152 {0x1924103C, "Smart Array P830", &SA5_access},
153 {0x1926103C, "Smart Array P731m", &SA5_access},
154 {0x1928103C, "Smart Array P230i", &SA5_access},
155 {0x1929103C, "Smart Array P530", &SA5_access},
97b9f53d
MM		 156 {0x21BD103C, "Smart Array", &SA5_access},
157 {0x21BE103C, "Smart Array", &SA5_access},
158 {0x21BF103C, "Smart Array", &SA5_access},
159 {0x21C0103C, "Smart Array", &SA5_access},
160 {0x21C1103C, "Smart Array", &SA5_access},
161 {0x21C2103C, "Smart Array", &SA5_access},
162 {0x21C3103C, "Smart Array", &SA5_access},
163 {0x21C4103C, "Smart Array", &SA5_access},
164 {0x21C5103C, "Smart Array", &SA5_access},
165 {0x21C7103C, "Smart Array", &SA5_access},
166 {0x21C8103C, "Smart Array", &SA5_access},
167 {0x21C9103C, "Smart Array", &SA5_access},
edd16368
SC		 168 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
169};
170
171static int number_of_controllers;
172
a0c12413
SC		 173static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
174static spinlock_t lockup_detector_lock;
175static struct task_struct *hpsa_lockup_detector;
176
10f66018
SC		 177static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
178static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
edd16368
SC		 179static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
180static void start_io(struct ctlr_info *h);
181
182#ifdef CONFIG_COMPAT
183static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
184#endif
185
186static void cmd_free(struct ctlr_info *h, struct CommandList *c);
187static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
188static struct CommandList *cmd_alloc(struct ctlr_info *h);
189static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
a2dac136 190static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 191 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 192 int cmd_type);
193
f281233d 194static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
a08a8471
SC		 195static void hpsa_scan_start(struct Scsi_Host *);
196static int hpsa_scan_finished(struct Scsi_Host *sh,
197 unsigned long elapsed_time);
667e23d4
SC		 198static int hpsa_change_queue_depth(struct scsi_device *sdev,
199 int qdepth, int reason);
edd16368
SC		 200
201static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
75167d2c 202static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
edd16368
SC		 203static int hpsa_slave_alloc(struct scsi_device *sdev);
204static void hpsa_slave_destroy(struct scsi_device *sdev);
205
edd16368 206static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
edd16368
SC		 207static int check_for_unit_attention(struct ctlr_info *h,
208 struct CommandList *c);
209static void check_ioctl_unit_attention(struct ctlr_info *h,
210 struct CommandList *c);
303932fd
DB		 211/* performant mode helper functions */
212static void calc_bucket_map(int *bucket, int num_buckets,
213 int nsgs, int *bucket_map);
6f039790 214static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
254f796b 215static inline u32 next_command(struct ctlr_info *h, u8 q);
6f039790
GKH		 216static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
217 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
218 u64 *cfg_offset);
219static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
220 unsigned long *memory_bar);
221static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
222static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
223 int wait_for_ready);
75167d2c 224static inline void finish_cmd(struct CommandList *c);
fe5389c8
SC		 225#define BOARD_NOT_READY 0
226#define BOARD_READY 1
edd16368 227
edd16368
SC		 228static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
229{
230 unsigned long *priv = shost_priv(sdev->host);
231 return (struct ctlr_info *) *priv;
232}
233
a23513e8
SC		 234static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
235{
236 unsigned long *priv = shost_priv(sh);
237 return (struct ctlr_info *) *priv;
238}
239
edd16368
SC		 240static int check_for_unit_attention(struct ctlr_info *h,
241 struct CommandList *c)
242{
243 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
244 return 0;
245
246 switch (c->err_info->SenseInfo[12]) {
247 case STATE_CHANGED:
f79cfec6 248 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
edd16368
SC		 249 "detected, command retried\n", h->ctlr);
250 break;
251 case LUN_FAILED:
f79cfec6 252 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
edd16368
SC		 253 "detected, action required\n", h->ctlr);
254 break;
255 case REPORT_LUNS_CHANGED:
f79cfec6 256 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
31468401 257 "changed, action required\n", h->ctlr);
edd16368 258 /*
4f4eb9f1
ST		 259 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
260 * target (array) devices.
edd16368
SC		 261 */
262 break;
263 case POWER_OR_RESET:
f79cfec6 264 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
edd16368
SC		 265 "or device reset detected\n", h->ctlr);
266 break;
267 case UNIT_ATTENTION_CLEARED:
f79cfec6 268 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
edd16368
SC		 269 "cleared by another initiator\n", h->ctlr);
270 break;
271 default:
f79cfec6 272 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
edd16368
SC		 273 "unit attention detected\n", h->ctlr);
274 break;
275 }
276 return 1;
277}
278
852af20a
MB		 279static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
280{
281 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
282 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
283 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
284 return 0;
285 dev_warn(&h->pdev->dev, HPSA "device busy");
286 return 1;
287}
288
edd16368
SC		 289static ssize_t host_store_rescan(struct device *dev,
290 struct device_attribute *attr,
291 const char *buf, size_t count)
292{
293 struct ctlr_info *h;
294 struct Scsi_Host *shost = class_to_shost(dev);
a23513e8 295 h = shost_to_hba(shost);
31468401 296 hpsa_scan_start(h->scsi_host);
edd16368
SC		 297 return count;
298}
299
d28ce020
SC		 300static ssize_t host_show_firmware_revision(struct device *dev,
301 struct device_attribute *attr, char *buf)
302{
303 struct ctlr_info *h;
304 struct Scsi_Host *shost = class_to_shost(dev);
305 unsigned char *fwrev;
306
307 h = shost_to_hba(shost);
308 if (!h->hba_inquiry_data)
309 return 0;
310 fwrev = &h->hba_inquiry_data[32];
311 return snprintf(buf, 20, "%c%c%c%c\n",
312 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
313}
314
94a13649
SC		 315static ssize_t host_show_commands_outstanding(struct device *dev,
316 struct device_attribute *attr, char *buf)
317{
318 struct Scsi_Host *shost = class_to_shost(dev);
319 struct ctlr_info *h = shost_to_hba(shost);
320
321 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
322}
323
745a7a25
SC		 324static ssize_t host_show_transport_mode(struct device *dev,
325 struct device_attribute *attr, char *buf)
326{
327 struct ctlr_info *h;
328 struct Scsi_Host *shost = class_to_shost(dev);
329
330 h = shost_to_hba(shost);
331 return snprintf(buf, 20, "%s\n",
960a30e7 332 h->transMethod & CFGTBL_Trans_Performant ?
745a7a25
SC		 333 "performant" : "simple");
334}
335
46380786 336/* List of controllers which cannot be hard reset on kexec with reset_devices */
941b1cda
SC		 337static u32 unresettable_controller[] = {
338 0x324a103C, /* Smart Array P712m */
339 0x324b103C, /* SmartArray P711m */
340 0x3223103C, /* Smart Array P800 */
341 0x3234103C, /* Smart Array P400 */
342 0x3235103C, /* Smart Array P400i */
343 0x3211103C, /* Smart Array E200i */
344 0x3212103C, /* Smart Array E200 */
345 0x3213103C, /* Smart Array E200i */
346 0x3214103C, /* Smart Array E200i */
347 0x3215103C, /* Smart Array E200i */
348 0x3237103C, /* Smart Array E500 */
349 0x323D103C, /* Smart Array P700m */
7af0abbc 350 0x40800E11, /* Smart Array 5i */
941b1cda
SC		 351 0x409C0E11, /* Smart Array 6400 */
352 0x409D0E11, /* Smart Array 6400 EM */
5a4f934e
TH		 353 0x40700E11, /* Smart Array 5300 */
354 0x40820E11, /* Smart Array 532 */
355 0x40830E11, /* Smart Array 5312 */
356 0x409A0E11, /* Smart Array 641 */
357 0x409B0E11, /* Smart Array 642 */
358 0x40910E11, /* Smart Array 6i */
941b1cda
SC		 359};
360
46380786
SC		 361/* List of controllers which cannot even be soft reset */
362static u32 soft_unresettable_controller[] = {
7af0abbc 363 0x40800E11, /* Smart Array 5i */
5a4f934e
TH		 364 0x40700E11, /* Smart Array 5300 */
365 0x40820E11, /* Smart Array 532 */
366 0x40830E11, /* Smart Array 5312 */
367 0x409A0E11, /* Smart Array 641 */
368 0x409B0E11, /* Smart Array 642 */
369 0x40910E11, /* Smart Array 6i */
46380786
SC		 370 /* Exclude 640x boards. These are two pci devices in one slot
371 * which share a battery backed cache module. One controls the
372 * cache, the other accesses the cache through the one that controls
373 * it. If we reset the one controlling the cache, the other will
374 * likely not be happy. Just forbid resetting this conjoined mess.
375 * The 640x isn't really supported by hpsa anyway.
376 */
377 0x409C0E11, /* Smart Array 6400 */
378 0x409D0E11, /* Smart Array 6400 EM */
379};
380
381static int ctlr_is_hard_resettable(u32 board_id)
941b1cda
SC		 382{
383 int i;
384
385 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
46380786
SC		 386 if (unresettable_controller[i] == board_id)
387 return 0;
388 return 1;
389}
390
391static int ctlr_is_soft_resettable(u32 board_id)
392{
393 int i;
394
395 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
396 if (soft_unresettable_controller[i] == board_id)
941b1cda
SC		 397 return 0;
398 return 1;
399}
400
46380786
SC		 401static int ctlr_is_resettable(u32 board_id)
402{
403 return ctlr_is_hard_resettable(board_id) ||
404 ctlr_is_soft_resettable(board_id);
405}
406
941b1cda
SC		 407static ssize_t host_show_resettable(struct device *dev,
408 struct device_attribute *attr, char *buf)
409{
410 struct ctlr_info *h;
411 struct Scsi_Host *shost = class_to_shost(dev);
412
413 h = shost_to_hba(shost);
46380786 414 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
941b1cda
SC		 415}
416
edd16368
SC		 417static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
418{
419 return (scsi3addr[3] & 0xC0) == 0x40;
420}
421
422static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
d82357ea 423 "1(ADM)", "UNKNOWN"
edd16368
SC		 424};
425#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
426
427static ssize_t raid_level_show(struct device *dev,
428 struct device_attribute *attr, char *buf)
429{
430 ssize_t l = 0;
82a72c0a 431 unsigned char rlevel;
edd16368
SC		 432 struct ctlr_info *h;
433 struct scsi_device *sdev;
434 struct hpsa_scsi_dev_t *hdev;
435 unsigned long flags;
436
437 sdev = to_scsi_device(dev);
438 h = sdev_to_hba(sdev);
439 spin_lock_irqsave(&h->lock, flags);
440 hdev = sdev->hostdata;
441 if (!hdev) {
442 spin_unlock_irqrestore(&h->lock, flags);
443 return -ENODEV;
444 }
445
446 /* Is this even a logical drive? */
447 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
448 spin_unlock_irqrestore(&h->lock, flags);
449 l = snprintf(buf, PAGE_SIZE, "N/A\n");
450 return l;
451 }
452
453 rlevel = hdev->raid_level;
454 spin_unlock_irqrestore(&h->lock, flags);
82a72c0a 455 if (rlevel > RAID_UNKNOWN)
edd16368
SC		 456 rlevel = RAID_UNKNOWN;
457 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
458 return l;
459}
460
461static ssize_t lunid_show(struct device *dev,
462 struct device_attribute *attr, char *buf)
463{
464 struct ctlr_info *h;
465 struct scsi_device *sdev;
466 struct hpsa_scsi_dev_t *hdev;
467 unsigned long flags;
468 unsigned char lunid[8];
469
470 sdev = to_scsi_device(dev);
471 h = sdev_to_hba(sdev);
472 spin_lock_irqsave(&h->lock, flags);
473 hdev = sdev->hostdata;
474 if (!hdev) {
475 spin_unlock_irqrestore(&h->lock, flags);
476 return -ENODEV;
477 }
478 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
479 spin_unlock_irqrestore(&h->lock, flags);
480 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
481 lunid[0], lunid[1], lunid[2], lunid[3],
482 lunid[4], lunid[5], lunid[6], lunid[7]);
483}
484
485static ssize_t unique_id_show(struct device *dev,
486 struct device_attribute *attr, char *buf)
487{
488 struct ctlr_info *h;
489 struct scsi_device *sdev;
490 struct hpsa_scsi_dev_t *hdev;
491 unsigned long flags;
492 unsigned char sn[16];
493
494 sdev = to_scsi_device(dev);
495 h = sdev_to_hba(sdev);
496 spin_lock_irqsave(&h->lock, flags);
497 hdev = sdev->hostdata;
498 if (!hdev) {
499 spin_unlock_irqrestore(&h->lock, flags);
500 return -ENODEV;
501 }
502 memcpy(sn, hdev->device_id, sizeof(sn));
503 spin_unlock_irqrestore(&h->lock, flags);
504 return snprintf(buf, 16 * 2 + 2,
505 "%02X%02X%02X%02X%02X%02X%02X%02X"
506 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
507 sn[0], sn[1], sn[2], sn[3],
508 sn[4], sn[5], sn[6], sn[7],
509 sn[8], sn[9], sn[10], sn[11],
510 sn[12], sn[13], sn[14], sn[15]);
511}
512
3f5eac3a
SC		 513static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
514static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
515static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
516static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
517static DEVICE_ATTR(firmware_revision, S_IRUGO,
518 host_show_firmware_revision, NULL);
519static DEVICE_ATTR(commands_outstanding, S_IRUGO,
520 host_show_commands_outstanding, NULL);
521static DEVICE_ATTR(transport_mode, S_IRUGO,
522 host_show_transport_mode, NULL);
941b1cda
SC		 523static DEVICE_ATTR(resettable, S_IRUGO,
524 host_show_resettable, NULL);
3f5eac3a
SC		 525
526static struct device_attribute *hpsa_sdev_attrs[] = {
527 &dev_attr_raid_level,
528 &dev_attr_lunid,
529 &dev_attr_unique_id,
530 NULL,
531};
532
533static struct device_attribute *hpsa_shost_attrs[] = {
534 &dev_attr_rescan,
535 &dev_attr_firmware_revision,
536 &dev_attr_commands_outstanding,
537 &dev_attr_transport_mode,
941b1cda 538 &dev_attr_resettable,
3f5eac3a
SC		 539 NULL,
540};
541
542static struct scsi_host_template hpsa_driver_template = {
543 .module = THIS_MODULE,
f79cfec6
SC		 544 .name = HPSA,
545 .proc_name = HPSA,
3f5eac3a
SC		 546 .queuecommand = hpsa_scsi_queue_command,
547 .scan_start = hpsa_scan_start,
548 .scan_finished = hpsa_scan_finished,
549 .change_queue_depth = hpsa_change_queue_depth,
550 .this_id = -1,
551 .use_clustering = ENABLE_CLUSTERING,
75167d2c 552 .eh_abort_handler = hpsa_eh_abort_handler,
3f5eac3a
SC		 553 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
554 .ioctl = hpsa_ioctl,
555 .slave_alloc = hpsa_slave_alloc,
556 .slave_destroy = hpsa_slave_destroy,
557#ifdef CONFIG_COMPAT
558 .compat_ioctl = hpsa_compat_ioctl,
559#endif
560 .sdev_attrs = hpsa_sdev_attrs,
561 .shost_attrs = hpsa_shost_attrs,
c0d6a4d1 562 .max_sectors = 8192,
54b2b50c 563 .no_write_same = 1,
3f5eac3a
SC		 564};
565
566
567/* Enqueuing and dequeuing functions for cmdlists. */
568static inline void addQ(struct list_head *list, struct CommandList *c)
569{
570 list_add_tail(&c->list, list);
571}
572
254f796b 573static inline u32 next_command(struct ctlr_info *h, u8 q)
3f5eac3a
SC		 574{
575 u32 a;
254f796b 576 struct reply_pool *rq = &h->reply_queue[q];
e16a33ad 577 unsigned long flags;
3f5eac3a
SC		 578
579 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
254f796b 580 return h->access.command_completed(h, q);
3f5eac3a 581
254f796b
MG		 582 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
583 a = rq->head[rq->current_entry];
584 rq->current_entry++;
e16a33ad 585 spin_lock_irqsave(&h->lock, flags);
3f5eac3a 586 h->commands_outstanding--;
e16a33ad 587 spin_unlock_irqrestore(&h->lock, flags);
3f5eac3a
SC		 588 } else {
589 a = FIFO_EMPTY;
590 }
591 /* Check for wraparound */
254f796b
MG		 592 if (rq->current_entry == h->max_commands) {
593 rq->current_entry = 0;
594 rq->wraparound ^= 1;
3f5eac3a
SC		 595 }
596 return a;
597}
598
599/* set_performant_mode: Modify the tag for cciss performant
600 * set bit 0 for pull model, bits 3-1 for block fetch
601 * register number
602 */
603static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
604{
254f796b 605 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
3f5eac3a 606 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
254f796b
MG		 607 if (likely(h->msix_vector))
608 c->Header.ReplyQueue =
804a5cb5 609 raw_smp_processor_id() % h->nreply_queues;
254f796b 610 }
3f5eac3a
SC		 611}
612
e85c5974
SC		 613static int is_firmware_flash_cmd(u8 *cdb)
614{
615 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
616}
617
618/*
619 * During firmware flash, the heartbeat register may not update as frequently
620 * as it should. So we dial down lockup detection during firmware flash. and
621 * dial it back up when firmware flash completes.
622 */
623#define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
624#define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
625static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
626 struct CommandList *c)
627{
628 if (!is_firmware_flash_cmd(c->Request.CDB))
629 return;
630 atomic_inc(&h->firmware_flash_in_progress);
631 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
632}
633
634static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
635 struct CommandList *c)
636{
637 if (is_firmware_flash_cmd(c->Request.CDB) &&
638 atomic_dec_and_test(&h->firmware_flash_in_progress))
639 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
640}
641
3f5eac3a
SC		 642static void enqueue_cmd_and_start_io(struct ctlr_info *h,
643 struct CommandList *c)
644{
645 unsigned long flags;
646
647 set_performant_mode(h, c);
e85c5974 648 dial_down_lockup_detection_during_fw_flash(h, c);
3f5eac3a
SC		 649 spin_lock_irqsave(&h->lock, flags);
650 addQ(&h->reqQ, c);
651 h->Qdepth++;
3f5eac3a 652 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 653 start_io(h);
3f5eac3a
SC		 654}
655
656static inline void removeQ(struct CommandList *c)
657{
658 if (WARN_ON(list_empty(&c->list)))
659 return;
660 list_del_init(&c->list);
661}
662
663static inline int is_hba_lunid(unsigned char scsi3addr[])
664{
665 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
666}
667
668static inline int is_scsi_rev_5(struct ctlr_info *h)
669{
670 if (!h->hba_inquiry_data)
671 return 0;
672 if ((h->hba_inquiry_data[2] & 0x07) == 5)
673 return 1;
674 return 0;
675}
676
edd16368
SC		 677static int hpsa_find_target_lun(struct ctlr_info *h,
678 unsigned char scsi3addr[], int bus, int *target, int *lun)
679{
680 /* finds an unused bus, target, lun for a new physical device
681 * assumes h->devlock is held
682 */
683 int i, found = 0;
cfe5badc 684 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
edd16368 685
263d9401 686 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
edd16368
SC		 687
688 for (i = 0; i < h->ndevices; i++) {
689 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
263d9401 690 __set_bit(h->dev[i]->target, lun_taken);
edd16368
SC		 691 }
692
263d9401
AM		 693 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
694 if (i < HPSA_MAX_DEVICES) {
695 /* *bus = 1; */
696 *target = i;
697 *lun = 0;
698 found = 1;
edd16368
SC		 699 }
700 return !found;
701}
702
703/* Add an entry into h->dev[] array. */
704static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
705 struct hpsa_scsi_dev_t *device,
706 struct hpsa_scsi_dev_t *added[], int *nadded)
707{
708 /* assumes h->devlock is held */
709 int n = h->ndevices;
710 int i;
711 unsigned char addr1[8], addr2[8];
712 struct hpsa_scsi_dev_t *sd;
713
cfe5badc 714 if (n >= HPSA_MAX_DEVICES) {
edd16368
SC		 715 dev_err(&h->pdev->dev, "too many devices, some will be "
716 "inaccessible.\n");
717 return -1;
718 }
719
720 /* physical devices do not have lun or target assigned until now. */
721 if (device->lun != -1)
722 /* Logical device, lun is already assigned. */
723 goto lun_assigned;
724
725 /* If this device a non-zero lun of a multi-lun device
726 * byte 4 of the 8-byte LUN addr will contain the logical
727 * unit no, zero otherise.
728 */
729 if (device->scsi3addr[4] == 0) {
730 /* This is not a non-zero lun of a multi-lun device */
731 if (hpsa_find_target_lun(h, device->scsi3addr,
732 device->bus, &device->target, &device->lun) != 0)
733 return -1;
734 goto lun_assigned;
735 }
736
737 /* This is a non-zero lun of a multi-lun device.
738 * Search through our list and find the device which
739 * has the same 8 byte LUN address, excepting byte 4.
740 * Assign the same bus and target for this new LUN.
741 * Use the logical unit number from the firmware.
742 */
743 memcpy(addr1, device->scsi3addr, 8);
744 addr1[4] = 0;
745 for (i = 0; i < n; i++) {
746 sd = h->dev[i];
747 memcpy(addr2, sd->scsi3addr, 8);
748 addr2[4] = 0;
749 /* differ only in byte 4? */
750 if (memcmp(addr1, addr2, 8) == 0) {
751 device->bus = sd->bus;
752 device->target = sd->target;
753 device->lun = device->scsi3addr[4];
754 break;
755 }
756 }
757 if (device->lun == -1) {
758 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
759 " suspect firmware bug or unsupported hardware "
760 "configuration.\n");
761 return -1;
762 }
763
764lun_assigned:
765
766 h->dev[n] = device;
767 h->ndevices++;
768 added[*nadded] = device;
769 (*nadded)++;
770
771 /* initially, (before registering with scsi layer) we don't
772 * know our hostno and we don't want to print anything first
773 * time anyway (the scsi layer's inquiries will show that info)
774 */
775 /* if (hostno != -1) */
776 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
777 scsi_device_type(device->devtype), hostno,
778 device->bus, device->target, device->lun);
779 return 0;
780}
781
bd9244f7
ST		 782/* Update an entry in h->dev[] array. */
783static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
784 int entry, struct hpsa_scsi_dev_t *new_entry)
785{
786 /* assumes h->devlock is held */
787 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
788
789 /* Raid level changed. */
790 h->dev[entry]->raid_level = new_entry->raid_level;
791 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
792 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
793 new_entry->target, new_entry->lun);
794}
795
2a8ccf31
SC		 796/* Replace an entry from h->dev[] array. */
797static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
798 int entry, struct hpsa_scsi_dev_t *new_entry,
799 struct hpsa_scsi_dev_t *added[], int *nadded,
800 struct hpsa_scsi_dev_t *removed[], int *nremoved)
801{
802 /* assumes h->devlock is held */
cfe5badc 803 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
2a8ccf31
SC		 804 removed[*nremoved] = h->dev[entry];
805 (*nremoved)++;
01350d05
SC		 806
807 /*
808 * New physical devices won't have target/lun assigned yet
809 * so we need to preserve the values in the slot we are replacing.
810 */
811 if (new_entry->target == -1) {
812 new_entry->target = h->dev[entry]->target;
813 new_entry->lun = h->dev[entry]->lun;
814 }
815
2a8ccf31
SC		 816 h->dev[entry] = new_entry;
817 added[*nadded] = new_entry;
818 (*nadded)++;
819 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
820 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
821 new_entry->target, new_entry->lun);
822}
823
edd16368
SC		 824/* Remove an entry from h->dev[] array. */
825static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
826 struct hpsa_scsi_dev_t *removed[], int *nremoved)
827{
828 /* assumes h->devlock is held */
829 int i;
830 struct hpsa_scsi_dev_t *sd;
831
cfe5badc 832 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
edd16368
SC		 833
834 sd = h->dev[entry];
835 removed[*nremoved] = h->dev[entry];
836 (*nremoved)++;
837
838 for (i = entry; i < h->ndevices-1; i++)
839 h->dev[i] = h->dev[i+1];
840 h->ndevices--;
841 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
842 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
843 sd->lun);
844}
845
846#define SCSI3ADDR_EQ(a, b) ( \
847 (a)[7] == (b)[7] && \
848 (a)[6] == (b)[6] && \
849 (a)[5] == (b)[5] && \
850 (a)[4] == (b)[4] && \
851 (a)[3] == (b)[3] && \
852 (a)[2] == (b)[2] && \
853 (a)[1] == (b)[1] && \
854 (a)[0] == (b)[0])
855
856static void fixup_botched_add(struct ctlr_info *h,
857 struct hpsa_scsi_dev_t *added)
858{
859 /* called when scsi_add_device fails in order to re-adjust
860 * h->dev[] to match the mid layer's view.
861 */
862 unsigned long flags;
863 int i, j;
864
865 spin_lock_irqsave(&h->lock, flags);
866 for (i = 0; i < h->ndevices; i++) {
867 if (h->dev[i] == added) {
868 for (j = i; j < h->ndevices-1; j++)
869 h->dev[j] = h->dev[j+1];
870 h->ndevices--;
871 break;
872 }
873 }
874 spin_unlock_irqrestore(&h->lock, flags);
875 kfree(added);
876}
877
878static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
879 struct hpsa_scsi_dev_t *dev2)
880{
edd16368
SC		 881 /* we compare everything except lun and target as these
882 * are not yet assigned. Compare parts likely
883 * to differ first
884 */
885 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
886 sizeof(dev1->scsi3addr)) != 0)
887 return 0;
888 if (memcmp(dev1->device_id, dev2->device_id,
889 sizeof(dev1->device_id)) != 0)
890 return 0;
891 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
892 return 0;
893 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
894 return 0;
edd16368
SC		 895 if (dev1->devtype != dev2->devtype)
896 return 0;
edd16368
SC		 897 if (dev1->bus != dev2->bus)
898 return 0;
899 return 1;
900}
901
bd9244f7
ST		 902static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
903 struct hpsa_scsi_dev_t *dev2)
904{
905 /* Device attributes that can change, but don't mean
906 * that the device is a different device, nor that the OS
907 * needs to be told anything about the change.
908 */
909 if (dev1->raid_level != dev2->raid_level)
910 return 1;
911 return 0;
912}
913
edd16368
SC		 914/* Find needle in haystack. If exact match found, return DEVICE_SAME,
915 * and return needle location in *index. If scsi3addr matches, but not
916 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
bd9244f7
ST		 917 * location in *index.
918 * In the case of a minor device attribute change, such as RAID level, just
919 * return DEVICE_UPDATED, along with the updated device's location in index.
920 * If needle not found, return DEVICE_NOT_FOUND.
edd16368
SC		 921 */
922static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
923 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
924 int *index)
925{
926 int i;
927#define DEVICE_NOT_FOUND 0
928#define DEVICE_CHANGED 1
929#define DEVICE_SAME 2
bd9244f7 930#define DEVICE_UPDATED 3
edd16368 931 for (i = 0; i < haystack_size; i++) {
23231048
SC		 932 if (haystack[i] == NULL) /* previously removed. */
933 continue;
edd16368
SC		 934 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
935 *index = i;
bd9244f7
ST		 936 if (device_is_the_same(needle, haystack[i])) {
937 if (device_updated(needle, haystack[i]))
938 return DEVICE_UPDATED;
edd16368 939 return DEVICE_SAME;
bd9244f7 940 } else {
edd16368 941 return DEVICE_CHANGED;
bd9244f7 942 }
edd16368
SC		 943 }
944 }
945 *index = -1;
946 return DEVICE_NOT_FOUND;
947}
948
4967bd3e 949static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
edd16368
SC		 950 struct hpsa_scsi_dev_t *sd[], int nsds)
951{
952 /* sd contains scsi3 addresses and devtypes, and inquiry
953 * data. This function takes what's in sd to be the current
954 * reality and updates h->dev[] to reflect that reality.
955 */
956 int i, entry, device_change, changes = 0;
957 struct hpsa_scsi_dev_t *csd;
958 unsigned long flags;
959 struct hpsa_scsi_dev_t **added, **removed;
960 int nadded, nremoved;
961 struct Scsi_Host *sh = NULL;
962
cfe5badc
ST		 963 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
964 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 965
966 if (!added || !removed) {
967 dev_warn(&h->pdev->dev, "out of memory in "
968 "adjust_hpsa_scsi_table\n");
969 goto free_and_out;
970 }
971
972 spin_lock_irqsave(&h->devlock, flags);
973
974 /* find any devices in h->dev[] that are not in
975 * sd[] and remove them from h->dev[], and for any
976 * devices which have changed, remove the old device
977 * info and add the new device info.
bd9244f7
ST		 978 * If minor device attributes change, just update
979 * the existing device structure.
edd16368
SC		 980 */
981 i = 0;
982 nremoved = 0;
983 nadded = 0;
984 while (i < h->ndevices) {
985 csd = h->dev[i];
986 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
987 if (device_change == DEVICE_NOT_FOUND) {
988 changes++;
989 hpsa_scsi_remove_entry(h, hostno, i,
990 removed, &nremoved);
991 continue; /* remove ^^^, hence i not incremented */
992 } else if (device_change == DEVICE_CHANGED) {
993 changes++;
2a8ccf31
SC		 994 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
995 added, &nadded, removed, &nremoved);
c7f172dc
SC		 996 /* Set it to NULL to prevent it from being freed
997 * at the bottom of hpsa_update_scsi_devices()
998 */
999 sd[entry] = NULL;
bd9244f7
ST		 1000 } else if (device_change == DEVICE_UPDATED) {
1001 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
edd16368
SC		 1002 }
1003 i++;
1004 }
1005
1006 /* Now, make sure every device listed in sd[] is also
1007 * listed in h->dev[], adding them if they aren't found
1008 */
1009
1010 for (i = 0; i < nsds; i++) {
1011 if (!sd[i]) /* if already added above. */
1012 continue;
1013 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1014 h->ndevices, &entry);
1015 if (device_change == DEVICE_NOT_FOUND) {
1016 changes++;
1017 if (hpsa_scsi_add_entry(h, hostno, sd[i],
1018 added, &nadded) != 0)
1019 break;
1020 sd[i] = NULL; /* prevent from being freed later. */
1021 } else if (device_change == DEVICE_CHANGED) {
1022 /* should never happen... */
1023 changes++;
1024 dev_warn(&h->pdev->dev,
1025 "device unexpectedly changed.\n");
1026 /* but if it does happen, we just ignore that device */
1027 }
1028 }
1029 spin_unlock_irqrestore(&h->devlock, flags);
1030
1031 /* Don't notify scsi mid layer of any changes the first time through
1032 * (or if there are no changes) scsi_scan_host will do it later the
1033 * first time through.
1034 */
1035 if (hostno == -1 || !changes)
1036 goto free_and_out;
1037
1038 sh = h->scsi_host;
1039 /* Notify scsi mid layer of any removed devices */
1040 for (i = 0; i < nremoved; i++) {
1041 struct scsi_device *sdev =
1042 scsi_device_lookup(sh, removed[i]->bus,
1043 removed[i]->target, removed[i]->lun);
1044 if (sdev != NULL) {
1045 scsi_remove_device(sdev);
1046 scsi_device_put(sdev);
1047 } else {
1048 /* We don't expect to get here.
1049 * future cmds to this device will get selection
1050 * timeout as if the device was gone.
1051 */
1052 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1053 " for removal.", hostno, removed[i]->bus,
1054 removed[i]->target, removed[i]->lun);
1055 }
1056 kfree(removed[i]);
1057 removed[i] = NULL;
1058 }
1059
1060 /* Notify scsi mid layer of any added devices */
1061 for (i = 0; i < nadded; i++) {
1062 if (scsi_add_device(sh, added[i]->bus,
1063 added[i]->target, added[i]->lun) == 0)
1064 continue;
1065 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1066 "device not added.\n", hostno, added[i]->bus,
1067 added[i]->target, added[i]->lun);
1068 /* now we have to remove it from h->dev,
1069 * since it didn't get added to scsi mid layer
1070 */
1071 fixup_botched_add(h, added[i]);
1072 }
1073
1074free_and_out:
1075 kfree(added);
1076 kfree(removed);
edd16368
SC		 1077}
1078
1079/*
9e03aa2f 1080 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
edd16368
SC		 1081 * Assume's h->devlock is held.
1082 */
1083static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1084 int bus, int target, int lun)
1085{
1086 int i;
1087 struct hpsa_scsi_dev_t *sd;
1088
1089 for (i = 0; i < h->ndevices; i++) {
1090 sd = h->dev[i];
1091 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1092 return sd;
1093 }
1094 return NULL;
1095}
1096
1097/* link sdev->hostdata to our per-device structure. */
1098static int hpsa_slave_alloc(struct scsi_device *sdev)
1099{
1100 struct hpsa_scsi_dev_t *sd;
1101 unsigned long flags;
1102 struct ctlr_info *h;
1103
1104 h = sdev_to_hba(sdev);
1105 spin_lock_irqsave(&h->devlock, flags);
1106 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1107 sdev_id(sdev), sdev->lun);
1108 if (sd != NULL)
1109 sdev->hostdata = sd;
1110 spin_unlock_irqrestore(&h->devlock, flags);
1111 return 0;
1112}
1113
1114static void hpsa_slave_destroy(struct scsi_device *sdev)
1115{
bcc44255 1116 /* nothing to do. */
edd16368
SC		 1117}
1118
33a2ffce
SC		 1119static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1120{
1121 int i;
1122
1123 if (!h->cmd_sg_list)
1124 return;
1125 for (i = 0; i < h->nr_cmds; i++) {
1126 kfree(h->cmd_sg_list[i]);
1127 h->cmd_sg_list[i] = NULL;
1128 }
1129 kfree(h->cmd_sg_list);
1130 h->cmd_sg_list = NULL;
1131}
1132
1133static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1134{
1135 int i;
1136
1137 if (h->chainsize <= 0)
1138 return 0;
1139
1140 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1141 GFP_KERNEL);
1142 if (!h->cmd_sg_list)
1143 return -ENOMEM;
1144 for (i = 0; i < h->nr_cmds; i++) {
1145 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1146 h->chainsize, GFP_KERNEL);
1147 if (!h->cmd_sg_list[i])
1148 goto clean;
1149 }
1150 return 0;
1151
1152clean:
1153 hpsa_free_sg_chain_blocks(h);
1154 return -ENOMEM;
1155}
1156
e2bea6df 1157static int hpsa_map_sg_chain_block(struct ctlr_info *h,
33a2ffce
SC		 1158 struct CommandList *c)
1159{
1160 struct SGDescriptor *chain_sg, *chain_block;
1161 u64 temp64;
1162
1163 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1164 chain_block = h->cmd_sg_list[c->cmdindex];
1165 chain_sg->Ext = HPSA_SG_CHAIN;
1166 chain_sg->Len = sizeof(*chain_sg) *
1167 (c->Header.SGTotal - h->max_cmd_sg_entries);
1168 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1169 PCI_DMA_TODEVICE);
e2bea6df
SC		 1170 if (dma_mapping_error(&h->pdev->dev, temp64)) {
1171 /* prevent subsequent unmapping */
1172 chain_sg->Addr.lower = 0;
1173 chain_sg->Addr.upper = 0;
1174 return -1;
1175 }
33a2ffce
SC		 1176 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1177 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
e2bea6df 1178 return 0;
33a2ffce
SC		 1179}
1180
1181static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1182 struct CommandList *c)
1183{
1184 struct SGDescriptor *chain_sg;
1185 union u64bit temp64;
1186
1187 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1188 return;
1189
1190 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1191 temp64.val32.lower = chain_sg->Addr.lower;
1192 temp64.val32.upper = chain_sg->Addr.upper;
1193 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1194}
1195
1fb011fb 1196static void complete_scsi_command(struct CommandList *cp)
edd16368
SC		 1197{
1198 struct scsi_cmnd *cmd;
1199 struct ctlr_info *h;
1200 struct ErrorInfo *ei;
1201
1202 unsigned char sense_key;
1203 unsigned char asc; /* additional sense code */
1204 unsigned char ascq; /* additional sense code qualifier */
db111e18 1205 unsigned long sense_data_size;
edd16368
SC		 1206
1207 ei = cp->err_info;
1208 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1209 h = cp->h;
1210
1211 scsi_dma_unmap(cmd); /* undo the DMA mappings */
33a2ffce
SC		 1212 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1213 hpsa_unmap_sg_chain_block(h, cp);
edd16368
SC		 1214
1215 cmd->result = (DID_OK << 16); /* host byte */
1216 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
5512672f 1217 cmd->result |= ei->ScsiStatus;
edd16368
SC		 1218
1219 /* copy the sense data whether we need to or not. */
db111e18
SC		 1220 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1221 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1222 else
1223 sense_data_size = sizeof(ei->SenseInfo);
1224 if (ei->SenseLen < sense_data_size)
1225 sense_data_size = ei->SenseLen;
1226
1227 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
edd16368
SC		 1228 scsi_set_resid(cmd, ei->ResidualCnt);
1229
1230 if (ei->CommandStatus == 0) {
edd16368 1231 cmd_free(h, cp);
2cc5bfaf 1232 cmd->scsi_done(cmd);
edd16368
SC		 1233 return;
1234 }
1235
1236 /* an error has occurred */
1237 switch (ei->CommandStatus) {
1238
1239 case CMD_TARGET_STATUS:
1240 if (ei->ScsiStatus) {
1241 /* Get sense key */
1242 sense_key = 0xf & ei->SenseInfo[2];
1243 /* Get additional sense code */
1244 asc = ei->SenseInfo[12];
1245 /* Get addition sense code qualifier */
1246 ascq = ei->SenseInfo[13];
1247 }
1248
1249 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1250 if (check_for_unit_attention(h, cp)) {
1251 cmd->result = DID_SOFT_ERROR << 16;
1252 break;
1253 }
1254 if (sense_key == ILLEGAL_REQUEST) {
1255 /*
1256 * SCSI REPORT_LUNS is commonly unsupported on
1257 * Smart Array. Suppress noisy complaint.
1258 */
1259 if (cp->Request.CDB[0] == REPORT_LUNS)
1260 break;
1261
1262 /* If ASC/ASCQ indicate Logical Unit
1263 * Not Supported condition,
1264 */
1265 if ((asc == 0x25) && (ascq == 0x0)) {
1266 dev_warn(&h->pdev->dev, "cp %p "
1267 "has check condition\n", cp);
1268 break;
1269 }
1270 }
1271
1272 if (sense_key == NOT_READY) {
1273 /* If Sense is Not Ready, Logical Unit
1274 * Not ready, Manual Intervention
1275 * required
1276 */
1277 if ((asc == 0x04) && (ascq == 0x03)) {
edd16368
SC		 1278 dev_warn(&h->pdev->dev, "cp %p "
1279 "has check condition: unit "
1280 "not ready, manual "
1281 "intervention required\n", cp);
1282 break;
1283 }
1284 }
1d3b3609
MG		 1285 if (sense_key == ABORTED_COMMAND) {
1286 /* Aborted command is retryable */
1287 dev_warn(&h->pdev->dev, "cp %p "
1288 "has check condition: aborted command: "
1289 "ASC: 0x%x, ASCQ: 0x%x\n",
1290 cp, asc, ascq);
2e311fba 1291 cmd->result |= DID_SOFT_ERROR << 16;
1d3b3609
MG		 1292 break;
1293 }
edd16368 1294 /* Must be some other type of check condition */
21b8e4ef 1295 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
edd16368
SC		 1296 "unknown type: "
1297 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1298 "Returning result: 0x%x, "
1299 "cmd=[%02x %02x %02x %02x %02x "
807be732 1300 "%02x %02x %02x %02x %02x %02x "
edd16368
SC		 1301 "%02x %02x %02x %02x %02x]\n",
1302 cp, sense_key, asc, ascq,
1303 cmd->result,
1304 cmd->cmnd[0], cmd->cmnd[1],
1305 cmd->cmnd[2], cmd->cmnd[3],
1306 cmd->cmnd[4], cmd->cmnd[5],
1307 cmd->cmnd[6], cmd->cmnd[7],
807be732
MM		 1308 cmd->cmnd[8], cmd->cmnd[9],
1309 cmd->cmnd[10], cmd->cmnd[11],
1310 cmd->cmnd[12], cmd->cmnd[13],
1311 cmd->cmnd[14], cmd->cmnd[15]);
edd16368
SC		 1312 break;
1313 }
1314
1315
1316 /* Problem was not a check condition
1317 * Pass it up to the upper layers...
1318 */
1319 if (ei->ScsiStatus) {
1320 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1321 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1322 "Returning result: 0x%x\n",
1323 cp, ei->ScsiStatus,
1324 sense_key, asc, ascq,
1325 cmd->result);
1326 } else { /* scsi status is zero??? How??? */
1327 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1328 "Returning no connection.\n", cp),
1329
1330 /* Ordinarily, this case should never happen,
1331 * but there is a bug in some released firmware
1332 * revisions that allows it to happen if, for
1333 * example, a 4100 backplane loses power and
1334 * the tape drive is in it. We assume that
1335 * it's a fatal error of some kind because we
1336 * can't show that it wasn't. We will make it
1337 * look like selection timeout since that is
1338 * the most common reason for this to occur,
1339 * and it's severe enough.
1340 */
1341
1342 cmd->result = DID_NO_CONNECT << 16;
1343 }
1344 break;
1345
1346 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1347 break;
1348 case CMD_DATA_OVERRUN:
1349 dev_warn(&h->pdev->dev, "cp %p has"
1350 " completed with data overrun "
1351 "reported\n", cp);
1352 break;
1353 case CMD_INVALID: {
1354 /* print_bytes(cp, sizeof(*cp), 1, 0);
1355 print_cmd(cp); */
1356 /* We get CMD_INVALID if you address a non-existent device
1357 * instead of a selection timeout (no response). You will
1358 * see this if you yank out a drive, then try to access it.
1359 * This is kind of a shame because it means that any other
1360 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1361 * missing target. */
1362 cmd->result = DID_NO_CONNECT << 16;
1363 }
1364 break;
1365 case CMD_PROTOCOL_ERR:
256d0eaa 1366 cmd->result = DID_ERROR << 16;
edd16368 1367 dev_warn(&h->pdev->dev, "cp %p has "
256d0eaa 1368 "protocol error\n", cp);
edd16368
SC		 1369 break;
1370 case CMD_HARDWARE_ERR:
1371 cmd->result = DID_ERROR << 16;
1372 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1373 break;
1374 case CMD_CONNECTION_LOST:
1375 cmd->result = DID_ERROR << 16;
1376 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1377 break;
1378 case CMD_ABORTED:
1379 cmd->result = DID_ABORT << 16;
1380 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1381 cp, ei->ScsiStatus);
1382 break;
1383 case CMD_ABORT_FAILED:
1384 cmd->result = DID_ERROR << 16;
1385 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1386 break;
1387 case CMD_UNSOLICITED_ABORT:
f6e76055
SC		 1388 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1389 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
edd16368
SC		 1390 "abort\n", cp);
1391 break;
1392 case CMD_TIMEOUT:
1393 cmd->result = DID_TIME_OUT << 16;
1394 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1395 break;
1d5e2ed0
SC		 1396 case CMD_UNABORTABLE:
1397 cmd->result = DID_ERROR << 16;
1398 dev_warn(&h->pdev->dev, "Command unabortable\n");
1399 break;
edd16368
SC		 1400 default:
1401 cmd->result = DID_ERROR << 16;
1402 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1403 cp, ei->CommandStatus);
1404 }
edd16368 1405 cmd_free(h, cp);
2cc5bfaf 1406 cmd->scsi_done(cmd);
edd16368
SC		 1407}
1408
edd16368
SC		 1409static void hpsa_pci_unmap(struct pci_dev *pdev,
1410 struct CommandList *c, int sg_used, int data_direction)
1411{
1412 int i;
1413 union u64bit addr64;
1414
1415 for (i = 0; i < sg_used; i++) {
1416 addr64.val32.lower = c->SG[i].Addr.lower;
1417 addr64.val32.upper = c->SG[i].Addr.upper;
1418 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1419 data_direction);
1420 }
1421}
1422
a2dac136 1423static int hpsa_map_one(struct pci_dev *pdev,
edd16368
SC		 1424 struct CommandList *cp,
1425 unsigned char *buf,
1426 size_t buflen,
1427 int data_direction)
1428{
01a02ffc 1429 u64 addr64;
edd16368
SC		 1430
1431 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1432 cp->Header.SGList = 0;
1433 cp->Header.SGTotal = 0;
a2dac136 1434 return 0;
edd16368
SC		 1435 }
1436
01a02ffc 1437 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
eceaae18 1438 if (dma_mapping_error(&pdev->dev, addr64)) {
a2dac136 1439 /* Prevent subsequent unmap of something never mapped */
eceaae18
SK		 1440 cp->Header.SGList = 0;
1441 cp->Header.SGTotal = 0;
a2dac136 1442 return -1;
eceaae18 1443 }
edd16368 1444 cp->SG[0].Addr.lower =
01a02ffc 1445 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
edd16368 1446 cp->SG[0].Addr.upper =
01a02ffc 1447 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
edd16368 1448 cp->SG[0].Len = buflen;
01a02ffc
SC		 1449 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1450 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
a2dac136 1451 return 0;
edd16368
SC		 1452}
1453
1454static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1455 struct CommandList *c)
1456{
1457 DECLARE_COMPLETION_ONSTACK(wait);
1458
1459 c->waiting = &wait;
1460 enqueue_cmd_and_start_io(h, c);
1461 wait_for_completion(&wait);
1462}
1463
a0c12413
SC		 1464static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1465 struct CommandList *c)
1466{
1467 unsigned long flags;
1468
1469 /* If controller lockup detected, fake a hardware error. */
1470 spin_lock_irqsave(&h->lock, flags);
1471 if (unlikely(h->lockup_detected)) {
1472 spin_unlock_irqrestore(&h->lock, flags);
1473 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1474 } else {
1475 spin_unlock_irqrestore(&h->lock, flags);
1476 hpsa_scsi_do_simple_cmd_core(h, c);
1477 }
1478}
1479
9c2fc160 1480#define MAX_DRIVER_CMD_RETRIES 25
edd16368
SC		 1481static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1482 struct CommandList *c, int data_direction)
1483{
9c2fc160 1484 int backoff_time = 10, retry_count = 0;
edd16368
SC		 1485
1486 do {
7630abd0 1487 memset(c->err_info, 0, sizeof(*c->err_info));
edd16368
SC		 1488 hpsa_scsi_do_simple_cmd_core(h, c);
1489 retry_count++;
9c2fc160
SC		 1490 if (retry_count > 3) {
1491 msleep(backoff_time);
1492 if (backoff_time < 1000)
1493 backoff_time *= 2;
1494 }
852af20a 1495 } while ((check_for_unit_attention(h, c) ||
9c2fc160
SC		 1496 check_for_busy(h, c)) &&
1497 retry_count <= MAX_DRIVER_CMD_RETRIES);
edd16368
SC		 1498 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1499}
1500
1501static void hpsa_scsi_interpret_error(struct CommandList *cp)
1502{
1503 struct ErrorInfo *ei;
1504 struct device *d = &cp->h->pdev->dev;
1505
1506 ei = cp->err_info;
1507 switch (ei->CommandStatus) {
1508 case CMD_TARGET_STATUS:
1509 dev_warn(d, "cmd %p has completed with errors\n", cp);
1510 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1511 ei->ScsiStatus);
1512 if (ei->ScsiStatus == 0)
1513 dev_warn(d, "SCSI status is abnormally zero. "
1514 "(probably indicates selection timeout "
1515 "reported incorrectly due to a known "
1516 "firmware bug, circa July, 2001.)\n");
1517 break;
1518 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1519 dev_info(d, "UNDERRUN\n");
1520 break;
1521 case CMD_DATA_OVERRUN:
1522 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1523 break;
1524 case CMD_INVALID: {
1525 /* controller unfortunately reports SCSI passthru's
1526 * to non-existent targets as invalid commands.
1527 */
1528 dev_warn(d, "cp %p is reported invalid (probably means "
1529 "target device no longer present)\n", cp);
1530 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1531 print_cmd(cp); */
1532 }
1533 break;
1534 case CMD_PROTOCOL_ERR:
1535 dev_warn(d, "cp %p has protocol error \n", cp);
1536 break;
1537 case CMD_HARDWARE_ERR:
1538 /* cmd->result = DID_ERROR << 16; */
1539 dev_warn(d, "cp %p had hardware error\n", cp);
1540 break;
1541 case CMD_CONNECTION_LOST:
1542 dev_warn(d, "cp %p had connection lost\n", cp);
1543 break;
1544 case CMD_ABORTED:
1545 dev_warn(d, "cp %p was aborted\n", cp);
1546 break;
1547 case CMD_ABORT_FAILED:
1548 dev_warn(d, "cp %p reports abort failed\n", cp);
1549 break;
1550 case CMD_UNSOLICITED_ABORT:
1551 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1552 break;
1553 case CMD_TIMEOUT:
1554 dev_warn(d, "cp %p timed out\n", cp);
1555 break;
1d5e2ed0
SC		 1556 case CMD_UNABORTABLE:
1557 dev_warn(d, "Command unabortable\n");
1558 break;
edd16368
SC		 1559 default:
1560 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1561 ei->CommandStatus);
1562 }
1563}
1564
1565static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1566 unsigned char page, unsigned char *buf,
1567 unsigned char bufsize)
1568{
1569 int rc = IO_OK;
1570 struct CommandList *c;
1571 struct ErrorInfo *ei;
1572
1573 c = cmd_special_alloc(h);
1574
1575 if (c == NULL) { /* trouble... */
1576 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
ecd9aad4 1577 return -ENOMEM;
edd16368
SC		 1578 }
1579
a2dac136
SC		 1580 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
1581 page, scsi3addr, TYPE_CMD)) {
1582 rc = -1;
1583 goto out;
1584 }
edd16368
SC		 1585 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1586 ei = c->err_info;
1587 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1588 hpsa_scsi_interpret_error(c);
1589 rc = -1;
1590 }
a2dac136 1591out:
edd16368
SC		 1592 cmd_special_free(h, c);
1593 return rc;
1594}
1595
1596static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1597{
1598 int rc = IO_OK;
1599 struct CommandList *c;
1600 struct ErrorInfo *ei;
1601
1602 c = cmd_special_alloc(h);
1603
1604 if (c == NULL) { /* trouble... */
1605 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
e9ea04a6 1606 return -ENOMEM;
edd16368
SC		 1607 }
1608
a2dac136
SC		 1609 /* fill_cmd can't fail here, no data buffer to map. */
1610 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h,
1611 NULL, 0, 0, scsi3addr, TYPE_MSG);
edd16368
SC		 1612 hpsa_scsi_do_simple_cmd_core(h, c);
1613 /* no unmap needed here because no data xfer. */
1614
1615 ei = c->err_info;
1616 if (ei->CommandStatus != 0) {
1617 hpsa_scsi_interpret_error(c);
1618 rc = -1;
1619 }
1620 cmd_special_free(h, c);
1621 return rc;
1622}
1623
1624static void hpsa_get_raid_level(struct ctlr_info *h,
1625 unsigned char *scsi3addr, unsigned char *raid_level)
1626{
1627 int rc;
1628 unsigned char *buf;
1629
1630 *raid_level = RAID_UNKNOWN;
1631 buf = kzalloc(64, GFP_KERNEL);
1632 if (!buf)
1633 return;
1634 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1635 if (rc == 0)
1636 *raid_level = buf[8];
1637 if (*raid_level > RAID_UNKNOWN)
1638 *raid_level = RAID_UNKNOWN;
1639 kfree(buf);
1640 return;
1641}
1642
1643/* Get the device id from inquiry page 0x83 */
1644static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1645 unsigned char *device_id, int buflen)
1646{
1647 int rc;
1648 unsigned char *buf;
1649
1650 if (buflen > 16)
1651 buflen = 16;
1652 buf = kzalloc(64, GFP_KERNEL);
1653 if (!buf)
1654 return -1;
1655 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1656 if (rc == 0)
1657 memcpy(device_id, &buf[8], buflen);
1658 kfree(buf);
1659 return rc != 0;
1660}
1661
1662static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1663 struct ReportLUNdata *buf, int bufsize,
1664 int extended_response)
1665{
1666 int rc = IO_OK;
1667 struct CommandList *c;
1668 unsigned char scsi3addr[8];
1669 struct ErrorInfo *ei;
1670
1671 c = cmd_special_alloc(h);
1672 if (c == NULL) { /* trouble... */
1673 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1674 return -1;
1675 }
e89c0ae7
SC		 1676 /* address the controller */
1677 memset(scsi3addr, 0, sizeof(scsi3addr));
a2dac136
SC		 1678 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1679 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
1680 rc = -1;
1681 goto out;
1682 }
edd16368
SC		 1683 if (extended_response)
1684 c->Request.CDB[1] = extended_response;
1685 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1686 ei = c->err_info;
1687 if (ei->CommandStatus != 0 &&
1688 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1689 hpsa_scsi_interpret_error(c);
1690 rc = -1;
1691 }
a2dac136 1692out:
edd16368
SC		 1693 cmd_special_free(h, c);
1694 return rc;
1695}
1696
1697static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1698 struct ReportLUNdata *buf,
1699 int bufsize, int extended_response)
1700{
1701 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1702}
1703
1704static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1705 struct ReportLUNdata *buf, int bufsize)
1706{
1707 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1708}
1709
1710static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1711 int bus, int target, int lun)
1712{
1713 device->bus = bus;
1714 device->target = target;
1715 device->lun = lun;
1716}
1717
1718static int hpsa_update_device_info(struct ctlr_info *h,
0b0e1d6c
SC		 1719 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1720 unsigned char *is_OBDR_device)
edd16368 1721{
0b0e1d6c
SC		 1722
1723#define OBDR_SIG_OFFSET 43
1724#define OBDR_TAPE_SIG "$DR-10"
1725#define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1726#define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1727
ea6d3bc3 1728 unsigned char *inq_buff;
0b0e1d6c 1729 unsigned char *obdr_sig;
edd16368 1730
ea6d3bc3 1731 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
edd16368
SC		 1732 if (!inq_buff)
1733 goto bail_out;
1734
edd16368
SC		 1735 /* Do an inquiry to the device to see what it is. */
1736 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1737 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1738 /* Inquiry failed (msg printed already) */
1739 dev_err(&h->pdev->dev,
1740 "hpsa_update_device_info: inquiry failed\n");
1741 goto bail_out;
1742 }
1743
edd16368
SC		 1744 this_device->devtype = (inq_buff[0] & 0x1f);
1745 memcpy(this_device->scsi3addr, scsi3addr, 8);
1746 memcpy(this_device->vendor, &inq_buff[8],
1747 sizeof(this_device->vendor));
1748 memcpy(this_device->model, &inq_buff[16],
1749 sizeof(this_device->model));
edd16368
SC		 1750 memset(this_device->device_id, 0,
1751 sizeof(this_device->device_id));
1752 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1753 sizeof(this_device->device_id));
1754
1755 if (this_device->devtype == TYPE_DISK &&
1756 is_logical_dev_addr_mode(scsi3addr))
1757 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1758 else
1759 this_device->raid_level = RAID_UNKNOWN;
1760
0b0e1d6c
SC		 1761 if (is_OBDR_device) {
1762 /* See if this is a One-Button-Disaster-Recovery device
1763 * by looking for "$DR-10" at offset 43 in inquiry data.
1764 */
1765 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1766 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1767 strncmp(obdr_sig, OBDR_TAPE_SIG,
1768 OBDR_SIG_LEN) == 0);
1769 }
1770
edd16368
SC		 1771 kfree(inq_buff);
1772 return 0;
1773
1774bail_out:
1775 kfree(inq_buff);
1776 return 1;
1777}
1778
4f4eb9f1 1779static unsigned char *ext_target_model[] = {
edd16368
SC		 1780 "MSA2012",
1781 "MSA2024",
1782 "MSA2312",
1783 "MSA2324",
fda38518 1784 "P2000 G3 SAS",
edd16368
SC		 1785 NULL,
1786};
1787
4f4eb9f1 1788static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
edd16368
SC		 1789{
1790 int i;
1791
4f4eb9f1
ST		 1792 for (i = 0; ext_target_model[i]; i++)
1793 if (strncmp(device->model, ext_target_model[i],
1794 strlen(ext_target_model[i])) == 0)
edd16368
SC		 1795 return 1;
1796 return 0;
1797}
1798
1799/* Helper function to assign bus, target, lun mapping of devices.
4f4eb9f1 1800 * Puts non-external target logical volumes on bus 0, external target logical
edd16368
SC		 1801 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1802 * Logical drive target and lun are assigned at this time, but
1803 * physical device lun and target assignment are deferred (assigned
1804 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1805 */
1806static void figure_bus_target_lun(struct ctlr_info *h,
1f310bde 1807 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
edd16368 1808{
1f310bde
SC		 1809 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1810
1811 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1812 /* physical device, target and lun filled in later */
edd16368 1813 if (is_hba_lunid(lunaddrbytes))
1f310bde 1814 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
edd16368 1815 else
1f310bde
SC		 1816 /* defer target, lun assignment for physical devices */
1817 hpsa_set_bus_target_lun(device, 2, -1, -1);
1818 return;
1819 }
1820 /* It's a logical device */
4f4eb9f1
ST		 1821 if (is_ext_target(h, device)) {
1822 /* external target way, put logicals on bus 1
1f310bde
SC		 1823 * and match target/lun numbers box
1824 * reports, other smart array, bus 0, target 0, match lunid
1825 */
1826 hpsa_set_bus_target_lun(device,
1827 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1828 return;
edd16368 1829 }
1f310bde 1830 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
edd16368
SC		 1831}
1832
1833/*
1834 * If there is no lun 0 on a target, linux won't find any devices.
4f4eb9f1 1835 * For the external targets (arrays), we have to manually detect the enclosure
edd16368
SC		 1836 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1837 * it for some reason. *tmpdevice is the target we're adding,
1838 * this_device is a pointer into the current element of currentsd[]
1839 * that we're building up in update_scsi_devices(), below.
1840 * lunzerobits is a bitmap that tracks which targets already have a
1841 * lun 0 assigned.
1842 * Returns 1 if an enclosure was added, 0 if not.
1843 */
4f4eb9f1 1844static int add_ext_target_dev(struct ctlr_info *h,
edd16368 1845 struct hpsa_scsi_dev_t *tmpdevice,
01a02ffc 1846 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
4f4eb9f1 1847 unsigned long lunzerobits[], int *n_ext_target_devs)
edd16368
SC		 1848{
1849 unsigned char scsi3addr[8];
1850
1f310bde 1851 if (test_bit(tmpdevice->target, lunzerobits))
edd16368
SC		 1852 return 0; /* There is already a lun 0 on this target. */
1853
1854 if (!is_logical_dev_addr_mode(lunaddrbytes))
1855 return 0; /* It's the logical targets that may lack lun 0. */
1856
4f4eb9f1
ST		 1857 if (!is_ext_target(h, tmpdevice))
1858 return 0; /* Only external target devices have this problem. */
edd16368 1859
1f310bde 1860 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
edd16368
SC		 1861 return 0;
1862
c4f8a299 1863 memset(scsi3addr, 0, 8);
1f310bde 1864 scsi3addr[3] = tmpdevice->target;
edd16368
SC		 1865 if (is_hba_lunid(scsi3addr))
1866 return 0; /* Don't add the RAID controller here. */
1867
339b2b14
SC		 1868 if (is_scsi_rev_5(h))
1869 return 0; /* p1210m doesn't need to do this. */
1870
4f4eb9f1 1871 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
aca4a520
ST		 1872 dev_warn(&h->pdev->dev, "Maximum number of external "
1873 "target devices exceeded. Check your hardware "
edd16368
SC		 1874 "configuration.");
1875 return 0;
1876 }
1877
0b0e1d6c 1878 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
edd16368 1879 return 0;
4f4eb9f1 1880 (*n_ext_target_devs)++;
1f310bde
SC		 1881 hpsa_set_bus_target_lun(this_device,
1882 tmpdevice->bus, tmpdevice->target, 0);
1883 set_bit(tmpdevice->target, lunzerobits);
edd16368
SC		 1884 return 1;
1885}
1886
1887/*
1888 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1889 * logdev. The number of luns in physdev and logdev are returned in
1890 * *nphysicals and *nlogicals, respectively.
1891 * Returns 0 on success, -1 otherwise.
1892 */
1893static int hpsa_gather_lun_info(struct ctlr_info *h,
1894 int reportlunsize,
01a02ffc
SC		 1895 struct ReportLUNdata *physdev, u32 *nphysicals,
1896 struct ReportLUNdata *logdev, u32 *nlogicals)
edd16368
SC		 1897{
1898 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1899 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1900 return -1;
1901 }
6df1e954 1902 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
edd16368
SC		 1903 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1904 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1905 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1906 *nphysicals - HPSA_MAX_PHYS_LUN);
1907 *nphysicals = HPSA_MAX_PHYS_LUN;
1908 }
1909 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1910 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1911 return -1;
1912 }
6df1e954 1913 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
edd16368
SC		 1914 /* Reject Logicals in excess of our max capability. */
1915 if (*nlogicals > HPSA_MAX_LUN) {
1916 dev_warn(&h->pdev->dev,
1917 "maximum logical LUNs (%d) exceeded. "
1918 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1919 *nlogicals - HPSA_MAX_LUN);
1920 *nlogicals = HPSA_MAX_LUN;
1921 }
1922 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1923 dev_warn(&h->pdev->dev,
1924 "maximum logical + physical LUNs (%d) exceeded. "
1925 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1926 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1927 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1928 }
1929 return 0;
1930}
1931
339b2b14
SC		 1932u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1933 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1934 struct ReportLUNdata *logdev_list)
1935{
1936 /* Helper function, figure out where the LUN ID info is coming from
1937 * given index i, lists of physical and logical devices, where in
1938 * the list the raid controller is supposed to appear (first or last)
1939 */
1940
1941 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1942 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1943
1944 if (i == raid_ctlr_position)
1945 return RAID_CTLR_LUNID;
1946
1947 if (i < logicals_start)
1948 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1949
1950 if (i < last_device)
1951 return &logdev_list->LUN[i - nphysicals -
1952 (raid_ctlr_position == 0)][0];
1953 BUG();
1954 return NULL;
1955}
1956
edd16368
SC		 1957static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1958{
1959 /* the idea here is we could get notified
1960 * that some devices have changed, so we do a report
1961 * physical luns and report logical luns cmd, and adjust
1962 * our list of devices accordingly.
1963 *
1964 * The scsi3addr's of devices won't change so long as the
1965 * adapter is not reset. That means we can rescan and
1966 * tell which devices we already know about, vs. new
1967 * devices, vs. disappearing devices.
1968 */
1969 struct ReportLUNdata *physdev_list = NULL;
1970 struct ReportLUNdata *logdev_list = NULL;
01a02ffc
SC		 1971 u32 nphysicals = 0;
1972 u32 nlogicals = 0;
1973 u32 ndev_allocated = 0;
edd16368
SC		 1974 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1975 int ncurrent = 0;
1976 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
4f4eb9f1 1977 int i, n_ext_target_devs, ndevs_to_allocate;
339b2b14 1978 int raid_ctlr_position;
aca4a520 1979 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
edd16368 1980
cfe5badc 1981 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
edd16368
SC		 1982 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1983 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
edd16368
SC		 1984 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1985
0b0e1d6c 1986 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
edd16368
SC		 1987 dev_err(&h->pdev->dev, "out of memory\n");
1988 goto out;
1989 }
1990 memset(lunzerobits, 0, sizeof(lunzerobits));
1991
1992 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1993 logdev_list, &nlogicals))
1994 goto out;
1995
aca4a520
ST		 1996 /* We might see up to the maximum number of logical and physical disks
1997 * plus external target devices, and a device for the local RAID
1998 * controller.
edd16368 1999 */
aca4a520 2000 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
edd16368
SC		 2001
2002 /* Allocate the per device structures */
2003 for (i = 0; i < ndevs_to_allocate; i++) {
b7ec021f
ST		 2004 if (i >= HPSA_MAX_DEVICES) {
2005 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
2006 " %d devices ignored.\n", HPSA_MAX_DEVICES,
2007 ndevs_to_allocate - HPSA_MAX_DEVICES);
2008 break;
2009 }
2010
edd16368
SC		 2011 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
2012 if (!currentsd[i]) {
2013 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
2014 __FILE__, __LINE__);
2015 goto out;
2016 }
2017 ndev_allocated++;
2018 }
2019
339b2b14
SC		 2020 if (unlikely(is_scsi_rev_5(h)))
2021 raid_ctlr_position = 0;
2022 else
2023 raid_ctlr_position = nphysicals + nlogicals;
2024
edd16368 2025 /* adjust our table of devices */
4f4eb9f1 2026 n_ext_target_devs = 0;
edd16368 2027 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
0b0e1d6c 2028 u8 *lunaddrbytes, is_OBDR = 0;
edd16368
SC		 2029
2030 /* Figure out where the LUN ID info is coming from */
339b2b14
SC		 2031 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
2032 i, nphysicals, nlogicals, physdev_list, logdev_list);
edd16368 2033 /* skip masked physical devices. */
339b2b14
SC		 2034 if (lunaddrbytes[3] & 0xC0 &&
2035 i < nphysicals + (raid_ctlr_position == 0))
edd16368
SC		 2036 continue;
2037
2038 /* Get device type, vendor, model, device id */
0b0e1d6c
SC		 2039 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
2040 &is_OBDR))
edd16368 2041 continue; /* skip it if we can't talk to it. */
1f310bde 2042 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
edd16368
SC		 2043 this_device = currentsd[ncurrent];
2044
2045 /*
4f4eb9f1 2046 * For external target devices, we have to insert a LUN 0 which
edd16368
SC		 2047 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
2048 * is nonetheless an enclosure device there. We have to
2049 * present that otherwise linux won't find anything if
2050 * there is no lun 0.
2051 */
4f4eb9f1 2052 if (add_ext_target_dev(h, tmpdevice, this_device,
1f310bde 2053 lunaddrbytes, lunzerobits,
4f4eb9f1 2054 &n_ext_target_devs)) {
edd16368
SC		 2055 ncurrent++;
2056 this_device = currentsd[ncurrent];
2057 }
2058
2059 *this_device = *tmpdevice;
edd16368
SC		 2060
2061 switch (this_device->devtype) {
0b0e1d6c 2062 case TYPE_ROM:
edd16368
SC		 2063 /* We don't *really* support actual CD-ROM devices,
2064 * just "One Button Disaster Recovery" tape drive
2065 * which temporarily pretends to be a CD-ROM drive.
2066 * So we check that the device is really an OBDR tape
2067 * device by checking for "$DR-10" in bytes 43-48 of
2068 * the inquiry data.
2069 */
0b0e1d6c
SC		 2070 if (is_OBDR)
2071 ncurrent++;
edd16368
SC		 2072 break;
2073 case TYPE_DISK:
2074 if (i < nphysicals)
2075 break;
2076 ncurrent++;
2077 break;
2078 case TYPE_TAPE:
2079 case TYPE_MEDIUM_CHANGER:
2080 ncurrent++;
2081 break;
2082 case TYPE_RAID:
2083 /* Only present the Smartarray HBA as a RAID controller.
2084 * If it's a RAID controller other than the HBA itself
2085 * (an external RAID controller, MSA500 or similar)
2086 * don't present it.
2087 */
2088 if (!is_hba_lunid(lunaddrbytes))
2089 break;
2090 ncurrent++;
2091 break;
2092 default:
2093 break;
2094 }
cfe5badc 2095 if (ncurrent >= HPSA_MAX_DEVICES)
edd16368
SC		 2096 break;
2097 }
2098 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2099out:
2100 kfree(tmpdevice);
2101 for (i = 0; i < ndev_allocated; i++)
2102 kfree(currentsd[i]);
2103 kfree(currentsd);
edd16368
SC		 2104 kfree(physdev_list);
2105 kfree(logdev_list);
edd16368
SC		 2106}
2107
2108/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2109 * dma mapping and fills in the scatter gather entries of the
2110 * hpsa command, cp.
2111 */
33a2ffce 2112static int hpsa_scatter_gather(struct ctlr_info *h,
edd16368
SC		 2113 struct CommandList *cp,
2114 struct scsi_cmnd *cmd)
2115{
2116 unsigned int len;
2117 struct scatterlist *sg;
01a02ffc 2118 u64 addr64;
33a2ffce
SC		 2119 int use_sg, i, sg_index, chained;
2120 struct SGDescriptor *curr_sg;
edd16368 2121
33a2ffce 2122 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
edd16368
SC		 2123
2124 use_sg = scsi_dma_map(cmd);
2125 if (use_sg < 0)
2126 return use_sg;
2127
2128 if (!use_sg)
2129 goto sglist_finished;
2130
33a2ffce
SC		 2131 curr_sg = cp->SG;
2132 chained = 0;
2133 sg_index = 0;
edd16368 2134 scsi_for_each_sg(cmd, sg, use_sg, i) {
33a2ffce
SC		 2135 if (i == h->max_cmd_sg_entries - 1 &&
2136 use_sg > h->max_cmd_sg_entries) {
2137 chained = 1;
2138 curr_sg = h->cmd_sg_list[cp->cmdindex];
2139 sg_index = 0;
2140 }
01a02ffc 2141 addr64 = (u64) sg_dma_address(sg);
edd16368 2142 len = sg_dma_len(sg);
33a2ffce
SC		 2143 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2144 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2145 curr_sg->Len = len;
2146 curr_sg->Ext = 0; /* we are not chaining */
2147 curr_sg++;
2148 }
2149
2150 if (use_sg + chained > h->maxSG)
2151 h->maxSG = use_sg + chained;
2152
2153 if (chained) {
2154 cp->Header.SGList = h->max_cmd_sg_entries;
2155 cp->Header.SGTotal = (u16) (use_sg + 1);
e2bea6df
SC		 2156 if (hpsa_map_sg_chain_block(h, cp)) {
2157 scsi_dma_unmap(cmd);
2158 return -1;
2159 }
33a2ffce 2160 return 0;
edd16368
SC		 2161 }
2162
2163sglist_finished:
2164
01a02ffc
SC		 2165 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2166 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
edd16368
SC		 2167 return 0;
2168}
2169
2170
f281233d 2171static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
edd16368
SC		 2172 void (*done)(struct scsi_cmnd *))
2173{
2174 struct ctlr_info *h;
2175 struct hpsa_scsi_dev_t *dev;
2176 unsigned char scsi3addr[8];
2177 struct CommandList *c;
2178 unsigned long flags;
2179
2180 /* Get the ptr to our adapter structure out of cmd->host. */
2181 h = sdev_to_hba(cmd->device);
2182 dev = cmd->device->hostdata;
2183 if (!dev) {
2184 cmd->result = DID_NO_CONNECT << 16;
2185 done(cmd);
2186 return 0;
2187 }
2188 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2189
edd16368 2190 spin_lock_irqsave(&h->lock, flags);
a0c12413
SC		 2191 if (unlikely(h->lockup_detected)) {
2192 spin_unlock_irqrestore(&h->lock, flags);
2193 cmd->result = DID_ERROR << 16;
2194 done(cmd);
2195 return 0;
2196 }
edd16368 2197 spin_unlock_irqrestore(&h->lock, flags);
e16a33ad 2198 c = cmd_alloc(h);
edd16368
SC		 2199 if (c == NULL) { /* trouble... */
2200 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2201 return SCSI_MLQUEUE_HOST_BUSY;
2202 }
2203
2204 /* Fill in the command list header */
2205
2206 cmd->scsi_done = done; /* save this for use by completion code */
2207
2208 /* save c in case we have to abort it */
2209 cmd->host_scribble = (unsigned char *) c;
2210
2211 c->cmd_type = CMD_SCSI;
2212 c->scsi_cmd = cmd;
2213 c->Header.ReplyQueue = 0; /* unused in simple mode */
2214 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
303932fd
DB		 2215 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2216 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
edd16368
SC		 2217
2218 /* Fill in the request block... */
2219
2220 c->Request.Timeout = 0;
2221 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2222 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2223 c->Request.CDBLen = cmd->cmd_len;
2224 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2225 c->Request.Type.Type = TYPE_CMD;
2226 c->Request.Type.Attribute = ATTR_SIMPLE;
2227 switch (cmd->sc_data_direction) {
2228 case DMA_TO_DEVICE:
2229 c->Request.Type.Direction = XFER_WRITE;
2230 break;
2231 case DMA_FROM_DEVICE:
2232 c->Request.Type.Direction = XFER_READ;
2233 break;
2234 case DMA_NONE:
2235 c->Request.Type.Direction = XFER_NONE;
2236 break;
2237 case DMA_BIDIRECTIONAL:
2238 /* This can happen if a buggy application does a scsi passthru
2239 * and sets both inlen and outlen to non-zero. ( see
2240 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2241 */
2242
2243 c->Request.Type.Direction = XFER_RSVD;
2244 /* This is technically wrong, and hpsa controllers should
2245 * reject it with CMD_INVALID, which is the most correct
2246 * response, but non-fibre backends appear to let it
2247 * slide by, and give the same results as if this field
2248 * were set correctly. Either way is acceptable for
2249 * our purposes here.
2250 */
2251
2252 break;
2253
2254 default:
2255 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2256 cmd->sc_data_direction);
2257 BUG();
2258 break;
2259 }
2260
33a2ffce 2261 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
edd16368
SC		 2262 cmd_free(h, c);
2263 return SCSI_MLQUEUE_HOST_BUSY;
2264 }
2265 enqueue_cmd_and_start_io(h, c);
2266 /* the cmd'll come back via intr handler in complete_scsi_command() */
2267 return 0;
2268}
2269
f281233d
JG		 2270static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2271
a08a8471
SC		 2272static void hpsa_scan_start(struct Scsi_Host *sh)
2273{
2274 struct ctlr_info *h = shost_to_hba(sh);
2275 unsigned long flags;
2276
2277 /* wait until any scan already in progress is finished. */
2278 while (1) {
2279 spin_lock_irqsave(&h->scan_lock, flags);
2280 if (h->scan_finished)
2281 break;
2282 spin_unlock_irqrestore(&h->scan_lock, flags);
2283 wait_event(h->scan_wait_queue, h->scan_finished);
2284 /* Note: We don't need to worry about a race between this
2285 * thread and driver unload because the midlayer will
2286 * have incremented the reference count, so unload won't
2287 * happen if we're in here.
2288 */
2289 }
2290 h->scan_finished = 0; /* mark scan as in progress */
2291 spin_unlock_irqrestore(&h->scan_lock, flags);
2292
2293 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2294
2295 spin_lock_irqsave(&h->scan_lock, flags);
2296 h->scan_finished = 1; /* mark scan as finished. */
2297 wake_up_all(&h->scan_wait_queue);
2298 spin_unlock_irqrestore(&h->scan_lock, flags);
2299}
2300
2301static int hpsa_scan_finished(struct Scsi_Host *sh,
2302 unsigned long elapsed_time)
2303{
2304 struct ctlr_info *h = shost_to_hba(sh);
2305 unsigned long flags;
2306 int finished;
2307
2308 spin_lock_irqsave(&h->scan_lock, flags);
2309 finished = h->scan_finished;
2310 spin_unlock_irqrestore(&h->scan_lock, flags);
2311 return finished;
2312}
2313
667e23d4
SC		 2314static int hpsa_change_queue_depth(struct scsi_device *sdev,
2315 int qdepth, int reason)
2316{
2317 struct ctlr_info *h = sdev_to_hba(sdev);
2318
2319 if (reason != SCSI_QDEPTH_DEFAULT)
2320 return -ENOTSUPP;
2321
2322 if (qdepth < 1)
2323 qdepth = 1;
2324 else
2325 if (qdepth > h->nr_cmds)
2326 qdepth = h->nr_cmds;
2327 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2328 return sdev->queue_depth;
2329}
2330
edd16368
SC		 2331static void hpsa_unregister_scsi(struct ctlr_info *h)
2332{
2333 /* we are being forcibly unloaded, and may not refuse. */
2334 scsi_remove_host(h->scsi_host);
2335 scsi_host_put(h->scsi_host);
2336 h->scsi_host = NULL;
2337}
2338
2339static int hpsa_register_scsi(struct ctlr_info *h)
2340{
b705690d
SC		 2341 struct Scsi_Host *sh;
2342 int error;
edd16368 2343
b705690d
SC		 2344 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2345 if (sh == NULL)
2346 goto fail;
2347
2348 sh->io_port = 0;
2349 sh->n_io_port = 0;
2350 sh->this_id = -1;
2351 sh->max_channel = 3;
2352 sh->max_cmd_len = MAX_COMMAND_SIZE;
2353 sh->max_lun = HPSA_MAX_LUN;
2354 sh->max_id = HPSA_MAX_LUN;
2355 sh->can_queue = h->nr_cmds;
2356 sh->cmd_per_lun = h->nr_cmds;
2357 sh->sg_tablesize = h->maxsgentries;
2358 h->scsi_host = sh;
2359 sh->hostdata[0] = (unsigned long) h;
2360 sh->irq = h->intr[h->intr_mode];
2361 sh->unique_id = sh->irq;
2362 error = scsi_add_host(sh, &h->pdev->dev);
2363 if (error)
2364 goto fail_host_put;
2365 scsi_scan_host(sh);
2366 return 0;
2367
2368 fail_host_put:
2369 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2370 " failed for controller %d\n", __func__, h->ctlr);
2371 scsi_host_put(sh);
2372 return error;
2373 fail:
2374 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2375 " failed for controller %d\n", __func__, h->ctlr);
2376 return -ENOMEM;
edd16368
SC		 2377}
2378
2379static int wait_for_device_to_become_ready(struct ctlr_info *h,
2380 unsigned char lunaddr[])
2381{
2382 int rc = 0;
2383 int count = 0;
2384 int waittime = 1; /* seconds */
2385 struct CommandList *c;
2386
2387 c = cmd_special_alloc(h);
2388 if (!c) {
2389 dev_warn(&h->pdev->dev, "out of memory in "
2390 "wait_for_device_to_become_ready.\n");
2391 return IO_ERROR;
2392 }
2393
2394 /* Send test unit ready until device ready, or give up. */
2395 while (count < HPSA_TUR_RETRY_LIMIT) {
2396
2397 /* Wait for a bit. do this first, because if we send
2398 * the TUR right away, the reset will just abort it.
2399 */
2400 msleep(1000 * waittime);
2401 count++;
2402
2403 /* Increase wait time with each try, up to a point. */
2404 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2405 waittime = waittime * 2;
2406
a2dac136
SC		 2407 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
2408 (void) fill_cmd(c, TEST_UNIT_READY, h,
2409 NULL, 0, 0, lunaddr, TYPE_CMD);
edd16368
SC		 2410 hpsa_scsi_do_simple_cmd_core(h, c);
2411 /* no unmap needed here because no data xfer. */
2412
2413 if (c->err_info->CommandStatus == CMD_SUCCESS)
2414 break;
2415
2416 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2417 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2418 (c->err_info->SenseInfo[2] == NO_SENSE ||
2419 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2420 break;
2421
2422 dev_warn(&h->pdev->dev, "waiting %d secs "
2423 "for device to become ready.\n", waittime);
2424 rc = 1; /* device not ready. */
2425 }
2426
2427 if (rc)
2428 dev_warn(&h->pdev->dev, "giving up on device.\n");
2429 else
2430 dev_warn(&h->pdev->dev, "device is ready.\n");
2431
2432 cmd_special_free(h, c);
2433 return rc;
2434}
2435
2436/* Need at least one of these error handlers to keep ../scsi/hosts.c from
2437 * complaining. Doing a host- or bus-reset can't do anything good here.
2438 */
2439static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2440{
2441 int rc;
2442 struct ctlr_info *h;
2443 struct hpsa_scsi_dev_t *dev;
2444
2445 /* find the controller to which the command to be aborted was sent */
2446 h = sdev_to_hba(scsicmd->device);
2447 if (h == NULL) /* paranoia */
2448 return FAILED;
edd16368
SC		 2449 dev = scsicmd->device->hostdata;
2450 if (!dev) {
2451 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2452 "device lookup failed.\n");
2453 return FAILED;
2454 }
d416b0c7
SC		 2455 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2456 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
edd16368
SC		 2457 /* send a reset to the SCSI LUN which the command was sent to */
2458 rc = hpsa_send_reset(h, dev->scsi3addr);
2459 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2460 return SUCCESS;
2461
2462 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2463 return FAILED;
2464}
2465
6cba3f19
SC		 2466static void swizzle_abort_tag(u8 *tag)
2467{
2468 u8 original_tag[8];
2469
2470 memcpy(original_tag, tag, 8);
2471 tag[0] = original_tag[3];
2472 tag[1] = original_tag[2];
2473 tag[2] = original_tag[1];
2474 tag[3] = original_tag[0];
2475 tag[4] = original_tag[7];
2476 tag[5] = original_tag[6];
2477 tag[6] = original_tag[5];
2478 tag[7] = original_tag[4];
2479}
2480
75167d2c 2481static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
6cba3f19 2482 struct CommandList *abort, int swizzle)
75167d2c
SC		 2483{
2484 int rc = IO_OK;
2485 struct CommandList *c;
2486 struct ErrorInfo *ei;
2487
2488 c = cmd_special_alloc(h);
2489 if (c == NULL) { /* trouble... */
2490 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2491 return -ENOMEM;
2492 }
2493
a2dac136
SC		 2494 /* fill_cmd can't fail here, no buffer to map */
2495 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
2496 0, 0, scsi3addr, TYPE_MSG);
6cba3f19
SC		 2497 if (swizzle)
2498 swizzle_abort_tag(&c->Request.CDB[4]);
75167d2c
SC		 2499 hpsa_scsi_do_simple_cmd_core(h, c);
2500 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2501 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2502 /* no unmap needed here because no data xfer. */
2503
2504 ei = c->err_info;
2505 switch (ei->CommandStatus) {
2506 case CMD_SUCCESS:
2507 break;
2508 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2509 rc = -1;
2510 break;
2511 default:
2512 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2513 __func__, abort->Header.Tag.upper,
2514 abort->Header.Tag.lower);
2515 hpsa_scsi_interpret_error(c);
2516 rc = -1;
2517 break;
2518 }
2519 cmd_special_free(h, c);
2520 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2521 abort->Header.Tag.upper, abort->Header.Tag.lower);
2522 return rc;
2523}
2524
2525/*
2526 * hpsa_find_cmd_in_queue
2527 *
2528 * Used to determine whether a command (find) is still present
2529 * in queue_head. Optionally excludes the last element of queue_head.
2530 *
2531 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2532 * not yet been submitted, and so can be aborted by the driver without
2533 * sending an abort to the hardware.
2534 *
2535 * Returns pointer to command if found in queue, NULL otherwise.
2536 */
2537static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2538 struct scsi_cmnd *find, struct list_head *queue_head)
2539{
2540 unsigned long flags;
2541 struct CommandList *c = NULL; /* ptr into cmpQ */
2542
2543 if (!find)
2544 return 0;
2545 spin_lock_irqsave(&h->lock, flags);
2546 list_for_each_entry(c, queue_head, list) {
2547 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2548 continue;
2549 if (c->scsi_cmd == find) {
2550 spin_unlock_irqrestore(&h->lock, flags);
2551 return c;
2552 }
2553 }
2554 spin_unlock_irqrestore(&h->lock, flags);
2555 return NULL;
2556}
2557
6cba3f19
SC		 2558static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2559 u8 *tag, struct list_head *queue_head)
2560{
2561 unsigned long flags;
2562 struct CommandList *c;
2563
2564 spin_lock_irqsave(&h->lock, flags);
2565 list_for_each_entry(c, queue_head, list) {
2566 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2567 continue;
2568 spin_unlock_irqrestore(&h->lock, flags);
2569 return c;
2570 }
2571 spin_unlock_irqrestore(&h->lock, flags);
2572 return NULL;
2573}
2574
2575/* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2576 * tell which kind we're dealing with, so we send the abort both ways. There
2577 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2578 * way we construct our tags but we check anyway in case the assumptions which
2579 * make this true someday become false.
2580 */
2581static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2582 unsigned char *scsi3addr, struct CommandList *abort)
2583{
2584 u8 swizzled_tag[8];
2585 struct CommandList *c;
2586 int rc = 0, rc2 = 0;
2587
2588 /* we do not expect to find the swizzled tag in our queue, but
2589 * check anyway just to be sure the assumptions which make this
2590 * the case haven't become wrong.
2591 */
2592 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2593 swizzle_abort_tag(swizzled_tag);
2594 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2595 if (c != NULL) {
2596 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2597 return hpsa_send_abort(h, scsi3addr, abort, 0);
2598 }
2599 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2600
2601 /* if the command is still in our queue, we can't conclude that it was
2602 * aborted (it might have just completed normally) but in any case
2603 * we don't need to try to abort it another way.
2604 */
2605 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2606 if (c)
2607 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2608 return rc && rc2;
2609}
2610
75167d2c
SC		 2611/* Send an abort for the specified command.
2612 * If the device and controller support it,
2613 * send a task abort request.
2614 */
2615static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2616{
2617
2618 int i, rc;
2619 struct ctlr_info *h;
2620 struct hpsa_scsi_dev_t *dev;
2621 struct CommandList *abort; /* pointer to command to be aborted */
2622 struct CommandList *found;
2623 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2624 char msg[256]; /* For debug messaging. */
2625 int ml = 0;
2626
2627 /* Find the controller of the command to be aborted */
2628 h = sdev_to_hba(sc->device);
2629 if (WARN(h == NULL,
2630 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2631 return FAILED;
2632
2633 /* Check that controller supports some kind of task abort */
2634 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2635 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2636 return FAILED;
2637
2638 memset(msg, 0, sizeof(msg));
2639 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2640 h->scsi_host->host_no, sc->device->channel,
2641 sc->device->id, sc->device->lun);
2642
2643 /* Find the device of the command to be aborted */
2644 dev = sc->device->hostdata;
2645 if (!dev) {
2646 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2647 msg);
2648 return FAILED;
2649 }
2650
2651 /* Get SCSI command to be aborted */
2652 abort = (struct CommandList *) sc->host_scribble;
2653 if (abort == NULL) {
2654 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2655 msg);
2656 return FAILED;
2657 }
2658
2659 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2660 abort->Header.Tag.upper, abort->Header.Tag.lower);
2661 as = (struct scsi_cmnd *) abort->scsi_cmd;
2662 if (as != NULL)
2663 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2664 as->cmnd[0], as->serial_number);
2665 dev_dbg(&h->pdev->dev, "%s\n", msg);
2666 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2667 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2668
2669 /* Search reqQ to See if command is queued but not submitted,
2670 * if so, complete the command with aborted status and remove
2671 * it from the reqQ.
2672 */
2673 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2674 if (found) {
2675 found->err_info->CommandStatus = CMD_ABORTED;
2676 finish_cmd(found);
2677 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2678 msg);
2679 return SUCCESS;
2680 }
2681
2682 /* not in reqQ, if also not in cmpQ, must have already completed */
2683 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2684 if (!found) {
d6ebd0f7 2685 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
75167d2c
SC		 2686 msg);
2687 return SUCCESS;
2688 }
2689
2690 /*
2691 * Command is in flight, or possibly already completed
2692 * by the firmware (but not to the scsi mid layer) but we can't
2693 * distinguish which. Send the abort down.
2694 */
6cba3f19 2695 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
75167d2c
SC		 2696 if (rc != 0) {
2697 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2698 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2699 h->scsi_host->host_no,
2700 dev->bus, dev->target, dev->lun);
2701 return FAILED;
2702 }
2703 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2704
2705 /* If the abort(s) above completed and actually aborted the
2706 * command, then the command to be aborted should already be
2707 * completed. If not, wait around a bit more to see if they
2708 * manage to complete normally.
2709 */
2710#define ABORT_COMPLETE_WAIT_SECS 30
2711 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2712 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2713 if (!found)
2714 return SUCCESS;
2715 msleep(100);
2716 }
2717 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2718 msg, ABORT_COMPLETE_WAIT_SECS);
2719 return FAILED;
2720}
2721
2722
edd16368
SC		 2723/*
2724 * For operations that cannot sleep, a command block is allocated at init,
2725 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2726 * which ones are free or in use. Lock must be held when calling this.
2727 * cmd_free() is the complement.
2728 */
2729static struct CommandList *cmd_alloc(struct ctlr_info *h)
2730{
2731 struct CommandList *c;
2732 int i;
2733 union u64bit temp64;
2734 dma_addr_t cmd_dma_handle, err_dma_handle;
e16a33ad 2735 unsigned long flags;
edd16368 2736
e16a33ad 2737 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2738 do {
2739 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
e16a33ad
MG		 2740 if (i == h->nr_cmds) {
2741 spin_unlock_irqrestore(&h->lock, flags);
edd16368 2742 return NULL;
e16a33ad 2743 }
edd16368
SC		 2744 } while (test_and_set_bit
2745 (i & (BITS_PER_LONG - 1),
2746 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
e16a33ad
MG		 2747 spin_unlock_irqrestore(&h->lock, flags);
2748
edd16368
SC		 2749 c = h->cmd_pool + i;
2750 memset(c, 0, sizeof(*c));
2751 cmd_dma_handle = h->cmd_pool_dhandle
2752 + i * sizeof(*c);
2753 c->err_info = h->errinfo_pool + i;
2754 memset(c->err_info, 0, sizeof(*c->err_info));
2755 err_dma_handle = h->errinfo_pool_dhandle
2756 + i * sizeof(*c->err_info);
edd16368
SC		 2757
2758 c->cmdindex = i;
2759
9e0fc764 2760 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2761 c->busaddr = (u32) cmd_dma_handle;
2762 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2763 c->ErrDesc.Addr.lower = temp64.val32.lower;
2764 c->ErrDesc.Addr.upper = temp64.val32.upper;
2765 c->ErrDesc.Len = sizeof(*c->err_info);
2766
2767 c->h = h;
2768 return c;
2769}
2770
2771/* For operations that can wait for kmalloc to possibly sleep,
2772 * this routine can be called. Lock need not be held to call
2773 * cmd_special_alloc. cmd_special_free() is the complement.
2774 */
2775static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2776{
2777 struct CommandList *c;
2778 union u64bit temp64;
2779 dma_addr_t cmd_dma_handle, err_dma_handle;
2780
2781 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2782 if (c == NULL)
2783 return NULL;
2784 memset(c, 0, sizeof(*c));
2785
2786 c->cmdindex = -1;
2787
2788 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2789 &err_dma_handle);
2790
2791 if (c->err_info == NULL) {
2792 pci_free_consistent(h->pdev,
2793 sizeof(*c), c, cmd_dma_handle);
2794 return NULL;
2795 }
2796 memset(c->err_info, 0, sizeof(*c->err_info));
2797
9e0fc764 2798 INIT_LIST_HEAD(&c->list);
01a02ffc
SC		 2799 c->busaddr = (u32) cmd_dma_handle;
2800 temp64.val = (u64) err_dma_handle;
edd16368
SC		 2801 c->ErrDesc.Addr.lower = temp64.val32.lower;
2802 c->ErrDesc.Addr.upper = temp64.val32.upper;
2803 c->ErrDesc.Len = sizeof(*c->err_info);
2804
2805 c->h = h;
2806 return c;
2807}
2808
2809static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2810{
2811 int i;
e16a33ad 2812 unsigned long flags;
edd16368
SC		 2813
2814 i = c - h->cmd_pool;
e16a33ad 2815 spin_lock_irqsave(&h->lock, flags);
edd16368
SC		 2816 clear_bit(i & (BITS_PER_LONG - 1),
2817 h->cmd_pool_bits + (i / BITS_PER_LONG));
e16a33ad 2818 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 2819}
2820
2821static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2822{
2823 union u64bit temp64;
2824
2825 temp64.val32.lower = c->ErrDesc.Addr.lower;
2826 temp64.val32.upper = c->ErrDesc.Addr.upper;
2827 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2828 c->err_info, (dma_addr_t) temp64.val);
2829 pci_free_consistent(h->pdev, sizeof(*c),
d896f3f3 2830 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
edd16368
SC		 2831}
2832
2833#ifdef CONFIG_COMPAT
2834
edd16368
SC		 2835static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2836{
2837 IOCTL32_Command_struct __user *arg32 =
2838 (IOCTL32_Command_struct __user *) arg;
2839 IOCTL_Command_struct arg64;
2840 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2841 int err;
2842 u32 cp;
2843
938abd84 2844 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2845 err = 0;
2846 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2847 sizeof(arg64.LUN_info));
2848 err |= copy_from_user(&arg64.Request, &arg32->Request,
2849 sizeof(arg64.Request));
2850 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2851 sizeof(arg64.error_info));
2852 err |= get_user(arg64.buf_size, &arg32->buf_size);
2853 err |= get_user(cp, &arg32->buf);
2854 arg64.buf = compat_ptr(cp);
2855 err |= copy_to_user(p, &arg64, sizeof(arg64));
2856
2857 if (err)
2858 return -EFAULT;
2859
e39eeaed 2860 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
edd16368
SC		 2861 if (err)
2862 return err;
2863 err |= copy_in_user(&arg32->error_info, &p->error_info,
2864 sizeof(arg32->error_info));
2865 if (err)
2866 return -EFAULT;
2867 return err;
2868}
2869
2870static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2871 int cmd, void *arg)
2872{
2873 BIG_IOCTL32_Command_struct __user *arg32 =
2874 (BIG_IOCTL32_Command_struct __user *) arg;
2875 BIG_IOCTL_Command_struct arg64;
2876 BIG_IOCTL_Command_struct __user *p =
2877 compat_alloc_user_space(sizeof(arg64));
2878 int err;
2879 u32 cp;
2880
938abd84 2881 memset(&arg64, 0, sizeof(arg64));
edd16368
SC		 2882 err = 0;
2883 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2884 sizeof(arg64.LUN_info));
2885 err |= copy_from_user(&arg64.Request, &arg32->Request,
2886 sizeof(arg64.Request));
2887 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2888 sizeof(arg64.error_info));
2889 err |= get_user(arg64.buf_size, &arg32->buf_size);
2890 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2891 err |= get_user(cp, &arg32->buf);
2892 arg64.buf = compat_ptr(cp);
2893 err |= copy_to_user(p, &arg64, sizeof(arg64));
2894
2895 if (err)
2896 return -EFAULT;
2897
e39eeaed 2898 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
edd16368
SC		 2899 if (err)
2900 return err;
2901 err |= copy_in_user(&arg32->error_info, &p->error_info,
2902 sizeof(arg32->error_info));
2903 if (err)
2904 return -EFAULT;
2905 return err;
2906}
71fe75a7
SC		 2907
2908static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2909{
2910 switch (cmd) {
2911 case CCISS_GETPCIINFO:
2912 case CCISS_GETINTINFO:
2913 case CCISS_SETINTINFO:
2914 case CCISS_GETNODENAME:
2915 case CCISS_SETNODENAME:
2916 case CCISS_GETHEARTBEAT:
2917 case CCISS_GETBUSTYPES:
2918 case CCISS_GETFIRMVER:
2919 case CCISS_GETDRIVVER:
2920 case CCISS_REVALIDVOLS:
2921 case CCISS_DEREGDISK:
2922 case CCISS_REGNEWDISK:
2923 case CCISS_REGNEWD:
2924 case CCISS_RESCANDISK:
2925 case CCISS_GETLUNINFO:
2926 return hpsa_ioctl(dev, cmd, arg);
2927
2928 case CCISS_PASSTHRU32:
2929 return hpsa_ioctl32_passthru(dev, cmd, arg);
2930 case CCISS_BIG_PASSTHRU32:
2931 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2932
2933 default:
2934 return -ENOIOCTLCMD;
2935 }
2936}
edd16368
SC		 2937#endif
2938
2939static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2940{
2941 struct hpsa_pci_info pciinfo;
2942
2943 if (!argp)
2944 return -EINVAL;
2945 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2946 pciinfo.bus = h->pdev->bus->number;
2947 pciinfo.dev_fn = h->pdev->devfn;
2948 pciinfo.board_id = h->board_id;
2949 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2950 return -EFAULT;
2951 return 0;
2952}
2953
2954static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2955{
2956 DriverVer_type DriverVer;
2957 unsigned char vmaj, vmin, vsubmin;
2958 int rc;
2959
2960 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2961 &vmaj, &vmin, &vsubmin);
2962 if (rc != 3) {
2963 dev_info(&h->pdev->dev, "driver version string '%s' "
2964 "unrecognized.", HPSA_DRIVER_VERSION);
2965 vmaj = 0;
2966 vmin = 0;
2967 vsubmin = 0;
2968 }
2969 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2970 if (!argp)
2971 return -EINVAL;
2972 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2973 return -EFAULT;
2974 return 0;
2975}
2976
2977static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2978{
2979 IOCTL_Command_struct iocommand;
2980 struct CommandList *c;
2981 char *buff = NULL;
2982 union u64bit temp64;
c1f63c8f 2983 int rc = 0;
edd16368
SC		 2984
2985 if (!argp)
2986 return -EINVAL;
2987 if (!capable(CAP_SYS_RAWIO))
2988 return -EPERM;
2989 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2990 return -EFAULT;
2991 if ((iocommand.buf_size < 1) &&
2992 (iocommand.Request.Type.Direction != XFER_NONE)) {
2993 return -EINVAL;
2994 }
2995 if (iocommand.buf_size > 0) {
2996 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2997 if (buff == NULL)
2998 return -EFAULT;
b03a7771
SC		 2999 if (iocommand.Request.Type.Direction == XFER_WRITE) {
3000 /* Copy the data into the buffer we created */
3001 if (copy_from_user(buff, iocommand.buf,
3002 iocommand.buf_size)) {
c1f63c8f
SC		 3003 rc = -EFAULT;
3004 goto out_kfree;
b03a7771
SC		 3005 }
3006 } else {
3007 memset(buff, 0, iocommand.buf_size);
edd16368 3008 }
b03a7771 3009 }
edd16368
SC		 3010 c = cmd_special_alloc(h);
3011 if (c == NULL) {
c1f63c8f
SC		 3012 rc = -ENOMEM;
3013 goto out_kfree;
edd16368
SC		 3014 }
3015 /* Fill in the command type */
3016 c->cmd_type = CMD_IOCTL_PEND;
3017 /* Fill in Command Header */
3018 c->Header.ReplyQueue = 0; /* unused in simple mode */
3019 if (iocommand.buf_size > 0) { /* buffer to fill */
3020 c->Header.SGList = 1;
3021 c->Header.SGTotal = 1;
3022 } else { /* no buffers to fill */
3023 c->Header.SGList = 0;
3024 c->Header.SGTotal = 0;
3025 }
3026 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
3027 /* use the kernel address the cmd block for tag */
3028 c->Header.Tag.lower = c->busaddr;
3029
3030 /* Fill in Request block */
3031 memcpy(&c->Request, &iocommand.Request,
3032 sizeof(c->Request));
3033
3034 /* Fill in the scatter gather information */
3035 if (iocommand.buf_size > 0) {
3036 temp64.val = pci_map_single(h->pdev, buff,
3037 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3038 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3039 c->SG[0].Addr.lower = 0;
3040 c->SG[0].Addr.upper = 0;
3041 c->SG[0].Len = 0;
3042 rc = -ENOMEM;
3043 goto out;
3044 }
edd16368
SC		 3045 c->SG[0].Addr.lower = temp64.val32.lower;
3046 c->SG[0].Addr.upper = temp64.val32.upper;
3047 c->SG[0].Len = iocommand.buf_size;
3048 c->SG[0].Ext = 0; /* we are not chaining*/
3049 }
a0c12413 3050 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
c2dd32e0
SC		 3051 if (iocommand.buf_size > 0)
3052 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3053 check_ioctl_unit_attention(h, c);
3054
3055 /* Copy the error information out */
3056 memcpy(&iocommand.error_info, c->err_info,
3057 sizeof(iocommand.error_info));
3058 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
c1f63c8f
SC		 3059 rc = -EFAULT;
3060 goto out;
edd16368 3061 }
b03a7771
SC		 3062 if (iocommand.Request.Type.Direction == XFER_READ &&
3063 iocommand.buf_size > 0) {
edd16368
SC		 3064 /* Copy the data out of the buffer we created */
3065 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
c1f63c8f
SC		 3066 rc = -EFAULT;
3067 goto out;
edd16368
SC		 3068 }
3069 }
c1f63c8f 3070out:
edd16368 3071 cmd_special_free(h, c);
c1f63c8f
SC		 3072out_kfree:
3073 kfree(buff);
3074 return rc;
edd16368
SC		 3075}
3076
3077static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
3078{
3079 BIG_IOCTL_Command_struct *ioc;
3080 struct CommandList *c;
3081 unsigned char **buff = NULL;
3082 int *buff_size = NULL;
3083 union u64bit temp64;
3084 BYTE sg_used = 0;
3085 int status = 0;
3086 int i;
01a02ffc
SC		 3087 u32 left;
3088 u32 sz;
edd16368
SC		 3089 BYTE __user *data_ptr;
3090
3091 if (!argp)
3092 return -EINVAL;
3093 if (!capable(CAP_SYS_RAWIO))
3094 return -EPERM;
3095 ioc = (BIG_IOCTL_Command_struct *)
3096 kmalloc(sizeof(*ioc), GFP_KERNEL);
3097 if (!ioc) {
3098 status = -ENOMEM;
3099 goto cleanup1;
3100 }
3101 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
3102 status = -EFAULT;
3103 goto cleanup1;
3104 }
3105 if ((ioc->buf_size < 1) &&
3106 (ioc->Request.Type.Direction != XFER_NONE)) {
3107 status = -EINVAL;
3108 goto cleanup1;
3109 }
3110 /* Check kmalloc limits using all SGs */
3111 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3112 status = -EINVAL;
3113 goto cleanup1;
3114 }
d66ae08b 3115 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
edd16368
SC		 3116 status = -EINVAL;
3117 goto cleanup1;
3118 }
d66ae08b 3119 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
edd16368
SC		 3120 if (!buff) {
3121 status = -ENOMEM;
3122 goto cleanup1;
3123 }
d66ae08b 3124 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
edd16368
SC		 3125 if (!buff_size) {
3126 status = -ENOMEM;
3127 goto cleanup1;
3128 }
3129 left = ioc->buf_size;
3130 data_ptr = ioc->buf;
3131 while (left) {
3132 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3133 buff_size[sg_used] = sz;
3134 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3135 if (buff[sg_used] == NULL) {
3136 status = -ENOMEM;
3137 goto cleanup1;
3138 }
3139 if (ioc->Request.Type.Direction == XFER_WRITE) {
3140 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3141 status = -ENOMEM;
3142 goto cleanup1;
3143 }
3144 } else
3145 memset(buff[sg_used], 0, sz);
3146 left -= sz;
3147 data_ptr += sz;
3148 sg_used++;
3149 }
3150 c = cmd_special_alloc(h);
3151 if (c == NULL) {
3152 status = -ENOMEM;
3153 goto cleanup1;
3154 }
3155 c->cmd_type = CMD_IOCTL_PEND;
3156 c->Header.ReplyQueue = 0;
b03a7771 3157 c->Header.SGList = c->Header.SGTotal = sg_used;
edd16368
SC		 3158 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3159 c->Header.Tag.lower = c->busaddr;
3160 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3161 if (ioc->buf_size > 0) {
3162 int i;
3163 for (i = 0; i < sg_used; i++) {
3164 temp64.val = pci_map_single(h->pdev, buff[i],
3165 buff_size[i], PCI_DMA_BIDIRECTIONAL);
bcc48ffa
SC		 3166 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3167 c->SG[i].Addr.lower = 0;
3168 c->SG[i].Addr.upper = 0;
3169 c->SG[i].Len = 0;
3170 hpsa_pci_unmap(h->pdev, c, i,
3171 PCI_DMA_BIDIRECTIONAL);
3172 status = -ENOMEM;
3173 goto cleanup1;
3174 }
edd16368
SC		 3175 c->SG[i].Addr.lower = temp64.val32.lower;
3176 c->SG[i].Addr.upper = temp64.val32.upper;
3177 c->SG[i].Len = buff_size[i];
3178 /* we are not chaining */
3179 c->SG[i].Ext = 0;
3180 }
3181 }
a0c12413 3182 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
b03a7771
SC		 3183 if (sg_used)
3184 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
edd16368
SC		 3185 check_ioctl_unit_attention(h, c);
3186 /* Copy the error information out */
3187 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3188 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
3189 cmd_special_free(h, c);
3190 status = -EFAULT;
3191 goto cleanup1;
3192 }
b03a7771 3193 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
edd16368
SC		 3194 /* Copy the data out of the buffer we created */
3195 BYTE __user *ptr = ioc->buf;
3196 for (i = 0; i < sg_used; i++) {
3197 if (copy_to_user(ptr, buff[i], buff_size[i])) {
3198 cmd_special_free(h, c);
3199 status = -EFAULT;
3200 goto cleanup1;
3201 }
3202 ptr += buff_size[i];
3203 }
3204 }
3205 cmd_special_free(h, c);
3206 status = 0;
3207cleanup1:
3208 if (buff) {
3209 for (i = 0; i < sg_used; i++)
3210 kfree(buff[i]);
3211 kfree(buff);
3212 }
3213 kfree(buff_size);
3214 kfree(ioc);
3215 return status;
3216}
3217
3218static void check_ioctl_unit_attention(struct ctlr_info *h,
3219 struct CommandList *c)
3220{
3221 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3222 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3223 (void) check_for_unit_attention(h, c);
3224}
3225/*
3226 * ioctl
3227 */
3228static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3229{
3230 struct ctlr_info *h;
3231 void __user *argp = (void __user *)arg;
3232
3233 h = sdev_to_hba(dev);
3234
3235 switch (cmd) {
3236 case CCISS_DEREGDISK:
3237 case CCISS_REGNEWDISK:
3238 case CCISS_REGNEWD:
a08a8471 3239 hpsa_scan_start(h->scsi_host);
edd16368
SC		 3240 return 0;
3241 case CCISS_GETPCIINFO:
3242 return hpsa_getpciinfo_ioctl(h, argp);
3243 case CCISS_GETDRIVVER:
3244 return hpsa_getdrivver_ioctl(h, argp);
3245 case CCISS_PASSTHRU:
3246 return hpsa_passthru_ioctl(h, argp);
3247 case CCISS_BIG_PASSTHRU:
3248 return hpsa_big_passthru_ioctl(h, argp);
3249 default:
3250 return -ENOTTY;
3251 }
3252}
3253
6f039790
GKH		 3254static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3255 u8 reset_type)
64670ac8
SC		 3256{
3257 struct CommandList *c;
3258
3259 c = cmd_alloc(h);
3260 if (!c)
3261 return -ENOMEM;
a2dac136
SC		 3262 /* fill_cmd can't fail here, no data buffer to map */
3263 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
64670ac8
SC		 3264 RAID_CTLR_LUNID, TYPE_MSG);
3265 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3266 c->waiting = NULL;
3267 enqueue_cmd_and_start_io(h, c);
3268 /* Don't wait for completion, the reset won't complete. Don't free
3269 * the command either. This is the last command we will send before
3270 * re-initializing everything, so it doesn't matter and won't leak.
3271 */
3272 return 0;
3273}
3274
a2dac136 3275static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
01a02ffc 3276 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
edd16368
SC		 3277 int cmd_type)
3278{
3279 int pci_dir = XFER_NONE;
75167d2c 3280 struct CommandList *a; /* for commands to be aborted */
edd16368
SC		 3281
3282 c->cmd_type = CMD_IOCTL_PEND;
3283 c->Header.ReplyQueue = 0;
3284 if (buff != NULL && size > 0) {
3285 c->Header.SGList = 1;
3286 c->Header.SGTotal = 1;
3287 } else {
3288 c->Header.SGList = 0;
3289 c->Header.SGTotal = 0;
3290 }
3291 c->Header.Tag.lower = c->busaddr;
3292 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3293
3294 c->Request.Type.Type = cmd_type;
3295 if (cmd_type == TYPE_CMD) {
3296 switch (cmd) {
3297 case HPSA_INQUIRY:
3298 /* are we trying to read a vital product page */
3299 if (page_code != 0) {
3300 c->Request.CDB[1] = 0x01;
3301 c->Request.CDB[2] = page_code;
3302 }
3303 c->Request.CDBLen = 6;
3304 c->Request.Type.Attribute = ATTR_SIMPLE;
3305 c->Request.Type.Direction = XFER_READ;
3306 c->Request.Timeout = 0;
3307 c->Request.CDB[0] = HPSA_INQUIRY;
3308 c->Request.CDB[4] = size & 0xFF;
3309 break;
3310 case HPSA_REPORT_LOG:
3311 case HPSA_REPORT_PHYS:
3312 /* Talking to controller so It's a physical command
3313 mode = 00 target = 0. Nothing to write.
3314 */
3315 c->Request.CDBLen = 12;
3316 c->Request.Type.Attribute = ATTR_SIMPLE;
3317 c->Request.Type.Direction = XFER_READ;
3318 c->Request.Timeout = 0;
3319 c->Request.CDB[0] = cmd;
3320 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3321 c->Request.CDB[7] = (size >> 16) & 0xFF;
3322 c->Request.CDB[8] = (size >> 8) & 0xFF;
3323 c->Request.CDB[9] = size & 0xFF;
3324 break;
edd16368
SC		 3325 case HPSA_CACHE_FLUSH:
3326 c->Request.CDBLen = 12;
3327 c->Request.Type.Attribute = ATTR_SIMPLE;
3328 c->Request.Type.Direction = XFER_WRITE;
3329 c->Request.Timeout = 0;
3330 c->Request.CDB[0] = BMIC_WRITE;
3331 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
bb158eab
SC		 3332 c->Request.CDB[7] = (size >> 8) & 0xFF;
3333 c->Request.CDB[8] = size & 0xFF;
edd16368
SC		 3334 break;
3335 case TEST_UNIT_READY:
3336 c->Request.CDBLen = 6;
3337 c->Request.Type.Attribute = ATTR_SIMPLE;
3338 c->Request.Type.Direction = XFER_NONE;
3339 c->Request.Timeout = 0;
3340 break;
3341 default:
3342 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3343 BUG();
a2dac136 3344 return -1;
edd16368
SC		 3345 }
3346 } else if (cmd_type == TYPE_MSG) {
3347 switch (cmd) {
3348
3349 case HPSA_DEVICE_RESET_MSG:
3350 c->Request.CDBLen = 16;
3351 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3352 c->Request.Type.Attribute = ATTR_SIMPLE;
3353 c->Request.Type.Direction = XFER_NONE;
3354 c->Request.Timeout = 0; /* Don't time out */
64670ac8
SC		 3355 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3356 c->Request.CDB[0] = cmd;
21e89afd 3357 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
edd16368
SC		 3358 /* If bytes 4-7 are zero, it means reset the */
3359 /* LunID device */
3360 c->Request.CDB[4] = 0x00;
3361 c->Request.CDB[5] = 0x00;
3362 c->Request.CDB[6] = 0x00;
3363 c->Request.CDB[7] = 0x00;
75167d2c
SC		 3364 break;
3365 case HPSA_ABORT_MSG:
3366 a = buff; /* point to command to be aborted */
3367 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3368 a->Header.Tag.upper, a->Header.Tag.lower,
3369 c->Header.Tag.upper, c->Header.Tag.lower);
3370 c->Request.CDBLen = 16;
3371 c->Request.Type.Type = TYPE_MSG;
3372 c->Request.Type.Attribute = ATTR_SIMPLE;
3373 c->Request.Type.Direction = XFER_WRITE;
3374 c->Request.Timeout = 0; /* Don't time out */
3375 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3376 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3377 c->Request.CDB[2] = 0x00; /* reserved */
3378 c->Request.CDB[3] = 0x00; /* reserved */
3379 /* Tag to abort goes in CDB[4]-CDB[11] */
3380 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3381 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3382 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3383 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3384 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3385 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3386 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3387 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3388 c->Request.CDB[12] = 0x00; /* reserved */
3389 c->Request.CDB[13] = 0x00; /* reserved */
3390 c->Request.CDB[14] = 0x00; /* reserved */
3391 c->Request.CDB[15] = 0x00; /* reserved */
edd16368 3392 break;
edd16368
SC		 3393 default:
3394 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3395 cmd);
3396 BUG();
3397 }
3398 } else {
3399 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3400 BUG();
3401 }
3402
3403 switch (c->Request.Type.Direction) {
3404 case XFER_READ:
3405 pci_dir = PCI_DMA_FROMDEVICE;
3406 break;
3407 case XFER_WRITE:
3408 pci_dir = PCI_DMA_TODEVICE;
3409 break;
3410 case XFER_NONE:
3411 pci_dir = PCI_DMA_NONE;
3412 break;
3413 default:
3414 pci_dir = PCI_DMA_BIDIRECTIONAL;
3415 }
a2dac136
SC		 3416 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
3417 return -1;
3418 return 0;
edd16368
SC		 3419}
3420
3421/*
3422 * Map (physical) PCI mem into (virtual) kernel space
3423 */
3424static void __iomem *remap_pci_mem(ulong base, ulong size)
3425{
3426 ulong page_base = ((ulong) base) & PAGE_MASK;
3427 ulong page_offs = ((ulong) base) - page_base;
088ba34c
SC		 3428 void __iomem *page_remapped = ioremap_nocache(page_base,
3429 page_offs + size);
edd16368
SC		 3430
3431 return page_remapped ? (page_remapped + page_offs) : NULL;
3432}
3433
3434/* Takes cmds off the submission queue and sends them to the hardware,
3435 * then puts them on the queue of cmds waiting for completion.
3436 */
3437static void start_io(struct ctlr_info *h)
3438{
3439 struct CommandList *c;
e16a33ad 3440 unsigned long flags;
edd16368 3441
e16a33ad 3442 spin_lock_irqsave(&h->lock, flags);
9e0fc764
SC		 3443 while (!list_empty(&h->reqQ)) {
3444 c = list_entry(h->reqQ.next, struct CommandList, list);
edd16368
SC		 3445 /* can't do anything if fifo is full */
3446 if ((h->access.fifo_full(h))) {
3447 dev_warn(&h->pdev->dev, "fifo full\n");
3448 break;
3449 }
3450
3451 /* Get the first entry from the Request Q */
3452 removeQ(c);
3453 h->Qdepth--;
3454
edd16368
SC		 3455 /* Put job onto the completed Q */
3456 addQ(&h->cmpQ, c);
e16a33ad
MG		 3457
3458 /* Must increment commands_outstanding before unlocking
3459 * and submitting to avoid race checking for fifo full
3460 * condition.
3461 */
3462 h->commands_outstanding++;
3463 if (h->commands_outstanding > h->max_outstanding)
3464 h->max_outstanding = h->commands_outstanding;
3465
3466 /* Tell the controller execute command */
3467 spin_unlock_irqrestore(&h->lock, flags);
3468 h->access.submit_command(h, c);
3469 spin_lock_irqsave(&h->lock, flags);
edd16368 3470 }
e16a33ad 3471 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 3472}
3473
254f796b 3474static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
edd16368 3475{
254f796b 3476 return h->access.command_completed(h, q);
edd16368
SC		 3477}
3478
900c5440 3479static inline bool interrupt_pending(struct ctlr_info *h)
edd16368
SC		 3480{
3481 return h->access.intr_pending(h);
3482}
3483
3484static inline long interrupt_not_for_us(struct ctlr_info *h)
3485{
10f66018
SC		 3486 return (h->access.intr_pending(h) == 0) ||
3487 (h->interrupts_enabled == 0);
edd16368
SC		 3488}
3489
01a02ffc
SC		 3490static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3491 u32 raw_tag)
edd16368
SC		 3492{
3493 if (unlikely(tag_index >= h->nr_cmds)) {
3494 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3495 return 1;
3496 }
3497 return 0;
3498}
3499
5a3d16f5 3500static inline void finish_cmd(struct CommandList *c)
edd16368 3501{
e16a33ad
MG		 3502 unsigned long flags;
3503
3504 spin_lock_irqsave(&c->h->lock, flags);
edd16368 3505 removeQ(c);
e16a33ad 3506 spin_unlock_irqrestore(&c->h->lock, flags);
e85c5974 3507 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
edd16368 3508 if (likely(c->cmd_type == CMD_SCSI))
1fb011fb 3509 complete_scsi_command(c);
edd16368
SC		 3510 else if (c->cmd_type == CMD_IOCTL_PEND)
3511 complete(c->waiting);
3512}
3513
a104c99f
SC		 3514static inline u32 hpsa_tag_contains_index(u32 tag)
3515{
a104c99f
SC		 3516 return tag & DIRECT_LOOKUP_BIT;
3517}
3518
3519static inline u32 hpsa_tag_to_index(u32 tag)
3520{
a104c99f
SC		 3521 return tag >> DIRECT_LOOKUP_SHIFT;
3522}
3523
a9a3a273
SC		 3524
3525static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
a104c99f 3526{
a9a3a273
SC		 3527#define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3528#define HPSA_SIMPLE_ERROR_BITS 0x03
960a30e7 3529 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
a9a3a273
SC		 3530 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3531 return tag & ~HPSA_PERF_ERROR_BITS;
a104c99f
SC		 3532}
3533
303932fd 3534/* process completion of an indexed ("direct lookup") command */
1d94f94d 3535static inline void process_indexed_cmd(struct ctlr_info *h,
303932fd
DB		 3536 u32 raw_tag)
3537{
3538 u32 tag_index;
3539 struct CommandList *c;
3540
3541 tag_index = hpsa_tag_to_index(raw_tag);
1d94f94d
SC		 3542 if (!bad_tag(h, tag_index, raw_tag)) {
3543 c = h->cmd_pool + tag_index;
3544 finish_cmd(c);
3545 }
303932fd
DB		 3546}
3547
3548/* process completion of a non-indexed command */
1d94f94d 3549static inline void process_nonindexed_cmd(struct ctlr_info *h,
303932fd
DB		 3550 u32 raw_tag)
3551{
3552 u32 tag;
3553 struct CommandList *c = NULL;
e16a33ad 3554 unsigned long flags;
303932fd 3555
a9a3a273 3556 tag = hpsa_tag_discard_error_bits(h, raw_tag);
e16a33ad 3557 spin_lock_irqsave(&h->lock, flags);
9e0fc764 3558 list_for_each_entry(c, &h->cmpQ, list) {
303932fd 3559 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
e16a33ad 3560 spin_unlock_irqrestore(&h->lock, flags);
5a3d16f5 3561 finish_cmd(c);
1d94f94d 3562 return;
303932fd
DB		 3563 }
3564 }
e16a33ad 3565 spin_unlock_irqrestore(&h->lock, flags);
303932fd 3566 bad_tag(h, h->nr_cmds + 1, raw_tag);
303932fd
DB		 3567}
3568
64670ac8
SC		 3569/* Some controllers, like p400, will give us one interrupt
3570 * after a soft reset, even if we turned interrupts off.
3571 * Only need to check for this in the hpsa_xxx_discard_completions
3572 * functions.
3573 */
3574static int ignore_bogus_interrupt(struct ctlr_info *h)
3575{
3576 if (likely(!reset_devices))
3577 return 0;
3578
3579 if (likely(h->interrupts_enabled))
3580 return 0;
3581
3582 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3583 "(known firmware bug.) Ignoring.\n");
3584
3585 return 1;
3586}
3587
254f796b
MG		 3588/*
3589 * Convert &h->q[x] (passed to interrupt handlers) back to h.
3590 * Relies on (h-q[x] == x) being true for x such that
3591 * 0 <= x < MAX_REPLY_QUEUES.
3592 */
3593static struct ctlr_info *queue_to_hba(u8 *queue)
64670ac8 3594{
254f796b
MG		 3595 return container_of((queue - *queue), struct ctlr_info, q[0]);
3596}
3597
3598static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3599{
3600 struct ctlr_info *h = queue_to_hba(queue);
3601 u8 q = *(u8 *) queue;
64670ac8
SC		 3602 u32 raw_tag;
3603
3604 if (ignore_bogus_interrupt(h))
3605 return IRQ_NONE;
3606
3607 if (interrupt_not_for_us(h))
3608 return IRQ_NONE;
a0c12413 3609 h->last_intr_timestamp = get_jiffies_64();
64670ac8 3610 while (interrupt_pending(h)) {
254f796b 3611 raw_tag = get_next_completion(h, q);
64670ac8 3612 while (raw_tag != FIFO_EMPTY)
254f796b 3613 raw_tag = next_command(h, q);
64670ac8 3614 }
64670ac8
SC		 3615 return IRQ_HANDLED;
3616}
3617
254f796b 3618static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
64670ac8 3619{
254f796b 3620 struct ctlr_info *h = queue_to_hba(queue);
64670ac8 3621 u32 raw_tag;
254f796b 3622 u8 q = *(u8 *) queue;
64670ac8
SC		 3623
3624 if (ignore_bogus_interrupt(h))
3625 return IRQ_NONE;
3626
a0c12413 3627 h->last_intr_timestamp = get_jiffies_64();
254f796b 3628 raw_tag = get_next_completion(h, q);
64670ac8 3629 while (raw_tag != FIFO_EMPTY)
254f796b 3630 raw_tag = next_command(h, q);
64670ac8
SC		 3631 return IRQ_HANDLED;
3632}
3633
254f796b 3634static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
edd16368 3635{
254f796b 3636 struct ctlr_info *h = queue_to_hba((u8 *) queue);
303932fd 3637 u32 raw_tag;
254f796b 3638 u8 q = *(u8 *) queue;
edd16368
SC		 3639
3640 if (interrupt_not_for_us(h))
3641 return IRQ_NONE;
a0c12413 3642 h->last_intr_timestamp = get_jiffies_64();
10f66018 3643 while (interrupt_pending(h)) {
254f796b 3644 raw_tag = get_next_completion(h, q);
10f66018 3645 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3646 if (likely(hpsa_tag_contains_index(raw_tag)))
3647 process_indexed_cmd(h, raw_tag);
10f66018 3648 else
1d94f94d 3649 process_nonindexed_cmd(h, raw_tag);
254f796b 3650 raw_tag = next_command(h, q);
10f66018
SC		 3651 }
3652 }
10f66018
SC		 3653 return IRQ_HANDLED;
3654}
3655
254f796b 3656static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
10f66018 3657{
254f796b 3658 struct ctlr_info *h = queue_to_hba(queue);
10f66018 3659 u32 raw_tag;
254f796b 3660 u8 q = *(u8 *) queue;
10f66018 3661
a0c12413 3662 h->last_intr_timestamp = get_jiffies_64();
254f796b 3663 raw_tag = get_next_completion(h, q);
303932fd 3664 while (raw_tag != FIFO_EMPTY) {
1d94f94d
SC		 3665 if (likely(hpsa_tag_contains_index(raw_tag)))
3666 process_indexed_cmd(h, raw_tag);
303932fd 3667 else
1d94f94d 3668 process_nonindexed_cmd(h, raw_tag);
254f796b 3669 raw_tag = next_command(h, q);
edd16368 3670 }
edd16368
SC		 3671 return IRQ_HANDLED;
3672}
3673
a9a3a273
SC		 3674/* Send a message CDB to the firmware. Careful, this only works
3675 * in simple mode, not performant mode due to the tag lookup.
3676 * We only ever use this immediately after a controller reset.
3677 */
6f039790
GKH		 3678static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3679 unsigned char type)
edd16368
SC		 3680{
3681 struct Command {
3682 struct CommandListHeader CommandHeader;
3683 struct RequestBlock Request;
3684 struct ErrDescriptor ErrorDescriptor;
3685 };
3686 struct Command *cmd;
3687 static const size_t cmd_sz = sizeof(*cmd) +
3688 sizeof(cmd->ErrorDescriptor);
3689 dma_addr_t paddr64;
3690 uint32_t paddr32, tag;
3691 void __iomem *vaddr;
3692 int i, err;
3693
3694 vaddr = pci_ioremap_bar(pdev, 0);
3695 if (vaddr == NULL)
3696 return -ENOMEM;
3697
3698 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3699 * CCISS commands, so they must be allocated from the lower 4GiB of
3700 * memory.
3701 */
3702 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3703 if (err) {
3704 iounmap(vaddr);
3705 return -ENOMEM;
3706 }
3707
3708 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3709 if (cmd == NULL) {
3710 iounmap(vaddr);
3711 return -ENOMEM;
3712 }
3713
3714 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3715 * although there's no guarantee, we assume that the address is at
3716 * least 4-byte aligned (most likely, it's page-aligned).
3717 */
3718 paddr32 = paddr64;
3719
3720 cmd->CommandHeader.ReplyQueue = 0;
3721 cmd->CommandHeader.SGList = 0;
3722 cmd->CommandHeader.SGTotal = 0;
3723 cmd->CommandHeader.Tag.lower = paddr32;
3724 cmd->CommandHeader.Tag.upper = 0;
3725 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3726
3727 cmd->Request.CDBLen = 16;
3728 cmd->Request.Type.Type = TYPE_MSG;
3729 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3730 cmd->Request.Type.Direction = XFER_NONE;
3731 cmd->Request.Timeout = 0; /* Don't time out */
3732 cmd->Request.CDB[0] = opcode;
3733 cmd->Request.CDB[1] = type;
3734 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3735 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3736 cmd->ErrorDescriptor.Addr.upper = 0;
3737 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3738
3739 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3740
3741 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3742 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
a9a3a273 3743 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
edd16368
SC		 3744 break;
3745 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3746 }
3747
3748 iounmap(vaddr);
3749
3750 /* we leak the DMA buffer here ... no choice since the controller could
3751 * still complete the command.
3752 */
3753 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3754 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3755 opcode, type);
3756 return -ETIMEDOUT;
3757 }
3758
3759 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3760
3761 if (tag & HPSA_ERROR_BIT) {
3762 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3763 opcode, type);
3764 return -EIO;
3765 }
3766
3767 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3768 opcode, type);
3769 return 0;
3770}
3771
edd16368
SC		 3772#define hpsa_noop(p) hpsa_message(p, 3, 0)
3773
1df8552a 3774static int hpsa_controller_hard_reset(struct pci_dev *pdev,
cf0b08d0 3775 void * __iomem vaddr, u32 use_doorbell)
1df8552a
SC		 3776{
3777 u16 pmcsr;
3778 int pos;
3779
3780 if (use_doorbell) {
3781 /* For everything after the P600, the PCI power state method
3782 * of resetting the controller doesn't work, so we have this
3783 * other way using the doorbell register.
3784 */
3785 dev_info(&pdev->dev, "using doorbell to reset controller\n");
cf0b08d0 3786 writel(use_doorbell, vaddr + SA5_DOORBELL);
85009239
SC		 3787
3788 /* PMC hardware guys tell us we need a 5 second delay after
3789 * doorbell reset and before any attempt to talk to the board
3790 * at all to ensure that this actually works and doesn't fall
3791 * over in some weird corner cases.
3792 */
3793 msleep(5000);
1df8552a
SC		 3794 } else { /* Try to do it the PCI power state way */
3795
3796 /* Quoting from the Open CISS Specification: "The Power
3797 * Management Control/Status Register (CSR) controls the power
3798 * state of the device. The normal operating state is D0,
3799 * CSR=00h. The software off state is D3, CSR=03h. To reset
3800 * the controller, place the interface device in D3 then to D0,
3801 * this causes a secondary PCI reset which will reset the
3802 * controller." */
3803
3804 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3805 if (pos == 0) {
3806 dev_err(&pdev->dev,
3807 "hpsa_reset_controller: "
3808 "PCI PM not supported\n");
3809 return -ENODEV;
3810 }
3811 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3812 /* enter the D3hot power management state */
3813 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3814 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3815 pmcsr |= PCI_D3hot;
3816 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3817
3818 msleep(500);
3819
3820 /* enter the D0 power management state */
3821 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3822 pmcsr |= PCI_D0;
3823 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
c4853efe
MM		 3824
3825 /*
3826 * The P600 requires a small delay when changing states.
3827 * Otherwise we may think the board did not reset and we bail.
3828 * This for kdump only and is particular to the P600.
3829 */
3830 msleep(500);
1df8552a
SC		 3831 }
3832 return 0;
3833}
3834
6f039790 3835static void init_driver_version(char *driver_version, int len)
580ada3c
SC		 3836{
3837 memset(driver_version, 0, len);
f79cfec6 3838 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
580ada3c
SC		 3839}
3840
6f039790 3841static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3842{
3843 char *driver_version;
3844 int i, size = sizeof(cfgtable->driver_version);
3845
3846 driver_version = kmalloc(size, GFP_KERNEL);
3847 if (!driver_version)
3848 return -ENOMEM;
3849
3850 init_driver_version(driver_version, size);
3851 for (i = 0; i < size; i++)
3852 writeb(driver_version[i], &cfgtable->driver_version[i]);
3853 kfree(driver_version);
3854 return 0;
3855}
3856
6f039790
GKH		 3857static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
3858 unsigned char *driver_ver)
580ada3c
SC		 3859{
3860 int i;
3861
3862 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3863 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3864}
3865
6f039790 3866static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
580ada3c
SC		 3867{
3868
3869 char *driver_ver, *old_driver_ver;
3870 int rc, size = sizeof(cfgtable->driver_version);
3871
3872 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3873 if (!old_driver_ver)
3874 return -ENOMEM;
3875 driver_ver = old_driver_ver + size;
3876
3877 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3878 * should have been changed, otherwise we know the reset failed.
3879 */
3880 init_driver_version(old_driver_ver, size);
3881 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3882 rc = !memcmp(driver_ver, old_driver_ver, size);
3883 kfree(old_driver_ver);
3884 return rc;
3885}
edd16368 3886/* This does a hard reset of the controller using PCI power management
1df8552a 3887 * states or the using the doorbell register.
edd16368 3888 */
6f039790 3889static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
edd16368 3890{
1df8552a
SC		 3891 u64 cfg_offset;
3892 u32 cfg_base_addr;
3893 u64 cfg_base_addr_index;
3894 void __iomem *vaddr;
3895 unsigned long paddr;
580ada3c 3896 u32 misc_fw_support;
270d05de 3897 int rc;
1df8552a 3898 struct CfgTable __iomem *cfgtable;
cf0b08d0 3899 u32 use_doorbell;
18867659 3900 u32 board_id;
270d05de 3901 u16 command_register;
edd16368 3902
1df8552a
SC		 3903 /* For controllers as old as the P600, this is very nearly
3904 * the same thing as
edd16368
SC		 3905 *
3906 * pci_save_state(pci_dev);
3907 * pci_set_power_state(pci_dev, PCI_D3hot);
3908 * pci_set_power_state(pci_dev, PCI_D0);
3909 * pci_restore_state(pci_dev);
3910 *
1df8552a
SC		 3911 * For controllers newer than the P600, the pci power state
3912 * method of resetting doesn't work so we have another way
3913 * using the doorbell register.
edd16368 3914 */
18867659 3915
25c1e56a 3916 rc = hpsa_lookup_board_id(pdev, &board_id);
46380786 3917 if (rc < 0 || !ctlr_is_resettable(board_id)) {
25c1e56a
SC		 3918 dev_warn(&pdev->dev, "Not resetting device.\n");
3919 return -ENODEV;
3920 }
46380786
SC		 3921
3922 /* if controller is soft- but not hard resettable... */
3923 if (!ctlr_is_hard_resettable(board_id))
3924 return -ENOTSUPP; /* try soft reset later. */
18867659 3925
270d05de
SC		 3926 /* Save the PCI command register */
3927 pci_read_config_word(pdev, 4, &command_register);
3928 /* Turn the board off. This is so that later pci_restore_state()
3929 * won't turn the board on before the rest of config space is ready.
3930 */
3931 pci_disable_device(pdev);
3932 pci_save_state(pdev);
edd16368 3933
1df8552a
SC		 3934 /* find the first memory BAR, so we can find the cfg table */
3935 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3936 if (rc)
3937 return rc;
3938 vaddr = remap_pci_mem(paddr, 0x250);
3939 if (!vaddr)
3940 return -ENOMEM;
edd16368 3941
1df8552a
SC		 3942 /* find cfgtable in order to check if reset via doorbell is supported */
3943 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3944 &cfg_base_addr_index, &cfg_offset);
3945 if (rc)
3946 goto unmap_vaddr;
3947 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3948 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3949 if (!cfgtable) {
3950 rc = -ENOMEM;
3951 goto unmap_vaddr;
3952 }
580ada3c
SC		 3953 rc = write_driver_ver_to_cfgtable(cfgtable);
3954 if (rc)
3955 goto unmap_vaddr;
edd16368 3956
cf0b08d0
SC		 3957 /* If reset via doorbell register is supported, use that.
3958 * There are two such methods. Favor the newest method.
3959 */
1df8552a 3960 misc_fw_support = readl(&cfgtable->misc_fw_support);
cf0b08d0
SC		 3961 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3962 if (use_doorbell) {
3963 use_doorbell = DOORBELL_CTLR_RESET2;
3964 } else {
3965 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3966 if (use_doorbell) {
fba63097
MM		 3967 dev_warn(&pdev->dev, "Soft reset not supported. "
3968 "Firmware update is required.\n");
64670ac8 3969 rc = -ENOTSUPP; /* try soft reset */
cf0b08d0
SC		 3970 goto unmap_cfgtable;
3971 }
3972 }
edd16368 3973
1df8552a
SC		 3974 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3975 if (rc)
3976 goto unmap_cfgtable;
edd16368 3977
270d05de
SC		 3978 pci_restore_state(pdev);
3979 rc = pci_enable_device(pdev);
3980 if (rc) {
3981 dev_warn(&pdev->dev, "failed to enable device.\n");
3982 goto unmap_cfgtable;
edd16368 3983 }
270d05de 3984 pci_write_config_word(pdev, 4, command_register);
edd16368 3985
1df8552a
SC		 3986 /* Some devices (notably the HP Smart Array 5i Controller)
3987 need a little pause here */
3988 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3989
85009239
SC		 3990 if (!use_doorbell) {
3991 /* Wait for board to become not ready, then ready.
3992 * (if we used the doorbell, then we already waited 5 secs
3993 * so the "not ready" state is already gone by so we
3994 * won't catch it.)
3995 */
3996 dev_info(&pdev->dev, "Waiting for board to reset.\n");
3997 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3998 if (rc) {
3999 dev_warn(&pdev->dev,
4000 "failed waiting for board to reset."
4001 " Will try soft reset.\n");
4002 /* Not expected, but try soft reset later */
4003 rc = -ENOTSUPP;
4004 goto unmap_cfgtable;
4005 }
64670ac8 4006 }
fe5389c8
SC		 4007 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
4008 if (rc) {
4009 dev_warn(&pdev->dev,
64670ac8
SC		 4010 "failed waiting for board to become ready "
4011 "after hard reset\n");
fe5389c8
SC		 4012 goto unmap_cfgtable;
4013 }
fe5389c8 4014
580ada3c
SC		 4015 rc = controller_reset_failed(vaddr);
4016 if (rc < 0)
4017 goto unmap_cfgtable;
4018 if (rc) {
64670ac8
SC		 4019 dev_warn(&pdev->dev, "Unable to successfully reset "
4020 "controller. Will try soft reset.\n");
4021 rc = -ENOTSUPP;
580ada3c 4022 } else {
64670ac8 4023 dev_info(&pdev->dev, "board ready after hard reset.\n");
1df8552a
SC		 4024 }
4025
4026unmap_cfgtable:
4027 iounmap(cfgtable);
4028
4029unmap_vaddr:
4030 iounmap(vaddr);
4031 return rc;
edd16368
SC		 4032}
4033
4034/*
4035 * We cannot read the structure directly, for portability we must use
4036 * the io functions.
4037 * This is for debug only.
4038 */
edd16368
SC		 4039static void print_cfg_table(struct device *dev, struct CfgTable *tb)
4040{
58f8665c 4041#ifdef HPSA_DEBUG
edd16368
SC		 4042 int i;
4043 char temp_name[17];
4044
4045 dev_info(dev, "Controller Configuration information\n");
4046 dev_info(dev, "------------------------------------\n");
4047 for (i = 0; i < 4; i++)
4048 temp_name[i] = readb(&(tb->Signature[i]));
4049 temp_name[4] = '\0';
4050 dev_info(dev, " Signature = %s\n", temp_name);
4051 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
4052 dev_info(dev, " Transport methods supported = 0x%x\n",
4053 readl(&(tb->TransportSupport)));
4054 dev_info(dev, " Transport methods active = 0x%x\n",
4055 readl(&(tb->TransportActive)));
4056 dev_info(dev, " Requested transport Method = 0x%x\n",
4057 readl(&(tb->HostWrite.TransportRequest)));
4058 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
4059 readl(&(tb->HostWrite.CoalIntDelay)));
4060 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
4061 readl(&(tb->HostWrite.CoalIntCount)));
4062 dev_info(dev, " Max outstanding commands = 0x%d\n",
4063 readl(&(tb->CmdsOutMax)));
4064 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
4065 for (i = 0; i < 16; i++)
4066 temp_name[i] = readb(&(tb->ServerName[i]));
4067 temp_name[16] = '\0';
4068 dev_info(dev, " Server Name = %s\n", temp_name);
4069 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
4070 readl(&(tb->HeartBeat)));
edd16368 4071#endif /* HPSA_DEBUG */
58f8665c 4072}
edd16368
SC		 4073
4074static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
4075{
4076 int i, offset, mem_type, bar_type;
4077
4078 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
4079 return 0;
4080 offset = 0;
4081 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
4082 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
4083 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
4084 offset += 4;
4085 else {
4086 mem_type = pci_resource_flags(pdev, i) &
4087 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
4088 switch (mem_type) {
4089 case PCI_BASE_ADDRESS_MEM_TYPE_32:
4090 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
4091 offset += 4; /* 32 bit */
4092 break;
4093 case PCI_BASE_ADDRESS_MEM_TYPE_64:
4094 offset += 8;
4095 break;
4096 default: /* reserved in PCI 2.2 */
4097 dev_warn(&pdev->dev,
4098 "base address is invalid\n");
4099 return -1;
4100 break;
4101 }
4102 }
4103 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
4104 return i + 1;
4105 }
4106 return -1;
4107}
4108
4109/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4110 * controllers that are capable. If not, we use IO-APIC mode.
4111 */
4112
6f039790 4113static void hpsa_interrupt_mode(struct ctlr_info *h)
edd16368
SC		 4114{
4115#ifdef CONFIG_PCI_MSI
254f796b
MG		 4116 int err, i;
4117 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
4118
4119 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
4120 hpsa_msix_entries[i].vector = 0;
4121 hpsa_msix_entries[i].entry = i;
4122 }
edd16368
SC		 4123
4124 /* Some boards advertise MSI but don't really support it */
6b3f4c52
SC		 4125 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4126 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
edd16368 4127 goto default_int_mode;
55c06c71
SC		 4128 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4129 dev_info(&h->pdev->dev, "MSIX\n");
254f796b
MG		 4130 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
4131 MAX_REPLY_QUEUES);
edd16368 4132 if (!err) {
254f796b
MG		 4133 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4134 h->intr[i] = hpsa_msix_entries[i].vector;
edd16368
SC		 4135 h->msix_vector = 1;
4136 return;
4137 }
4138 if (err > 0) {
55c06c71 4139 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
edd16368
SC		 4140 "available\n", err);
4141 goto default_int_mode;
4142 } else {
55c06c71 4143 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
edd16368
SC		 4144 err);
4145 goto default_int_mode;
4146 }
4147 }
55c06c71
SC		 4148 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4149 dev_info(&h->pdev->dev, "MSI\n");
4150 if (!pci_enable_msi(h->pdev))
edd16368
SC		 4151 h->msi_vector = 1;
4152 else
55c06c71 4153 dev_warn(&h->pdev->dev, "MSI init failed\n");
edd16368
SC		 4154 }
4155default_int_mode:
4156#endif /* CONFIG_PCI_MSI */
4157 /* if we get here we're going to use the default interrupt mode */
a9a3a273 4158 h->intr[h->intr_mode] = h->pdev->irq;
edd16368
SC		 4159}
4160
6f039790 4161static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
e5c880d1
SC		 4162{
4163 int i;
4164 u32 subsystem_vendor_id, subsystem_device_id;
4165
4166 subsystem_vendor_id = pdev->subsystem_vendor;
4167 subsystem_device_id = pdev->subsystem_device;
4168 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4169 subsystem_vendor_id;
4170
4171 for (i = 0; i < ARRAY_SIZE(products); i++)
4172 if (*board_id == products[i].board_id)
4173 return i;
4174
6798cc0a
SC		 4175 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4176 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4177 !hpsa_allow_any) {
e5c880d1
SC		 4178 dev_warn(&pdev->dev, "unrecognized board ID: "
4179 "0x%08x, ignoring.\n", *board_id);
4180 return -ENODEV;
4181 }
4182 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4183}
4184
6f039790
GKH		 4185static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
4186 unsigned long *memory_bar)
3a7774ce
SC		 4187{
4188 int i;
4189
4190 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
12d2cd47 4191 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3a7774ce 4192 /* addressing mode bits already removed */
12d2cd47
SC		 4193 *memory_bar = pci_resource_start(pdev, i);
4194 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3a7774ce
SC		 4195 *memory_bar);
4196 return 0;
4197 }
12d2cd47 4198 dev_warn(&pdev->dev, "no memory BAR found\n");
3a7774ce
SC		 4199 return -ENODEV;
4200}
4201
6f039790
GKH		 4202static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
4203 int wait_for_ready)
2c4c8c8b 4204{
fe5389c8 4205 int i, iterations;
2c4c8c8b 4206 u32 scratchpad;
fe5389c8
SC		 4207 if (wait_for_ready)
4208 iterations = HPSA_BOARD_READY_ITERATIONS;
4209 else
4210 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
2c4c8c8b 4211
fe5389c8
SC		 4212 for (i = 0; i < iterations; i++) {
4213 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4214 if (wait_for_ready) {
4215 if (scratchpad == HPSA_FIRMWARE_READY)
4216 return 0;
4217 } else {
4218 if (scratchpad != HPSA_FIRMWARE_READY)
4219 return 0;
4220 }
2c4c8c8b
SC		 4221 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4222 }
fe5389c8 4223 dev_warn(&pdev->dev, "board not ready, timed out.\n");
2c4c8c8b
SC		 4224 return -ENODEV;
4225}
4226
6f039790
GKH		 4227static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4228 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4229 u64 *cfg_offset)
a51fd47f
SC		 4230{
4231 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4232 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4233 *cfg_base_addr &= (u32) 0x0000ffff;
4234 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4235 if (*cfg_base_addr_index == -1) {
4236 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4237 return -ENODEV;
4238 }
4239 return 0;
4240}
4241
6f039790 4242static int hpsa_find_cfgtables(struct ctlr_info *h)
edd16368 4243{
01a02ffc
SC		 4244 u64 cfg_offset;
4245 u32 cfg_base_addr;
4246 u64 cfg_base_addr_index;
303932fd 4247 u32 trans_offset;
a51fd47f 4248 int rc;
77c4495c 4249
a51fd47f
SC		 4250 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4251 &cfg_base_addr_index, &cfg_offset);
4252 if (rc)
4253 return rc;
77c4495c 4254 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
a51fd47f 4255 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
77c4495c
SC		 4256 if (!h->cfgtable)
4257 return -ENOMEM;
580ada3c
SC		 4258 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4259 if (rc)
4260 return rc;
77c4495c 4261 /* Find performant mode table. */
a51fd47f 4262 trans_offset = readl(&h->cfgtable->TransMethodOffset);
77c4495c
SC		 4263 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4264 cfg_base_addr_index)+cfg_offset+trans_offset,
4265 sizeof(*h->transtable));
4266 if (!h->transtable)
4267 return -ENOMEM;
4268 return 0;
4269}
4270
6f039790 4271static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
cba3d38b
SC		 4272{
4273 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
72ceeaec
SC		 4274
4275 /* Limit commands in memory limited kdump scenario. */
4276 if (reset_devices && h->max_commands > 32)
4277 h->max_commands = 32;
4278
cba3d38b
SC		 4279 if (h->max_commands < 16) {
4280 dev_warn(&h->pdev->dev, "Controller reports "
4281 "max supported commands of %d, an obvious lie. "
4282 "Using 16. Ensure that firmware is up to date.\n",
4283 h->max_commands);
4284 h->max_commands = 16;
4285 }
4286}
4287
b93d7536
SC		 4288/* Interrogate the hardware for some limits:
4289 * max commands, max SG elements without chaining, and with chaining,
4290 * SG chain block size, etc.
4291 */
6f039790 4292static void hpsa_find_board_params(struct ctlr_info *h)
b93d7536 4293{
cba3d38b 4294 hpsa_get_max_perf_mode_cmds(h);
b93d7536
SC		 4295 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4296 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4297 /*
4298 * Limit in-command s/g elements to 32 save dma'able memory.
4299 * Howvever spec says if 0, use 31
4300 */
4301 h->max_cmd_sg_entries = 31;
4302 if (h->maxsgentries > 512) {
4303 h->max_cmd_sg_entries = 32;
4304 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4305 h->maxsgentries--; /* save one for chain pointer */
4306 } else {
4307 h->maxsgentries = 31; /* default to traditional values */
4308 h->chainsize = 0;
4309 }
75167d2c
SC		 4310
4311 /* Find out what task management functions are supported and cache */
4312 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
b93d7536
SC		 4313}
4314
76c46e49
SC		 4315static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4316{
0fc9fd40 4317 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
76c46e49
SC		 4318 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4319 return false;
4320 }
4321 return true;
4322}
4323
f7c39101
SC		 4324/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4325static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
4326{
4327#ifdef CONFIG_X86
4328 u32 prefetch;
4329
4330 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4331 prefetch |= 0x100;
4332 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4333#endif
4334}
4335
3d0eab67
SC		 4336/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4337 * in a prefetch beyond physical memory.
4338 */
4339static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4340{
4341 u32 dma_prefetch;
4342
4343 if (h->board_id != 0x3225103C)
4344 return;
4345 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4346 dma_prefetch |= 0x8000;
4347 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4348}
4349
6f039790 4350static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
eb6b2ae9
SC		 4351{
4352 int i;
6eaf46fd
SC		 4353 u32 doorbell_value;
4354 unsigned long flags;
eb6b2ae9
SC		 4355
4356 /* under certain very rare conditions, this can take awhile.
4357 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4358 * as we enter this code.)
4359 */
4360 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6eaf46fd
SC		 4361 spin_lock_irqsave(&h->lock, flags);
4362 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4363 spin_unlock_irqrestore(&h->lock, flags);
382be668 4364 if (!(doorbell_value & CFGTBL_ChangeReq))
eb6b2ae9
SC		 4365 break;
4366 /* delay and try again */
60d3f5b0 4367 usleep_range(10000, 20000);
eb6b2ae9 4368 }
3f4336f3
SC		 4369}
4370
6f039790 4371static int hpsa_enter_simple_mode(struct ctlr_info *h)
3f4336f3
SC		 4372{
4373 u32 trans_support;
4374
4375 trans_support = readl(&(h->cfgtable->TransportSupport));
4376 if (!(trans_support & SIMPLE_MODE))
4377 return -ENOTSUPP;
4378
4379 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4380 /* Update the field, and then ring the doorbell */
4381 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4382 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4383 hpsa_wait_for_mode_change_ack(h);
eb6b2ae9 4384 print_cfg_table(&h->pdev->dev, h->cfgtable);
eb6b2ae9
SC		 4385 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4386 dev_warn(&h->pdev->dev,
4387 "unable to get board into simple mode\n");
4388 return -ENODEV;
4389 }
960a30e7 4390 h->transMethod = CFGTBL_Trans_Simple;
eb6b2ae9
SC		 4391 return 0;
4392}
4393
6f039790 4394static int hpsa_pci_init(struct ctlr_info *h)
77c4495c 4395{
eb6b2ae9 4396 int prod_index, err;
edd16368 4397
e5c880d1
SC		 4398 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4399 if (prod_index < 0)
4400 return -ENODEV;
4401 h->product_name = products[prod_index].product_name;
4402 h->access = *(products[prod_index].access);
edd16368 4403
e5a44df8
MG		 4404 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4405 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4406
55c06c71 4407 err = pci_enable_device(h->pdev);
edd16368 4408 if (err) {
55c06c71 4409 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
edd16368
SC		 4410 return err;
4411 }
4412
5cb460a6
SC		 4413 /* Enable bus mastering (pci_disable_device may disable this) */
4414 pci_set_master(h->pdev);
4415
f79cfec6 4416 err = pci_request_regions(h->pdev, HPSA);
edd16368 4417 if (err) {
55c06c71
SC		 4418 dev_err(&h->pdev->dev,
4419 "cannot obtain PCI resources, aborting\n");
edd16368
SC		 4420 return err;
4421 }
6b3f4c52 4422 hpsa_interrupt_mode(h);
12d2cd47 4423 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
3a7774ce 4424 if (err)
edd16368 4425 goto err_out_free_res;
edd16368 4426 h->vaddr = remap_pci_mem(h->paddr, 0x250);
204892e9
SC		 4427 if (!h->vaddr) {
4428 err = -ENOMEM;
4429 goto err_out_free_res;
4430 }
fe5389c8 4431 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
2c4c8c8b 4432 if (err)
edd16368 4433 goto err_out_free_res;
77c4495c
SC		 4434 err = hpsa_find_cfgtables(h);
4435 if (err)
edd16368 4436 goto err_out_free_res;
b93d7536 4437 hpsa_find_board_params(h);
edd16368 4438
76c46e49 4439 if (!hpsa_CISS_signature_present(h)) {
edd16368
SC		 4440 err = -ENODEV;
4441 goto err_out_free_res;
4442 }
f7c39101 4443 hpsa_enable_scsi_prefetch(h);
3d0eab67 4444 hpsa_p600_dma_prefetch_quirk(h);
eb6b2ae9
SC		 4445 err = hpsa_enter_simple_mode(h);
4446 if (err)
edd16368 4447 goto err_out_free_res;
edd16368
SC		 4448 return 0;
4449
4450err_out_free_res:
204892e9
SC		 4451 if (h->transtable)
4452 iounmap(h->transtable);
4453 if (h->cfgtable)
4454 iounmap(h->cfgtable);
4455 if (h->vaddr)
4456 iounmap(h->vaddr);
f0bd0b68 4457 pci_disable_device(h->pdev);
55c06c71 4458 pci_release_regions(h->pdev);
edd16368
SC		 4459 return err;
4460}
4461
6f039790 4462static void hpsa_hba_inquiry(struct ctlr_info *h)
339b2b14
SC		 4463{
4464 int rc;
4465
4466#define HBA_INQUIRY_BYTE_COUNT 64
4467 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4468 if (!h->hba_inquiry_data)
4469 return;
4470 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4471 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4472 if (rc != 0) {
4473 kfree(h->hba_inquiry_data);
4474 h->hba_inquiry_data = NULL;
4475 }
4476}
4477
6f039790 4478static int hpsa_init_reset_devices(struct pci_dev *pdev)
4c2a8c40 4479{
1df8552a 4480 int rc, i;
4c2a8c40
SC		 4481
4482 if (!reset_devices)
4483 return 0;
4484
1df8552a
SC		 4485 /* Reset the controller with a PCI power-cycle or via doorbell */
4486 rc = hpsa_kdump_hard_reset_controller(pdev);
4c2a8c40 4487
1df8552a
SC		 4488 /* -ENOTSUPP here means we cannot reset the controller
4489 * but it's already (and still) up and running in
18867659
SC		 4490 * "performant mode". Or, it might be 640x, which can't reset
4491 * due to concerns about shared bbwc between 6402/6404 pair.
1df8552a
SC		 4492 */
4493 if (rc == -ENOTSUPP)
64670ac8 4494 return rc; /* just try to do the kdump anyhow. */
1df8552a
SC		 4495 if (rc)
4496 return -ENODEV;
4c2a8c40
SC		 4497
4498 /* Now try to get the controller to respond to a no-op */
2b870cb3 4499 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4c2a8c40
SC		 4500 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4501 if (hpsa_noop(pdev) == 0)
4502 break;
4503 else
4504 dev_warn(&pdev->dev, "no-op failed%s\n",
4505 (i < 11 ? "; re-trying" : ""));
4506 }
4507 return 0;
4508}
4509
6f039790 4510static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
2e9d1b36
SC		 4511{
4512 h->cmd_pool_bits = kzalloc(
4513 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4514 sizeof(unsigned long), GFP_KERNEL);
4515 h->cmd_pool = pci_alloc_consistent(h->pdev,
4516 h->nr_cmds * sizeof(*h->cmd_pool),
4517 &(h->cmd_pool_dhandle));
4518 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4519 h->nr_cmds * sizeof(*h->errinfo_pool),
4520 &(h->errinfo_pool_dhandle));
4521 if ((h->cmd_pool_bits == NULL)
4522 || (h->cmd_pool == NULL)
4523 || (h->errinfo_pool == NULL)) {
4524 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4525 return -ENOMEM;
4526 }
4527 return 0;
4528}
4529
4530static void hpsa_free_cmd_pool(struct ctlr_info *h)
4531{
4532 kfree(h->cmd_pool_bits);
4533 if (h->cmd_pool)
4534 pci_free_consistent(h->pdev,
4535 h->nr_cmds * sizeof(struct CommandList),
4536 h->cmd_pool, h->cmd_pool_dhandle);
4537 if (h->errinfo_pool)
4538 pci_free_consistent(h->pdev,
4539 h->nr_cmds * sizeof(struct ErrorInfo),
4540 h->errinfo_pool,
4541 h->errinfo_pool_dhandle);
4542}
4543
0ae01a32
SC		 4544static int hpsa_request_irq(struct ctlr_info *h,
4545 irqreturn_t (*msixhandler)(int, void *),
4546 irqreturn_t (*intxhandler)(int, void *))
4547{
254f796b 4548 int rc, i;
0ae01a32 4549
254f796b
MG		 4550 /*
4551 * initialize h->q[x] = x so that interrupt handlers know which
4552 * queue to process.
4553 */
4554 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4555 h->q[i] = (u8) i;
4556
4557 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
4558 /* If performant mode and MSI-X, use multiple reply queues */
4559 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4560 rc = request_irq(h->intr[i], msixhandler,
4561 0, h->devname,
4562 &h->q[i]);
4563 } else {
4564 /* Use single reply pool */
4565 if (h->msix_vector || h->msi_vector) {
4566 rc = request_irq(h->intr[h->intr_mode],
4567 msixhandler, 0, h->devname,
4568 &h->q[h->intr_mode]);
4569 } else {
4570 rc = request_irq(h->intr[h->intr_mode],
4571 intxhandler, IRQF_SHARED, h->devname,
4572 &h->q[h->intr_mode]);
4573 }
4574 }
0ae01a32
SC		 4575 if (rc) {
4576 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4577 h->intr[h->intr_mode], h->devname);
4578 return -ENODEV;
4579 }
4580 return 0;
4581}
4582
6f039790 4583static int hpsa_kdump_soft_reset(struct ctlr_info *h)
64670ac8
SC		 4584{
4585 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4586 HPSA_RESET_TYPE_CONTROLLER)) {
4587 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4588 return -EIO;
4589 }
4590
4591 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4592 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4593 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4594 return -1;
4595 }
4596
4597 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4598 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4599 dev_warn(&h->pdev->dev, "Board failed to become ready "
4600 "after soft reset.\n");
4601 return -1;
4602 }
4603
4604 return 0;
4605}
4606
254f796b
MG		 4607static void free_irqs(struct ctlr_info *h)
4608{
4609 int i;
4610
4611 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4612 /* Single reply queue, only one irq to free */
4613 i = h->intr_mode;
4614 free_irq(h->intr[i], &h->q[i]);
4615 return;
4616 }
4617
4618 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4619 free_irq(h->intr[i], &h->q[i]);
4620}
4621
0097f0f4 4622static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
64670ac8 4623{
254f796b 4624 free_irqs(h);
64670ac8 4625#ifdef CONFIG_PCI_MSI
0097f0f4
SC		 4626 if (h->msix_vector) {
4627 if (h->pdev->msix_enabled)
4628 pci_disable_msix(h->pdev);
4629 } else if (h->msi_vector) {
4630 if (h->pdev->msi_enabled)
4631 pci_disable_msi(h->pdev);
4632 }
64670ac8 4633#endif /* CONFIG_PCI_MSI */
0097f0f4
SC		 4634}
4635
4636static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4637{
4638 hpsa_free_irqs_and_disable_msix(h);
64670ac8
SC		 4639 hpsa_free_sg_chain_blocks(h);
4640 hpsa_free_cmd_pool(h);
4641 kfree(h->blockFetchTable);
4642 pci_free_consistent(h->pdev, h->reply_pool_size,
4643 h->reply_pool, h->reply_pool_dhandle);
4644 if (h->vaddr)
4645 iounmap(h->vaddr);
4646 if (h->transtable)
4647 iounmap(h->transtable);
4648 if (h->cfgtable)
4649 iounmap(h->cfgtable);
4650 pci_release_regions(h->pdev);
4651 kfree(h);
4652}
4653
a0c12413
SC		 4654static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4655{
4656 assert_spin_locked(&lockup_detector_lock);
4657 if (!hpsa_lockup_detector)
4658 return;
4659 if (h->lockup_detected)
4660 return; /* already stopped the lockup detector */
4661 list_del(&h->lockup_list);
4662}
4663
4664/* Called when controller lockup detected. */
4665static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4666{
4667 struct CommandList *c = NULL;
4668
4669 assert_spin_locked(&h->lock);
4670 /* Mark all outstanding commands as failed and complete them. */
4671 while (!list_empty(list)) {
4672 c = list_entry(list->next, struct CommandList, list);
4673 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
5a3d16f5 4674 finish_cmd(c);
a0c12413
SC		 4675 }
4676}
4677
4678static void controller_lockup_detected(struct ctlr_info *h)
4679{
4680 unsigned long flags;
4681
4682 assert_spin_locked(&lockup_detector_lock);
4683 remove_ctlr_from_lockup_detector_list(h);
4684 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4685 spin_lock_irqsave(&h->lock, flags);
4686 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4687 spin_unlock_irqrestore(&h->lock, flags);
4688 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4689 h->lockup_detected);
4690 pci_disable_device(h->pdev);
4691 spin_lock_irqsave(&h->lock, flags);
4692 fail_all_cmds_on_list(h, &h->cmpQ);
4693 fail_all_cmds_on_list(h, &h->reqQ);
4694 spin_unlock_irqrestore(&h->lock, flags);
4695}
4696
a0c12413
SC		 4697static void detect_controller_lockup(struct ctlr_info *h)
4698{
4699 u64 now;
4700 u32 heartbeat;
4701 unsigned long flags;
4702
4703 assert_spin_locked(&lockup_detector_lock);
4704 now = get_jiffies_64();
4705 /* If we've received an interrupt recently, we're ok. */
4706 if (time_after64(h->last_intr_timestamp +
e85c5974 4707 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4708 return;
4709
4710 /*
4711 * If we've already checked the heartbeat recently, we're ok.
4712 * This could happen if someone sends us a signal. We
4713 * otherwise don't care about signals in this thread.
4714 */
4715 if (time_after64(h->last_heartbeat_timestamp +
e85c5974 4716 (h->heartbeat_sample_interval), now))
a0c12413
SC		 4717 return;
4718
4719 /* If heartbeat has not changed since we last looked, we're not ok. */
4720 spin_lock_irqsave(&h->lock, flags);
4721 heartbeat = readl(&h->cfgtable->HeartBeat);
4722 spin_unlock_irqrestore(&h->lock, flags);
4723 if (h->last_heartbeat == heartbeat) {
4724 controller_lockup_detected(h);
4725 return;
4726 }
4727
4728 /* We're ok. */
4729 h->last_heartbeat = heartbeat;
4730 h->last_heartbeat_timestamp = now;
4731}
4732
4733static int detect_controller_lockup_thread(void *notused)
4734{
4735 struct ctlr_info *h;
4736 unsigned long flags;
4737
4738 while (1) {
4739 struct list_head *this, *tmp;
4740
4741 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4742 if (kthread_should_stop())
4743 break;
4744 spin_lock_irqsave(&lockup_detector_lock, flags);
4745 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4746 h = list_entry(this, struct ctlr_info, lockup_list);
4747 detect_controller_lockup(h);
4748 }
4749 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4750 }
4751 return 0;
4752}
4753
4754static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4755{
4756 unsigned long flags;
4757
e85c5974 4758 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
a0c12413
SC		 4759 spin_lock_irqsave(&lockup_detector_lock, flags);
4760 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4761 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4762}
4763
4764static void start_controller_lockup_detector(struct ctlr_info *h)
4765{
4766 /* Start the lockup detector thread if not already started */
4767 if (!hpsa_lockup_detector) {
4768 spin_lock_init(&lockup_detector_lock);
4769 hpsa_lockup_detector =
4770 kthread_run(detect_controller_lockup_thread,
f79cfec6 4771 NULL, HPSA);
a0c12413
SC		 4772 }
4773 if (!hpsa_lockup_detector) {
4774 dev_warn(&h->pdev->dev,
4775 "Could not start lockup detector thread\n");
4776 return;
4777 }
4778 add_ctlr_to_lockup_detector_list(h);
4779}
4780
4781static void stop_controller_lockup_detector(struct ctlr_info *h)
4782{
4783 unsigned long flags;
4784
4785 spin_lock_irqsave(&lockup_detector_lock, flags);
4786 remove_ctlr_from_lockup_detector_list(h);
4787 /* If the list of ctlr's to monitor is empty, stop the thread */
4788 if (list_empty(&hpsa_ctlr_list)) {
775bf277 4789 spin_unlock_irqrestore(&lockup_detector_lock, flags);
a0c12413 4790 kthread_stop(hpsa_lockup_detector);
775bf277 4791 spin_lock_irqsave(&lockup_detector_lock, flags);
a0c12413
SC		 4792 hpsa_lockup_detector = NULL;
4793 }
4794 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4795}
4796
6f039790 4797static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
edd16368 4798{
4c2a8c40 4799 int dac, rc;
edd16368 4800 struct ctlr_info *h;
64670ac8
SC		 4801 int try_soft_reset = 0;
4802 unsigned long flags;
edd16368
SC		 4803
4804 if (number_of_controllers == 0)
4805 printk(KERN_INFO DRIVER_NAME "\n");
edd16368 4806
4c2a8c40 4807 rc = hpsa_init_reset_devices(pdev);
64670ac8
SC		 4808 if (rc) {
4809 if (rc != -ENOTSUPP)
4810 return rc;
4811 /* If the reset fails in a particular way (it has no way to do
4812 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4813 * a soft reset once we get the controller configured up to the
4814 * point that it can accept a command.
4815 */
4816 try_soft_reset = 1;
4817 rc = 0;
4818 }
4819
4820reinit_after_soft_reset:
edd16368 4821
303932fd
DB		 4822 /* Command structures must be aligned on a 32-byte boundary because
4823 * the 5 lower bits of the address are used by the hardware. and by
4824 * the driver. See comments in hpsa.h for more info.
4825 */
4826#define COMMANDLIST_ALIGNMENT 32
4827 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
edd16368
SC		 4828 h = kzalloc(sizeof(*h), GFP_KERNEL);
4829 if (!h)
ecd9aad4 4830 return -ENOMEM;
edd16368 4831
55c06c71 4832 h->pdev = pdev;
a9a3a273 4833 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
9e0fc764
SC		 4834 INIT_LIST_HEAD(&h->cmpQ);
4835 INIT_LIST_HEAD(&h->reqQ);
6eaf46fd
SC		 4836 spin_lock_init(&h->lock);
4837 spin_lock_init(&h->scan_lock);
55c06c71 4838 rc = hpsa_pci_init(h);
ecd9aad4 4839 if (rc != 0)
edd16368
SC		 4840 goto clean1;
4841
f79cfec6 4842 sprintf(h->devname, HPSA "%d", number_of_controllers);
edd16368
SC		 4843 h->ctlr = number_of_controllers;
4844 number_of_controllers++;
edd16368
SC		 4845
4846 /* configure PCI DMA stuff */
ecd9aad4
SC		 4847 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4848 if (rc == 0) {
edd16368 4849 dac = 1;
ecd9aad4
SC		 4850 } else {
4851 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4852 if (rc == 0) {
4853 dac = 0;
4854 } else {
4855 dev_err(&pdev->dev, "no suitable DMA available\n");
4856 goto clean1;
4857 }
edd16368
SC		 4858 }
4859
4860 /* make sure the board interrupts are off */
4861 h->access.set_intr_mask(h, HPSA_INTR_OFF);
10f66018 4862
0ae01a32 4863 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
edd16368 4864 goto clean2;
303932fd
DB		 4865 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4866 h->devname, pdev->device,
a9a3a273 4867 h->intr[h->intr_mode], dac ? "" : " not");
2e9d1b36 4868 if (hpsa_allocate_cmd_pool(h))
edd16368 4869 goto clean4;
33a2ffce
SC		 4870 if (hpsa_allocate_sg_chain_blocks(h))
4871 goto clean4;
a08a8471
SC		 4872 init_waitqueue_head(&h->scan_wait_queue);
4873 h->scan_finished = 1; /* no scan currently in progress */
edd16368
SC		 4874
4875 pci_set_drvdata(pdev, h);
9a41338e
SC		 4876 h->ndevices = 0;
4877 h->scsi_host = NULL;
4878 spin_lock_init(&h->devlock);
64670ac8
SC		 4879 hpsa_put_ctlr_into_performant_mode(h);
4880
4881 /* At this point, the controller is ready to take commands.
4882 * Now, if reset_devices and the hard reset didn't work, try
4883 * the soft reset and see if that works.
4884 */
4885 if (try_soft_reset) {
4886
4887 /* This is kind of gross. We may or may not get a completion
4888 * from the soft reset command, and if we do, then the value
4889 * from the fifo may or may not be valid. So, we wait 10 secs
4890 * after the reset throwing away any completions we get during
4891 * that time. Unregister the interrupt handler and register
4892 * fake ones to scoop up any residual completions.
4893 */
4894 spin_lock_irqsave(&h->lock, flags);
4895 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4896 spin_unlock_irqrestore(&h->lock, flags);
254f796b 4897 free_irqs(h);
64670ac8
SC		 4898 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4899 hpsa_intx_discard_completions);
4900 if (rc) {
4901 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4902 "soft reset.\n");
4903 goto clean4;
4904 }
4905
4906 rc = hpsa_kdump_soft_reset(h);
4907 if (rc)
4908 /* Neither hard nor soft reset worked, we're hosed. */
4909 goto clean4;
4910
4911 dev_info(&h->pdev->dev, "Board READY.\n");
4912 dev_info(&h->pdev->dev,
4913 "Waiting for stale completions to drain.\n");
4914 h->access.set_intr_mask(h, HPSA_INTR_ON);
4915 msleep(10000);
4916 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4917
4918 rc = controller_reset_failed(h->cfgtable);
4919 if (rc)
4920 dev_info(&h->pdev->dev,
4921 "Soft reset appears to have failed.\n");
4922
4923 /* since the controller's reset, we have to go back and re-init
4924 * everything. Easiest to just forget what we've done and do it
4925 * all over again.
4926 */
4927 hpsa_undo_allocations_after_kdump_soft_reset(h);
4928 try_soft_reset = 0;
4929 if (rc)
4930 /* don't go to clean4, we already unallocated */
4931 return -ENODEV;
4932
4933 goto reinit_after_soft_reset;
4934 }
edd16368
SC		 4935
4936 /* Turn the interrupts on so we can service requests */
4937 h->access.set_intr_mask(h, HPSA_INTR_ON);
4938
339b2b14 4939 hpsa_hba_inquiry(h);
edd16368 4940 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
a0c12413 4941 start_controller_lockup_detector(h);
88bf6d62 4942 return 0;
edd16368
SC		 4943
4944clean4:
33a2ffce 4945 hpsa_free_sg_chain_blocks(h);
2e9d1b36 4946 hpsa_free_cmd_pool(h);
254f796b 4947 free_irqs(h);
edd16368
SC		 4948clean2:
4949clean1:
edd16368 4950 kfree(h);
ecd9aad4 4951 return rc;
edd16368
SC		 4952}
4953
4954static void hpsa_flush_cache(struct ctlr_info *h)
4955{
4956 char *flush_buf;
4957 struct CommandList *c;
702890e3
SC		 4958 unsigned long flags;
4959
4960 /* Don't bother trying to flush the cache if locked up */
4961 spin_lock_irqsave(&h->lock, flags);
4962 if (unlikely(h->lockup_detected)) {
4963 spin_unlock_irqrestore(&h->lock, flags);
4964 return;
4965 }
4966 spin_unlock_irqrestore(&h->lock, flags);
edd16368
SC		 4967
4968 flush_buf = kzalloc(4, GFP_KERNEL);
4969 if (!flush_buf)
4970 return;
4971
4972 c = cmd_special_alloc(h);
4973 if (!c) {
4974 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4975 goto out_of_memory;
4976 }
a2dac136
SC		 4977 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4978 RAID_CTLR_LUNID, TYPE_CMD)) {
4979 goto out;
4980 }
edd16368
SC		 4981 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4982 if (c->err_info->CommandStatus != 0)
a2dac136 4983out:
edd16368
SC		 4984 dev_warn(&h->pdev->dev,
4985 "error flushing cache on controller\n");
4986 cmd_special_free(h, c);
4987out_of_memory:
4988 kfree(flush_buf);
4989}
4990
4991static void hpsa_shutdown(struct pci_dev *pdev)
4992{
4993 struct ctlr_info *h;
4994
4995 h = pci_get_drvdata(pdev);
4996 /* Turn board interrupts off and send the flush cache command
4997 * sendcmd will turn off interrupt, and send the flush...
4998 * To write all data in the battery backed cache to disks
4999 */
5000 hpsa_flush_cache(h);
5001 h->access.set_intr_mask(h, HPSA_INTR_OFF);
0097f0f4 5002 hpsa_free_irqs_and_disable_msix(h);
edd16368
SC		 5003}
5004
6f039790 5005static void hpsa_free_device_info(struct ctlr_info *h)
55e14e76
SC		 5006{
5007 int i;
5008
5009 for (i = 0; i < h->ndevices; i++)
5010 kfree(h->dev[i]);
5011}
5012
6f039790 5013static void hpsa_remove_one(struct pci_dev *pdev)
edd16368
SC		 5014{
5015 struct ctlr_info *h;
5016
5017 if (pci_get_drvdata(pdev) == NULL) {
a0c12413 5018 dev_err(&pdev->dev, "unable to remove device\n");
edd16368
SC		 5019 return;
5020 }
5021 h = pci_get_drvdata(pdev);
a0c12413 5022 stop_controller_lockup_detector(h);
edd16368
SC		 5023 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
5024 hpsa_shutdown(pdev);
5025 iounmap(h->vaddr);
204892e9
SC		 5026 iounmap(h->transtable);
5027 iounmap(h->cfgtable);
55e14e76 5028 hpsa_free_device_info(h);
33a2ffce 5029 hpsa_free_sg_chain_blocks(h);
edd16368
SC		 5030 pci_free_consistent(h->pdev,
5031 h->nr_cmds * sizeof(struct CommandList),
5032 h->cmd_pool, h->cmd_pool_dhandle);
5033 pci_free_consistent(h->pdev,
5034 h->nr_cmds * sizeof(struct ErrorInfo),
5035 h->errinfo_pool, h->errinfo_pool_dhandle);
303932fd
DB		 5036 pci_free_consistent(h->pdev, h->reply_pool_size,
5037 h->reply_pool, h->reply_pool_dhandle);
edd16368 5038 kfree(h->cmd_pool_bits);
303932fd 5039 kfree(h->blockFetchTable);
339b2b14 5040 kfree(h->hba_inquiry_data);
f0bd0b68 5041 pci_disable_device(pdev);
edd16368 5042 pci_release_regions(pdev);
edd16368
SC		 5043 kfree(h);
5044}
5045
5046static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
5047 __attribute__((unused)) pm_message_t state)
5048{
5049 return -ENOSYS;
5050}
5051
5052static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
5053{
5054 return -ENOSYS;
5055}
5056
5057static struct pci_driver hpsa_pci_driver = {
f79cfec6 5058 .name = HPSA,
edd16368 5059 .probe = hpsa_init_one,
6f039790 5060 .remove = hpsa_remove_one,
edd16368
SC		 5061 .id_table = hpsa_pci_device_id, /* id_table */
5062 .shutdown = hpsa_shutdown,
5063 .suspend = hpsa_suspend,
5064 .resume = hpsa_resume,
5065};
5066
303932fd
DB		 5067/* Fill in bucket_map[], given nsgs (the max number of
5068 * scatter gather elements supported) and bucket[],
5069 * which is an array of 8 integers. The bucket[] array
5070 * contains 8 different DMA transfer sizes (in 16
5071 * byte increments) which the controller uses to fetch
5072 * commands. This function fills in bucket_map[], which
5073 * maps a given number of scatter gather elements to one of
5074 * the 8 DMA transfer sizes. The point of it is to allow the
5075 * controller to only do as much DMA as needed to fetch the
5076 * command, with the DMA transfer size encoded in the lower
5077 * bits of the command address.
5078 */
5079static void calc_bucket_map(int bucket[], int num_buckets,
5080 int nsgs, int *bucket_map)
5081{
5082 int i, j, b, size;
5083
5084 /* even a command with 0 SGs requires 4 blocks */
5085#define MINIMUM_TRANSFER_BLOCKS 4
5086#define NUM_BUCKETS 8
5087 /* Note, bucket_map must have nsgs+1 entries. */
5088 for (i = 0; i <= nsgs; i++) {
5089 /* Compute size of a command with i SG entries */
5090 size = i + MINIMUM_TRANSFER_BLOCKS;
5091 b = num_buckets; /* Assume the biggest bucket */
5092 /* Find the bucket that is just big enough */
5093 for (j = 0; j < 8; j++) {
5094 if (bucket[j] >= size) {
5095 b = j;
5096 break;
5097 }
5098 }
5099 /* for a command with i SG entries, use bucket b. */
5100 bucket_map[i] = b;
5101 }
5102}
5103
6f039790 5104static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
303932fd 5105{
6c311b57
SC		 5106 int i;
5107 unsigned long register_value;
def342bd
SC		 5108
5109 /* This is a bit complicated. There are 8 registers on
5110 * the controller which we write to to tell it 8 different
5111 * sizes of commands which there may be. It's a way of
5112 * reducing the DMA done to fetch each command. Encoded into
5113 * each command's tag are 3 bits which communicate to the controller
5114 * which of the eight sizes that command fits within. The size of
5115 * each command depends on how many scatter gather entries there are.
5116 * Each SG entry requires 16 bytes. The eight registers are programmed
5117 * with the number of 16-byte blocks a command of that size requires.
5118 * The smallest command possible requires 5 such 16 byte blocks.
d66ae08b 5119 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
def342bd
SC		 5120 * blocks. Note, this only extends to the SG entries contained
5121 * within the command block, and does not extend to chained blocks
5122 * of SG elements. bft[] contains the eight values we write to
5123 * the registers. They are not evenly distributed, but have more
5124 * sizes for small commands, and fewer sizes for larger commands.
5125 */
d66ae08b
SC		 5126 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
5127 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
303932fd
DB		 5128 /* 5 = 1 s/g entry or 4k
5129 * 6 = 2 s/g entry or 8k
5130 * 8 = 4 s/g entry or 16k
5131 * 10 = 6 s/g entry or 24k
5132 */
303932fd 5133
303932fd
DB		 5134 /* Controller spec: zero out this buffer. */
5135 memset(h->reply_pool, 0, h->reply_pool_size);
303932fd 5136
d66ae08b
SC		 5137 bft[7] = SG_ENTRIES_IN_CMD + 4;
5138 calc_bucket_map(bft, ARRAY_SIZE(bft),
5139 SG_ENTRIES_IN_CMD, h->blockFetchTable);
303932fd
DB		 5140 for (i = 0; i < 8; i++)
5141 writel(bft[i], &h->transtable->BlockFetch[i]);
5142
5143 /* size of controller ring buffer */
5144 writel(h->max_commands, &h->transtable->RepQSize);
254f796b 5145 writel(h->nreply_queues, &h->transtable->RepQCount);
303932fd
DB		 5146 writel(0, &h->transtable->RepQCtrAddrLow32);
5147 writel(0, &h->transtable->RepQCtrAddrHigh32);
254f796b
MG		 5148
5149 for (i = 0; i < h->nreply_queues; i++) {
5150 writel(0, &h->transtable->RepQAddr[i].upper);
5151 writel(h->reply_pool_dhandle +
5152 (h->max_commands * sizeof(u64) * i),
5153 &h->transtable->RepQAddr[i].lower);
5154 }
5155
5156 writel(CFGTBL_Trans_Performant | use_short_tags |
5157 CFGTBL_Trans_enable_directed_msix,
303932fd
DB		 5158 &(h->cfgtable->HostWrite.TransportRequest));
5159 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3f4336f3 5160 hpsa_wait_for_mode_change_ack(h);
303932fd
DB		 5161 register_value = readl(&(h->cfgtable->TransportActive));
5162 if (!(register_value & CFGTBL_Trans_Performant)) {
5163 dev_warn(&h->pdev->dev, "unable to get board into"
5164 " performant mode\n");
5165 return;
5166 }
960a30e7
SC		 5167 /* Change the access methods to the performant access methods */
5168 h->access = SA5_performant_access;
5169 h->transMethod = CFGTBL_Trans_Performant;
6c311b57
SC		 5170}
5171
6f039790 5172static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
6c311b57
SC		 5173{
5174 u32 trans_support;
254f796b 5175 int i;
6c311b57 5176
02ec19c8
SC		 5177 if (hpsa_simple_mode)
5178 return;
5179
6c311b57
SC		 5180 trans_support = readl(&(h->cfgtable->TransportSupport));
5181 if (!(trans_support & PERFORMANT_MODE))
5182 return;
5183
254f796b 5184 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
cba3d38b 5185 hpsa_get_max_perf_mode_cmds(h);
6c311b57 5186 /* Performant mode ring buffer and supporting data structures */
254f796b 5187 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
6c311b57
SC		 5188 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5189 &(h->reply_pool_dhandle));
5190
254f796b
MG		 5191 for (i = 0; i < h->nreply_queues; i++) {
5192 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5193 h->reply_queue[i].size = h->max_commands;
5194 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
5195 h->reply_queue[i].current_entry = 0;
5196 }
5197
6c311b57 5198 /* Need a block fetch table for performant mode */
d66ae08b 5199 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
6c311b57
SC		 5200 sizeof(u32)), GFP_KERNEL);
5201
5202 if ((h->reply_pool == NULL)
5203 || (h->blockFetchTable == NULL))
5204 goto clean_up;
5205
960a30e7
SC		 5206 hpsa_enter_performant_mode(h,
5207 trans_support & CFGTBL_Trans_use_short_tags);
303932fd
DB		 5208
5209 return;
5210
5211clean_up:
5212 if (h->reply_pool)
5213 pci_free_consistent(h->pdev, h->reply_pool_size,
5214 h->reply_pool, h->reply_pool_dhandle);
5215 kfree(h->blockFetchTable);
5216}
5217
edd16368
SC		 5218/*
5219 * This is it. Register the PCI driver information for the cards we control
5220 * the OS will call our registered routines when it finds one of our cards.
5221 */
5222static int __init hpsa_init(void)
5223{
31468401 5224 return pci_register_driver(&hpsa_pci_driver);
edd16368
SC		 5225}
5226
5227static void __exit hpsa_cleanup(void)
5228{
5229 pci_unregister_driver(&hpsa_pci_driver);
edd16368
SC		 5230}
5231
5232module_init(hpsa_init);
5233module_exit(hpsa_cleanup);
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