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scsi: hisi_sas: Introduce hisi_sas_phy_set_linkrate()
[linux-2.6-block.git] / drivers / scsi / hisi_sas / hisi_sas_main.c
CommitLineData
e8899fad
JG		 1/*
2 * Copyright (c) 2015 Linaro Ltd.
3 * Copyright (c) 2015 Hisilicon Limited.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 */
11
12#include "hisi_sas.h"
13#define DRV_NAME "hisi_sas"
14
42e7a693
JG		 15#define DEV_IS_GONE(dev) \
16 ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
17
cac9b2a2
JG		 18static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
19 u8 *lun, struct hisi_sas_tmf_task *tmf);
441c2740
JG		 20static int
21hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
22 struct domain_device *device,
23 int abort_flag, int tag);
7c594f04 24static int hisi_sas_softreset_ata_disk(struct domain_device *device);
057c3d1f
XT		 25static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
26 void *funcdata);
cac9b2a2 27
468f4b8d 28u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction)
6c7bb8a1 29{
468f4b8d 30 switch (fis->command) {
6c7bb8a1
XC		 31 case ATA_CMD_FPDMA_WRITE:
32 case ATA_CMD_FPDMA_READ:
33 case ATA_CMD_FPDMA_RECV:
34 case ATA_CMD_FPDMA_SEND:
35 case ATA_CMD_NCQ_NON_DATA:
edafeef4 36 return HISI_SAS_SATA_PROTOCOL_FPDMA;
6c7bb8a1
XC		 37
38 case ATA_CMD_DOWNLOAD_MICRO:
39 case ATA_CMD_ID_ATA:
40 case ATA_CMD_PMP_READ:
41 case ATA_CMD_READ_LOG_EXT:
42 case ATA_CMD_PIO_READ:
43 case ATA_CMD_PIO_READ_EXT:
44 case ATA_CMD_PMP_WRITE:
45 case ATA_CMD_WRITE_LOG_EXT:
46 case ATA_CMD_PIO_WRITE:
47 case ATA_CMD_PIO_WRITE_EXT:
edafeef4 48 return HISI_SAS_SATA_PROTOCOL_PIO;
6c7bb8a1
XC		 49
50 case ATA_CMD_DSM:
51 case ATA_CMD_DOWNLOAD_MICRO_DMA:
52 case ATA_CMD_PMP_READ_DMA:
53 case ATA_CMD_PMP_WRITE_DMA:
54 case ATA_CMD_READ:
55 case ATA_CMD_READ_EXT:
56 case ATA_CMD_READ_LOG_DMA_EXT:
57 case ATA_CMD_READ_STREAM_DMA_EXT:
58 case ATA_CMD_TRUSTED_RCV_DMA:
59 case ATA_CMD_TRUSTED_SND_DMA:
60 case ATA_CMD_WRITE:
61 case ATA_CMD_WRITE_EXT:
62 case ATA_CMD_WRITE_FUA_EXT:
63 case ATA_CMD_WRITE_QUEUED:
64 case ATA_CMD_WRITE_LOG_DMA_EXT:
65 case ATA_CMD_WRITE_STREAM_DMA_EXT:
c3fe8a2b 66 case ATA_CMD_ZAC_MGMT_IN:
edafeef4 67 return HISI_SAS_SATA_PROTOCOL_DMA;
6c7bb8a1
XC		 68
69 case ATA_CMD_CHK_POWER:
70 case ATA_CMD_DEV_RESET:
71 case ATA_CMD_EDD:
72 case ATA_CMD_FLUSH:
73 case ATA_CMD_FLUSH_EXT:
74 case ATA_CMD_VERIFY:
75 case ATA_CMD_VERIFY_EXT:
76 case ATA_CMD_SET_FEATURES:
77 case ATA_CMD_STANDBY:
78 case ATA_CMD_STANDBYNOW1:
c3fe8a2b 79 case ATA_CMD_ZAC_MGMT_OUT:
edafeef4 80 return HISI_SAS_SATA_PROTOCOL_NONDATA;
468f4b8d 81
3ff0f0b6
XT		 82 case ATA_CMD_SET_MAX:
83 switch (fis->features) {
84 case ATA_SET_MAX_PASSWD:
85 case ATA_SET_MAX_LOCK:
86 return HISI_SAS_SATA_PROTOCOL_PIO;
468f4b8d 87
3ff0f0b6
XT		 88 case ATA_SET_MAX_PASSWD_DMA:
89 case ATA_SET_MAX_UNLOCK_DMA:
90 return HISI_SAS_SATA_PROTOCOL_DMA;
91
92 default:
93 return HISI_SAS_SATA_PROTOCOL_NONDATA;
468f4b8d 94 }
3ff0f0b6
XT		 95
96 default:
97 {
6c7bb8a1
XC		 98 if (direction == DMA_NONE)
99 return HISI_SAS_SATA_PROTOCOL_NONDATA;
100 return HISI_SAS_SATA_PROTOCOL_PIO;
101 }
468f4b8d 102 }
6c7bb8a1
XC		 103}
104EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol);
105
75904077
XC		 106void hisi_sas_sata_done(struct sas_task *task,
107 struct hisi_sas_slot *slot)
108{
109 struct task_status_struct *ts = &task->task_status;
110 struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf;
f557e32c
XT		 111 struct hisi_sas_status_buffer *status_buf =
112 hisi_sas_status_buf_addr_mem(slot);
113 u8 *iu = &status_buf->iu[0];
114 struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu;
75904077
XC		 115
116 resp->frame_len = sizeof(struct dev_to_host_fis);
117 memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis));
118
119 ts->buf_valid_size = sizeof(*resp);
120}
121EXPORT_SYMBOL_GPL(hisi_sas_sata_done);
122
318913c6
XC		 123int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag)
124{
125 struct ata_queued_cmd *qc = task->uldd_task;
126
127 if (qc) {
128 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
129 qc->tf.command == ATA_CMD_FPDMA_READ) {
130 *tag = qc->tag;
131 return 1;
132 }
133 }
134 return 0;
135}
136EXPORT_SYMBOL_GPL(hisi_sas_get_ncq_tag);
137
c2c1d9de
XC		 138/*
139 * This function assumes linkrate mask fits in 8 bits, which it
140 * does for all HW versions supported.
141 */
142u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)
143{
144 u16 rate = 0;
145 int i;
146
147 max -= SAS_LINK_RATE_1_5_GBPS;
148 for (i = 0; i <= max; i++)
149 rate |= 1 << (i * 2);
150 return rate;
151}
152EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
153
42e7a693
JG		 154static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device)
155{
156 return device->port->ha->lldd_ha;
157}
158
2e244f0f
JG		 159struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port)
160{
161 return container_of(sas_port, struct hisi_sas_port, sas_port);
162}
163EXPORT_SYMBOL_GPL(to_hisi_sas_port);
164
a25d0d3d
XC		 165void hisi_sas_stop_phys(struct hisi_hba *hisi_hba)
166{
167 int phy_no;
168
169 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++)
170 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
171}
172EXPORT_SYMBOL_GPL(hisi_sas_stop_phys);
173
257efd1f
JG		 174static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx)
175{
176 void *bitmap = hisi_hba->slot_index_tags;
177
178 clear_bit(slot_idx, bitmap);
179}
180
42e7a693
JG		 181static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx)
182{
183 hisi_sas_slot_index_clear(hisi_hba, slot_idx);
184}
185
186static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx)
187{
188 void *bitmap = hisi_hba->slot_index_tags;
189
190 set_bit(slot_idx, bitmap);
191}
192
193static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba, int *slot_idx)
194{
195 unsigned int index;
196 void *bitmap = hisi_hba->slot_index_tags;
197
198 index = find_first_zero_bit(bitmap, hisi_hba->slot_index_count);
199 if (index >= hisi_hba->slot_index_count)
200 return -SAS_QUEUE_FULL;
201 hisi_sas_slot_index_set(hisi_hba, index);
202 *slot_idx = index;
203 return 0;
204}
205
257efd1f
JG		 206static void hisi_sas_slot_index_init(struct hisi_hba *hisi_hba)
207{
208 int i;
209
210 for (i = 0; i < hisi_hba->slot_index_count; ++i)
211 hisi_sas_slot_index_clear(hisi_hba, i);
212}
27a3f229
JG		 213
214void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task,
215 struct hisi_sas_slot *slot)
216{
e85d93b2
XC		 217 struct hisi_sas_dq *dq = &hisi_hba->dq[slot->dlvry_queue];
218 unsigned long flags;
27a3f229 219
d3c4dd4e 220 if (task) {
11b75249 221 struct device *dev = hisi_hba->dev;
27a3f229 222
6ba0fbc3
XT		 223 if (!task->lldd_task)
224 return;
225
226 task->lldd_task = NULL;
227
d3c4dd4e
JG		 228 if (!sas_protocol_ata(task->task_proto))
229 if (slot->n_elem)
dc1e4730
XC		 230 dma_unmap_sg(dev, task->scatter,
231 task->num_scatter,
d3c4dd4e 232 task->data_dir);
d3c4dd4e 233 }
27a3f229 234
f557e32c
XT		 235 if (slot->buf)
236 dma_pool_free(hisi_hba->buffer_pool, slot->buf, slot->buf_dma);
27a3f229 237
e85d93b2 238 spin_lock_irqsave(&dq->lock, flags);
27a3f229 239 list_del_init(&slot->entry);
e85d93b2 240 spin_unlock_irqrestore(&dq->lock, flags);
6ba0fbc3 241 slot->buf = NULL;
27a3f229
JG		 242 slot->task = NULL;
243 slot->port = NULL;
e85d93b2 244 spin_lock_irqsave(&hisi_hba->lock, flags);
27a3f229 245 hisi_sas_slot_index_free(hisi_hba, slot->idx);
e85d93b2 246 spin_unlock_irqrestore(&hisi_hba->lock, flags);
d3c4dd4e 247
59ba49f9 248 /* slot memory is fully zeroed when it is reused */
27a3f229
JG		 249}
250EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free);
251
a2b3820b 252static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba,
66ee999b
JG		 253 struct hisi_sas_slot *slot)
254{
a2b3820b 255 hisi_hba->hw->prep_smp(hisi_hba, slot);
66ee999b
JG		 256}
257
a2b3820b 258static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba,
42e7a693
JG		 259 struct hisi_sas_slot *slot, int is_tmf,
260 struct hisi_sas_tmf_task *tmf)
261{
a2b3820b 262 hisi_hba->hw->prep_ssp(hisi_hba, slot, is_tmf, tmf);
42e7a693
JG		 263}
264
a2b3820b 265static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba,
6f2ff1a1
JG		 266 struct hisi_sas_slot *slot)
267{
a2b3820b 268 hisi_hba->hw->prep_stp(hisi_hba, slot);
6f2ff1a1
JG		 269}
270
a2b3820b 271static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba,
441c2740
JG		 272 struct hisi_sas_slot *slot,
273 int device_id, int abort_flag, int tag_to_abort)
274{
a2b3820b 275 hisi_hba->hw->prep_abort(hisi_hba, slot,
441c2740
JG		 276 device_id, abort_flag, tag_to_abort);
277}
278
cac9b2a2
JG		 279/*
280 * This function will issue an abort TMF regardless of whether the
281 * task is in the sdev or not. Then it will do the task complete
282 * cleanup and callbacks.
283 */
284static void hisi_sas_slot_abort(struct work_struct *work)
285{
286 struct hisi_sas_slot *abort_slot =
287 container_of(work, struct hisi_sas_slot, abort_slot);
288 struct sas_task *task = abort_slot->task;
289 struct hisi_hba *hisi_hba = dev_to_hisi_hba(task->dev);
290 struct scsi_cmnd *cmnd = task->uldd_task;
291 struct hisi_sas_tmf_task tmf_task;
cac9b2a2 292 struct scsi_lun lun;
11b75249 293 struct device *dev = hisi_hba->dev;
cac9b2a2
JG		 294 int tag = abort_slot->idx;
295
296 if (!(task->task_proto & SAS_PROTOCOL_SSP)) {
297 dev_err(dev, "cannot abort slot for non-ssp task\n");
298 goto out;
299 }
300
301 int_to_scsilun(cmnd->device->lun, &lun);
302 tmf_task.tmf = TMF_ABORT_TASK;
303 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
304
305 hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun, &tmf_task);
306out:
307 /* Do cleanup for this task */
308 hisi_sas_slot_task_free(hisi_hba, task, abort_slot);
309 if (task->task_done)
310 task->task_done(task);
cac9b2a2
JG		 311}
312
2f6bca20
XT		 313static int hisi_sas_task_prep(struct sas_task *task,
314 struct hisi_sas_dq **dq_pointer,
fa222db0
XC		 315 int is_tmf, struct hisi_sas_tmf_task *tmf,
316 int *pass)
42e7a693
JG		 317{
318 struct domain_device *device = task->dev;
2f6bca20 319 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
42e7a693
JG		 320 struct hisi_sas_device *sas_dev = device->lldd_dev;
321 struct hisi_sas_port *port;
322 struct hisi_sas_slot *slot;
323 struct hisi_sas_cmd_hdr *cmd_hdr_base;
2e244f0f 324 struct asd_sas_port *sas_port = device->port;
11b75249 325 struct device *dev = hisi_hba->dev;
7eee4b92 326 int dlvry_queue_slot, dlvry_queue, rc, slot_idx;
2f6bca20 327 int n_elem = 0, n_elem_req = 0, n_elem_resp = 0;
fa222db0 328 unsigned long flags, flags_dq;
2f6bca20 329 struct hisi_sas_dq *dq;
fa222db0 330 int wr_q_index;
42e7a693 331
2e244f0f 332 if (!sas_port) {
42e7a693
JG		 333 struct task_status_struct *ts = &task->task_status;
334
335 ts->resp = SAS_TASK_UNDELIVERED;
336 ts->stat = SAS_PHY_DOWN;
337 /*
338 * libsas will use dev->port, should
339 * not call task_done for sata
340 */
341 if (device->dev_type != SAS_SATA_DEV)
342 task->task_done(task);
6bf6db51 343 return -ECOMM;
42e7a693
JG		 344 }
345
346 if (DEV_IS_GONE(sas_dev)) {
347 if (sas_dev)
ad604832 348 dev_info(dev, "task prep: device %d not ready\n",
42e7a693
JG		 349 sas_dev->device_id);
350 else
351 dev_info(dev, "task prep: device %016llx not ready\n",
352 SAS_ADDR(device->sas_addr));
353
6bf6db51 354 return -ECOMM;
42e7a693 355 }
2e244f0f 356
2f6bca20
XT		 357 *dq_pointer = dq = sas_dev->dq;
358
2e244f0f 359 port = to_hisi_sas_port(sas_port);
9859f24e 360 if (port && !port->port_attached) {
09fe9ecb 361 dev_info(dev, "task prep: %s port%d not attach device\n",
6073b771 362 (dev_is_sata(device)) ?
09fe9ecb
JG		 363 "SATA/STP" : "SAS",
364 device->port->id);
365
6bf6db51 366 return -ECOMM;
42e7a693
JG		 367 }
368
369 if (!sas_protocol_ata(task->task_proto)) {
7eee4b92
XC		 370 unsigned int req_len, resp_len;
371
42e7a693
JG		 372 if (task->num_scatter) {
373 n_elem = dma_map_sg(dev, task->scatter,
374 task->num_scatter, task->data_dir);
375 if (!n_elem) {
376 rc = -ENOMEM;
377 goto prep_out;
378 }
7eee4b92
XC		 379 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
380 n_elem_req = dma_map_sg(dev, &task->smp_task.smp_req,
381 1, DMA_TO_DEVICE);
382 if (!n_elem_req) {
383 rc = -ENOMEM;
384 goto prep_out;
385 }
386 req_len = sg_dma_len(&task->smp_task.smp_req);
387 if (req_len & 0x3) {
388 rc = -EINVAL;
389 goto err_out_dma_unmap;
390 }
391 n_elem_resp = dma_map_sg(dev, &task->smp_task.smp_resp,
392 1, DMA_FROM_DEVICE);
eb217359 393 if (!n_elem_resp) {
7eee4b92
XC		 394 rc = -ENOMEM;
395 goto err_out_dma_unmap;
396 }
397 resp_len = sg_dma_len(&task->smp_task.smp_resp);
398 if (resp_len & 0x3) {
399 rc = -EINVAL;
400 goto err_out_dma_unmap;
401 }
42e7a693
JG		 402 }
403 } else
404 n_elem = task->num_scatter;
405
a2b3820b
XC		 406 if (n_elem > HISI_SAS_SGE_PAGE_CNT) {
407 dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT",
408 n_elem);
409 rc = -EINVAL;
410 goto err_out_dma_unmap;
411 }
412
b1a49412 413 spin_lock_irqsave(&hisi_hba->lock, flags);
685b6d6e
JG		 414 if (hisi_hba->hw->slot_index_alloc)
415 rc = hisi_hba->hw->slot_index_alloc(hisi_hba, &slot_idx,
416 device);
417 else
418 rc = hisi_sas_slot_index_alloc(hisi_hba, &slot_idx);
b1a49412 419 spin_unlock_irqrestore(&hisi_hba->lock, flags);
7eee4b92
XC		 420 if (rc)
421 goto err_out_dma_unmap;
b1a49412 422
3de0026d
XC		 423 slot = &hisi_hba->slot_info[slot_idx];
424 memset(slot, 0, sizeof(struct hisi_sas_slot));
425
426 slot->buf = dma_pool_alloc(hisi_hba->buffer_pool,
427 GFP_ATOMIC, &slot->buf_dma);
428 if (!slot->buf) {
429 rc = -ENOMEM;
430 goto err_out_tag;
431 }
432
fa222db0
XC		 433 spin_lock_irqsave(&dq->lock, flags_dq);
434 wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
435 if (wr_q_index < 0) {
436 spin_unlock_irqrestore(&dq->lock, flags_dq);
3de0026d 437 goto err_out_buf;
fa222db0
XC		 438 }
439
440 list_add_tail(&slot->delivery, &dq->list);
441 spin_unlock_irqrestore(&dq->lock, flags_dq);
42e7a693 442
b1a49412 443 dlvry_queue = dq->id;
fa222db0 444 dlvry_queue_slot = wr_q_index;
42e7a693
JG		 445
446 slot->idx = slot_idx;
447 slot->n_elem = n_elem;
448 slot->dlvry_queue = dlvry_queue;
449 slot->dlvry_queue_slot = dlvry_queue_slot;
450 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
451 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
452 slot->task = task;
453 slot->port = port;
cd938e53
XC		 454 if (is_tmf)
455 slot->is_internal = true;
42e7a693 456 task->lldd_task = slot;
cac9b2a2 457 INIT_WORK(&slot->abort_slot, hisi_sas_slot_abort);
42e7a693 458
42e7a693 459 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
f557e32c
XT		 460 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
461 memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
42e7a693
JG		 462
463 switch (task->task_proto) {
66ee999b 464 case SAS_PROTOCOL_SMP:
a2b3820b 465 hisi_sas_task_prep_smp(hisi_hba, slot);
66ee999b 466 break;
42e7a693 467 case SAS_PROTOCOL_SSP:
a2b3820b 468 hisi_sas_task_prep_ssp(hisi_hba, slot, is_tmf, tmf);
42e7a693
JG		 469 break;
470 case SAS_PROTOCOL_SATA:
471 case SAS_PROTOCOL_STP:
472 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
a2b3820b 473 hisi_sas_task_prep_ata(hisi_hba, slot);
6f2ff1a1 474 break;
42e7a693
JG		 475 default:
476 dev_err(dev, "task prep: unknown/unsupported proto (0x%x)\n",
477 task->task_proto);
42e7a693
JG		 478 break;
479 }
480
e85d93b2 481 spin_lock_irqsave(&dq->lock, flags);
405314df 482 list_add_tail(&slot->entry, &sas_dev->list);
e85d93b2 483 spin_unlock_irqrestore(&dq->lock, flags);
54c9dd2d 484 spin_lock_irqsave(&task->task_state_lock, flags);
42e7a693 485 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
54c9dd2d 486 spin_unlock_irqrestore(&task->task_state_lock, flags);
42e7a693 487
42e7a693 488 ++(*pass);
fa222db0 489 slot->ready = 1;
42e7a693 490
9c9d18e7 491 return 0;
42e7a693 492
3de0026d
XC		 493err_out_buf:
494 dma_pool_free(hisi_hba->buffer_pool, slot->buf,
495 slot->buf_dma);
42e7a693 496err_out_tag:
b1a49412 497 spin_lock_irqsave(&hisi_hba->lock, flags);
42e7a693 498 hisi_sas_slot_index_free(hisi_hba, slot_idx);
b1a49412 499 spin_unlock_irqrestore(&hisi_hba->lock, flags);
7eee4b92
XC		 500err_out_dma_unmap:
501 if (!sas_protocol_ata(task->task_proto)) {
502 if (task->num_scatter) {
503 dma_unmap_sg(dev, task->scatter, task->num_scatter,
504 task->data_dir);
505 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
506 if (n_elem_req)
507 dma_unmap_sg(dev, &task->smp_task.smp_req,
508 1, DMA_TO_DEVICE);
509 if (n_elem_resp)
510 dma_unmap_sg(dev, &task->smp_task.smp_resp,
511 1, DMA_FROM_DEVICE);
512 }
513 }
42e7a693 514prep_out:
7eee4b92 515 dev_err(dev, "task prep: failed[%d]!\n", rc);
42e7a693
JG		 516 return rc;
517}
518
519static int hisi_sas_task_exec(struct sas_task *task, gfp_t gfp_flags,
520 int is_tmf, struct hisi_sas_tmf_task *tmf)
521{
522 u32 rc;
523 u32 pass = 0;
524 unsigned long flags;
525 struct hisi_hba *hisi_hba = dev_to_hisi_hba(task->dev);
11b75249 526 struct device *dev = hisi_hba->dev;
2f6bca20 527 struct hisi_sas_dq *dq = NULL;
42e7a693 528
917d3bda 529 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
06ec0fb9
XC		 530 return -EINVAL;
531
42e7a693 532 /* protect task_prep and start_delivery sequence */
2f6bca20 533 rc = hisi_sas_task_prep(task, &dq, is_tmf, tmf, &pass);
42e7a693
JG		 534 if (rc)
535 dev_err(dev, "task exec: failed[%d]!\n", rc);
536
2f6bca20
XT		 537 if (likely(pass)) {
538 spin_lock_irqsave(&dq->lock, flags);
b1a49412 539 hisi_hba->hw->start_delivery(dq);
2f6bca20
XT		 540 spin_unlock_irqrestore(&dq->lock, flags);
541 }
42e7a693
JG		 542
543 return rc;
544}
257efd1f 545
66139921
JG		 546static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no)
547{
548 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
549 struct asd_sas_phy *sas_phy = &phy->sas_phy;
550 struct sas_ha_struct *sas_ha;
551
552 if (!phy->phy_attached)
553 return;
554
555 sas_ha = &hisi_hba->sha;
556 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE);
557
558 if (sas_phy->phy) {
559 struct sas_phy *sphy = sas_phy->phy;
560
561 sphy->negotiated_linkrate = sas_phy->linkrate;
66139921 562 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
2ae75787
XC		 563 sphy->maximum_linkrate_hw =
564 hisi_hba->hw->phy_get_max_linkrate();
565 if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN)
566 sphy->minimum_linkrate = phy->minimum_linkrate;
567
568 if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN)
569 sphy->maximum_linkrate = phy->maximum_linkrate;
66139921
JG		 570 }
571
572 if (phy->phy_type & PORT_TYPE_SAS) {
573 struct sas_identify_frame *id;
574
575 id = (struct sas_identify_frame *)phy->frame_rcvd;
576 id->dev_type = phy->identify.device_type;
577 id->initiator_bits = SAS_PROTOCOL_ALL;
578 id->target_bits = phy->identify.target_port_protocols;
579 } else if (phy->phy_type & PORT_TYPE_SATA) {
580 /*Nothing*/
581 }
582
583 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
584 sas_ha->notify_port_event(sas_phy, PORTE_BYTES_DMAED);
585}
586
abda97c2
JG		 587static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device)
588{
589 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
590 struct hisi_sas_device *sas_dev = NULL;
302e0901 591 unsigned long flags;
abda97c2
JG		 592 int i;
593
302e0901 594 spin_lock_irqsave(&hisi_hba->lock, flags);
abda97c2
JG		 595 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
596 if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) {
b1a49412
XC		 597 int queue = i % hisi_hba->queue_count;
598 struct hisi_sas_dq *dq = &hisi_hba->dq[queue];
599
abda97c2
JG		 600 hisi_hba->devices[i].device_id = i;
601 sas_dev = &hisi_hba->devices[i];
602 sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
603 sas_dev->dev_type = device->dev_type;
604 sas_dev->hisi_hba = hisi_hba;
605 sas_dev->sas_device = device;
b1a49412 606 sas_dev->dq = dq;
405314df 607 INIT_LIST_HEAD(&hisi_hba->devices[i].list);
abda97c2
JG		 608 break;
609 }
610 }
302e0901 611 spin_unlock_irqrestore(&hisi_hba->lock, flags);
abda97c2
JG		 612
613 return sas_dev;
614}
615
616static int hisi_sas_dev_found(struct domain_device *device)
617{
618 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
619 struct domain_device *parent_dev = device->parent;
620 struct hisi_sas_device *sas_dev;
11b75249 621 struct device *dev = hisi_hba->dev;
abda97c2 622
685b6d6e
JG		 623 if (hisi_hba->hw->alloc_dev)
624 sas_dev = hisi_hba->hw->alloc_dev(device);
625 else
626 sas_dev = hisi_sas_alloc_dev(device);
abda97c2
JG		 627 if (!sas_dev) {
628 dev_err(dev, "fail alloc dev: max support %d devices\n",
629 HISI_SAS_MAX_DEVICES);
630 return -EINVAL;
631 }
632
633 device->lldd_dev = sas_dev;
634 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
635
636 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) {
637 int phy_no;
638 u8 phy_num = parent_dev->ex_dev.num_phys;
639 struct ex_phy *phy;
640
641 for (phy_no = 0; phy_no < phy_num; phy_no++) {
642 phy = &parent_dev->ex_dev.ex_phy[phy_no];
643 if (SAS_ADDR(phy->attached_sas_addr) ==
c90a0bea 644 SAS_ADDR(device->sas_addr))
abda97c2 645 break;
abda97c2
JG		 646 }
647
648 if (phy_no == phy_num) {
649 dev_info(dev, "dev found: no attached "
650 "dev:%016llx at ex:%016llx\n",
651 SAS_ADDR(device->sas_addr),
652 SAS_ADDR(parent_dev->sas_addr));
653 return -EINVAL;
654 }
655 }
656
f1c88211
XC		 657 dev_info(dev, "dev[%d:%x] found\n",
658 sas_dev->device_id, sas_dev->dev_type);
659
abda97c2
JG		 660 return 0;
661}
662
31eec8a6
JG		 663static int hisi_sas_slave_configure(struct scsi_device *sdev)
664{
665 struct domain_device *dev = sdev_to_domain_dev(sdev);
666 int ret = sas_slave_configure(sdev);
667
668 if (ret)
669 return ret;
670 if (!dev_is_sata(dev))
671 sas_change_queue_depth(sdev, 64);
672
673 return 0;
674}
675
701f75ec
JG		 676static void hisi_sas_scan_start(struct Scsi_Host *shost)
677{
678 struct hisi_hba *hisi_hba = shost_priv(shost);
701f75ec 679
396b8044 680 hisi_hba->hw->phys_init(hisi_hba);
701f75ec
JG		 681}
682
683static int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time)
684{
685 struct hisi_hba *hisi_hba = shost_priv(shost);
686 struct sas_ha_struct *sha = &hisi_hba->sha;
687
396b8044
JG		 688 /* Wait for PHY up interrupt to occur */
689 if (time < HZ)
701f75ec
JG		 690 return 0;
691
692 sas_drain_work(sha);
693 return 1;
694}
695
66139921
JG		 696static void hisi_sas_phyup_work(struct work_struct *work)
697{
698 struct hisi_sas_phy *phy =
e537b62b 699 container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP]);
66139921
JG		 700 struct hisi_hba *hisi_hba = phy->hisi_hba;
701 struct asd_sas_phy *sas_phy = &phy->sas_phy;
702 int phy_no = sas_phy->id;
703
704 hisi_hba->hw->sl_notify(hisi_hba, phy_no); /* This requires a sleep */
705 hisi_sas_bytes_dmaed(hisi_hba, phy_no);
706}
976867e6 707
057c3d1f
XT		 708static void hisi_sas_linkreset_work(struct work_struct *work)
709{
710 struct hisi_sas_phy *phy =
711 container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]);
712 struct asd_sas_phy *sas_phy = &phy->sas_phy;
713
714 hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL);
715}
716
e537b62b
XT		 717static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = {
718 [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work,
057c3d1f 719 [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work,
e537b62b
XT		 720};
721
722bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
723 enum hisi_sas_phy_event event)
724{
725 struct hisi_hba *hisi_hba = phy->hisi_hba;
726
727 if (WARN_ON(event >= HISI_PHYES_NUM))
728 return false;
729
730 return queue_work(hisi_hba->wq, &phy->works[event]);
731}
732EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event);
733
976867e6
JG		 734static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no)
735{
736 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
737 struct asd_sas_phy *sas_phy = &phy->sas_phy;
e537b62b 738 int i;
976867e6
JG		 739
740 phy->hisi_hba = hisi_hba;
741 phy->port = NULL;
eba8c20c
XT		 742 phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS;
743 phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate();
976867e6
JG		 744 sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0;
745 sas_phy->class = SAS;
746 sas_phy->iproto = SAS_PROTOCOL_ALL;
747 sas_phy->tproto = 0;
748 sas_phy->type = PHY_TYPE_PHYSICAL;
749 sas_phy->role = PHY_ROLE_INITIATOR;
750 sas_phy->oob_mode = OOB_NOT_CONNECTED;
751 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
752 sas_phy->id = phy_no;
753 sas_phy->sas_addr = &hisi_hba->sas_addr[0];
754 sas_phy->frame_rcvd = &phy->frame_rcvd[0];
755 sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata;
756 sas_phy->lldd_phy = phy;
66139921 757
e537b62b
XT		 758 for (i = 0; i < HISI_PHYES_NUM; i++)
759 INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]);
976867e6
JG		 760}
761
184a4635
JG		 762static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy)
763{
764 struct sas_ha_struct *sas_ha = sas_phy->ha;
765 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
766 struct hisi_sas_phy *phy = sas_phy->lldd_phy;
767 struct asd_sas_port *sas_port = sas_phy->port;
2e244f0f 768 struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
184a4635
JG		 769 unsigned long flags;
770
771 if (!sas_port)
772 return;
773
774 spin_lock_irqsave(&hisi_hba->lock, flags);
775 port->port_attached = 1;
776 port->id = phy->port_id;
777 phy->port = port;
778 sas_port->lldd_port = port;
779 spin_unlock_irqrestore(&hisi_hba->lock, flags);
780}
781
d3c4dd4e 782static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task,
405314df 783 struct hisi_sas_slot *slot)
184a4635 784{
d3c4dd4e
JG		 785 if (task) {
786 unsigned long flags;
787 struct task_status_struct *ts;
184a4635 788
d3c4dd4e 789 ts = &task->task_status;
184a4635 790
d3c4dd4e
JG		 791 ts->resp = SAS_TASK_COMPLETE;
792 ts->stat = SAS_ABORTED_TASK;
793 spin_lock_irqsave(&task->task_state_lock, flags);
794 task->task_state_flags &=
795 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
796 task->task_state_flags |= SAS_TASK_STATE_DONE;
797 spin_unlock_irqrestore(&task->task_state_lock, flags);
798 }
184a4635 799
405314df 800 hisi_sas_slot_task_free(hisi_hba, task, slot);
184a4635
JG		 801}
802
405314df 803/* hisi_hba.lock should be locked */
184a4635
JG		 804static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
805 struct domain_device *device)
806{
405314df
JG		 807 struct hisi_sas_slot *slot, *slot2;
808 struct hisi_sas_device *sas_dev = device->lldd_dev;
184a4635 809
405314df
JG		 810 list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry)
811 hisi_sas_do_release_task(hisi_hba, slot->task, slot);
184a4635
JG		 812}
813
4d0951ee 814void hisi_sas_release_tasks(struct hisi_hba *hisi_hba)
06ec0fb9 815{
405314df
JG		 816 struct hisi_sas_device *sas_dev;
817 struct domain_device *device;
06ec0fb9
XC		 818 int i;
819
405314df
JG		 820 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
821 sas_dev = &hisi_hba->devices[i];
822 device = sas_dev->sas_device;
06ec0fb9 823
405314df
JG		 824 if ((sas_dev->dev_type == SAS_PHY_UNUSED) ||
825 !device)
06ec0fb9 826 continue;
405314df
JG		 827
828 hisi_sas_release_task(hisi_hba, device);
06ec0fb9
XC		 829 }
830}
4d0951ee 831EXPORT_SYMBOL_GPL(hisi_sas_release_tasks);
06ec0fb9 832
d30ff263
XC		 833static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba,
834 struct domain_device *device)
835{
836 if (hisi_hba->hw->dereg_device)
837 hisi_hba->hw->dereg_device(hisi_hba, device);
838}
839
abda97c2
JG		 840static void hisi_sas_dev_gone(struct domain_device *device)
841{
842 struct hisi_sas_device *sas_dev = device->lldd_dev;
843 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 844 struct device *dev = hisi_hba->dev;
abda97c2 845
f1c88211 846 dev_info(dev, "dev[%d:%x] is gone\n",
abda97c2
JG		 847 sas_dev->device_id, sas_dev->dev_type);
848
f8e45ec2
XC		 849 if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) {
850 hisi_sas_internal_task_abort(hisi_hba, device,
40f2702b
JG		 851 HISI_SAS_INT_ABT_DEV, 0);
852
f8e45ec2
XC		 853 hisi_sas_dereg_device(hisi_hba, device);
854
855 hisi_hba->hw->clear_itct(hisi_hba, sas_dev);
856 device->lldd_dev = NULL;
f8e45ec2 857 }
d30ff263 858
0258141a
XT		 859 if (hisi_hba->hw->free_device)
860 hisi_hba->hw->free_device(sas_dev);
abda97c2 861 sas_dev->dev_type = SAS_PHY_UNUSED;
abda97c2 862}
42e7a693
JG		 863
864static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags)
865{
866 return hisi_sas_task_exec(task, gfp_flags, 0, NULL);
867}
868
757db2da
JG		 869static void hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no,
870 struct sas_phy_linkrates *r)
871{
872 struct sas_phy_linkrates _r;
873
874 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
875 struct asd_sas_phy *sas_phy = &phy->sas_phy;
876 enum sas_linkrate min, max;
877
878 if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) {
879 max = sas_phy->phy->maximum_linkrate;
880 min = r->minimum_linkrate;
881 } else if (r->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) {
882 max = r->maximum_linkrate;
883 min = sas_phy->phy->minimum_linkrate;
884 } else
885 return;
886
887 _r.maximum_linkrate = max;
888 _r.minimum_linkrate = min;
889
890 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
891 msleep(100);
892 hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r);
893 hisi_hba->hw->phy_start(hisi_hba, phy_no);
894}
895
e4189d53
JG		 896static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
897 void *funcdata)
898{
899 struct sas_ha_struct *sas_ha = sas_phy->ha;
900 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
901 int phy_no = sas_phy->id;
902
903 switch (func) {
904 case PHY_FUNC_HARD_RESET:
905 hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no);
906 break;
907
908 case PHY_FUNC_LINK_RESET:
b4c67a6c
JG		 909 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
910 msleep(100);
1eb8eeac 911 hisi_hba->hw->phy_start(hisi_hba, phy_no);
e4189d53
JG		 912 break;
913
914 case PHY_FUNC_DISABLE:
915 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
916 break;
917
918 case PHY_FUNC_SET_LINK_RATE:
757db2da 919 hisi_sas_phy_set_linkrate(hisi_hba, phy_no, funcdata);
2ae75787 920 break;
c52108c6
XT		 921 case PHY_FUNC_GET_EVENTS:
922 if (hisi_hba->hw->get_events) {
923 hisi_hba->hw->get_events(hisi_hba, phy_no);
924 break;
925 }
926 /* fallthru */
e4189d53
JG		 927 case PHY_FUNC_RELEASE_SPINUP_HOLD:
928 default:
929 return -EOPNOTSUPP;
930 }
931 return 0;
932}
184a4635 933
0efff300
JG		 934static void hisi_sas_task_done(struct sas_task *task)
935{
936 if (!del_timer(&task->slow_task->timer))
937 return;
938 complete(&task->slow_task->completion);
939}
940
77570eed 941static void hisi_sas_tmf_timedout(struct timer_list *t)
0efff300 942{
77570eed
KC		 943 struct sas_task_slow *slow = from_timer(slow, t, timer);
944 struct sas_task *task = slow->task;
f64a6988
XC		 945 unsigned long flags;
946
947 spin_lock_irqsave(&task->task_state_lock, flags);
948 if (!(task->task_state_flags & SAS_TASK_STATE_DONE))
949 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
950 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300 951
0efff300
JG		 952 complete(&task->slow_task->completion);
953}
954
955#define TASK_TIMEOUT 20
956#define TASK_RETRY 3
bb9abc4a 957#define INTERNAL_ABORT_TIMEOUT 6
0efff300
JG		 958static int hisi_sas_exec_internal_tmf_task(struct domain_device *device,
959 void *parameter, u32 para_len,
960 struct hisi_sas_tmf_task *tmf)
961{
962 struct hisi_sas_device *sas_dev = device->lldd_dev;
963 struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
11b75249 964 struct device *dev = hisi_hba->dev;
0efff300
JG		 965 struct sas_task *task;
966 int res, retry;
967
968 for (retry = 0; retry < TASK_RETRY; retry++) {
969 task = sas_alloc_slow_task(GFP_KERNEL);
970 if (!task)
971 return -ENOMEM;
972
973 task->dev = device;
974 task->task_proto = device->tproto;
975
7c594f04
XC		 976 if (dev_is_sata(device)) {
977 task->ata_task.device_control_reg_update = 1;
978 memcpy(&task->ata_task.fis, parameter, para_len);
979 } else {
980 memcpy(&task->ssp_task, parameter, para_len);
981 }
0efff300
JG		 982 task->task_done = hisi_sas_task_done;
983
841b86f3 984 task->slow_task->timer.function = hisi_sas_tmf_timedout;
0efff300
JG		 985 task->slow_task->timer.expires = jiffies + TASK_TIMEOUT*HZ;
986 add_timer(&task->slow_task->timer);
987
988 res = hisi_sas_task_exec(task, GFP_KERNEL, 1, tmf);
989
990 if (res) {
991 del_timer(&task->slow_task->timer);
992 dev_err(dev, "abort tmf: executing internal task failed: %d\n",
993 res);
994 goto ex_err;
995 }
996
997 wait_for_completion(&task->slow_task->completion);
998 res = TMF_RESP_FUNC_FAILED;
999 /* Even TMF timed out, return direct. */
1000 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1001 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
d3c4dd4e
JG		 1002 struct hisi_sas_slot *slot = task->lldd_task;
1003
f1c88211 1004 dev_err(dev, "abort tmf: TMF task timeout and not done\n");
d3c4dd4e
JG		 1005 if (slot)
1006 slot->task = NULL;
1007
0efff300 1008 goto ex_err;
f1c88211
XC		 1009 } else
1010 dev_err(dev, "abort tmf: TMF task timeout\n");
0efff300
JG		 1011 }
1012
1013 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1af1b808 1014 task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
0efff300
JG		 1015 res = TMF_RESP_FUNC_COMPLETE;
1016 break;
1017 }
1018
4ffde482
JG		 1019 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1020 task->task_status.stat == TMF_RESP_FUNC_SUCC) {
1021 res = TMF_RESP_FUNC_SUCC;
1022 break;
1023 }
1024
0efff300
JG		 1025 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1026 task->task_status.stat == SAS_DATA_UNDERRUN) {
1027 /* no error, but return the number of bytes of
1028 * underrun
1029 */
1030 dev_warn(dev, "abort tmf: task to dev %016llx "
1031 "resp: 0x%x sts 0x%x underrun\n",
1032 SAS_ADDR(device->sas_addr),
1033 task->task_status.resp,
1034 task->task_status.stat);
1035 res = task->task_status.residual;
1036 break;
1037 }
1038
1039 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1040 task->task_status.stat == SAS_DATA_OVERRUN) {
1041 dev_warn(dev, "abort tmf: blocked task error\n");
1042 res = -EMSGSIZE;
1043 break;
1044 }
1045
1046 dev_warn(dev, "abort tmf: task to dev "
1047 "%016llx resp: 0x%x status 0x%x\n",
1048 SAS_ADDR(device->sas_addr), task->task_status.resp,
1049 task->task_status.stat);
1050 sas_free_task(task);
1051 task = NULL;
1052 }
1053ex_err:
d2d7e7a0
XC		 1054 if (retry == TASK_RETRY)
1055 dev_warn(dev, "abort tmf: executing internal task failed!\n");
0efff300
JG		 1056 sas_free_task(task);
1057 return res;
1058}
1059
7c594f04
XC		 1060static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev,
1061 bool reset, int pmp, u8 *fis)
1062{
1063 struct ata_taskfile tf;
1064
1065 ata_tf_init(dev, &tf);
1066 if (reset)
1067 tf.ctl |= ATA_SRST;
1068 else
1069 tf.ctl &= ~ATA_SRST;
1070 tf.command = ATA_CMD_DEV_RESET;
1071 ata_tf_to_fis(&tf, pmp, 0, fis);
1072}
1073
1074static int hisi_sas_softreset_ata_disk(struct domain_device *device)
1075{
1076 u8 fis[20] = {0};
1077 struct ata_port *ap = device->sata_dev.ap;
1078 struct ata_link *link;
1079 int rc = TMF_RESP_FUNC_FAILED;
1080 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1081 struct device *dev = hisi_hba->dev;
7c594f04 1082 int s = sizeof(struct host_to_dev_fis);
7c594f04
XC		 1083
1084 ata_for_each_link(link, ap, EDGE) {
1085 int pmp = sata_srst_pmp(link);
1086
1087 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
1088 rc = hisi_sas_exec_internal_tmf_task(device, fis, s, NULL);
1089 if (rc != TMF_RESP_FUNC_COMPLETE)
1090 break;
1091 }
1092
1093 if (rc == TMF_RESP_FUNC_COMPLETE) {
1094 ata_for_each_link(link, ap, EDGE) {
1095 int pmp = sata_srst_pmp(link);
1096
1097 hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis);
1098 rc = hisi_sas_exec_internal_tmf_task(device, fis,
1099 s, NULL);
1100 if (rc != TMF_RESP_FUNC_COMPLETE)
1101 dev_err(dev, "ata disk de-reset failed\n");
1102 }
1103 } else {
1104 dev_err(dev, "ata disk reset failed\n");
1105 }
1106
e85d93b2 1107 if (rc == TMF_RESP_FUNC_COMPLETE)
7c594f04 1108 hisi_sas_release_task(hisi_hba, device);
7c594f04
XC		 1109
1110 return rc;
1111}
1112
0efff300
JG		 1113static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
1114 u8 *lun, struct hisi_sas_tmf_task *tmf)
1115{
1116 struct sas_ssp_task ssp_task;
1117
1118 if (!(device->tproto & SAS_PROTOCOL_SSP))
1119 return TMF_RESP_FUNC_ESUPP;
1120
1121 memcpy(ssp_task.LUN, lun, 8);
1122
1123 return hisi_sas_exec_internal_tmf_task(device, &ssp_task,
1124 sizeof(ssp_task), tmf);
1125}
1126
a669bdbf 1127static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
917d3bda 1128{
a669bdbf 1129 u32 state = hisi_hba->hw->get_phys_state(hisi_hba);
917d3bda
XT		 1130 int i;
1131
1132 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
a669bdbf
XT		 1133 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1134 struct domain_device *device = sas_dev->sas_device;
1135 struct asd_sas_port *sas_port;
1136 struct hisi_sas_port *port;
1137 struct hisi_sas_phy *phy = NULL;
1138 struct asd_sas_phy *sas_phy;
1139
917d3bda 1140 if ((sas_dev->dev_type == SAS_PHY_UNUSED)
a669bdbf 1141 || !device || !device->port)
917d3bda
XT		 1142 continue;
1143
a669bdbf
XT		 1144 sas_port = device->port;
1145 port = to_hisi_sas_port(sas_port);
1146
1147 list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el)
1148 if (state & BIT(sas_phy->id)) {
1149 phy = sas_phy->lldd_phy;
1150 break;
1151 }
1152
1153 if (phy) {
1154 port->id = phy->port_id;
917d3bda 1155
a669bdbf
XT		 1156 /* Update linkrate of directly attached device. */
1157 if (!device->parent)
1158 device->linkrate = phy->sas_phy.linkrate;
917d3bda 1159
a669bdbf
XT		 1160 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
1161 } else
1162 port->id = 0xff;
917d3bda
XT		 1163 }
1164}
1165
1166static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state,
1167 u32 state)
1168{
1169 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
1170 struct asd_sas_port *_sas_port = NULL;
1171 int phy_no;
1172
1173 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) {
1174 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1175 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1176 struct asd_sas_port *sas_port = sas_phy->port;
917d3bda
XT		 1177 bool do_port_check = !!(_sas_port != sas_port);
1178
1179 if (!sas_phy->phy->enabled)
1180 continue;
1181
1182 /* Report PHY state change to libsas */
a669bdbf
XT		 1183 if (state & BIT(phy_no)) {
1184 if (do_port_check && sas_port && sas_port->port_dev) {
917d3bda
XT		 1185 struct domain_device *dev = sas_port->port_dev;
1186
1187 _sas_port = sas_port;
917d3bda
XT		 1188
1189 if (DEV_IS_EXPANDER(dev->dev_type))
1190 sas_ha->notify_port_event(sas_phy,
1191 PORTE_BROADCAST_RCVD);
1192 }
1193 } else if (old_state & (1 << phy_no))
1194 /* PHY down but was up before */
1195 hisi_sas_phy_down(hisi_hba, phy_no, 0);
1196
1197 }
917d3bda
XT		 1198}
1199
06ec0fb9
XC		 1200static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
1201{
917d3bda
XT		 1202 struct device *dev = hisi_hba->dev;
1203 struct Scsi_Host *shost = hisi_hba->shost;
1204 u32 old_state, state;
06ec0fb9
XC		 1205 int rc;
1206
1207 if (!hisi_hba->hw->soft_reset)
1208 return -1;
1209
917d3bda
XT		 1210 if (test_and_set_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
1211 return -1;
06ec0fb9 1212
fb51e7a8 1213 dev_info(dev, "controller resetting...\n");
917d3bda 1214 old_state = hisi_hba->hw->get_phys_state(hisi_hba);
06ec0fb9 1215
917d3bda 1216 scsi_block_requests(shost);
6f7c32d6
JG		 1217 if (timer_pending(&hisi_hba->timer))
1218 del_timer_sync(&hisi_hba->timer);
1219
917d3bda
XT		 1220 set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1221 rc = hisi_hba->hw->soft_reset(hisi_hba);
1222 if (rc) {
1223 dev_warn(dev, "controller reset failed (%d)\n", rc);
1224 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
fb51e7a8 1225 scsi_unblock_requests(shost);
917d3bda
XT		 1226 goto out;
1227 }
917d3bda 1228 hisi_sas_release_tasks(hisi_hba);
917d3bda 1229
917d3bda
XT		 1230 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1231
1232 /* Init and wait for PHYs to come up and all libsas event finished. */
1233 hisi_hba->hw->phys_init(hisi_hba);
1234 msleep(1000);
a669bdbf 1235 hisi_sas_refresh_port_id(hisi_hba);
fb51e7a8 1236 scsi_unblock_requests(shost);
917d3bda
XT		 1237
1238 state = hisi_hba->hw->get_phys_state(hisi_hba);
1239 hisi_sas_rescan_topology(hisi_hba, old_state, state);
fb51e7a8 1240 dev_info(dev, "controller reset complete\n");
06ec0fb9
XC		 1241
1242out:
06ec0fb9 1243 clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
917d3bda 1244
06ec0fb9
XC		 1245 return rc;
1246}
1247
0efff300
JG		 1248static int hisi_sas_abort_task(struct sas_task *task)
1249{
1250 struct scsi_lun lun;
1251 struct hisi_sas_tmf_task tmf_task;
1252 struct domain_device *device = task->dev;
1253 struct hisi_sas_device *sas_dev = device->lldd_dev;
c6ef8954
XC		 1254 struct hisi_hba *hisi_hba;
1255 struct device *dev;
0efff300
JG		 1256 int rc = TMF_RESP_FUNC_FAILED;
1257 unsigned long flags;
1258
c6ef8954 1259 if (!sas_dev)
0efff300 1260 return TMF_RESP_FUNC_FAILED;
c6ef8954
XC		 1261
1262 hisi_hba = dev_to_hisi_hba(task->dev);
1263 dev = hisi_hba->dev;
0efff300 1264
b81b6cce 1265 spin_lock_irqsave(&task->task_state_lock, flags);
0efff300 1266 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
b81b6cce 1267 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300
JG		 1268 rc = TMF_RESP_FUNC_COMPLETE;
1269 goto out;
1270 }
b81b6cce
XC		 1271 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1272 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300 1273
0efff300
JG		 1274 sas_dev->dev_status = HISI_SAS_DEV_EH;
1275 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1276 struct scsi_cmnd *cmnd = task->uldd_task;
1277 struct hisi_sas_slot *slot = task->lldd_task;
1278 u32 tag = slot->idx;
c35279f2 1279 int rc2;
0efff300
JG		 1280
1281 int_to_scsilun(cmnd->device->lun, &lun);
1282 tmf_task.tmf = TMF_ABORT_TASK;
1283 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1284
1285 rc = hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun,
1286 &tmf_task);
1287
c35279f2
JG		 1288 rc2 = hisi_sas_internal_task_abort(hisi_hba, device,
1289 HISI_SAS_INT_ABT_CMD, tag);
813709f2
XT		 1290 if (rc2 < 0) {
1291 dev_err(dev, "abort task: internal abort (%d)\n", rc2);
1292 return TMF_RESP_FUNC_FAILED;
1293 }
1294
c35279f2
JG		 1295 /*
1296 * If the TMF finds that the IO is not in the device and also
1297 * the internal abort does not succeed, then it is safe to
1298 * free the slot.
1299 * Note: if the internal abort succeeds then the slot
1300 * will have already been completed
1301 */
1302 if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) {
e85d93b2 1303 if (task->lldd_task)
c35279f2 1304 hisi_sas_do_release_task(hisi_hba, task, slot);
0efff300 1305 }
0efff300
JG		 1306 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1307 task->task_proto & SAS_PROTOCOL_STP) {
1308 if (task->dev->dev_type == SAS_SATA_DEV) {
813709f2
XT		 1309 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1310 HISI_SAS_INT_ABT_DEV, 0);
1311 if (rc < 0) {
1312 dev_err(dev, "abort task: internal abort failed\n");
1313 goto out;
1314 }
d30ff263 1315 hisi_sas_dereg_device(hisi_hba, device);
7c594f04 1316 rc = hisi_sas_softreset_ata_disk(device);
0efff300 1317 }
eb045e04 1318 } else if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SMP) {
dc8a49ca
JG		 1319 /* SMP */
1320 struct hisi_sas_slot *slot = task->lldd_task;
1321 u32 tag = slot->idx;
0efff300 1322
ccbfe5a0
XC		 1323 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1324 HISI_SAS_INT_ABT_CMD, tag);
813709f2 1325 if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) &&
e85d93b2 1326 task->lldd_task)
ccbfe5a0 1327 hisi_sas_do_release_task(hisi_hba, task, slot);
0efff300
JG		 1328 }
1329
1330out:
1331 if (rc != TMF_RESP_FUNC_COMPLETE)
1332 dev_notice(dev, "abort task: rc=%d\n", rc);
1333 return rc;
1334}
1335
1336static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun)
1337{
2a038131
XT		 1338 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1339 struct device *dev = hisi_hba->dev;
0efff300
JG		 1340 struct hisi_sas_tmf_task tmf_task;
1341 int rc = TMF_RESP_FUNC_FAILED;
2a038131
XT		 1342
1343 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1344 HISI_SAS_INT_ABT_DEV, 0);
1345 if (rc < 0) {
1346 dev_err(dev, "abort task set: internal abort rc=%d\n", rc);
1347 return TMF_RESP_FUNC_FAILED;
1348 }
1349 hisi_sas_dereg_device(hisi_hba, device);
0efff300
JG		 1350
1351 tmf_task.tmf = TMF_ABORT_TASK_SET;
1352 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
1353
e85d93b2 1354 if (rc == TMF_RESP_FUNC_COMPLETE)
2a038131 1355 hisi_sas_release_task(hisi_hba, device);
2a038131 1356
0efff300
JG		 1357 return rc;
1358}
1359
1360static int hisi_sas_clear_aca(struct domain_device *device, u8 *lun)
1361{
1362 int rc = TMF_RESP_FUNC_FAILED;
1363 struct hisi_sas_tmf_task tmf_task;
1364
1365 tmf_task.tmf = TMF_CLEAR_ACA;
1366 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
1367
1368 return rc;
1369}
1370
1371static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device)
1372{
1373 struct sas_phy *phy = sas_get_local_phy(device);
1374 int rc, reset_type = (device->dev_type == SAS_SATA_DEV ||
1375 (device->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1376 rc = sas_phy_reset(phy, reset_type);
1377 sas_put_local_phy(phy);
1378 msleep(2000);
1379 return rc;
1380}
1381
1382static int hisi_sas_I_T_nexus_reset(struct domain_device *device)
1383{
1384 struct hisi_sas_device *sas_dev = device->lldd_dev;
1385 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
813709f2 1386 struct device *dev = hisi_hba->dev;
0efff300
JG		 1387 int rc = TMF_RESP_FUNC_FAILED;
1388
1389 if (sas_dev->dev_status != HISI_SAS_DEV_EH)
1390 return TMF_RESP_FUNC_FAILED;
1391 sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
1392
813709f2 1393 rc = hisi_sas_internal_task_abort(hisi_hba, device,
d30ff263 1394 HISI_SAS_INT_ABT_DEV, 0);
813709f2
XT		 1395 if (rc < 0) {
1396 dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc);
1397 return TMF_RESP_FUNC_FAILED;
1398 }
d30ff263
XC		 1399 hisi_sas_dereg_device(hisi_hba, device);
1400
0efff300
JG		 1401 rc = hisi_sas_debug_I_T_nexus_reset(device);
1402
e85d93b2 1403 if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV))
6131243a 1404 hisi_sas_release_task(hisi_hba, device);
e85d93b2 1405
6131243a 1406 return rc;
0efff300
JG		 1407}
1408
1409static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun)
1410{
0efff300
JG		 1411 struct hisi_sas_device *sas_dev = device->lldd_dev;
1412 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1413 struct device *dev = hisi_hba->dev;
0efff300
JG		 1414 int rc = TMF_RESP_FUNC_FAILED;
1415
0efff300 1416 sas_dev->dev_status = HISI_SAS_DEV_EH;
055945df
JG		 1417 if (dev_is_sata(device)) {
1418 struct sas_phy *phy;
1419
1420 /* Clear internal IO and then hardreset */
1421 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1422 HISI_SAS_INT_ABT_DEV, 0);
813709f2
XT		 1423 if (rc < 0) {
1424 dev_err(dev, "lu_reset: internal abort failed\n");
055945df 1425 goto out;
813709f2 1426 }
d30ff263 1427 hisi_sas_dereg_device(hisi_hba, device);
0efff300 1428
055945df
JG		 1429 phy = sas_get_local_phy(device);
1430
1431 rc = sas_phy_reset(phy, 1);
1432
e85d93b2 1433 if (rc == 0)
055945df 1434 hisi_sas_release_task(hisi_hba, device);
055945df
JG		 1435 sas_put_local_phy(phy);
1436 } else {
1437 struct hisi_sas_tmf_task tmf_task = { .tmf = TMF_LU_RESET };
1438
2a038131
XT		 1439 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1440 HISI_SAS_INT_ABT_DEV, 0);
1441 if (rc < 0) {
1442 dev_err(dev, "lu_reset: internal abort failed\n");
1443 goto out;
1444 }
1445 hisi_sas_dereg_device(hisi_hba, device);
1446
055945df 1447 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
e85d93b2 1448 if (rc == TMF_RESP_FUNC_COMPLETE)
055945df 1449 hisi_sas_release_task(hisi_hba, device);
055945df
JG		 1450 }
1451out:
14d3f397 1452 if (rc != TMF_RESP_FUNC_COMPLETE)
ad604832 1453 dev_err(dev, "lu_reset: for device[%d]:rc= %d\n",
14d3f397 1454 sas_dev->device_id, rc);
0efff300
JG		 1455 return rc;
1456}
1457
8b05ad6a
JG		 1458static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
1459{
1460 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
e402acdb 1461 HISI_SAS_DECLARE_RST_WORK_ON_STACK(r);
8b05ad6a 1462
e402acdb
XT		 1463 queue_work(hisi_hba->wq, &r.work);
1464 wait_for_completion(r.completion);
1465 if (r.done)
1466 return TMF_RESP_FUNC_COMPLETE;
1467
1468 return TMF_RESP_FUNC_FAILED;
8b05ad6a
JG		 1469}
1470
0efff300
JG		 1471static int hisi_sas_query_task(struct sas_task *task)
1472{
1473 struct scsi_lun lun;
1474 struct hisi_sas_tmf_task tmf_task;
1475 int rc = TMF_RESP_FUNC_FAILED;
1476
1477 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1478 struct scsi_cmnd *cmnd = task->uldd_task;
1479 struct domain_device *device = task->dev;
1480 struct hisi_sas_slot *slot = task->lldd_task;
1481 u32 tag = slot->idx;
1482
1483 int_to_scsilun(cmnd->device->lun, &lun);
1484 tmf_task.tmf = TMF_QUERY_TASK;
1485 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag);
1486
1487 rc = hisi_sas_debug_issue_ssp_tmf(device,
1488 lun.scsi_lun,
1489 &tmf_task);
1490 switch (rc) {
1491 /* The task is still in Lun, release it then */
1492 case TMF_RESP_FUNC_SUCC:
1493 /* The task is not in Lun or failed, reset the phy */
1494 case TMF_RESP_FUNC_FAILED:
1495 case TMF_RESP_FUNC_COMPLETE:
1496 break;
997ee43c
XC		 1497 default:
1498 rc = TMF_RESP_FUNC_FAILED;
1499 break;
0efff300
JG		 1500 }
1501 }
1502 return rc;
1503}
1504
441c2740 1505static int
ad604832 1506hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
441c2740
JG		 1507 struct sas_task *task, int abort_flag,
1508 int task_tag)
1509{
1510 struct domain_device *device = task->dev;
1511 struct hisi_sas_device *sas_dev = device->lldd_dev;
11b75249 1512 struct device *dev = hisi_hba->dev;
441c2740
JG		 1513 struct hisi_sas_port *port;
1514 struct hisi_sas_slot *slot;
2e244f0f 1515 struct asd_sas_port *sas_port = device->port;
441c2740 1516 struct hisi_sas_cmd_hdr *cmd_hdr_base;
b1a49412 1517 struct hisi_sas_dq *dq = sas_dev->dq;
441c2740 1518 int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx;
fa222db0
XC		 1519 unsigned long flags, flags_dq = 0;
1520 int wr_q_index;
441c2740 1521
917d3bda 1522 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
06ec0fb9
XC		 1523 return -EINVAL;
1524
441c2740
JG		 1525 if (!device->port)
1526 return -1;
1527
2e244f0f 1528 port = to_hisi_sas_port(sas_port);
441c2740
JG		 1529
1530 /* simply get a slot and send abort command */
b1a49412 1531 spin_lock_irqsave(&hisi_hba->lock, flags);
441c2740 1532 rc = hisi_sas_slot_index_alloc(hisi_hba, &slot_idx);
b1a49412
XC		 1533 if (rc) {
1534 spin_unlock_irqrestore(&hisi_hba->lock, flags);
441c2740 1535 goto err_out;
b1a49412
XC		 1536 }
1537 spin_unlock_irqrestore(&hisi_hba->lock, flags);
1538
3de0026d
XC		 1539 slot = &hisi_hba->slot_info[slot_idx];
1540 memset(slot, 0, sizeof(struct hisi_sas_slot));
1541
1542 slot->buf = dma_pool_alloc(hisi_hba->buffer_pool,
1543 GFP_ATOMIC, &slot->buf_dma);
1544 if (!slot->buf) {
1545 rc = -ENOMEM;
1546 goto err_out_tag;
1547 }
fa222db0 1548
b1a49412 1549 spin_lock_irqsave(&dq->lock, flags_dq);
fa222db0
XC		 1550 wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
1551 if (wr_q_index < 0) {
3de0026d
XC		 1552 spin_unlock_irqrestore(&dq->lock, flags_dq);
1553 goto err_out_buf;
1554 }
fa222db0
XC		 1555 list_add_tail(&slot->delivery, &dq->list);
1556 spin_unlock_irqrestore(&dq->lock, flags_dq);
441c2740 1557
b1a49412 1558 dlvry_queue = dq->id;
fa222db0 1559 dlvry_queue_slot = wr_q_index;
b1a49412 1560
441c2740
JG		 1561 slot->idx = slot_idx;
1562 slot->n_elem = n_elem;
1563 slot->dlvry_queue = dlvry_queue;
1564 slot->dlvry_queue_slot = dlvry_queue_slot;
1565 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
1566 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
1567 slot->task = task;
1568 slot->port = port;
cd938e53 1569 slot->is_internal = true;
441c2740
JG		 1570 task->lldd_task = slot;
1571
1572 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
031da09c
XC		 1573 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
1574 memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ);
441c2740 1575
a2b3820b 1576 hisi_sas_task_prep_abort(hisi_hba, slot, device_id,
441c2740 1577 abort_flag, task_tag);
441c2740 1578
54c9dd2d 1579 spin_lock_irqsave(&task->task_state_lock, flags);
441c2740 1580 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
54c9dd2d 1581 spin_unlock_irqrestore(&task->task_state_lock, flags);
441c2740 1582
fa222db0 1583 slot->ready = 1;
b1a49412 1584 /* send abort command to the chip */
fa222db0
XC		 1585 spin_lock_irqsave(&dq->lock, flags);
1586 list_add_tail(&slot->entry, &sas_dev->list);
b1a49412 1587 hisi_hba->hw->start_delivery(dq);
fa222db0 1588 spin_unlock_irqrestore(&dq->lock, flags);
441c2740
JG		 1589
1590 return 0;
1591
3de0026d
XC		 1592err_out_buf:
1593 dma_pool_free(hisi_hba->buffer_pool, slot->buf,
1594 slot->buf_dma);
441c2740 1595err_out_tag:
b1a49412 1596 spin_lock_irqsave(&hisi_hba->lock, flags);
441c2740 1597 hisi_sas_slot_index_free(hisi_hba, slot_idx);
b1a49412 1598 spin_unlock_irqrestore(&hisi_hba->lock, flags);
441c2740
JG		 1599err_out:
1600 dev_err(dev, "internal abort task prep: failed[%d]!\n", rc);
1601
1602 return rc;
1603}
1604
1605/**
1606 * hisi_sas_internal_task_abort -- execute an internal
1607 * abort command for single IO command or a device
1608 * @hisi_hba: host controller struct
1609 * @device: domain device
1610 * @abort_flag: mode of operation, device or single IO
1611 * @tag: tag of IO to be aborted (only relevant to single
1612 * IO mode)
1613 */
1614static int
1615hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
1616 struct domain_device *device,
1617 int abort_flag, int tag)
1618{
1619 struct sas_task *task;
1620 struct hisi_sas_device *sas_dev = device->lldd_dev;
11b75249 1621 struct device *dev = hisi_hba->dev;
441c2740 1622 int res;
441c2740 1623
813709f2
XT		 1624 /*
1625 * The interface is not realized means this HW don't support internal
1626 * abort, or don't need to do internal abort. Then here, we return
1627 * TMF_RESP_FUNC_FAILED and let other steps go on, which depends that
1628 * the internal abort has been executed and returned CQ.
1629 */
441c2740 1630 if (!hisi_hba->hw->prep_abort)
813709f2 1631 return TMF_RESP_FUNC_FAILED;
441c2740
JG		 1632
1633 task = sas_alloc_slow_task(GFP_KERNEL);
1634 if (!task)
1635 return -ENOMEM;
1636
1637 task->dev = device;
1638 task->task_proto = device->tproto;
1639 task->task_done = hisi_sas_task_done;
841b86f3 1640 task->slow_task->timer.function = hisi_sas_tmf_timedout;
bb9abc4a 1641 task->slow_task->timer.expires = jiffies + INTERNAL_ABORT_TIMEOUT*HZ;
441c2740
JG		 1642 add_timer(&task->slow_task->timer);
1643
441c2740
JG		 1644 res = hisi_sas_internal_abort_task_exec(hisi_hba, sas_dev->device_id,
1645 task, abort_flag, tag);
441c2740
JG		 1646 if (res) {
1647 del_timer(&task->slow_task->timer);
1648 dev_err(dev, "internal task abort: executing internal task failed: %d\n",
1649 res);
1650 goto exit;
1651 }
1652 wait_for_completion(&task->slow_task->completion);
1653 res = TMF_RESP_FUNC_FAILED;
1654
f64a6988
XC		 1655 /* Internal abort timed out */
1656 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1657 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
1658 struct hisi_sas_slot *slot = task->lldd_task;
1659
1660 if (slot)
1661 slot->task = NULL;
f1c88211 1662 dev_err(dev, "internal task abort: timeout and not done.\n");
813709f2 1663 res = -EIO;
f692a677 1664 goto exit;
f1c88211
XC		 1665 } else
1666 dev_err(dev, "internal task abort: timeout.\n");
f64a6988
XC		 1667 }
1668
441c2740
JG		 1669 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1670 task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
1671 res = TMF_RESP_FUNC_COMPLETE;
1672 goto exit;
1673 }
1674
c35279f2
JG		 1675 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1676 task->task_status.stat == TMF_RESP_FUNC_SUCC) {
1677 res = TMF_RESP_FUNC_SUCC;
1678 goto exit;
1679 }
1680
441c2740 1681exit:
297d7302 1682 dev_dbg(dev, "internal task abort: task to dev %016llx task=%p "
441c2740
JG		 1683 "resp: 0x%x sts 0x%x\n",
1684 SAS_ADDR(device->sas_addr),
1685 task,
1686 task->task_status.resp, /* 0 is complete, -1 is undelivered */
1687 task->task_status.stat);
1688 sas_free_task(task);
1689
1690 return res;
1691}
1692
184a4635
JG		 1693static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy)
1694{
1695 hisi_sas_port_notify_formed(sas_phy);
1696}
1697
336bd78b
XC		 1698static void hisi_sas_port_deformed(struct asd_sas_phy *sas_phy)
1699{
1700}
1701
6379c560
XT		 1702static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type,
1703 u8 reg_index, u8 reg_count, u8 *write_data)
1704{
1705 struct hisi_hba *hisi_hba = sha->lldd_ha;
1706
1707 if (!hisi_hba->hw->write_gpio)
1708 return -EOPNOTSUPP;
1709
1710 return hisi_hba->hw->write_gpio(hisi_hba, reg_type,
1711 reg_index, reg_count, write_data);
1712}
1713
184a4635
JG		 1714static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy)
1715{
1716 phy->phy_attached = 0;
1717 phy->phy_type = 0;
1718 phy->port = NULL;
1719}
1720
1721void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy)
1722{
1723 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1724 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1725 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
1726
1727 if (rdy) {
1728 /* Phy down but ready */
1729 hisi_sas_bytes_dmaed(hisi_hba, phy_no);
1730 hisi_sas_port_notify_formed(sas_phy);
1731 } else {
1732 struct hisi_sas_port *port = phy->port;
1733
1734 /* Phy down and not ready */
1735 sas_ha->notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL);
1736 sas_phy_disconnected(sas_phy);
1737
1738 if (port) {
1739 if (phy->phy_type & PORT_TYPE_SAS) {
1740 int port_id = port->id;
1741
1742 if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba,
1743 port_id))
1744 port->port_attached = 0;
1745 } else if (phy->phy_type & PORT_TYPE_SATA)
1746 port->port_attached = 0;
1747 }
1748 hisi_sas_phy_disconnected(phy);
1749 }
1750}
1751EXPORT_SYMBOL_GPL(hisi_sas_phy_down);
1752
571295f8
XT		 1753void hisi_sas_kill_tasklets(struct hisi_hba *hisi_hba)
1754{
1755 int i;
1756
1757 for (i = 0; i < hisi_hba->queue_count; i++) {
1758 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
1759
1760 tasklet_kill(&cq->tasklet);
1761 }
1762}
1763EXPORT_SYMBOL_GPL(hisi_sas_kill_tasklets);
06ec0fb9 1764
e21fe3a5
JG		 1765struct scsi_transport_template *hisi_sas_stt;
1766EXPORT_SYMBOL_GPL(hisi_sas_stt);
e8899fad 1767
1e15feac 1768static struct device_attribute *host_attrs[] = {
8eea9dd8
JY		 1769 &dev_attr_phy_event_threshold,
1770 NULL,
1771};
1772
e21fe3a5 1773static struct scsi_host_template _hisi_sas_sht = {
7eb7869f
JG		 1774 .module = THIS_MODULE,
1775 .name = DRV_NAME,
1776 .queuecommand = sas_queuecommand,
1777 .target_alloc = sas_target_alloc,
31eec8a6 1778 .slave_configure = hisi_sas_slave_configure,
701f75ec
JG		 1779 .scan_finished = hisi_sas_scan_finished,
1780 .scan_start = hisi_sas_scan_start,
7eb7869f
JG		 1781 .change_queue_depth = sas_change_queue_depth,
1782 .bios_param = sas_bios_param,
1783 .can_queue = 1,
1784 .this_id = -1,
1785 .sg_tablesize = SG_ALL,
1786 .max_sectors = SCSI_DEFAULT_MAX_SECTORS,
1787 .use_clustering = ENABLE_CLUSTERING,
1788 .eh_device_reset_handler = sas_eh_device_reset_handler,
cc199e78 1789 .eh_target_reset_handler = sas_eh_target_reset_handler,
7eb7869f
JG		 1790 .target_destroy = sas_target_destroy,
1791 .ioctl = sas_ioctl,
8eea9dd8 1792 .shost_attrs = host_attrs,
7eb7869f 1793};
e21fe3a5
JG		 1794struct scsi_host_template *hisi_sas_sht = &_hisi_sas_sht;
1795EXPORT_SYMBOL_GPL(hisi_sas_sht);
7eb7869f 1796
e8899fad 1797static struct sas_domain_function_template hisi_sas_transport_ops = {
abda97c2
JG		 1798 .lldd_dev_found = hisi_sas_dev_found,
1799 .lldd_dev_gone = hisi_sas_dev_gone,
42e7a693 1800 .lldd_execute_task = hisi_sas_queue_command,
e4189d53 1801 .lldd_control_phy = hisi_sas_control_phy,
0efff300
JG		 1802 .lldd_abort_task = hisi_sas_abort_task,
1803 .lldd_abort_task_set = hisi_sas_abort_task_set,
1804 .lldd_clear_aca = hisi_sas_clear_aca,
1805 .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset,
1806 .lldd_lu_reset = hisi_sas_lu_reset,
1807 .lldd_query_task = hisi_sas_query_task,
8b05ad6a 1808 .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha,
184a4635 1809 .lldd_port_formed = hisi_sas_port_formed,
336bd78b 1810 .lldd_port_deformed = hisi_sas_port_deformed,
6379c560 1811 .lldd_write_gpio = hisi_sas_write_gpio,
e8899fad
JG		 1812};
1813
06ec0fb9
XC		 1814void hisi_sas_init_mem(struct hisi_hba *hisi_hba)
1815{
1816 int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
1817
1818 for (i = 0; i < hisi_hba->queue_count; i++) {
1819 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
1820 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
1821
1822 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
1823 memset(hisi_hba->cmd_hdr[i], 0, s);
1824 dq->wr_point = 0;
1825
1826 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
1827 memset(hisi_hba->complete_hdr[i], 0, s);
1828 cq->rd_point = 0;
1829 }
1830
1831 s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy;
1832 memset(hisi_hba->initial_fis, 0, s);
1833
1834 s = max_command_entries * sizeof(struct hisi_sas_iost);
1835 memset(hisi_hba->iost, 0, s);
1836
1837 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
1838 memset(hisi_hba->breakpoint, 0, s);
1839
3297ded1 1840 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
06ec0fb9
XC		 1841 memset(hisi_hba->sata_breakpoint, 0, s);
1842}
1843EXPORT_SYMBOL_GPL(hisi_sas_init_mem);
1844
e21fe3a5 1845int hisi_sas_alloc(struct hisi_hba *hisi_hba, struct Scsi_Host *shost)
6be6de18 1846{
11b75249 1847 struct device *dev = hisi_hba->dev;
a8d547bd 1848 int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
6be6de18 1849
fa42d80d 1850 spin_lock_init(&hisi_hba->lock);
976867e6
JG		 1851 for (i = 0; i < hisi_hba->n_phy; i++) {
1852 hisi_sas_phy_init(hisi_hba, i);
1853 hisi_hba->port[i].port_attached = 0;
1854 hisi_hba->port[i].id = -1;
976867e6
JG		 1855 }
1856
af740dbe
JG		 1857 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1858 hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED;
1859 hisi_hba->devices[i].device_id = i;
1860 hisi_hba->devices[i].dev_status = HISI_SAS_DEV_NORMAL;
1861 }
1862
6be6de18 1863 for (i = 0; i < hisi_hba->queue_count; i++) {
9101a079 1864 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
4fde02ad 1865 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
9101a079
JG		 1866
1867 /* Completion queue structure */
1868 cq->id = i;
1869 cq->hisi_hba = hisi_hba;
1870
4fde02ad 1871 /* Delivery queue structure */
39bade0c 1872 spin_lock_init(&dq->lock);
fa222db0 1873 INIT_LIST_HEAD(&dq->list);
4fde02ad
JG		 1874 dq->id = i;
1875 dq->hisi_hba = hisi_hba;
1876
6be6de18
JG		 1877 /* Delivery queue */
1878 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
1879 hisi_hba->cmd_hdr[i] = dma_alloc_coherent(dev, s,
1880 &hisi_hba->cmd_hdr_dma[i], GFP_KERNEL);
1881 if (!hisi_hba->cmd_hdr[i])
1882 goto err_out;
6be6de18
JG		 1883
1884 /* Completion queue */
1885 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
1886 hisi_hba->complete_hdr[i] = dma_alloc_coherent(dev, s,
1887 &hisi_hba->complete_hdr_dma[i], GFP_KERNEL);
1888 if (!hisi_hba->complete_hdr[i])
1889 goto err_out;
6be6de18
JG		 1890 }
1891
f557e32c
XT		 1892 s = sizeof(struct hisi_sas_slot_buf_table);
1893 hisi_hba->buffer_pool = dma_pool_create("dma_buffer", dev, s, 16, 0);
1894 if (!hisi_hba->buffer_pool)
6be6de18
JG		 1895 goto err_out;
1896
1897 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
4f4e21b8 1898 hisi_hba->itct = dma_zalloc_coherent(dev, s, &hisi_hba->itct_dma,
6be6de18
JG		 1899 GFP_KERNEL);
1900 if (!hisi_hba->itct)
1901 goto err_out;
1902
a8d547bd 1903 hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries,
6be6de18
JG		 1904 sizeof(struct hisi_sas_slot),
1905 GFP_KERNEL);
1906 if (!hisi_hba->slot_info)
1907 goto err_out;
1908
a8d547bd 1909 s = max_command_entries * sizeof(struct hisi_sas_iost);
6be6de18
JG		 1910 hisi_hba->iost = dma_alloc_coherent(dev, s, &hisi_hba->iost_dma,
1911 GFP_KERNEL);
1912 if (!hisi_hba->iost)
1913 goto err_out;
1914
a8d547bd 1915 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
6be6de18
JG		 1916 hisi_hba->breakpoint = dma_alloc_coherent(dev, s,
1917 &hisi_hba->breakpoint_dma, GFP_KERNEL);
1918 if (!hisi_hba->breakpoint)
1919 goto err_out;
1920
a8d547bd 1921 hisi_hba->slot_index_count = max_command_entries;
433f5696 1922 s = hisi_hba->slot_index_count / BITS_PER_BYTE;
257efd1f
JG		 1923 hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL);
1924 if (!hisi_hba->slot_index_tags)
1925 goto err_out;
1926
6be6de18
JG		 1927 s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
1928 hisi_hba->initial_fis = dma_alloc_coherent(dev, s,
1929 &hisi_hba->initial_fis_dma, GFP_KERNEL);
1930 if (!hisi_hba->initial_fis)
1931 goto err_out;
6be6de18 1932
3297ded1 1933 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
6be6de18
JG		 1934 hisi_hba->sata_breakpoint = dma_alloc_coherent(dev, s,
1935 &hisi_hba->sata_breakpoint_dma, GFP_KERNEL);
1936 if (!hisi_hba->sata_breakpoint)
1937 goto err_out;
06ec0fb9 1938 hisi_sas_init_mem(hisi_hba);
6be6de18 1939
257efd1f
JG		 1940 hisi_sas_slot_index_init(hisi_hba);
1941
7e9080e1
JG		 1942 hisi_hba->wq = create_singlethread_workqueue(dev_name(dev));
1943 if (!hisi_hba->wq) {
1944 dev_err(dev, "sas_alloc: failed to create workqueue\n");
1945 goto err_out;
1946 }
1947
6be6de18
JG		 1948 return 0;
1949err_out:
1950 return -ENOMEM;
1951}
e21fe3a5 1952EXPORT_SYMBOL_GPL(hisi_sas_alloc);
6be6de18 1953
e21fe3a5 1954void hisi_sas_free(struct hisi_hba *hisi_hba)
89d53322 1955{
11b75249 1956 struct device *dev = hisi_hba->dev;
a8d547bd 1957 int i, s, max_command_entries = hisi_hba->hw->max_command_entries;
89d53322
JG		 1958
1959 for (i = 0; i < hisi_hba->queue_count; i++) {
1960 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
1961 if (hisi_hba->cmd_hdr[i])
1962 dma_free_coherent(dev, s,
1963 hisi_hba->cmd_hdr[i],
1964 hisi_hba->cmd_hdr_dma[i]);
1965
1966 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
1967 if (hisi_hba->complete_hdr[i])
1968 dma_free_coherent(dev, s,
1969 hisi_hba->complete_hdr[i],
1970 hisi_hba->complete_hdr_dma[i]);
1971 }
1972
f557e32c 1973 dma_pool_destroy(hisi_hba->buffer_pool);
89d53322
JG		 1974
1975 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
1976 if (hisi_hba->itct)
1977 dma_free_coherent(dev, s,
1978 hisi_hba->itct, hisi_hba->itct_dma);
1979
a8d547bd 1980 s = max_command_entries * sizeof(struct hisi_sas_iost);
89d53322
JG		 1981 if (hisi_hba->iost)
1982 dma_free_coherent(dev, s,
1983 hisi_hba->iost, hisi_hba->iost_dma);
1984
a8d547bd 1985 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
89d53322
JG		 1986 if (hisi_hba->breakpoint)
1987 dma_free_coherent(dev, s,
1988 hisi_hba->breakpoint,
1989 hisi_hba->breakpoint_dma);
1990
1991
1992 s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
1993 if (hisi_hba->initial_fis)
1994 dma_free_coherent(dev, s,
1995 hisi_hba->initial_fis,
1996 hisi_hba->initial_fis_dma);
1997
3297ded1 1998 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
89d53322
JG		 1999 if (hisi_hba->sata_breakpoint)
2000 dma_free_coherent(dev, s,
2001 hisi_hba->sata_breakpoint,
2002 hisi_hba->sata_breakpoint_dma);
2003
7e9080e1
JG		 2004 if (hisi_hba->wq)
2005 destroy_workqueue(hisi_hba->wq);
89d53322 2006}
e21fe3a5 2007EXPORT_SYMBOL_GPL(hisi_sas_free);
6be6de18 2008
b4241f0f 2009void hisi_sas_rst_work_handler(struct work_struct *work)
06ec0fb9
XC		 2010{
2011 struct hisi_hba *hisi_hba =
2012 container_of(work, struct hisi_hba, rst_work);
2013
2014 hisi_sas_controller_reset(hisi_hba);
2015}
b4241f0f 2016EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler);
06ec0fb9 2017
e402acdb
XT		 2018void hisi_sas_sync_rst_work_handler(struct work_struct *work)
2019{
2020 struct hisi_sas_rst *rst =
2021 container_of(work, struct hisi_sas_rst, work);
2022
2023 if (!hisi_sas_controller_reset(rst->hisi_hba))
2024 rst->done = true;
2025 complete(rst->completion);
2026}
2027EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler);
2028
0fa24c19 2029int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba)
7eb7869f 2030{
0fa24c19
JG		 2031 struct device *dev = hisi_hba->dev;
2032 struct platform_device *pdev = hisi_hba->platform_dev;
2033 struct device_node *np = pdev ? pdev->dev.of_node : NULL;
3bc45af8 2034 struct clk *refclk;
7eb7869f 2035
4d558c77 2036 if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr,
0fa24c19
JG		 2037 SAS_ADDR_SIZE)) {
2038 dev_err(dev, "could not get property sas-addr\n");
2039 return -ENOENT;
2040 }
e26b2f40 2041
4d558c77 2042 if (np) {
0fa24c19
JG		 2043 /*
2044 * These properties are only required for platform device-based
2045 * controller with DT firmware.
2046 */
4d558c77
JG		 2047 hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np,
2048 "hisilicon,sas-syscon");
0fa24c19
JG		 2049 if (IS_ERR(hisi_hba->ctrl)) {
2050 dev_err(dev, "could not get syscon\n");
2051 return -ENOENT;
2052 }
e26b2f40 2053
4d558c77 2054 if (device_property_read_u32(dev, "ctrl-reset-reg",
0fa24c19
JG		 2055 &hisi_hba->ctrl_reset_reg)) {
2056 dev_err(dev,
2057 "could not get property ctrl-reset-reg\n");
2058 return -ENOENT;
2059 }
e26b2f40 2060
4d558c77 2061 if (device_property_read_u32(dev, "ctrl-reset-sts-reg",
0fa24c19
JG		 2062 &hisi_hba->ctrl_reset_sts_reg)) {
2063 dev_err(dev,
2064 "could not get property ctrl-reset-sts-reg\n");
2065 return -ENOENT;
2066 }
e26b2f40 2067
4d558c77 2068 if (device_property_read_u32(dev, "ctrl-clock-ena-reg",
0fa24c19
JG		 2069 &hisi_hba->ctrl_clock_ena_reg)) {
2070 dev_err(dev,
2071 "could not get property ctrl-clock-ena-reg\n");
2072 return -ENOENT;
2073 }
4d558c77
JG		 2074 }
2075
0fa24c19 2076 refclk = devm_clk_get(dev, NULL);
3bc45af8 2077 if (IS_ERR(refclk))
87e287c1 2078 dev_dbg(dev, "no ref clk property\n");
3bc45af8
JG		 2079 else
2080 hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000;
2081
0fa24c19
JG		 2082 if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) {
2083 dev_err(dev, "could not get property phy-count\n");
2084 return -ENOENT;
2085 }
e26b2f40 2086
4d558c77 2087 if (device_property_read_u32(dev, "queue-count",
0fa24c19
JG		 2088 &hisi_hba->queue_count)) {
2089 dev_err(dev, "could not get property queue-count\n");
2090 return -ENOENT;
2091 }
2092
2093 return 0;
2094}
2095EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info);
2096
2097static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev,
2098 const struct hisi_sas_hw *hw)
2099{
2100 struct resource *res;
2101 struct Scsi_Host *shost;
2102 struct hisi_hba *hisi_hba;
2103 struct device *dev = &pdev->dev;
2104
e21fe3a5 2105 shost = scsi_host_alloc(hisi_sas_sht, sizeof(*hisi_hba));
0fa24c19
JG		 2106 if (!shost) {
2107 dev_err(dev, "scsi host alloc failed\n");
2108 return NULL;
2109 }
2110 hisi_hba = shost_priv(shost);
2111
2112 INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler);
2113 hisi_hba->hw = hw;
2114 hisi_hba->dev = dev;
2115 hisi_hba->platform_dev = pdev;
2116 hisi_hba->shost = shost;
2117 SHOST_TO_SAS_HA(shost) = &hisi_hba->sha;
2118
77570eed 2119 timer_setup(&hisi_hba->timer, NULL, 0);
0fa24c19
JG		 2120
2121 if (hisi_sas_get_fw_info(hisi_hba) < 0)
e26b2f40
JG		 2122 goto err_out;
2123
a6f2c7ff
JG		 2124 if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)) &&
2125 dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) {
2126 dev_err(dev, "No usable DMA addressing method\n");
2127 goto err_out;
2128 }
2129
e26b2f40
JG		 2130 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2131 hisi_hba->regs = devm_ioremap_resource(dev, res);
2132 if (IS_ERR(hisi_hba->regs))
2133 goto err_out;
2134
6379c560
XT		 2135 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2136 if (res) {
2137 hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res);
2138 if (IS_ERR(hisi_hba->sgpio_regs))
2139 goto err_out;
2140 }
2141
89d53322
JG		 2142 if (hisi_sas_alloc(hisi_hba, shost)) {
2143 hisi_sas_free(hisi_hba);
6be6de18 2144 goto err_out;
89d53322 2145 }
6be6de18 2146
7eb7869f
JG		 2147 return shost;
2148err_out:
76aae5f6 2149 scsi_host_put(shost);
7eb7869f
JG		 2150 dev_err(dev, "shost alloc failed\n");
2151 return NULL;
2152}
2153
2154int hisi_sas_probe(struct platform_device *pdev,
2155 const struct hisi_sas_hw *hw)
2156{
2157 struct Scsi_Host *shost;
2158 struct hisi_hba *hisi_hba;
2159 struct device *dev = &pdev->dev;
2160 struct asd_sas_phy **arr_phy;
2161 struct asd_sas_port **arr_port;
2162 struct sas_ha_struct *sha;
2163 int rc, phy_nr, port_nr, i;
2164
2165 shost = hisi_sas_shost_alloc(pdev, hw);
d37a0082
XT		 2166 if (!shost)
2167 return -ENOMEM;
7eb7869f
JG		 2168
2169 sha = SHOST_TO_SAS_HA(shost);
2170 hisi_hba = shost_priv(shost);
2171 platform_set_drvdata(pdev, sha);
50cb916f 2172
7eb7869f
JG		 2173 phy_nr = port_nr = hisi_hba->n_phy;
2174
2175 arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL);
2176 arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL);
d37a0082
XT		 2177 if (!arr_phy || !arr_port) {
2178 rc = -ENOMEM;
2179 goto err_out_ha;
2180 }
7eb7869f
JG		 2181
2182 sha->sas_phy = arr_phy;
2183 sha->sas_port = arr_port;
7eb7869f
JG		 2184 sha->lldd_ha = hisi_hba;
2185
2186 shost->transportt = hisi_sas_stt;
2187 shost->max_id = HISI_SAS_MAX_DEVICES;
2188 shost->max_lun = ~0;
2189 shost->max_channel = 1;
2190 shost->max_cmd_len = 16;
2191 shost->sg_tablesize = min_t(u16, SG_ALL, HISI_SAS_SGE_PAGE_CNT);
a8d547bd
JG		 2192 shost->can_queue = hisi_hba->hw->max_command_entries;
2193 shost->cmd_per_lun = hisi_hba->hw->max_command_entries;
7eb7869f
JG		 2194
2195 sha->sas_ha_name = DRV_NAME;
11b75249 2196 sha->dev = hisi_hba->dev;
7eb7869f
JG		 2197 sha->lldd_module = THIS_MODULE;
2198 sha->sas_addr = &hisi_hba->sas_addr[0];
2199 sha->num_phys = hisi_hba->n_phy;
2200 sha->core.shost = hisi_hba->shost;
2201
2202 for (i = 0; i < hisi_hba->n_phy; i++) {
2203 sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy;
2204 sha->sas_port[i] = &hisi_hba->port[i].sas_port;
2205 }
2206
2207 rc = scsi_add_host(shost, &pdev->dev);
2208 if (rc)
2209 goto err_out_ha;
2210
2211 rc = sas_register_ha(sha);
2212 if (rc)
2213 goto err_out_register_ha;
2214
0757f041
XC		 2215 rc = hisi_hba->hw->hw_init(hisi_hba);
2216 if (rc)
2217 goto err_out_register_ha;
2218
7eb7869f
JG		 2219 scsi_scan_host(shost);
2220
2221 return 0;
2222
2223err_out_register_ha:
2224 scsi_remove_host(shost);
2225err_out_ha:
d37a0082 2226 hisi_sas_free(hisi_hba);
76aae5f6 2227 scsi_host_put(shost);
7eb7869f
JG		 2228 return rc;
2229}
2230EXPORT_SYMBOL_GPL(hisi_sas_probe);
2231
89d53322
JG		 2232int hisi_sas_remove(struct platform_device *pdev)
2233{
2234 struct sas_ha_struct *sha = platform_get_drvdata(pdev);
2235 struct hisi_hba *hisi_hba = sha->lldd_ha;
d37a0082 2236 struct Scsi_Host *shost = sha->core.shost;
89d53322 2237
5df41af4
XC		 2238 if (timer_pending(&hisi_hba->timer))
2239 del_timer(&hisi_hba->timer);
2240
89d53322
JG		 2241 sas_unregister_ha(sha);
2242 sas_remove_host(sha->core.shost);
2243
2244 hisi_sas_free(hisi_hba);
76aae5f6 2245 scsi_host_put(shost);
89d53322
JG		 2246 return 0;
2247}
2248EXPORT_SYMBOL_GPL(hisi_sas_remove);
2249
e8899fad
JG		 2250static __init int hisi_sas_init(void)
2251{
e8899fad
JG		 2252 hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops);
2253 if (!hisi_sas_stt)
2254 return -ENOMEM;
2255
2256 return 0;
2257}
2258
2259static __exit void hisi_sas_exit(void)
2260{
2261 sas_release_transport(hisi_sas_stt);
2262}
2263
2264module_init(hisi_sas_init);
2265module_exit(hisi_sas_exit);
2266
e8899fad
JG		 2267MODULE_LICENSE("GPL");
2268MODULE_AUTHOR("John Garry <john.garry@huawei.com>");
2269MODULE_DESCRIPTION("HISILICON SAS controller driver");
2270MODULE_ALIAS("platform:" DRV_NAME);
Linux 6.x block layer and io_uring tree(s)