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scsi: hisi_sas: Warn in v3 hw channel interrupt handler when status reg cleared
[linux-2.6-block.git] / drivers / scsi / hisi_sas / hisi_sas_main.c
CommitLineData
2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
e8899fad
JG		 2/*
3 * Copyright (c) 2015 Linaro Ltd.
4 * Copyright (c) 2015 Hisilicon Limited.
e8899fad
JG		 5 */
6
7#include "hisi_sas.h"
8#define DRV_NAME "hisi_sas"
9
42e7a693
JG		 10#define DEV_IS_GONE(dev) \
11 ((!dev) || (dev->dev_type == SAS_PHY_UNUSED))
12
cac9b2a2
JG		 13static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
14 u8 *lun, struct hisi_sas_tmf_task *tmf);
441c2740
JG		 15static int
16hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
17 struct domain_device *device,
18 int abort_flag, int tag);
7c594f04 19static int hisi_sas_softreset_ata_disk(struct domain_device *device);
057c3d1f
XT		 20static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
21 void *funcdata);
d5a60dfd
XC		 22static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
23 struct domain_device *device);
24static void hisi_sas_dev_gone(struct domain_device *device);
cac9b2a2 25
468f4b8d 26u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction)
6c7bb8a1 27{
468f4b8d 28 switch (fis->command) {
6c7bb8a1
XC		 29 case ATA_CMD_FPDMA_WRITE:
30 case ATA_CMD_FPDMA_READ:
31 case ATA_CMD_FPDMA_RECV:
32 case ATA_CMD_FPDMA_SEND:
33 case ATA_CMD_NCQ_NON_DATA:
edafeef4 34 return HISI_SAS_SATA_PROTOCOL_FPDMA;
6c7bb8a1
XC		 35
36 case ATA_CMD_DOWNLOAD_MICRO:
37 case ATA_CMD_ID_ATA:
38 case ATA_CMD_PMP_READ:
39 case ATA_CMD_READ_LOG_EXT:
40 case ATA_CMD_PIO_READ:
41 case ATA_CMD_PIO_READ_EXT:
42 case ATA_CMD_PMP_WRITE:
43 case ATA_CMD_WRITE_LOG_EXT:
44 case ATA_CMD_PIO_WRITE:
45 case ATA_CMD_PIO_WRITE_EXT:
edafeef4 46 return HISI_SAS_SATA_PROTOCOL_PIO;
6c7bb8a1
XC		 47
48 case ATA_CMD_DSM:
49 case ATA_CMD_DOWNLOAD_MICRO_DMA:
50 case ATA_CMD_PMP_READ_DMA:
51 case ATA_CMD_PMP_WRITE_DMA:
52 case ATA_CMD_READ:
53 case ATA_CMD_READ_EXT:
54 case ATA_CMD_READ_LOG_DMA_EXT:
55 case ATA_CMD_READ_STREAM_DMA_EXT:
56 case ATA_CMD_TRUSTED_RCV_DMA:
57 case ATA_CMD_TRUSTED_SND_DMA:
58 case ATA_CMD_WRITE:
59 case ATA_CMD_WRITE_EXT:
60 case ATA_CMD_WRITE_FUA_EXT:
61 case ATA_CMD_WRITE_QUEUED:
62 case ATA_CMD_WRITE_LOG_DMA_EXT:
63 case ATA_CMD_WRITE_STREAM_DMA_EXT:
c3fe8a2b 64 case ATA_CMD_ZAC_MGMT_IN:
edafeef4 65 return HISI_SAS_SATA_PROTOCOL_DMA;
6c7bb8a1
XC		 66
67 case ATA_CMD_CHK_POWER:
68 case ATA_CMD_DEV_RESET:
69 case ATA_CMD_EDD:
70 case ATA_CMD_FLUSH:
71 case ATA_CMD_FLUSH_EXT:
72 case ATA_CMD_VERIFY:
73 case ATA_CMD_VERIFY_EXT:
74 case ATA_CMD_SET_FEATURES:
75 case ATA_CMD_STANDBY:
76 case ATA_CMD_STANDBYNOW1:
c3fe8a2b 77 case ATA_CMD_ZAC_MGMT_OUT:
edafeef4 78 return HISI_SAS_SATA_PROTOCOL_NONDATA;
468f4b8d 79
3ff0f0b6
XT		 80 case ATA_CMD_SET_MAX:
81 switch (fis->features) {
82 case ATA_SET_MAX_PASSWD:
83 case ATA_SET_MAX_LOCK:
84 return HISI_SAS_SATA_PROTOCOL_PIO;
468f4b8d 85
3ff0f0b6
XT		 86 case ATA_SET_MAX_PASSWD_DMA:
87 case ATA_SET_MAX_UNLOCK_DMA:
88 return HISI_SAS_SATA_PROTOCOL_DMA;
89
90 default:
91 return HISI_SAS_SATA_PROTOCOL_NONDATA;
468f4b8d 92 }
3ff0f0b6
XT		 93
94 default:
95 {
6c7bb8a1
XC		 96 if (direction == DMA_NONE)
97 return HISI_SAS_SATA_PROTOCOL_NONDATA;
98 return HISI_SAS_SATA_PROTOCOL_PIO;
99 }
468f4b8d 100 }
6c7bb8a1
XC		 101}
102EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol);
103
75904077
XC		 104void hisi_sas_sata_done(struct sas_task *task,
105 struct hisi_sas_slot *slot)
106{
107 struct task_status_struct *ts = &task->task_status;
108 struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf;
f557e32c
XT		 109 struct hisi_sas_status_buffer *status_buf =
110 hisi_sas_status_buf_addr_mem(slot);
111 u8 *iu = &status_buf->iu[0];
112 struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu;
75904077
XC		 113
114 resp->frame_len = sizeof(struct dev_to_host_fis);
115 memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis));
116
117 ts->buf_valid_size = sizeof(*resp);
118}
119EXPORT_SYMBOL_GPL(hisi_sas_sata_done);
120
c2c1d9de
XC		 121/*
122 * This function assumes linkrate mask fits in 8 bits, which it
123 * does for all HW versions supported.
124 */
125u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max)
126{
4a8bec88 127 u8 rate = 0;
c2c1d9de
XC		 128 int i;
129
130 max -= SAS_LINK_RATE_1_5_GBPS;
131 for (i = 0; i <= max; i++)
132 rate |= 1 << (i * 2);
133 return rate;
134}
135EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask);
136
42e7a693
JG		 137static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device)
138{
139 return device->port->ha->lldd_ha;
140}
141
2e244f0f
JG		 142struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port)
143{
144 return container_of(sas_port, struct hisi_sas_port, sas_port);
145}
146EXPORT_SYMBOL_GPL(to_hisi_sas_port);
147
a25d0d3d
XC		 148void hisi_sas_stop_phys(struct hisi_hba *hisi_hba)
149{
150 int phy_no;
151
152 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++)
c63b88cc 153 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
a25d0d3d
XC		 154}
155EXPORT_SYMBOL_GPL(hisi_sas_stop_phys);
156
257efd1f
JG		 157static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx)
158{
159 void *bitmap = hisi_hba->slot_index_tags;
160
161 clear_bit(slot_idx, bitmap);
162}
163
42e7a693
JG		 164static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx)
165{
93352abc
JG		 166 if (hisi_hba->hw->slot_index_alloc ||
167 slot_idx >= HISI_SAS_UNRESERVED_IPTT) {
e9dc5e11 168 spin_lock(&hisi_hba->lock);
784b46b7 169 hisi_sas_slot_index_clear(hisi_hba, slot_idx);
e9dc5e11 170 spin_unlock(&hisi_hba->lock);
784b46b7 171 }
42e7a693
JG		 172}
173
174static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx)
175{
176 void *bitmap = hisi_hba->slot_index_tags;
177
178 set_bit(slot_idx, bitmap);
179}
180
784b46b7
XC		 181static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba,
182 struct scsi_cmnd *scsi_cmnd)
42e7a693 183{
784b46b7 184 int index;
42e7a693
JG		 185 void *bitmap = hisi_hba->slot_index_tags;
186
784b46b7
XC		 187 if (scsi_cmnd)
188 return scsi_cmnd->request->tag;
189
e9dc5e11 190 spin_lock(&hisi_hba->lock);
fa3be0f2 191 index = find_next_zero_bit(bitmap, hisi_hba->slot_index_count,
784b46b7 192 hisi_hba->last_slot_index + 1);
fa3be0f2 193 if (index >= hisi_hba->slot_index_count) {
784b46b7
XC		 194 index = find_next_zero_bit(bitmap,
195 hisi_hba->slot_index_count,
93352abc 196 HISI_SAS_UNRESERVED_IPTT);
784b46b7 197 if (index >= hisi_hba->slot_index_count) {
e9dc5e11 198 spin_unlock(&hisi_hba->lock);
fa3be0f2 199 return -SAS_QUEUE_FULL;
784b46b7 200 }
fa3be0f2 201 }
42e7a693 202 hisi_sas_slot_index_set(hisi_hba, index);
fa3be0f2 203 hisi_hba->last_slot_index = index;
e9dc5e11 204 spin_unlock(&hisi_hba->lock);
fa3be0f2 205
784b46b7 206 return index;
42e7a693
JG		 207}
208
257efd1f
JG		 209static void hisi_sas_slot_index_init(struct hisi_hba *hisi_hba)
210{
211 int i;
212
213 for (i = 0; i < hisi_hba->slot_index_count; ++i)
214 hisi_sas_slot_index_clear(hisi_hba, i);
215}
27a3f229
JG		 216
217void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task,
218 struct hisi_sas_slot *slot)
219{
4fefe5bb
XC		 220 int device_id = slot->device_id;
221 struct hisi_sas_device *sas_dev = &hisi_hba->devices[device_id];
27a3f229 222
d3c4dd4e 223 if (task) {
11b75249 224 struct device *dev = hisi_hba->dev;
27a3f229 225
6ba0fbc3
XT		 226 if (!task->lldd_task)
227 return;
228
229 task->lldd_task = NULL;
230
b3cce125 231 if (!sas_protocol_ata(task->task_proto)) {
d3c4dd4e 232 if (slot->n_elem)
dc1e4730
XC		 233 dma_unmap_sg(dev, task->scatter,
234 task->num_scatter,
d3c4dd4e 235 task->data_dir);
847e8355
XC		 236 if (slot->n_elem_dif) {
237 struct sas_ssp_task *ssp_task = &task->ssp_task;
238 struct scsi_cmnd *scsi_cmnd = ssp_task->cmd;
239
b3cce125
XC		 240 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
241 scsi_prot_sg_count(scsi_cmnd),
242 task->data_dir);
847e8355 243 }
b3cce125 244 }
d3c4dd4e 245 }
27a3f229 246
e9dc5e11 247 spin_lock(&sas_dev->lock);
27a3f229 248 list_del_init(&slot->entry);
e9dc5e11 249 spin_unlock(&sas_dev->lock);
2ba5afb6
XC		 250
251 memset(slot, 0, offsetof(struct hisi_sas_slot, buf));
252
27a3f229 253 hisi_sas_slot_index_free(hisi_hba, slot->idx);
27a3f229
JG		 254}
255EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free);
256
a2b3820b 257static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba,
66ee999b
JG		 258 struct hisi_sas_slot *slot)
259{
a2b3820b 260 hisi_hba->hw->prep_smp(hisi_hba, slot);
66ee999b
JG		 261}
262
a2b3820b 263static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba,
78bd2b4f 264 struct hisi_sas_slot *slot)
42e7a693 265{
78bd2b4f 266 hisi_hba->hw->prep_ssp(hisi_hba, slot);
42e7a693
JG		 267}
268
a2b3820b 269static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba,
6f2ff1a1
JG		 270 struct hisi_sas_slot *slot)
271{
a2b3820b 272 hisi_hba->hw->prep_stp(hisi_hba, slot);
6f2ff1a1
JG		 273}
274
a2b3820b 275static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba,
441c2740
JG		 276 struct hisi_sas_slot *slot,
277 int device_id, int abort_flag, int tag_to_abort)
278{
a2b3820b 279 hisi_hba->hw->prep_abort(hisi_hba, slot,
441c2740
JG		 280 device_id, abort_flag, tag_to_abort);
281}
282
6e1b731b
XC		 283static void hisi_sas_dma_unmap(struct hisi_hba *hisi_hba,
284 struct sas_task *task, int n_elem,
5f6c32d7 285 int n_elem_req)
6e1b731b
XC		 286{
287 struct device *dev = hisi_hba->dev;
288
289 if (!sas_protocol_ata(task->task_proto)) {
290 if (task->num_scatter) {
291 if (n_elem)
292 dma_unmap_sg(dev, task->scatter,
293 task->num_scatter,
294 task->data_dir);
295 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
296 if (n_elem_req)
297 dma_unmap_sg(dev, &task->smp_task.smp_req,
298 1, DMA_TO_DEVICE);
6e1b731b
XC		 299 }
300 }
301}
302
303static int hisi_sas_dma_map(struct hisi_hba *hisi_hba,
304 struct sas_task *task, int *n_elem,
5f6c32d7 305 int *n_elem_req)
6e1b731b
XC		 306{
307 struct device *dev = hisi_hba->dev;
308 int rc;
309
310 if (sas_protocol_ata(task->task_proto)) {
311 *n_elem = task->num_scatter;
312 } else {
5f6c32d7 313 unsigned int req_len;
6e1b731b
XC		 314
315 if (task->num_scatter) {
316 *n_elem = dma_map_sg(dev, task->scatter,
317 task->num_scatter, task->data_dir);
318 if (!*n_elem) {
319 rc = -ENOMEM;
320 goto prep_out;
321 }
322 } else if (task->task_proto & SAS_PROTOCOL_SMP) {
323 *n_elem_req = dma_map_sg(dev, &task->smp_task.smp_req,
324 1, DMA_TO_DEVICE);
325 if (!*n_elem_req) {
326 rc = -ENOMEM;
327 goto prep_out;
328 }
329 req_len = sg_dma_len(&task->smp_task.smp_req);
330 if (req_len & 0x3) {
331 rc = -EINVAL;
332 goto err_out_dma_unmap;
333 }
6e1b731b
XC		 334 }
335 }
336
337 if (*n_elem > HISI_SAS_SGE_PAGE_CNT) {
b601577d 338 dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT\n",
6e1b731b
XC		 339 *n_elem);
340 rc = -EINVAL;
341 goto err_out_dma_unmap;
342 }
343 return 0;
344
345err_out_dma_unmap:
346 /* It would be better to call dma_unmap_sg() here, but it's messy */
347 hisi_sas_dma_unmap(hisi_hba, task, *n_elem,
5f6c32d7 348 *n_elem_req);
6e1b731b
XC		 349prep_out:
350 return rc;
351}
352
b3cce125
XC		 353static void hisi_sas_dif_dma_unmap(struct hisi_hba *hisi_hba,
354 struct sas_task *task, int n_elem_dif)
355{
356 struct device *dev = hisi_hba->dev;
357
358 if (n_elem_dif) {
359 struct sas_ssp_task *ssp_task = &task->ssp_task;
360 struct scsi_cmnd *scsi_cmnd = ssp_task->cmd;
361
362 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
363 scsi_prot_sg_count(scsi_cmnd),
364 task->data_dir);
365 }
366}
367
368static int hisi_sas_dif_dma_map(struct hisi_hba *hisi_hba,
369 int *n_elem_dif, struct sas_task *task)
370{
371 struct device *dev = hisi_hba->dev;
372 struct sas_ssp_task *ssp_task;
373 struct scsi_cmnd *scsi_cmnd;
374 int rc;
375
376 if (task->num_scatter) {
377 ssp_task = &task->ssp_task;
378 scsi_cmnd = ssp_task->cmd;
379
380 if (scsi_prot_sg_count(scsi_cmnd)) {
381 *n_elem_dif = dma_map_sg(dev,
382 scsi_prot_sglist(scsi_cmnd),
383 scsi_prot_sg_count(scsi_cmnd),
384 task->data_dir);
385
386 if (!*n_elem_dif)
387 return -ENOMEM;
388
389 if (*n_elem_dif > HISI_SAS_SGE_DIF_PAGE_CNT) {
390 dev_err(dev, "task prep: n_elem_dif(%d) too large\n",
391 *n_elem_dif);
392 rc = -EINVAL;
393 goto err_out_dif_dma_unmap;
394 }
395 }
396 }
397
398 return 0;
399
400err_out_dif_dma_unmap:
401 dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd),
402 scsi_prot_sg_count(scsi_cmnd), task->data_dir);
403 return rc;
404}
405
2f6bca20
XT		 406static int hisi_sas_task_prep(struct sas_task *task,
407 struct hisi_sas_dq **dq_pointer,
78bd2b4f 408 bool is_tmf, struct hisi_sas_tmf_task *tmf,
fa222db0 409 int *pass)
42e7a693
JG		 410{
411 struct domain_device *device = task->dev;
745b6847 412 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
42e7a693
JG		 413 struct hisi_sas_device *sas_dev = device->lldd_dev;
414 struct hisi_sas_port *port;
415 struct hisi_sas_slot *slot;
416 struct hisi_sas_cmd_hdr *cmd_hdr_base;
2e244f0f 417 struct asd_sas_port *sas_port = device->port;
745b6847 418 struct device *dev = hisi_hba->dev;
7eee4b92 419 int dlvry_queue_slot, dlvry_queue, rc, slot_idx;
5f6c32d7 420 int n_elem = 0, n_elem_dif = 0, n_elem_req = 0;
8d98416a 421 struct scsi_cmnd *scmd = NULL;
2f6bca20 422 struct hisi_sas_dq *dq;
6cca51ee 423 unsigned long flags;
fa222db0 424 int wr_q_index;
42e7a693 425
42e7a693
JG		 426 if (DEV_IS_GONE(sas_dev)) {
427 if (sas_dev)
ad604832 428 dev_info(dev, "task prep: device %d not ready\n",
42e7a693
JG		 429 sas_dev->device_id);
430 else
431 dev_info(dev, "task prep: device %016llx not ready\n",
432 SAS_ADDR(device->sas_addr));
433
6bf6db51 434 return -ECOMM;
42e7a693 435 }
2e244f0f 436
8d98416a
JG		 437 if (task->uldd_task) {
438 struct ata_queued_cmd *qc;
4fefe5bb 439
8d98416a
JG		 440 if (dev_is_sata(device)) {
441 qc = task->uldd_task;
442 scmd = qc->scsicmd;
443 } else {
444 scmd = task->uldd_task;
445 }
446 }
447
69bfa5fd 448 if (scmd) {
8d98416a
JG		 449 unsigned int dq_index;
450 u32 blk_tag;
451
452 blk_tag = blk_mq_unique_tag(scmd->request);
453 dq_index = blk_mq_unique_tag_to_hwq(blk_tag);
4fefe5bb 454 *dq_pointer = dq = &hisi_hba->dq[dq_index];
69bfa5fd 455 } else {
359db633
XC		 456 struct Scsi_Host *shost = hisi_hba->shost;
457 struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
458 int queue = qmap->mq_map[raw_smp_processor_id()];
459
460 *dq_pointer = dq = &hisi_hba->dq[queue];
4fefe5bb 461 }
2f6bca20 462
2e244f0f 463 port = to_hisi_sas_port(sas_port);
9859f24e 464 if (port && !port->port_attached) {
09fe9ecb 465 dev_info(dev, "task prep: %s port%d not attach device\n",
6073b771 466 (dev_is_sata(device)) ?
09fe9ecb
JG		 467 "SATA/STP" : "SAS",
468 device->port->id);
469
6bf6db51 470 return -ECOMM;
42e7a693
JG		 471 }
472
6e1b731b 473 rc = hisi_sas_dma_map(hisi_hba, task, &n_elem,
5f6c32d7 474 &n_elem_req);
6e1b731b
XC		 475 if (rc < 0)
476 goto prep_out;
a2b3820b 477
b3cce125
XC		 478 if (!sas_protocol_ata(task->task_proto)) {
479 rc = hisi_sas_dif_dma_map(hisi_hba, &n_elem_dif, task);
480 if (rc < 0)
481 goto err_out_dma_unmap;
482 }
483
685b6d6e 484 if (hisi_hba->hw->slot_index_alloc)
784b46b7 485 rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device);
8d98416a
JG		 486 else
487 rc = hisi_sas_slot_index_alloc(hisi_hba, scmd);
784b46b7 488
784b46b7 489 if (rc < 0)
b3cce125 490 goto err_out_dif_dma_unmap;
b1a49412 491
784b46b7 492 slot_idx = rc;
3de0026d 493 slot = &hisi_hba->slot_info[slot_idx];
3de0026d 494
e9dc5e11 495 spin_lock(&dq->lock);
897cc769
JG		 496 wr_q_index = dq->wr_point;
497 dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
fa222db0 498 list_add_tail(&slot->delivery, &dq->list);
e9dc5e11
XC		 499 spin_unlock(&dq->lock);
500 spin_lock(&sas_dev->lock);
4fefe5bb 501 list_add_tail(&slot->entry, &sas_dev->list);
e9dc5e11 502 spin_unlock(&sas_dev->lock);
42e7a693 503
b1a49412 504 dlvry_queue = dq->id;
fa222db0 505 dlvry_queue_slot = wr_q_index;
42e7a693 506
4fefe5bb 507 slot->device_id = sas_dev->device_id;
42e7a693 508 slot->n_elem = n_elem;
b3cce125 509 slot->n_elem_dif = n_elem_dif;
42e7a693
JG		 510 slot->dlvry_queue = dlvry_queue;
511 slot->dlvry_queue_slot = dlvry_queue_slot;
512 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
513 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
514 slot->task = task;
515 slot->port = port;
78bd2b4f
XT		 516 slot->tmf = tmf;
517 slot->is_internal = is_tmf;
42e7a693
JG		 518 task->lldd_task = slot;
519
42e7a693 520 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
f557e32c 521 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
d380f555
XC		 522 memset(hisi_sas_status_buf_addr_mem(slot), 0,
523 sizeof(struct hisi_sas_err_record));
42e7a693
JG		 524
525 switch (task->task_proto) {
66ee999b 526 case SAS_PROTOCOL_SMP:
a2b3820b 527 hisi_sas_task_prep_smp(hisi_hba, slot);
66ee999b 528 break;
42e7a693 529 case SAS_PROTOCOL_SSP:
78bd2b4f 530 hisi_sas_task_prep_ssp(hisi_hba, slot);
42e7a693
JG		 531 break;
532 case SAS_PROTOCOL_SATA:
533 case SAS_PROTOCOL_STP:
534 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
a2b3820b 535 hisi_sas_task_prep_ata(hisi_hba, slot);
6f2ff1a1 536 break;
42e7a693
JG		 537 default:
538 dev_err(dev, "task prep: unknown/unsupported proto (0x%x)\n",
539 task->task_proto);
42e7a693
JG		 540 break;
541 }
542
54c9dd2d 543 spin_lock_irqsave(&task->task_state_lock, flags);
42e7a693 544 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
54c9dd2d 545 spin_unlock_irqrestore(&task->task_state_lock, flags);
42e7a693 546
42e7a693 547 ++(*pass);
1c09b663 548 WRITE_ONCE(slot->ready, 1);
42e7a693 549
9c9d18e7 550 return 0;
42e7a693 551
b3cce125
XC		 552err_out_dif_dma_unmap:
553 if (!sas_protocol_ata(task->task_proto))
554 hisi_sas_dif_dma_unmap(hisi_hba, task, n_elem_dif);
7eee4b92 555err_out_dma_unmap:
6e1b731b 556 hisi_sas_dma_unmap(hisi_hba, task, n_elem,
5f6c32d7 557 n_elem_req);
42e7a693 558prep_out:
7eee4b92 559 dev_err(dev, "task prep: failed[%d]!\n", rc);
42e7a693
JG		 560 return rc;
561}
562
563static int hisi_sas_task_exec(struct sas_task *task, gfp_t gfp_flags,
78bd2b4f 564 bool is_tmf, struct hisi_sas_tmf_task *tmf)
42e7a693
JG		 565{
566 u32 rc;
567 u32 pass = 0;
745b6847
XC		 568 struct hisi_hba *hisi_hba;
569 struct device *dev;
570 struct domain_device *device = task->dev;
571 struct asd_sas_port *sas_port = device->port;
2f6bca20 572 struct hisi_sas_dq *dq = NULL;
42e7a693 573
745b6847
XC		 574 if (!sas_port) {
575 struct task_status_struct *ts = &task->task_status;
576
577 ts->resp = SAS_TASK_UNDELIVERED;
578 ts->stat = SAS_PHY_DOWN;
579 /*
580 * libsas will use dev->port, should
581 * not call task_done for sata
582 */
583 if (device->dev_type != SAS_SATA_DEV)
584 task->task_done(task);
585 return -ECOMM;
586 }
587
588 hisi_hba = dev_to_hisi_hba(device);
589 dev = hisi_hba->dev;
590
214e702d 591 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) {
18577cdc 592 if (!gfpflags_allow_blocking(gfp_flags))
214e702d
XT		 593 return -EINVAL;
594
595 down(&hisi_hba->sem);
596 up(&hisi_hba->sem);
597 }
06ec0fb9 598
42e7a693 599 /* protect task_prep and start_delivery sequence */
2f6bca20 600 rc = hisi_sas_task_prep(task, &dq, is_tmf, tmf, &pass);
42e7a693
JG		 601 if (rc)
602 dev_err(dev, "task exec: failed[%d]!\n", rc);
603
2f6bca20 604 if (likely(pass)) {
e9dc5e11 605 spin_lock(&dq->lock);
b1a49412 606 hisi_hba->hw->start_delivery(dq);
e9dc5e11 607 spin_unlock(&dq->lock);
2f6bca20 608 }
42e7a693
JG		 609
610 return rc;
611}
257efd1f 612
26c7efc3
AD		 613static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no,
614 gfp_t gfp_flags)
66139921
JG		 615{
616 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
617 struct asd_sas_phy *sas_phy = &phy->sas_phy;
66139921
JG		 618
619 if (!phy->phy_attached)
620 return;
621
b14a37e0
XC		 622 if (test_bit(HISI_SAS_PM_BIT, &hisi_hba->flags) &&
623 !sas_phy->suspended) {
624 dev_warn(hisi_hba->dev, "phy%d during suspend filtered out\n", phy_no);
625 return;
626 }
627
872a90b5 628 sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags);
66139921
JG		 629
630 if (sas_phy->phy) {
631 struct sas_phy *sphy = sas_phy->phy;
632
633 sphy->negotiated_linkrate = sas_phy->linkrate;
66139921 634 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
2ae75787
XC		 635 sphy->maximum_linkrate_hw =
636 hisi_hba->hw->phy_get_max_linkrate();
637 if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN)
638 sphy->minimum_linkrate = phy->minimum_linkrate;
639
640 if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN)
641 sphy->maximum_linkrate = phy->maximum_linkrate;
66139921
JG		 642 }
643
644 if (phy->phy_type & PORT_TYPE_SAS) {
645 struct sas_identify_frame *id;
646
647 id = (struct sas_identify_frame *)phy->frame_rcvd;
648 id->dev_type = phy->identify.device_type;
649 id->initiator_bits = SAS_PROTOCOL_ALL;
650 id->target_bits = phy->identify.target_port_protocols;
651 } else if (phy->phy_type & PORT_TYPE_SATA) {
01d4e3a2 652 /* Nothing */
66139921
JG		 653 }
654
655 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
872a90b5 656 sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags);
66139921
JG		 657}
658
abda97c2
JG		 659static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device)
660{
661 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
662 struct hisi_sas_device *sas_dev = NULL;
1b865185
XC		 663 int last = hisi_hba->last_dev_id;
664 int first = (hisi_hba->last_dev_id + 1) % HISI_SAS_MAX_DEVICES;
abda97c2
JG		 665 int i;
666
e9dc5e11 667 spin_lock(&hisi_hba->lock);
1b865185 668 for (i = first; i != last; i %= HISI_SAS_MAX_DEVICES) {
abda97c2 669 if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) {
b1a49412
XC		 670 int queue = i % hisi_hba->queue_count;
671 struct hisi_sas_dq *dq = &hisi_hba->dq[queue];
672
abda97c2
JG		 673 hisi_hba->devices[i].device_id = i;
674 sas_dev = &hisi_hba->devices[i];
57dbb2b2 675 sas_dev->dev_status = HISI_SAS_DEV_INIT;
abda97c2
JG		 676 sas_dev->dev_type = device->dev_type;
677 sas_dev->hisi_hba = hisi_hba;
678 sas_dev->sas_device = device;
b1a49412 679 sas_dev->dq = dq;
4fefe5bb 680 spin_lock_init(&sas_dev->lock);
405314df 681 INIT_LIST_HEAD(&hisi_hba->devices[i].list);
abda97c2
JG		 682 break;
683 }
1b865185 684 i++;
abda97c2 685 }
1b865185 686 hisi_hba->last_dev_id = i;
e9dc5e11 687 spin_unlock(&hisi_hba->lock);
abda97c2
JG		 688
689 return sas_dev;
690}
691
b45e05aa 692#define HISI_SAS_DISK_RECOVER_CNT 3
d5a60dfd
XC		 693static int hisi_sas_init_device(struct domain_device *device)
694{
695 int rc = TMF_RESP_FUNC_COMPLETE;
696 struct scsi_lun lun;
697 struct hisi_sas_tmf_task tmf_task;
b45e05aa 698 int retry = HISI_SAS_DISK_RECOVER_CNT;
d5a60dfd 699 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
57dbb2b2
XC		 700 struct device *dev = hisi_hba->dev;
701 struct sas_phy *local_phy;
d5a60dfd
XC		 702
703 switch (device->dev_type) {
704 case SAS_END_DEVICE:
705 int_to_scsilun(0, &lun);
706
707 tmf_task.tmf = TMF_CLEAR_TASK_SET;
b45e05aa
XC		 708 while (retry-- > 0) {
709 rc = hisi_sas_debug_issue_ssp_tmf(device, lun.scsi_lun,
710 &tmf_task);
711 if (rc == TMF_RESP_FUNC_COMPLETE) {
712 hisi_sas_release_task(hisi_hba, device);
713 break;
714 }
715 }
d5a60dfd
XC		 716 break;
717 case SAS_SATA_DEV:
718 case SAS_SATA_PM:
719 case SAS_SATA_PM_PORT:
720 case SAS_SATA_PENDING:
57dbb2b2
XC		 721 /*
722 * send HARD RESET to clear previous affiliation of
723 * STP target port
724 */
725 local_phy = sas_get_local_phy(device);
a3115700
LJ		 726 if (!scsi_is_sas_phy_local(local_phy) &&
727 !test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) {
57dbb2b2
XC		 728 unsigned long deadline = ata_deadline(jiffies, 20000);
729 struct sata_device *sata_dev = &device->sata_dev;
730 struct ata_host *ata_host = sata_dev->ata_host;
731 struct ata_port_operations *ops = ata_host->ops;
732 struct ata_port *ap = sata_dev->ap;
733 struct ata_link *link;
734 unsigned int classes;
735
736 ata_for_each_link(link, ap, EDGE)
737 rc = ops->hardreset(link, &classes,
738 deadline);
739 }
740 sas_put_local_phy(local_phy);
741 if (rc) {
18a54b32 742 dev_warn(dev, "SATA disk hardreset fail: %d\n", rc);
57dbb2b2
XC		 743 return rc;
744 }
745
d5a60dfd
XC		 746 while (retry-- > 0) {
747 rc = hisi_sas_softreset_ata_disk(device);
748 if (!rc)
749 break;
750 }
751 break;
752 default:
753 break;
754 }
755
756 return rc;
757}
758
abda97c2
JG		 759static int hisi_sas_dev_found(struct domain_device *device)
760{
761 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
762 struct domain_device *parent_dev = device->parent;
763 struct hisi_sas_device *sas_dev;
11b75249 764 struct device *dev = hisi_hba->dev;
d5a60dfd 765 int rc;
abda97c2 766
685b6d6e
JG		 767 if (hisi_hba->hw->alloc_dev)
768 sas_dev = hisi_hba->hw->alloc_dev(device);
769 else
770 sas_dev = hisi_sas_alloc_dev(device);
abda97c2
JG		 771 if (!sas_dev) {
772 dev_err(dev, "fail alloc dev: max support %d devices\n",
773 HISI_SAS_MAX_DEVICES);
774 return -EINVAL;
775 }
776
777 device->lldd_dev = sas_dev;
778 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
779
924a3541 780 if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
abda97c2
JG		 781 int phy_no;
782 u8 phy_num = parent_dev->ex_dev.num_phys;
783 struct ex_phy *phy;
784
785 for (phy_no = 0; phy_no < phy_num; phy_no++) {
786 phy = &parent_dev->ex_dev.ex_phy[phy_no];
787 if (SAS_ADDR(phy->attached_sas_addr) ==
c90a0bea 788 SAS_ADDR(device->sas_addr))
abda97c2 789 break;
abda97c2
JG		 790 }
791
792 if (phy_no == phy_num) {
793 dev_info(dev, "dev found: no attached "
794 "dev:%016llx at ex:%016llx\n",
795 SAS_ADDR(device->sas_addr),
796 SAS_ADDR(parent_dev->sas_addr));
d5a60dfd
XC		 797 rc = -EINVAL;
798 goto err_out;
abda97c2
JG		 799 }
800 }
801
f1c88211
XC		 802 dev_info(dev, "dev[%d:%x] found\n",
803 sas_dev->device_id, sas_dev->dev_type);
804
d5a60dfd
XC		 805 rc = hisi_sas_init_device(device);
806 if (rc)
807 goto err_out;
57dbb2b2 808 sas_dev->dev_status = HISI_SAS_DEV_NORMAL;
abda97c2 809 return 0;
d5a60dfd
XC		 810
811err_out:
812 hisi_sas_dev_gone(device);
813 return rc;
abda97c2
JG		 814}
815
235bfc7f 816int hisi_sas_slave_configure(struct scsi_device *sdev)
31eec8a6
JG		 817{
818 struct domain_device *dev = sdev_to_domain_dev(sdev);
819 int ret = sas_slave_configure(sdev);
820
821 if (ret)
822 return ret;
823 if (!dev_is_sata(dev))
824 sas_change_queue_depth(sdev, 64);
825
826 return 0;
827}
235bfc7f 828EXPORT_SYMBOL_GPL(hisi_sas_slave_configure);
31eec8a6 829
235bfc7f 830void hisi_sas_scan_start(struct Scsi_Host *shost)
701f75ec
JG		 831{
832 struct hisi_hba *hisi_hba = shost_priv(shost);
701f75ec 833
396b8044 834 hisi_hba->hw->phys_init(hisi_hba);
701f75ec 835}
235bfc7f 836EXPORT_SYMBOL_GPL(hisi_sas_scan_start);
701f75ec 837
235bfc7f 838int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time)
701f75ec
JG		 839{
840 struct hisi_hba *hisi_hba = shost_priv(shost);
841 struct sas_ha_struct *sha = &hisi_hba->sha;
842
396b8044
JG		 843 /* Wait for PHY up interrupt to occur */
844 if (time < HZ)
701f75ec
JG		 845 return 0;
846
847 sas_drain_work(sha);
848 return 1;
849}
235bfc7f 850EXPORT_SYMBOL_GPL(hisi_sas_scan_finished);
701f75ec 851
66139921
JG		 852static void hisi_sas_phyup_work(struct work_struct *work)
853{
854 struct hisi_sas_phy *phy =
e537b62b 855 container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP]);
66139921
JG		 856 struct hisi_hba *hisi_hba = phy->hisi_hba;
857 struct asd_sas_phy *sas_phy = &phy->sas_phy;
858 int phy_no = sas_phy->id;
859
569eddcf
XC		 860 if (phy->identify.target_port_protocols == SAS_PROTOCOL_SSP)
861 hisi_hba->hw->sl_notify_ssp(hisi_hba, phy_no);
26c7efc3 862 hisi_sas_bytes_dmaed(hisi_hba, phy_no, GFP_KERNEL);
66139921 863}
976867e6 864
057c3d1f
XT		 865static void hisi_sas_linkreset_work(struct work_struct *work)
866{
867 struct hisi_sas_phy *phy =
868 container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]);
869 struct asd_sas_phy *sas_phy = &phy->sas_phy;
870
871 hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL);
872}
873
e537b62b
XT		 874static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = {
875 [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work,
057c3d1f 876 [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work,
e537b62b
XT		 877};
878
879bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy,
880 enum hisi_sas_phy_event event)
881{
882 struct hisi_hba *hisi_hba = phy->hisi_hba;
883
884 if (WARN_ON(event >= HISI_PHYES_NUM))
885 return false;
886
887 return queue_work(hisi_hba->wq, &phy->works[event]);
888}
889EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event);
890
b6c9b15e
XT		 891static void hisi_sas_wait_phyup_timedout(struct timer_list *t)
892{
893 struct hisi_sas_phy *phy = from_timer(phy, t, timer);
894 struct hisi_hba *hisi_hba = phy->hisi_hba;
895 struct device *dev = hisi_hba->dev;
896 int phy_no = phy->sas_phy.id;
897
898 dev_warn(dev, "phy%d wait phyup timeout, issuing link reset\n", phy_no);
899 hisi_sas_notify_phy_event(phy, HISI_PHYE_LINK_RESET);
900}
901
902void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no)
903{
904 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
905 struct device *dev = hisi_hba->dev;
906
e16b9ed6
LJ		 907 dev_dbg(dev, "phy%d OOB ready\n", phy_no);
908 if (phy->phy_attached)
909 return;
910
b6c9b15e 911 if (!timer_pending(&phy->timer)) {
b6c9b15e
XT		 912 phy->timer.expires = jiffies + HISI_SAS_WAIT_PHYUP_TIMEOUT * HZ;
913 add_timer(&phy->timer);
914 }
915}
916EXPORT_SYMBOL_GPL(hisi_sas_phy_oob_ready);
917
976867e6
JG		 918static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no)
919{
920 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
921 struct asd_sas_phy *sas_phy = &phy->sas_phy;
e537b62b 922 int i;
976867e6
JG		 923
924 phy->hisi_hba = hisi_hba;
925 phy->port = NULL;
eba8c20c
XT		 926 phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS;
927 phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate();
976867e6
JG		 928 sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0;
929 sas_phy->class = SAS;
930 sas_phy->iproto = SAS_PROTOCOL_ALL;
931 sas_phy->tproto = 0;
932 sas_phy->type = PHY_TYPE_PHYSICAL;
933 sas_phy->role = PHY_ROLE_INITIATOR;
934 sas_phy->oob_mode = OOB_NOT_CONNECTED;
935 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
936 sas_phy->id = phy_no;
937 sas_phy->sas_addr = &hisi_hba->sas_addr[0];
938 sas_phy->frame_rcvd = &phy->frame_rcvd[0];
939 sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata;
940 sas_phy->lldd_phy = phy;
66139921 941
e537b62b
XT		 942 for (i = 0; i < HISI_PHYES_NUM; i++)
943 INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]);
ce70c2e6
JG		 944
945 spin_lock_init(&phy->lock);
b6c9b15e
XT		 946
947 timer_setup(&phy->timer, hisi_sas_wait_phyup_timedout, 0);
976867e6
JG		 948}
949
c63b88cc
JG		 950/* Wrapper to ensure we track hisi_sas_phy.enable properly */
951void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, int enable)
952{
953 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
954 struct asd_sas_phy *aphy = &phy->sas_phy;
955 struct sas_phy *sphy = aphy->phy;
956 unsigned long flags;
957
958 spin_lock_irqsave(&phy->lock, flags);
959
960 if (enable) {
961 /* We may have been enabled already; if so, don't touch */
962 if (!phy->enable)
963 sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
964 hisi_hba->hw->phy_start(hisi_hba, phy_no);
965 } else {
966 sphy->negotiated_linkrate = SAS_PHY_DISABLED;
967 hisi_hba->hw->phy_disable(hisi_hba, phy_no);
968 }
969 phy->enable = enable;
970 spin_unlock_irqrestore(&phy->lock, flags);
971}
972EXPORT_SYMBOL_GPL(hisi_sas_phy_enable);
973
184a4635
JG		 974static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy)
975{
976 struct sas_ha_struct *sas_ha = sas_phy->ha;
977 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
978 struct hisi_sas_phy *phy = sas_phy->lldd_phy;
979 struct asd_sas_port *sas_port = sas_phy->port;
8c39673d 980 struct hisi_sas_port *port;
184a4635
JG		 981 unsigned long flags;
982
983 if (!sas_port)
984 return;
985
8c39673d 986 port = to_hisi_sas_port(sas_port);
184a4635
JG		 987 spin_lock_irqsave(&hisi_hba->lock, flags);
988 port->port_attached = 1;
989 port->id = phy->port_id;
990 phy->port = port;
991 sas_port->lldd_port = port;
992 spin_unlock_irqrestore(&hisi_hba->lock, flags);
993}
994
d3c4dd4e 995static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task,
405314df 996 struct hisi_sas_slot *slot)
184a4635 997{
d3c4dd4e
JG		 998 if (task) {
999 unsigned long flags;
1000 struct task_status_struct *ts;
184a4635 1001
d3c4dd4e 1002 ts = &task->task_status;
184a4635 1003
d3c4dd4e
JG		 1004 ts->resp = SAS_TASK_COMPLETE;
1005 ts->stat = SAS_ABORTED_TASK;
1006 spin_lock_irqsave(&task->task_state_lock, flags);
1007 task->task_state_flags &=
1008 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR);
47905957
XC		 1009 if (!slot->is_internal && task->task_proto != SAS_PROTOCOL_SMP)
1010 task->task_state_flags |= SAS_TASK_STATE_DONE;
d3c4dd4e
JG		 1011 spin_unlock_irqrestore(&task->task_state_lock, flags);
1012 }
184a4635 1013
405314df 1014 hisi_sas_slot_task_free(hisi_hba, task, slot);
184a4635
JG		 1015}
1016
1017static void hisi_sas_release_task(struct hisi_hba *hisi_hba,
1018 struct domain_device *device)
1019{
405314df
JG		 1020 struct hisi_sas_slot *slot, *slot2;
1021 struct hisi_sas_device *sas_dev = device->lldd_dev;
184a4635 1022
405314df
JG		 1023 list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry)
1024 hisi_sas_do_release_task(hisi_hba, slot->task, slot);
184a4635
JG		 1025}
1026
4d0951ee 1027void hisi_sas_release_tasks(struct hisi_hba *hisi_hba)
06ec0fb9 1028{
405314df
JG		 1029 struct hisi_sas_device *sas_dev;
1030 struct domain_device *device;
06ec0fb9
XC		 1031 int i;
1032
405314df
JG		 1033 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1034 sas_dev = &hisi_hba->devices[i];
1035 device = sas_dev->sas_device;
06ec0fb9 1036
405314df
JG		 1037 if ((sas_dev->dev_type == SAS_PHY_UNUSED) ||
1038 !device)
06ec0fb9 1039 continue;
405314df
JG		 1040
1041 hisi_sas_release_task(hisi_hba, device);
06ec0fb9
XC		 1042 }
1043}
4d0951ee 1044EXPORT_SYMBOL_GPL(hisi_sas_release_tasks);
06ec0fb9 1045
d30ff263
XC		 1046static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba,
1047 struct domain_device *device)
1048{
1049 if (hisi_hba->hw->dereg_device)
1050 hisi_hba->hw->dereg_device(hisi_hba, device);
1051}
1052
abda97c2
JG		 1053static void hisi_sas_dev_gone(struct domain_device *device)
1054{
1055 struct hisi_sas_device *sas_dev = device->lldd_dev;
1056 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1057 struct device *dev = hisi_hba->dev;
8fa9a7bd 1058 int ret = 0;
abda97c2 1059
f1c88211 1060 dev_info(dev, "dev[%d:%x] is gone\n",
abda97c2
JG		 1061 sas_dev->device_id, sas_dev->dev_type);
1062
e74006ed 1063 down(&hisi_hba->sem);
f8e45ec2
XC		 1064 if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) {
1065 hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3 1066 HISI_SAS_INT_ABT_DEV, 0);
40f2702b 1067
f8e45ec2
XC		 1068 hisi_sas_dereg_device(hisi_hba, device);
1069
8fa9a7bd 1070 ret = hisi_hba->hw->clear_itct(hisi_hba, sas_dev);
f8e45ec2 1071 device->lldd_dev = NULL;
f8e45ec2 1072 }
d30ff263 1073
0258141a
XT		 1074 if (hisi_hba->hw->free_device)
1075 hisi_hba->hw->free_device(sas_dev);
8fa9a7bd
XC		 1076
1077 /* Don't mark it as SAS_PHY_UNUSED if failed to clear ITCT */
1078 if (!ret)
1079 sas_dev->dev_type = SAS_PHY_UNUSED;
e74006ed
XC		 1080 sas_dev->sas_device = NULL;
1081 up(&hisi_hba->sem);
abda97c2 1082}
42e7a693
JG		 1083
1084static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags)
1085{
1086 return hisi_sas_task_exec(task, gfp_flags, 0, NULL);
1087}
1088
eb44e4d7 1089static int hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no,
757db2da
JG		 1090 struct sas_phy_linkrates *r)
1091{
1092 struct sas_phy_linkrates _r;
1093
1094 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1095 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1096 enum sas_linkrate min, max;
1097
eb44e4d7
LJ		 1098 if (r->minimum_linkrate > SAS_LINK_RATE_1_5_GBPS)
1099 return -EINVAL;
1100
757db2da
JG		 1101 if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) {
1102 max = sas_phy->phy->maximum_linkrate;
1103 min = r->minimum_linkrate;
1104 } else if (r->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) {
1105 max = r->maximum_linkrate;
1106 min = sas_phy->phy->minimum_linkrate;
1107 } else
eb44e4d7 1108 return -EINVAL;
757db2da
JG		 1109
1110 _r.maximum_linkrate = max;
1111 _r.minimum_linkrate = min;
1112
5a54691f
LJ		 1113 sas_phy->phy->maximum_linkrate = max;
1114 sas_phy->phy->minimum_linkrate = min;
1115
c63b88cc 1116 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
757db2da
JG		 1117 msleep(100);
1118 hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r);
c63b88cc 1119 hisi_sas_phy_enable(hisi_hba, phy_no, 1);
eb44e4d7
LJ		 1120
1121 return 0;
757db2da
JG		 1122}
1123
e4189d53
JG		 1124static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func,
1125 void *funcdata)
1126{
1127 struct sas_ha_struct *sas_ha = sas_phy->ha;
1128 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
1129 int phy_no = sas_phy->id;
1130
1131 switch (func) {
1132 case PHY_FUNC_HARD_RESET:
1133 hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no);
1134 break;
1135
1136 case PHY_FUNC_LINK_RESET:
c63b88cc 1137 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
b4c67a6c 1138 msleep(100);
c63b88cc 1139 hisi_sas_phy_enable(hisi_hba, phy_no, 1);
e4189d53
JG		 1140 break;
1141
1142 case PHY_FUNC_DISABLE:
c63b88cc 1143 hisi_sas_phy_enable(hisi_hba, phy_no, 0);
e4189d53
JG		 1144 break;
1145
1146 case PHY_FUNC_SET_LINK_RATE:
eb44e4d7 1147 return hisi_sas_phy_set_linkrate(hisi_hba, phy_no, funcdata);
c52108c6
XT		 1148 case PHY_FUNC_GET_EVENTS:
1149 if (hisi_hba->hw->get_events) {
1150 hisi_hba->hw->get_events(hisi_hba, phy_no);
1151 break;
1152 }
df561f66 1153 fallthrough;
e4189d53
JG		 1154 case PHY_FUNC_RELEASE_SPINUP_HOLD:
1155 default:
1156 return -EOPNOTSUPP;
1157 }
1158 return 0;
1159}
184a4635 1160
0efff300
JG		 1161static void hisi_sas_task_done(struct sas_task *task)
1162{
584f53fe 1163 del_timer(&task->slow_task->timer);
0efff300
JG		 1164 complete(&task->slow_task->completion);
1165}
1166
77570eed 1167static void hisi_sas_tmf_timedout(struct timer_list *t)
0efff300 1168{
77570eed
KC		 1169 struct sas_task_slow *slow = from_timer(slow, t, timer);
1170 struct sas_task *task = slow->task;
f64a6988 1171 unsigned long flags;
584f53fe 1172 bool is_completed = true;
f64a6988
XC		 1173
1174 spin_lock_irqsave(&task->task_state_lock, flags);
584f53fe 1175 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
f64a6988 1176 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
584f53fe
XC		 1177 is_completed = false;
1178 }
f64a6988 1179 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300 1180
584f53fe
XC		 1181 if (!is_completed)
1182 complete(&task->slow_task->completion);
0efff300
JG		 1183}
1184
1185#define TASK_TIMEOUT 20
1186#define TASK_RETRY 3
bb9abc4a 1187#define INTERNAL_ABORT_TIMEOUT 6
0efff300
JG		 1188static int hisi_sas_exec_internal_tmf_task(struct domain_device *device,
1189 void *parameter, u32 para_len,
1190 struct hisi_sas_tmf_task *tmf)
1191{
1192 struct hisi_sas_device *sas_dev = device->lldd_dev;
1193 struct hisi_hba *hisi_hba = sas_dev->hisi_hba;
11b75249 1194 struct device *dev = hisi_hba->dev;
0efff300
JG		 1195 struct sas_task *task;
1196 int res, retry;
1197
1198 for (retry = 0; retry < TASK_RETRY; retry++) {
1199 task = sas_alloc_slow_task(GFP_KERNEL);
1200 if (!task)
1201 return -ENOMEM;
1202
1203 task->dev = device;
1204 task->task_proto = device->tproto;
1205
7c594f04
XC		 1206 if (dev_is_sata(device)) {
1207 task->ata_task.device_control_reg_update = 1;
1208 memcpy(&task->ata_task.fis, parameter, para_len);
1209 } else {
1210 memcpy(&task->ssp_task, parameter, para_len);
1211 }
0efff300
JG		 1212 task->task_done = hisi_sas_task_done;
1213
841b86f3 1214 task->slow_task->timer.function = hisi_sas_tmf_timedout;
4a8bec88 1215 task->slow_task->timer.expires = jiffies + TASK_TIMEOUT * HZ;
0efff300
JG		 1216 add_timer(&task->slow_task->timer);
1217
1218 res = hisi_sas_task_exec(task, GFP_KERNEL, 1, tmf);
1219
1220 if (res) {
1221 del_timer(&task->slow_task->timer);
1222 dev_err(dev, "abort tmf: executing internal task failed: %d\n",
1223 res);
1224 goto ex_err;
1225 }
1226
1227 wait_for_completion(&task->slow_task->completion);
1228 res = TMF_RESP_FUNC_FAILED;
1229 /* Even TMF timed out, return direct. */
1230 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
1231 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
d3c4dd4e
JG		 1232 struct hisi_sas_slot *slot = task->lldd_task;
1233
f1c88211 1234 dev_err(dev, "abort tmf: TMF task timeout and not done\n");
584f53fe 1235 if (slot) {
f4445bb9
GS		 1236 struct hisi_sas_cq *cq =
1237 &hisi_hba->cq[slot->dlvry_queue];
584f53fe 1238 /*
81f338e9 1239 * sync irq to avoid free'ing task
584f53fe
XC		 1240 * before using task in IO completion
1241 */
81f338e9 1242 synchronize_irq(cq->irq_no);
d3c4dd4e 1243 slot->task = NULL;
584f53fe 1244 }
d3c4dd4e 1245
0efff300 1246 goto ex_err;
f1c88211
XC		 1247 } else
1248 dev_err(dev, "abort tmf: TMF task timeout\n");
0efff300
JG		 1249 }
1250
1251 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1af1b808 1252 task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
0efff300
JG		 1253 res = TMF_RESP_FUNC_COMPLETE;
1254 break;
1255 }
1256
4ffde482
JG		 1257 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1258 task->task_status.stat == TMF_RESP_FUNC_SUCC) {
1259 res = TMF_RESP_FUNC_SUCC;
1260 break;
1261 }
1262
0efff300
JG		 1263 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1264 task->task_status.stat == SAS_DATA_UNDERRUN) {
1265 /* no error, but return the number of bytes of
1266 * underrun
1267 */
246ea3c0 1268 dev_warn(dev, "abort tmf: task to dev %016llx resp: 0x%x sts 0x%x underrun\n",
0efff300
JG		 1269 SAS_ADDR(device->sas_addr),
1270 task->task_status.resp,
1271 task->task_status.stat);
1272 res = task->task_status.residual;
1273 break;
1274 }
1275
1276 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1277 task->task_status.stat == SAS_DATA_OVERRUN) {
1278 dev_warn(dev, "abort tmf: blocked task error\n");
1279 res = -EMSGSIZE;
1280 break;
1281 }
1282
246ea3c0
LJ		 1283 if (task->task_status.resp == SAS_TASK_COMPLETE &&
1284 task->task_status.stat == SAS_OPEN_REJECT) {
1285 dev_warn(dev, "abort tmf: open reject failed\n");
1286 res = -EIO;
1287 } else {
1288 dev_warn(dev, "abort tmf: task to dev %016llx resp: 0x%x status 0x%x\n",
1289 SAS_ADDR(device->sas_addr),
1290 task->task_status.resp,
1291 task->task_status.stat);
1292 }
0efff300
JG		 1293 sas_free_task(task);
1294 task = NULL;
1295 }
1296ex_err:
d2d7e7a0
XC		 1297 if (retry == TASK_RETRY)
1298 dev_warn(dev, "abort tmf: executing internal task failed!\n");
0efff300
JG		 1299 sas_free_task(task);
1300 return res;
1301}
1302
7c594f04
XC		 1303static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev,
1304 bool reset, int pmp, u8 *fis)
1305{
1306 struct ata_taskfile tf;
1307
1308 ata_tf_init(dev, &tf);
1309 if (reset)
1310 tf.ctl |= ATA_SRST;
1311 else
1312 tf.ctl &= ~ATA_SRST;
1313 tf.command = ATA_CMD_DEV_RESET;
1314 ata_tf_to_fis(&tf, pmp, 0, fis);
1315}
1316
1317static int hisi_sas_softreset_ata_disk(struct domain_device *device)
1318{
1319 u8 fis[20] = {0};
1320 struct ata_port *ap = device->sata_dev.ap;
1321 struct ata_link *link;
1322 int rc = TMF_RESP_FUNC_FAILED;
1323 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1324 struct device *dev = hisi_hba->dev;
7c594f04 1325 int s = sizeof(struct host_to_dev_fis);
7c594f04
XC		 1326
1327 ata_for_each_link(link, ap, EDGE) {
1328 int pmp = sata_srst_pmp(link);
1329
1330 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
1331 rc = hisi_sas_exec_internal_tmf_task(device, fis, s, NULL);
1332 if (rc != TMF_RESP_FUNC_COMPLETE)
1333 break;
1334 }
1335
1336 if (rc == TMF_RESP_FUNC_COMPLETE) {
1337 ata_for_each_link(link, ap, EDGE) {
1338 int pmp = sata_srst_pmp(link);
1339
1340 hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis);
1341 rc = hisi_sas_exec_internal_tmf_task(device, fis,
1342 s, NULL);
1343 if (rc != TMF_RESP_FUNC_COMPLETE)
1344 dev_err(dev, "ata disk de-reset failed\n");
1345 }
1346 } else {
1347 dev_err(dev, "ata disk reset failed\n");
1348 }
1349
e85d93b2 1350 if (rc == TMF_RESP_FUNC_COMPLETE)
7c594f04 1351 hisi_sas_release_task(hisi_hba, device);
7c594f04
XC		 1352
1353 return rc;
1354}
1355
0efff300
JG		 1356static int hisi_sas_debug_issue_ssp_tmf(struct domain_device *device,
1357 u8 *lun, struct hisi_sas_tmf_task *tmf)
1358{
1359 struct sas_ssp_task ssp_task;
1360
1361 if (!(device->tproto & SAS_PROTOCOL_SSP))
1362 return TMF_RESP_FUNC_ESUPP;
1363
1364 memcpy(ssp_task.LUN, lun, 8);
1365
1366 return hisi_sas_exec_internal_tmf_task(device, &ssp_task,
1367 sizeof(ssp_task), tmf);
1368}
1369
a669bdbf 1370static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba)
917d3bda 1371{
a669bdbf 1372 u32 state = hisi_hba->hw->get_phys_state(hisi_hba);
917d3bda
XT		 1373 int i;
1374
1375 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
a669bdbf
XT		 1376 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1377 struct domain_device *device = sas_dev->sas_device;
1378 struct asd_sas_port *sas_port;
1379 struct hisi_sas_port *port;
1380 struct hisi_sas_phy *phy = NULL;
1381 struct asd_sas_phy *sas_phy;
1382
917d3bda 1383 if ((sas_dev->dev_type == SAS_PHY_UNUSED)
a669bdbf 1384 || !device || !device->port)
917d3bda
XT		 1385 continue;
1386
a669bdbf
XT		 1387 sas_port = device->port;
1388 port = to_hisi_sas_port(sas_port);
1389
1390 list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el)
1391 if (state & BIT(sas_phy->id)) {
1392 phy = sas_phy->lldd_phy;
1393 break;
1394 }
1395
1396 if (phy) {
1397 port->id = phy->port_id;
917d3bda 1398
a669bdbf
XT		 1399 /* Update linkrate of directly attached device. */
1400 if (!device->parent)
1401 device->linkrate = phy->sas_phy.linkrate;
917d3bda 1402
a669bdbf
XT		 1403 hisi_hba->hw->setup_itct(hisi_hba, sas_dev);
1404 } else
1405 port->id = 0xff;
917d3bda
XT		 1406 }
1407}
1408
4bc05809 1409static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state)
917d3bda 1410{
917d3bda
XT		 1411 struct asd_sas_port *_sas_port = NULL;
1412 int phy_no;
1413
1414 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) {
1415 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
1416 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1417 struct asd_sas_port *sas_port = sas_phy->port;
964231aa 1418 bool do_port_check = _sas_port != sas_port;
917d3bda
XT		 1419
1420 if (!sas_phy->phy->enabled)
1421 continue;
1422
1423 /* Report PHY state change to libsas */
a669bdbf
XT		 1424 if (state & BIT(phy_no)) {
1425 if (do_port_check && sas_port && sas_port->port_dev) {
917d3bda
XT		 1426 struct domain_device *dev = sas_port->port_dev;
1427
1428 _sas_port = sas_port;
917d3bda 1429
924a3541 1430 if (dev_is_expander(dev->dev_type))
872a90b5 1431 sas_notify_port_event(sas_phy,
26c7efc3
AD		 1432 PORTE_BROADCAST_RCVD,
1433 GFP_KERNEL);
917d3bda 1434 }
447f78c0 1435 } else {
26c7efc3 1436 hisi_sas_phy_down(hisi_hba, phy_no, 0, GFP_KERNEL);
447f78c0 1437 }
917d3bda 1438 }
917d3bda
XT		 1439}
1440
6175abde
XT		 1441static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba)
1442{
1443 struct hisi_sas_device *sas_dev;
1444 struct domain_device *device;
1445 int i;
1446
1447 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1448 sas_dev = &hisi_hba->devices[i];
1449 device = sas_dev->sas_device;
1450
1451 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
1452 continue;
1453
1454 hisi_sas_init_device(device);
1455 }
1456}
1457
31709548
XT		 1458static void hisi_sas_send_ata_reset_each_phy(struct hisi_hba *hisi_hba,
1459 struct asd_sas_port *sas_port,
1460 struct domain_device *device)
1461{
1462 struct hisi_sas_tmf_task tmf_task = { .force_phy = 1 };
1463 struct ata_port *ap = device->sata_dev.ap;
1464 struct device *dev = hisi_hba->dev;
1465 int s = sizeof(struct host_to_dev_fis);
1466 int rc = TMF_RESP_FUNC_FAILED;
1467 struct asd_sas_phy *sas_phy;
1468 struct ata_link *link;
1469 u8 fis[20] = {0};
1470 u32 state;
1471
1472 state = hisi_hba->hw->get_phys_state(hisi_hba);
1473 list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el) {
1474 if (!(state & BIT(sas_phy->id)))
1475 continue;
1476
1477 ata_for_each_link(link, ap, EDGE) {
1478 int pmp = sata_srst_pmp(link);
1479
1480 tmf_task.phy_id = sas_phy->id;
1481 hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis);
1482 rc = hisi_sas_exec_internal_tmf_task(device, fis, s,
1483 &tmf_task);
1484 if (rc != TMF_RESP_FUNC_COMPLETE) {
1485 dev_err(dev, "phy%d ata reset failed rc=%d\n",
1486 sas_phy->id, rc);
1487 break;
1488 }
1489 }
1490 }
1491}
1492
1493static void hisi_sas_terminate_stp_reject(struct hisi_hba *hisi_hba)
1494{
1495 struct device *dev = hisi_hba->dev;
1496 int port_no, rc, i;
1497
1498 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1499 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1500 struct domain_device *device = sas_dev->sas_device;
1501
1502 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device)
1503 continue;
1504
1505 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1506 HISI_SAS_INT_ABT_DEV, 0);
1507 if (rc < 0)
1508 dev_err(dev, "STP reject: abort dev failed %d\n", rc);
1509 }
1510
1511 for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) {
1512 struct hisi_sas_port *port = &hisi_hba->port[port_no];
1513 struct asd_sas_port *sas_port = &port->sas_port;
1514 struct domain_device *port_dev = sas_port->port_dev;
1515 struct domain_device *device;
1516
924a3541 1517 if (!port_dev || !dev_is_expander(port_dev->dev_type))
31709548
XT		 1518 continue;
1519
1520 /* Try to find a SATA device */
1521 list_for_each_entry(device, &sas_port->dev_list,
1522 dev_list_node) {
1523 if (dev_is_sata(device)) {
1524 hisi_sas_send_ata_reset_each_phy(hisi_hba,
1525 sas_port,
1526 device);
1527 break;
1528 }
1529 }
1530 }
1531}
1532
4522204a 1533void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba)
06ec0fb9 1534{
917d3bda 1535 struct Scsi_Host *shost = hisi_hba->shost;
06ec0fb9 1536
d2fc401e 1537 down(&hisi_hba->sem);
4522204a 1538 hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba);
06ec0fb9 1539
917d3bda 1540 scsi_block_requests(shost);
a865ae14
XT		 1541 hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000);
1542
6f7c32d6
JG		 1543 if (timer_pending(&hisi_hba->timer))
1544 del_timer_sync(&hisi_hba->timer);
1545
917d3bda 1546 set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
4522204a
XT		 1547}
1548EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_prepare);
1549
1550void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba)
1551{
1552 struct Scsi_Host *shost = hisi_hba->shost;
917d3bda 1553
917d3bda
XT		 1554 /* Init and wait for PHYs to come up and all libsas event finished. */
1555 hisi_hba->hw->phys_init(hisi_hba);
1556 msleep(1000);
a669bdbf 1557 hisi_sas_refresh_port_id(hisi_hba);
214e702d 1558 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
31709548
XT		 1559
1560 if (hisi_hba->reject_stp_links_msk)
1561 hisi_sas_terminate_stp_reject(hisi_hba);
6175abde 1562 hisi_sas_reset_init_all_devices(hisi_hba);
e74006ed 1563 up(&hisi_hba->sem);
fb51e7a8 1564 scsi_unblock_requests(shost);
214e702d 1565 clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
917d3bda 1566
69f4ec1e 1567 hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state);
4522204a
XT		 1568}
1569EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_done);
1570
2c74cb1f 1571static int hisi_sas_controller_prereset(struct hisi_hba *hisi_hba)
4522204a 1572{
4522204a
XT		 1573 if (!hisi_hba->hw->soft_reset)
1574 return -1;
1575
1576 if (test_and_set_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags))
1577 return -1;
1578
2c74cb1f
JX		 1579 if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct[0].itct)
1580 hisi_hba->hw->debugfs_snapshot_regs(hisi_hba);
1581
1582 return 0;
1583}
1584
1585static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba)
1586{
1587 struct device *dev = hisi_hba->dev;
1588 struct Scsi_Host *shost = hisi_hba->shost;
1589 int rc;
1590
4522204a
XT		 1591 dev_info(dev, "controller resetting...\n");
1592 hisi_sas_controller_reset_prepare(hisi_hba);
1593
1594 rc = hisi_hba->hw->soft_reset(hisi_hba);
1595 if (rc) {
1596 dev_warn(dev, "controller reset failed (%d)\n", rc);
1597 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags);
1598 up(&hisi_hba->sem);
1599 scsi_unblock_requests(shost);
1600 clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
1601 return rc;
1602 }
1603
1604 hisi_sas_controller_reset_done(hisi_hba);
fb51e7a8 1605 dev_info(dev, "controller reset complete\n");
06ec0fb9 1606
214e702d 1607 return 0;
06ec0fb9
XC		 1608}
1609
0efff300
JG		 1610static int hisi_sas_abort_task(struct sas_task *task)
1611{
1612 struct scsi_lun lun;
1613 struct hisi_sas_tmf_task tmf_task;
1614 struct domain_device *device = task->dev;
1615 struct hisi_sas_device *sas_dev = device->lldd_dev;
c6ef8954
XC		 1616 struct hisi_hba *hisi_hba;
1617 struct device *dev;
0efff300
JG		 1618 int rc = TMF_RESP_FUNC_FAILED;
1619 unsigned long flags;
1620
c6ef8954 1621 if (!sas_dev)
0efff300 1622 return TMF_RESP_FUNC_FAILED;
c6ef8954
XC		 1623
1624 hisi_hba = dev_to_hisi_hba(task->dev);
1625 dev = hisi_hba->dev;
0efff300 1626
b81b6cce 1627 spin_lock_irqsave(&task->task_state_lock, flags);
0efff300 1628 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
584f53fe
XC		 1629 struct hisi_sas_slot *slot = task->lldd_task;
1630 struct hisi_sas_cq *cq;
1631
1632 if (slot) {
1633 /*
81f338e9 1634 * sync irq to avoid free'ing task
584f53fe
XC		 1635 * before using task in IO completion
1636 */
1637 cq = &hisi_hba->cq[slot->dlvry_queue];
81f338e9 1638 synchronize_irq(cq->irq_no);
584f53fe 1639 }
b81b6cce 1640 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300
JG		 1641 rc = TMF_RESP_FUNC_COMPLETE;
1642 goto out;
1643 }
b81b6cce
XC		 1644 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1645 spin_unlock_irqrestore(&task->task_state_lock, flags);
0efff300 1646
0efff300
JG		 1647 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1648 struct scsi_cmnd *cmnd = task->uldd_task;
1649 struct hisi_sas_slot *slot = task->lldd_task;
735bcc77 1650 u16 tag = slot->idx;
c35279f2 1651 int rc2;
0efff300
JG		 1652
1653 int_to_scsilun(cmnd->device->lun, &lun);
1654 tmf_task.tmf = TMF_ABORT_TASK;
735bcc77 1655 tmf_task.tag_of_task_to_be_managed = tag;
0efff300
JG		 1656
1657 rc = hisi_sas_debug_issue_ssp_tmf(task->dev, lun.scsi_lun,
1658 &tmf_task);
1659
c35279f2
JG		 1660 rc2 = hisi_sas_internal_task_abort(hisi_hba, device,
1661 HISI_SAS_INT_ABT_CMD, tag);
813709f2
XT		 1662 if (rc2 < 0) {
1663 dev_err(dev, "abort task: internal abort (%d)\n", rc2);
1664 return TMF_RESP_FUNC_FAILED;
1665 }
1666
c35279f2
JG		 1667 /*
1668 * If the TMF finds that the IO is not in the device and also
1669 * the internal abort does not succeed, then it is safe to
1670 * free the slot.
1671 * Note: if the internal abort succeeds then the slot
1672 * will have already been completed
1673 */
1674 if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) {
e85d93b2 1675 if (task->lldd_task)
c35279f2 1676 hisi_sas_do_release_task(hisi_hba, task, slot);
0efff300 1677 }
0efff300
JG		 1678 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1679 task->task_proto & SAS_PROTOCOL_STP) {
1680 if (task->dev->dev_type == SAS_SATA_DEV) {
813709f2 1681 rc = hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3
JG		 1682 HISI_SAS_INT_ABT_DEV,
1683 0);
813709f2
XT		 1684 if (rc < 0) {
1685 dev_err(dev, "abort task: internal abort failed\n");
1686 goto out;
1687 }
d30ff263 1688 hisi_sas_dereg_device(hisi_hba, device);
7c594f04 1689 rc = hisi_sas_softreset_ata_disk(device);
0efff300 1690 }
eb045e04 1691 } else if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SMP) {
dc8a49ca
JG		 1692 /* SMP */
1693 struct hisi_sas_slot *slot = task->lldd_task;
1694 u32 tag = slot->idx;
584f53fe 1695 struct hisi_sas_cq *cq = &hisi_hba->cq[slot->dlvry_queue];
0efff300 1696
ccbfe5a0 1697 rc = hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3 1698 HISI_SAS_INT_ABT_CMD, tag);
813709f2 1699 if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) &&
584f53fe
XC		 1700 task->lldd_task) {
1701 /*
81f338e9 1702 * sync irq to avoid free'ing task
584f53fe
XC		 1703 * before using task in IO completion
1704 */
81f338e9 1705 synchronize_irq(cq->irq_no);
584f53fe
XC		 1706 slot->task = NULL;
1707 }
0efff300
JG		 1708 }
1709
1710out:
1711 if (rc != TMF_RESP_FUNC_COMPLETE)
1712 dev_notice(dev, "abort task: rc=%d\n", rc);
1713 return rc;
1714}
1715
1716static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun)
1717{
2a038131
XT		 1718 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1719 struct device *dev = hisi_hba->dev;
0efff300 1720 struct hisi_sas_tmf_task tmf_task;
01d4e3a2 1721 int rc;
2a038131
XT		 1722
1723 rc = hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3 1724 HISI_SAS_INT_ABT_DEV, 0);
2a038131
XT		 1725 if (rc < 0) {
1726 dev_err(dev, "abort task set: internal abort rc=%d\n", rc);
1727 return TMF_RESP_FUNC_FAILED;
1728 }
1729 hisi_sas_dereg_device(hisi_hba, device);
0efff300
JG		 1730
1731 tmf_task.tmf = TMF_ABORT_TASK_SET;
1732 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
1733
e85d93b2 1734 if (rc == TMF_RESP_FUNC_COMPLETE)
2a038131 1735 hisi_sas_release_task(hisi_hba, device);
2a038131 1736
0efff300
JG		 1737 return rc;
1738}
1739
1740static int hisi_sas_clear_aca(struct domain_device *device, u8 *lun)
1741{
0efff300 1742 struct hisi_sas_tmf_task tmf_task;
4a8bec88 1743 int rc;
0efff300
JG		 1744
1745 tmf_task.tmf = TMF_CLEAR_ACA;
1746 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
1747
1748 return rc;
1749}
1750
1751static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device)
1752{
3e1fb1b8 1753 struct sas_phy *local_phy = sas_get_local_phy(device);
57dbb2b2 1754 struct hisi_sas_device *sas_dev = device->lldd_dev;
3e1fb1b8
XC		 1755 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
1756 struct sas_ha_struct *sas_ha = &hisi_hba->sha;
3e1fb1b8 1757 DECLARE_COMPLETION_ONSTACK(phyreset);
57dbb2b2 1758 int rc, reset_type;
3e1fb1b8 1759
c2bae4f7
LJ		 1760 if (!local_phy->enabled) {
1761 sas_put_local_phy(local_phy);
1762 return -ENODEV;
1763 }
1764
3e1fb1b8 1765 if (scsi_is_sas_phy_local(local_phy)) {
445ee2de
LJ		 1766 struct asd_sas_phy *sas_phy =
1767 sas_ha->sas_phy[local_phy->number];
1768 struct hisi_sas_phy *phy =
1769 container_of(sas_phy, struct hisi_sas_phy, sas_phy);
3e1fb1b8
XC		 1770 phy->in_reset = 1;
1771 phy->reset_completion = &phyreset;
1772 }
1773
57dbb2b2 1774 reset_type = (sas_dev->dev_status == HISI_SAS_DEV_INIT ||
af01b2b9 1775 !dev_is_sata(device)) ? true : false;
57dbb2b2 1776
3e1fb1b8
XC		 1777 rc = sas_phy_reset(local_phy, reset_type);
1778 sas_put_local_phy(local_phy);
1779
1780 if (scsi_is_sas_phy_local(local_phy)) {
445ee2de
LJ		 1781 struct asd_sas_phy *sas_phy =
1782 sas_ha->sas_phy[local_phy->number];
1783 struct hisi_sas_phy *phy =
1784 container_of(sas_phy, struct hisi_sas_phy, sas_phy);
3e1fb1b8
XC		 1785 int ret = wait_for_completion_timeout(&phyreset, 2 * HZ);
1786 unsigned long flags;
1787
1788 spin_lock_irqsave(&phy->lock, flags);
1789 phy->reset_completion = NULL;
1790 phy->in_reset = 0;
1791 spin_unlock_irqrestore(&phy->lock, flags);
1792
1793 /* report PHY down if timed out */
1794 if (!ret)
26c7efc3 1795 hisi_sas_phy_down(hisi_hba, sas_phy->id, 0, GFP_KERNEL);
57dbb2b2
XC		 1796 } else if (sas_dev->dev_status != HISI_SAS_DEV_INIT) {
1797 /*
1798 * If in init state, we rely on caller to wait for link to be
76dd768b 1799 * ready; otherwise, except phy reset is fail, delay.
57dbb2b2 1800 */
76dd768b
LJ		 1801 if (!rc)
1802 msleep(2000);
57dbb2b2 1803 }
3e1fb1b8 1804
0efff300
JG		 1805 return rc;
1806}
1807
1808static int hisi_sas_I_T_nexus_reset(struct domain_device *device)
1809{
0efff300 1810 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
813709f2 1811 struct device *dev = hisi_hba->dev;
4a8bec88 1812 int rc;
0efff300 1813
813709f2 1814 rc = hisi_sas_internal_task_abort(hisi_hba, device,
795f25a3 1815 HISI_SAS_INT_ABT_DEV, 0);
813709f2
XT		 1816 if (rc < 0) {
1817 dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc);
1818 return TMF_RESP_FUNC_FAILED;
1819 }
d30ff263
XC		 1820 hisi_sas_dereg_device(hisi_hba, device);
1821
0e83fc61
LJ		 1822 if (dev_is_sata(device)) {
1823 rc = hisi_sas_softreset_ata_disk(device);
246ea3c0 1824 if (rc == TMF_RESP_FUNC_FAILED)
0e83fc61
LJ		 1825 return TMF_RESP_FUNC_FAILED;
1826 }
1827
0efff300
JG		 1828 rc = hisi_sas_debug_I_T_nexus_reset(device);
1829
e85d93b2 1830 if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV))
6131243a 1831 hisi_sas_release_task(hisi_hba, device);
e85d93b2 1832
6131243a 1833 return rc;
0efff300
JG		 1834}
1835
1836static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun)
1837{
0efff300
JG		 1838 struct hisi_sas_device *sas_dev = device->lldd_dev;
1839 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device);
11b75249 1840 struct device *dev = hisi_hba->dev;
0efff300
JG		 1841 int rc = TMF_RESP_FUNC_FAILED;
1842
a5ac1f5d
LJ		 1843 /* Clear internal IO and then lu reset */
1844 rc = hisi_sas_internal_task_abort(hisi_hba, device,
1845 HISI_SAS_INT_ABT_DEV, 0);
1846 if (rc < 0) {
1847 dev_err(dev, "lu_reset: internal abort failed\n");
1848 goto out;
1849 }
1850 hisi_sas_dereg_device(hisi_hba, device);
1851
055945df
JG		 1852 if (dev_is_sata(device)) {
1853 struct sas_phy *phy;
1854
055945df
JG		 1855 phy = sas_get_local_phy(device);
1856
af01b2b9 1857 rc = sas_phy_reset(phy, true);
055945df 1858
e85d93b2 1859 if (rc == 0)
055945df 1860 hisi_sas_release_task(hisi_hba, device);
055945df
JG		 1861 sas_put_local_phy(phy);
1862 } else {
1863 struct hisi_sas_tmf_task tmf_task = { .tmf = TMF_LU_RESET };
1864
1865 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task);
e85d93b2 1866 if (rc == TMF_RESP_FUNC_COMPLETE)
055945df 1867 hisi_sas_release_task(hisi_hba, device);
055945df
JG		 1868 }
1869out:
14d3f397 1870 if (rc != TMF_RESP_FUNC_COMPLETE)
ad604832 1871 dev_err(dev, "lu_reset: for device[%d]:rc= %d\n",
14d3f397 1872 sas_dev->device_id, rc);
0efff300
JG		 1873 return rc;
1874}
1875
8b05ad6a
JG		 1876static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha)
1877{
1878 struct hisi_hba *hisi_hba = sas_ha->lldd_ha;
f2ae8d04 1879 struct device *dev = hisi_hba->dev;
e402acdb 1880 HISI_SAS_DECLARE_RST_WORK_ON_STACK(r);
f2ae8d04 1881 int rc, i;
8b05ad6a 1882
e402acdb
XT		 1883 queue_work(hisi_hba->wq, &r.work);
1884 wait_for_completion(r.completion);
f2ae8d04
XT		 1885 if (!r.done)
1886 return TMF_RESP_FUNC_FAILED;
1887
1888 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
1889 struct hisi_sas_device *sas_dev = &hisi_hba->devices[i];
1890 struct domain_device *device = sas_dev->sas_device;
1891
1892 if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device ||
924a3541 1893 dev_is_expander(device->dev_type))
f2ae8d04
XT		 1894 continue;
1895
1896 rc = hisi_sas_debug_I_T_nexus_reset(device);
1897 if (rc != TMF_RESP_FUNC_COMPLETE)
1898 dev_info(dev, "clear nexus ha: for device[%d] rc=%d\n",
1899 sas_dev->device_id, rc);
1900 }
1901
1902 hisi_sas_release_tasks(hisi_hba);
e402acdb 1903
f2ae8d04 1904 return TMF_RESP_FUNC_COMPLETE;
8b05ad6a
JG		 1905}
1906
0efff300
JG		 1907static int hisi_sas_query_task(struct sas_task *task)
1908{
1909 struct scsi_lun lun;
1910 struct hisi_sas_tmf_task tmf_task;
1911 int rc = TMF_RESP_FUNC_FAILED;
1912
1913 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1914 struct scsi_cmnd *cmnd = task->uldd_task;
1915 struct domain_device *device = task->dev;
1916 struct hisi_sas_slot *slot = task->lldd_task;
1917 u32 tag = slot->idx;
1918
1919 int_to_scsilun(cmnd->device->lun, &lun);
1920 tmf_task.tmf = TMF_QUERY_TASK;
735bcc77 1921 tmf_task.tag_of_task_to_be_managed = tag;
0efff300
JG		 1922
1923 rc = hisi_sas_debug_issue_ssp_tmf(device,
1924 lun.scsi_lun,
1925 &tmf_task);
1926 switch (rc) {
1927 /* The task is still in Lun, release it then */
1928 case TMF_RESP_FUNC_SUCC:
1929 /* The task is not in Lun or failed, reset the phy */
1930 case TMF_RESP_FUNC_FAILED:
1931 case TMF_RESP_FUNC_COMPLETE:
1932 break;
997ee43c
XC		 1933 default:
1934 rc = TMF_RESP_FUNC_FAILED;
1935 break;
0efff300
JG		 1936 }
1937 }
1938 return rc;
1939}
1940
441c2740 1941static int
ad604832 1942hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
441c2740 1943 struct sas_task *task, int abort_flag,
795f25a3 1944 int task_tag, struct hisi_sas_dq *dq)
441c2740
JG		 1945{
1946 struct domain_device *device = task->dev;
1947 struct hisi_sas_device *sas_dev = device->lldd_dev;
11b75249 1948 struct device *dev = hisi_hba->dev;
441c2740
JG		 1949 struct hisi_sas_port *port;
1950 struct hisi_sas_slot *slot;
2e244f0f 1951 struct asd_sas_port *sas_port = device->port;
441c2740
JG		 1952 struct hisi_sas_cmd_hdr *cmd_hdr_base;
1953 int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx;
897cc769 1954 unsigned long flags;
fa222db0 1955 int wr_q_index;
441c2740 1956
917d3bda 1957 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
06ec0fb9
XC		 1958 return -EINVAL;
1959
441c2740
JG		 1960 if (!device->port)
1961 return -1;
1962
2e244f0f 1963 port = to_hisi_sas_port(sas_port);
441c2740
JG		 1964
1965 /* simply get a slot and send abort command */
784b46b7
XC		 1966 rc = hisi_sas_slot_index_alloc(hisi_hba, NULL);
1967 if (rc < 0)
441c2740 1968 goto err_out;
b1a49412 1969
784b46b7 1970 slot_idx = rc;
3de0026d 1971 slot = &hisi_hba->slot_info[slot_idx];
fa222db0 1972
e9dc5e11 1973 spin_lock(&dq->lock);
897cc769
JG		 1974 wr_q_index = dq->wr_point;
1975 dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
fa222db0 1976 list_add_tail(&slot->delivery, &dq->list);
e9dc5e11
XC		 1977 spin_unlock(&dq->lock);
1978 spin_lock(&sas_dev->lock);
4fefe5bb 1979 list_add_tail(&slot->entry, &sas_dev->list);
e9dc5e11 1980 spin_unlock(&sas_dev->lock);
441c2740 1981
b1a49412 1982 dlvry_queue = dq->id;
fa222db0 1983 dlvry_queue_slot = wr_q_index;
b1a49412 1984
4fefe5bb 1985 slot->device_id = sas_dev->device_id;
441c2740
JG		 1986 slot->n_elem = n_elem;
1987 slot->dlvry_queue = dlvry_queue;
1988 slot->dlvry_queue_slot = dlvry_queue_slot;
1989 cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue];
1990 slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot];
1991 slot->task = task;
1992 slot->port = port;
cd938e53 1993 slot->is_internal = true;
441c2740
JG		 1994 task->lldd_task = slot;
1995
1996 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr));
031da09c 1997 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ);
d380f555
XC		 1998 memset(hisi_sas_status_buf_addr_mem(slot), 0,
1999 sizeof(struct hisi_sas_err_record));
441c2740 2000
a2b3820b 2001 hisi_sas_task_prep_abort(hisi_hba, slot, device_id,
441c2740 2002 abort_flag, task_tag);
441c2740 2003
54c9dd2d 2004 spin_lock_irqsave(&task->task_state_lock, flags);
441c2740 2005 task->task_state_flags |= SAS_TASK_AT_INITIATOR;
54c9dd2d 2006 spin_unlock_irqrestore(&task->task_state_lock, flags);
1c09b663 2007 WRITE_ONCE(slot->ready, 1);
b1a49412 2008 /* send abort command to the chip */
e9dc5e11 2009 spin_lock(&dq->lock);
b1a49412 2010 hisi_hba->hw->start_delivery(dq);
e9dc5e11 2011 spin_unlock(&dq->lock);
441c2740
JG		 2012
2013 return 0;
2014
441c2740
JG		 2015err_out:
2016 dev_err(dev, "internal abort task prep: failed[%d]!\n", rc);
2017
2018 return rc;
2019}
2020
2021/**
795f25a3 2022 * _hisi_sas_internal_task_abort -- execute an internal
441c2740
JG		 2023 * abort command for single IO command or a device
2024 * @hisi_hba: host controller struct
2025 * @device: domain device
2026 * @abort_flag: mode of operation, device or single IO
2027 * @tag: tag of IO to be aborted (only relevant to single
2028 * IO mode)
795f25a3 2029 * @dq: delivery queue for this internal abort command
441c2740
JG		 2030 */
2031static int
795f25a3
JG		 2032_hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
2033 struct domain_device *device, int abort_flag,
2034 int tag, struct hisi_sas_dq *dq)
441c2740
JG		 2035{
2036 struct sas_task *task;
2037 struct hisi_sas_device *sas_dev = device->lldd_dev;
11b75249 2038 struct device *dev = hisi_hba->dev;
441c2740 2039 int res;
441c2740 2040
813709f2
XT		 2041 /*
2042 * The interface is not realized means this HW don't support internal
2043 * abort, or don't need to do internal abort. Then here, we return
2044 * TMF_RESP_FUNC_FAILED and let other steps go on, which depends that
2045 * the internal abort has been executed and returned CQ.
2046 */
441c2740 2047 if (!hisi_hba->hw->prep_abort)
813709f2 2048 return TMF_RESP_FUNC_FAILED;
441c2740
JG		 2049
2050 task = sas_alloc_slow_task(GFP_KERNEL);
2051 if (!task)
2052 return -ENOMEM;
2053
2054 task->dev = device;
2055 task->task_proto = device->tproto;
2056 task->task_done = hisi_sas_task_done;
841b86f3 2057 task->slow_task->timer.function = hisi_sas_tmf_timedout;
4a8bec88 2058 task->slow_task->timer.expires = jiffies + INTERNAL_ABORT_TIMEOUT * HZ;
441c2740
JG		 2059 add_timer(&task->slow_task->timer);
2060
441c2740 2061 res = hisi_sas_internal_abort_task_exec(hisi_hba, sas_dev->device_id,
795f25a3 2062 task, abort_flag, tag, dq);
441c2740
JG		 2063 if (res) {
2064 del_timer(&task->slow_task->timer);
2065 dev_err(dev, "internal task abort: executing internal task failed: %d\n",
2066 res);
2067 goto exit;
2068 }
2069 wait_for_completion(&task->slow_task->completion);
2070 res = TMF_RESP_FUNC_FAILED;
2071
f64a6988
XC		 2072 /* Internal abort timed out */
2073 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) {
a70e33ea 2074 if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct[0].itct)
7105e68a
LJ		 2075 queue_work(hisi_hba->wq, &hisi_hba->debugfs_work);
2076
f64a6988
XC		 2077 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
2078 struct hisi_sas_slot *slot = task->lldd_task;
584f53fe
XC		 2079
2080 if (slot) {
f4445bb9
GS		 2081 struct hisi_sas_cq *cq =
2082 &hisi_hba->cq[slot->dlvry_queue];
584f53fe 2083 /*
81f338e9 2084 * sync irq to avoid free'ing task
584f53fe
XC		 2085 * before using task in IO completion
2086 */
81f338e9 2087 synchronize_irq(cq->irq_no);
f64a6988 2088 slot->task = NULL;
584f53fe 2089 }
f1c88211 2090 dev_err(dev, "internal task abort: timeout and not done.\n");
49159a5e 2091
813709f2 2092 res = -EIO;
f692a677 2093 goto exit;
f1c88211
XC		 2094 } else
2095 dev_err(dev, "internal task abort: timeout.\n");
f64a6988
XC		 2096 }
2097
441c2740
JG		 2098 if (task->task_status.resp == SAS_TASK_COMPLETE &&
2099 task->task_status.stat == TMF_RESP_FUNC_COMPLETE) {
2100 res = TMF_RESP_FUNC_COMPLETE;
2101 goto exit;
2102 }
2103
c35279f2
JG		 2104 if (task->task_status.resp == SAS_TASK_COMPLETE &&
2105 task->task_status.stat == TMF_RESP_FUNC_SUCC) {
2106 res = TMF_RESP_FUNC_SUCC;
2107 goto exit;
2108 }
2109
441c2740 2110exit:
e7513f66 2111 dev_dbg(dev, "internal task abort: task to dev %016llx task=%pK resp: 0x%x sts 0x%x\n",
246ea3c0 2112 SAS_ADDR(device->sas_addr), task,
441c2740
JG		 2113 task->task_status.resp, /* 0 is complete, -1 is undelivered */
2114 task->task_status.stat);
2115 sas_free_task(task);
2116
2117 return res;
2118}
2119
795f25a3
JG		 2120static int
2121hisi_sas_internal_task_abort(struct hisi_hba *hisi_hba,
2122 struct domain_device *device,
2123 int abort_flag, int tag)
2124{
2125 struct hisi_sas_slot *slot;
2126 struct device *dev = hisi_hba->dev;
2127 struct hisi_sas_dq *dq;
2128 int i, rc;
2129
2130 switch (abort_flag) {
2131 case HISI_SAS_INT_ABT_CMD:
2132 slot = &hisi_hba->slot_info[tag];
2133 dq = &hisi_hba->dq[slot->dlvry_queue];
2134 return _hisi_sas_internal_task_abort(hisi_hba, device,
2135 abort_flag, tag, dq);
2136 case HISI_SAS_INT_ABT_DEV:
2137 for (i = 0; i < hisi_hba->cq_nvecs; i++) {
4fefe5bb 2138 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
11e67320 2139 const struct cpumask *mask = cq->irq_mask;
4fefe5bb
XC		 2140
2141 if (mask && !cpumask_intersects(cpu_online_mask, mask))
2142 continue;
795f25a3
JG		 2143 dq = &hisi_hba->dq[i];
2144 rc = _hisi_sas_internal_task_abort(hisi_hba, device,
2145 abort_flag, tag,
2146 dq);
2147 if (rc)
2148 return rc;
2149 }
2150 break;
2151 default:
2152 dev_err(dev, "Unrecognised internal abort flag (%d)\n",
2153 abort_flag);
2154 return -EINVAL;
2155 }
2156
2157 return 0;
2158}
2159
184a4635
JG		 2160static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy)
2161{
2162 hisi_sas_port_notify_formed(sas_phy);
2163}
2164
6379c560
XT		 2165static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type,
2166 u8 reg_index, u8 reg_count, u8 *write_data)
2167{
2168 struct hisi_hba *hisi_hba = sha->lldd_ha;
2169
2170 if (!hisi_hba->hw->write_gpio)
2171 return -EOPNOTSUPP;
2172
2173 return hisi_hba->hw->write_gpio(hisi_hba, reg_type,
2174 reg_index, reg_count, write_data);
2175}
2176
184a4635
JG		 2177static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy)
2178{
efdcad62
JG		 2179 struct asd_sas_phy *sas_phy = &phy->sas_phy;
2180 struct sas_phy *sphy = sas_phy->phy;
c63b88cc 2181 unsigned long flags;
efdcad62 2182
184a4635
JG		 2183 phy->phy_attached = 0;
2184 phy->phy_type = 0;
2185 phy->port = NULL;
efdcad62 2186
c63b88cc
JG		 2187 spin_lock_irqsave(&phy->lock, flags);
2188 if (phy->enable)
efdcad62
JG		 2189 sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
2190 else
2191 sphy->negotiated_linkrate = SAS_PHY_DISABLED;
c63b88cc 2192 spin_unlock_irqrestore(&phy->lock, flags);
184a4635
JG		 2193}
2194
26c7efc3
AD		 2195void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy,
2196 gfp_t gfp_flags)
184a4635
JG		 2197{
2198 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
2199 struct asd_sas_phy *sas_phy = &phy->sas_phy;
3e1fb1b8 2200 struct device *dev = hisi_hba->dev;
184a4635
JG		 2201
2202 if (rdy) {
2203 /* Phy down but ready */
26c7efc3 2204 hisi_sas_bytes_dmaed(hisi_hba, phy_no, gfp_flags);
184a4635
JG		 2205 hisi_sas_port_notify_formed(sas_phy);
2206 } else {
2207 struct hisi_sas_port *port = phy->port;
2208
ed99e1d9
XT		 2209 if (test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags) ||
2210 phy->in_reset) {
3e1fb1b8
XC		 2211 dev_info(dev, "ignore flutter phy%d down\n", phy_no);
2212 return;
2213 }
184a4635 2214 /* Phy down and not ready */
872a90b5 2215 sas_notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL, gfp_flags);
184a4635
JG		 2216 sas_phy_disconnected(sas_phy);
2217
2218 if (port) {
2219 if (phy->phy_type & PORT_TYPE_SAS) {
2220 int port_id = port->id;
2221
2222 if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba,
2223 port_id))
2224 port->port_attached = 0;
2225 } else if (phy->phy_type & PORT_TYPE_SATA)
2226 port->port_attached = 0;
2227 }
2228 hisi_sas_phy_disconnected(phy);
2229 }
2230}
2231EXPORT_SYMBOL_GPL(hisi_sas_phy_down);
2232
81f338e9 2233void hisi_sas_sync_irqs(struct hisi_hba *hisi_hba)
571295f8
XT		 2234{
2235 int i;
2236
795f25a3 2237 for (i = 0; i < hisi_hba->cq_nvecs; i++) {
571295f8
XT		 2238 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
2239
81f338e9 2240 synchronize_irq(cq->irq_no);
571295f8
XT		 2241 }
2242}
81f338e9 2243EXPORT_SYMBOL_GPL(hisi_sas_sync_irqs);
06ec0fb9 2244
a97fa586
XC		 2245int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type)
2246{
2247 struct hisi_hba *hisi_hba = shost_priv(shost);
2248
2249 if (reset_type != SCSI_ADAPTER_RESET)
2250 return -EOPNOTSUPP;
2251
2252 queue_work(hisi_hba->wq, &hisi_hba->rst_work);
2253
2254 return 0;
2255}
2256EXPORT_SYMBOL_GPL(hisi_sas_host_reset);
2257
e21fe3a5
JG		 2258struct scsi_transport_template *hisi_sas_stt;
2259EXPORT_SYMBOL_GPL(hisi_sas_stt);
e8899fad
JG		 2260
2261static struct sas_domain_function_template hisi_sas_transport_ops = {
abda97c2
JG		 2262 .lldd_dev_found = hisi_sas_dev_found,
2263 .lldd_dev_gone = hisi_sas_dev_gone,
42e7a693 2264 .lldd_execute_task = hisi_sas_queue_command,
e4189d53 2265 .lldd_control_phy = hisi_sas_control_phy,
0efff300
JG		 2266 .lldd_abort_task = hisi_sas_abort_task,
2267 .lldd_abort_task_set = hisi_sas_abort_task_set,
2268 .lldd_clear_aca = hisi_sas_clear_aca,
2269 .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset,
2270 .lldd_lu_reset = hisi_sas_lu_reset,
2271 .lldd_query_task = hisi_sas_query_task,
640208a1 2272 .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha,
184a4635 2273 .lldd_port_formed = hisi_sas_port_formed,
640208a1 2274 .lldd_write_gpio = hisi_sas_write_gpio,
e8899fad
JG		 2275};
2276
06ec0fb9
XC		 2277void hisi_sas_init_mem(struct hisi_hba *hisi_hba)
2278{
93352abc 2279 int i, s, j, max_command_entries = HISI_SAS_MAX_COMMANDS;
26889e5e 2280 struct hisi_sas_breakpoint *sata_breakpoint = hisi_hba->sata_breakpoint;
06ec0fb9
XC		 2281
2282 for (i = 0; i < hisi_hba->queue_count; i++) {
2283 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
2284 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
26889e5e
JG		 2285 struct hisi_sas_cmd_hdr *cmd_hdr = hisi_hba->cmd_hdr[i];
2286
2287 s = sizeof(struct hisi_sas_cmd_hdr);
2288 for (j = 0; j < HISI_SAS_QUEUE_SLOTS; j++)
2289 memset(&cmd_hdr[j], 0, s);
06ec0fb9 2290
06ec0fb9
XC		 2291 dq->wr_point = 0;
2292
2293 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
2294 memset(hisi_hba->complete_hdr[i], 0, s);
2295 cq->rd_point = 0;
2296 }
2297
2298 s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy;
2299 memset(hisi_hba->initial_fis, 0, s);
2300
2301 s = max_command_entries * sizeof(struct hisi_sas_iost);
2302 memset(hisi_hba->iost, 0, s);
2303
2304 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
2305 memset(hisi_hba->breakpoint, 0, s);
2306
26889e5e
JG		 2307 s = sizeof(struct hisi_sas_sata_breakpoint);
2308 for (j = 0; j < HISI_SAS_MAX_ITCT_ENTRIES; j++)
2309 memset(&sata_breakpoint[j], 0, s);
06ec0fb9
XC		 2310}
2311EXPORT_SYMBOL_GPL(hisi_sas_init_mem);
2312
ae68b566 2313int hisi_sas_alloc(struct hisi_hba *hisi_hba)
6be6de18 2314{
11b75249 2315 struct device *dev = hisi_hba->dev;
93352abc 2316 int i, j, s, max_command_entries = HISI_SAS_MAX_COMMANDS;
2ba5afb6
XC		 2317 int max_command_entries_ru, sz_slot_buf_ru;
2318 int blk_cnt, slots_per_blk;
6be6de18 2319
d2fc401e 2320 sema_init(&hisi_hba->sem, 1);
fa42d80d 2321 spin_lock_init(&hisi_hba->lock);
976867e6
JG		 2322 for (i = 0; i < hisi_hba->n_phy; i++) {
2323 hisi_sas_phy_init(hisi_hba, i);
2324 hisi_hba->port[i].port_attached = 0;
2325 hisi_hba->port[i].id = -1;
976867e6
JG		 2326 }
2327
af740dbe
JG		 2328 for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) {
2329 hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED;
2330 hisi_hba->devices[i].device_id = i;
57dbb2b2 2331 hisi_hba->devices[i].dev_status = HISI_SAS_DEV_INIT;
af740dbe
JG		 2332 }
2333
6be6de18 2334 for (i = 0; i < hisi_hba->queue_count; i++) {
9101a079 2335 struct hisi_sas_cq *cq = &hisi_hba->cq[i];
4fde02ad 2336 struct hisi_sas_dq *dq = &hisi_hba->dq[i];
9101a079
JG		 2337
2338 /* Completion queue structure */
2339 cq->id = i;
2340 cq->hisi_hba = hisi_hba;
2341
4fde02ad 2342 /* Delivery queue structure */
39bade0c 2343 spin_lock_init(&dq->lock);
fa222db0 2344 INIT_LIST_HEAD(&dq->list);
4fde02ad
JG		 2345 dq->id = i;
2346 dq->hisi_hba = hisi_hba;
2347
6be6de18
JG		 2348 /* Delivery queue */
2349 s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS;
4e63ac82
XC		 2350 hisi_hba->cmd_hdr[i] = dmam_alloc_coherent(dev, s,
2351 &hisi_hba->cmd_hdr_dma[i],
2352 GFP_KERNEL);
6be6de18
JG		 2353 if (!hisi_hba->cmd_hdr[i])
2354 goto err_out;
6be6de18
JG		 2355
2356 /* Completion queue */
2357 s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS;
4e63ac82
XC		 2358 hisi_hba->complete_hdr[i] = dmam_alloc_coherent(dev, s,
2359 &hisi_hba->complete_hdr_dma[i],
2360 GFP_KERNEL);
6be6de18
JG		 2361 if (!hisi_hba->complete_hdr[i])
2362 goto err_out;
6be6de18
JG		 2363 }
2364
6be6de18 2365 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct);
4e63ac82 2366 hisi_hba->itct = dmam_alloc_coherent(dev, s, &hisi_hba->itct_dma,
a07b4876 2367 GFP_KERNEL);
6be6de18
JG		 2368 if (!hisi_hba->itct)
2369 goto err_out;
2370
a8d547bd 2371 hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries,
6be6de18
JG		 2372 sizeof(struct hisi_sas_slot),
2373 GFP_KERNEL);
2374 if (!hisi_hba->slot_info)
2375 goto err_out;
2376
2ba5afb6
XC		 2377 /* roundup to avoid overly large block size */
2378 max_command_entries_ru = roundup(max_command_entries, 64);
b3cce125
XC		 2379 if (hisi_hba->prot_mask & HISI_SAS_DIX_PROT_MASK)
2380 sz_slot_buf_ru = sizeof(struct hisi_sas_slot_dif_buf_table);
2381 else
2382 sz_slot_buf_ru = sizeof(struct hisi_sas_slot_buf_table);
2383 sz_slot_buf_ru = roundup(sz_slot_buf_ru, 64);
599aefc8 2384 s = max(lcm(max_command_entries_ru, sz_slot_buf_ru), PAGE_SIZE);
2ba5afb6
XC		 2385 blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s;
2386 slots_per_blk = s / sz_slot_buf_ru;
b3cce125 2387
2ba5afb6 2388 for (i = 0; i < blk_cnt; i++) {
2ba5afb6 2389 int slot_index = i * slots_per_blk;
b3cce125
XC		 2390 dma_addr_t buf_dma;
2391 void *buf;
2ba5afb6 2392
b3cce125 2393 buf = dmam_alloc_coherent(dev, s, &buf_dma,
a07b4876 2394 GFP_KERNEL);
2ba5afb6
XC		 2395 if (!buf)
2396 goto err_out;
2ba5afb6
XC		 2397
2398 for (j = 0; j < slots_per_blk; j++, slot_index++) {
2399 struct hisi_sas_slot *slot;
2400
2401 slot = &hisi_hba->slot_info[slot_index];
2402 slot->buf = buf;
2403 slot->buf_dma = buf_dma;
2404 slot->idx = slot_index;
2405
b3cce125
XC		 2406 buf += sz_slot_buf_ru;
2407 buf_dma += sz_slot_buf_ru;
2ba5afb6
XC		 2408 }
2409 }
2410
a8d547bd 2411 s = max_command_entries * sizeof(struct hisi_sas_iost);
4e63ac82
XC		 2412 hisi_hba->iost = dmam_alloc_coherent(dev, s, &hisi_hba->iost_dma,
2413 GFP_KERNEL);
6be6de18
JG		 2414 if (!hisi_hba->iost)
2415 goto err_out;
2416
a8d547bd 2417 s = max_command_entries * sizeof(struct hisi_sas_breakpoint);
4e63ac82
XC		 2418 hisi_hba->breakpoint = dmam_alloc_coherent(dev, s,
2419 &hisi_hba->breakpoint_dma,
2420 GFP_KERNEL);
6be6de18
JG		 2421 if (!hisi_hba->breakpoint)
2422 goto err_out;
2423
a8d547bd 2424 hisi_hba->slot_index_count = max_command_entries;
433f5696 2425 s = hisi_hba->slot_index_count / BITS_PER_BYTE;
257efd1f
JG		 2426 hisi_hba->slot_index_tags = devm_kzalloc(dev, s, GFP_KERNEL);
2427 if (!hisi_hba->slot_index_tags)
2428 goto err_out;
2429
6be6de18 2430 s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS;
4e63ac82
XC		 2431 hisi_hba->initial_fis = dmam_alloc_coherent(dev, s,
2432 &hisi_hba->initial_fis_dma,
2433 GFP_KERNEL);
6be6de18
JG		 2434 if (!hisi_hba->initial_fis)
2435 goto err_out;
6be6de18 2436
3297ded1 2437 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint);
4e63ac82
XC		 2438 hisi_hba->sata_breakpoint = dmam_alloc_coherent(dev, s,
2439 &hisi_hba->sata_breakpoint_dma,
2440 GFP_KERNEL);
6be6de18
JG		 2441 if (!hisi_hba->sata_breakpoint)
2442 goto err_out;
6be6de18 2443
257efd1f 2444 hisi_sas_slot_index_init(hisi_hba);
93352abc 2445 hisi_hba->last_slot_index = HISI_SAS_UNRESERVED_IPTT;
257efd1f 2446
7e9080e1
JG		 2447 hisi_hba->wq = create_singlethread_workqueue(dev_name(dev));
2448 if (!hisi_hba->wq) {
2449 dev_err(dev, "sas_alloc: failed to create workqueue\n");
2450 goto err_out;
2451 }
2452
6be6de18
JG		 2453 return 0;
2454err_out:
2455 return -ENOMEM;
2456}
e21fe3a5 2457EXPORT_SYMBOL_GPL(hisi_sas_alloc);
6be6de18 2458
e21fe3a5 2459void hisi_sas_free(struct hisi_hba *hisi_hba)
89d53322 2460{
6c86e046
XC		 2461 int i;
2462
2463 for (i = 0; i < hisi_hba->n_phy; i++) {
2464 struct hisi_sas_phy *phy = &hisi_hba->phy[i];
2465
2466 del_timer_sync(&phy->timer);
2467 }
2468
7e9080e1
JG		 2469 if (hisi_hba->wq)
2470 destroy_workqueue(hisi_hba->wq);
89d53322 2471}
e21fe3a5 2472EXPORT_SYMBOL_GPL(hisi_sas_free);
6be6de18 2473
b4241f0f 2474void hisi_sas_rst_work_handler(struct work_struct *work)
06ec0fb9
XC		 2475{
2476 struct hisi_hba *hisi_hba =
2477 container_of(work, struct hisi_hba, rst_work);
2478
2c74cb1f
JX		 2479 if (hisi_sas_controller_prereset(hisi_hba))
2480 return;
2481
06ec0fb9
XC		 2482 hisi_sas_controller_reset(hisi_hba);
2483}
b4241f0f 2484EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler);
06ec0fb9 2485
e402acdb
XT		 2486void hisi_sas_sync_rst_work_handler(struct work_struct *work)
2487{
2488 struct hisi_sas_rst *rst =
2489 container_of(work, struct hisi_sas_rst, work);
2490
2c74cb1f
JX		 2491 if (hisi_sas_controller_prereset(rst->hisi_hba))
2492 goto rst_complete;
2493
e402acdb
XT		 2494 if (!hisi_sas_controller_reset(rst->hisi_hba))
2495 rst->done = true;
2c74cb1f 2496rst_complete:
e402acdb
XT		 2497 complete(rst->completion);
2498}
2499EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler);
2500
0fa24c19 2501int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba)
7eb7869f 2502{
0fa24c19
JG		 2503 struct device *dev = hisi_hba->dev;
2504 struct platform_device *pdev = hisi_hba->platform_dev;
2505 struct device_node *np = pdev ? pdev->dev.of_node : NULL;
3bc45af8 2506 struct clk *refclk;
7eb7869f 2507
4d558c77 2508 if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr,
0fa24c19
JG		 2509 SAS_ADDR_SIZE)) {
2510 dev_err(dev, "could not get property sas-addr\n");
2511 return -ENOENT;
2512 }
e26b2f40 2513
4d558c77 2514 if (np) {
0fa24c19
JG		 2515 /*
2516 * These properties are only required for platform device-based
2517 * controller with DT firmware.
2518 */
4d558c77
JG		 2519 hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np,
2520 "hisilicon,sas-syscon");
0fa24c19
JG		 2521 if (IS_ERR(hisi_hba->ctrl)) {
2522 dev_err(dev, "could not get syscon\n");
2523 return -ENOENT;
2524 }
e26b2f40 2525
4d558c77 2526 if (device_property_read_u32(dev, "ctrl-reset-reg",
0fa24c19 2527 &hisi_hba->ctrl_reset_reg)) {
01d4e3a2 2528 dev_err(dev, "could not get property ctrl-reset-reg\n");
0fa24c19
JG		 2529 return -ENOENT;
2530 }
e26b2f40 2531
4d558c77 2532 if (device_property_read_u32(dev, "ctrl-reset-sts-reg",
0fa24c19 2533 &hisi_hba->ctrl_reset_sts_reg)) {
01d4e3a2 2534 dev_err(dev, "could not get property ctrl-reset-sts-reg\n");
0fa24c19
JG		 2535 return -ENOENT;
2536 }
e26b2f40 2537
4d558c77 2538 if (device_property_read_u32(dev, "ctrl-clock-ena-reg",
0fa24c19 2539 &hisi_hba->ctrl_clock_ena_reg)) {
01d4e3a2 2540 dev_err(dev, "could not get property ctrl-clock-ena-reg\n");
0fa24c19
JG		 2541 return -ENOENT;
2542 }
4d558c77
JG		 2543 }
2544
0fa24c19 2545 refclk = devm_clk_get(dev, NULL);
3bc45af8 2546 if (IS_ERR(refclk))
87e287c1 2547 dev_dbg(dev, "no ref clk property\n");
3bc45af8
JG		 2548 else
2549 hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000;
2550
0fa24c19
JG		 2551 if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) {
2552 dev_err(dev, "could not get property phy-count\n");
2553 return -ENOENT;
2554 }
e26b2f40 2555
4d558c77 2556 if (device_property_read_u32(dev, "queue-count",
0fa24c19
JG		 2557 &hisi_hba->queue_count)) {
2558 dev_err(dev, "could not get property queue-count\n");
2559 return -ENOENT;
2560 }
2561
2562 return 0;
2563}
2564EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info);
2565
2566static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev,
2567 const struct hisi_sas_hw *hw)
2568{
2569 struct resource *res;
2570 struct Scsi_Host *shost;
2571 struct hisi_hba *hisi_hba;
2572 struct device *dev = &pdev->dev;
d9a00459 2573 int error;
0fa24c19 2574
235bfc7f 2575 shost = scsi_host_alloc(hw->sht, sizeof(*hisi_hba));
0fa24c19
JG		 2576 if (!shost) {
2577 dev_err(dev, "scsi host alloc failed\n");
2578 return NULL;
2579 }
2580 hisi_hba = shost_priv(shost);
2581
2582 INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler);
2583 hisi_hba->hw = hw;
2584 hisi_hba->dev = dev;
2585 hisi_hba->platform_dev = pdev;
2586 hisi_hba->shost = shost;
2587 SHOST_TO_SAS_HA(shost) = &hisi_hba->sha;
2588
77570eed 2589 timer_setup(&hisi_hba->timer, NULL, 0);
0fa24c19
JG		 2590
2591 if (hisi_sas_get_fw_info(hisi_hba) < 0)
e26b2f40
JG		 2592 goto err_out;
2593
d9a00459
HR		 2594 error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
2595 if (error)
2596 error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
2597
2598 if (error) {
a6f2c7ff
JG		 2599 dev_err(dev, "No usable DMA addressing method\n");
2600 goto err_out;
2601 }
2602
c0c1a71e 2603 hisi_hba->regs = devm_platform_ioremap_resource(pdev, 0);
e26b2f40
JG		 2604 if (IS_ERR(hisi_hba->regs))
2605 goto err_out;
2606
6379c560
XT		 2607 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2608 if (res) {
2609 hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res);
2610 if (IS_ERR(hisi_hba->sgpio_regs))
2611 goto err_out;
2612 }
2613
ae68b566 2614 if (hisi_sas_alloc(hisi_hba)) {
89d53322 2615 hisi_sas_free(hisi_hba);
6be6de18 2616 goto err_out;
89d53322 2617 }
6be6de18 2618
7eb7869f
JG		 2619 return shost;
2620err_out:
76aae5f6 2621 scsi_host_put(shost);
7eb7869f
JG		 2622 dev_err(dev, "shost alloc failed\n");
2623 return NULL;
2624}
2625
74a29219
JG		 2626static int hisi_sas_interrupt_preinit(struct hisi_hba *hisi_hba)
2627{
2628 if (hisi_hba->hw->interrupt_preinit)
2629 return hisi_hba->hw->interrupt_preinit(hisi_hba);
2630 return 0;
2631}
2632
7eb7869f 2633int hisi_sas_probe(struct platform_device *pdev,
235bfc7f 2634 const struct hisi_sas_hw *hw)
7eb7869f
JG		 2635{
2636 struct Scsi_Host *shost;
2637 struct hisi_hba *hisi_hba;
2638 struct device *dev = &pdev->dev;
2639 struct asd_sas_phy **arr_phy;
2640 struct asd_sas_port **arr_port;
2641 struct sas_ha_struct *sha;
2642 int rc, phy_nr, port_nr, i;
2643
2644 shost = hisi_sas_shost_alloc(pdev, hw);
d37a0082
XT		 2645 if (!shost)
2646 return -ENOMEM;
7eb7869f
JG		 2647
2648 sha = SHOST_TO_SAS_HA(shost);
2649 hisi_hba = shost_priv(shost);
2650 platform_set_drvdata(pdev, sha);
50cb916f 2651
7eb7869f
JG		 2652 phy_nr = port_nr = hisi_hba->n_phy;
2653
2654 arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL);
2655 arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL);
d37a0082
XT		 2656 if (!arr_phy || !arr_port) {
2657 rc = -ENOMEM;
2658 goto err_out_ha;
2659 }
7eb7869f
JG		 2660
2661 sha->sas_phy = arr_phy;
2662 sha->sas_port = arr_port;
7eb7869f
JG		 2663 sha->lldd_ha = hisi_hba;
2664
2665 shost->transportt = hisi_sas_stt;
2666 shost->max_id = HISI_SAS_MAX_DEVICES;
2667 shost->max_lun = ~0;
2668 shost->max_channel = 1;
2669 shost->max_cmd_len = 16;
784b46b7 2670 if (hisi_hba->hw->slot_index_alloc) {
93352abc
JG		 2671 shost->can_queue = HISI_SAS_MAX_COMMANDS;
2672 shost->cmd_per_lun = HISI_SAS_MAX_COMMANDS;
784b46b7 2673 } else {
93352abc
JG		 2674 shost->can_queue = HISI_SAS_UNRESERVED_IPTT;
2675 shost->cmd_per_lun = HISI_SAS_UNRESERVED_IPTT;
784b46b7 2676 }
7eb7869f
JG		 2677
2678 sha->sas_ha_name = DRV_NAME;
11b75249 2679 sha->dev = hisi_hba->dev;
7eb7869f
JG		 2680 sha->lldd_module = THIS_MODULE;
2681 sha->sas_addr = &hisi_hba->sas_addr[0];
2682 sha->num_phys = hisi_hba->n_phy;
2683 sha->core.shost = hisi_hba->shost;
2684
2685 for (i = 0; i < hisi_hba->n_phy; i++) {
2686 sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy;
2687 sha->sas_port[i] = &hisi_hba->port[i].sas_port;
2688 }
2689
74a29219
JG		 2690 rc = hisi_sas_interrupt_preinit(hisi_hba);
2691 if (rc)
2692 goto err_out_ha;
2693
7eb7869f
JG		 2694 rc = scsi_add_host(shost, &pdev->dev);
2695 if (rc)
2696 goto err_out_ha;
2697
2698 rc = sas_register_ha(sha);
2699 if (rc)
2700 goto err_out_register_ha;
2701
0757f041
XC		 2702 rc = hisi_hba->hw->hw_init(hisi_hba);
2703 if (rc)
f4676665 2704 goto err_out_hw_init;
0757f041 2705
7eb7869f
JG		 2706 scsi_scan_host(shost);
2707
2708 return 0;
2709
f4676665
XC		 2710err_out_hw_init:
2711 sas_unregister_ha(sha);
7eb7869f
JG		 2712err_out_register_ha:
2713 scsi_remove_host(shost);
2714err_out_ha:
d37a0082 2715 hisi_sas_free(hisi_hba);
76aae5f6 2716 scsi_host_put(shost);
7eb7869f
JG		 2717 return rc;
2718}
2719EXPORT_SYMBOL_GPL(hisi_sas_probe);
2720
89d53322 2721int hisi_sas_remove(struct platform_device *pdev)
bbe0a7b3 2722{
89d53322
JG		 2723 struct sas_ha_struct *sha = platform_get_drvdata(pdev);
2724 struct hisi_hba *hisi_hba = sha->lldd_ha;
d37a0082 2725 struct Scsi_Host *shost = sha->core.shost;
bbe0a7b3 2726
5df41af4
XC		 2727 if (timer_pending(&hisi_hba->timer))
2728 del_timer(&hisi_hba->timer);
bbe0a7b3 2729
89d53322
JG		 2730 sas_unregister_ha(sha);
2731 sas_remove_host(sha->core.shost);
bbe0a7b3 2732
89d53322 2733 hisi_sas_free(hisi_hba);
76aae5f6 2734 scsi_host_put(shost);
bbe0a7b3
LJ		 2735 return 0;
2736}
89d53322 2737EXPORT_SYMBOL_GPL(hisi_sas_remove);
bbe0a7b3 2738
1dbe61bf
LJ		 2739#if IS_ENABLED(CONFIG_SCSI_HISI_SAS_DEBUGFS_DEFAULT_ENABLE)
2740#define DEBUGFS_ENABLE_DEFAULT "enabled"
2741bool hisi_sas_debugfs_enable = true;
2742u32 hisi_sas_debugfs_dump_count = 50;
2743#else
2744#define DEBUGFS_ENABLE_DEFAULT "disabled"
ef63464b 2745bool hisi_sas_debugfs_enable;
1dbe61bf
LJ		 2746u32 hisi_sas_debugfs_dump_count = 1;
2747#endif
2748
ef63464b
LJ		 2749EXPORT_SYMBOL_GPL(hisi_sas_debugfs_enable);
2750module_param_named(debugfs_enable, hisi_sas_debugfs_enable, bool, 0444);
1dbe61bf
LJ		 2751MODULE_PARM_DESC(hisi_sas_debugfs_enable,
2752 "Enable driver debugfs (default "DEBUGFS_ENABLE_DEFAULT")");
49159a5e 2753
905ab01f
LJ		 2754EXPORT_SYMBOL_GPL(hisi_sas_debugfs_dump_count);
2755module_param_named(debugfs_dump_count, hisi_sas_debugfs_dump_count, uint, 0444);
2756MODULE_PARM_DESC(hisi_sas_debugfs_dump_count, "Number of debugfs dumps to allow");
7c5e1363 2757
623a4b6d
LJ		 2758struct dentry *hisi_sas_debugfs_dir;
2759EXPORT_SYMBOL_GPL(hisi_sas_debugfs_dir);
905ab01f 2760
e8899fad
JG		 2761static __init int hisi_sas_init(void)
2762{
e8899fad
JG		 2763 hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops);
2764 if (!hisi_sas_stt)
2765 return -ENOMEM;
2766
905ab01f 2767 if (hisi_sas_debugfs_enable) {
ef63464b 2768 hisi_sas_debugfs_dir = debugfs_create_dir("hisi_sas", NULL);
905ab01f
LJ		 2769 if (hisi_sas_debugfs_dump_count > HISI_SAS_MAX_DEBUGFS_DUMP) {
2770 pr_info("hisi_sas: Limiting debugfs dump count\n");
2771 hisi_sas_debugfs_dump_count = HISI_SAS_MAX_DEBUGFS_DUMP;
2772 }
2773 }
ef63464b 2774
e8899fad
JG		 2775 return 0;
2776}
2777
2778static __exit void hisi_sas_exit(void)
2779{
2780 sas_release_transport(hisi_sas_stt);
ef63464b
LJ		 2781
2782 debugfs_remove(hisi_sas_debugfs_dir);
e8899fad
JG		 2783}
2784
2785module_init(hisi_sas_init);
2786module_exit(hisi_sas_exit);
2787
e8899fad
JG		 2788MODULE_LICENSE("GPL");
2789MODULE_AUTHOR("John Garry <john.garry@huawei.com>");
2790MODULE_DESCRIPTION("HISILICON SAS controller driver");
2791MODULE_ALIAS("platform:" DRV_NAME);
Linux 6.x block layer and io_uring tree(s)