Commit | Line | Data |
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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
e8899fad JG |
2 | /* |
3 | * Copyright (c) 2015 Linaro Ltd. | |
4 | * Copyright (c) 2015 Hisilicon Limited. | |
e8899fad JG |
5 | */ |
6 | ||
7 | #include "hisi_sas.h" | |
8 | #define DRV_NAME "hisi_sas" | |
9 | ||
42e7a693 JG |
10 | #define DEV_IS_GONE(dev) \ |
11 | ((!dev) || (dev->dev_type == SAS_PHY_UNUSED)) | |
12 | ||
7c594f04 | 13 | static int hisi_sas_softreset_ata_disk(struct domain_device *device); |
057c3d1f XT |
14 | static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func, |
15 | void *funcdata); | |
d5a60dfd XC |
16 | static void hisi_sas_release_task(struct hisi_hba *hisi_hba, |
17 | struct domain_device *device); | |
18 | static void hisi_sas_dev_gone(struct domain_device *device); | |
cac9b2a2 | 19 | |
095478a6 JG |
20 | struct hisi_sas_internal_abort_data { |
21 | bool rst_ha_timeout; /* reset the HA for timeout */ | |
22 | }; | |
23 | ||
468f4b8d | 24 | u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, int direction) |
6c7bb8a1 | 25 | { |
468f4b8d | 26 | switch (fis->command) { |
6c7bb8a1 XC |
27 | case ATA_CMD_FPDMA_WRITE: |
28 | case ATA_CMD_FPDMA_READ: | |
29 | case ATA_CMD_FPDMA_RECV: | |
30 | case ATA_CMD_FPDMA_SEND: | |
31 | case ATA_CMD_NCQ_NON_DATA: | |
edafeef4 | 32 | return HISI_SAS_SATA_PROTOCOL_FPDMA; |
6c7bb8a1 XC |
33 | |
34 | case ATA_CMD_DOWNLOAD_MICRO: | |
35 | case ATA_CMD_ID_ATA: | |
36 | case ATA_CMD_PMP_READ: | |
37 | case ATA_CMD_READ_LOG_EXT: | |
38 | case ATA_CMD_PIO_READ: | |
39 | case ATA_CMD_PIO_READ_EXT: | |
40 | case ATA_CMD_PMP_WRITE: | |
41 | case ATA_CMD_WRITE_LOG_EXT: | |
42 | case ATA_CMD_PIO_WRITE: | |
43 | case ATA_CMD_PIO_WRITE_EXT: | |
edafeef4 | 44 | return HISI_SAS_SATA_PROTOCOL_PIO; |
6c7bb8a1 XC |
45 | |
46 | case ATA_CMD_DSM: | |
47 | case ATA_CMD_DOWNLOAD_MICRO_DMA: | |
48 | case ATA_CMD_PMP_READ_DMA: | |
49 | case ATA_CMD_PMP_WRITE_DMA: | |
50 | case ATA_CMD_READ: | |
51 | case ATA_CMD_READ_EXT: | |
52 | case ATA_CMD_READ_LOG_DMA_EXT: | |
53 | case ATA_CMD_READ_STREAM_DMA_EXT: | |
54 | case ATA_CMD_TRUSTED_RCV_DMA: | |
55 | case ATA_CMD_TRUSTED_SND_DMA: | |
56 | case ATA_CMD_WRITE: | |
57 | case ATA_CMD_WRITE_EXT: | |
58 | case ATA_CMD_WRITE_FUA_EXT: | |
59 | case ATA_CMD_WRITE_QUEUED: | |
60 | case ATA_CMD_WRITE_LOG_DMA_EXT: | |
61 | case ATA_CMD_WRITE_STREAM_DMA_EXT: | |
c3fe8a2b | 62 | case ATA_CMD_ZAC_MGMT_IN: |
edafeef4 | 63 | return HISI_SAS_SATA_PROTOCOL_DMA; |
6c7bb8a1 XC |
64 | |
65 | case ATA_CMD_CHK_POWER: | |
66 | case ATA_CMD_DEV_RESET: | |
67 | case ATA_CMD_EDD: | |
68 | case ATA_CMD_FLUSH: | |
69 | case ATA_CMD_FLUSH_EXT: | |
70 | case ATA_CMD_VERIFY: | |
71 | case ATA_CMD_VERIFY_EXT: | |
72 | case ATA_CMD_SET_FEATURES: | |
73 | case ATA_CMD_STANDBY: | |
74 | case ATA_CMD_STANDBYNOW1: | |
c3fe8a2b | 75 | case ATA_CMD_ZAC_MGMT_OUT: |
edafeef4 | 76 | return HISI_SAS_SATA_PROTOCOL_NONDATA; |
468f4b8d | 77 | |
3ff0f0b6 XT |
78 | case ATA_CMD_SET_MAX: |
79 | switch (fis->features) { | |
80 | case ATA_SET_MAX_PASSWD: | |
81 | case ATA_SET_MAX_LOCK: | |
82 | return HISI_SAS_SATA_PROTOCOL_PIO; | |
468f4b8d | 83 | |
3ff0f0b6 XT |
84 | case ATA_SET_MAX_PASSWD_DMA: |
85 | case ATA_SET_MAX_UNLOCK_DMA: | |
86 | return HISI_SAS_SATA_PROTOCOL_DMA; | |
87 | ||
88 | default: | |
89 | return HISI_SAS_SATA_PROTOCOL_NONDATA; | |
468f4b8d | 90 | } |
3ff0f0b6 XT |
91 | |
92 | default: | |
93 | { | |
6c7bb8a1 XC |
94 | if (direction == DMA_NONE) |
95 | return HISI_SAS_SATA_PROTOCOL_NONDATA; | |
96 | return HISI_SAS_SATA_PROTOCOL_PIO; | |
97 | } | |
468f4b8d | 98 | } |
6c7bb8a1 XC |
99 | } |
100 | EXPORT_SYMBOL_GPL(hisi_sas_get_ata_protocol); | |
101 | ||
75904077 XC |
102 | void hisi_sas_sata_done(struct sas_task *task, |
103 | struct hisi_sas_slot *slot) | |
104 | { | |
105 | struct task_status_struct *ts = &task->task_status; | |
106 | struct ata_task_resp *resp = (struct ata_task_resp *)ts->buf; | |
f557e32c XT |
107 | struct hisi_sas_status_buffer *status_buf = |
108 | hisi_sas_status_buf_addr_mem(slot); | |
109 | u8 *iu = &status_buf->iu[0]; | |
110 | struct dev_to_host_fis *d2h = (struct dev_to_host_fis *)iu; | |
75904077 XC |
111 | |
112 | resp->frame_len = sizeof(struct dev_to_host_fis); | |
113 | memcpy(&resp->ending_fis[0], d2h, sizeof(struct dev_to_host_fis)); | |
114 | ||
115 | ts->buf_valid_size = sizeof(*resp); | |
116 | } | |
117 | EXPORT_SYMBOL_GPL(hisi_sas_sata_done); | |
118 | ||
c2c1d9de XC |
119 | /* |
120 | * This function assumes linkrate mask fits in 8 bits, which it | |
121 | * does for all HW versions supported. | |
122 | */ | |
123 | u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max) | |
124 | { | |
4a8bec88 | 125 | u8 rate = 0; |
c2c1d9de XC |
126 | int i; |
127 | ||
128 | max -= SAS_LINK_RATE_1_5_GBPS; | |
129 | for (i = 0; i <= max; i++) | |
130 | rate |= 1 << (i * 2); | |
131 | return rate; | |
132 | } | |
133 | EXPORT_SYMBOL_GPL(hisi_sas_get_prog_phy_linkrate_mask); | |
134 | ||
42e7a693 JG |
135 | static struct hisi_hba *dev_to_hisi_hba(struct domain_device *device) |
136 | { | |
137 | return device->port->ha->lldd_ha; | |
138 | } | |
139 | ||
2e244f0f JG |
140 | struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port) |
141 | { | |
142 | return container_of(sas_port, struct hisi_sas_port, sas_port); | |
143 | } | |
144 | EXPORT_SYMBOL_GPL(to_hisi_sas_port); | |
145 | ||
a25d0d3d XC |
146 | void hisi_sas_stop_phys(struct hisi_hba *hisi_hba) |
147 | { | |
148 | int phy_no; | |
149 | ||
150 | for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) | |
c63b88cc | 151 | hisi_sas_phy_enable(hisi_hba, phy_no, 0); |
a25d0d3d XC |
152 | } |
153 | EXPORT_SYMBOL_GPL(hisi_sas_stop_phys); | |
154 | ||
257efd1f JG |
155 | static void hisi_sas_slot_index_clear(struct hisi_hba *hisi_hba, int slot_idx) |
156 | { | |
157 | void *bitmap = hisi_hba->slot_index_tags; | |
158 | ||
4d6942e2 | 159 | __clear_bit(slot_idx, bitmap); |
257efd1f JG |
160 | } |
161 | ||
42e7a693 JG |
162 | static void hisi_sas_slot_index_free(struct hisi_hba *hisi_hba, int slot_idx) |
163 | { | |
93352abc | 164 | if (hisi_hba->hw->slot_index_alloc || |
ea44242b | 165 | slot_idx < HISI_SAS_RESERVED_IPTT) { |
e9dc5e11 | 166 | spin_lock(&hisi_hba->lock); |
784b46b7 | 167 | hisi_sas_slot_index_clear(hisi_hba, slot_idx); |
e9dc5e11 | 168 | spin_unlock(&hisi_hba->lock); |
784b46b7 | 169 | } |
42e7a693 JG |
170 | } |
171 | ||
172 | static void hisi_sas_slot_index_set(struct hisi_hba *hisi_hba, int slot_idx) | |
173 | { | |
174 | void *bitmap = hisi_hba->slot_index_tags; | |
175 | ||
4d6942e2 | 176 | __set_bit(slot_idx, bitmap); |
42e7a693 JG |
177 | } |
178 | ||
784b46b7 | 179 | static int hisi_sas_slot_index_alloc(struct hisi_hba *hisi_hba, |
295fd233 | 180 | struct request *rq) |
42e7a693 | 181 | { |
784b46b7 | 182 | int index; |
42e7a693 JG |
183 | void *bitmap = hisi_hba->slot_index_tags; |
184 | ||
295fd233 | 185 | if (rq) |
f7d190a9 | 186 | return rq->tag + HISI_SAS_RESERVED_IPTT; |
784b46b7 | 187 | |
e9dc5e11 | 188 | spin_lock(&hisi_hba->lock); |
f7d190a9 | 189 | index = find_next_zero_bit(bitmap, HISI_SAS_RESERVED_IPTT, |
784b46b7 | 190 | hisi_hba->last_slot_index + 1); |
f7d190a9 | 191 | if (index >= HISI_SAS_RESERVED_IPTT) { |
784b46b7 | 192 | index = find_next_zero_bit(bitmap, |
f7d190a9 JG |
193 | HISI_SAS_RESERVED_IPTT, |
194 | 0); | |
195 | if (index >= HISI_SAS_RESERVED_IPTT) { | |
e9dc5e11 | 196 | spin_unlock(&hisi_hba->lock); |
fa3be0f2 | 197 | return -SAS_QUEUE_FULL; |
784b46b7 | 198 | } |
fa3be0f2 | 199 | } |
42e7a693 | 200 | hisi_sas_slot_index_set(hisi_hba, index); |
fa3be0f2 | 201 | hisi_hba->last_slot_index = index; |
e9dc5e11 | 202 | spin_unlock(&hisi_hba->lock); |
fa3be0f2 | 203 | |
784b46b7 | 204 | return index; |
42e7a693 JG |
205 | } |
206 | ||
27a3f229 | 207 | void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, struct sas_task *task, |
71fb36b5 | 208 | struct hisi_sas_slot *slot, bool need_lock) |
27a3f229 | 209 | { |
4fefe5bb XC |
210 | int device_id = slot->device_id; |
211 | struct hisi_sas_device *sas_dev = &hisi_hba->devices[device_id]; | |
27a3f229 | 212 | |
d3c4dd4e | 213 | if (task) { |
11b75249 | 214 | struct device *dev = hisi_hba->dev; |
27a3f229 | 215 | |
6ba0fbc3 XT |
216 | if (!task->lldd_task) |
217 | return; | |
218 | ||
219 | task->lldd_task = NULL; | |
220 | ||
b3cce125 | 221 | if (!sas_protocol_ata(task->task_proto)) { |
f0902095 | 222 | if (slot->n_elem) { |
bc22f9c0 XC |
223 | if (task->task_proto & SAS_PROTOCOL_SSP) |
224 | dma_unmap_sg(dev, task->scatter, | |
225 | task->num_scatter, | |
226 | task->data_dir); | |
f0902095 XC |
227 | else |
228 | dma_unmap_sg(dev, &task->smp_task.smp_req, | |
229 | 1, DMA_TO_DEVICE); | |
230 | } | |
847e8355 XC |
231 | if (slot->n_elem_dif) { |
232 | struct sas_ssp_task *ssp_task = &task->ssp_task; | |
233 | struct scsi_cmnd *scsi_cmnd = ssp_task->cmd; | |
234 | ||
b3cce125 XC |
235 | dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd), |
236 | scsi_prot_sg_count(scsi_cmnd), | |
237 | task->data_dir); | |
847e8355 | 238 | } |
b3cce125 | 239 | } |
d3c4dd4e | 240 | } |
27a3f229 | 241 | |
71fb36b5 XY |
242 | if (need_lock) { |
243 | spin_lock(&sas_dev->lock); | |
244 | list_del_init(&slot->entry); | |
245 | spin_unlock(&sas_dev->lock); | |
246 | } else { | |
247 | list_del_init(&slot->entry); | |
248 | } | |
2ba5afb6 XC |
249 | |
250 | memset(slot, 0, offsetof(struct hisi_sas_slot, buf)); | |
251 | ||
27a3f229 | 252 | hisi_sas_slot_index_free(hisi_hba, slot->idx); |
27a3f229 JG |
253 | } |
254 | EXPORT_SYMBOL_GPL(hisi_sas_slot_task_free); | |
255 | ||
a2b3820b | 256 | static void hisi_sas_task_prep_smp(struct hisi_hba *hisi_hba, |
66ee999b JG |
257 | struct hisi_sas_slot *slot) |
258 | { | |
a2b3820b | 259 | hisi_hba->hw->prep_smp(hisi_hba, slot); |
66ee999b JG |
260 | } |
261 | ||
a2b3820b | 262 | static void hisi_sas_task_prep_ssp(struct hisi_hba *hisi_hba, |
78bd2b4f | 263 | struct hisi_sas_slot *slot) |
42e7a693 | 264 | { |
78bd2b4f | 265 | hisi_hba->hw->prep_ssp(hisi_hba, slot); |
42e7a693 JG |
266 | } |
267 | ||
a2b3820b | 268 | static void hisi_sas_task_prep_ata(struct hisi_hba *hisi_hba, |
6f2ff1a1 JG |
269 | struct hisi_sas_slot *slot) |
270 | { | |
a2b3820b | 271 | hisi_hba->hw->prep_stp(hisi_hba, slot); |
6f2ff1a1 JG |
272 | } |
273 | ||
a2b3820b | 274 | static void hisi_sas_task_prep_abort(struct hisi_hba *hisi_hba, |
095478a6 | 275 | struct hisi_sas_slot *slot) |
441c2740 | 276 | { |
095478a6 | 277 | hisi_hba->hw->prep_abort(hisi_hba, slot); |
441c2740 JG |
278 | } |
279 | ||
6e1b731b | 280 | static void hisi_sas_dma_unmap(struct hisi_hba *hisi_hba, |
bc22f9c0 | 281 | struct sas_task *task, int n_elem) |
6e1b731b XC |
282 | { |
283 | struct device *dev = hisi_hba->dev; | |
284 | ||
bc22f9c0 | 285 | if (!sas_protocol_ata(task->task_proto) && n_elem) { |
6e1b731b | 286 | if (task->num_scatter) { |
bc22f9c0 XC |
287 | dma_unmap_sg(dev, task->scatter, task->num_scatter, |
288 | task->data_dir); | |
6e1b731b | 289 | } else if (task->task_proto & SAS_PROTOCOL_SMP) { |
bc22f9c0 XC |
290 | dma_unmap_sg(dev, &task->smp_task.smp_req, |
291 | 1, DMA_TO_DEVICE); | |
6e1b731b XC |
292 | } |
293 | } | |
294 | } | |
295 | ||
296 | static int hisi_sas_dma_map(struct hisi_hba *hisi_hba, | |
bc22f9c0 | 297 | struct sas_task *task, int *n_elem) |
6e1b731b XC |
298 | { |
299 | struct device *dev = hisi_hba->dev; | |
300 | int rc; | |
301 | ||
302 | if (sas_protocol_ata(task->task_proto)) { | |
303 | *n_elem = task->num_scatter; | |
304 | } else { | |
5f6c32d7 | 305 | unsigned int req_len; |
6e1b731b XC |
306 | |
307 | if (task->num_scatter) { | |
308 | *n_elem = dma_map_sg(dev, task->scatter, | |
309 | task->num_scatter, task->data_dir); | |
310 | if (!*n_elem) { | |
311 | rc = -ENOMEM; | |
312 | goto prep_out; | |
313 | } | |
314 | } else if (task->task_proto & SAS_PROTOCOL_SMP) { | |
bc22f9c0 XC |
315 | *n_elem = dma_map_sg(dev, &task->smp_task.smp_req, |
316 | 1, DMA_TO_DEVICE); | |
317 | if (!*n_elem) { | |
6e1b731b XC |
318 | rc = -ENOMEM; |
319 | goto prep_out; | |
320 | } | |
321 | req_len = sg_dma_len(&task->smp_task.smp_req); | |
322 | if (req_len & 0x3) { | |
323 | rc = -EINVAL; | |
324 | goto err_out_dma_unmap; | |
325 | } | |
6e1b731b XC |
326 | } |
327 | } | |
328 | ||
329 | if (*n_elem > HISI_SAS_SGE_PAGE_CNT) { | |
b601577d | 330 | dev_err(dev, "task prep: n_elem(%d) > HISI_SAS_SGE_PAGE_CNT\n", |
6e1b731b XC |
331 | *n_elem); |
332 | rc = -EINVAL; | |
333 | goto err_out_dma_unmap; | |
334 | } | |
335 | return 0; | |
336 | ||
337 | err_out_dma_unmap: | |
338 | /* It would be better to call dma_unmap_sg() here, but it's messy */ | |
bc22f9c0 | 339 | hisi_sas_dma_unmap(hisi_hba, task, *n_elem); |
6e1b731b XC |
340 | prep_out: |
341 | return rc; | |
342 | } | |
343 | ||
b3cce125 XC |
344 | static void hisi_sas_dif_dma_unmap(struct hisi_hba *hisi_hba, |
345 | struct sas_task *task, int n_elem_dif) | |
346 | { | |
347 | struct device *dev = hisi_hba->dev; | |
348 | ||
349 | if (n_elem_dif) { | |
350 | struct sas_ssp_task *ssp_task = &task->ssp_task; | |
351 | struct scsi_cmnd *scsi_cmnd = ssp_task->cmd; | |
352 | ||
353 | dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd), | |
354 | scsi_prot_sg_count(scsi_cmnd), | |
355 | task->data_dir); | |
356 | } | |
357 | } | |
358 | ||
359 | static int hisi_sas_dif_dma_map(struct hisi_hba *hisi_hba, | |
360 | int *n_elem_dif, struct sas_task *task) | |
361 | { | |
362 | struct device *dev = hisi_hba->dev; | |
363 | struct sas_ssp_task *ssp_task; | |
364 | struct scsi_cmnd *scsi_cmnd; | |
365 | int rc; | |
366 | ||
367 | if (task->num_scatter) { | |
368 | ssp_task = &task->ssp_task; | |
369 | scsi_cmnd = ssp_task->cmd; | |
370 | ||
371 | if (scsi_prot_sg_count(scsi_cmnd)) { | |
372 | *n_elem_dif = dma_map_sg(dev, | |
373 | scsi_prot_sglist(scsi_cmnd), | |
374 | scsi_prot_sg_count(scsi_cmnd), | |
375 | task->data_dir); | |
376 | ||
377 | if (!*n_elem_dif) | |
378 | return -ENOMEM; | |
379 | ||
380 | if (*n_elem_dif > HISI_SAS_SGE_DIF_PAGE_CNT) { | |
381 | dev_err(dev, "task prep: n_elem_dif(%d) too large\n", | |
382 | *n_elem_dif); | |
383 | rc = -EINVAL; | |
384 | goto err_out_dif_dma_unmap; | |
385 | } | |
386 | } | |
387 | } | |
388 | ||
389 | return 0; | |
390 | ||
391 | err_out_dif_dma_unmap: | |
392 | dma_unmap_sg(dev, scsi_prot_sglist(scsi_cmnd), | |
393 | scsi_prot_sg_count(scsi_cmnd), task->data_dir); | |
394 | return rc; | |
395 | } | |
396 | ||
dc313f6b JG |
397 | static |
398 | void hisi_sas_task_deliver(struct hisi_hba *hisi_hba, | |
399 | struct hisi_sas_slot *slot, | |
400 | struct hisi_sas_dq *dq, | |
095478a6 | 401 | struct hisi_sas_device *sas_dev) |
42e7a693 | 402 | { |
dc313f6b JG |
403 | struct hisi_sas_cmd_hdr *cmd_hdr_base; |
404 | int dlvry_queue_slot, dlvry_queue; | |
405 | struct sas_task *task = slot->task; | |
fa222db0 | 406 | int wr_q_index; |
42e7a693 | 407 | |
e9dc5e11 | 408 | spin_lock(&dq->lock); |
897cc769 JG |
409 | wr_q_index = dq->wr_point; |
410 | dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS; | |
fa222db0 | 411 | list_add_tail(&slot->delivery, &dq->list); |
e9dc5e11 XC |
412 | spin_unlock(&dq->lock); |
413 | spin_lock(&sas_dev->lock); | |
4fefe5bb | 414 | list_add_tail(&slot->entry, &sas_dev->list); |
e9dc5e11 | 415 | spin_unlock(&sas_dev->lock); |
42e7a693 | 416 | |
b1a49412 | 417 | dlvry_queue = dq->id; |
fa222db0 | 418 | dlvry_queue_slot = wr_q_index; |
42e7a693 | 419 | |
4fefe5bb | 420 | slot->device_id = sas_dev->device_id; |
42e7a693 JG |
421 | slot->dlvry_queue = dlvry_queue; |
422 | slot->dlvry_queue_slot = dlvry_queue_slot; | |
423 | cmd_hdr_base = hisi_hba->cmd_hdr[dlvry_queue]; | |
424 | slot->cmd_hdr = &cmd_hdr_base[dlvry_queue_slot]; | |
dc313f6b | 425 | |
42e7a693 JG |
426 | task->lldd_task = slot; |
427 | ||
42e7a693 | 428 | memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); |
f557e32c | 429 | memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ); |
d380f555 XC |
430 | memset(hisi_sas_status_buf_addr_mem(slot), 0, |
431 | sizeof(struct hisi_sas_err_record)); | |
42e7a693 JG |
432 | |
433 | switch (task->task_proto) { | |
66ee999b | 434 | case SAS_PROTOCOL_SMP: |
a2b3820b | 435 | hisi_sas_task_prep_smp(hisi_hba, slot); |
66ee999b | 436 | break; |
42e7a693 | 437 | case SAS_PROTOCOL_SSP: |
78bd2b4f | 438 | hisi_sas_task_prep_ssp(hisi_hba, slot); |
42e7a693 JG |
439 | break; |
440 | case SAS_PROTOCOL_SATA: | |
441 | case SAS_PROTOCOL_STP: | |
095478a6 | 442 | case SAS_PROTOCOL_STP_ALL: |
a2b3820b | 443 | hisi_sas_task_prep_ata(hisi_hba, slot); |
6f2ff1a1 | 444 | break; |
095478a6 JG |
445 | case SAS_PROTOCOL_INTERNAL_ABORT: |
446 | hisi_sas_task_prep_abort(hisi_hba, slot); | |
447 | break; | |
42e7a693 | 448 | default: |
095478a6 | 449 | return; |
42e7a693 JG |
450 | } |
451 | ||
6c6ac8b7 JG |
452 | /* Make slot memories observable before marking as ready */ |
453 | smp_wmb(); | |
1c09b663 | 454 | WRITE_ONCE(slot->ready, 1); |
42e7a693 | 455 | |
0e462085 JG |
456 | spin_lock(&dq->lock); |
457 | hisi_hba->hw->start_delivery(dq); | |
458 | spin_unlock(&dq->lock); | |
42e7a693 JG |
459 | } |
460 | ||
96e54376 | 461 | static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags) |
42e7a693 | 462 | { |
bc22f9c0 | 463 | int n_elem = 0, n_elem_dif = 0; |
745b6847 XC |
464 | struct domain_device *device = task->dev; |
465 | struct asd_sas_port *sas_port = device->port; | |
dc313f6b | 466 | struct hisi_sas_device *sas_dev = device->lldd_dev; |
095478a6 | 467 | bool internal_abort = sas_is_internal_abort(task); |
2f6bca20 | 468 | struct hisi_sas_dq *dq = NULL; |
dc313f6b JG |
469 | struct hisi_sas_port *port; |
470 | struct hisi_hba *hisi_hba; | |
471 | struct hisi_sas_slot *slot; | |
295fd233 | 472 | struct request *rq = NULL; |
dc313f6b JG |
473 | struct device *dev; |
474 | int rc; | |
42e7a693 | 475 | |
745b6847 XC |
476 | if (!sas_port) { |
477 | struct task_status_struct *ts = &task->task_status; | |
478 | ||
479 | ts->resp = SAS_TASK_UNDELIVERED; | |
480 | ts->stat = SAS_PHY_DOWN; | |
481 | /* | |
482 | * libsas will use dev->port, should | |
483 | * not call task_done for sata | |
484 | */ | |
095478a6 | 485 | if (device->dev_type != SAS_SATA_DEV && !internal_abort) |
745b6847 XC |
486 | task->task_done(task); |
487 | return -ECOMM; | |
488 | } | |
489 | ||
490 | hisi_hba = dev_to_hisi_hba(device); | |
491 | dev = hisi_hba->dev; | |
492 | ||
095478a6 JG |
493 | switch (task->task_proto) { |
494 | case SAS_PROTOCOL_SSP: | |
495 | case SAS_PROTOCOL_SMP: | |
496 | case SAS_PROTOCOL_SATA: | |
497 | case SAS_PROTOCOL_STP: | |
498 | case SAS_PROTOCOL_STP_ALL: | |
499 | if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) { | |
500 | if (!gfpflags_allow_blocking(gfp_flags)) | |
501 | return -EINVAL; | |
214e702d | 502 | |
095478a6 JG |
503 | down(&hisi_hba->sem); |
504 | up(&hisi_hba->sem); | |
505 | } | |
06ec0fb9 | 506 | |
095478a6 JG |
507 | if (DEV_IS_GONE(sas_dev)) { |
508 | if (sas_dev) | |
509 | dev_info(dev, "task prep: device %d not ready\n", | |
510 | sas_dev->device_id); | |
511 | else | |
512 | dev_info(dev, "task prep: device %016llx not ready\n", | |
513 | SAS_ADDR(device->sas_addr)); | |
dc313f6b | 514 | |
095478a6 JG |
515 | return -ECOMM; |
516 | } | |
dc313f6b | 517 | |
095478a6 JG |
518 | port = to_hisi_sas_port(sas_port); |
519 | if (!port->port_attached) { | |
520 | dev_info(dev, "task prep: %s port%d not attach device\n", | |
521 | dev_is_sata(device) ? "SATA/STP" : "SAS", | |
522 | device->port->id); | |
dc313f6b | 523 | |
095478a6 | 524 | return -ECOMM; |
dc313f6b | 525 | } |
dc313f6b | 526 | |
295fd233 JG |
527 | rq = sas_task_find_rq(task); |
528 | if (rq) { | |
095478a6 JG |
529 | unsigned int dq_index; |
530 | u32 blk_tag; | |
dc313f6b | 531 | |
295fd233 | 532 | blk_tag = blk_mq_unique_tag(rq); |
095478a6 JG |
533 | dq_index = blk_mq_unique_tag_to_hwq(blk_tag); |
534 | dq = &hisi_hba->dq[dq_index]; | |
535 | } else { | |
0e47effa XC |
536 | int queue; |
537 | ||
538 | if (hisi_hba->iopoll_q_cnt) { | |
539 | /* | |
540 | * Use interrupt queue (queue 0) to deliver and complete | |
541 | * internal IOs of libsas or libata when there is at least | |
542 | * one iopoll queue | |
543 | */ | |
544 | queue = 0; | |
545 | } else { | |
546 | struct Scsi_Host *shost = hisi_hba->shost; | |
547 | struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT]; | |
dc313f6b | 548 | |
0e47effa XC |
549 | queue = qmap->mq_map[raw_smp_processor_id()]; |
550 | } | |
095478a6 JG |
551 | dq = &hisi_hba->dq[queue]; |
552 | } | |
553 | break; | |
554 | case SAS_PROTOCOL_INTERNAL_ABORT: | |
555 | if (!hisi_hba->hw->prep_abort) | |
556 | return TMF_RESP_FUNC_FAILED; | |
557 | ||
558 | if (test_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags)) | |
559 | return -EIO; | |
560 | ||
561 | hisi_hba = dev_to_hisi_hba(device); | |
562 | ||
563 | if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) | |
564 | return -EINVAL; | |
565 | ||
566 | port = to_hisi_sas_port(sas_port); | |
567 | dq = &hisi_hba->dq[task->abort_task.qid]; | |
568 | break; | |
569 | default: | |
570 | dev_err(hisi_hba->dev, "task prep: unknown/unsupported proto (0x%x)\n", | |
571 | task->task_proto); | |
572 | return -EINVAL; | |
dc313f6b JG |
573 | } |
574 | ||
bc22f9c0 | 575 | rc = hisi_sas_dma_map(hisi_hba, task, &n_elem); |
dc313f6b JG |
576 | if (rc < 0) |
577 | goto prep_out; | |
578 | ||
579 | if (!sas_protocol_ata(task->task_proto)) { | |
580 | rc = hisi_sas_dif_dma_map(hisi_hba, &n_elem_dif, task); | |
581 | if (rc < 0) | |
582 | goto err_out_dma_unmap; | |
583 | } | |
584 | ||
095478a6 | 585 | if (!internal_abort && hisi_hba->hw->slot_index_alloc) |
dc313f6b JG |
586 | rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device); |
587 | else | |
295fd233 | 588 | rc = hisi_sas_slot_index_alloc(hisi_hba, rq); |
dc313f6b JG |
589 | |
590 | if (rc < 0) | |
591 | goto err_out_dif_dma_unmap; | |
592 | ||
593 | slot = &hisi_hba->slot_info[rc]; | |
594 | slot->n_elem = n_elem; | |
595 | slot->n_elem_dif = n_elem_dif; | |
596 | slot->task = task; | |
597 | slot->port = port; | |
598 | ||
96e54376 | 599 | slot->tmf = task->tmf; |
095478a6 | 600 | slot->is_internal = !!task->tmf || internal_abort; |
dc313f6b | 601 | |
42e7a693 | 602 | /* protect task_prep and start_delivery sequence */ |
095478a6 | 603 | hisi_sas_task_deliver(hisi_hba, slot, dq, sas_dev); |
42e7a693 | 604 | |
dc313f6b JG |
605 | return 0; |
606 | ||
607 | err_out_dif_dma_unmap: | |
608 | if (!sas_protocol_ata(task->task_proto)) | |
609 | hisi_sas_dif_dma_unmap(hisi_hba, task, n_elem_dif); | |
610 | err_out_dma_unmap: | |
bc22f9c0 | 611 | hisi_sas_dma_unmap(hisi_hba, task, n_elem); |
dc313f6b JG |
612 | prep_out: |
613 | dev_err(dev, "task exec: failed[%d]!\n", rc); | |
42e7a693 JG |
614 | return rc; |
615 | } | |
257efd1f | 616 | |
26c7efc3 AD |
617 | static void hisi_sas_bytes_dmaed(struct hisi_hba *hisi_hba, int phy_no, |
618 | gfp_t gfp_flags) | |
66139921 JG |
619 | { |
620 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
621 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
66139921 JG |
622 | |
623 | if (!phy->phy_attached) | |
624 | return; | |
625 | ||
872a90b5 | 626 | sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags); |
66139921 JG |
627 | |
628 | if (sas_phy->phy) { | |
629 | struct sas_phy *sphy = sas_phy->phy; | |
630 | ||
631 | sphy->negotiated_linkrate = sas_phy->linkrate; | |
66139921 | 632 | sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; |
2ae75787 XC |
633 | sphy->maximum_linkrate_hw = |
634 | hisi_hba->hw->phy_get_max_linkrate(); | |
635 | if (sphy->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) | |
636 | sphy->minimum_linkrate = phy->minimum_linkrate; | |
637 | ||
638 | if (sphy->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) | |
639 | sphy->maximum_linkrate = phy->maximum_linkrate; | |
66139921 JG |
640 | } |
641 | ||
642 | if (phy->phy_type & PORT_TYPE_SAS) { | |
643 | struct sas_identify_frame *id; | |
644 | ||
645 | id = (struct sas_identify_frame *)phy->frame_rcvd; | |
646 | id->dev_type = phy->identify.device_type; | |
647 | id->initiator_bits = SAS_PROTOCOL_ALL; | |
648 | id->target_bits = phy->identify.target_port_protocols; | |
649 | } else if (phy->phy_type & PORT_TYPE_SATA) { | |
01d4e3a2 | 650 | /* Nothing */ |
66139921 JG |
651 | } |
652 | ||
653 | sas_phy->frame_rcvd_size = phy->frame_rcvd_size; | |
872a90b5 | 654 | sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags); |
66139921 JG |
655 | } |
656 | ||
abda97c2 JG |
657 | static struct hisi_sas_device *hisi_sas_alloc_dev(struct domain_device *device) |
658 | { | |
659 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
660 | struct hisi_sas_device *sas_dev = NULL; | |
1b865185 XC |
661 | int last = hisi_hba->last_dev_id; |
662 | int first = (hisi_hba->last_dev_id + 1) % HISI_SAS_MAX_DEVICES; | |
abda97c2 JG |
663 | int i; |
664 | ||
e9dc5e11 | 665 | spin_lock(&hisi_hba->lock); |
1b865185 | 666 | for (i = first; i != last; i %= HISI_SAS_MAX_DEVICES) { |
abda97c2 | 667 | if (hisi_hba->devices[i].dev_type == SAS_PHY_UNUSED) { |
b1a49412 XC |
668 | int queue = i % hisi_hba->queue_count; |
669 | struct hisi_sas_dq *dq = &hisi_hba->dq[queue]; | |
670 | ||
abda97c2 JG |
671 | hisi_hba->devices[i].device_id = i; |
672 | sas_dev = &hisi_hba->devices[i]; | |
57dbb2b2 | 673 | sas_dev->dev_status = HISI_SAS_DEV_INIT; |
abda97c2 JG |
674 | sas_dev->dev_type = device->dev_type; |
675 | sas_dev->hisi_hba = hisi_hba; | |
676 | sas_dev->sas_device = device; | |
b1a49412 | 677 | sas_dev->dq = dq; |
4fefe5bb | 678 | spin_lock_init(&sas_dev->lock); |
405314df | 679 | INIT_LIST_HEAD(&hisi_hba->devices[i].list); |
abda97c2 JG |
680 | break; |
681 | } | |
1b865185 | 682 | i++; |
abda97c2 | 683 | } |
1b865185 | 684 | hisi_hba->last_dev_id = i; |
e9dc5e11 | 685 | spin_unlock(&hisi_hba->lock); |
abda97c2 JG |
686 | |
687 | return sas_dev; | |
688 | } | |
689 | ||
b711ef5e XC |
690 | static void hisi_sas_sync_poll_cq(struct hisi_sas_cq *cq) |
691 | { | |
692 | /* make sure CQ entries being processed are processed to completion */ | |
693 | spin_lock(&cq->poll_lock); | |
694 | spin_unlock(&cq->poll_lock); | |
695 | } | |
696 | ||
697 | static bool hisi_sas_queue_is_poll(struct hisi_sas_cq *cq) | |
698 | { | |
699 | struct hisi_hba *hisi_hba = cq->hisi_hba; | |
700 | ||
701 | if (cq->id < hisi_hba->queue_count - hisi_hba->iopoll_q_cnt) | |
702 | return false; | |
703 | return true; | |
704 | } | |
705 | ||
706 | static void hisi_sas_sync_cq(struct hisi_sas_cq *cq) | |
707 | { | |
708 | if (hisi_sas_queue_is_poll(cq)) | |
709 | hisi_sas_sync_poll_cq(cq); | |
710 | else | |
711 | synchronize_irq(cq->irq_no); | |
712 | } | |
713 | ||
714 | void hisi_sas_sync_poll_cqs(struct hisi_hba *hisi_hba) | |
715 | { | |
716 | int i; | |
717 | ||
718 | for (i = 0; i < hisi_hba->queue_count; i++) { | |
719 | struct hisi_sas_cq *cq = &hisi_hba->cq[i]; | |
720 | ||
721 | if (hisi_sas_queue_is_poll(cq)) | |
722 | hisi_sas_sync_poll_cq(cq); | |
723 | } | |
724 | } | |
725 | EXPORT_SYMBOL_GPL(hisi_sas_sync_poll_cqs); | |
726 | ||
727 | void hisi_sas_sync_cqs(struct hisi_hba *hisi_hba) | |
728 | { | |
729 | int i; | |
730 | ||
731 | for (i = 0; i < hisi_hba->queue_count; i++) { | |
732 | struct hisi_sas_cq *cq = &hisi_hba->cq[i]; | |
733 | ||
734 | hisi_sas_sync_cq(cq); | |
735 | } | |
736 | } | |
737 | EXPORT_SYMBOL_GPL(hisi_sas_sync_cqs); | |
738 | ||
693e66a0 JG |
739 | static void hisi_sas_tmf_aborted(struct sas_task *task) |
740 | { | |
741 | struct hisi_sas_slot *slot = task->lldd_task; | |
742 | struct domain_device *device = task->dev; | |
743 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
744 | struct hisi_hba *hisi_hba = sas_dev->hisi_hba; | |
745 | ||
746 | if (slot) { | |
747 | struct hisi_sas_cq *cq = | |
748 | &hisi_hba->cq[slot->dlvry_queue]; | |
749 | /* | |
b711ef5e | 750 | * sync irq or poll queue to avoid free'ing task |
693e66a0 JG |
751 | * before using task in IO completion |
752 | */ | |
b711ef5e | 753 | hisi_sas_sync_cq(cq); |
693e66a0 JG |
754 | slot->task = NULL; |
755 | } | |
756 | } | |
757 | ||
b45e05aa | 758 | #define HISI_SAS_DISK_RECOVER_CNT 3 |
d5a60dfd XC |
759 | static int hisi_sas_init_device(struct domain_device *device) |
760 | { | |
761 | int rc = TMF_RESP_FUNC_COMPLETE; | |
762 | struct scsi_lun lun; | |
b45e05aa | 763 | int retry = HISI_SAS_DISK_RECOVER_CNT; |
d5a60dfd XC |
764 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); |
765 | ||
766 | switch (device->dev_type) { | |
767 | case SAS_END_DEVICE: | |
768 | int_to_scsilun(0, &lun); | |
769 | ||
b45e05aa | 770 | while (retry-- > 0) { |
037b4805 | 771 | rc = sas_abort_task_set(device, lun.scsi_lun); |
b45e05aa XC |
772 | if (rc == TMF_RESP_FUNC_COMPLETE) { |
773 | hisi_sas_release_task(hisi_hba, device); | |
774 | break; | |
775 | } | |
776 | } | |
d5a60dfd XC |
777 | break; |
778 | case SAS_SATA_DEV: | |
779 | case SAS_SATA_PM: | |
780 | case SAS_SATA_PM_PORT: | |
781 | case SAS_SATA_PENDING: | |
57dbb2b2 | 782 | /* |
e9dedc13 JG |
783 | * If an expander is swapped when a SATA disk is attached then |
784 | * we should issue a hard reset to clear previous affiliation | |
785 | * of STP target port, see SPL (chapter 6.19.4). | |
786 | * | |
787 | * However we don't need to issue a hard reset here for these | |
788 | * reasons: | |
789 | * a. When probing the device, libsas/libata already issues a | |
a76f1b63 | 790 | * hard reset in sas_probe_sata() -> ata_port_probe(). |
e9dedc13 JG |
791 | * Note that in hisi_sas_debug_I_T_nexus_reset() we take care |
792 | * to issue a hard reset by checking the dev status (== INIT). | |
793 | * b. When resetting the controller, this is simply unnecessary. | |
57dbb2b2 | 794 | */ |
d5a60dfd XC |
795 | while (retry-- > 0) { |
796 | rc = hisi_sas_softreset_ata_disk(device); | |
797 | if (!rc) | |
798 | break; | |
799 | } | |
800 | break; | |
801 | default: | |
802 | break; | |
803 | } | |
804 | ||
805 | return rc; | |
806 | } | |
807 | ||
36c6b761 XC |
808 | int hisi_sas_slave_alloc(struct scsi_device *sdev) |
809 | { | |
e9dedc13 JG |
810 | struct domain_device *ddev = sdev_to_domain_dev(sdev); |
811 | struct hisi_sas_device *sas_dev = ddev->lldd_dev; | |
36c6b761 XC |
812 | int rc; |
813 | ||
814 | rc = sas_slave_alloc(sdev); | |
815 | if (rc) | |
816 | return rc; | |
36c6b761 | 817 | |
e9dedc13 JG |
818 | rc = hisi_sas_init_device(ddev); |
819 | if (rc) | |
820 | return rc; | |
821 | sas_dev->dev_status = HISI_SAS_DEV_NORMAL; | |
822 | return 0; | |
36c6b761 XC |
823 | } |
824 | EXPORT_SYMBOL_GPL(hisi_sas_slave_alloc); | |
825 | ||
abda97c2 JG |
826 | static int hisi_sas_dev_found(struct domain_device *device) |
827 | { | |
828 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
829 | struct domain_device *parent_dev = device->parent; | |
830 | struct hisi_sas_device *sas_dev; | |
11b75249 | 831 | struct device *dev = hisi_hba->dev; |
d5a60dfd | 832 | int rc; |
abda97c2 | 833 | |
685b6d6e JG |
834 | if (hisi_hba->hw->alloc_dev) |
835 | sas_dev = hisi_hba->hw->alloc_dev(device); | |
836 | else | |
837 | sas_dev = hisi_sas_alloc_dev(device); | |
abda97c2 JG |
838 | if (!sas_dev) { |
839 | dev_err(dev, "fail alloc dev: max support %d devices\n", | |
840 | HISI_SAS_MAX_DEVICES); | |
841 | return -EINVAL; | |
842 | } | |
843 | ||
844 | device->lldd_dev = sas_dev; | |
845 | hisi_hba->hw->setup_itct(hisi_hba, sas_dev); | |
846 | ||
924a3541 | 847 | if (parent_dev && dev_is_expander(parent_dev->dev_type)) { |
abda97c2 | 848 | int phy_no; |
abda97c2 | 849 | |
f0ed7bd5 JY |
850 | phy_no = sas_find_attached_phy_id(&parent_dev->ex_dev, device); |
851 | if (phy_no < 0) { | |
abda97c2 JG |
852 | dev_info(dev, "dev found: no attached " |
853 | "dev:%016llx at ex:%016llx\n", | |
854 | SAS_ADDR(device->sas_addr), | |
855 | SAS_ADDR(parent_dev->sas_addr)); | |
f0ed7bd5 | 856 | rc = phy_no; |
d5a60dfd | 857 | goto err_out; |
abda97c2 JG |
858 | } |
859 | } | |
860 | ||
f1c88211 XC |
861 | dev_info(dev, "dev[%d:%x] found\n", |
862 | sas_dev->device_id, sas_dev->dev_type); | |
863 | ||
abda97c2 | 864 | return 0; |
d5a60dfd XC |
865 | |
866 | err_out: | |
867 | hisi_sas_dev_gone(device); | |
868 | return rc; | |
abda97c2 JG |
869 | } |
870 | ||
235bfc7f | 871 | int hisi_sas_slave_configure(struct scsi_device *sdev) |
31eec8a6 JG |
872 | { |
873 | struct domain_device *dev = sdev_to_domain_dev(sdev); | |
874 | int ret = sas_slave_configure(sdev); | |
875 | ||
876 | if (ret) | |
877 | return ret; | |
878 | if (!dev_is_sata(dev)) | |
879 | sas_change_queue_depth(sdev, 64); | |
880 | ||
881 | return 0; | |
882 | } | |
235bfc7f | 883 | EXPORT_SYMBOL_GPL(hisi_sas_slave_configure); |
31eec8a6 | 884 | |
235bfc7f | 885 | void hisi_sas_scan_start(struct Scsi_Host *shost) |
701f75ec JG |
886 | { |
887 | struct hisi_hba *hisi_hba = shost_priv(shost); | |
701f75ec | 888 | |
396b8044 | 889 | hisi_hba->hw->phys_init(hisi_hba); |
701f75ec | 890 | } |
235bfc7f | 891 | EXPORT_SYMBOL_GPL(hisi_sas_scan_start); |
701f75ec | 892 | |
235bfc7f | 893 | int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time) |
701f75ec JG |
894 | { |
895 | struct hisi_hba *hisi_hba = shost_priv(shost); | |
896 | struct sas_ha_struct *sha = &hisi_hba->sha; | |
897 | ||
396b8044 JG |
898 | /* Wait for PHY up interrupt to occur */ |
899 | if (time < HZ) | |
701f75ec JG |
900 | return 0; |
901 | ||
902 | sas_drain_work(sha); | |
903 | return 1; | |
904 | } | |
235bfc7f | 905 | EXPORT_SYMBOL_GPL(hisi_sas_scan_finished); |
701f75ec | 906 | |
ae9b69e8 XC |
907 | static void hisi_sas_phyup_work_common(struct work_struct *work, |
908 | enum hisi_sas_phy_event event) | |
66139921 JG |
909 | { |
910 | struct hisi_sas_phy *phy = | |
ae9b69e8 | 911 | container_of(work, typeof(*phy), works[event]); |
66139921 JG |
912 | struct hisi_hba *hisi_hba = phy->hisi_hba; |
913 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
914 | int phy_no = sas_phy->id; | |
915 | ||
366da0da | 916 | phy->wait_phyup_cnt = 0; |
569eddcf XC |
917 | if (phy->identify.target_port_protocols == SAS_PROTOCOL_SSP) |
918 | hisi_hba->hw->sl_notify_ssp(hisi_hba, phy_no); | |
26c7efc3 | 919 | hisi_sas_bytes_dmaed(hisi_hba, phy_no, GFP_KERNEL); |
66139921 | 920 | } |
976867e6 | 921 | |
ae9b69e8 XC |
922 | static void hisi_sas_phyup_work(struct work_struct *work) |
923 | { | |
924 | hisi_sas_phyup_work_common(work, HISI_PHYE_PHY_UP); | |
925 | } | |
926 | ||
057c3d1f XT |
927 | static void hisi_sas_linkreset_work(struct work_struct *work) |
928 | { | |
929 | struct hisi_sas_phy *phy = | |
930 | container_of(work, typeof(*phy), works[HISI_PHYE_LINK_RESET]); | |
931 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
932 | ||
933 | hisi_sas_control_phy(sas_phy, PHY_FUNC_LINK_RESET, NULL); | |
934 | } | |
935 | ||
ae9b69e8 XC |
936 | static void hisi_sas_phyup_pm_work(struct work_struct *work) |
937 | { | |
938 | struct hisi_sas_phy *phy = | |
939 | container_of(work, typeof(*phy), works[HISI_PHYE_PHY_UP_PM]); | |
940 | struct hisi_hba *hisi_hba = phy->hisi_hba; | |
941 | struct device *dev = hisi_hba->dev; | |
942 | ||
943 | hisi_sas_phyup_work_common(work, HISI_PHYE_PHY_UP_PM); | |
944 | pm_runtime_put_sync(dev); | |
945 | } | |
946 | ||
e537b62b XT |
947 | static const work_func_t hisi_sas_phye_fns[HISI_PHYES_NUM] = { |
948 | [HISI_PHYE_PHY_UP] = hisi_sas_phyup_work, | |
057c3d1f | 949 | [HISI_PHYE_LINK_RESET] = hisi_sas_linkreset_work, |
ae9b69e8 | 950 | [HISI_PHYE_PHY_UP_PM] = hisi_sas_phyup_pm_work, |
e537b62b XT |
951 | }; |
952 | ||
953 | bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, | |
954 | enum hisi_sas_phy_event event) | |
955 | { | |
956 | struct hisi_hba *hisi_hba = phy->hisi_hba; | |
957 | ||
958 | if (WARN_ON(event >= HISI_PHYES_NUM)) | |
959 | return false; | |
960 | ||
961 | return queue_work(hisi_hba->wq, &phy->works[event]); | |
962 | } | |
963 | EXPORT_SYMBOL_GPL(hisi_sas_notify_phy_event); | |
964 | ||
b6c9b15e XT |
965 | static void hisi_sas_wait_phyup_timedout(struct timer_list *t) |
966 | { | |
967 | struct hisi_sas_phy *phy = from_timer(phy, t, timer); | |
968 | struct hisi_hba *hisi_hba = phy->hisi_hba; | |
969 | struct device *dev = hisi_hba->dev; | |
970 | int phy_no = phy->sas_phy.id; | |
971 | ||
972 | dev_warn(dev, "phy%d wait phyup timeout, issuing link reset\n", phy_no); | |
973 | hisi_sas_notify_phy_event(phy, HISI_PHYE_LINK_RESET); | |
974 | } | |
975 | ||
366da0da LJ |
976 | #define HISI_SAS_WAIT_PHYUP_RETRIES 10 |
977 | ||
b6c9b15e XT |
978 | void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no) |
979 | { | |
980 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
981 | struct device *dev = hisi_hba->dev; | |
37310bad | 982 | unsigned long flags; |
b6c9b15e | 983 | |
e16b9ed6 | 984 | dev_dbg(dev, "phy%d OOB ready\n", phy_no); |
37310bad QL |
985 | spin_lock_irqsave(&phy->lock, flags); |
986 | if (phy->phy_attached) { | |
987 | spin_unlock_irqrestore(&phy->lock, flags); | |
e16b9ed6 | 988 | return; |
37310bad | 989 | } |
e16b9ed6 | 990 | |
b6c9b15e | 991 | if (!timer_pending(&phy->timer)) { |
366da0da LJ |
992 | if (phy->wait_phyup_cnt < HISI_SAS_WAIT_PHYUP_RETRIES) { |
993 | phy->wait_phyup_cnt++; | |
994 | phy->timer.expires = jiffies + | |
2f12a499 | 995 | HISI_SAS_WAIT_PHYUP_TIMEOUT; |
366da0da | 996 | add_timer(&phy->timer); |
37310bad QL |
997 | spin_unlock_irqrestore(&phy->lock, flags); |
998 | return; | |
366da0da | 999 | } |
37310bad QL |
1000 | |
1001 | dev_warn(dev, "phy%d failed to come up %d times, giving up\n", | |
1002 | phy_no, phy->wait_phyup_cnt); | |
1003 | phy->wait_phyup_cnt = 0; | |
b6c9b15e | 1004 | } |
37310bad | 1005 | spin_unlock_irqrestore(&phy->lock, flags); |
b6c9b15e | 1006 | } |
37310bad | 1007 | |
b6c9b15e XT |
1008 | EXPORT_SYMBOL_GPL(hisi_sas_phy_oob_ready); |
1009 | ||
976867e6 JG |
1010 | static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no) |
1011 | { | |
1012 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
1013 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
e537b62b | 1014 | int i; |
976867e6 JG |
1015 | |
1016 | phy->hisi_hba = hisi_hba; | |
1017 | phy->port = NULL; | |
eba8c20c XT |
1018 | phy->minimum_linkrate = SAS_LINK_RATE_1_5_GBPS; |
1019 | phy->maximum_linkrate = hisi_hba->hw->phy_get_max_linkrate(); | |
976867e6 | 1020 | sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0; |
976867e6 JG |
1021 | sas_phy->iproto = SAS_PROTOCOL_ALL; |
1022 | sas_phy->tproto = 0; | |
976867e6 JG |
1023 | sas_phy->role = PHY_ROLE_INITIATOR; |
1024 | sas_phy->oob_mode = OOB_NOT_CONNECTED; | |
1025 | sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN; | |
1026 | sas_phy->id = phy_no; | |
1027 | sas_phy->sas_addr = &hisi_hba->sas_addr[0]; | |
1028 | sas_phy->frame_rcvd = &phy->frame_rcvd[0]; | |
1029 | sas_phy->ha = (struct sas_ha_struct *)hisi_hba->shost->hostdata; | |
1030 | sas_phy->lldd_phy = phy; | |
66139921 | 1031 | |
e537b62b XT |
1032 | for (i = 0; i < HISI_PHYES_NUM; i++) |
1033 | INIT_WORK(&phy->works[i], hisi_sas_phye_fns[i]); | |
ce70c2e6 JG |
1034 | |
1035 | spin_lock_init(&phy->lock); | |
b6c9b15e XT |
1036 | |
1037 | timer_setup(&phy->timer, hisi_sas_wait_phyup_timedout, 0); | |
976867e6 JG |
1038 | } |
1039 | ||
c63b88cc JG |
1040 | /* Wrapper to ensure we track hisi_sas_phy.enable properly */ |
1041 | void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, int enable) | |
1042 | { | |
1043 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
1044 | struct asd_sas_phy *aphy = &phy->sas_phy; | |
1045 | struct sas_phy *sphy = aphy->phy; | |
1046 | unsigned long flags; | |
1047 | ||
1048 | spin_lock_irqsave(&phy->lock, flags); | |
1049 | ||
1050 | if (enable) { | |
1051 | /* We may have been enabled already; if so, don't touch */ | |
1052 | if (!phy->enable) | |
1053 | sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; | |
1054 | hisi_hba->hw->phy_start(hisi_hba, phy_no); | |
1055 | } else { | |
1056 | sphy->negotiated_linkrate = SAS_PHY_DISABLED; | |
1057 | hisi_hba->hw->phy_disable(hisi_hba, phy_no); | |
1058 | } | |
1059 | phy->enable = enable; | |
1060 | spin_unlock_irqrestore(&phy->lock, flags); | |
1061 | } | |
1062 | EXPORT_SYMBOL_GPL(hisi_sas_phy_enable); | |
1063 | ||
184a4635 JG |
1064 | static void hisi_sas_port_notify_formed(struct asd_sas_phy *sas_phy) |
1065 | { | |
184a4635 JG |
1066 | struct hisi_sas_phy *phy = sas_phy->lldd_phy; |
1067 | struct asd_sas_port *sas_port = sas_phy->port; | |
8c39673d | 1068 | struct hisi_sas_port *port; |
184a4635 JG |
1069 | |
1070 | if (!sas_port) | |
1071 | return; | |
1072 | ||
8c39673d | 1073 | port = to_hisi_sas_port(sas_port); |
184a4635 JG |
1074 | port->port_attached = 1; |
1075 | port->id = phy->port_id; | |
1076 | phy->port = port; | |
1077 | sas_port->lldd_port = port; | |
184a4635 JG |
1078 | } |
1079 | ||
d3c4dd4e | 1080 | static void hisi_sas_do_release_task(struct hisi_hba *hisi_hba, struct sas_task *task, |
71fb36b5 | 1081 | struct hisi_sas_slot *slot, bool need_lock) |
184a4635 | 1082 | { |
d3c4dd4e JG |
1083 | if (task) { |
1084 | unsigned long flags; | |
1085 | struct task_status_struct *ts; | |
184a4635 | 1086 | |
d3c4dd4e | 1087 | ts = &task->task_status; |
184a4635 | 1088 | |
d3c4dd4e JG |
1089 | ts->resp = SAS_TASK_COMPLETE; |
1090 | ts->stat = SAS_ABORTED_TASK; | |
1091 | spin_lock_irqsave(&task->task_state_lock, flags); | |
26fc0ea7 | 1092 | task->task_state_flags &= ~SAS_TASK_STATE_PENDING; |
47905957 XC |
1093 | if (!slot->is_internal && task->task_proto != SAS_PROTOCOL_SMP) |
1094 | task->task_state_flags |= SAS_TASK_STATE_DONE; | |
d3c4dd4e JG |
1095 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
1096 | } | |
184a4635 | 1097 | |
71fb36b5 | 1098 | hisi_sas_slot_task_free(hisi_hba, task, slot, need_lock); |
184a4635 JG |
1099 | } |
1100 | ||
1101 | static void hisi_sas_release_task(struct hisi_hba *hisi_hba, | |
1102 | struct domain_device *device) | |
1103 | { | |
405314df JG |
1104 | struct hisi_sas_slot *slot, *slot2; |
1105 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
184a4635 | 1106 | |
71fb36b5 | 1107 | spin_lock(&sas_dev->lock); |
405314df | 1108 | list_for_each_entry_safe(slot, slot2, &sas_dev->list, entry) |
71fb36b5 XY |
1109 | hisi_sas_do_release_task(hisi_hba, slot->task, slot, false); |
1110 | ||
1111 | spin_unlock(&sas_dev->lock); | |
184a4635 JG |
1112 | } |
1113 | ||
4d0951ee | 1114 | void hisi_sas_release_tasks(struct hisi_hba *hisi_hba) |
06ec0fb9 | 1115 | { |
405314df JG |
1116 | struct hisi_sas_device *sas_dev; |
1117 | struct domain_device *device; | |
06ec0fb9 XC |
1118 | int i; |
1119 | ||
405314df JG |
1120 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { |
1121 | sas_dev = &hisi_hba->devices[i]; | |
1122 | device = sas_dev->sas_device; | |
06ec0fb9 | 1123 | |
405314df JG |
1124 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) || |
1125 | !device) | |
06ec0fb9 | 1126 | continue; |
405314df JG |
1127 | |
1128 | hisi_sas_release_task(hisi_hba, device); | |
06ec0fb9 XC |
1129 | } |
1130 | } | |
4d0951ee | 1131 | EXPORT_SYMBOL_GPL(hisi_sas_release_tasks); |
06ec0fb9 | 1132 | |
d30ff263 XC |
1133 | static void hisi_sas_dereg_device(struct hisi_hba *hisi_hba, |
1134 | struct domain_device *device) | |
1135 | { | |
1136 | if (hisi_hba->hw->dereg_device) | |
1137 | hisi_hba->hw->dereg_device(hisi_hba, device); | |
1138 | } | |
1139 | ||
095478a6 JG |
1140 | static int |
1141 | hisi_sas_internal_task_abort_dev(struct hisi_sas_device *sas_dev, | |
1142 | bool rst_ha_timeout) | |
1143 | { | |
1144 | struct hisi_sas_internal_abort_data data = { rst_ha_timeout }; | |
1145 | struct domain_device *device = sas_dev->sas_device; | |
1146 | struct hisi_hba *hisi_hba = sas_dev->hisi_hba; | |
1147 | int i, rc; | |
1148 | ||
1149 | for (i = 0; i < hisi_hba->cq_nvecs; i++) { | |
1150 | struct hisi_sas_cq *cq = &hisi_hba->cq[i]; | |
1151 | const struct cpumask *mask = cq->irq_mask; | |
1152 | ||
1153 | if (mask && !cpumask_intersects(cpu_online_mask, mask)) | |
1154 | continue; | |
1155 | rc = sas_execute_internal_abort_dev(device, i, &data); | |
1156 | if (rc) | |
1157 | return rc; | |
1158 | } | |
1159 | ||
1160 | return 0; | |
1161 | } | |
1162 | ||
abda97c2 JG |
1163 | static void hisi_sas_dev_gone(struct domain_device *device) |
1164 | { | |
1165 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
1166 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
11b75249 | 1167 | struct device *dev = hisi_hba->dev; |
8fa9a7bd | 1168 | int ret = 0; |
abda97c2 | 1169 | |
f1c88211 | 1170 | dev_info(dev, "dev[%d:%x] is gone\n", |
abda97c2 JG |
1171 | sas_dev->device_id, sas_dev->dev_type); |
1172 | ||
e74006ed | 1173 | down(&hisi_hba->sem); |
b5a9fa20 | 1174 | if (!test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags)) { |
095478a6 | 1175 | hisi_sas_internal_task_abort_dev(sas_dev, true); |
40f2702b | 1176 | |
f8e45ec2 XC |
1177 | hisi_sas_dereg_device(hisi_hba, device); |
1178 | ||
8fa9a7bd | 1179 | ret = hisi_hba->hw->clear_itct(hisi_hba, sas_dev); |
f8e45ec2 | 1180 | device->lldd_dev = NULL; |
f8e45ec2 | 1181 | } |
d30ff263 | 1182 | |
0258141a XT |
1183 | if (hisi_hba->hw->free_device) |
1184 | hisi_hba->hw->free_device(sas_dev); | |
8fa9a7bd XC |
1185 | |
1186 | /* Don't mark it as SAS_PHY_UNUSED if failed to clear ITCT */ | |
1187 | if (!ret) | |
1188 | sas_dev->dev_type = SAS_PHY_UNUSED; | |
e74006ed XC |
1189 | sas_dev->sas_device = NULL; |
1190 | up(&hisi_hba->sem); | |
abda97c2 | 1191 | } |
42e7a693 | 1192 | |
eb44e4d7 | 1193 | static int hisi_sas_phy_set_linkrate(struct hisi_hba *hisi_hba, int phy_no, |
757db2da JG |
1194 | struct sas_phy_linkrates *r) |
1195 | { | |
1196 | struct sas_phy_linkrates _r; | |
1197 | ||
1198 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
1199 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
1200 | enum sas_linkrate min, max; | |
1201 | ||
eb44e4d7 LJ |
1202 | if (r->minimum_linkrate > SAS_LINK_RATE_1_5_GBPS) |
1203 | return -EINVAL; | |
1204 | ||
757db2da JG |
1205 | if (r->maximum_linkrate == SAS_LINK_RATE_UNKNOWN) { |
1206 | max = sas_phy->phy->maximum_linkrate; | |
1207 | min = r->minimum_linkrate; | |
1208 | } else if (r->minimum_linkrate == SAS_LINK_RATE_UNKNOWN) { | |
1209 | max = r->maximum_linkrate; | |
1210 | min = sas_phy->phy->minimum_linkrate; | |
1211 | } else | |
eb44e4d7 | 1212 | return -EINVAL; |
757db2da JG |
1213 | |
1214 | _r.maximum_linkrate = max; | |
1215 | _r.minimum_linkrate = min; | |
1216 | ||
5a54691f LJ |
1217 | sas_phy->phy->maximum_linkrate = max; |
1218 | sas_phy->phy->minimum_linkrate = min; | |
1219 | ||
c63b88cc | 1220 | hisi_sas_phy_enable(hisi_hba, phy_no, 0); |
757db2da JG |
1221 | msleep(100); |
1222 | hisi_hba->hw->phy_set_linkrate(hisi_hba, phy_no, &_r); | |
c63b88cc | 1223 | hisi_sas_phy_enable(hisi_hba, phy_no, 1); |
eb44e4d7 LJ |
1224 | |
1225 | return 0; | |
757db2da JG |
1226 | } |
1227 | ||
e4189d53 JG |
1228 | static int hisi_sas_control_phy(struct asd_sas_phy *sas_phy, enum phy_func func, |
1229 | void *funcdata) | |
1230 | { | |
046ab7d0 XC |
1231 | struct hisi_sas_phy *phy = container_of(sas_phy, |
1232 | struct hisi_sas_phy, sas_phy); | |
e4189d53 JG |
1233 | struct sas_ha_struct *sas_ha = sas_phy->ha; |
1234 | struct hisi_hba *hisi_hba = sas_ha->lldd_ha; | |
046ab7d0 XC |
1235 | struct device *dev = hisi_hba->dev; |
1236 | DECLARE_COMPLETION_ONSTACK(completion); | |
e4189d53 | 1237 | int phy_no = sas_phy->id; |
046ab7d0 XC |
1238 | u8 sts = phy->phy_attached; |
1239 | int ret = 0; | |
1240 | ||
20c63493 | 1241 | down(&hisi_hba->sem); |
046ab7d0 | 1242 | phy->reset_completion = &completion; |
e4189d53 JG |
1243 | |
1244 | switch (func) { | |
1245 | case PHY_FUNC_HARD_RESET: | |
1246 | hisi_hba->hw->phy_hard_reset(hisi_hba, phy_no); | |
1247 | break; | |
1248 | ||
1249 | case PHY_FUNC_LINK_RESET: | |
c63b88cc | 1250 | hisi_sas_phy_enable(hisi_hba, phy_no, 0); |
b4c67a6c | 1251 | msleep(100); |
c63b88cc | 1252 | hisi_sas_phy_enable(hisi_hba, phy_no, 1); |
e4189d53 JG |
1253 | break; |
1254 | ||
1255 | case PHY_FUNC_DISABLE: | |
c63b88cc | 1256 | hisi_sas_phy_enable(hisi_hba, phy_no, 0); |
046ab7d0 | 1257 | goto out; |
e4189d53 JG |
1258 | |
1259 | case PHY_FUNC_SET_LINK_RATE: | |
046ab7d0 XC |
1260 | ret = hisi_sas_phy_set_linkrate(hisi_hba, phy_no, funcdata); |
1261 | break; | |
1262 | ||
c52108c6 XT |
1263 | case PHY_FUNC_GET_EVENTS: |
1264 | if (hisi_hba->hw->get_events) { | |
1265 | hisi_hba->hw->get_events(hisi_hba, phy_no); | |
046ab7d0 | 1266 | goto out; |
c52108c6 | 1267 | } |
df561f66 | 1268 | fallthrough; |
e4189d53 JG |
1269 | case PHY_FUNC_RELEASE_SPINUP_HOLD: |
1270 | default: | |
046ab7d0 XC |
1271 | ret = -EOPNOTSUPP; |
1272 | goto out; | |
e4189d53 | 1273 | } |
046ab7d0 | 1274 | |
512623de XC |
1275 | if (sts && !wait_for_completion_timeout(&completion, |
1276 | HISI_SAS_WAIT_PHYUP_TIMEOUT)) { | |
046ab7d0 XC |
1277 | dev_warn(dev, "phy%d wait phyup timed out for func %d\n", |
1278 | phy_no, func); | |
1279 | if (phy->in_reset) | |
1280 | ret = -ETIMEDOUT; | |
1281 | } | |
1282 | ||
1283 | out: | |
1284 | phy->reset_completion = NULL; | |
1285 | ||
20c63493 | 1286 | up(&hisi_hba->sem); |
046ab7d0 | 1287 | return ret; |
e4189d53 | 1288 | } |
184a4635 | 1289 | |
7c594f04 XC |
1290 | static void hisi_sas_fill_ata_reset_cmd(struct ata_device *dev, |
1291 | bool reset, int pmp, u8 *fis) | |
1292 | { | |
1293 | struct ata_taskfile tf; | |
1294 | ||
1295 | ata_tf_init(dev, &tf); | |
1296 | if (reset) | |
1297 | tf.ctl |= ATA_SRST; | |
1298 | else | |
1299 | tf.ctl &= ~ATA_SRST; | |
1300 | tf.command = ATA_CMD_DEV_RESET; | |
1301 | ata_tf_to_fis(&tf, pmp, 0, fis); | |
1302 | } | |
1303 | ||
1304 | static int hisi_sas_softreset_ata_disk(struct domain_device *device) | |
1305 | { | |
1306 | u8 fis[20] = {0}; | |
1307 | struct ata_port *ap = device->sata_dev.ap; | |
1308 | struct ata_link *link; | |
1309 | int rc = TMF_RESP_FUNC_FAILED; | |
1310 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
11b75249 | 1311 | struct device *dev = hisi_hba->dev; |
7c594f04 XC |
1312 | |
1313 | ata_for_each_link(link, ap, EDGE) { | |
1314 | int pmp = sata_srst_pmp(link); | |
1315 | ||
1316 | hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis); | |
3f2e252e | 1317 | rc = sas_execute_ata_cmd(device, fis, -1); |
7c594f04 XC |
1318 | if (rc != TMF_RESP_FUNC_COMPLETE) |
1319 | break; | |
1320 | } | |
1321 | ||
1322 | if (rc == TMF_RESP_FUNC_COMPLETE) { | |
1323 | ata_for_each_link(link, ap, EDGE) { | |
1324 | int pmp = sata_srst_pmp(link); | |
1325 | ||
1326 | hisi_sas_fill_ata_reset_cmd(link->device, 0, pmp, fis); | |
3f2e252e | 1327 | rc = sas_execute_ata_cmd(device, fis, -1); |
7c594f04 | 1328 | if (rc != TMF_RESP_FUNC_COMPLETE) |
f4df167a LJ |
1329 | dev_err(dev, "ata disk %016llx de-reset failed\n", |
1330 | SAS_ADDR(device->sas_addr)); | |
7c594f04 XC |
1331 | } |
1332 | } else { | |
f4df167a LJ |
1333 | dev_err(dev, "ata disk %016llx reset failed\n", |
1334 | SAS_ADDR(device->sas_addr)); | |
7c594f04 XC |
1335 | } |
1336 | ||
e85d93b2 | 1337 | if (rc == TMF_RESP_FUNC_COMPLETE) |
7c594f04 | 1338 | hisi_sas_release_task(hisi_hba, device); |
7c594f04 XC |
1339 | |
1340 | return rc; | |
1341 | } | |
1342 | ||
a669bdbf | 1343 | static void hisi_sas_refresh_port_id(struct hisi_hba *hisi_hba) |
917d3bda | 1344 | { |
a669bdbf | 1345 | u32 state = hisi_hba->hw->get_phys_state(hisi_hba); |
917d3bda XT |
1346 | int i; |
1347 | ||
1348 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { | |
a669bdbf XT |
1349 | struct hisi_sas_device *sas_dev = &hisi_hba->devices[i]; |
1350 | struct domain_device *device = sas_dev->sas_device; | |
1351 | struct asd_sas_port *sas_port; | |
1352 | struct hisi_sas_port *port; | |
1353 | struct hisi_sas_phy *phy = NULL; | |
1354 | struct asd_sas_phy *sas_phy; | |
1355 | ||
917d3bda | 1356 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) |
a669bdbf | 1357 | || !device || !device->port) |
917d3bda XT |
1358 | continue; |
1359 | ||
a669bdbf XT |
1360 | sas_port = device->port; |
1361 | port = to_hisi_sas_port(sas_port); | |
1362 | ||
29e2bac8 | 1363 | spin_lock(&sas_port->phy_list_lock); |
a669bdbf XT |
1364 | list_for_each_entry(sas_phy, &sas_port->phy_list, port_phy_el) |
1365 | if (state & BIT(sas_phy->id)) { | |
1366 | phy = sas_phy->lldd_phy; | |
1367 | break; | |
1368 | } | |
29e2bac8 | 1369 | spin_unlock(&sas_port->phy_list_lock); |
a669bdbf XT |
1370 | |
1371 | if (phy) { | |
1372 | port->id = phy->port_id; | |
917d3bda | 1373 | |
a669bdbf XT |
1374 | /* Update linkrate of directly attached device. */ |
1375 | if (!device->parent) | |
1376 | device->linkrate = phy->sas_phy.linkrate; | |
917d3bda | 1377 | |
a669bdbf | 1378 | hisi_hba->hw->setup_itct(hisi_hba, sas_dev); |
f58c8970 | 1379 | } else if (!port->port_attached) |
a669bdbf | 1380 | port->id = 0xff; |
917d3bda XT |
1381 | } |
1382 | } | |
1383 | ||
4bc05809 | 1384 | static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state) |
917d3bda | 1385 | { |
917d3bda XT |
1386 | struct asd_sas_port *_sas_port = NULL; |
1387 | int phy_no; | |
1388 | ||
1389 | for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { | |
1390 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
1391 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
1392 | struct asd_sas_port *sas_port = sas_phy->port; | |
964231aa | 1393 | bool do_port_check = _sas_port != sas_port; |
917d3bda XT |
1394 | |
1395 | if (!sas_phy->phy->enabled) | |
1396 | continue; | |
1397 | ||
1398 | /* Report PHY state change to libsas */ | |
a669bdbf XT |
1399 | if (state & BIT(phy_no)) { |
1400 | if (do_port_check && sas_port && sas_port->port_dev) { | |
917d3bda XT |
1401 | struct domain_device *dev = sas_port->port_dev; |
1402 | ||
1403 | _sas_port = sas_port; | |
917d3bda | 1404 | |
924a3541 | 1405 | if (dev_is_expander(dev->dev_type)) |
872a90b5 | 1406 | sas_notify_port_event(sas_phy, |
26c7efc3 AD |
1407 | PORTE_BROADCAST_RCVD, |
1408 | GFP_KERNEL); | |
917d3bda | 1409 | } |
447f78c0 | 1410 | } else { |
26c7efc3 | 1411 | hisi_sas_phy_down(hisi_hba, phy_no, 0, GFP_KERNEL); |
447f78c0 | 1412 | } |
917d3bda | 1413 | } |
917d3bda XT |
1414 | } |
1415 | ||
6175abde XT |
1416 | static void hisi_sas_reset_init_all_devices(struct hisi_hba *hisi_hba) |
1417 | { | |
1418 | struct hisi_sas_device *sas_dev; | |
1419 | struct domain_device *device; | |
1420 | int i; | |
1421 | ||
1422 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { | |
1423 | sas_dev = &hisi_hba->devices[i]; | |
1424 | device = sas_dev->sas_device; | |
1425 | ||
1426 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device) | |
1427 | continue; | |
1428 | ||
1429 | hisi_sas_init_device(device); | |
1430 | } | |
1431 | } | |
1432 | ||
31709548 XT |
1433 | static void hisi_sas_send_ata_reset_each_phy(struct hisi_hba *hisi_hba, |
1434 | struct asd_sas_port *sas_port, | |
1435 | struct domain_device *device) | |
1436 | { | |
31709548 XT |
1437 | struct ata_port *ap = device->sata_dev.ap; |
1438 | struct device *dev = hisi_hba->dev; | |
31709548 | 1439 | int rc = TMF_RESP_FUNC_FAILED; |
31709548 XT |
1440 | struct ata_link *link; |
1441 | u8 fis[20] = {0}; | |
29e2bac8 | 1442 | int i; |
31709548 | 1443 | |
29e2bac8 | 1444 | for (i = 0; i < hisi_hba->n_phy; i++) { |
29e2bac8 XC |
1445 | if (!(sas_port->phy_mask & BIT(i))) |
1446 | continue; | |
31709548 XT |
1447 | |
1448 | ata_for_each_link(link, ap, EDGE) { | |
1449 | int pmp = sata_srst_pmp(link); | |
1450 | ||
31709548 | 1451 | hisi_sas_fill_ata_reset_cmd(link->device, 1, pmp, fis); |
3f2e252e | 1452 | rc = sas_execute_ata_cmd(device, fis, i); |
31709548 XT |
1453 | if (rc != TMF_RESP_FUNC_COMPLETE) { |
1454 | dev_err(dev, "phy%d ata reset failed rc=%d\n", | |
29e2bac8 | 1455 | i, rc); |
31709548 XT |
1456 | break; |
1457 | } | |
1458 | } | |
1459 | } | |
1460 | } | |
1461 | ||
1462 | static void hisi_sas_terminate_stp_reject(struct hisi_hba *hisi_hba) | |
1463 | { | |
1464 | struct device *dev = hisi_hba->dev; | |
1465 | int port_no, rc, i; | |
1466 | ||
1467 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { | |
1468 | struct hisi_sas_device *sas_dev = &hisi_hba->devices[i]; | |
1469 | struct domain_device *device = sas_dev->sas_device; | |
1470 | ||
1471 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device) | |
1472 | continue; | |
1473 | ||
095478a6 | 1474 | rc = hisi_sas_internal_task_abort_dev(sas_dev, false); |
31709548 XT |
1475 | if (rc < 0) |
1476 | dev_err(dev, "STP reject: abort dev failed %d\n", rc); | |
1477 | } | |
1478 | ||
1479 | for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) { | |
1480 | struct hisi_sas_port *port = &hisi_hba->port[port_no]; | |
1481 | struct asd_sas_port *sas_port = &port->sas_port; | |
1482 | struct domain_device *port_dev = sas_port->port_dev; | |
1483 | struct domain_device *device; | |
1484 | ||
924a3541 | 1485 | if (!port_dev || !dev_is_expander(port_dev->dev_type)) |
31709548 XT |
1486 | continue; |
1487 | ||
1488 | /* Try to find a SATA device */ | |
1489 | list_for_each_entry(device, &sas_port->dev_list, | |
1490 | dev_list_node) { | |
1491 | if (dev_is_sata(device)) { | |
1492 | hisi_sas_send_ata_reset_each_phy(hisi_hba, | |
1493 | sas_port, | |
1494 | device); | |
1495 | break; | |
1496 | } | |
1497 | } | |
1498 | } | |
1499 | } | |
1500 | ||
4522204a | 1501 | void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba) |
06ec0fb9 | 1502 | { |
917d3bda | 1503 | struct Scsi_Host *shost = hisi_hba->shost; |
06ec0fb9 | 1504 | |
4522204a | 1505 | hisi_hba->phy_state = hisi_hba->hw->get_phys_state(hisi_hba); |
06ec0fb9 | 1506 | |
917d3bda | 1507 | scsi_block_requests(shost); |
a865ae14 XT |
1508 | hisi_hba->hw->wait_cmds_complete_timeout(hisi_hba, 100, 5000); |
1509 | ||
080b4f97 | 1510 | del_timer_sync(&hisi_hba->timer); |
6f7c32d6 | 1511 | |
917d3bda | 1512 | set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); |
4522204a XT |
1513 | } |
1514 | EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_prepare); | |
1515 | ||
89954f02 YL |
1516 | static void hisi_sas_async_init_wait_phyup(void *data, async_cookie_t cookie) |
1517 | { | |
1518 | struct hisi_sas_phy *phy = data; | |
1519 | struct hisi_hba *hisi_hba = phy->hisi_hba; | |
1520 | struct device *dev = hisi_hba->dev; | |
1521 | DECLARE_COMPLETION_ONSTACK(completion); | |
1522 | int phy_no = phy->sas_phy.id; | |
1523 | ||
1524 | phy->reset_completion = &completion; | |
1525 | hisi_sas_phy_enable(hisi_hba, phy_no, 1); | |
1526 | if (!wait_for_completion_timeout(&completion, | |
1527 | HISI_SAS_WAIT_PHYUP_TIMEOUT)) | |
1528 | dev_warn(dev, "phy%d wait phyup timed out\n", phy_no); | |
1529 | ||
1530 | phy->reset_completion = NULL; | |
1531 | } | |
1532 | ||
4522204a XT |
1533 | void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba) |
1534 | { | |
1535 | struct Scsi_Host *shost = hisi_hba->shost; | |
89954f02 YL |
1536 | ASYNC_DOMAIN_EXCLUSIVE(async); |
1537 | int phy_no; | |
917d3bda | 1538 | |
917d3bda | 1539 | /* Init and wait for PHYs to come up and all libsas event finished. */ |
89954f02 YL |
1540 | for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { |
1541 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
1542 | ||
1543 | if (!(hisi_hba->phy_state & BIT(phy_no))) | |
1544 | continue; | |
1545 | ||
1546 | async_schedule_domain(hisi_sas_async_init_wait_phyup, | |
1547 | phy, &async); | |
1548 | } | |
1549 | ||
1550 | async_synchronize_full_domain(&async); | |
a669bdbf | 1551 | hisi_sas_refresh_port_id(hisi_hba); |
214e702d | 1552 | clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); |
31709548 XT |
1553 | |
1554 | if (hisi_hba->reject_stp_links_msk) | |
1555 | hisi_sas_terminate_stp_reject(hisi_hba); | |
6175abde | 1556 | hisi_sas_reset_init_all_devices(hisi_hba); |
fb51e7a8 | 1557 | scsi_unblock_requests(shost); |
b5a9fa20 | 1558 | clear_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags); |
16775db6 | 1559 | up(&hisi_hba->sem); |
917d3bda | 1560 | |
69f4ec1e | 1561 | hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state); |
4522204a XT |
1562 | } |
1563 | EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_done); | |
1564 | ||
2c74cb1f | 1565 | static int hisi_sas_controller_prereset(struct hisi_hba *hisi_hba) |
4522204a | 1566 | { |
4522204a XT |
1567 | if (!hisi_hba->hw->soft_reset) |
1568 | return -1; | |
1569 | ||
16775db6 QL |
1570 | down(&hisi_hba->sem); |
1571 | if (test_and_set_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags)) { | |
1572 | up(&hisi_hba->sem); | |
4522204a | 1573 | return -1; |
16775db6 | 1574 | } |
4522204a | 1575 | |
2c74cb1f JX |
1576 | if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct[0].itct) |
1577 | hisi_hba->hw->debugfs_snapshot_regs(hisi_hba); | |
1578 | ||
1579 | return 0; | |
1580 | } | |
1581 | ||
1582 | static int hisi_sas_controller_reset(struct hisi_hba *hisi_hba) | |
1583 | { | |
1584 | struct device *dev = hisi_hba->dev; | |
1585 | struct Scsi_Host *shost = hisi_hba->shost; | |
1586 | int rc; | |
1587 | ||
4522204a XT |
1588 | dev_info(dev, "controller resetting...\n"); |
1589 | hisi_sas_controller_reset_prepare(hisi_hba); | |
1590 | ||
1591 | rc = hisi_hba->hw->soft_reset(hisi_hba); | |
1592 | if (rc) { | |
1593 | dev_warn(dev, "controller reset failed (%d)\n", rc); | |
1594 | clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); | |
1595 | up(&hisi_hba->sem); | |
1596 | scsi_unblock_requests(shost); | |
b5a9fa20 | 1597 | clear_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags); |
4522204a XT |
1598 | return rc; |
1599 | } | |
bc555115 | 1600 | clear_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags); |
4522204a XT |
1601 | |
1602 | hisi_sas_controller_reset_done(hisi_hba); | |
fb51e7a8 | 1603 | dev_info(dev, "controller reset complete\n"); |
06ec0fb9 | 1604 | |
214e702d | 1605 | return 0; |
06ec0fb9 XC |
1606 | } |
1607 | ||
0efff300 JG |
1608 | static int hisi_sas_abort_task(struct sas_task *task) |
1609 | { | |
095478a6 | 1610 | struct hisi_sas_internal_abort_data internal_abort_data = { false }; |
0efff300 JG |
1611 | struct domain_device *device = task->dev; |
1612 | struct hisi_sas_device *sas_dev = device->lldd_dev; | |
4b329abc | 1613 | struct hisi_sas_slot *slot = task->lldd_task; |
c6ef8954 XC |
1614 | struct hisi_hba *hisi_hba; |
1615 | struct device *dev; | |
0efff300 JG |
1616 | int rc = TMF_RESP_FUNC_FAILED; |
1617 | unsigned long flags; | |
1618 | ||
c6ef8954 | 1619 | if (!sas_dev) |
0efff300 | 1620 | return TMF_RESP_FUNC_FAILED; |
c6ef8954 XC |
1621 | |
1622 | hisi_hba = dev_to_hisi_hba(task->dev); | |
1623 | dev = hisi_hba->dev; | |
0efff300 | 1624 | |
b81b6cce | 1625 | spin_lock_irqsave(&task->task_state_lock, flags); |
0efff300 | 1626 | if (task->task_state_flags & SAS_TASK_STATE_DONE) { |
584f53fe XC |
1627 | struct hisi_sas_cq *cq; |
1628 | ||
1629 | if (slot) { | |
1630 | /* | |
b711ef5e | 1631 | * sync irq or poll queue to avoid free'ing task |
584f53fe XC |
1632 | * before using task in IO completion |
1633 | */ | |
1634 | cq = &hisi_hba->cq[slot->dlvry_queue]; | |
b711ef5e | 1635 | hisi_sas_sync_cq(cq); |
584f53fe | 1636 | } |
b81b6cce | 1637 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
0efff300 JG |
1638 | rc = TMF_RESP_FUNC_COMPLETE; |
1639 | goto out; | |
1640 | } | |
b81b6cce XC |
1641 | task->task_state_flags |= SAS_TASK_STATE_ABORTED; |
1642 | spin_unlock_irqrestore(&task->task_state_lock, flags); | |
0efff300 | 1643 | |
4b329abc | 1644 | if (slot && task->task_proto & SAS_PROTOCOL_SSP) { |
735bcc77 | 1645 | u16 tag = slot->idx; |
c35279f2 | 1646 | int rc2; |
0efff300 | 1647 | |
4fea759e | 1648 | rc = sas_abort_task(task, tag); |
095478a6 JG |
1649 | rc2 = sas_execute_internal_abort_single(device, tag, |
1650 | slot->dlvry_queue, &internal_abort_data); | |
813709f2 XT |
1651 | if (rc2 < 0) { |
1652 | dev_err(dev, "abort task: internal abort (%d)\n", rc2); | |
1653 | return TMF_RESP_FUNC_FAILED; | |
1654 | } | |
1655 | ||
c35279f2 JG |
1656 | /* |
1657 | * If the TMF finds that the IO is not in the device and also | |
1658 | * the internal abort does not succeed, then it is safe to | |
1659 | * free the slot. | |
1660 | * Note: if the internal abort succeeds then the slot | |
1661 | * will have already been completed | |
1662 | */ | |
1663 | if (rc == TMF_RESP_FUNC_COMPLETE && rc2 != TMF_RESP_FUNC_SUCC) { | |
e85d93b2 | 1664 | if (task->lldd_task) |
71fb36b5 | 1665 | hisi_sas_do_release_task(hisi_hba, task, slot, true); |
0efff300 | 1666 | } |
0efff300 JG |
1667 | } else if (task->task_proto & SAS_PROTOCOL_SATA || |
1668 | task->task_proto & SAS_PROTOCOL_STP) { | |
1669 | if (task->dev->dev_type == SAS_SATA_DEV) { | |
930d97da XY |
1670 | struct ata_queued_cmd *qc = task->uldd_task; |
1671 | ||
095478a6 | 1672 | rc = hisi_sas_internal_task_abort_dev(sas_dev, false); |
813709f2 XT |
1673 | if (rc < 0) { |
1674 | dev_err(dev, "abort task: internal abort failed\n"); | |
1675 | goto out; | |
1676 | } | |
d30ff263 | 1677 | hisi_sas_dereg_device(hisi_hba, device); |
930d97da XY |
1678 | |
1679 | /* | |
1680 | * If an ATA internal command times out in ATA EH, it | |
1681 | * need to execute soft reset, so check the scsicmd | |
1682 | */ | |
1683 | if ((sas_dev->dev_status == HISI_SAS_DEV_NCQ_ERR) && | |
1684 | qc && qc->scsicmd) { | |
71fb36b5 | 1685 | hisi_sas_do_release_task(hisi_hba, task, slot, true); |
930d97da XY |
1686 | rc = TMF_RESP_FUNC_COMPLETE; |
1687 | } else { | |
1688 | rc = hisi_sas_softreset_ata_disk(device); | |
1689 | } | |
0efff300 | 1690 | } |
4b329abc | 1691 | } else if (slot && task->task_proto & SAS_PROTOCOL_SMP) { |
dc8a49ca | 1692 | /* SMP */ |
dc8a49ca | 1693 | u32 tag = slot->idx; |
584f53fe | 1694 | struct hisi_sas_cq *cq = &hisi_hba->cq[slot->dlvry_queue]; |
0efff300 | 1695 | |
095478a6 JG |
1696 | rc = sas_execute_internal_abort_single(device, |
1697 | tag, slot->dlvry_queue, | |
1698 | &internal_abort_data); | |
813709f2 | 1699 | if (((rc < 0) || (rc == TMF_RESP_FUNC_FAILED)) && |
584f53fe XC |
1700 | task->lldd_task) { |
1701 | /* | |
b711ef5e | 1702 | * sync irq or poll queue to avoid free'ing task |
584f53fe XC |
1703 | * before using task in IO completion |
1704 | */ | |
b711ef5e | 1705 | hisi_sas_sync_cq(cq); |
584f53fe XC |
1706 | slot->task = NULL; |
1707 | } | |
0efff300 JG |
1708 | } |
1709 | ||
1710 | out: | |
1711 | if (rc != TMF_RESP_FUNC_COMPLETE) | |
1712 | dev_notice(dev, "abort task: rc=%d\n", rc); | |
1713 | return rc; | |
1714 | } | |
1715 | ||
1716 | static int hisi_sas_abort_task_set(struct domain_device *device, u8 *lun) | |
1717 | { | |
095478a6 | 1718 | struct hisi_sas_device *sas_dev = device->lldd_dev; |
2a038131 XT |
1719 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); |
1720 | struct device *dev = hisi_hba->dev; | |
01d4e3a2 | 1721 | int rc; |
2a038131 | 1722 | |
095478a6 | 1723 | rc = hisi_sas_internal_task_abort_dev(sas_dev, false); |
2a038131 XT |
1724 | if (rc < 0) { |
1725 | dev_err(dev, "abort task set: internal abort rc=%d\n", rc); | |
1726 | return TMF_RESP_FUNC_FAILED; | |
1727 | } | |
1728 | hisi_sas_dereg_device(hisi_hba, device); | |
0efff300 | 1729 | |
69b80a0e | 1730 | rc = sas_abort_task_set(device, lun); |
e85d93b2 | 1731 | if (rc == TMF_RESP_FUNC_COMPLETE) |
2a038131 | 1732 | hisi_sas_release_task(hisi_hba, device); |
2a038131 | 1733 | |
0efff300 JG |
1734 | return rc; |
1735 | } | |
1736 | ||
0efff300 JG |
1737 | static int hisi_sas_debug_I_T_nexus_reset(struct domain_device *device) |
1738 | { | |
3e1fb1b8 | 1739 | struct sas_phy *local_phy = sas_get_local_phy(device); |
57dbb2b2 | 1740 | struct hisi_sas_device *sas_dev = device->lldd_dev; |
3e1fb1b8 XC |
1741 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); |
1742 | struct sas_ha_struct *sas_ha = &hisi_hba->sha; | |
57dbb2b2 | 1743 | int rc, reset_type; |
3e1fb1b8 | 1744 | |
c2bae4f7 LJ |
1745 | if (!local_phy->enabled) { |
1746 | sas_put_local_phy(local_phy); | |
1747 | return -ENODEV; | |
1748 | } | |
1749 | ||
3e1fb1b8 | 1750 | if (scsi_is_sas_phy_local(local_phy)) { |
445ee2de LJ |
1751 | struct asd_sas_phy *sas_phy = |
1752 | sas_ha->sas_phy[local_phy->number]; | |
1753 | struct hisi_sas_phy *phy = | |
1754 | container_of(sas_phy, struct hisi_sas_phy, sas_phy); | |
046ab7d0 XC |
1755 | unsigned long flags; |
1756 | ||
1757 | spin_lock_irqsave(&phy->lock, flags); | |
3e1fb1b8 | 1758 | phy->in_reset = 1; |
046ab7d0 | 1759 | spin_unlock_irqrestore(&phy->lock, flags); |
3e1fb1b8 XC |
1760 | } |
1761 | ||
57dbb2b2 | 1762 | reset_type = (sas_dev->dev_status == HISI_SAS_DEV_INIT || |
af01b2b9 | 1763 | !dev_is_sata(device)) ? true : false; |
57dbb2b2 | 1764 | |
3e1fb1b8 XC |
1765 | rc = sas_phy_reset(local_phy, reset_type); |
1766 | sas_put_local_phy(local_phy); | |
1767 | ||
1768 | if (scsi_is_sas_phy_local(local_phy)) { | |
445ee2de LJ |
1769 | struct asd_sas_phy *sas_phy = |
1770 | sas_ha->sas_phy[local_phy->number]; | |
1771 | struct hisi_sas_phy *phy = | |
1772 | container_of(sas_phy, struct hisi_sas_phy, sas_phy); | |
3e1fb1b8 XC |
1773 | unsigned long flags; |
1774 | ||
1775 | spin_lock_irqsave(&phy->lock, flags); | |
3e1fb1b8 XC |
1776 | phy->in_reset = 0; |
1777 | spin_unlock_irqrestore(&phy->lock, flags); | |
1778 | ||
1779 | /* report PHY down if timed out */ | |
046ab7d0 | 1780 | if (rc == -ETIMEDOUT) |
26c7efc3 | 1781 | hisi_sas_phy_down(hisi_hba, sas_phy->id, 0, GFP_KERNEL); |
71453bd9 JG |
1782 | return rc; |
1783 | } | |
1784 | ||
3c2673a0 | 1785 | /* Remote phy */ |
71453bd9 JG |
1786 | if (rc) |
1787 | return rc; | |
1788 | ||
71453bd9 | 1789 | if (dev_is_sata(device)) { |
3c2673a0 JZ |
1790 | struct ata_link *link = &device->sata_dev.ap->link; |
1791 | ||
1792 | rc = ata_wait_after_reset(link, HISI_SAS_WAIT_PHYUP_TIMEOUT, | |
1793 | smp_ata_check_ready_type); | |
71453bd9 JG |
1794 | } else { |
1795 | msleep(2000); | |
57dbb2b2 | 1796 | } |
3e1fb1b8 | 1797 | |
0efff300 JG |
1798 | return rc; |
1799 | } | |
1800 | ||
1801 | static int hisi_sas_I_T_nexus_reset(struct domain_device *device) | |
1802 | { | |
095478a6 | 1803 | struct hisi_sas_device *sas_dev = device->lldd_dev; |
0efff300 | 1804 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); |
813709f2 | 1805 | struct device *dev = hisi_hba->dev; |
4a8bec88 | 1806 | int rc; |
0efff300 | 1807 | |
930d97da XY |
1808 | if (sas_dev->dev_status == HISI_SAS_DEV_NCQ_ERR) |
1809 | sas_dev->dev_status = HISI_SAS_DEV_NORMAL; | |
1810 | ||
095478a6 | 1811 | rc = hisi_sas_internal_task_abort_dev(sas_dev, false); |
813709f2 XT |
1812 | if (rc < 0) { |
1813 | dev_err(dev, "I_T nexus reset: internal abort (%d)\n", rc); | |
1814 | return TMF_RESP_FUNC_FAILED; | |
1815 | } | |
d30ff263 XC |
1816 | hisi_sas_dereg_device(hisi_hba, device); |
1817 | ||
21c7e972 LJ |
1818 | rc = hisi_sas_debug_I_T_nexus_reset(device); |
1819 | if (rc == TMF_RESP_FUNC_COMPLETE && dev_is_sata(device)) { | |
1820 | struct sas_phy *local_phy; | |
1821 | ||
0e83fc61 | 1822 | rc = hisi_sas_softreset_ata_disk(device); |
21c7e972 LJ |
1823 | switch (rc) { |
1824 | case -ECOMM: | |
1825 | rc = -ENODEV; | |
1826 | break; | |
1827 | case TMF_RESP_FUNC_FAILED: | |
1828 | case -EMSGSIZE: | |
1829 | case -EIO: | |
1830 | local_phy = sas_get_local_phy(device); | |
1831 | rc = sas_phy_enable(local_phy, 0); | |
1832 | if (!rc) { | |
1833 | local_phy->enabled = 0; | |
1834 | dev_err(dev, "Disabled local phy of ATA disk %016llx due to softreset fail (%d)\n", | |
1835 | SAS_ADDR(device->sas_addr), rc); | |
1836 | rc = -ENODEV; | |
1837 | } | |
1838 | sas_put_local_phy(local_phy); | |
1839 | break; | |
1840 | default: | |
1841 | break; | |
1842 | } | |
0e83fc61 LJ |
1843 | } |
1844 | ||
e85d93b2 | 1845 | if ((rc == TMF_RESP_FUNC_COMPLETE) || (rc == -ENODEV)) |
6131243a | 1846 | hisi_sas_release_task(hisi_hba, device); |
e85d93b2 | 1847 | |
6131243a | 1848 | return rc; |
0efff300 JG |
1849 | } |
1850 | ||
1851 | static int hisi_sas_lu_reset(struct domain_device *device, u8 *lun) | |
1852 | { | |
0efff300 JG |
1853 | struct hisi_sas_device *sas_dev = device->lldd_dev; |
1854 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
11b75249 | 1855 | struct device *dev = hisi_hba->dev; |
0efff300 JG |
1856 | int rc = TMF_RESP_FUNC_FAILED; |
1857 | ||
a5ac1f5d | 1858 | /* Clear internal IO and then lu reset */ |
095478a6 | 1859 | rc = hisi_sas_internal_task_abort_dev(sas_dev, false); |
a5ac1f5d LJ |
1860 | if (rc < 0) { |
1861 | dev_err(dev, "lu_reset: internal abort failed\n"); | |
1862 | goto out; | |
1863 | } | |
1864 | hisi_sas_dereg_device(hisi_hba, device); | |
1865 | ||
055945df JG |
1866 | if (dev_is_sata(device)) { |
1867 | struct sas_phy *phy; | |
1868 | ||
055945df JG |
1869 | phy = sas_get_local_phy(device); |
1870 | ||
af01b2b9 | 1871 | rc = sas_phy_reset(phy, true); |
055945df | 1872 | |
e85d93b2 | 1873 | if (rc == 0) |
055945df | 1874 | hisi_sas_release_task(hisi_hba, device); |
055945df JG |
1875 | sas_put_local_phy(phy); |
1876 | } else { | |
29d77690 | 1877 | rc = sas_lu_reset(device, lun); |
e85d93b2 | 1878 | if (rc == TMF_RESP_FUNC_COMPLETE) |
055945df | 1879 | hisi_sas_release_task(hisi_hba, device); |
055945df JG |
1880 | } |
1881 | out: | |
14d3f397 | 1882 | if (rc != TMF_RESP_FUNC_COMPLETE) |
ad604832 | 1883 | dev_err(dev, "lu_reset: for device[%d]:rc= %d\n", |
14d3f397 | 1884 | sas_dev->device_id, rc); |
0efff300 JG |
1885 | return rc; |
1886 | } | |
1887 | ||
0f757339 LJ |
1888 | static void hisi_sas_async_I_T_nexus_reset(void *data, async_cookie_t cookie) |
1889 | { | |
1890 | struct domain_device *device = data; | |
1891 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); | |
1892 | int rc; | |
1893 | ||
1894 | rc = hisi_sas_debug_I_T_nexus_reset(device); | |
1895 | if (rc != TMF_RESP_FUNC_COMPLETE) | |
1896 | dev_info(hisi_hba->dev, "I_T_nexus reset fail for dev:%016llx rc=%d\n", | |
1897 | SAS_ADDR(device->sas_addr), rc); | |
1898 | } | |
1899 | ||
8b05ad6a JG |
1900 | static int hisi_sas_clear_nexus_ha(struct sas_ha_struct *sas_ha) |
1901 | { | |
1902 | struct hisi_hba *hisi_hba = sas_ha->lldd_ha; | |
e402acdb | 1903 | HISI_SAS_DECLARE_RST_WORK_ON_STACK(r); |
0f757339 | 1904 | ASYNC_DOMAIN_EXCLUSIVE(async); |
94a3555d | 1905 | int i; |
8b05ad6a | 1906 | |
e402acdb XT |
1907 | queue_work(hisi_hba->wq, &r.work); |
1908 | wait_for_completion(r.completion); | |
94a3555d JZ |
1909 | if (!r.done) |
1910 | return TMF_RESP_FUNC_FAILED; | |
f2ae8d04 XT |
1911 | |
1912 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { | |
1913 | struct hisi_sas_device *sas_dev = &hisi_hba->devices[i]; | |
1914 | struct domain_device *device = sas_dev->sas_device; | |
1915 | ||
1916 | if ((sas_dev->dev_type == SAS_PHY_UNUSED) || !device || | |
924a3541 | 1917 | dev_is_expander(device->dev_type)) |
f2ae8d04 XT |
1918 | continue; |
1919 | ||
0f757339 LJ |
1920 | async_schedule_domain(hisi_sas_async_I_T_nexus_reset, |
1921 | device, &async); | |
f2ae8d04 XT |
1922 | } |
1923 | ||
0f757339 | 1924 | async_synchronize_full_domain(&async); |
f2ae8d04 | 1925 | hisi_sas_release_tasks(hisi_hba); |
e402acdb | 1926 | |
94a3555d | 1927 | return TMF_RESP_FUNC_COMPLETE; |
8b05ad6a JG |
1928 | } |
1929 | ||
0efff300 JG |
1930 | static int hisi_sas_query_task(struct sas_task *task) |
1931 | { | |
0efff300 JG |
1932 | int rc = TMF_RESP_FUNC_FAILED; |
1933 | ||
1934 | if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { | |
0efff300 JG |
1935 | struct hisi_sas_slot *slot = task->lldd_task; |
1936 | u32 tag = slot->idx; | |
1937 | ||
72f8810e | 1938 | rc = sas_query_task(task, tag); |
0efff300 JG |
1939 | switch (rc) { |
1940 | /* The task is still in Lun, release it then */ | |
1941 | case TMF_RESP_FUNC_SUCC: | |
1942 | /* The task is not in Lun or failed, reset the phy */ | |
1943 | case TMF_RESP_FUNC_FAILED: | |
1944 | case TMF_RESP_FUNC_COMPLETE: | |
1945 | break; | |
997ee43c XC |
1946 | default: |
1947 | rc = TMF_RESP_FUNC_FAILED; | |
1948 | break; | |
0efff300 JG |
1949 | } |
1950 | } | |
1951 | return rc; | |
1952 | } | |
1953 | ||
095478a6 JG |
1954 | static bool hisi_sas_internal_abort_timeout(struct sas_task *task, |
1955 | void *data) | |
441c2740 JG |
1956 | { |
1957 | struct domain_device *device = task->dev; | |
095478a6 JG |
1958 | struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); |
1959 | struct hisi_sas_internal_abort_data *timeout = data; | |
441c2740 | 1960 | |
095478a6 JG |
1961 | if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct[0].itct) |
1962 | queue_work(hisi_hba->wq, &hisi_hba->debugfs_work); | |
c35279f2 | 1963 | |
095478a6 JG |
1964 | if (task->task_state_flags & SAS_TASK_STATE_DONE) { |
1965 | pr_err("Internal abort: timeout %016llx\n", | |
1966 | SAS_ADDR(device->sas_addr)); | |
1967 | } else { | |
1968 | struct hisi_sas_slot *slot = task->lldd_task; | |
441c2740 | 1969 | |
095478a6 | 1970 | set_bit(HISI_SAS_HW_FAULT_BIT, &hisi_hba->flags); |
441c2740 | 1971 | |
095478a6 JG |
1972 | if (slot) { |
1973 | struct hisi_sas_cq *cq = | |
1974 | &hisi_hba->cq[slot->dlvry_queue]; | |
1975 | /* | |
b711ef5e | 1976 | * sync irq or poll queue to avoid free'ing task |
095478a6 JG |
1977 | * before using task in IO completion |
1978 | */ | |
b711ef5e | 1979 | hisi_sas_sync_cq(cq); |
095478a6 JG |
1980 | slot->task = NULL; |
1981 | } | |
795f25a3 | 1982 | |
095478a6 JG |
1983 | if (timeout->rst_ha_timeout) { |
1984 | pr_err("Internal abort: timeout and not done %016llx. Queuing reset.\n", | |
1985 | SAS_ADDR(device->sas_addr)); | |
1986 | queue_work(hisi_hba->wq, &hisi_hba->rst_work); | |
1987 | } else { | |
1988 | pr_err("Internal abort: timeout and not done %016llx.\n", | |
1989 | SAS_ADDR(device->sas_addr)); | |
795f25a3 | 1990 | } |
095478a6 JG |
1991 | |
1992 | return true; | |
795f25a3 JG |
1993 | } |
1994 | ||
095478a6 | 1995 | return false; |
795f25a3 JG |
1996 | } |
1997 | ||
184a4635 JG |
1998 | static void hisi_sas_port_formed(struct asd_sas_phy *sas_phy) |
1999 | { | |
2000 | hisi_sas_port_notify_formed(sas_phy); | |
2001 | } | |
2002 | ||
6379c560 XT |
2003 | static int hisi_sas_write_gpio(struct sas_ha_struct *sha, u8 reg_type, |
2004 | u8 reg_index, u8 reg_count, u8 *write_data) | |
2005 | { | |
2006 | struct hisi_hba *hisi_hba = sha->lldd_ha; | |
2007 | ||
2008 | if (!hisi_hba->hw->write_gpio) | |
2009 | return -EOPNOTSUPP; | |
2010 | ||
2011 | return hisi_hba->hw->write_gpio(hisi_hba, reg_type, | |
2012 | reg_index, reg_count, write_data); | |
2013 | } | |
2014 | ||
184a4635 JG |
2015 | static void hisi_sas_phy_disconnected(struct hisi_sas_phy *phy) |
2016 | { | |
efdcad62 JG |
2017 | struct asd_sas_phy *sas_phy = &phy->sas_phy; |
2018 | struct sas_phy *sphy = sas_phy->phy; | |
c63b88cc | 2019 | unsigned long flags; |
efdcad62 | 2020 | |
184a4635 JG |
2021 | phy->phy_attached = 0; |
2022 | phy->phy_type = 0; | |
2023 | phy->port = NULL; | |
efdcad62 | 2024 | |
c63b88cc JG |
2025 | spin_lock_irqsave(&phy->lock, flags); |
2026 | if (phy->enable) | |
efdcad62 JG |
2027 | sphy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; |
2028 | else | |
2029 | sphy->negotiated_linkrate = SAS_PHY_DISABLED; | |
c63b88cc | 2030 | spin_unlock_irqrestore(&phy->lock, flags); |
184a4635 JG |
2031 | } |
2032 | ||
26c7efc3 AD |
2033 | void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy, |
2034 | gfp_t gfp_flags) | |
184a4635 JG |
2035 | { |
2036 | struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; | |
2037 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
3e1fb1b8 | 2038 | struct device *dev = hisi_hba->dev; |
184a4635 JG |
2039 | |
2040 | if (rdy) { | |
2041 | /* Phy down but ready */ | |
26c7efc3 | 2042 | hisi_sas_bytes_dmaed(hisi_hba, phy_no, gfp_flags); |
184a4635 JG |
2043 | hisi_sas_port_notify_formed(sas_phy); |
2044 | } else { | |
2045 | struct hisi_sas_port *port = phy->port; | |
2046 | ||
b5a9fa20 | 2047 | if (test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags) || |
ed99e1d9 | 2048 | phy->in_reset) { |
3e1fb1b8 XC |
2049 | dev_info(dev, "ignore flutter phy%d down\n", phy_no); |
2050 | return; | |
2051 | } | |
184a4635 | 2052 | /* Phy down and not ready */ |
872a90b5 | 2053 | sas_notify_phy_event(sas_phy, PHYE_LOSS_OF_SIGNAL, gfp_flags); |
184a4635 JG |
2054 | sas_phy_disconnected(sas_phy); |
2055 | ||
2056 | if (port) { | |
2057 | if (phy->phy_type & PORT_TYPE_SAS) { | |
2058 | int port_id = port->id; | |
2059 | ||
2060 | if (!hisi_hba->hw->get_wideport_bitmap(hisi_hba, | |
2061 | port_id)) | |
2062 | port->port_attached = 0; | |
2063 | } else if (phy->phy_type & PORT_TYPE_SATA) | |
2064 | port->port_attached = 0; | |
2065 | } | |
2066 | hisi_sas_phy_disconnected(phy); | |
2067 | } | |
2068 | } | |
2069 | EXPORT_SYMBOL_GPL(hisi_sas_phy_down); | |
2070 | ||
e9b6bada JG |
2071 | void hisi_sas_phy_bcast(struct hisi_sas_phy *phy) |
2072 | { | |
2073 | struct asd_sas_phy *sas_phy = &phy->sas_phy; | |
2074 | struct hisi_hba *hisi_hba = phy->hisi_hba; | |
2075 | ||
2076 | if (test_bit(HISI_SAS_RESETTING_BIT, &hisi_hba->flags)) | |
2077 | return; | |
2078 | ||
2079 | sas_notify_port_event(sas_phy, PORTE_BROADCAST_RCVD, GFP_ATOMIC); | |
2080 | } | |
2081 | EXPORT_SYMBOL_GPL(hisi_sas_phy_bcast); | |
2082 | ||
a97fa586 XC |
2083 | int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type) |
2084 | { | |
2085 | struct hisi_hba *hisi_hba = shost_priv(shost); | |
2086 | ||
2087 | if (reset_type != SCSI_ADAPTER_RESET) | |
2088 | return -EOPNOTSUPP; | |
2089 | ||
2090 | queue_work(hisi_hba->wq, &hisi_hba->rst_work); | |
2091 | ||
2092 | return 0; | |
2093 | } | |
2094 | EXPORT_SYMBOL_GPL(hisi_sas_host_reset); | |
2095 | ||
e21fe3a5 JG |
2096 | struct scsi_transport_template *hisi_sas_stt; |
2097 | EXPORT_SYMBOL_GPL(hisi_sas_stt); | |
e8899fad JG |
2098 | |
2099 | static struct sas_domain_function_template hisi_sas_transport_ops = { | |
abda97c2 JG |
2100 | .lldd_dev_found = hisi_sas_dev_found, |
2101 | .lldd_dev_gone = hisi_sas_dev_gone, | |
42e7a693 | 2102 | .lldd_execute_task = hisi_sas_queue_command, |
e4189d53 | 2103 | .lldd_control_phy = hisi_sas_control_phy, |
0efff300 JG |
2104 | .lldd_abort_task = hisi_sas_abort_task, |
2105 | .lldd_abort_task_set = hisi_sas_abort_task_set, | |
0efff300 JG |
2106 | .lldd_I_T_nexus_reset = hisi_sas_I_T_nexus_reset, |
2107 | .lldd_lu_reset = hisi_sas_lu_reset, | |
2108 | .lldd_query_task = hisi_sas_query_task, | |
640208a1 | 2109 | .lldd_clear_nexus_ha = hisi_sas_clear_nexus_ha, |
184a4635 | 2110 | .lldd_port_formed = hisi_sas_port_formed, |
640208a1 | 2111 | .lldd_write_gpio = hisi_sas_write_gpio, |
693e66a0 | 2112 | .lldd_tmf_aborted = hisi_sas_tmf_aborted, |
095478a6 | 2113 | .lldd_abort_timeout = hisi_sas_internal_abort_timeout, |
e8899fad JG |
2114 | }; |
2115 | ||
06ec0fb9 XC |
2116 | void hisi_sas_init_mem(struct hisi_hba *hisi_hba) |
2117 | { | |
93352abc | 2118 | int i, s, j, max_command_entries = HISI_SAS_MAX_COMMANDS; |
26889e5e | 2119 | struct hisi_sas_breakpoint *sata_breakpoint = hisi_hba->sata_breakpoint; |
06ec0fb9 XC |
2120 | |
2121 | for (i = 0; i < hisi_hba->queue_count; i++) { | |
2122 | struct hisi_sas_cq *cq = &hisi_hba->cq[i]; | |
2123 | struct hisi_sas_dq *dq = &hisi_hba->dq[i]; | |
26889e5e JG |
2124 | struct hisi_sas_cmd_hdr *cmd_hdr = hisi_hba->cmd_hdr[i]; |
2125 | ||
2126 | s = sizeof(struct hisi_sas_cmd_hdr); | |
2127 | for (j = 0; j < HISI_SAS_QUEUE_SLOTS; j++) | |
2128 | memset(&cmd_hdr[j], 0, s); | |
06ec0fb9 | 2129 | |
06ec0fb9 XC |
2130 | dq->wr_point = 0; |
2131 | ||
2132 | s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS; | |
2133 | memset(hisi_hba->complete_hdr[i], 0, s); | |
2134 | cq->rd_point = 0; | |
2135 | } | |
2136 | ||
2137 | s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy; | |
2138 | memset(hisi_hba->initial_fis, 0, s); | |
2139 | ||
2140 | s = max_command_entries * sizeof(struct hisi_sas_iost); | |
2141 | memset(hisi_hba->iost, 0, s); | |
2142 | ||
2143 | s = max_command_entries * sizeof(struct hisi_sas_breakpoint); | |
2144 | memset(hisi_hba->breakpoint, 0, s); | |
2145 | ||
26889e5e JG |
2146 | s = sizeof(struct hisi_sas_sata_breakpoint); |
2147 | for (j = 0; j < HISI_SAS_MAX_ITCT_ENTRIES; j++) | |
2148 | memset(&sata_breakpoint[j], 0, s); | |
06ec0fb9 XC |
2149 | } |
2150 | EXPORT_SYMBOL_GPL(hisi_sas_init_mem); | |
2151 | ||
ae68b566 | 2152 | int hisi_sas_alloc(struct hisi_hba *hisi_hba) |
6be6de18 | 2153 | { |
11b75249 | 2154 | struct device *dev = hisi_hba->dev; |
93352abc | 2155 | int i, j, s, max_command_entries = HISI_SAS_MAX_COMMANDS; |
2ba5afb6 XC |
2156 | int max_command_entries_ru, sz_slot_buf_ru; |
2157 | int blk_cnt, slots_per_blk; | |
6be6de18 | 2158 | |
d2fc401e | 2159 | sema_init(&hisi_hba->sem, 1); |
fa42d80d | 2160 | spin_lock_init(&hisi_hba->lock); |
976867e6 JG |
2161 | for (i = 0; i < hisi_hba->n_phy; i++) { |
2162 | hisi_sas_phy_init(hisi_hba, i); | |
2163 | hisi_hba->port[i].port_attached = 0; | |
2164 | hisi_hba->port[i].id = -1; | |
976867e6 JG |
2165 | } |
2166 | ||
af740dbe JG |
2167 | for (i = 0; i < HISI_SAS_MAX_DEVICES; i++) { |
2168 | hisi_hba->devices[i].dev_type = SAS_PHY_UNUSED; | |
2169 | hisi_hba->devices[i].device_id = i; | |
57dbb2b2 | 2170 | hisi_hba->devices[i].dev_status = HISI_SAS_DEV_INIT; |
af740dbe JG |
2171 | } |
2172 | ||
6be6de18 | 2173 | for (i = 0; i < hisi_hba->queue_count; i++) { |
9101a079 | 2174 | struct hisi_sas_cq *cq = &hisi_hba->cq[i]; |
4fde02ad | 2175 | struct hisi_sas_dq *dq = &hisi_hba->dq[i]; |
9101a079 JG |
2176 | |
2177 | /* Completion queue structure */ | |
2178 | cq->id = i; | |
2179 | cq->hisi_hba = hisi_hba; | |
0e47effa | 2180 | spin_lock_init(&cq->poll_lock); |
9101a079 | 2181 | |
4fde02ad | 2182 | /* Delivery queue structure */ |
39bade0c | 2183 | spin_lock_init(&dq->lock); |
fa222db0 | 2184 | INIT_LIST_HEAD(&dq->list); |
4fde02ad JG |
2185 | dq->id = i; |
2186 | dq->hisi_hba = hisi_hba; | |
2187 | ||
6be6de18 JG |
2188 | /* Delivery queue */ |
2189 | s = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS; | |
4e63ac82 XC |
2190 | hisi_hba->cmd_hdr[i] = dmam_alloc_coherent(dev, s, |
2191 | &hisi_hba->cmd_hdr_dma[i], | |
2192 | GFP_KERNEL); | |
6be6de18 JG |
2193 | if (!hisi_hba->cmd_hdr[i]) |
2194 | goto err_out; | |
6be6de18 JG |
2195 | |
2196 | /* Completion queue */ | |
2197 | s = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS; | |
4e63ac82 XC |
2198 | hisi_hba->complete_hdr[i] = dmam_alloc_coherent(dev, s, |
2199 | &hisi_hba->complete_hdr_dma[i], | |
2200 | GFP_KERNEL); | |
6be6de18 JG |
2201 | if (!hisi_hba->complete_hdr[i]) |
2202 | goto err_out; | |
6be6de18 JG |
2203 | } |
2204 | ||
6be6de18 | 2205 | s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct); |
4e63ac82 | 2206 | hisi_hba->itct = dmam_alloc_coherent(dev, s, &hisi_hba->itct_dma, |
a07b4876 | 2207 | GFP_KERNEL); |
6be6de18 JG |
2208 | if (!hisi_hba->itct) |
2209 | goto err_out; | |
2210 | ||
a8d547bd | 2211 | hisi_hba->slot_info = devm_kcalloc(dev, max_command_entries, |
6be6de18 JG |
2212 | sizeof(struct hisi_sas_slot), |
2213 | GFP_KERNEL); | |
2214 | if (!hisi_hba->slot_info) | |
2215 | goto err_out; | |
2216 | ||
2ba5afb6 XC |
2217 | /* roundup to avoid overly large block size */ |
2218 | max_command_entries_ru = roundup(max_command_entries, 64); | |
b3cce125 XC |
2219 | if (hisi_hba->prot_mask & HISI_SAS_DIX_PROT_MASK) |
2220 | sz_slot_buf_ru = sizeof(struct hisi_sas_slot_dif_buf_table); | |
2221 | else | |
2222 | sz_slot_buf_ru = sizeof(struct hisi_sas_slot_buf_table); | |
2223 | sz_slot_buf_ru = roundup(sz_slot_buf_ru, 64); | |
599aefc8 | 2224 | s = max(lcm(max_command_entries_ru, sz_slot_buf_ru), PAGE_SIZE); |
2ba5afb6 XC |
2225 | blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s; |
2226 | slots_per_blk = s / sz_slot_buf_ru; | |
b3cce125 | 2227 | |
2ba5afb6 | 2228 | for (i = 0; i < blk_cnt; i++) { |
2ba5afb6 | 2229 | int slot_index = i * slots_per_blk; |
b3cce125 XC |
2230 | dma_addr_t buf_dma; |
2231 | void *buf; | |
2ba5afb6 | 2232 | |
b3cce125 | 2233 | buf = dmam_alloc_coherent(dev, s, &buf_dma, |
a07b4876 | 2234 | GFP_KERNEL); |
2ba5afb6 XC |
2235 | if (!buf) |
2236 | goto err_out; | |
2ba5afb6 XC |
2237 | |
2238 | for (j = 0; j < slots_per_blk; j++, slot_index++) { | |
2239 | struct hisi_sas_slot *slot; | |
2240 | ||
2241 | slot = &hisi_hba->slot_info[slot_index]; | |
2242 | slot->buf = buf; | |
2243 | slot->buf_dma = buf_dma; | |
2244 | slot->idx = slot_index; | |
2245 | ||
b3cce125 XC |
2246 | buf += sz_slot_buf_ru; |
2247 | buf_dma += sz_slot_buf_ru; | |
2ba5afb6 XC |
2248 | } |
2249 | } | |
2250 | ||
a8d547bd | 2251 | s = max_command_entries * sizeof(struct hisi_sas_iost); |
4e63ac82 XC |
2252 | hisi_hba->iost = dmam_alloc_coherent(dev, s, &hisi_hba->iost_dma, |
2253 | GFP_KERNEL); | |
6be6de18 JG |
2254 | if (!hisi_hba->iost) |
2255 | goto err_out; | |
2256 | ||
a8d547bd | 2257 | s = max_command_entries * sizeof(struct hisi_sas_breakpoint); |
4e63ac82 XC |
2258 | hisi_hba->breakpoint = dmam_alloc_coherent(dev, s, |
2259 | &hisi_hba->breakpoint_dma, | |
2260 | GFP_KERNEL); | |
6be6de18 JG |
2261 | if (!hisi_hba->breakpoint) |
2262 | goto err_out; | |
2263 | ||
54585ec6 CJ |
2264 | s = hisi_hba->slot_index_count = max_command_entries; |
2265 | hisi_hba->slot_index_tags = devm_bitmap_zalloc(dev, s, GFP_KERNEL); | |
257efd1f JG |
2266 | if (!hisi_hba->slot_index_tags) |
2267 | goto err_out; | |
2268 | ||
6be6de18 | 2269 | s = sizeof(struct hisi_sas_initial_fis) * HISI_SAS_MAX_PHYS; |
4e63ac82 XC |
2270 | hisi_hba->initial_fis = dmam_alloc_coherent(dev, s, |
2271 | &hisi_hba->initial_fis_dma, | |
2272 | GFP_KERNEL); | |
6be6de18 JG |
2273 | if (!hisi_hba->initial_fis) |
2274 | goto err_out; | |
6be6de18 | 2275 | |
3297ded1 | 2276 | s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_sata_breakpoint); |
4e63ac82 XC |
2277 | hisi_hba->sata_breakpoint = dmam_alloc_coherent(dev, s, |
2278 | &hisi_hba->sata_breakpoint_dma, | |
2279 | GFP_KERNEL); | |
6be6de18 JG |
2280 | if (!hisi_hba->sata_breakpoint) |
2281 | goto err_out; | |
6be6de18 | 2282 | |
f7d190a9 | 2283 | hisi_hba->last_slot_index = 0; |
257efd1f | 2284 | |
7e9080e1 JG |
2285 | hisi_hba->wq = create_singlethread_workqueue(dev_name(dev)); |
2286 | if (!hisi_hba->wq) { | |
2287 | dev_err(dev, "sas_alloc: failed to create workqueue\n"); | |
2288 | goto err_out; | |
2289 | } | |
2290 | ||
6be6de18 JG |
2291 | return 0; |
2292 | err_out: | |
2293 | return -ENOMEM; | |
2294 | } | |
e21fe3a5 | 2295 | EXPORT_SYMBOL_GPL(hisi_sas_alloc); |
6be6de18 | 2296 | |
e21fe3a5 | 2297 | void hisi_sas_free(struct hisi_hba *hisi_hba) |
89d53322 | 2298 | { |
6c86e046 XC |
2299 | int i; |
2300 | ||
2301 | for (i = 0; i < hisi_hba->n_phy; i++) { | |
2302 | struct hisi_sas_phy *phy = &hisi_hba->phy[i]; | |
2303 | ||
2304 | del_timer_sync(&phy->timer); | |
2305 | } | |
2306 | ||
7e9080e1 JG |
2307 | if (hisi_hba->wq) |
2308 | destroy_workqueue(hisi_hba->wq); | |
89d53322 | 2309 | } |
e21fe3a5 | 2310 | EXPORT_SYMBOL_GPL(hisi_sas_free); |
6be6de18 | 2311 | |
b4241f0f | 2312 | void hisi_sas_rst_work_handler(struct work_struct *work) |
06ec0fb9 XC |
2313 | { |
2314 | struct hisi_hba *hisi_hba = | |
2315 | container_of(work, struct hisi_hba, rst_work); | |
2316 | ||
2c74cb1f JX |
2317 | if (hisi_sas_controller_prereset(hisi_hba)) |
2318 | return; | |
2319 | ||
06ec0fb9 XC |
2320 | hisi_sas_controller_reset(hisi_hba); |
2321 | } | |
b4241f0f | 2322 | EXPORT_SYMBOL_GPL(hisi_sas_rst_work_handler); |
06ec0fb9 | 2323 | |
e402acdb XT |
2324 | void hisi_sas_sync_rst_work_handler(struct work_struct *work) |
2325 | { | |
2326 | struct hisi_sas_rst *rst = | |
2327 | container_of(work, struct hisi_sas_rst, work); | |
2328 | ||
2c74cb1f JX |
2329 | if (hisi_sas_controller_prereset(rst->hisi_hba)) |
2330 | goto rst_complete; | |
2331 | ||
e402acdb XT |
2332 | if (!hisi_sas_controller_reset(rst->hisi_hba)) |
2333 | rst->done = true; | |
2c74cb1f | 2334 | rst_complete: |
e402acdb XT |
2335 | complete(rst->completion); |
2336 | } | |
2337 | EXPORT_SYMBOL_GPL(hisi_sas_sync_rst_work_handler); | |
2338 | ||
0fa24c19 | 2339 | int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba) |
7eb7869f | 2340 | { |
0fa24c19 JG |
2341 | struct device *dev = hisi_hba->dev; |
2342 | struct platform_device *pdev = hisi_hba->platform_dev; | |
2343 | struct device_node *np = pdev ? pdev->dev.of_node : NULL; | |
3bc45af8 | 2344 | struct clk *refclk; |
7eb7869f | 2345 | |
4d558c77 | 2346 | if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr, |
0fa24c19 JG |
2347 | SAS_ADDR_SIZE)) { |
2348 | dev_err(dev, "could not get property sas-addr\n"); | |
2349 | return -ENOENT; | |
2350 | } | |
e26b2f40 | 2351 | |
4d558c77 | 2352 | if (np) { |
0fa24c19 JG |
2353 | /* |
2354 | * These properties are only required for platform device-based | |
2355 | * controller with DT firmware. | |
2356 | */ | |
4d558c77 JG |
2357 | hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np, |
2358 | "hisilicon,sas-syscon"); | |
0fa24c19 JG |
2359 | if (IS_ERR(hisi_hba->ctrl)) { |
2360 | dev_err(dev, "could not get syscon\n"); | |
2361 | return -ENOENT; | |
2362 | } | |
e26b2f40 | 2363 | |
4d558c77 | 2364 | if (device_property_read_u32(dev, "ctrl-reset-reg", |
0fa24c19 | 2365 | &hisi_hba->ctrl_reset_reg)) { |
01d4e3a2 | 2366 | dev_err(dev, "could not get property ctrl-reset-reg\n"); |
0fa24c19 JG |
2367 | return -ENOENT; |
2368 | } | |
e26b2f40 | 2369 | |
4d558c77 | 2370 | if (device_property_read_u32(dev, "ctrl-reset-sts-reg", |
0fa24c19 | 2371 | &hisi_hba->ctrl_reset_sts_reg)) { |
01d4e3a2 | 2372 | dev_err(dev, "could not get property ctrl-reset-sts-reg\n"); |
0fa24c19 JG |
2373 | return -ENOENT; |
2374 | } | |
e26b2f40 | 2375 | |
4d558c77 | 2376 | if (device_property_read_u32(dev, "ctrl-clock-ena-reg", |
0fa24c19 | 2377 | &hisi_hba->ctrl_clock_ena_reg)) { |
01d4e3a2 | 2378 | dev_err(dev, "could not get property ctrl-clock-ena-reg\n"); |
0fa24c19 JG |
2379 | return -ENOENT; |
2380 | } | |
4d558c77 JG |
2381 | } |
2382 | ||
0fa24c19 | 2383 | refclk = devm_clk_get(dev, NULL); |
3bc45af8 | 2384 | if (IS_ERR(refclk)) |
87e287c1 | 2385 | dev_dbg(dev, "no ref clk property\n"); |
3bc45af8 JG |
2386 | else |
2387 | hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000; | |
2388 | ||
0fa24c19 JG |
2389 | if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) { |
2390 | dev_err(dev, "could not get property phy-count\n"); | |
2391 | return -ENOENT; | |
2392 | } | |
e26b2f40 | 2393 | |
4d558c77 | 2394 | if (device_property_read_u32(dev, "queue-count", |
0fa24c19 JG |
2395 | &hisi_hba->queue_count)) { |
2396 | dev_err(dev, "could not get property queue-count\n"); | |
2397 | return -ENOENT; | |
2398 | } | |
2399 | ||
2400 | return 0; | |
2401 | } | |
2402 | EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info); | |
2403 | ||
2404 | static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev, | |
2405 | const struct hisi_sas_hw *hw) | |
2406 | { | |
2407 | struct resource *res; | |
2408 | struct Scsi_Host *shost; | |
2409 | struct hisi_hba *hisi_hba; | |
2410 | struct device *dev = &pdev->dev; | |
d9a00459 | 2411 | int error; |
0fa24c19 | 2412 | |
235bfc7f | 2413 | shost = scsi_host_alloc(hw->sht, sizeof(*hisi_hba)); |
0fa24c19 JG |
2414 | if (!shost) { |
2415 | dev_err(dev, "scsi host alloc failed\n"); | |
2416 | return NULL; | |
2417 | } | |
2418 | hisi_hba = shost_priv(shost); | |
2419 | ||
2420 | INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler); | |
2421 | hisi_hba->hw = hw; | |
2422 | hisi_hba->dev = dev; | |
2423 | hisi_hba->platform_dev = pdev; | |
2424 | hisi_hba->shost = shost; | |
2425 | SHOST_TO_SAS_HA(shost) = &hisi_hba->sha; | |
2426 | ||
77570eed | 2427 | timer_setup(&hisi_hba->timer, NULL, 0); |
0fa24c19 JG |
2428 | |
2429 | if (hisi_sas_get_fw_info(hisi_hba) < 0) | |
e26b2f40 JG |
2430 | goto err_out; |
2431 | ||
d9a00459 | 2432 | error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)); |
d9a00459 | 2433 | if (error) { |
a6f2c7ff JG |
2434 | dev_err(dev, "No usable DMA addressing method\n"); |
2435 | goto err_out; | |
2436 | } | |
2437 | ||
c0c1a71e | 2438 | hisi_hba->regs = devm_platform_ioremap_resource(pdev, 0); |
e26b2f40 JG |
2439 | if (IS_ERR(hisi_hba->regs)) |
2440 | goto err_out; | |
2441 | ||
6379c560 XT |
2442 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
2443 | if (res) { | |
2444 | hisi_hba->sgpio_regs = devm_ioremap_resource(dev, res); | |
2445 | if (IS_ERR(hisi_hba->sgpio_regs)) | |
2446 | goto err_out; | |
2447 | } | |
2448 | ||
ae68b566 | 2449 | if (hisi_sas_alloc(hisi_hba)) { |
89d53322 | 2450 | hisi_sas_free(hisi_hba); |
6be6de18 | 2451 | goto err_out; |
89d53322 | 2452 | } |
6be6de18 | 2453 | |
7eb7869f JG |
2454 | return shost; |
2455 | err_out: | |
76aae5f6 | 2456 | scsi_host_put(shost); |
7eb7869f JG |
2457 | dev_err(dev, "shost alloc failed\n"); |
2458 | return NULL; | |
2459 | } | |
2460 | ||
74a29219 JG |
2461 | static int hisi_sas_interrupt_preinit(struct hisi_hba *hisi_hba) |
2462 | { | |
2463 | if (hisi_hba->hw->interrupt_preinit) | |
2464 | return hisi_hba->hw->interrupt_preinit(hisi_hba); | |
2465 | return 0; | |
2466 | } | |
2467 | ||
7eb7869f | 2468 | int hisi_sas_probe(struct platform_device *pdev, |
235bfc7f | 2469 | const struct hisi_sas_hw *hw) |
7eb7869f JG |
2470 | { |
2471 | struct Scsi_Host *shost; | |
2472 | struct hisi_hba *hisi_hba; | |
2473 | struct device *dev = &pdev->dev; | |
2474 | struct asd_sas_phy **arr_phy; | |
2475 | struct asd_sas_port **arr_port; | |
2476 | struct sas_ha_struct *sha; | |
2477 | int rc, phy_nr, port_nr, i; | |
2478 | ||
2479 | shost = hisi_sas_shost_alloc(pdev, hw); | |
d37a0082 XT |
2480 | if (!shost) |
2481 | return -ENOMEM; | |
7eb7869f JG |
2482 | |
2483 | sha = SHOST_TO_SAS_HA(shost); | |
2484 | hisi_hba = shost_priv(shost); | |
2485 | platform_set_drvdata(pdev, sha); | |
50cb916f | 2486 | |
7eb7869f JG |
2487 | phy_nr = port_nr = hisi_hba->n_phy; |
2488 | ||
2489 | arr_phy = devm_kcalloc(dev, phy_nr, sizeof(void *), GFP_KERNEL); | |
2490 | arr_port = devm_kcalloc(dev, port_nr, sizeof(void *), GFP_KERNEL); | |
d37a0082 XT |
2491 | if (!arr_phy || !arr_port) { |
2492 | rc = -ENOMEM; | |
2493 | goto err_out_ha; | |
2494 | } | |
7eb7869f JG |
2495 | |
2496 | sha->sas_phy = arr_phy; | |
2497 | sha->sas_port = arr_port; | |
7eb7869f JG |
2498 | sha->lldd_ha = hisi_hba; |
2499 | ||
2500 | shost->transportt = hisi_sas_stt; | |
2501 | shost->max_id = HISI_SAS_MAX_DEVICES; | |
2502 | shost->max_lun = ~0; | |
2503 | shost->max_channel = 1; | |
2504 | shost->max_cmd_len = 16; | |
784b46b7 | 2505 | if (hisi_hba->hw->slot_index_alloc) { |
93352abc JG |
2506 | shost->can_queue = HISI_SAS_MAX_COMMANDS; |
2507 | shost->cmd_per_lun = HISI_SAS_MAX_COMMANDS; | |
784b46b7 | 2508 | } else { |
93352abc JG |
2509 | shost->can_queue = HISI_SAS_UNRESERVED_IPTT; |
2510 | shost->cmd_per_lun = HISI_SAS_UNRESERVED_IPTT; | |
784b46b7 | 2511 | } |
7eb7869f JG |
2512 | |
2513 | sha->sas_ha_name = DRV_NAME; | |
11b75249 | 2514 | sha->dev = hisi_hba->dev; |
7eb7869f JG |
2515 | sha->sas_addr = &hisi_hba->sas_addr[0]; |
2516 | sha->num_phys = hisi_hba->n_phy; | |
1136a022 | 2517 | sha->shost = hisi_hba->shost; |
7eb7869f JG |
2518 | |
2519 | for (i = 0; i < hisi_hba->n_phy; i++) { | |
2520 | sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy; | |
2521 | sha->sas_port[i] = &hisi_hba->port[i].sas_port; | |
2522 | } | |
2523 | ||
74a29219 JG |
2524 | rc = hisi_sas_interrupt_preinit(hisi_hba); |
2525 | if (rc) | |
2526 | goto err_out_ha; | |
2527 | ||
7eb7869f JG |
2528 | rc = scsi_add_host(shost, &pdev->dev); |
2529 | if (rc) | |
2530 | goto err_out_ha; | |
2531 | ||
2532 | rc = sas_register_ha(sha); | |
2533 | if (rc) | |
2534 | goto err_out_register_ha; | |
2535 | ||
0757f041 XC |
2536 | rc = hisi_hba->hw->hw_init(hisi_hba); |
2537 | if (rc) | |
f4676665 | 2538 | goto err_out_hw_init; |
0757f041 | 2539 | |
7eb7869f JG |
2540 | scsi_scan_host(shost); |
2541 | ||
2542 | return 0; | |
2543 | ||
f4676665 XC |
2544 | err_out_hw_init: |
2545 | sas_unregister_ha(sha); | |
7eb7869f JG |
2546 | err_out_register_ha: |
2547 | scsi_remove_host(shost); | |
2548 | err_out_ha: | |
d37a0082 | 2549 | hisi_sas_free(hisi_hba); |
76aae5f6 | 2550 | scsi_host_put(shost); |
7eb7869f JG |
2551 | return rc; |
2552 | } | |
2553 | EXPORT_SYMBOL_GPL(hisi_sas_probe); | |
2554 | ||
8cd6d0a3 | 2555 | void hisi_sas_remove(struct platform_device *pdev) |
bbe0a7b3 | 2556 | { |
89d53322 JG |
2557 | struct sas_ha_struct *sha = platform_get_drvdata(pdev); |
2558 | struct hisi_hba *hisi_hba = sha->lldd_ha; | |
1136a022 | 2559 | struct Scsi_Host *shost = sha->shost; |
bbe0a7b3 | 2560 | |
080b4f97 | 2561 | del_timer_sync(&hisi_hba->timer); |
bbe0a7b3 | 2562 | |
89d53322 | 2563 | sas_unregister_ha(sha); |
1136a022 | 2564 | sas_remove_host(shost); |
bbe0a7b3 | 2565 | |
89d53322 | 2566 | hisi_sas_free(hisi_hba); |
76aae5f6 | 2567 | scsi_host_put(shost); |
bbe0a7b3 | 2568 | } |
89d53322 | 2569 | EXPORT_SYMBOL_GPL(hisi_sas_remove); |
bbe0a7b3 | 2570 | |
1dbe61bf LJ |
2571 | #if IS_ENABLED(CONFIG_SCSI_HISI_SAS_DEBUGFS_DEFAULT_ENABLE) |
2572 | #define DEBUGFS_ENABLE_DEFAULT "enabled" | |
2573 | bool hisi_sas_debugfs_enable = true; | |
2574 | u32 hisi_sas_debugfs_dump_count = 50; | |
2575 | #else | |
2576 | #define DEBUGFS_ENABLE_DEFAULT "disabled" | |
ef63464b | 2577 | bool hisi_sas_debugfs_enable; |
1dbe61bf LJ |
2578 | u32 hisi_sas_debugfs_dump_count = 1; |
2579 | #endif | |
2580 | ||
ef63464b LJ |
2581 | EXPORT_SYMBOL_GPL(hisi_sas_debugfs_enable); |
2582 | module_param_named(debugfs_enable, hisi_sas_debugfs_enable, bool, 0444); | |
1dbe61bf LJ |
2583 | MODULE_PARM_DESC(hisi_sas_debugfs_enable, |
2584 | "Enable driver debugfs (default "DEBUGFS_ENABLE_DEFAULT")"); | |
49159a5e | 2585 | |
905ab01f LJ |
2586 | EXPORT_SYMBOL_GPL(hisi_sas_debugfs_dump_count); |
2587 | module_param_named(debugfs_dump_count, hisi_sas_debugfs_dump_count, uint, 0444); | |
2588 | MODULE_PARM_DESC(hisi_sas_debugfs_dump_count, "Number of debugfs dumps to allow"); | |
7c5e1363 | 2589 | |
623a4b6d LJ |
2590 | struct dentry *hisi_sas_debugfs_dir; |
2591 | EXPORT_SYMBOL_GPL(hisi_sas_debugfs_dir); | |
905ab01f | 2592 | |
e8899fad JG |
2593 | static __init int hisi_sas_init(void) |
2594 | { | |
e8899fad JG |
2595 | hisi_sas_stt = sas_domain_attach_transport(&hisi_sas_transport_ops); |
2596 | if (!hisi_sas_stt) | |
2597 | return -ENOMEM; | |
2598 | ||
905ab01f | 2599 | if (hisi_sas_debugfs_enable) { |
ef63464b | 2600 | hisi_sas_debugfs_dir = debugfs_create_dir("hisi_sas", NULL); |
905ab01f LJ |
2601 | if (hisi_sas_debugfs_dump_count > HISI_SAS_MAX_DEBUGFS_DUMP) { |
2602 | pr_info("hisi_sas: Limiting debugfs dump count\n"); | |
2603 | hisi_sas_debugfs_dump_count = HISI_SAS_MAX_DEBUGFS_DUMP; | |
2604 | } | |
2605 | } | |
ef63464b | 2606 | |
e8899fad JG |
2607 | return 0; |
2608 | } | |
2609 | ||
2610 | static __exit void hisi_sas_exit(void) | |
2611 | { | |
2612 | sas_release_transport(hisi_sas_stt); | |
ef63464b LJ |
2613 | |
2614 | debugfs_remove(hisi_sas_debugfs_dir); | |
e8899fad JG |
2615 | } |
2616 | ||
2617 | module_init(hisi_sas_init); | |
2618 | module_exit(hisi_sas_exit); | |
2619 | ||
e8899fad JG |
2620 | MODULE_LICENSE("GPL"); |
2621 | MODULE_AUTHOR("John Garry <john.garry@huawei.com>"); | |
2622 | MODULE_DESCRIPTION("HISILICON SAS controller driver"); | |
2623 | MODULE_ALIAS("platform:" DRV_NAME); |