Commit | Line | Data |
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2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
e8899fad JG |
2 | /* |
3 | * Copyright (c) 2015 Linaro Ltd. | |
4 | * Copyright (c) 2015 Hisilicon Limited. | |
e8899fad JG |
5 | */ |
6 | ||
7 | #ifndef _HISI_SAS_H_ | |
8 | #define _HISI_SAS_H_ | |
9 | ||
4d558c77 | 10 | #include <linux/acpi.h> |
8d98416a JG |
11 | #include <linux/blk-mq.h> |
12 | #include <linux/blk-mq-pci.h> | |
3bc45af8 | 13 | #include <linux/clk.h> |
ef63464b | 14 | #include <linux/debugfs.h> |
e8899fad | 15 | #include <linux/dmapool.h> |
a25d0d3d | 16 | #include <linux/iopoll.h> |
74a29219 | 17 | #include <linux/irq.h> |
2ba5afb6 | 18 | #include <linux/lcm.h> |
57dbb2b2 | 19 | #include <linux/libata.h> |
e8899fad JG |
20 | #include <linux/mfd/syscon.h> |
21 | #include <linux/module.h> | |
22 | #include <linux/of_address.h> | |
11b75249 | 23 | #include <linux/pci.h> |
e8899fad | 24 | #include <linux/platform_device.h> |
65ff4aef | 25 | #include <linux/pm_runtime.h> |
4d558c77 | 26 | #include <linux/property.h> |
e8899fad | 27 | #include <linux/regmap.h> |
d28ed83b | 28 | #include <linux/timer.h> |
6f2ff1a1 | 29 | #include <scsi/sas_ata.h> |
e8899fad JG |
30 | #include <scsi/libsas.h> |
31 | ||
7eb7869f | 32 | #define HISI_SAS_MAX_PHYS 9 |
6be6de18 | 33 | #define HISI_SAS_MAX_QUEUES 32 |
1273d65f | 34 | #define HISI_SAS_QUEUE_SLOTS 4096 |
3297ded1 | 35 | #define HISI_SAS_MAX_ITCT_ENTRIES 1024 |
7eb7869f | 36 | #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES |
b5a9fa20 | 37 | #define HISI_SAS_RESETTING_BIT 0 |
917d3bda | 38 | #define HISI_SAS_REJECT_CMD_BIT 1 |
65ff4aef | 39 | #define HISI_SAS_PM_BIT 2 |
e8a4d0da | 40 | #define HISI_SAS_HW_FAULT_BIT 3 |
93352abc JG |
41 | #define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS) |
42 | #define HISI_SAS_RESERVED_IPTT 96 | |
43 | #define HISI_SAS_UNRESERVED_IPTT \ | |
44 | (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT) | |
7eb7869f | 45 | |
bbe0a7b3 LJ |
46 | #define HISI_SAS_IOST_ITCT_CACHE_NUM 64 |
47 | #define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10 | |
cd96fe60 | 48 | #define HISI_SAS_FIFO_DATA_DW_SIZE 32 |
bbe0a7b3 | 49 | |
f557e32c XT |
50 | #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) |
51 | #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) | |
52 | ||
53 | #define hisi_sas_status_buf_addr(buf) \ | |
b3cce125 XC |
54 | ((buf) + offsetof(struct hisi_sas_slot_buf_table, status_buffer)) |
55 | #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr((slot)->buf) | |
f557e32c | 56 | #define hisi_sas_status_buf_addr_dma(slot) \ |
b3cce125 | 57 | hisi_sas_status_buf_addr((slot)->buf_dma) |
f557e32c XT |
58 | |
59 | #define hisi_sas_cmd_hdr_addr(buf) \ | |
b3cce125 XC |
60 | ((buf) + offsetof(struct hisi_sas_slot_buf_table, command_header)) |
61 | #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr((slot)->buf) | |
62 | #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr((slot)->buf_dma) | |
f557e32c XT |
63 | |
64 | #define hisi_sas_sge_addr(buf) \ | |
b3cce125 XC |
65 | ((buf) + offsetof(struct hisi_sas_slot_buf_table, sge_page)) |
66 | #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr((slot)->buf) | |
67 | #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr((slot)->buf_dma) | |
68 | ||
69 | #define hisi_sas_sge_dif_addr(buf) \ | |
70 | ((buf) + offsetof(struct hisi_sas_slot_dif_buf_table, sge_dif_page)) | |
71 | #define hisi_sas_sge_dif_addr_mem(slot) hisi_sas_sge_dif_addr((slot)->buf) | |
72 | #define hisi_sas_sge_dif_addr_dma(slot) hisi_sas_sge_dif_addr((slot)->buf_dma) | |
6be6de18 | 73 | |
42e7a693 | 74 | #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) |
66ee999b | 75 | #define HISI_SAS_MAX_SMP_RESP_SZ 1028 |
6f2ff1a1 | 76 | #define HISI_SAS_MAX_STP_RESP_SZ 28 |
42e7a693 | 77 | |
6c7bb8a1 XC |
78 | #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1 |
79 | #define HISI_SAS_SATA_PROTOCOL_PIO 0x2 | |
80 | #define HISI_SAS_SATA_PROTOCOL_DMA 0x4 | |
81 | #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 | |
82 | #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 | |
83 | ||
d6a9000b XC |
84 | #define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \ |
85 | SHOST_DIF_TYPE2_PROTECTION | \ | |
86 | SHOST_DIF_TYPE3_PROTECTION) | |
87 | ||
b3cce125 XC |
88 | #define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \ |
89 | SHOST_DIX_TYPE2_PROTECTION | \ | |
90 | SHOST_DIX_TYPE3_PROTECTION) | |
91 | ||
92 | #define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK) | |
d6a9000b | 93 | |
512623de | 94 | #define HISI_SAS_WAIT_PHYUP_TIMEOUT (30 * HZ) |
2f12a499 | 95 | #define HISI_SAS_CLEAR_ITCT_TIMEOUT (20 * HZ) |
b6c9b15e | 96 | |
abda97c2 | 97 | struct hisi_hba; |
af740dbe | 98 | |
07d78592 JG |
99 | enum { |
100 | PORT_TYPE_SAS = (1U << 1), | |
101 | PORT_TYPE_SATA = (1U << 0), | |
102 | }; | |
103 | ||
57dbb2b2 XC |
104 | enum dev_status { |
105 | HISI_SAS_DEV_INIT, | |
106 | HISI_SAS_DEV_NORMAL, | |
930d97da | 107 | HISI_SAS_DEV_NCQ_ERR, |
57dbb2b2 XC |
108 | }; |
109 | ||
441c2740 JG |
110 | enum { |
111 | HISI_SAS_INT_ABT_CMD = 0, | |
112 | HISI_SAS_INT_ABT_DEV = 1, | |
113 | }; | |
114 | ||
abda97c2 JG |
115 | enum hisi_sas_dev_type { |
116 | HISI_SAS_DEV_TYPE_STP = 0, | |
117 | HISI_SAS_DEV_TYPE_SSP, | |
118 | HISI_SAS_DEV_TYPE_SATA, | |
119 | }; | |
120 | ||
2b383351 JG |
121 | struct hisi_sas_hw_error { |
122 | u32 irq_msk; | |
123 | u32 msk; | |
124 | int shift; | |
125 | const char *msg; | |
126 | int reg; | |
729428ca | 127 | const struct hisi_sas_hw_error *sub; |
2b383351 JG |
128 | }; |
129 | ||
e402acdb XT |
130 | struct hisi_sas_rst { |
131 | struct hisi_hba *hisi_hba; | |
132 | struct completion *completion; | |
133 | struct work_struct work; | |
134 | bool done; | |
135 | }; | |
136 | ||
137 | #define HISI_SAS_RST_WORK_INIT(r, c) \ | |
138 | { .hisi_hba = hisi_hba, \ | |
139 | .completion = &c, \ | |
140 | .work = __WORK_INITIALIZER(r.work, \ | |
141 | hisi_sas_sync_rst_work_handler), \ | |
142 | .done = false, \ | |
143 | } | |
144 | ||
145 | #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \ | |
146 | DECLARE_COMPLETION_ONSTACK(c); \ | |
e402acdb XT |
147 | struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c) |
148 | ||
149 | enum hisi_sas_bit_err_type { | |
150 | HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0, | |
151 | HISI_SAS_ERR_MULTI_BIT_ECC = 0x1, | |
152 | }; | |
153 | ||
e537b62b XT |
154 | enum hisi_sas_phy_event { |
155 | HISI_PHYE_PHY_UP = 0U, | |
057c3d1f | 156 | HISI_PHYE_LINK_RESET, |
ae9b69e8 | 157 | HISI_PHYE_PHY_UP_PM, |
e537b62b XT |
158 | HISI_PHYES_NUM, |
159 | }; | |
160 | ||
cd96fe60 LJ |
161 | struct hisi_sas_debugfs_fifo { |
162 | u32 signal_sel; | |
163 | u32 dump_msk; | |
164 | u32 dump_mode; | |
165 | u32 trigger; | |
166 | u32 trigger_msk; | |
167 | u32 trigger_mode; | |
168 | u32 rd_data[HISI_SAS_FIFO_DATA_DW_SIZE]; | |
169 | }; | |
170 | ||
7eb7869f | 171 | struct hisi_sas_phy { |
e537b62b | 172 | struct work_struct works[HISI_PHYES_NUM]; |
976867e6 JG |
173 | struct hisi_hba *hisi_hba; |
174 | struct hisi_sas_port *port; | |
7eb7869f | 175 | struct asd_sas_phy sas_phy; |
976867e6 | 176 | struct sas_identify identify; |
3e1fb1b8 | 177 | struct completion *reset_completion; |
b6c9b15e | 178 | struct timer_list timer; |
3e1fb1b8 | 179 | spinlock_t lock; |
976867e6 | 180 | u64 port_id; /* from hw */ |
976867e6 JG |
181 | u64 frame_rcvd_size; |
182 | u8 frame_rcvd[32]; | |
183 | u8 phy_attached; | |
3e1fb1b8 XC |
184 | u8 in_reset; |
185 | u8 reserved[2]; | |
d0ef10c9 | 186 | u32 phy_type; |
aaeb8232 | 187 | u32 code_violation_err_count; |
976867e6 JG |
188 | enum sas_linkrate minimum_linkrate; |
189 | enum sas_linkrate maximum_linkrate; | |
c63b88cc | 190 | int enable; |
366da0da | 191 | int wait_phyup_cnt; |
f873b661 | 192 | atomic_t down_cnt; |
cd96fe60 LJ |
193 | |
194 | /* Trace FIFO */ | |
195 | struct hisi_sas_debugfs_fifo fifo; | |
7eb7869f JG |
196 | }; |
197 | ||
198 | struct hisi_sas_port { | |
199 | struct asd_sas_port sas_port; | |
976867e6 JG |
200 | u8 port_attached; |
201 | u8 id; /* from hw */ | |
7eb7869f JG |
202 | }; |
203 | ||
9101a079 JG |
204 | struct hisi_sas_cq { |
205 | struct hisi_hba *hisi_hba; | |
11e67320 | 206 | const struct cpumask *irq_mask; |
e6c346f3 | 207 | int rd_point; |
9101a079 | 208 | int id; |
81f338e9 | 209 | int irq_no; |
0e47effa | 210 | spinlock_t poll_lock; |
9101a079 JG |
211 | }; |
212 | ||
4fde02ad JG |
213 | struct hisi_sas_dq { |
214 | struct hisi_hba *hisi_hba; | |
fa222db0 | 215 | struct list_head list; |
b1a49412 | 216 | spinlock_t lock; |
4fde02ad JG |
217 | int wr_point; |
218 | int id; | |
219 | }; | |
220 | ||
af740dbe | 221 | struct hisi_sas_device { |
abda97c2 JG |
222 | struct hisi_hba *hisi_hba; |
223 | struct domain_device *sas_device; | |
640acc9a | 224 | struct completion *completion; |
b1a49412 | 225 | struct hisi_sas_dq *dq; |
ad604832 | 226 | struct list_head list; |
ad604832 | 227 | enum sas_device_type dev_type; |
57dbb2b2 | 228 | enum dev_status dev_status; |
ad604832 | 229 | int device_id; |
32ccba52 | 230 | int sata_idx; |
4fefe5bb | 231 | spinlock_t lock; /* For protecting slots */ |
af740dbe JG |
232 | }; |
233 | ||
6be6de18 | 234 | struct hisi_sas_slot { |
42e7a693 | 235 | struct list_head entry; |
fa222db0 | 236 | struct list_head delivery; |
42e7a693 JG |
237 | struct sas_task *task; |
238 | struct hisi_sas_port *port; | |
239 | u64 n_elem; | |
b3cce125 | 240 | u64 n_elem_dif; |
42e7a693 JG |
241 | int dlvry_queue; |
242 | int dlvry_queue_slot; | |
27a3f229 JG |
243 | int cmplt_queue; |
244 | int cmplt_queue_slot; | |
cac9b2a2 | 245 | int abort; |
fa222db0 | 246 | int ready; |
4fefe5bb | 247 | int device_id; |
42e7a693 JG |
248 | void *cmd_hdr; |
249 | dma_addr_t cmd_hdr_dma; | |
0844a3ff | 250 | struct timer_list internal_abort_timer; |
cd938e53 | 251 | bool is_internal; |
bbfe82cd | 252 | struct sas_tmf_task *tmf; |
2ba5afb6 XC |
253 | /* Do not reorder/change members after here */ |
254 | void *buf; | |
255 | dma_addr_t buf_dma; | |
735bcc77 | 256 | u16 idx; |
6be6de18 JG |
257 | }; |
258 | ||
bbe0a7b3 LJ |
259 | struct hisi_sas_iost_itct_cache { |
260 | u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ]; | |
261 | }; | |
262 | ||
b0b3e429 LJ |
263 | enum hisi_sas_debugfs_reg_array_member { |
264 | DEBUGFS_GLOBAL = 0, | |
265 | DEBUGFS_AXI, | |
266 | DEBUGFS_RAS, | |
267 | DEBUGFS_REGS_NUM | |
268 | }; | |
269 | ||
bbe0a7b3 LJ |
270 | enum hisi_sas_debugfs_cache_type { |
271 | HISI_SAS_ITCT_CACHE, | |
272 | HISI_SAS_IOST_CACHE, | |
273 | }; | |
274 | ||
2c4d5823 LJ |
275 | enum hisi_sas_debugfs_bist_ffe_cfg { |
276 | FFE_SAS_1_5_GBPS, | |
277 | FFE_SAS_3_0_GBPS, | |
278 | FFE_SAS_6_0_GBPS, | |
279 | FFE_SAS_12_0_GBPS, | |
280 | FFE_RESV, | |
281 | FFE_SATA_1_5_GBPS, | |
282 | FFE_SATA_3_0_GBPS, | |
283 | FFE_SATA_6_0_GBPS, | |
284 | FFE_CFG_MAX | |
285 | }; | |
286 | ||
981cc23e LJ |
287 | enum hisi_sas_debugfs_bist_fixed_code { |
288 | FIXED_CODE, | |
289 | FIXED_CODE_1, | |
290 | FIXED_CODE_MAX | |
291 | }; | |
292 | ||
293 | enum { | |
294 | HISI_SAS_BIST_CODE_MODE_PRBS7, | |
295 | HISI_SAS_BIST_CODE_MODE_PRBS23, | |
296 | HISI_SAS_BIST_CODE_MODE_PRBS31, | |
297 | HISI_SAS_BIST_CODE_MODE_JTPAT, | |
298 | HISI_SAS_BIST_CODE_MODE_CJTPAT, | |
299 | HISI_SAS_BIST_CODE_MODE_SCRAMBED_0, | |
300 | HISI_SAS_BIST_CODE_MODE_TRAIN, | |
301 | HISI_SAS_BIST_CODE_MODE_TRAIN_DONE, | |
302 | HISI_SAS_BIST_CODE_MODE_HFTP, | |
303 | HISI_SAS_BIST_CODE_MODE_MFTP, | |
304 | HISI_SAS_BIST_CODE_MODE_LFTP, | |
305 | HISI_SAS_BIST_CODE_MODE_FIXED_DATA, | |
306 | }; | |
307 | ||
7eb7869f | 308 | struct hisi_sas_hw { |
8ff1d571 | 309 | int (*hw_init)(struct hisi_hba *hisi_hba); |
74a29219 | 310 | int (*interrupt_preinit)(struct hisi_hba *hisi_hba); |
abda97c2 JG |
311 | void (*setup_itct)(struct hisi_hba *hisi_hba, |
312 | struct hisi_sas_device *device); | |
784b46b7 | 313 | int (*slot_index_alloc)(struct hisi_hba *hisi_hba, |
685b6d6e JG |
314 | struct domain_device *device); |
315 | struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); | |
569eddcf | 316 | void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no); |
b1a49412 | 317 | void (*start_delivery)(struct hisi_sas_dq *dq); |
a2b3820b | 318 | void (*prep_ssp)(struct hisi_hba *hisi_hba, |
78bd2b4f | 319 | struct hisi_sas_slot *slot); |
a2b3820b | 320 | void (*prep_smp)(struct hisi_hba *hisi_hba, |
66ee999b | 321 | struct hisi_sas_slot *slot); |
a2b3820b | 322 | void (*prep_stp)(struct hisi_hba *hisi_hba, |
6f2ff1a1 | 323 | struct hisi_sas_slot *slot); |
a2b3820b | 324 | void (*prep_abort)(struct hisi_hba *hisi_hba, |
095478a6 | 325 | struct hisi_sas_slot *slot); |
396b8044 | 326 | void (*phys_init)(struct hisi_hba *hisi_hba); |
1eb8eeac | 327 | void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no); |
e4189d53 JG |
328 | void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); |
329 | void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); | |
c52108c6 | 330 | void (*get_events)(struct hisi_hba *hisi_hba, int phy_no); |
2ae75787 XC |
331 | void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, |
332 | struct sas_phy_linkrates *linkrates); | |
333 | enum sas_linkrate (*phy_get_max_linkrate)(void); | |
8fa9a7bd XC |
334 | int (*clear_itct)(struct hisi_hba *hisi_hba, |
335 | struct hisi_sas_device *dev); | |
0258141a | 336 | void (*free_device)(struct hisi_sas_device *sas_dev); |
184a4635 | 337 | int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); |
d30ff263 XC |
338 | void (*dereg_device)(struct hisi_hba *hisi_hba, |
339 | struct domain_device *device); | |
06ec0fb9 | 340 | int (*soft_reset)(struct hisi_hba *hisi_hba); |
917d3bda | 341 | u32 (*get_phys_state)(struct hisi_hba *hisi_hba); |
6379c560 XT |
342 | int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type, |
343 | u8 reg_index, u8 reg_count, u8 *write_data); | |
4bc05809 LJ |
344 | void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, |
345 | int delay_ms, int timeout_ms); | |
63f0733d | 346 | int (*debugfs_snapshot_regs)(struct hisi_hba *hisi_hba); |
6be6de18 | 347 | int complete_hdr_size; |
e8c0ced9 | 348 | const struct scsi_host_template *sht; |
7eb7869f JG |
349 | }; |
350 | ||
a70e33ea LJ |
351 | #define HISI_SAS_MAX_DEBUGFS_DUMP (50) |
352 | ||
35ea630b LJ |
353 | struct hisi_sas_debugfs_cq { |
354 | struct hisi_sas_cq *cq; | |
355 | void *complete_hdr; | |
356 | }; | |
357 | ||
1b54c4db LJ |
358 | struct hisi_sas_debugfs_dq { |
359 | struct hisi_sas_dq *dq; | |
360 | struct hisi_sas_cmd_hdr *hdr; | |
361 | }; | |
362 | ||
c6116398 LJ |
363 | struct hisi_sas_debugfs_regs { |
364 | struct hisi_hba *hisi_hba; | |
365 | u32 *data; | |
366 | }; | |
367 | ||
1f66e1fd LJ |
368 | struct hisi_sas_debugfs_port { |
369 | struct hisi_sas_phy *phy; | |
370 | u32 *data; | |
371 | }; | |
372 | ||
e15f2e2d LJ |
373 | struct hisi_sas_debugfs_iost { |
374 | struct hisi_sas_iost *iost; | |
375 | }; | |
376 | ||
0161d55f LJ |
377 | struct hisi_sas_debugfs_itct { |
378 | struct hisi_sas_itct *itct; | |
379 | }; | |
380 | ||
b714dd8f LJ |
381 | struct hisi_sas_debugfs_iost_cache { |
382 | struct hisi_sas_iost_itct_cache *cache; | |
383 | }; | |
384 | ||
357e4fc7 LJ |
385 | struct hisi_sas_debugfs_itct_cache { |
386 | struct hisi_sas_iost_itct_cache *cache; | |
387 | }; | |
388 | ||
7eb7869f JG |
389 | struct hisi_hba { |
390 | /* This must be the first element, used by SHOST_TO_SAS_HA */ | |
391 | struct sas_ha_struct *p; | |
392 | ||
11b75249 JG |
393 | struct platform_device *platform_dev; |
394 | struct pci_dev *pci_dev; | |
395 | struct device *dev; | |
396 | ||
d6a9000b XC |
397 | int prot_mask; |
398 | ||
e26b2f40 | 399 | void __iomem *regs; |
6379c560 | 400 | void __iomem *sgpio_regs; |
e26b2f40 JG |
401 | struct regmap *ctrl; |
402 | u32 ctrl_reset_reg; | |
403 | u32 ctrl_reset_sts_reg; | |
404 | u32 ctrl_clock_ena_reg; | |
3bc45af8 | 405 | u32 refclk_frequency_mhz; |
7eb7869f JG |
406 | u8 sas_addr[SAS_ADDR_SIZE]; |
407 | ||
74a29219 JG |
408 | int *irq_map; /* v2 hw */ |
409 | ||
7eb7869f | 410 | int n_phy; |
fa42d80d | 411 | spinlock_t lock; |
d2fc401e | 412 | struct semaphore sem; |
7eb7869f | 413 | |
fa42d80d | 414 | struct timer_list timer; |
7e9080e1 | 415 | struct workqueue_struct *wq; |
257efd1f JG |
416 | |
417 | int slot_index_count; | |
fa3be0f2 | 418 | int last_slot_index; |
1b865185 | 419 | int last_dev_id; |
257efd1f | 420 | unsigned long *slot_index_tags; |
c7b9d369 | 421 | unsigned long reject_stp_links_msk; |
257efd1f | 422 | |
7eb7869f JG |
423 | /* SCSI/SAS glue */ |
424 | struct sas_ha_struct sha; | |
425 | struct Scsi_Host *shost; | |
9101a079 JG |
426 | |
427 | struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; | |
4fde02ad | 428 | struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; |
7eb7869f JG |
429 | struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; |
430 | struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; | |
e26b2f40 JG |
431 | |
432 | int queue_count; | |
6be6de18 | 433 | |
af740dbe | 434 | struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; |
6be6de18 JG |
435 | struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; |
436 | dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; | |
437 | void *complete_hdr[HISI_SAS_MAX_QUEUES]; | |
438 | dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; | |
439 | struct hisi_sas_initial_fis *initial_fis; | |
440 | dma_addr_t initial_fis_dma; | |
441 | struct hisi_sas_itct *itct; | |
442 | dma_addr_t itct_dma; | |
443 | struct hisi_sas_iost *iost; | |
444 | dma_addr_t iost_dma; | |
445 | struct hisi_sas_breakpoint *breakpoint; | |
446 | dma_addr_t breakpoint_dma; | |
447 | struct hisi_sas_breakpoint *sata_breakpoint; | |
448 | dma_addr_t sata_breakpoint_dma; | |
449 | struct hisi_sas_slot *slot_info; | |
06ec0fb9 | 450 | unsigned long flags; |
7eb7869f | 451 | const struct hisi_sas_hw *hw; /* Low level hw interface */ |
32ccba52 | 452 | unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; |
06ec0fb9 | 453 | struct work_struct rst_work; |
4522204a | 454 | u32 phy_state; |
37359798 XC |
455 | u32 intr_coal_ticks; /* Time of interrupt coalesce in us */ |
456 | u32 intr_coal_count; /* Interrupt count to coalesce */ | |
ef63464b | 457 | |
795f25a3 JG |
458 | int cq_nvecs; |
459 | ||
97b151e7 XC |
460 | /* bist */ |
461 | enum sas_linkrate debugfs_bist_linkrate; | |
462 | int debugfs_bist_code_mode; | |
463 | int debugfs_bist_phy_no; | |
464 | int debugfs_bist_mode; | |
465 | u32 debugfs_bist_cnt; | |
466 | int debugfs_bist_enable; | |
2c4d5823 | 467 | u32 debugfs_bist_ffe[HISI_SAS_MAX_PHYS][FFE_CFG_MAX]; |
981cc23e | 468 | u32 debugfs_bist_fixed_code[FIXED_CODE_MAX]; |
97b151e7 | 469 | |
eb1c2b72 | 470 | /* debugfs memories */ |
b0b3e429 | 471 | /* Put Global AXI and RAS Register into register array */ |
a70e33ea LJ |
472 | struct hisi_sas_debugfs_regs debugfs_regs[HISI_SAS_MAX_DEBUGFS_DUMP][DEBUGFS_REGS_NUM]; |
473 | struct hisi_sas_debugfs_port debugfs_port_reg[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_PHYS]; | |
474 | struct hisi_sas_debugfs_cq debugfs_cq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; | |
475 | struct hisi_sas_debugfs_dq debugfs_dq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; | |
476 | struct hisi_sas_debugfs_iost debugfs_iost[HISI_SAS_MAX_DEBUGFS_DUMP]; | |
477 | struct hisi_sas_debugfs_itct debugfs_itct[HISI_SAS_MAX_DEBUGFS_DUMP]; | |
478 | struct hisi_sas_debugfs_iost_cache debugfs_iost_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; | |
479 | struct hisi_sas_debugfs_itct_cache debugfs_itct_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; | |
480 | ||
8f643298 LJ |
481 | u64 debugfs_timestamp[HISI_SAS_MAX_DEBUGFS_DUMP]; |
482 | int debugfs_dump_index; | |
ef63464b | 483 | struct dentry *debugfs_dir; |
49159a5e | 484 | struct dentry *debugfs_dump_dentry; |
97b151e7 | 485 | struct dentry *debugfs_bist_dentry; |
cd96fe60 | 486 | struct dentry *debugfs_fifo_dentry; |
0e47effa XC |
487 | |
488 | int iopoll_q_cnt; | |
7eb7869f JG |
489 | }; |
490 | ||
c799d6bd JG |
491 | /* Generic HW DMA host memory structures */ |
492 | /* Delivery queue header */ | |
493 | struct hisi_sas_cmd_hdr { | |
494 | /* dw0 */ | |
495 | __le32 dw0; | |
496 | ||
497 | /* dw1 */ | |
498 | __le32 dw1; | |
499 | ||
500 | /* dw2 */ | |
501 | __le32 dw2; | |
502 | ||
503 | /* dw3 */ | |
504 | __le32 transfer_tags; | |
505 | ||
506 | /* dw4 */ | |
507 | __le32 data_transfer_len; | |
508 | ||
509 | /* dw5 */ | |
510 | __le32 first_burst_num; | |
511 | ||
512 | /* dw6 */ | |
513 | __le32 sg_len; | |
514 | ||
515 | /* dw7 */ | |
516 | __le32 dw7; | |
517 | ||
518 | /* dw8-9 */ | |
519 | __le64 cmd_table_addr; | |
520 | ||
521 | /* dw10-11 */ | |
522 | __le64 sts_buffer_addr; | |
523 | ||
524 | /* dw12-13 */ | |
525 | __le64 prd_table_addr; | |
526 | ||
527 | /* dw14-15 */ | |
528 | __le64 dif_prd_table_addr; | |
529 | }; | |
530 | ||
531 | struct hisi_sas_itct { | |
532 | __le64 qw0; | |
533 | __le64 sas_addr; | |
534 | __le64 qw2; | |
535 | __le64 qw3; | |
281e3bf6 | 536 | __le64 qw4_15[12]; |
c799d6bd JG |
537 | }; |
538 | ||
539 | struct hisi_sas_iost { | |
540 | __le64 qw0; | |
541 | __le64 qw1; | |
542 | __le64 qw2; | |
543 | __le64 qw3; | |
544 | }; | |
545 | ||
546 | struct hisi_sas_err_record { | |
8d1eee7d | 547 | u32 data[4]; |
c799d6bd JG |
548 | }; |
549 | ||
550 | struct hisi_sas_initial_fis { | |
551 | struct hisi_sas_err_record err_record; | |
552 | struct dev_to_host_fis fis; | |
553 | u32 rsvd[3]; | |
554 | }; | |
555 | ||
556 | struct hisi_sas_breakpoint { | |
3297ded1 XC |
557 | u8 data[128]; |
558 | }; | |
559 | ||
560 | struct hisi_sas_sata_breakpoint { | |
561 | struct hisi_sas_breakpoint tag[32]; | |
c799d6bd JG |
562 | }; |
563 | ||
564 | struct hisi_sas_sge { | |
565 | __le64 addr; | |
566 | __le32 page_ctrl_0; | |
567 | __le32 page_ctrl_1; | |
568 | __le32 data_len; | |
569 | __le32 data_off; | |
570 | }; | |
571 | ||
572 | struct hisi_sas_command_table_smp { | |
573 | u8 bytes[44]; | |
574 | }; | |
575 | ||
576 | struct hisi_sas_command_table_stp { | |
577 | struct host_to_dev_fis command_fis; | |
578 | u8 dummy[12]; | |
579 | u8 atapi_cdb[ATAPI_CDB_LEN]; | |
580 | }; | |
581 | ||
c7669f50 | 582 | #define HISI_SAS_SGE_PAGE_CNT (124) |
c799d6bd JG |
583 | struct hisi_sas_sge_page { |
584 | struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; | |
f557e32c | 585 | } __aligned(16); |
c799d6bd | 586 | |
c7669f50 | 587 | #define HISI_SAS_SGE_DIF_PAGE_CNT HISI_SAS_SGE_PAGE_CNT |
b3cce125 XC |
588 | struct hisi_sas_sge_dif_page { |
589 | struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT]; | |
590 | } __aligned(16); | |
591 | ||
c799d6bd JG |
592 | struct hisi_sas_command_table_ssp { |
593 | struct ssp_frame_hdr hdr; | |
594 | union { | |
595 | struct { | |
596 | struct ssp_command_iu task; | |
a14da7a2 | 597 | u32 prot[7]; |
c799d6bd JG |
598 | }; |
599 | struct ssp_tmf_iu ssp_task; | |
600 | struct xfer_rdy_iu xfer_rdy; | |
601 | struct ssp_response_iu ssp_res; | |
602 | } u; | |
603 | }; | |
604 | ||
605 | union hisi_sas_command_table { | |
606 | struct hisi_sas_command_table_ssp ssp; | |
607 | struct hisi_sas_command_table_smp smp; | |
608 | struct hisi_sas_command_table_stp stp; | |
f557e32c XT |
609 | } __aligned(16); |
610 | ||
611 | struct hisi_sas_status_buffer { | |
612 | struct hisi_sas_err_record err; | |
613 | u8 iu[1024]; | |
614 | } __aligned(16); | |
615 | ||
616 | struct hisi_sas_slot_buf_table { | |
617 | struct hisi_sas_status_buffer status_buffer; | |
618 | union hisi_sas_command_table command_header; | |
619 | struct hisi_sas_sge_page sge_page; | |
c799d6bd | 620 | }; |
2e244f0f | 621 | |
b3cce125 XC |
622 | struct hisi_sas_slot_dif_buf_table { |
623 | struct hisi_sas_slot_buf_table slot_buf; | |
624 | struct hisi_sas_sge_dif_page sge_dif_page; | |
625 | }; | |
626 | ||
e21fe3a5 | 627 | extern struct scsi_transport_template *hisi_sas_stt; |
ef63464b LJ |
628 | |
629 | extern bool hisi_sas_debugfs_enable; | |
905ab01f | 630 | extern u32 hisi_sas_debugfs_dump_count; |
ef63464b LJ |
631 | extern struct dentry *hisi_sas_debugfs_dir; |
632 | ||
a25d0d3d | 633 | extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba); |
ae68b566 | 634 | extern int hisi_sas_alloc(struct hisi_hba *hisi_hba); |
e21fe3a5 | 635 | extern void hisi_sas_free(struct hisi_hba *hisi_hba); |
468f4b8d | 636 | extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, |
637 | int direction); | |
2e244f0f | 638 | extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); |
75904077 XC |
639 | extern void hisi_sas_sata_done(struct sas_task *task, |
640 | struct hisi_sas_slot *slot); | |
0fa24c19 | 641 | extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); |
9fb10b54 JG |
642 | extern int hisi_sas_probe(struct platform_device *pdev, |
643 | const struct hisi_sas_hw *ops); | |
8cd6d0a3 | 644 | extern void hisi_sas_remove(struct platform_device *pdev); |
c799d6bd | 645 | |
235bfc7f | 646 | extern int hisi_sas_slave_configure(struct scsi_device *sdev); |
36c6b761 | 647 | extern int hisi_sas_slave_alloc(struct scsi_device *sdev); |
235bfc7f XC |
648 | extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time); |
649 | extern void hisi_sas_scan_start(struct Scsi_Host *shost); | |
235bfc7f | 650 | extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type); |
c63b88cc JG |
651 | extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, |
652 | int enable); | |
26c7efc3 AD |
653 | extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy, |
654 | gfp_t gfp_flags); | |
e9b6bada | 655 | extern void hisi_sas_phy_bcast(struct hisi_sas_phy *phy); |
27a3f229 JG |
656 | extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, |
657 | struct sas_task *task, | |
71fb36b5 XY |
658 | struct hisi_sas_slot *slot, |
659 | bool need_lock); | |
06ec0fb9 | 660 | extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); |
b4241f0f | 661 | extern void hisi_sas_rst_work_handler(struct work_struct *work); |
e402acdb | 662 | extern void hisi_sas_sync_rst_work_handler(struct work_struct *work); |
b6c9b15e | 663 | extern void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no); |
e537b62b XT |
664 | extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, |
665 | enum hisi_sas_phy_event event); | |
4d0951ee | 666 | extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba); |
c2c1d9de | 667 | extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max); |
b711ef5e XC |
668 | extern void hisi_sas_sync_cqs(struct hisi_hba *hisi_hba); |
669 | extern void hisi_sas_sync_poll_cqs(struct hisi_hba *hisi_hba); | |
4522204a XT |
670 | extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba); |
671 | extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba); | |
e8899fad | 672 | #endif |