Commit | Line | Data |
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1da177e4 | 1 | #include <linux/types.h> |
1da177e4 LT |
2 | #include <linux/init.h> |
3 | #include <linux/interrupt.h> | |
c1d288a5 GU |
4 | #include <linux/mm.h> |
5 | #include <linux/slab.h> | |
6 | #include <linux/spinlock.h> | |
7 | #include <linux/zorro.h> | |
acf3368f | 8 | #include <linux/module.h> |
1da177e4 | 9 | |
1da177e4 LT |
10 | #include <asm/page.h> |
11 | #include <asm/pgtable.h> | |
12 | #include <asm/amigaints.h> | |
13 | #include <asm/amigahw.h> | |
1da177e4 LT |
14 | |
15 | #include "scsi.h" | |
1da177e4 LT |
16 | #include "wd33c93.h" |
17 | #include "gvp11.h" | |
18 | ||
1da177e4 | 19 | |
11ca46ea GU |
20 | #define CHECK_WD33C93 |
21 | ||
cf2ed279 GU |
22 | struct gvp11_hostdata { |
23 | struct WD33C93_hostdata wh; | |
24 | struct gvp11_scsiregs *regs; | |
25 | }; | |
26 | ||
6869b15e | 27 | static irqreturn_t gvp11_intr(int irq, void *data) |
1da177e4 | 28 | { |
6869b15e | 29 | struct Scsi_Host *instance = data; |
cf2ed279 GU |
30 | struct gvp11_hostdata *hdata = shost_priv(instance); |
31 | unsigned int status = hdata->regs->CNTR; | |
bb17b787 | 32 | unsigned long flags; |
bb17b787 | 33 | |
bb17b787 GU |
34 | if (!(status & GVP11_DMAC_INT_PENDING)) |
35 | return IRQ_NONE; | |
36 | ||
37 | spin_lock_irqsave(instance->host_lock, flags); | |
38 | wd33c93_intr(instance); | |
39 | spin_unlock_irqrestore(instance->host_lock, flags); | |
40 | return IRQ_HANDLED; | |
1da177e4 LT |
41 | } |
42 | ||
43 | static int gvp11_xfer_mask = 0; | |
44 | ||
bb17b787 | 45 | void gvp11_setup(char *str, int *ints) |
1da177e4 | 46 | { |
bb17b787 | 47 | gvp11_xfer_mask = ints[1]; |
1da177e4 LT |
48 | } |
49 | ||
65396410 | 50 | static int dma_setup(struct scsi_cmnd *cmd, int dir_in) |
1da177e4 | 51 | { |
52c3d8a6 | 52 | struct Scsi_Host *instance = cmd->device->host; |
cf2ed279 GU |
53 | struct gvp11_hostdata *hdata = shost_priv(instance); |
54 | struct WD33C93_hostdata *wh = &hdata->wh; | |
55 | struct gvp11_scsiregs *regs = hdata->regs; | |
bb17b787 GU |
56 | unsigned short cntr = GVP11_DMAC_INT_ENABLE; |
57 | unsigned long addr = virt_to_bus(cmd->SCp.ptr); | |
58 | int bank_mask; | |
59 | static int scsi_alloc_out_of_range = 0; | |
1da177e4 | 60 | |
bb17b787 | 61 | /* use bounce buffer if the physical address is bad */ |
cf2ed279 GU |
62 | if (addr & wh->dma_xfer_mask) { |
63 | wh->dma_bounce_len = (cmd->SCp.this_residual + 511) & ~0x1ff; | |
bb17b787 GU |
64 | |
65 | if (!scsi_alloc_out_of_range) { | |
cf2ed279 GU |
66 | wh->dma_bounce_buffer = |
67 | kmalloc(wh->dma_bounce_len, GFP_KERNEL); | |
68 | wh->dma_buffer_pool = BUF_SCSI_ALLOCED; | |
bb17b787 | 69 | } |
1da177e4 | 70 | |
bb17b787 | 71 | if (scsi_alloc_out_of_range || |
cf2ed279 GU |
72 | !wh->dma_bounce_buffer) { |
73 | wh->dma_bounce_buffer = | |
74 | amiga_chip_alloc(wh->dma_bounce_len, | |
bb17b787 | 75 | "GVP II SCSI Bounce Buffer"); |
1da177e4 | 76 | |
cf2ed279 GU |
77 | if (!wh->dma_bounce_buffer) { |
78 | wh->dma_bounce_len = 0; | |
bb17b787 GU |
79 | return 1; |
80 | } | |
1da177e4 | 81 | |
cf2ed279 | 82 | wh->dma_buffer_pool = BUF_CHIP_ALLOCED; |
bb17b787 | 83 | } |
1da177e4 | 84 | |
bb17b787 | 85 | /* check if the address of the bounce buffer is OK */ |
cf2ed279 | 86 | addr = virt_to_bus(wh->dma_bounce_buffer); |
bb17b787 | 87 | |
cf2ed279 | 88 | if (addr & wh->dma_xfer_mask) { |
bb17b787 | 89 | /* fall back to Chip RAM if address out of range */ |
cf2ed279 GU |
90 | if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) { |
91 | kfree(wh->dma_bounce_buffer); | |
bb17b787 GU |
92 | scsi_alloc_out_of_range = 1; |
93 | } else { | |
cf2ed279 | 94 | amiga_chip_free(wh->dma_bounce_buffer); |
bb17b787 GU |
95 | } |
96 | ||
cf2ed279 GU |
97 | wh->dma_bounce_buffer = |
98 | amiga_chip_alloc(wh->dma_bounce_len, | |
bb17b787 GU |
99 | "GVP II SCSI Bounce Buffer"); |
100 | ||
cf2ed279 GU |
101 | if (!wh->dma_bounce_buffer) { |
102 | wh->dma_bounce_len = 0; | |
bb17b787 GU |
103 | return 1; |
104 | } | |
105 | ||
cf2ed279 GU |
106 | addr = virt_to_bus(wh->dma_bounce_buffer); |
107 | wh->dma_buffer_pool = BUF_CHIP_ALLOCED; | |
bb17b787 GU |
108 | } |
109 | ||
110 | if (!dir_in) { | |
111 | /* copy to bounce buffer for a write */ | |
cf2ed279 | 112 | memcpy(wh->dma_bounce_buffer, cmd->SCp.ptr, |
52c3d8a6 | 113 | cmd->SCp.this_residual); |
bb17b787 | 114 | } |
1da177e4 | 115 | } |
1da177e4 | 116 | |
bb17b787 GU |
117 | /* setup dma direction */ |
118 | if (!dir_in) | |
119 | cntr |= GVP11_DMAC_DIR_WRITE; | |
1da177e4 | 120 | |
cf2ed279 | 121 | wh->dma_dir = dir_in; |
6869b15e | 122 | regs->CNTR = cntr; |
1da177e4 | 123 | |
bb17b787 | 124 | /* setup DMA *physical* address */ |
6869b15e | 125 | regs->ACR = addr; |
1da177e4 | 126 | |
bb17b787 GU |
127 | if (dir_in) { |
128 | /* invalidate any cache */ | |
129 | cache_clear(addr, cmd->SCp.this_residual); | |
130 | } else { | |
131 | /* push any dirty cache */ | |
132 | cache_push(addr, cmd->SCp.this_residual); | |
133 | } | |
1da177e4 | 134 | |
cf2ed279 | 135 | bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0; |
52c3d8a6 | 136 | if (bank_mask) |
6869b15e | 137 | regs->BANK = bank_mask & (addr >> 18); |
1da177e4 | 138 | |
bb17b787 | 139 | /* start DMA */ |
6869b15e | 140 | regs->ST_DMA = 1; |
1da177e4 | 141 | |
bb17b787 GU |
142 | /* return success */ |
143 | return 0; | |
1da177e4 LT |
144 | } |
145 | ||
65396410 HK |
146 | static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt, |
147 | int status) | |
1da177e4 | 148 | { |
cf2ed279 GU |
149 | struct gvp11_hostdata *hdata = shost_priv(instance); |
150 | struct WD33C93_hostdata *wh = &hdata->wh; | |
151 | struct gvp11_scsiregs *regs = hdata->regs; | |
52c3d8a6 | 152 | |
bb17b787 | 153 | /* stop DMA */ |
6869b15e | 154 | regs->SP_DMA = 1; |
bb17b787 | 155 | /* remove write bit from CONTROL bits */ |
6869b15e | 156 | regs->CNTR = GVP11_DMAC_INT_ENABLE; |
bb17b787 GU |
157 | |
158 | /* copy from a bounce buffer, if necessary */ | |
cf2ed279 GU |
159 | if (status && wh->dma_bounce_buffer) { |
160 | if (wh->dma_dir && SCpnt) | |
161 | memcpy(SCpnt->SCp.ptr, wh->dma_bounce_buffer, | |
bb17b787 GU |
162 | SCpnt->SCp.this_residual); |
163 | ||
cf2ed279 GU |
164 | if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) |
165 | kfree(wh->dma_bounce_buffer); | |
bb17b787 | 166 | else |
cf2ed279 | 167 | amiga_chip_free(wh->dma_bounce_buffer); |
bb17b787 | 168 | |
cf2ed279 GU |
169 | wh->dma_bounce_buffer = NULL; |
170 | wh->dma_bounce_len = 0; | |
bb17b787 | 171 | } |
1da177e4 LT |
172 | } |
173 | ||
c1d288a5 GU |
174 | static struct scsi_host_template gvp11_scsi_template = { |
175 | .module = THIS_MODULE, | |
176 | .name = "GVP Series II SCSI", | |
408bb25b AV |
177 | .show_info = wd33c93_show_info, |
178 | .write_info = wd33c93_write_info, | |
c1d288a5 GU |
179 | .proc_name = "GVP11", |
180 | .queuecommand = wd33c93_queuecommand, | |
181 | .eh_abort_handler = wd33c93_abort, | |
c1d288a5 GU |
182 | .eh_host_reset_handler = wd33c93_host_reset, |
183 | .can_queue = CAN_QUEUE, | |
184 | .this_id = 7, | |
185 | .sg_tablesize = SG_ALL, | |
186 | .cmd_per_lun = CMD_PER_LUN, | |
4af14d11 | 187 | .dma_boundary = PAGE_SIZE - 1, |
c1d288a5 GU |
188 | }; |
189 | ||
6f039790 | 190 | static int check_wd33c93(struct gvp11_scsiregs *regs) |
11ca46ea GU |
191 | { |
192 | #ifdef CHECK_WD33C93 | |
193 | volatile unsigned char *sasr_3393, *scmd_3393; | |
194 | unsigned char save_sasr; | |
195 | unsigned char q, qq; | |
196 | ||
197 | /* | |
198 | * These darn GVP boards are a problem - it can be tough to tell | |
199 | * whether or not they include a SCSI controller. This is the | |
200 | * ultimate Yet-Another-GVP-Detection-Hack in that it actually | |
201 | * probes for a WD33c93 chip: If we find one, it's extremely | |
202 | * likely that this card supports SCSI, regardless of Product_ | |
203 | * Code, Board_Size, etc. | |
204 | */ | |
205 | ||
206 | /* Get pointers to the presumed register locations and save contents */ | |
207 | ||
208 | sasr_3393 = ®s->SASR; | |
209 | scmd_3393 = ®s->SCMD; | |
210 | save_sasr = *sasr_3393; | |
211 | ||
212 | /* First test the AuxStatus Reg */ | |
213 | ||
214 | q = *sasr_3393; /* read it */ | |
215 | if (q & 0x08) /* bit 3 should always be clear */ | |
216 | return -ENODEV; | |
217 | *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */ | |
218 | if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */ | |
219 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
220 | return -ENODEV; | |
221 | } | |
222 | if (*sasr_3393 != q) { /* should still read the same */ | |
223 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
224 | return -ENODEV; | |
225 | } | |
226 | if (*scmd_3393 != q) /* and so should the image at 0x1f */ | |
227 | return -ENODEV; | |
228 | ||
229 | /* | |
230 | * Ok, we probably have a wd33c93, but let's check a few other places | |
231 | * for good measure. Make sure that this works for both 'A and 'B | |
232 | * chip versions. | |
233 | */ | |
234 | ||
235 | *sasr_3393 = WD_SCSI_STATUS; | |
236 | q = *scmd_3393; | |
237 | *sasr_3393 = WD_SCSI_STATUS; | |
238 | *scmd_3393 = ~q; | |
239 | *sasr_3393 = WD_SCSI_STATUS; | |
240 | qq = *scmd_3393; | |
241 | *sasr_3393 = WD_SCSI_STATUS; | |
242 | *scmd_3393 = q; | |
243 | if (qq != q) /* should be read only */ | |
244 | return -ENODEV; | |
245 | *sasr_3393 = 0x1e; /* this register is unimplemented */ | |
246 | q = *scmd_3393; | |
247 | *sasr_3393 = 0x1e; | |
248 | *scmd_3393 = ~q; | |
249 | *sasr_3393 = 0x1e; | |
250 | qq = *scmd_3393; | |
251 | *sasr_3393 = 0x1e; | |
252 | *scmd_3393 = q; | |
253 | if (qq != q || qq != 0xff) /* should be read only, all 1's */ | |
254 | return -ENODEV; | |
255 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
256 | q = *scmd_3393; | |
257 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
258 | *scmd_3393 = ~q; | |
259 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
260 | qq = *scmd_3393; | |
261 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
262 | *scmd_3393 = q; | |
263 | if (qq != (~q & 0xff)) /* should be read/write */ | |
264 | return -ENODEV; | |
265 | #endif /* CHECK_WD33C93 */ | |
266 | ||
267 | return 0; | |
268 | } | |
1da177e4 | 269 | |
6f039790 | 270 | static int gvp11_probe(struct zorro_dev *z, const struct zorro_device_id *ent) |
1da177e4 | 271 | { |
bb17b787 GU |
272 | struct Scsi_Host *instance; |
273 | unsigned long address; | |
c1d288a5 | 274 | int error; |
bb17b787 | 275 | unsigned int epc; |
bb17b787 | 276 | unsigned int default_dma_xfer_mask; |
cf2ed279 | 277 | struct gvp11_hostdata *hdata; |
349d65fd | 278 | struct gvp11_scsiregs *regs; |
6869b15e | 279 | wd33c93_regs wdregs; |
c1d288a5 GU |
280 | |
281 | default_dma_xfer_mask = ent->driver_data; | |
282 | ||
283 | /* | |
284 | * Rumors state that some GVP ram boards use the same product | |
285 | * code as the SCSI controllers. Therefore if the board-size | |
25985edc | 286 | * is not 64KB we assume it is a ram board and bail out. |
c1d288a5 GU |
287 | */ |
288 | if (zorro_resource_len(z) != 0x10000) | |
289 | return -ENODEV; | |
290 | ||
291 | address = z->resource.start; | |
292 | if (!request_mem_region(address, 256, "wd33c93")) | |
293 | return -EBUSY; | |
294 | ||
6112ea08 | 295 | regs = ZTWO_VADDR(address); |
c1d288a5 GU |
296 | |
297 | error = check_wd33c93(regs); | |
298 | if (error) | |
299 | goto fail_check_or_alloc; | |
300 | ||
301 | instance = scsi_host_alloc(&gvp11_scsi_template, | |
cf2ed279 | 302 | sizeof(struct gvp11_hostdata)); |
c1d288a5 GU |
303 | if (!instance) { |
304 | error = -ENOMEM; | |
305 | goto fail_check_or_alloc; | |
bb17b787 | 306 | } |
1da177e4 | 307 | |
c1d288a5 GU |
308 | instance->irq = IRQ_AMIGA_PORTS; |
309 | instance->unique_id = z->slotaddr; | |
1da177e4 | 310 | |
c1d288a5 GU |
311 | regs->secret2 = 1; |
312 | regs->secret1 = 0; | |
313 | regs->secret3 = 15; | |
314 | while (regs->CNTR & GVP11_DMAC_BUSY) | |
315 | ; | |
316 | regs->CNTR = 0; | |
317 | regs->BANK = 0; | |
68b3aa7c | 318 | |
c1d288a5 GU |
319 | wdregs.SASR = ®s->SASR; |
320 | wdregs.SCMD = ®s->SCMD; | |
df0ae249 | 321 | |
c1d288a5 GU |
322 | hdata = shost_priv(instance); |
323 | if (gvp11_xfer_mask) | |
cf2ed279 | 324 | hdata->wh.dma_xfer_mask = gvp11_xfer_mask; |
c1d288a5 | 325 | else |
cf2ed279 | 326 | hdata->wh.dma_xfer_mask = default_dma_xfer_mask; |
68b3aa7c | 327 | |
cf2ed279 GU |
328 | hdata->wh.no_sync = 0xff; |
329 | hdata->wh.fast = 0; | |
330 | hdata->wh.dma_mode = CTRL_DMA; | |
331 | hdata->regs = regs; | |
1da177e4 | 332 | |
c1d288a5 GU |
333 | /* |
334 | * Check for 14MHz SCSI clock | |
335 | */ | |
336 | epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000); | |
337 | wd33c93_init(instance, wdregs, dma_setup, dma_stop, | |
338 | (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10 | |
339 | : WD33C93_FS_12_15); | |
1da177e4 | 340 | |
c1d288a5 GU |
341 | error = request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED, |
342 | "GVP11 SCSI", instance); | |
343 | if (error) | |
344 | goto fail_irq; | |
1da177e4 | 345 | |
c1d288a5 | 346 | regs->CNTR = GVP11_DMAC_INT_ENABLE; |
1da177e4 | 347 | |
c1d288a5 GU |
348 | error = scsi_add_host(instance, NULL); |
349 | if (error) | |
350 | goto fail_host; | |
1da177e4 | 351 | |
c1d288a5 GU |
352 | zorro_set_drvdata(z, instance); |
353 | scsi_scan_host(instance); | |
354 | return 0; | |
1da177e4 | 355 | |
c1d288a5 GU |
356 | fail_host: |
357 | free_irq(IRQ_AMIGA_PORTS, instance); | |
358 | fail_irq: | |
359 | scsi_host_put(instance); | |
360 | fail_check_or_alloc: | |
361 | release_mem_region(address, 256); | |
362 | return error; | |
363 | } | |
1da177e4 | 364 | |
6f039790 | 365 | static void gvp11_remove(struct zorro_dev *z) |
1da177e4 | 366 | { |
c1d288a5 | 367 | struct Scsi_Host *instance = zorro_get_drvdata(z); |
cf2ed279 | 368 | struct gvp11_hostdata *hdata = shost_priv(instance); |
6869b15e | 369 | |
cf2ed279 | 370 | hdata->regs->CNTR = 0; |
c1d288a5 | 371 | scsi_remove_host(instance); |
bb17b787 | 372 | free_irq(IRQ_AMIGA_PORTS, instance); |
c1d288a5 GU |
373 | scsi_host_put(instance); |
374 | release_mem_region(z->resource.start, 256); | |
375 | } | |
376 | ||
377 | /* | |
378 | * This should (hopefully) be the correct way to identify | |
379 | * all the different GVP SCSI controllers (except for the | |
380 | * SERIES I though). | |
381 | */ | |
382 | ||
6f039790 | 383 | static struct zorro_device_id gvp11_zorro_tbl[] = { |
c1d288a5 GU |
384 | { ZORRO_PROD_GVP_COMBO_030_R3_SCSI, ~0x00ffffff }, |
385 | { ZORRO_PROD_GVP_SERIES_II, ~0x00ffffff }, | |
386 | { ZORRO_PROD_GVP_GFORCE_030_SCSI, ~0x01ffffff }, | |
387 | { ZORRO_PROD_GVP_A530_SCSI, ~0x01ffffff }, | |
388 | { ZORRO_PROD_GVP_COMBO_030_R4_SCSI, ~0x01ffffff }, | |
389 | { ZORRO_PROD_GVP_A1291, ~0x07ffffff }, | |
390 | { ZORRO_PROD_GVP_GFORCE_040_SCSI_1, ~0x07ffffff }, | |
391 | { 0 } | |
392 | }; | |
393 | MODULE_DEVICE_TABLE(zorro, gvp11_zorro_tbl); | |
394 | ||
395 | static struct zorro_driver gvp11_driver = { | |
396 | .name = "gvp11", | |
397 | .id_table = gvp11_zorro_tbl, | |
398 | .probe = gvp11_probe, | |
6f039790 | 399 | .remove = gvp11_remove, |
c1d288a5 GU |
400 | }; |
401 | ||
402 | static int __init gvp11_init(void) | |
403 | { | |
404 | return zorro_register_driver(&gvp11_driver); | |
405 | } | |
406 | module_init(gvp11_init); | |
407 | ||
408 | static void __exit gvp11_exit(void) | |
409 | { | |
410 | zorro_unregister_driver(&gvp11_driver); | |
1da177e4 | 411 | } |
c1d288a5 | 412 | module_exit(gvp11_exit); |
1da177e4 | 413 | |
c1d288a5 | 414 | MODULE_DESCRIPTION("GVP Series II SCSI"); |
1da177e4 | 415 | MODULE_LICENSE("GPL"); |