Commit | Line | Data |
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09c434b8 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 | 2 | #include <linux/types.h> |
1da177e4 LT |
3 | #include <linux/init.h> |
4 | #include <linux/interrupt.h> | |
c1d288a5 GU |
5 | #include <linux/mm.h> |
6 | #include <linux/slab.h> | |
7 | #include <linux/spinlock.h> | |
8 | #include <linux/zorro.h> | |
acf3368f | 9 | #include <linux/module.h> |
1da177e4 | 10 | |
1da177e4 | 11 | #include <asm/page.h> |
1da177e4 LT |
12 | #include <asm/amigaints.h> |
13 | #include <asm/amigahw.h> | |
1da177e4 | 14 | |
53555fb7 BVA |
15 | #include <scsi/scsi.h> |
16 | #include <scsi/scsi_cmnd.h> | |
17 | #include <scsi/scsi_device.h> | |
18 | #include <scsi/scsi_eh.h> | |
19 | #include <scsi/scsi_tcq.h> | |
1da177e4 LT |
20 | #include "wd33c93.h" |
21 | #include "gvp11.h" | |
22 | ||
1da177e4 | 23 | |
11ca46ea GU |
24 | #define CHECK_WD33C93 |
25 | ||
cf2ed279 GU |
26 | struct gvp11_hostdata { |
27 | struct WD33C93_hostdata wh; | |
28 | struct gvp11_scsiregs *regs; | |
158da6bc | 29 | struct device *dev; |
cf2ed279 GU |
30 | }; |
31 | ||
158da6bc | 32 | #define DMA_DIR(d) ((d == DATA_OUT_DIR) ? DMA_TO_DEVICE : DMA_FROM_DEVICE) |
f712e24c | 33 | #define TO_DMA_MASK(m) (~((unsigned long long)m & 0xffffffff)) |
158da6bc | 34 | |
6869b15e | 35 | static irqreturn_t gvp11_intr(int irq, void *data) |
1da177e4 | 36 | { |
6869b15e | 37 | struct Scsi_Host *instance = data; |
cf2ed279 GU |
38 | struct gvp11_hostdata *hdata = shost_priv(instance); |
39 | unsigned int status = hdata->regs->CNTR; | |
bb17b787 | 40 | unsigned long flags; |
bb17b787 | 41 | |
bb17b787 GU |
42 | if (!(status & GVP11_DMAC_INT_PENDING)) |
43 | return IRQ_NONE; | |
44 | ||
45 | spin_lock_irqsave(instance->host_lock, flags); | |
46 | wd33c93_intr(instance); | |
47 | spin_unlock_irqrestore(instance->host_lock, flags); | |
48 | return IRQ_HANDLED; | |
1da177e4 LT |
49 | } |
50 | ||
51 | static int gvp11_xfer_mask = 0; | |
52 | ||
bb17b787 | 53 | void gvp11_setup(char *str, int *ints) |
1da177e4 | 54 | { |
bb17b787 | 55 | gvp11_xfer_mask = ints[1]; |
1da177e4 LT |
56 | } |
57 | ||
65396410 | 58 | static int dma_setup(struct scsi_cmnd *cmd, int dir_in) |
1da177e4 | 59 | { |
dbb2da55 | 60 | struct scsi_pointer *scsi_pointer = WD33C93_scsi_pointer(cmd); |
158da6bc | 61 | unsigned long len = scsi_pointer->this_residual; |
52c3d8a6 | 62 | struct Scsi_Host *instance = cmd->device->host; |
cf2ed279 GU |
63 | struct gvp11_hostdata *hdata = shost_priv(instance); |
64 | struct WD33C93_hostdata *wh = &hdata->wh; | |
65 | struct gvp11_scsiregs *regs = hdata->regs; | |
bb17b787 | 66 | unsigned short cntr = GVP11_DMAC_INT_ENABLE; |
158da6bc | 67 | dma_addr_t addr; |
bb17b787 GU |
68 | int bank_mask; |
69 | static int scsi_alloc_out_of_range = 0; | |
1da177e4 | 70 | |
158da6bc MS |
71 | addr = dma_map_single(hdata->dev, scsi_pointer->ptr, |
72 | len, DMA_DIR(dir_in)); | |
73 | if (dma_mapping_error(hdata->dev, addr)) { | |
74 | dev_warn(hdata->dev, "cannot map SCSI data block %p\n", | |
75 | scsi_pointer->ptr); | |
76 | return 1; | |
77 | } | |
78 | scsi_pointer->dma_handle = addr; | |
79 | ||
bb17b787 | 80 | /* use bounce buffer if the physical address is bad */ |
cf2ed279 | 81 | if (addr & wh->dma_xfer_mask) { |
158da6bc MS |
82 | /* drop useless mapping */ |
83 | dma_unmap_single(hdata->dev, scsi_pointer->dma_handle, | |
84 | scsi_pointer->this_residual, | |
85 | DMA_DIR(dir_in)); | |
86 | scsi_pointer->dma_handle = (dma_addr_t) NULL; | |
87 | ||
dbb2da55 | 88 | wh->dma_bounce_len = (scsi_pointer->this_residual + 511) & ~0x1ff; |
bb17b787 GU |
89 | |
90 | if (!scsi_alloc_out_of_range) { | |
cf2ed279 GU |
91 | wh->dma_bounce_buffer = |
92 | kmalloc(wh->dma_bounce_len, GFP_KERNEL); | |
93 | wh->dma_buffer_pool = BUF_SCSI_ALLOCED; | |
bb17b787 | 94 | } |
1da177e4 | 95 | |
bb17b787 | 96 | if (scsi_alloc_out_of_range || |
cf2ed279 GU |
97 | !wh->dma_bounce_buffer) { |
98 | wh->dma_bounce_buffer = | |
99 | amiga_chip_alloc(wh->dma_bounce_len, | |
bb17b787 | 100 | "GVP II SCSI Bounce Buffer"); |
1da177e4 | 101 | |
cf2ed279 GU |
102 | if (!wh->dma_bounce_buffer) { |
103 | wh->dma_bounce_len = 0; | |
bb17b787 GU |
104 | return 1; |
105 | } | |
1da177e4 | 106 | |
cf2ed279 | 107 | wh->dma_buffer_pool = BUF_CHIP_ALLOCED; |
bb17b787 | 108 | } |
1da177e4 | 109 | |
158da6bc MS |
110 | if (!dir_in) { |
111 | /* copy to bounce buffer for a write */ | |
112 | memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr, | |
113 | scsi_pointer->this_residual); | |
114 | } | |
115 | ||
116 | if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) { | |
117 | /* will flush/invalidate cache for us */ | |
118 | addr = dma_map_single(hdata->dev, | |
119 | wh->dma_bounce_buffer, | |
120 | wh->dma_bounce_len, | |
121 | DMA_DIR(dir_in)); | |
122 | /* can't map buffer; use PIO */ | |
123 | if (dma_mapping_error(hdata->dev, addr)) { | |
124 | dev_warn(hdata->dev, | |
125 | "cannot map bounce buffer %p\n", | |
126 | wh->dma_bounce_buffer); | |
127 | return 1; | |
128 | } | |
129 | } | |
bb17b787 | 130 | |
cf2ed279 | 131 | if (addr & wh->dma_xfer_mask) { |
158da6bc MS |
132 | /* drop useless mapping */ |
133 | dma_unmap_single(hdata->dev, scsi_pointer->dma_handle, | |
134 | scsi_pointer->this_residual, | |
135 | DMA_DIR(dir_in)); | |
bb17b787 | 136 | /* fall back to Chip RAM if address out of range */ |
cf2ed279 GU |
137 | if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) { |
138 | kfree(wh->dma_bounce_buffer); | |
bb17b787 GU |
139 | scsi_alloc_out_of_range = 1; |
140 | } else { | |
cf2ed279 | 141 | amiga_chip_free(wh->dma_bounce_buffer); |
bb17b787 GU |
142 | } |
143 | ||
cf2ed279 GU |
144 | wh->dma_bounce_buffer = |
145 | amiga_chip_alloc(wh->dma_bounce_len, | |
bb17b787 GU |
146 | "GVP II SCSI Bounce Buffer"); |
147 | ||
cf2ed279 GU |
148 | if (!wh->dma_bounce_buffer) { |
149 | wh->dma_bounce_len = 0; | |
bb17b787 GU |
150 | return 1; |
151 | } | |
152 | ||
158da6bc MS |
153 | if (!dir_in) { |
154 | /* copy to bounce buffer for a write */ | |
155 | memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr, | |
156 | scsi_pointer->this_residual); | |
157 | } | |
158 | /* chip RAM can be mapped to phys. address directly */ | |
159 | addr = virt_to_phys(wh->dma_bounce_buffer); | |
160 | /* no need to flush/invalidate cache */ | |
cf2ed279 | 161 | wh->dma_buffer_pool = BUF_CHIP_ALLOCED; |
bb17b787 | 162 | } |
158da6bc MS |
163 | /* finally, have OK mapping (punted for PIO else) */ |
164 | scsi_pointer->dma_handle = addr; | |
bb17b787 | 165 | |
1da177e4 | 166 | } |
1da177e4 | 167 | |
bb17b787 GU |
168 | /* setup dma direction */ |
169 | if (!dir_in) | |
170 | cntr |= GVP11_DMAC_DIR_WRITE; | |
1da177e4 | 171 | |
cf2ed279 | 172 | wh->dma_dir = dir_in; |
6869b15e | 173 | regs->CNTR = cntr; |
1da177e4 | 174 | |
bb17b787 | 175 | /* setup DMA *physical* address */ |
6869b15e | 176 | regs->ACR = addr; |
1da177e4 | 177 | |
158da6bc | 178 | /* no more cache flush here - dma_map_single() takes care */ |
1da177e4 | 179 | |
cf2ed279 | 180 | bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0; |
52c3d8a6 | 181 | if (bank_mask) |
6869b15e | 182 | regs->BANK = bank_mask & (addr >> 18); |
1da177e4 | 183 | |
bb17b787 | 184 | /* start DMA */ |
6869b15e | 185 | regs->ST_DMA = 1; |
1da177e4 | 186 | |
bb17b787 GU |
187 | /* return success */ |
188 | return 0; | |
1da177e4 LT |
189 | } |
190 | ||
65396410 HK |
191 | static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt, |
192 | int status) | |
1da177e4 | 193 | { |
dbb2da55 | 194 | struct scsi_pointer *scsi_pointer = WD33C93_scsi_pointer(SCpnt); |
cf2ed279 GU |
195 | struct gvp11_hostdata *hdata = shost_priv(instance); |
196 | struct WD33C93_hostdata *wh = &hdata->wh; | |
197 | struct gvp11_scsiregs *regs = hdata->regs; | |
52c3d8a6 | 198 | |
bb17b787 | 199 | /* stop DMA */ |
6869b15e | 200 | regs->SP_DMA = 1; |
bb17b787 | 201 | /* remove write bit from CONTROL bits */ |
6869b15e | 202 | regs->CNTR = GVP11_DMAC_INT_ENABLE; |
bb17b787 | 203 | |
158da6bc MS |
204 | if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) |
205 | dma_unmap_single(hdata->dev, scsi_pointer->dma_handle, | |
206 | scsi_pointer->this_residual, | |
207 | DMA_DIR(wh->dma_dir)); | |
208 | ||
bb17b787 | 209 | /* copy from a bounce buffer, if necessary */ |
cf2ed279 GU |
210 | if (status && wh->dma_bounce_buffer) { |
211 | if (wh->dma_dir && SCpnt) | |
dbb2da55 BVA |
212 | memcpy(scsi_pointer->ptr, wh->dma_bounce_buffer, |
213 | scsi_pointer->this_residual); | |
bb17b787 | 214 | |
cf2ed279 GU |
215 | if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) |
216 | kfree(wh->dma_bounce_buffer); | |
bb17b787 | 217 | else |
cf2ed279 | 218 | amiga_chip_free(wh->dma_bounce_buffer); |
bb17b787 | 219 | |
cf2ed279 GU |
220 | wh->dma_bounce_buffer = NULL; |
221 | wh->dma_bounce_len = 0; | |
bb17b787 | 222 | } |
1da177e4 LT |
223 | } |
224 | ||
c1d288a5 GU |
225 | static struct scsi_host_template gvp11_scsi_template = { |
226 | .module = THIS_MODULE, | |
227 | .name = "GVP Series II SCSI", | |
408bb25b AV |
228 | .show_info = wd33c93_show_info, |
229 | .write_info = wd33c93_write_info, | |
c1d288a5 GU |
230 | .proc_name = "GVP11", |
231 | .queuecommand = wd33c93_queuecommand, | |
232 | .eh_abort_handler = wd33c93_abort, | |
c1d288a5 GU |
233 | .eh_host_reset_handler = wd33c93_host_reset, |
234 | .can_queue = CAN_QUEUE, | |
235 | .this_id = 7, | |
236 | .sg_tablesize = SG_ALL, | |
237 | .cmd_per_lun = CMD_PER_LUN, | |
4af14d11 | 238 | .dma_boundary = PAGE_SIZE - 1, |
dbb2da55 | 239 | .cmd_size = sizeof(struct scsi_pointer), |
c1d288a5 GU |
240 | }; |
241 | ||
6f039790 | 242 | static int check_wd33c93(struct gvp11_scsiregs *regs) |
11ca46ea GU |
243 | { |
244 | #ifdef CHECK_WD33C93 | |
245 | volatile unsigned char *sasr_3393, *scmd_3393; | |
246 | unsigned char save_sasr; | |
247 | unsigned char q, qq; | |
248 | ||
249 | /* | |
250 | * These darn GVP boards are a problem - it can be tough to tell | |
251 | * whether or not they include a SCSI controller. This is the | |
252 | * ultimate Yet-Another-GVP-Detection-Hack in that it actually | |
253 | * probes for a WD33c93 chip: If we find one, it's extremely | |
254 | * likely that this card supports SCSI, regardless of Product_ | |
255 | * Code, Board_Size, etc. | |
256 | */ | |
257 | ||
258 | /* Get pointers to the presumed register locations and save contents */ | |
259 | ||
260 | sasr_3393 = ®s->SASR; | |
261 | scmd_3393 = ®s->SCMD; | |
262 | save_sasr = *sasr_3393; | |
263 | ||
264 | /* First test the AuxStatus Reg */ | |
265 | ||
266 | q = *sasr_3393; /* read it */ | |
267 | if (q & 0x08) /* bit 3 should always be clear */ | |
268 | return -ENODEV; | |
269 | *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */ | |
270 | if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */ | |
271 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
272 | return -ENODEV; | |
273 | } | |
274 | if (*sasr_3393 != q) { /* should still read the same */ | |
275 | *sasr_3393 = save_sasr; /* Oops - restore this byte */ | |
276 | return -ENODEV; | |
277 | } | |
278 | if (*scmd_3393 != q) /* and so should the image at 0x1f */ | |
279 | return -ENODEV; | |
280 | ||
281 | /* | |
282 | * Ok, we probably have a wd33c93, but let's check a few other places | |
283 | * for good measure. Make sure that this works for both 'A and 'B | |
284 | * chip versions. | |
285 | */ | |
286 | ||
287 | *sasr_3393 = WD_SCSI_STATUS; | |
288 | q = *scmd_3393; | |
289 | *sasr_3393 = WD_SCSI_STATUS; | |
290 | *scmd_3393 = ~q; | |
291 | *sasr_3393 = WD_SCSI_STATUS; | |
292 | qq = *scmd_3393; | |
293 | *sasr_3393 = WD_SCSI_STATUS; | |
294 | *scmd_3393 = q; | |
295 | if (qq != q) /* should be read only */ | |
296 | return -ENODEV; | |
297 | *sasr_3393 = 0x1e; /* this register is unimplemented */ | |
298 | q = *scmd_3393; | |
299 | *sasr_3393 = 0x1e; | |
300 | *scmd_3393 = ~q; | |
301 | *sasr_3393 = 0x1e; | |
302 | qq = *scmd_3393; | |
303 | *sasr_3393 = 0x1e; | |
304 | *scmd_3393 = q; | |
305 | if (qq != q || qq != 0xff) /* should be read only, all 1's */ | |
306 | return -ENODEV; | |
307 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
308 | q = *scmd_3393; | |
309 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
310 | *scmd_3393 = ~q; | |
311 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
312 | qq = *scmd_3393; | |
313 | *sasr_3393 = WD_TIMEOUT_PERIOD; | |
314 | *scmd_3393 = q; | |
315 | if (qq != (~q & 0xff)) /* should be read/write */ | |
316 | return -ENODEV; | |
317 | #endif /* CHECK_WD33C93 */ | |
318 | ||
319 | return 0; | |
320 | } | |
1da177e4 | 321 | |
6f039790 | 322 | static int gvp11_probe(struct zorro_dev *z, const struct zorro_device_id *ent) |
1da177e4 | 323 | { |
bb17b787 GU |
324 | struct Scsi_Host *instance; |
325 | unsigned long address; | |
c1d288a5 | 326 | int error; |
bb17b787 | 327 | unsigned int epc; |
bb17b787 | 328 | unsigned int default_dma_xfer_mask; |
cf2ed279 | 329 | struct gvp11_hostdata *hdata; |
349d65fd | 330 | struct gvp11_scsiregs *regs; |
6869b15e | 331 | wd33c93_regs wdregs; |
c1d288a5 GU |
332 | |
333 | default_dma_xfer_mask = ent->driver_data; | |
334 | ||
158da6bc MS |
335 | if (dma_set_mask_and_coherent(&z->dev, |
336 | TO_DMA_MASK(default_dma_xfer_mask))) { | |
f712e24c | 337 | dev_warn(&z->dev, "cannot use DMA mask %llx\n", |
158da6bc MS |
338 | TO_DMA_MASK(default_dma_xfer_mask)); |
339 | return -ENODEV; | |
340 | } | |
341 | ||
c1d288a5 GU |
342 | /* |
343 | * Rumors state that some GVP ram boards use the same product | |
344 | * code as the SCSI controllers. Therefore if the board-size | |
25985edc | 345 | * is not 64KB we assume it is a ram board and bail out. |
c1d288a5 GU |
346 | */ |
347 | if (zorro_resource_len(z) != 0x10000) | |
348 | return -ENODEV; | |
349 | ||
350 | address = z->resource.start; | |
351 | if (!request_mem_region(address, 256, "wd33c93")) | |
352 | return -EBUSY; | |
353 | ||
6112ea08 | 354 | regs = ZTWO_VADDR(address); |
c1d288a5 GU |
355 | |
356 | error = check_wd33c93(regs); | |
357 | if (error) | |
358 | goto fail_check_or_alloc; | |
359 | ||
360 | instance = scsi_host_alloc(&gvp11_scsi_template, | |
cf2ed279 | 361 | sizeof(struct gvp11_hostdata)); |
c1d288a5 GU |
362 | if (!instance) { |
363 | error = -ENOMEM; | |
364 | goto fail_check_or_alloc; | |
bb17b787 | 365 | } |
1da177e4 | 366 | |
c1d288a5 GU |
367 | instance->irq = IRQ_AMIGA_PORTS; |
368 | instance->unique_id = z->slotaddr; | |
1da177e4 | 369 | |
c1d288a5 GU |
370 | regs->secret2 = 1; |
371 | regs->secret1 = 0; | |
372 | regs->secret3 = 15; | |
373 | while (regs->CNTR & GVP11_DMAC_BUSY) | |
374 | ; | |
375 | regs->CNTR = 0; | |
376 | regs->BANK = 0; | |
68b3aa7c | 377 | |
c1d288a5 GU |
378 | wdregs.SASR = ®s->SASR; |
379 | wdregs.SCMD = ®s->SCMD; | |
df0ae249 | 380 | |
c1d288a5 | 381 | hdata = shost_priv(instance); |
158da6bc | 382 | if (gvp11_xfer_mask) { |
cf2ed279 | 383 | hdata->wh.dma_xfer_mask = gvp11_xfer_mask; |
158da6bc MS |
384 | if (dma_set_mask_and_coherent(&z->dev, |
385 | TO_DMA_MASK(gvp11_xfer_mask))) { | |
f712e24c | 386 | dev_warn(&z->dev, "cannot use DMA mask %llx\n", |
158da6bc MS |
387 | TO_DMA_MASK(gvp11_xfer_mask)); |
388 | error = -ENODEV; | |
389 | goto fail_check_or_alloc; | |
390 | } | |
391 | } else | |
cf2ed279 | 392 | hdata->wh.dma_xfer_mask = default_dma_xfer_mask; |
68b3aa7c | 393 | |
cf2ed279 GU |
394 | hdata->wh.no_sync = 0xff; |
395 | hdata->wh.fast = 0; | |
396 | hdata->wh.dma_mode = CTRL_DMA; | |
397 | hdata->regs = regs; | |
1da177e4 | 398 | |
c1d288a5 GU |
399 | /* |
400 | * Check for 14MHz SCSI clock | |
401 | */ | |
402 | epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000); | |
403 | wd33c93_init(instance, wdregs, dma_setup, dma_stop, | |
404 | (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10 | |
405 | : WD33C93_FS_12_15); | |
1da177e4 | 406 | |
c1d288a5 GU |
407 | error = request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED, |
408 | "GVP11 SCSI", instance); | |
409 | if (error) | |
410 | goto fail_irq; | |
1da177e4 | 411 | |
c1d288a5 | 412 | regs->CNTR = GVP11_DMAC_INT_ENABLE; |
1da177e4 | 413 | |
c1d288a5 GU |
414 | error = scsi_add_host(instance, NULL); |
415 | if (error) | |
416 | goto fail_host; | |
1da177e4 | 417 | |
c1d288a5 GU |
418 | zorro_set_drvdata(z, instance); |
419 | scsi_scan_host(instance); | |
420 | return 0; | |
1da177e4 | 421 | |
c1d288a5 GU |
422 | fail_host: |
423 | free_irq(IRQ_AMIGA_PORTS, instance); | |
424 | fail_irq: | |
425 | scsi_host_put(instance); | |
426 | fail_check_or_alloc: | |
427 | release_mem_region(address, 256); | |
428 | return error; | |
429 | } | |
1da177e4 | 430 | |
6f039790 | 431 | static void gvp11_remove(struct zorro_dev *z) |
1da177e4 | 432 | { |
c1d288a5 | 433 | struct Scsi_Host *instance = zorro_get_drvdata(z); |
cf2ed279 | 434 | struct gvp11_hostdata *hdata = shost_priv(instance); |
6869b15e | 435 | |
cf2ed279 | 436 | hdata->regs->CNTR = 0; |
c1d288a5 | 437 | scsi_remove_host(instance); |
bb17b787 | 438 | free_irq(IRQ_AMIGA_PORTS, instance); |
c1d288a5 GU |
439 | scsi_host_put(instance); |
440 | release_mem_region(z->resource.start, 256); | |
441 | } | |
442 | ||
443 | /* | |
444 | * This should (hopefully) be the correct way to identify | |
445 | * all the different GVP SCSI controllers (except for the | |
446 | * SERIES I though). | |
447 | */ | |
448 | ||
6f039790 | 449 | static struct zorro_device_id gvp11_zorro_tbl[] = { |
c1d288a5 GU |
450 | { ZORRO_PROD_GVP_COMBO_030_R3_SCSI, ~0x00ffffff }, |
451 | { ZORRO_PROD_GVP_SERIES_II, ~0x00ffffff }, | |
452 | { ZORRO_PROD_GVP_GFORCE_030_SCSI, ~0x01ffffff }, | |
453 | { ZORRO_PROD_GVP_A530_SCSI, ~0x01ffffff }, | |
454 | { ZORRO_PROD_GVP_COMBO_030_R4_SCSI, ~0x01ffffff }, | |
455 | { ZORRO_PROD_GVP_A1291, ~0x07ffffff }, | |
456 | { ZORRO_PROD_GVP_GFORCE_040_SCSI_1, ~0x07ffffff }, | |
457 | { 0 } | |
458 | }; | |
459 | MODULE_DEVICE_TABLE(zorro, gvp11_zorro_tbl); | |
460 | ||
461 | static struct zorro_driver gvp11_driver = { | |
462 | .name = "gvp11", | |
463 | .id_table = gvp11_zorro_tbl, | |
464 | .probe = gvp11_probe, | |
6f039790 | 465 | .remove = gvp11_remove, |
c1d288a5 GU |
466 | }; |
467 | ||
468 | static int __init gvp11_init(void) | |
469 | { | |
470 | return zorro_register_driver(&gvp11_driver); | |
471 | } | |
472 | module_init(gvp11_init); | |
473 | ||
474 | static void __exit gvp11_exit(void) | |
475 | { | |
476 | zorro_unregister_driver(&gvp11_driver); | |
1da177e4 | 477 | } |
c1d288a5 | 478 | module_exit(gvp11_exit); |
1da177e4 | 479 | |
c1d288a5 | 480 | MODULE_DESCRIPTION("GVP Series II SCSI"); |
1da177e4 | 481 | MODULE_LICENSE("GPL"); |