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Merge drm/drm-next into drm-intel-next-queued
[linux-2.6-block.git] / drivers / scsi / fnic / vnic_dev.c
CommitLineData
5df6d737
AJ		 1/*
2 * Copyright 2008 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 */
18
19#include <linux/kernel.h>
20#include <linux/errno.h>
21#include <linux/types.h>
22#include <linux/pci.h>
23#include <linux/delay.h>
24#include <linux/if_ether.h>
5a0e3ad6 25#include <linux/slab.h>
5df6d737
AJ		 26#include "vnic_resource.h"
27#include "vnic_devcmd.h"
28#include "vnic_dev.h"
29#include "vnic_stats.h"
6c10cb44
SK		 30#include "vnic_wq.h"
31
32struct devcmd2_controller {
33 struct vnic_wq_ctrl *wq_ctrl;
34 struct vnic_dev_ring results_ring;
35 struct vnic_wq wq;
36 struct vnic_devcmd2 *cmd_ring;
37 struct devcmd2_result *result;
38 u16 next_result;
39 u16 result_size;
40 int color;
41};
42
43enum vnic_proxy_type {
44 PROXY_NONE,
45 PROXY_BY_BDF,
46 PROXY_BY_INDEX,
47};
5df6d737
AJ		 48
49struct vnic_res {
50 void __iomem *vaddr;
51 unsigned int count;
52};
53
54struct vnic_dev {
55 void *priv;
56 struct pci_dev *pdev;
57 struct vnic_res res[RES_TYPE_MAX];
58 enum vnic_dev_intr_mode intr_mode;
59 struct vnic_devcmd __iomem *devcmd;
60 struct vnic_devcmd_notify *notify;
61 struct vnic_devcmd_notify notify_copy;
62 dma_addr_t notify_pa;
63 u32 *linkstatus;
64 dma_addr_t linkstatus_pa;
65 struct vnic_stats *stats;
66 dma_addr_t stats_pa;
67 struct vnic_devcmd_fw_info *fw_info;
68 dma_addr_t fw_info_pa;
6c10cb44
SK		 69 enum vnic_proxy_type proxy;
70 u32 proxy_index;
71 u64 args[VNIC_DEVCMD_NARGS];
72 struct devcmd2_controller *devcmd2;
73 int (*devcmd_rtn)(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
74 int wait);
5df6d737
AJ		 75};
76
77#define VNIC_MAX_RES_HDR_SIZE \
78 (sizeof(struct vnic_resource_header) + \
79 sizeof(struct vnic_resource) * RES_TYPE_MAX)
80#define VNIC_RES_STRIDE 128
81
82void *vnic_dev_priv(struct vnic_dev *vdev)
83{
84 return vdev->priv;
85}
86
87static int vnic_dev_discover_res(struct vnic_dev *vdev,
88 struct vnic_dev_bar *bar)
89{
90 struct vnic_resource_header __iomem *rh;
91 struct vnic_resource __iomem *r;
92 u8 type;
93
94 if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
95 printk(KERN_ERR "vNIC BAR0 res hdr length error\n");
96 return -EINVAL;
97 }
98
99 rh = bar->vaddr;
100 if (!rh) {
101 printk(KERN_ERR "vNIC BAR0 res hdr not mem-mapped\n");
102 return -EINVAL;
103 }
104
105 if (ioread32(&rh->magic) != VNIC_RES_MAGIC ||
106 ioread32(&rh->version) != VNIC_RES_VERSION) {
107 printk(KERN_ERR "vNIC BAR0 res magic/version error "
108 "exp (%lx/%lx) curr (%x/%x)\n",
109 VNIC_RES_MAGIC, VNIC_RES_VERSION,
110 ioread32(&rh->magic), ioread32(&rh->version));
111 return -EINVAL;
112 }
113
114 r = (struct vnic_resource __iomem *)(rh + 1);
115
116 while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
117
118 u8 bar_num = ioread8(&r->bar);
119 u32 bar_offset = ioread32(&r->bar_offset);
120 u32 count = ioread32(&r->count);
121 u32 len;
122
123 r++;
124
125 if (bar_num != 0) /* only mapping in BAR0 resources */
126 continue;
127
128 switch (type) {
129 case RES_TYPE_WQ:
130 case RES_TYPE_RQ:
131 case RES_TYPE_CQ:
132 case RES_TYPE_INTR_CTRL:
133 /* each count is stride bytes long */
134 len = count * VNIC_RES_STRIDE;
135 if (len + bar_offset > bar->len) {
136 printk(KERN_ERR "vNIC BAR0 resource %d "
137 "out-of-bounds, offset 0x%x + "
138 "size 0x%x > bar len 0x%lx\n",
139 type, bar_offset,
140 len,
141 bar->len);
142 return -EINVAL;
143 }
144 break;
145 case RES_TYPE_INTR_PBA_LEGACY:
6c10cb44 146 case RES_TYPE_DEVCMD2:
5df6d737
AJ		 147 case RES_TYPE_DEVCMD:
148 len = count;
149 break;
150 default:
151 continue;
152 }
153
154 vdev->res[type].count = count;
155 vdev->res[type].vaddr = (char __iomem *)bar->vaddr + bar_offset;
156 }
157
158 return 0;
159}
160
161unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
162 enum vnic_res_type type)
163{
164 return vdev->res[type].count;
165}
166
167void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
168 unsigned int index)
169{
170 if (!vdev->res[type].vaddr)
171 return NULL;
172
173 switch (type) {
174 case RES_TYPE_WQ:
175 case RES_TYPE_RQ:
176 case RES_TYPE_CQ:
177 case RES_TYPE_INTR_CTRL:
178 return (char __iomem *)vdev->res[type].vaddr +
179 index * VNIC_RES_STRIDE;
180 default:
181 return (char __iomem *)vdev->res[type].vaddr;
182 }
183}
184
185unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
186 unsigned int desc_count,
187 unsigned int desc_size)
188{
189 /* The base address of the desc rings must be 512 byte aligned.
190 * Descriptor count is aligned to groups of 32 descriptors. A
191 * count of 0 means the maximum 4096 descriptors. Descriptor
192 * size is aligned to 16 bytes.
193 */
194
195 unsigned int count_align = 32;
196 unsigned int desc_align = 16;
197
198 ring->base_align = 512;
199
200 if (desc_count == 0)
201 desc_count = 4096;
202
203 ring->desc_count = ALIGN(desc_count, count_align);
204
205 ring->desc_size = ALIGN(desc_size, desc_align);
206
207 ring->size = ring->desc_count * ring->desc_size;
208 ring->size_unaligned = ring->size + ring->base_align;
209
210 return ring->size_unaligned;
211}
212
213void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
214{
215 memset(ring->descs, 0, ring->size);
216}
217
218int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
219 unsigned int desc_count, unsigned int desc_size)
220{
221 vnic_dev_desc_ring_size(ring, desc_count, desc_size);
222
7f9b0f77 223 ring->descs_unaligned = dma_alloc_coherent(&vdev->pdev->dev,
5df6d737 224 ring->size_unaligned,
7f9b0f77 225 &ring->base_addr_unaligned, GFP_KERNEL);
5df6d737
AJ		 226
227 if (!ring->descs_unaligned) {
228 printk(KERN_ERR
229 "Failed to allocate ring (size=%d), aborting\n",
230 (int)ring->size);
231 return -ENOMEM;
232 }
233
234 ring->base_addr = ALIGN(ring->base_addr_unaligned,
235 ring->base_align);
236 ring->descs = (u8 *)ring->descs_unaligned +
237 (ring->base_addr - ring->base_addr_unaligned);
238
239 vnic_dev_clear_desc_ring(ring);
240
241 ring->desc_avail = ring->desc_count - 1;
242
243 return 0;
244}
245
246void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
247{
248 if (ring->descs) {
7f9b0f77 249 dma_free_coherent(&vdev->pdev->dev,
5df6d737
AJ		 250 ring->size_unaligned,
251 ring->descs_unaligned,
252 ring->base_addr_unaligned);
253 ring->descs = NULL;
254 }
255}
256
6c10cb44 257int vnic_dev_cmd1(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd, int wait)
5df6d737
AJ		 258{
259 struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
260 int delay;
261 u32 status;
262 int dev_cmd_err[] = {
263 /* convert from fw's version of error.h to host's version */
264 0, /* ERR_SUCCESS */
265 EINVAL, /* ERR_EINVAL */
266 EFAULT, /* ERR_EFAULT */
267 EPERM, /* ERR_EPERM */
268 EBUSY, /* ERR_EBUSY */
269 };
270 int err;
6c10cb44
SK		 271 u64 *a0 = &vdev->args[0];
272 u64 *a1 = &vdev->args[1];
5df6d737
AJ		 273
274 status = ioread32(&devcmd->status);
275 if (status & STAT_BUSY) {
276 printk(KERN_ERR "Busy devcmd %d\n", _CMD_N(cmd));
277 return -EBUSY;
278 }
279
280 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
281 writeq(*a0, &devcmd->args[0]);
282 writeq(*a1, &devcmd->args[1]);
283 wmb();
284 }
285
286 iowrite32(cmd, &devcmd->cmd);
287
288 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
289 return 0;
290
291 for (delay = 0; delay < wait; delay++) {
292
293 udelay(100);
294
295 status = ioread32(&devcmd->status);
296 if (!(status & STAT_BUSY)) {
297
298 if (status & STAT_ERROR) {
299 err = dev_cmd_err[(int)readq(&devcmd->args[0])];
300 printk(KERN_ERR "Error %d devcmd %d\n",
301 err, _CMD_N(cmd));
302 return -err;
303 }
304
305 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
306 rmb();
307 *a0 = readq(&devcmd->args[0]);
308 *a1 = readq(&devcmd->args[1]);
309 }
310
311 return 0;
312 }
313 }
314
315 printk(KERN_ERR "Timedout devcmd %d\n", _CMD_N(cmd));
316 return -ETIMEDOUT;
317}
318
0a2fdd22
SK		 319int vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
320 int wait)
321{
322 struct devcmd2_controller *dc2c = vdev->devcmd2;
323 struct devcmd2_result *result;
324 u8 color;
325 unsigned int i;
326 int delay;
327 int err;
328 u32 fetch_index;
329 u32 posted;
330 u32 new_posted;
331
332 posted = ioread32(&dc2c->wq_ctrl->posted_index);
333 fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
334
335 if (posted == 0xFFFFFFFF || fetch_index == 0xFFFFFFFF) {
336 /* Hardware surprise removal: return error */
337 pr_err("%s: devcmd2 invalid posted or fetch index on cmd %d\n",
338 pci_name(vdev->pdev), _CMD_N(cmd));
339 pr_err("%s: fetch index: %u, posted index: %u\n",
340 pci_name(vdev->pdev), fetch_index, posted);
341
342 return -ENODEV;
343
344 }
345
346 new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
347
348 if (new_posted == fetch_index) {
349 pr_err("%s: devcmd2 wq full while issuing cmd %d\n",
350 pci_name(vdev->pdev), _CMD_N(cmd));
351 pr_err("%s: fetch index: %u, posted index: %u\n",
352 pci_name(vdev->pdev), fetch_index, posted);
353 return -EBUSY;
354
355 }
356 dc2c->cmd_ring[posted].cmd = cmd;
357 dc2c->cmd_ring[posted].flags = 0;
358
359 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
360 dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
361 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
362 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
363 dc2c->cmd_ring[posted].args[i] = vdev->args[i];
364
365 }
366
367 /* Adding write memory barrier prevents compiler and/or CPU
368 * reordering, thus avoiding descriptor posting before
369 * descriptor is initialized. Otherwise, hardware can read
370 * stale descriptor fields.
371 */
372 wmb();
373 iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
374
375 if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
376 return 0;
377
378 result = dc2c->result + dc2c->next_result;
379 color = dc2c->color;
380
381 dc2c->next_result++;
382 if (dc2c->next_result == dc2c->result_size) {
383 dc2c->next_result = 0;
384 dc2c->color = dc2c->color ? 0 : 1;
385 }
386
387 for (delay = 0; delay < wait; delay++) {
388 udelay(100);
389 if (result->color == color) {
390 if (result->error) {
391 err = -(int) result->error;
392 if (err != ERR_ECMDUNKNOWN ||
393 cmd != CMD_CAPABILITY)
394 pr_err("%s:Error %d devcmd %d\n",
395 pci_name(vdev->pdev),
396 err, _CMD_N(cmd));
397 return err;
398 }
399 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
400 rmb(); /*prevent reorder while reding result*/
401 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
402 vdev->args[i] = result->results[i];
403 }
404 return 0;
405 }
406 }
407
408 pr_err("%s:Timed out devcmd %d\n", pci_name(vdev->pdev), _CMD_N(cmd));
409
410 return -ETIMEDOUT;
411}
412
413
414int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
415{
416 vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
417 if (!vdev->devcmd)
418 return -ENODEV;
419
420 vdev->devcmd_rtn = &vnic_dev_cmd1;
421 return 0;
422}
423
424
425int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
426{
427 int err;
428 unsigned int fetch_index;
429
430 if (vdev->devcmd2)
431 return 0;
432
433 vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_ATOMIC);
434 if (!vdev->devcmd2)
435 return -ENOMEM;
436
437 vdev->devcmd2->color = 1;
438 vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
439 err = vnic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq,
440 DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
441 if (err)
442 goto err_free_devcmd2;
443
444 fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
445 if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
446 pr_err("error in devcmd2 init");
447 return -ENODEV;
448 }
449
450 /*
451 * Don't change fetch_index ever and
452 * set posted_index same as fetch_index
453 * when setting up the WQ for devcmd2.
454 */
455 vnic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index,
456 fetch_index, 0, 0);
457
458 vnic_wq_enable(&vdev->devcmd2->wq);
459
460 err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
461 DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
462 if (err)
463 goto err_free_wq;
464
465 vdev->devcmd2->result =
466 (struct devcmd2_result *) vdev->devcmd2->results_ring.descs;
467 vdev->devcmd2->cmd_ring =
468 (struct vnic_devcmd2 *) vdev->devcmd2->wq.ring.descs;
469 vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
470 vdev->args[0] = (u64) vdev->devcmd2->results_ring.base_addr |
471 VNIC_PADDR_TARGET;
472 vdev->args[1] = DEVCMD2_RING_SIZE;
473
474 err = vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
475 if (err)
476 goto err_free_desc_ring;
477
478 vdev->devcmd_rtn = &vnic_dev_cmd2;
479
480 return 0;
481
482err_free_desc_ring:
483 vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
484err_free_wq:
485 vnic_wq_disable(&vdev->devcmd2->wq);
486 vnic_wq_free(&vdev->devcmd2->wq);
487err_free_devcmd2:
488 kfree(vdev->devcmd2);
489 vdev->devcmd2 = NULL;
490
491 return err;
492}
493
494
495void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
496{
497 vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
498 vnic_wq_disable(&vdev->devcmd2->wq);
499 vnic_wq_free(&vdev->devcmd2->wq);
500 kfree(vdev->devcmd2);
501 vdev->devcmd2 = NULL;
502 vdev->devcmd_rtn = &vnic_dev_cmd1;
503}
504
505
506int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
507 enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
508{
509 int err;
510
511 vdev->args[0] = *a0;
512 vdev->args[1] = *a1;
513
514 err = (*vdev->devcmd_rtn)(vdev, cmd, wait);
515
516 *a0 = vdev->args[0];
517 *a1 = vdev->args[1];
518
519 return err;
520}
521
522
523int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
524 u64 *a0, u64 *a1, int wait)
525{
526 memset(vdev->args, 0, sizeof(vdev->args));
527
528 switch (vdev->proxy) {
529 case PROXY_NONE:
530 default:
531 return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
532 }
533}
534
535
5df6d737
AJ		 536int vnic_dev_fw_info(struct vnic_dev *vdev,
537 struct vnic_devcmd_fw_info **fw_info)
538{
539 u64 a0, a1 = 0;
540 int wait = 1000;
541 int err = 0;
542
543 if (!vdev->fw_info) {
7f9b0f77 544 vdev->fw_info = dma_alloc_coherent(&vdev->pdev->dev,
5df6d737 545 sizeof(struct vnic_devcmd_fw_info),
7f9b0f77 546 &vdev->fw_info_pa, GFP_KERNEL);
5df6d737
AJ		 547 if (!vdev->fw_info)
548 return -ENOMEM;
549
550 a0 = vdev->fw_info_pa;
551
552 /* only get fw_info once and cache it */
553 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
554 }
555
556 *fw_info = vdev->fw_info;
557
558 return err;
559}
560
561int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
562 void *value)
563{
564 u64 a0, a1;
565 int wait = 1000;
566 int err;
567
568 a0 = offset;
569 a1 = size;
570
571 err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
572
573 switch (size) {
574 case 1:
575 *(u8 *)value = (u8)a0;
576 break;
577 case 2:
578 *(u16 *)value = (u16)a0;
579 break;
580 case 4:
581 *(u32 *)value = (u32)a0;
582 break;
583 case 8:
584 *(u64 *)value = a0;
585 break;
586 default:
587 BUG();
588 break;
589 }
590
591 return err;
592}
593
594int vnic_dev_stats_clear(struct vnic_dev *vdev)
595{
596 u64 a0 = 0, a1 = 0;
597 int wait = 1000;
598 return vnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);
599}
600
601int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
602{
603 u64 a0, a1;
604 int wait = 1000;
605
606 if (!vdev->stats) {
7f9b0f77
CH		 607 vdev->stats = dma_alloc_coherent(&vdev->pdev->dev,
608 sizeof(struct vnic_stats), &vdev->stats_pa, GFP_KERNEL);
5df6d737
AJ		 609 if (!vdev->stats)
610 return -ENOMEM;
611 }
612
613 *stats = vdev->stats;
614 a0 = vdev->stats_pa;
615 a1 = sizeof(struct vnic_stats);
616
617 return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
618}
619
620int vnic_dev_close(struct vnic_dev *vdev)
621{
622 u64 a0 = 0, a1 = 0;
623 int wait = 1000;
624 return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
625}
626
627int vnic_dev_enable(struct vnic_dev *vdev)
628{
629 u64 a0 = 0, a1 = 0;
630 int wait = 1000;
631 return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
632}
633
634int vnic_dev_disable(struct vnic_dev *vdev)
635{
636 u64 a0 = 0, a1 = 0;
637 int wait = 1000;
638 return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
639}
640
641int vnic_dev_open(struct vnic_dev *vdev, int arg)
642{
643 u64 a0 = (u32)arg, a1 = 0;
644 int wait = 1000;
645 return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
646}
647
648int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
649{
650 u64 a0 = 0, a1 = 0;
651 int wait = 1000;
652 int err;
653
654 *done = 0;
655
656 err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
657 if (err)
658 return err;
659
660 *done = (a0 == 0);
661
662 return 0;
663}
664
665int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
666{
667 u64 a0 = (u32)arg, a1 = 0;
668 int wait = 1000;
669 return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
670}
671
672int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
673{
674 u64 a0 = 0, a1 = 0;
675 int wait = 1000;
676 int err;
677
678 *done = 0;
679
680 err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
681 if (err)
682 return err;
683
684 *done = (a0 == 0);
685
686 return 0;
687}
688
689int vnic_dev_hang_notify(struct vnic_dev *vdev)
690{
691 u64 a0, a1;
692 int wait = 1000;
693 return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
694}
695
696int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
697{
698 u64 a0, a1;
699 int wait = 1000;
700 int err, i;
701
702 for (i = 0; i < ETH_ALEN; i++)
703 mac_addr[i] = 0;
704
705 err = vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a0, &a1, wait);
706 if (err)
707 return err;
708
709 for (i = 0; i < ETH_ALEN; i++)
710 mac_addr[i] = ((u8 *)&a0)[i];
711
712 return 0;
713}
714
715void vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
716 int broadcast, int promisc, int allmulti)
717{
718 u64 a0, a1 = 0;
719 int wait = 1000;
720 int err;
721
722 a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
723 (multicast ? CMD_PFILTER_MULTICAST : 0) |
724 (broadcast ? CMD_PFILTER_BROADCAST : 0) |
725 (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
726 (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
727
728 err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
729 if (err)
730 printk(KERN_ERR "Can't set packet filter\n");
731}
732
733void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
734{
735 u64 a0 = 0, a1 = 0;
736 int wait = 1000;
737 int err;
738 int i;
739
740 for (i = 0; i < ETH_ALEN; i++)
741 ((u8 *)&a0)[i] = addr[i];
742
743 err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
744 if (err)
36fe90b0 745 pr_err("Can't add addr [%pM], %d\n", addr, err);
5df6d737
AJ		 746}
747
748void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
749{
750 u64 a0 = 0, a1 = 0;
751 int wait = 1000;
752 int err;
753 int i;
754
755 for (i = 0; i < ETH_ALEN; i++)
756 ((u8 *)&a0)[i] = addr[i];
757
758 err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
759 if (err)
36fe90b0 760 pr_err("Can't del addr [%pM], %d\n", addr, err);
5df6d737
AJ		 761}
762
763int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
764{
765 u64 a0, a1;
766 int wait = 1000;
767
768 if (!vdev->notify) {
7f9b0f77 769 vdev->notify = dma_alloc_coherent(&vdev->pdev->dev,
5df6d737 770 sizeof(struct vnic_devcmd_notify),
7f9b0f77 771 &vdev->notify_pa, GFP_KERNEL);
5df6d737
AJ		 772 if (!vdev->notify)
773 return -ENOMEM;
774 }
775
776 a0 = vdev->notify_pa;
777 a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
778 a1 += sizeof(struct vnic_devcmd_notify);
779
780 return vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
781}
782
783void vnic_dev_notify_unset(struct vnic_dev *vdev)
784{
785 u64 a0, a1;
786 int wait = 1000;
787
788 a0 = 0; /* paddr = 0 to unset notify buffer */
789 a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
790 a1 += sizeof(struct vnic_devcmd_notify);
791
792 vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
793}
794
795static int vnic_dev_notify_ready(struct vnic_dev *vdev)
796{
797 u32 *words;
798 unsigned int nwords = sizeof(struct vnic_devcmd_notify) / 4;
799 unsigned int i;
800 u32 csum;
801
802 if (!vdev->notify)
803 return 0;
804
805 do {
806 csum = 0;
807 memcpy(&vdev->notify_copy, vdev->notify,
808 sizeof(struct vnic_devcmd_notify));
809 words = (u32 *)&vdev->notify_copy;
810 for (i = 1; i < nwords; i++)
811 csum += words[i];
812 } while (csum != words[0]);
813
814 return 1;
815}
816
817int vnic_dev_init(struct vnic_dev *vdev, int arg)
818{
819 u64 a0 = (u32)arg, a1 = 0;
820 int wait = 1000;
821 return vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
822}
823
d3c995f1
HP		 824u16 vnic_dev_set_default_vlan(struct vnic_dev *vdev, u16 new_default_vlan)
825{
826 u64 a0 = new_default_vlan, a1 = 0;
827 int wait = 1000;
828 int old_vlan = 0;
829
830 old_vlan = vnic_dev_cmd(vdev, CMD_SET_DEFAULT_VLAN, &a0, &a1, wait);
831 return (u16)old_vlan;
832}
833
5df6d737
AJ		 834int vnic_dev_link_status(struct vnic_dev *vdev)
835{
836 if (vdev->linkstatus)
837 return *vdev->linkstatus;
838
839 if (!vnic_dev_notify_ready(vdev))
840 return 0;
841
842 return vdev->notify_copy.link_state;
843}
844
845u32 vnic_dev_port_speed(struct vnic_dev *vdev)
846{
847 if (!vnic_dev_notify_ready(vdev))
848 return 0;
849
850 return vdev->notify_copy.port_speed;
851}
852
853u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
854{
855 if (!vnic_dev_notify_ready(vdev))
856 return 0;
857
858 return vdev->notify_copy.msglvl;
859}
860
861u32 vnic_dev_mtu(struct vnic_dev *vdev)
862{
863 if (!vnic_dev_notify_ready(vdev))
864 return 0;
865
866 return vdev->notify_copy.mtu;
867}
868
869u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev)
870{
871 if (!vnic_dev_notify_ready(vdev))
872 return 0;
873
874 return vdev->notify_copy.link_down_cnt;
875}
876
877void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
878 enum vnic_dev_intr_mode intr_mode)
879{
880 vdev->intr_mode = intr_mode;
881}
882
883enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
884 struct vnic_dev *vdev)
885{
886 return vdev->intr_mode;
887}
888
889void vnic_dev_unregister(struct vnic_dev *vdev)
890{
891 if (vdev) {
892 if (vdev->notify)
7f9b0f77 893 dma_free_coherent(&vdev->pdev->dev,
5df6d737
AJ		 894 sizeof(struct vnic_devcmd_notify),
895 vdev->notify,
896 vdev->notify_pa);
897 if (vdev->linkstatus)
7f9b0f77 898 dma_free_coherent(&vdev->pdev->dev,
5df6d737
AJ		 899 sizeof(u32),
900 vdev->linkstatus,
901 vdev->linkstatus_pa);
902 if (vdev->stats)
7f9b0f77 903 dma_free_coherent(&vdev->pdev->dev,
c954f8ae 904 sizeof(struct vnic_stats),
5df6d737
AJ		 905 vdev->stats, vdev->stats_pa);
906 if (vdev->fw_info)
7f9b0f77 907 dma_free_coherent(&vdev->pdev->dev,
5df6d737
AJ		 908 sizeof(struct vnic_devcmd_fw_info),
909 vdev->fw_info, vdev->fw_info_pa);
0a2fdd22
SK		 910 if (vdev->devcmd2)
911 vnic_dev_deinit_devcmd2(vdev);
5df6d737
AJ		 912 kfree(vdev);
913 }
914}
915
916struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
917 void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar)
918{
919 if (!vdev) {
920 vdev = kzalloc(sizeof(struct vnic_dev), GFP_KERNEL);
921 if (!vdev)
922 return NULL;
923 }
924
925 vdev->priv = priv;
926 vdev->pdev = pdev;
927
928 if (vnic_dev_discover_res(vdev, bar))
929 goto err_out;
930
5df6d737
AJ		 931 return vdev;
932
933err_out:
934 vnic_dev_unregister(vdev);
935 return NULL;
936}
e119d14c
SK		 937
938int vnic_dev_cmd_init(struct vnic_dev *vdev)
939{
940 int err;
941 void *p;
942
943 p = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
944 if (p) {
945 pr_err("fnic: DEVCMD2 resource found!\n");
946 err = vnic_dev_init_devcmd2(vdev);
947 } else {
948 pr_err("fnic: DEVCMD2 not found, fall back to Devcmd\n");
949 err = vnic_dev_init_devcmd1(vdev);
950 }
951
952 return err;
953}
Linux 6.x block layer and io_uring tree(s)