scsi: cxlflash: Serialize RRQ access and support offlevel processing
[linux-block.git] / drivers / scsi / cxlflash / main.c
CommitLineData
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1/*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/delay.h>
16#include <linux/list.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19
20#include <asm/unaligned.h>
21
22#include <misc/cxl.h>
23
24#include <scsi/scsi_cmnd.h>
25#include <scsi/scsi_host.h>
65be2c79 26#include <uapi/scsi/cxlflash_ioctl.h>
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27
28#include "main.h"
29#include "sislite.h"
30#include "common.h"
31
32MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME);
33MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>");
34MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>");
35MODULE_LICENSE("GPL");
36
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37/**
38 * process_cmd_err() - command error handler
39 * @cmd: AFU command that experienced the error.
40 * @scp: SCSI command associated with the AFU command in error.
41 *
42 * Translates error bits from AFU command to SCSI command results.
43 */
44static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp)
45{
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46 struct afu *afu = cmd->parent;
47 struct cxlflash_cfg *cfg = afu->parent;
48 struct device *dev = &cfg->dev->dev;
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49 struct sisl_ioarcb *ioarcb;
50 struct sisl_ioasa *ioasa;
8396012f 51 u32 resid;
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52
53 if (unlikely(!cmd))
54 return;
55
56 ioarcb = &(cmd->rcb);
57 ioasa = &(cmd->sa);
58
59 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) {
8396012f
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60 resid = ioasa->resid;
61 scsi_set_resid(scp, resid);
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62 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n",
63 __func__, cmd, scp, resid);
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64 }
65
66 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) {
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67 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n",
68 __func__, cmd, scp);
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69 scp->result = (DID_ERROR << 16);
70 }
71
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72 dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x "
73 "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__,
74 ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc,
75 ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra);
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76
77 if (ioasa->rc.scsi_rc) {
78 /* We have a SCSI status */
79 if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) {
80 memcpy(scp->sense_buffer, ioasa->sense_data,
81 SISL_SENSE_DATA_LEN);
82 scp->result = ioasa->rc.scsi_rc;
83 } else
84 scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16);
85 }
86
87 /*
88 * We encountered an error. Set scp->result based on nature
89 * of error.
90 */
91 if (ioasa->rc.fc_rc) {
92 /* We have an FC status */
93 switch (ioasa->rc.fc_rc) {
94 case SISL_FC_RC_LINKDOWN:
95 scp->result = (DID_REQUEUE << 16);
96 break;
97 case SISL_FC_RC_RESID:
98 /* This indicates an FCP resid underrun */
99 if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) {
100 /* If the SISL_RC_FLAGS_OVERRUN flag was set,
101 * then we will handle this error else where.
102 * If not then we must handle it here.
8396012f 103 * This is probably an AFU bug.
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104 */
105 scp->result = (DID_ERROR << 16);
106 }
107 break;
108 case SISL_FC_RC_RESIDERR:
109 /* Resid mismatch between adapter and device */
110 case SISL_FC_RC_TGTABORT:
111 case SISL_FC_RC_ABORTOK:
112 case SISL_FC_RC_ABORTFAIL:
113 case SISL_FC_RC_NOLOGI:
114 case SISL_FC_RC_ABORTPEND:
115 case SISL_FC_RC_WRABORTPEND:
116 case SISL_FC_RC_NOEXP:
117 case SISL_FC_RC_INUSE:
118 scp->result = (DID_ERROR << 16);
119 break;
120 }
121 }
122
123 if (ioasa->rc.afu_rc) {
124 /* We have an AFU error */
125 switch (ioasa->rc.afu_rc) {
126 case SISL_AFU_RC_NO_CHANNELS:
8396012f 127 scp->result = (DID_NO_CONNECT << 16);
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128 break;
129 case SISL_AFU_RC_DATA_DMA_ERR:
130 switch (ioasa->afu_extra) {
131 case SISL_AFU_DMA_ERR_PAGE_IN:
132 /* Retry */
133 scp->result = (DID_IMM_RETRY << 16);
134 break;
135 case SISL_AFU_DMA_ERR_INVALID_EA:
136 default:
137 scp->result = (DID_ERROR << 16);
138 }
139 break;
140 case SISL_AFU_RC_OUT_OF_DATA_BUFS:
141 /* Retry */
142 scp->result = (DID_ALLOC_FAILURE << 16);
143 break;
144 default:
145 scp->result = (DID_ERROR << 16);
146 }
147 }
148}
149
150/**
151 * cmd_complete() - command completion handler
152 * @cmd: AFU command that has completed.
153 *
154 * Prepares and submits command that has either completed or timed out to
155 * the SCSI stack. Checks AFU command back into command pool for non-internal
fe7f9698 156 * (cmd->scp populated) commands.
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157 */
158static void cmd_complete(struct afu_cmd *cmd)
159{
160 struct scsi_cmnd *scp;
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161 ulong lock_flags;
162 struct afu *afu = cmd->parent;
163 struct cxlflash_cfg *cfg = afu->parent;
fb67d44d 164 struct device *dev = &cfg->dev->dev;
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165 bool cmd_is_tmf;
166
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167 if (cmd->scp) {
168 scp = cmd->scp;
8396012f 169 if (unlikely(cmd->sa.ioasc))
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170 process_cmd_err(cmd, scp);
171 else
172 scp->result = (DID_OK << 16);
173
c21e0bbf 174 cmd_is_tmf = cmd->cmd_tmf;
c21e0bbf 175
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176 dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n",
177 __func__, scp, scp->result, cmd->sa.ioasc);
c21e0bbf 178
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179 scsi_dma_unmap(scp);
180 scp->scsi_done(scp);
181
182 if (cmd_is_tmf) {
018d1dc9 183 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
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184 cfg->tmf_active = false;
185 wake_up_all_locked(&cfg->tmf_waitq);
018d1dc9 186 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
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187 }
188 } else
189 complete(&cmd->cevent);
190}
191
15305514 192/**
9c7d1ee5 193 * context_reset() - reset command owner context via specified register
15305514 194 * @cmd: AFU command that timed out.
9c7d1ee5 195 * @reset_reg: MMIO register to perform reset.
15305514 196 */
9c7d1ee5 197static void context_reset(struct afu_cmd *cmd, __be64 __iomem *reset_reg)
15305514
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198{
199 int nretry = 0;
200 u64 rrin = 0x1;
15305514 201 struct afu *afu = cmd->parent;
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202 struct cxlflash_cfg *cfg = afu->parent;
203 struct device *dev = &cfg->dev->dev;
15305514 204
fb67d44d 205 dev_dbg(dev, "%s: cmd=%p\n", __func__, cmd);
15305514 206
9c7d1ee5 207 writeq_be(rrin, reset_reg);
15305514 208 do {
9c7d1ee5 209 rrin = readq_be(reset_reg);
15305514
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210 if (rrin != 0x1)
211 break;
212 /* Double delay each time */
ea765431 213 udelay(1 << nretry);
15305514 214 } while (nretry++ < MC_ROOM_RETRY_CNT);
3d2f617d 215
fb67d44d 216 dev_dbg(dev, "%s: returning rrin=%016llx nretry=%d\n",
3d2f617d 217 __func__, rrin, nretry);
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218}
219
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220/**
221 * context_reset_ioarrin() - reset command owner context via IOARRIN register
222 * @cmd: AFU command that timed out.
223 */
224static void context_reset_ioarrin(struct afu_cmd *cmd)
225{
226 struct afu *afu = cmd->parent;
227
228 context_reset(cmd, &afu->host_map->ioarrin);
229}
230
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231/**
232 * context_reset_sq() - reset command owner context w/ SQ Context Reset register
233 * @cmd: AFU command that timed out.
234 */
235static void context_reset_sq(struct afu_cmd *cmd)
236{
237 struct afu *afu = cmd->parent;
238
239 context_reset(cmd, &afu->host_map->sq_ctx_reset);
240}
241
15305514 242/**
48b4be36 243 * send_cmd_ioarrin() - sends an AFU command via IOARRIN register
15305514
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244 * @afu: AFU associated with the host.
245 * @cmd: AFU command to send.
246 *
247 * Return:
1284fb0c 248 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
15305514 249 */
48b4be36 250static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd)
15305514
MO
251{
252 struct cxlflash_cfg *cfg = afu->parent;
253 struct device *dev = &cfg->dev->dev;
15305514 254 int rc = 0;
11f7b184
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255 s64 room;
256 ulong lock_flags;
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257
258 /*
11f7b184
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259 * To avoid the performance penalty of MMIO, spread the update of
260 * 'room' over multiple commands.
15305514 261 */
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262 spin_lock_irqsave(&afu->rrin_slock, lock_flags);
263 if (--afu->room < 0) {
264 room = readq_be(&afu->host_map->cmd_room);
265 if (room <= 0) {
266 dev_dbg_ratelimited(dev, "%s: no cmd_room to send "
267 "0x%02X, room=0x%016llX\n",
268 __func__, cmd->rcb.cdb[0], room);
269 afu->room = 0;
270 rc = SCSI_MLQUEUE_HOST_BUSY;
271 goto out;
15305514 272 }
11f7b184 273 afu->room = room - 1;
15305514
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274 }
275
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276 writeq_be((u64)&cmd->rcb, &afu->host_map->ioarrin);
277out:
11f7b184 278 spin_unlock_irqrestore(&afu->rrin_slock, lock_flags);
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279 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__,
280 cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc);
15305514 281 return rc;
15305514
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282}
283
696d0b0c
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284/**
285 * send_cmd_sq() - sends an AFU command via SQ ring
286 * @afu: AFU associated with the host.
287 * @cmd: AFU command to send.
288 *
289 * Return:
290 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
291 */
292static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd)
293{
294 struct cxlflash_cfg *cfg = afu->parent;
295 struct device *dev = &cfg->dev->dev;
296 int rc = 0;
297 int newval;
298 ulong lock_flags;
299
300 newval = atomic_dec_if_positive(&afu->hsq_credits);
301 if (newval <= 0) {
302 rc = SCSI_MLQUEUE_HOST_BUSY;
303 goto out;
304 }
305
306 cmd->rcb.ioasa = &cmd->sa;
307
308 spin_lock_irqsave(&afu->hsq_slock, lock_flags);
309
310 *afu->hsq_curr = cmd->rcb;
311 if (afu->hsq_curr < afu->hsq_end)
312 afu->hsq_curr++;
313 else
314 afu->hsq_curr = afu->hsq_start;
315 writeq_be((u64)afu->hsq_curr, &afu->host_map->sq_tail);
316
317 spin_unlock_irqrestore(&afu->hsq_slock, lock_flags);
318out:
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319 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p "
320 "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len,
321 cmd->rcb.data_ea, cmd->rcb.ioasa, rc, afu->hsq_curr,
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322 readq_be(&afu->host_map->sq_head),
323 readq_be(&afu->host_map->sq_tail));
324 return rc;
325}
326
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327/**
328 * wait_resp() - polls for a response or timeout to a sent AFU command
329 * @afu: AFU associated with the host.
330 * @cmd: AFU command that was sent.
9ba848ac
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331 *
332 * Return:
333 * 0 on success, -1 on timeout/error
15305514 334 */
9ba848ac 335static int wait_resp(struct afu *afu, struct afu_cmd *cmd)
15305514 336{
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337 struct cxlflash_cfg *cfg = afu->parent;
338 struct device *dev = &cfg->dev->dev;
9ba848ac 339 int rc = 0;
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340 ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000);
341
342 timeout = wait_for_completion_timeout(&cmd->cevent, timeout);
9ba848ac 343 if (!timeout) {
48b4be36 344 afu->context_reset(cmd);
9ba848ac
MO
345 rc = -1;
346 }
15305514 347
9ba848ac 348 if (unlikely(cmd->sa.ioasc != 0)) {
fb67d44d
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349 dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n",
350 __func__, cmd->rcb.cdb[0], cmd->sa.ioasc);
9ba848ac
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351 rc = -1;
352 }
353
354 return rc;
15305514
MO
355}
356
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357/**
358 * send_tmf() - sends a Task Management Function (TMF)
359 * @afu: AFU to checkout from.
360 * @scp: SCSI command from stack.
361 * @tmfcmd: TMF command to send.
362 *
363 * Return:
1284fb0c 364 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
c21e0bbf
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365 */
366static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd)
367{
c21e0bbf 368 u32 port_sel = scp->device->channel + 1;
fb67d44d 369 struct cxlflash_cfg *cfg = shost_priv(scp->device->host);
d4ace351 370 struct afu_cmd *cmd = sc_to_afucz(scp);
4392ba49 371 struct device *dev = &cfg->dev->dev;
c21e0bbf
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372 ulong lock_flags;
373 int rc = 0;
018d1dc9 374 ulong to;
c21e0bbf 375
018d1dc9
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376 /* When Task Management Function is active do not send another */
377 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 378 if (cfg->tmf_active)
018d1dc9
MO
379 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
380 !cfg->tmf_active,
381 cfg->tmf_slock);
c21e0bbf 382 cfg->tmf_active = true;
018d1dc9 383 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf 384
fe7f9698 385 cmd->scp = scp;
d4ace351
MO
386 cmd->parent = afu;
387 cmd->cmd_tmf = true;
388
c21e0bbf 389 cmd->rcb.ctx_id = afu->ctx_hndl;
5fbb96c8 390 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
c21e0bbf
MO
391 cmd->rcb.port_sel = port_sel;
392 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
c21e0bbf 393 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
d4ace351
MO
394 SISL_REQ_FLAGS_SUP_UNDERRUN |
395 SISL_REQ_FLAGS_TMF_CMD);
c21e0bbf
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396 memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd));
397
48b4be36 398 rc = afu->send_cmd(afu, cmd);
c21e0bbf 399 if (unlikely(rc)) {
018d1dc9 400 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 401 cfg->tmf_active = false;
018d1dc9 402 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
MO
403 goto out;
404 }
405
018d1dc9
MO
406 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
407 to = msecs_to_jiffies(5000);
408 to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq,
409 !cfg->tmf_active,
410 cfg->tmf_slock,
411 to);
412 if (!to) {
413 cfg->tmf_active = false;
fb67d44d 414 dev_err(dev, "%s: TMF timed out\n", __func__);
018d1dc9
MO
415 rc = -1;
416 }
417 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
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418out:
419 return rc;
420}
421
422/**
423 * cxlflash_driver_info() - information handler for this host driver
424 * @host: SCSI host associated with device.
425 *
426 * Return: A string describing the device.
427 */
428static const char *cxlflash_driver_info(struct Scsi_Host *host)
429{
430 return CXLFLASH_ADAPTER_NAME;
431}
432
433/**
434 * cxlflash_queuecommand() - sends a mid-layer request
435 * @host: SCSI host associated with device.
436 * @scp: SCSI command to send.
437 *
1284fb0c 438 * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
c21e0bbf
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439 */
440static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp)
441{
fb67d44d 442 struct cxlflash_cfg *cfg = shost_priv(host);
c21e0bbf 443 struct afu *afu = cfg->afu;
4392ba49 444 struct device *dev = &cfg->dev->dev;
5fbb96c8 445 struct afu_cmd *cmd = sc_to_afucz(scp);
9d89326c 446 struct scatterlist *sg = scsi_sglist(scp);
c21e0bbf 447 u32 port_sel = scp->device->channel + 1;
9d89326c 448 u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN;
c21e0bbf 449 ulong lock_flags;
9d89326c 450 int nseg = 0;
c21e0bbf
MO
451 int rc = 0;
452
4392ba49 453 dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu "
fb67d44d 454 "cdb=(%08x-%08x-%08x-%08x)\n",
4392ba49
MO
455 __func__, scp, host->host_no, scp->device->channel,
456 scp->device->id, scp->device->lun,
457 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
458 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
459 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
460 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
c21e0bbf 461
018d1dc9
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462 /*
463 * If a Task Management Function is active, wait for it to complete
c21e0bbf
MO
464 * before continuing with regular commands.
465 */
018d1dc9 466 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 467 if (cfg->tmf_active) {
018d1dc9 468 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
MO
469 rc = SCSI_MLQUEUE_HOST_BUSY;
470 goto out;
471 }
018d1dc9 472 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf 473
5cdac81a 474 switch (cfg->state) {
439e85c1 475 case STATE_RESET:
fb67d44d 476 dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__);
5cdac81a
MO
477 rc = SCSI_MLQUEUE_HOST_BUSY;
478 goto out;
479 case STATE_FAILTERM:
fb67d44d 480 dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__);
5cdac81a
MO
481 scp->result = (DID_NO_CONNECT << 16);
482 scp->scsi_done(scp);
483 rc = 0;
484 goto out;
485 default:
486 break;
487 }
488
9d89326c
MO
489 if (likely(sg)) {
490 nseg = scsi_dma_map(scp);
491 if (unlikely(nseg < 0)) {
fb67d44d 492 dev_err(dev, "%s: Fail DMA map\n", __func__);
9d89326c
MO
493 rc = SCSI_MLQUEUE_HOST_BUSY;
494 goto out;
495 }
c21e0bbf 496
9d89326c
MO
497 cmd->rcb.data_len = sg_dma_len(sg);
498 cmd->rcb.data_ea = sg_dma_address(sg);
499 }
c21e0bbf 500
fe7f9698 501 cmd->scp = scp;
5fbb96c8 502 cmd->parent = afu;
c21e0bbf 503
9d89326c
MO
504 cmd->rcb.ctx_id = afu->ctx_hndl;
505 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
506 cmd->rcb.port_sel = port_sel;
507 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
c21e0bbf 508
9d89326c
MO
509 if (scp->sc_data_direction == DMA_TO_DEVICE)
510 req_flags |= SISL_REQ_FLAGS_HOST_WRITE;
c21e0bbf 511
9d89326c 512 cmd->rcb.req_flags = req_flags;
c21e0bbf
MO
513 memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb));
514
48b4be36 515 rc = afu->send_cmd(afu, cmd);
5fbb96c8 516 if (unlikely(rc))
c21e0bbf 517 scsi_dma_unmap(scp);
c21e0bbf
MO
518out:
519 return rc;
520}
521
522/**
15305514 523 * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe
1284fb0c 524 * @cfg: Internal structure associated with the host.
c21e0bbf 525 */
15305514 526static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg)
c21e0bbf 527{
15305514 528 struct pci_dev *pdev = cfg->dev;
c21e0bbf 529
15305514
MO
530 if (pci_channel_offline(pdev))
531 wait_event_timeout(cfg->reset_waitq,
532 !pci_channel_offline(pdev),
533 CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT);
c21e0bbf
MO
534}
535
536/**
15305514 537 * free_mem() - free memory associated with the AFU
1284fb0c 538 * @cfg: Internal structure associated with the host.
c21e0bbf 539 */
15305514 540static void free_mem(struct cxlflash_cfg *cfg)
c21e0bbf 541{
15305514 542 struct afu *afu = cfg->afu;
c21e0bbf 543
15305514 544 if (cfg->afu) {
15305514
MO
545 free_pages((ulong)afu, get_order(sizeof(struct afu)));
546 cfg->afu = NULL;
5cdac81a 547 }
c21e0bbf
MO
548}
549
550/**
15305514 551 * stop_afu() - stops the AFU command timers and unmaps the MMIO space
1284fb0c 552 * @cfg: Internal structure associated with the host.
c21e0bbf 553 *
15305514 554 * Safe to call with AFU in a partially allocated/initialized state.
ee91e332 555 *
0df5bef7
UK
556 * Cancels scheduled worker threads, waits for any active internal AFU
557 * commands to timeout and then unmaps the MMIO space.
c21e0bbf 558 */
15305514 559static void stop_afu(struct cxlflash_cfg *cfg)
c21e0bbf 560{
15305514 561 struct afu *afu = cfg->afu;
c21e0bbf 562
0df5bef7
UK
563 cancel_work_sync(&cfg->work_q);
564
15305514 565 if (likely(afu)) {
de01283b
MO
566 while (atomic_read(&afu->cmds_active))
567 ssleep(1);
c21e0bbf 568 if (likely(afu->afu_map)) {
1786f4a0 569 cxl_psa_unmap((void __iomem *)afu->afu_map);
c21e0bbf
MO
570 afu->afu_map = NULL;
571 }
572 }
573}
574
575/**
9526f360 576 * term_intr() - disables all AFU interrupts
1284fb0c 577 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
578 * @level: Depth of allocation, where to begin waterfall tear down.
579 *
580 * Safe to call with AFU/MC in partially allocated/initialized state.
581 */
9526f360 582static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level)
c21e0bbf 583{
c21e0bbf 584 struct afu *afu = cfg->afu;
4392ba49 585 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
586
587 if (!afu || !cfg->mcctx) {
9526f360 588 dev_err(dev, "%s: returning with NULL afu or MC\n", __func__);
c21e0bbf
MO
589 return;
590 }
591
592 switch (level) {
c21e0bbf
MO
593 case UNMAP_THREE:
594 cxl_unmap_afu_irq(cfg->mcctx, 3, afu);
595 case UNMAP_TWO:
596 cxl_unmap_afu_irq(cfg->mcctx, 2, afu);
597 case UNMAP_ONE:
598 cxl_unmap_afu_irq(cfg->mcctx, 1, afu);
599 case FREE_IRQ:
600 cxl_free_afu_irqs(cfg->mcctx);
9526f360
MK
601 /* fall through */
602 case UNDO_NOOP:
603 /* No action required */
604 break;
605 }
606}
607
608/**
609 * term_mc() - terminates the master context
610 * @cfg: Internal structure associated with the host.
611 * @level: Depth of allocation, where to begin waterfall tear down.
612 *
613 * Safe to call with AFU/MC in partially allocated/initialized state.
614 */
615static void term_mc(struct cxlflash_cfg *cfg)
616{
617 int rc = 0;
618 struct afu *afu = cfg->afu;
619 struct device *dev = &cfg->dev->dev;
620
621 if (!afu || !cfg->mcctx) {
622 dev_err(dev, "%s: returning with NULL afu or MC\n", __func__);
623 return;
c21e0bbf 624 }
9526f360
MK
625
626 rc = cxl_stop_context(cfg->mcctx);
627 WARN_ON(rc);
628 cfg->mcctx = NULL;
c21e0bbf
MO
629}
630
631/**
632 * term_afu() - terminates the AFU
1284fb0c 633 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
634 *
635 * Safe to call with AFU/MC in partially allocated/initialized state.
636 */
637static void term_afu(struct cxlflash_cfg *cfg)
638{
fb67d44d
MO
639 struct device *dev = &cfg->dev->dev;
640
9526f360
MK
641 /*
642 * Tear down is carefully orchestrated to ensure
643 * no interrupts can come in when the problem state
644 * area is unmapped.
645 *
646 * 1) Disable all AFU interrupts
647 * 2) Unmap the problem state area
648 * 3) Stop the master context
649 */
650 term_intr(cfg, UNMAP_THREE);
c21e0bbf
MO
651 if (cfg->afu)
652 stop_afu(cfg);
653
9526f360 654 term_mc(cfg);
6ded8b3c 655
fb67d44d 656 dev_dbg(dev, "%s: returning\n", __func__);
c21e0bbf
MO
657}
658
704c4b0d
UK
659/**
660 * notify_shutdown() - notifies device of pending shutdown
661 * @cfg: Internal structure associated with the host.
662 * @wait: Whether to wait for shutdown processing to complete.
663 *
664 * This function will notify the AFU that the adapter is being shutdown
665 * and will wait for shutdown processing to complete if wait is true.
666 * This notification should flush pending I/Os to the device and halt
667 * further I/Os until the next AFU reset is issued and device restarted.
668 */
669static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait)
670{
671 struct afu *afu = cfg->afu;
672 struct device *dev = &cfg->dev->dev;
1bd2b282 673 struct sisl_global_map __iomem *global;
704c4b0d
UK
674 struct dev_dependent_vals *ddv;
675 u64 reg, status;
676 int i, retry_cnt = 0;
677
678 ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data;
679 if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN))
680 return;
681
1bd2b282 682 if (!afu || !afu->afu_map) {
fb67d44d 683 dev_dbg(dev, "%s: Problem state area not mapped\n", __func__);
1bd2b282
UK
684 return;
685 }
686
687 global = &afu->afu_map->global;
688
704c4b0d
UK
689 /* Notify AFU */
690 for (i = 0; i < NUM_FC_PORTS; i++) {
691 reg = readq_be(&global->fc_regs[i][FC_CONFIG2 / 8]);
692 reg |= SISL_FC_SHUTDOWN_NORMAL;
693 writeq_be(reg, &global->fc_regs[i][FC_CONFIG2 / 8]);
694 }
695
696 if (!wait)
697 return;
698
699 /* Wait up to 1.5 seconds for shutdown processing to complete */
700 for (i = 0; i < NUM_FC_PORTS; i++) {
701 retry_cnt = 0;
702 while (true) {
703 status = readq_be(&global->fc_regs[i][FC_STATUS / 8]);
704 if (status & SISL_STATUS_SHUTDOWN_COMPLETE)
705 break;
706 if (++retry_cnt >= MC_RETRY_CNT) {
707 dev_dbg(dev, "%s: port %d shutdown processing "
708 "not yet completed\n", __func__, i);
709 break;
710 }
711 msleep(100 * retry_cnt);
712 }
713 }
714}
715
c21e0bbf
MO
716/**
717 * cxlflash_remove() - PCI entry point to tear down host
718 * @pdev: PCI device associated with the host.
719 *
720 * Safe to use as a cleanup in partially allocated/initialized state.
721 */
722static void cxlflash_remove(struct pci_dev *pdev)
723{
724 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
fb67d44d 725 struct device *dev = &pdev->dev;
c21e0bbf
MO
726 ulong lock_flags;
727
babf985d 728 if (!pci_is_enabled(pdev)) {
fb67d44d 729 dev_dbg(dev, "%s: Device is disabled\n", __func__);
babf985d
UK
730 return;
731 }
732
c21e0bbf
MO
733 /* If a Task Management Function is active, wait for it to complete
734 * before continuing with remove.
735 */
018d1dc9 736 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 737 if (cfg->tmf_active)
018d1dc9
MO
738 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
739 !cfg->tmf_active,
740 cfg->tmf_slock);
741 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf 742
704c4b0d
UK
743 /* Notify AFU and wait for shutdown processing to complete */
744 notify_shutdown(cfg, true);
745
5cdac81a 746 cfg->state = STATE_FAILTERM;
65be2c79 747 cxlflash_stop_term_user_contexts(cfg);
5cdac81a 748
c21e0bbf
MO
749 switch (cfg->init_state) {
750 case INIT_STATE_SCSI:
65be2c79 751 cxlflash_term_local_luns(cfg);
c21e0bbf 752 scsi_remove_host(cfg->host);
f15fbf8d 753 /* fall through */
c21e0bbf 754 case INIT_STATE_AFU:
b45cdbaf 755 term_afu(cfg);
c21e0bbf 756 case INIT_STATE_PCI:
c21e0bbf
MO
757 pci_disable_device(pdev);
758 case INIT_STATE_NONE:
c21e0bbf 759 free_mem(cfg);
8b5b1e87 760 scsi_host_put(cfg->host);
c21e0bbf
MO
761 break;
762 }
763
fb67d44d 764 dev_dbg(dev, "%s: returning\n", __func__);
c21e0bbf
MO
765}
766
767/**
768 * alloc_mem() - allocates the AFU and its command pool
1284fb0c 769 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
770 *
771 * A partially allocated state remains on failure.
772 *
773 * Return:
774 * 0 on success
775 * -ENOMEM on failure to allocate memory
776 */
777static int alloc_mem(struct cxlflash_cfg *cfg)
778{
779 int rc = 0;
4392ba49 780 struct device *dev = &cfg->dev->dev;
c21e0bbf 781
696d0b0c 782 /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */
c21e0bbf
MO
783 cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
784 get_order(sizeof(struct afu)));
785 if (unlikely(!cfg->afu)) {
4392ba49
MO
786 dev_err(dev, "%s: cannot get %d free pages\n",
787 __func__, get_order(sizeof(struct afu)));
c21e0bbf
MO
788 rc = -ENOMEM;
789 goto out;
790 }
791 cfg->afu->parent = cfg;
792 cfg->afu->afu_map = NULL;
c21e0bbf
MO
793out:
794 return rc;
795}
796
797/**
798 * init_pci() - initializes the host as a PCI device
1284fb0c 799 * @cfg: Internal structure associated with the host.
c21e0bbf 800 *
1284fb0c 801 * Return: 0 on success, -errno on failure
c21e0bbf
MO
802 */
803static int init_pci(struct cxlflash_cfg *cfg)
804{
805 struct pci_dev *pdev = cfg->dev;
fb67d44d 806 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
807 int rc = 0;
808
c21e0bbf
MO
809 rc = pci_enable_device(pdev);
810 if (rc || pci_channel_offline(pdev)) {
811 if (pci_channel_offline(pdev)) {
812 cxlflash_wait_for_pci_err_recovery(cfg);
813 rc = pci_enable_device(pdev);
814 }
815
816 if (rc) {
fb67d44d 817 dev_err(dev, "%s: Cannot enable adapter\n", __func__);
c21e0bbf 818 cxlflash_wait_for_pci_err_recovery(cfg);
961487e4 819 goto out;
c21e0bbf
MO
820 }
821 }
822
c21e0bbf 823out:
fb67d44d 824 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf 825 return rc;
c21e0bbf
MO
826}
827
828/**
829 * init_scsi() - adds the host to the SCSI stack and kicks off host scan
1284fb0c 830 * @cfg: Internal structure associated with the host.
c21e0bbf 831 *
1284fb0c 832 * Return: 0 on success, -errno on failure
c21e0bbf
MO
833 */
834static int init_scsi(struct cxlflash_cfg *cfg)
835{
836 struct pci_dev *pdev = cfg->dev;
fb67d44d 837 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
838 int rc = 0;
839
840 rc = scsi_add_host(cfg->host, &pdev->dev);
841 if (rc) {
fb67d44d 842 dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc);
c21e0bbf
MO
843 goto out;
844 }
845
846 scsi_scan_host(cfg->host);
847
848out:
fb67d44d 849 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
850 return rc;
851}
852
853/**
854 * set_port_online() - transitions the specified host FC port to online state
855 * @fc_regs: Top of MMIO region defined for specified port.
856 *
857 * The provided MMIO region must be mapped prior to call. Online state means
858 * that the FC link layer has synced, completed the handshaking process, and
859 * is ready for login to start.
860 */
1786f4a0 861static void set_port_online(__be64 __iomem *fc_regs)
c21e0bbf
MO
862{
863 u64 cmdcfg;
864
865 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
866 cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */
867 cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */
868 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
869}
870
871/**
872 * set_port_offline() - transitions the specified host FC port to offline state
873 * @fc_regs: Top of MMIO region defined for specified port.
874 *
875 * The provided MMIO region must be mapped prior to call.
876 */
1786f4a0 877static void set_port_offline(__be64 __iomem *fc_regs)
c21e0bbf
MO
878{
879 u64 cmdcfg;
880
881 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
882 cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */
883 cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */
884 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
885}
886
887/**
888 * wait_port_online() - waits for the specified host FC port come online
889 * @fc_regs: Top of MMIO region defined for specified port.
890 * @delay_us: Number of microseconds to delay between reading port status.
891 * @nretry: Number of cycles to retry reading port status.
892 *
893 * The provided MMIO region must be mapped prior to call. This will timeout
894 * when the cable is not plugged in.
895 *
896 * Return:
897 * TRUE (1) when the specified port is online
898 * FALSE (0) when the specified port fails to come online after timeout
c21e0bbf 899 */
fb67d44d 900static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
c21e0bbf
MO
901{
902 u64 status;
903
fb67d44d 904 WARN_ON(delay_us < 1000);
c21e0bbf
MO
905
906 do {
907 msleep(delay_us / 1000);
908 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
05dab432
MO
909 if (status == U64_MAX)
910 nretry /= 2;
c21e0bbf
MO
911 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE &&
912 nretry--);
913
914 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE);
915}
916
917/**
918 * wait_port_offline() - waits for the specified host FC port go offline
919 * @fc_regs: Top of MMIO region defined for specified port.
920 * @delay_us: Number of microseconds to delay between reading port status.
921 * @nretry: Number of cycles to retry reading port status.
922 *
923 * The provided MMIO region must be mapped prior to call.
924 *
925 * Return:
926 * TRUE (1) when the specified port is offline
927 * FALSE (0) when the specified port fails to go offline after timeout
c21e0bbf 928 */
fb67d44d 929static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
c21e0bbf
MO
930{
931 u64 status;
932
fb67d44d 933 WARN_ON(delay_us < 1000);
c21e0bbf
MO
934
935 do {
936 msleep(delay_us / 1000);
937 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
05dab432
MO
938 if (status == U64_MAX)
939 nretry /= 2;
c21e0bbf
MO
940 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE &&
941 nretry--);
942
943 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE);
944}
945
946/**
947 * afu_set_wwpn() - configures the WWPN for the specified host FC port
948 * @afu: AFU associated with the host that owns the specified FC port.
949 * @port: Port number being configured.
950 * @fc_regs: Top of MMIO region defined for specified port.
951 * @wwpn: The world-wide-port-number previously discovered for port.
952 *
953 * The provided MMIO region must be mapped prior to call. As part of the
954 * sequence to configure the WWPN, the port is toggled offline and then back
955 * online. This toggling action can cause this routine to delay up to a few
956 * seconds. When configured to use the internal LUN feature of the AFU, a
957 * failure to come online is overridden.
c21e0bbf 958 */
f8013261
MO
959static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs,
960 u64 wwpn)
c21e0bbf 961{
fb67d44d
MO
962 struct cxlflash_cfg *cfg = afu->parent;
963 struct device *dev = &cfg->dev->dev;
964
c21e0bbf 965 set_port_offline(fc_regs);
c21e0bbf
MO
966 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
967 FC_PORT_STATUS_RETRY_CNT)) {
fb67d44d
MO
968 dev_dbg(dev, "%s: wait on port %d to go offline timed out\n",
969 __func__, port);
c21e0bbf
MO
970 }
971
f8013261 972 writeq_be(wwpn, &fc_regs[FC_PNAME / 8]);
964497b3 973
c21e0bbf 974 set_port_online(fc_regs);
c21e0bbf
MO
975 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
976 FC_PORT_STATUS_RETRY_CNT)) {
fb67d44d
MO
977 dev_dbg(dev, "%s: wait on port %d to go online timed out\n",
978 __func__, port);
c21e0bbf 979 }
c21e0bbf
MO
980}
981
982/**
983 * afu_link_reset() - resets the specified host FC port
984 * @afu: AFU associated with the host that owns the specified FC port.
985 * @port: Port number being configured.
986 * @fc_regs: Top of MMIO region defined for specified port.
987 *
988 * The provided MMIO region must be mapped prior to call. The sequence to
989 * reset the port involves toggling it offline and then back online. This
990 * action can cause this routine to delay up to a few seconds. An effort
991 * is made to maintain link with the device by switching to host to use
992 * the alternate port exclusively while the reset takes place.
993 * failure to come online is overridden.
994 */
1786f4a0 995static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs)
c21e0bbf 996{
fb67d44d
MO
997 struct cxlflash_cfg *cfg = afu->parent;
998 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
999 u64 port_sel;
1000
1001 /* first switch the AFU to the other links, if any */
1002 port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
4da74db0 1003 port_sel &= ~(1ULL << port);
c21e0bbf
MO
1004 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1005 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1006
1007 set_port_offline(fc_regs);
1008 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1009 FC_PORT_STATUS_RETRY_CNT))
fb67d44d
MO
1010 dev_err(dev, "%s: wait on port %d to go offline timed out\n",
1011 __func__, port);
c21e0bbf
MO
1012
1013 set_port_online(fc_regs);
1014 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1015 FC_PORT_STATUS_RETRY_CNT))
fb67d44d
MO
1016 dev_err(dev, "%s: wait on port %d to go online timed out\n",
1017 __func__, port);
c21e0bbf
MO
1018
1019 /* switch back to include this port */
4da74db0 1020 port_sel |= (1ULL << port);
c21e0bbf
MO
1021 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1022 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1023
fb67d44d 1024 dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel);
c21e0bbf
MO
1025}
1026
1027/*
1028 * Asynchronous interrupt information table
1029 */
1030static const struct asyc_intr_info ainfo[] = {
1031 {SISL_ASTATUS_FC0_OTHER, "other error", 0, CLR_FC_ERROR | LINK_RESET},
1032 {SISL_ASTATUS_FC0_LOGO, "target initiated LOGO", 0, 0},
1033 {SISL_ASTATUS_FC0_CRC_T, "CRC threshold exceeded", 0, LINK_RESET},
e6e6df3f 1034 {SISL_ASTATUS_FC0_LOGI_R, "login timed out, retrying", 0, LINK_RESET},
c21e0bbf 1035 {SISL_ASTATUS_FC0_LOGI_F, "login failed", 0, CLR_FC_ERROR},
ef51074a 1036 {SISL_ASTATUS_FC0_LOGI_S, "login succeeded", 0, SCAN_HOST},
c21e0bbf 1037 {SISL_ASTATUS_FC0_LINK_DN, "link down", 0, 0},
bbbfae96 1038 {SISL_ASTATUS_FC0_LINK_UP, "link up", 0, 0},
c21e0bbf
MO
1039 {SISL_ASTATUS_FC1_OTHER, "other error", 1, CLR_FC_ERROR | LINK_RESET},
1040 {SISL_ASTATUS_FC1_LOGO, "target initiated LOGO", 1, 0},
1041 {SISL_ASTATUS_FC1_CRC_T, "CRC threshold exceeded", 1, LINK_RESET},
a9be294e 1042 {SISL_ASTATUS_FC1_LOGI_R, "login timed out, retrying", 1, LINK_RESET},
c21e0bbf 1043 {SISL_ASTATUS_FC1_LOGI_F, "login failed", 1, CLR_FC_ERROR},
ef51074a 1044 {SISL_ASTATUS_FC1_LOGI_S, "login succeeded", 1, SCAN_HOST},
c21e0bbf 1045 {SISL_ASTATUS_FC1_LINK_DN, "link down", 1, 0},
bbbfae96 1046 {SISL_ASTATUS_FC1_LINK_UP, "link up", 1, 0},
c21e0bbf
MO
1047 {0x0, "", 0, 0} /* terminator */
1048};
1049
1050/**
1051 * find_ainfo() - locates and returns asynchronous interrupt information
1052 * @status: Status code set by AFU on error.
1053 *
1054 * Return: The located information or NULL when the status code is invalid.
1055 */
1056static const struct asyc_intr_info *find_ainfo(u64 status)
1057{
1058 const struct asyc_intr_info *info;
1059
1060 for (info = &ainfo[0]; info->status; info++)
1061 if (info->status == status)
1062 return info;
1063
1064 return NULL;
1065}
1066
1067/**
1068 * afu_err_intr_init() - clears and initializes the AFU for error interrupts
1069 * @afu: AFU associated with the host.
1070 */
1071static void afu_err_intr_init(struct afu *afu)
1072{
1073 int i;
1074 u64 reg;
1075
1076 /* global async interrupts: AFU clears afu_ctrl on context exit
1077 * if async interrupts were sent to that context. This prevents
1078 * the AFU form sending further async interrupts when
1079 * there is
1080 * nobody to receive them.
1081 */
1082
1083 /* mask all */
1084 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask);
1085 /* set LISN# to send and point to master context */
1086 reg = ((u64) (((afu->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40);
1087
1088 if (afu->internal_lun)
1089 reg |= 1; /* Bit 63 indicates local lun */
1090 writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl);
1091 /* clear all */
1092 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1093 /* unmask bits that are of interest */
1094 /* note: afu can send an interrupt after this step */
1095 writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask);
1096 /* clear again in case a bit came on after previous clear but before */
1097 /* unmask */
1098 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1099
1100 /* Clear/Set internal lun bits */
1101 reg = readq_be(&afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1102 reg &= SISL_FC_INTERNAL_MASK;
1103 if (afu->internal_lun)
1104 reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT);
1105 writeq_be(reg, &afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1106
1107 /* now clear FC errors */
1108 for (i = 0; i < NUM_FC_PORTS; i++) {
1109 writeq_be(0xFFFFFFFFU,
1110 &afu->afu_map->global.fc_regs[i][FC_ERROR / 8]);
1111 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRCAP / 8]);
1112 }
1113
1114 /* sync interrupts for master's IOARRIN write */
1115 /* note that unlike asyncs, there can be no pending sync interrupts */
1116 /* at this time (this is a fresh context and master has not written */
1117 /* IOARRIN yet), so there is nothing to clear. */
1118
1119 /* set LISN#, it is always sent to the context that wrote IOARRIN */
1120 writeq_be(SISL_MSI_SYNC_ERROR, &afu->host_map->ctx_ctrl);
1121 writeq_be(SISL_ISTATUS_MASK, &afu->host_map->intr_mask);
1122}
1123
1124/**
1125 * cxlflash_sync_err_irq() - interrupt handler for synchronous errors
1126 * @irq: Interrupt number.
1127 * @data: Private data provided at interrupt registration, the AFU.
1128 *
1129 * Return: Always return IRQ_HANDLED.
1130 */
1131static irqreturn_t cxlflash_sync_err_irq(int irq, void *data)
1132{
1133 struct afu *afu = (struct afu *)data;
fb67d44d
MO
1134 struct cxlflash_cfg *cfg = afu->parent;
1135 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1136 u64 reg;
1137 u64 reg_unmasked;
1138
1139 reg = readq_be(&afu->host_map->intr_status);
1140 reg_unmasked = (reg & SISL_ISTATUS_UNMASK);
1141
1142 if (reg_unmasked == 0UL) {
fb67d44d
MO
1143 dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n",
1144 __func__, reg);
c21e0bbf
MO
1145 goto cxlflash_sync_err_irq_exit;
1146 }
1147
fb67d44d
MO
1148 dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n",
1149 __func__, reg);
c21e0bbf
MO
1150
1151 writeq_be(reg_unmasked, &afu->host_map->intr_clear);
1152
1153cxlflash_sync_err_irq_exit:
c21e0bbf
MO
1154 return IRQ_HANDLED;
1155}
1156
1157/**
76a6ebbe
MO
1158 * process_hrrq() - process the read-response queue
1159 * @afu: AFU associated with the host.
f918b4a8
MO
1160 * @doneq: Queue of commands harvested from the RRQ.
1161 *
1162 * This routine must be called holding the disabled RRQ spin lock.
c21e0bbf 1163 *
76a6ebbe 1164 * Return: The number of entries processed.
c21e0bbf 1165 */
f918b4a8 1166static int process_hrrq(struct afu *afu, struct list_head *doneq)
c21e0bbf 1167{
c21e0bbf 1168 struct afu_cmd *cmd;
696d0b0c
MO
1169 struct sisl_ioasa *ioasa;
1170 struct sisl_ioarcb *ioarcb;
c21e0bbf 1171 bool toggle = afu->toggle;
76a6ebbe 1172 int num_hrrq = 0;
c21e0bbf
MO
1173 u64 entry,
1174 *hrrq_start = afu->hrrq_start,
1175 *hrrq_end = afu->hrrq_end,
1176 *hrrq_curr = afu->hrrq_curr;
1177
1178 /* Process however many RRQ entries that are ready */
1179 while (true) {
1180 entry = *hrrq_curr;
1181
1182 if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle)
1183 break;
1184
696d0b0c
MO
1185 entry &= ~SISL_RESP_HANDLE_T_BIT;
1186
1187 if (afu_is_sq_cmd_mode(afu)) {
1188 ioasa = (struct sisl_ioasa *)entry;
1189 cmd = container_of(ioasa, struct afu_cmd, sa);
1190 } else {
1191 ioarcb = (struct sisl_ioarcb *)entry;
1192 cmd = container_of(ioarcb, struct afu_cmd, rcb);
1193 }
1194
f918b4a8 1195 list_add_tail(&cmd->queue, doneq);
c21e0bbf
MO
1196
1197 /* Advance to next entry or wrap and flip the toggle bit */
1198 if (hrrq_curr < hrrq_end)
1199 hrrq_curr++;
1200 else {
1201 hrrq_curr = hrrq_start;
1202 toggle ^= SISL_RESP_HANDLE_T_BIT;
1203 }
696d0b0c
MO
1204
1205 atomic_inc(&afu->hsq_credits);
76a6ebbe 1206 num_hrrq++;
c21e0bbf
MO
1207 }
1208
1209 afu->hrrq_curr = hrrq_curr;
1210 afu->toggle = toggle;
1211
76a6ebbe
MO
1212 return num_hrrq;
1213}
1214
f918b4a8
MO
1215/**
1216 * process_cmd_doneq() - process a queue of harvested RRQ commands
1217 * @doneq: Queue of completed commands.
1218 *
1219 * Note that upon return the queue can no longer be trusted.
1220 */
1221static void process_cmd_doneq(struct list_head *doneq)
1222{
1223 struct afu_cmd *cmd, *tmp;
1224
1225 WARN_ON(list_empty(doneq));
1226
1227 list_for_each_entry_safe(cmd, tmp, doneq, queue)
1228 cmd_complete(cmd);
1229}
1230
76a6ebbe
MO
1231/**
1232 * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path)
1233 * @irq: Interrupt number.
1234 * @data: Private data provided at interrupt registration, the AFU.
1235 *
f918b4a8 1236 * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found.
76a6ebbe
MO
1237 */
1238static irqreturn_t cxlflash_rrq_irq(int irq, void *data)
1239{
1240 struct afu *afu = (struct afu *)data;
f918b4a8
MO
1241 unsigned long hrrq_flags;
1242 LIST_HEAD(doneq);
1243 int num_entries = 0;
76a6ebbe 1244
f918b4a8
MO
1245 spin_lock_irqsave(&afu->hrrq_slock, hrrq_flags);
1246 num_entries = process_hrrq(afu, &doneq);
1247 spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags);
1248
1249 if (num_entries == 0)
1250 return IRQ_NONE;
1251
1252 process_cmd_doneq(&doneq);
c21e0bbf
MO
1253 return IRQ_HANDLED;
1254}
1255
1256/**
1257 * cxlflash_async_err_irq() - interrupt handler for asynchronous errors
1258 * @irq: Interrupt number.
1259 * @data: Private data provided at interrupt registration, the AFU.
1260 *
1261 * Return: Always return IRQ_HANDLED.
1262 */
1263static irqreturn_t cxlflash_async_err_irq(int irq, void *data)
1264{
1265 struct afu *afu = (struct afu *)data;
4392ba49
MO
1266 struct cxlflash_cfg *cfg = afu->parent;
1267 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1268 u64 reg_unmasked;
1269 const struct asyc_intr_info *info;
1786f4a0 1270 struct sisl_global_map __iomem *global = &afu->afu_map->global;
c21e0bbf
MO
1271 u64 reg;
1272 u8 port;
1273 int i;
1274
c21e0bbf
MO
1275 reg = readq_be(&global->regs.aintr_status);
1276 reg_unmasked = (reg & SISL_ASTATUS_UNMASK);
1277
1278 if (reg_unmasked == 0) {
fb67d44d 1279 dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n",
4392ba49 1280 __func__, reg);
c21e0bbf
MO
1281 goto out;
1282 }
1283
f15fbf8d 1284 /* FYI, it is 'okay' to clear AFU status before FC_ERROR */
c21e0bbf
MO
1285 writeq_be(reg_unmasked, &global->regs.aintr_clear);
1286
f15fbf8d 1287 /* Check each bit that is on */
c21e0bbf
MO
1288 for (i = 0; reg_unmasked; i++, reg_unmasked = (reg_unmasked >> 1)) {
1289 info = find_ainfo(1ULL << i);
16798d34 1290 if (((reg_unmasked & 0x1) == 0) || !info)
c21e0bbf
MO
1291 continue;
1292
1293 port = info->port;
1294
fb67d44d 1295 dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n",
4392ba49 1296 __func__, port, info->desc,
c21e0bbf
MO
1297 readq_be(&global->fc_regs[port][FC_STATUS / 8]));
1298
1299 /*
f15fbf8d 1300 * Do link reset first, some OTHER errors will set FC_ERROR
c21e0bbf
MO
1301 * again if cleared before or w/o a reset
1302 */
1303 if (info->action & LINK_RESET) {
4392ba49
MO
1304 dev_err(dev, "%s: FC Port %d: resetting link\n",
1305 __func__, port);
c21e0bbf
MO
1306 cfg->lr_state = LINK_RESET_REQUIRED;
1307 cfg->lr_port = port;
1308 schedule_work(&cfg->work_q);
1309 }
1310
1311 if (info->action & CLR_FC_ERROR) {
1312 reg = readq_be(&global->fc_regs[port][FC_ERROR / 8]);
1313
1314 /*
f15fbf8d 1315 * Since all errors are unmasked, FC_ERROR and FC_ERRCAP
c21e0bbf
MO
1316 * should be the same and tracing one is sufficient.
1317 */
1318
fb67d44d 1319 dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n",
4392ba49 1320 __func__, port, reg);
c21e0bbf
MO
1321
1322 writeq_be(reg, &global->fc_regs[port][FC_ERROR / 8]);
1323 writeq_be(0, &global->fc_regs[port][FC_ERRCAP / 8]);
1324 }
ef51074a
MO
1325
1326 if (info->action & SCAN_HOST) {
1327 atomic_inc(&cfg->scan_host_needed);
1328 schedule_work(&cfg->work_q);
1329 }
c21e0bbf
MO
1330 }
1331
1332out:
c21e0bbf
MO
1333 return IRQ_HANDLED;
1334}
1335
1336/**
1337 * start_context() - starts the master context
1284fb0c 1338 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1339 *
1340 * Return: A success or failure value from CXL services.
1341 */
1342static int start_context(struct cxlflash_cfg *cfg)
1343{
fb67d44d 1344 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1345 int rc = 0;
1346
1347 rc = cxl_start_context(cfg->mcctx,
1348 cfg->afu->work.work_element_descriptor,
1349 NULL);
1350
fb67d44d 1351 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1352 return rc;
1353}
1354
1355/**
1356 * read_vpd() - obtains the WWPNs from VPD
1284fb0c 1357 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1358 * @wwpn: Array of size NUM_FC_PORTS to pass back WWPNs
1359 *
1284fb0c 1360 * Return: 0 on success, -errno on failure
c21e0bbf
MO
1361 */
1362static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[])
1363{
fb67d44d
MO
1364 struct device *dev = &cfg->dev->dev;
1365 struct pci_dev *pdev = cfg->dev;
c21e0bbf
MO
1366 int rc = 0;
1367 int ro_start, ro_size, i, j, k;
1368 ssize_t vpd_size;
1369 char vpd_data[CXLFLASH_VPD_LEN];
1370 char tmp_buf[WWPN_BUF_LEN] = { 0 };
1371 char *wwpn_vpd_tags[NUM_FC_PORTS] = { "V5", "V6" };
1372
1373 /* Get the VPD data from the device */
fb67d44d 1374 vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data));
c21e0bbf 1375 if (unlikely(vpd_size <= 0)) {
fb67d44d
MO
1376 dev_err(dev, "%s: Unable to read VPD (size = %ld)\n",
1377 __func__, vpd_size);
c21e0bbf
MO
1378 rc = -ENODEV;
1379 goto out;
1380 }
1381
1382 /* Get the read only section offset */
1383 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size,
1384 PCI_VPD_LRDT_RO_DATA);
1385 if (unlikely(ro_start < 0)) {
fb67d44d 1386 dev_err(dev, "%s: VPD Read-only data not found\n", __func__);
c21e0bbf
MO
1387 rc = -ENODEV;
1388 goto out;
1389 }
1390
1391 /* Get the read only section size, cap when extends beyond read VPD */
1392 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
1393 j = ro_size;
1394 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1395 if (unlikely((i + j) > vpd_size)) {
fb67d44d
MO
1396 dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n",
1397 __func__, (i + j), vpd_size);
c21e0bbf
MO
1398 ro_size = vpd_size - i;
1399 }
1400
1401 /*
1402 * Find the offset of the WWPN tag within the read only
1403 * VPD data and validate the found field (partials are
1404 * no good to us). Convert the ASCII data to an integer
1405 * value. Note that we must copy to a temporary buffer
1406 * because the conversion service requires that the ASCII
1407 * string be terminated.
1408 */
1409 for (k = 0; k < NUM_FC_PORTS; k++) {
1410 j = ro_size;
1411 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1412
1413 i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]);
1414 if (unlikely(i < 0)) {
fb67d44d
MO
1415 dev_err(dev, "%s: Port %d WWPN not found in VPD\n",
1416 __func__, k);
c21e0bbf
MO
1417 rc = -ENODEV;
1418 goto out;
1419 }
1420
1421 j = pci_vpd_info_field_size(&vpd_data[i]);
1422 i += PCI_VPD_INFO_FLD_HDR_SIZE;
1423 if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) {
fb67d44d
MO
1424 dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n",
1425 __func__, k);
c21e0bbf
MO
1426 rc = -ENODEV;
1427 goto out;
1428 }
1429
1430 memcpy(tmp_buf, &vpd_data[i], WWPN_LEN);
1431 rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]);
1432 if (unlikely(rc)) {
fb67d44d
MO
1433 dev_err(dev, "%s: WWPN conversion failed for port %d\n",
1434 __func__, k);
c21e0bbf
MO
1435 rc = -ENODEV;
1436 goto out;
1437 }
1438 }
1439
1440out:
fb67d44d 1441 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1442 return rc;
1443}
1444
1445/**
15305514 1446 * init_pcr() - initialize the provisioning and control registers
1284fb0c 1447 * @cfg: Internal structure associated with the host.
c21e0bbf 1448 *
15305514
MO
1449 * Also sets up fast access to the mapped registers and initializes AFU
1450 * command fields that never change.
c21e0bbf 1451 */
15305514 1452static void init_pcr(struct cxlflash_cfg *cfg)
c21e0bbf
MO
1453{
1454 struct afu *afu = cfg->afu;
1786f4a0 1455 struct sisl_ctrl_map __iomem *ctrl_map;
c21e0bbf
MO
1456 int i;
1457
1458 for (i = 0; i < MAX_CONTEXT; i++) {
1459 ctrl_map = &afu->afu_map->ctrls[i].ctrl;
f15fbf8d
MO
1460 /* Disrupt any clients that could be running */
1461 /* e.g. clients that survived a master restart */
c21e0bbf
MO
1462 writeq_be(0, &ctrl_map->rht_start);
1463 writeq_be(0, &ctrl_map->rht_cnt_id);
1464 writeq_be(0, &ctrl_map->ctx_cap);
1465 }
1466
f15fbf8d 1467 /* Copy frequently used fields into afu */
c21e0bbf 1468 afu->ctx_hndl = (u16) cxl_process_element(cfg->mcctx);
c21e0bbf
MO
1469 afu->host_map = &afu->afu_map->hosts[afu->ctx_hndl].host;
1470 afu->ctrl_map = &afu->afu_map->ctrls[afu->ctx_hndl].ctrl;
1471
1472 /* Program the Endian Control for the master context */
1473 writeq_be(SISL_ENDIAN_CTRL, &afu->host_map->endian_ctrl);
c21e0bbf
MO
1474}
1475
1476/**
1477 * init_global() - initialize AFU global registers
1284fb0c 1478 * @cfg: Internal structure associated with the host.
c21e0bbf 1479 */
15305514 1480static int init_global(struct cxlflash_cfg *cfg)
c21e0bbf
MO
1481{
1482 struct afu *afu = cfg->afu;
4392ba49 1483 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1484 u64 wwpn[NUM_FC_PORTS]; /* wwpn of AFU ports */
1485 int i = 0, num_ports = 0;
1486 int rc = 0;
1487 u64 reg;
1488
1489 rc = read_vpd(cfg, &wwpn[0]);
1490 if (rc) {
4392ba49 1491 dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc);
c21e0bbf
MO
1492 goto out;
1493 }
1494
fb67d44d
MO
1495 dev_dbg(dev, "%s: wwpn0=%016llx wwpn1=%016llx\n",
1496 __func__, wwpn[0], wwpn[1]);
c21e0bbf 1497
696d0b0c 1498 /* Set up RRQ and SQ in AFU for master issued cmds */
c21e0bbf
MO
1499 writeq_be((u64) afu->hrrq_start, &afu->host_map->rrq_start);
1500 writeq_be((u64) afu->hrrq_end, &afu->host_map->rrq_end);
1501
696d0b0c
MO
1502 if (afu_is_sq_cmd_mode(afu)) {
1503 writeq_be((u64)afu->hsq_start, &afu->host_map->sq_start);
1504 writeq_be((u64)afu->hsq_end, &afu->host_map->sq_end);
1505 }
1506
c21e0bbf
MO
1507 /* AFU configuration */
1508 reg = readq_be(&afu->afu_map->global.regs.afu_config);
1509 reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN;
1510 /* enable all auto retry options and control endianness */
1511 /* leave others at default: */
1512 /* CTX_CAP write protected, mbox_r does not clear on read and */
1513 /* checker on if dual afu */
1514 writeq_be(reg, &afu->afu_map->global.regs.afu_config);
1515
f15fbf8d 1516 /* Global port select: select either port */
c21e0bbf 1517 if (afu->internal_lun) {
f15fbf8d 1518 /* Only use port 0 */
c21e0bbf
MO
1519 writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel);
1520 num_ports = NUM_FC_PORTS - 1;
1521 } else {
1522 writeq_be(BOTH_PORTS, &afu->afu_map->global.regs.afu_port_sel);
1523 num_ports = NUM_FC_PORTS;
1524 }
1525
1526 for (i = 0; i < num_ports; i++) {
f15fbf8d 1527 /* Unmask all errors (but they are still masked at AFU) */
c21e0bbf 1528 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRMSK / 8]);
f15fbf8d 1529 /* Clear CRC error cnt & set a threshold */
c21e0bbf
MO
1530 (void)readq_be(&afu->afu_map->global.
1531 fc_regs[i][FC_CNT_CRCERR / 8]);
1532 writeq_be(MC_CRC_THRESH, &afu->afu_map->global.fc_regs[i]
1533 [FC_CRC_THRESH / 8]);
1534
f15fbf8d 1535 /* Set WWPNs. If already programmed, wwpn[i] is 0 */
f8013261
MO
1536 if (wwpn[i] != 0)
1537 afu_set_wwpn(afu, i,
1538 &afu->afu_map->global.fc_regs[i][0],
1539 wwpn[i]);
c21e0bbf
MO
1540 /* Programming WWPN back to back causes additional
1541 * offline/online transitions and a PLOGI
1542 */
1543 msleep(100);
c21e0bbf
MO
1544 }
1545
f15fbf8d
MO
1546 /* Set up master's own CTX_CAP to allow real mode, host translation */
1547 /* tables, afu cmds and read/write GSCSI cmds. */
c21e0bbf
MO
1548 /* First, unlock ctx_cap write by reading mbox */
1549 (void)readq_be(&afu->ctrl_map->mbox_r); /* unlock ctx_cap */
1550 writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE |
1551 SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD |
1552 SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD),
1553 &afu->ctrl_map->ctx_cap);
f15fbf8d 1554 /* Initialize heartbeat */
c21e0bbf 1555 afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb);
c21e0bbf
MO
1556out:
1557 return rc;
1558}
1559
1560/**
1561 * start_afu() - initializes and starts the AFU
1284fb0c 1562 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1563 */
1564static int start_afu(struct cxlflash_cfg *cfg)
1565{
1566 struct afu *afu = cfg->afu;
fb67d44d 1567 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1568 int rc = 0;
1569
c21e0bbf
MO
1570 init_pcr(cfg);
1571
f918b4a8 1572 /* Initialize RRQ */
af10483e 1573 memset(&afu->rrq_entry, 0, sizeof(afu->rrq_entry));
c21e0bbf
MO
1574 afu->hrrq_start = &afu->rrq_entry[0];
1575 afu->hrrq_end = &afu->rrq_entry[NUM_RRQ_ENTRY - 1];
1576 afu->hrrq_curr = afu->hrrq_start;
1577 afu->toggle = 1;
f918b4a8 1578 spin_lock_init(&afu->hrrq_slock);
c21e0bbf 1579
696d0b0c
MO
1580 /* Initialize SQ */
1581 if (afu_is_sq_cmd_mode(afu)) {
1582 memset(&afu->sq, 0, sizeof(afu->sq));
1583 afu->hsq_start = &afu->sq[0];
1584 afu->hsq_end = &afu->sq[NUM_SQ_ENTRY - 1];
1585 afu->hsq_curr = afu->hsq_start;
1586
1587 spin_lock_init(&afu->hsq_slock);
1588 atomic_set(&afu->hsq_credits, NUM_SQ_ENTRY - 1);
1589 }
1590
c21e0bbf
MO
1591 rc = init_global(cfg);
1592
fb67d44d 1593 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1594 return rc;
1595}
1596
1597/**
9526f360 1598 * init_intr() - setup interrupt handlers for the master context
1284fb0c 1599 * @cfg: Internal structure associated with the host.
c21e0bbf 1600 *
1284fb0c 1601 * Return: 0 on success, -errno on failure
c21e0bbf 1602 */
9526f360
MK
1603static enum undo_level init_intr(struct cxlflash_cfg *cfg,
1604 struct cxl_context *ctx)
c21e0bbf 1605{
c21e0bbf 1606 struct afu *afu = cfg->afu;
9526f360 1607 struct device *dev = &cfg->dev->dev;
c21e0bbf 1608 int rc = 0;
9526f360 1609 enum undo_level level = UNDO_NOOP;
c21e0bbf
MO
1610
1611 rc = cxl_allocate_afu_irqs(ctx, 3);
1612 if (unlikely(rc)) {
fb67d44d 1613 dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n",
c21e0bbf 1614 __func__, rc);
9526f360 1615 level = UNDO_NOOP;
c21e0bbf
MO
1616 goto out;
1617 }
1618
1619 rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, afu,
1620 "SISL_MSI_SYNC_ERROR");
1621 if (unlikely(rc <= 0)) {
fb67d44d 1622 dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__);
c21e0bbf
MO
1623 level = FREE_IRQ;
1624 goto out;
1625 }
1626
1627 rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, afu,
1628 "SISL_MSI_RRQ_UPDATED");
1629 if (unlikely(rc <= 0)) {
fb67d44d 1630 dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__);
c21e0bbf
MO
1631 level = UNMAP_ONE;
1632 goto out;
1633 }
1634
1635 rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, afu,
1636 "SISL_MSI_ASYNC_ERROR");
1637 if (unlikely(rc <= 0)) {
fb67d44d 1638 dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__);
c21e0bbf
MO
1639 level = UNMAP_TWO;
1640 goto out;
1641 }
9526f360
MK
1642out:
1643 return level;
1644}
c21e0bbf 1645
9526f360
MK
1646/**
1647 * init_mc() - create and register as the master context
1648 * @cfg: Internal structure associated with the host.
1649 *
1650 * Return: 0 on success, -errno on failure
1651 */
1652static int init_mc(struct cxlflash_cfg *cfg)
1653{
1654 struct cxl_context *ctx;
1655 struct device *dev = &cfg->dev->dev;
1656 int rc = 0;
1657 enum undo_level level;
1658
1659 ctx = cxl_get_context(cfg->dev);
1660 if (unlikely(!ctx)) {
1661 rc = -ENOMEM;
1662 goto ret;
1663 }
1664 cfg->mcctx = ctx;
1665
1666 /* Set it up as a master with the CXL */
1667 cxl_set_master(ctx);
1668
1669 /* During initialization reset the AFU to start from a clean slate */
1670 rc = cxl_afu_reset(cfg->mcctx);
1671 if (unlikely(rc)) {
fb67d44d 1672 dev_err(dev, "%s: AFU reset failed rc=%d\n", __func__, rc);
9526f360
MK
1673 goto ret;
1674 }
1675
1676 level = init_intr(cfg, ctx);
1677 if (unlikely(level)) {
fb67d44d 1678 dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc);
9526f360
MK
1679 goto out;
1680 }
c21e0bbf
MO
1681
1682 /* This performs the equivalent of the CXL_IOCTL_START_WORK.
1683 * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process
1684 * element (pe) that is embedded in the context (ctx)
1685 */
1686 rc = start_context(cfg);
1687 if (unlikely(rc)) {
1688 dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc);
1689 level = UNMAP_THREE;
1690 goto out;
1691 }
1692ret:
fb67d44d 1693 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1694 return rc;
1695out:
9526f360 1696 term_intr(cfg, level);
c21e0bbf
MO
1697 goto ret;
1698}
1699
1700/**
1701 * init_afu() - setup as master context and start AFU
1284fb0c 1702 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1703 *
1704 * This routine is a higher level of control for configuring the
1705 * AFU on probe and reset paths.
1706 *
1284fb0c 1707 * Return: 0 on success, -errno on failure
c21e0bbf
MO
1708 */
1709static int init_afu(struct cxlflash_cfg *cfg)
1710{
1711 u64 reg;
1712 int rc = 0;
1713 struct afu *afu = cfg->afu;
1714 struct device *dev = &cfg->dev->dev;
1715
5cdac81a
MO
1716 cxl_perst_reloads_same_image(cfg->cxl_afu, true);
1717
c21e0bbf
MO
1718 rc = init_mc(cfg);
1719 if (rc) {
fb67d44d 1720 dev_err(dev, "%s: init_mc failed rc=%d\n",
c21e0bbf 1721 __func__, rc);
ee3491ba 1722 goto out;
c21e0bbf
MO
1723 }
1724
f15fbf8d 1725 /* Map the entire MMIO space of the AFU */
c21e0bbf
MO
1726 afu->afu_map = cxl_psa_map(cfg->mcctx);
1727 if (!afu->afu_map) {
fb67d44d 1728 dev_err(dev, "%s: cxl_psa_map failed\n", __func__);
ee3491ba 1729 rc = -ENOMEM;
c21e0bbf
MO
1730 goto err1;
1731 }
1732
e5ce067b
MO
1733 /* No byte reverse on reading afu_version or string will be backwards */
1734 reg = readq(&afu->afu_map->global.regs.afu_version);
1735 memcpy(afu->version, &reg, sizeof(reg));
c21e0bbf
MO
1736 afu->interface_version =
1737 readq_be(&afu->afu_map->global.regs.interface_version);
e5ce067b 1738 if ((afu->interface_version + 1) == 0) {
fb67d44d
MO
1739 dev_err(dev, "Back level AFU, please upgrade. AFU version %s "
1740 "interface version %016llx\n", afu->version,
e5ce067b
MO
1741 afu->interface_version);
1742 rc = -EINVAL;
0df5bef7 1743 goto err1;
ee3491ba
MO
1744 }
1745
696d0b0c
MO
1746 if (afu_is_sq_cmd_mode(afu)) {
1747 afu->send_cmd = send_cmd_sq;
1748 afu->context_reset = context_reset_sq;
1749 } else {
1750 afu->send_cmd = send_cmd_ioarrin;
1751 afu->context_reset = context_reset_ioarrin;
1752 }
48b4be36 1753
fb67d44d
MO
1754 dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__,
1755 afu->version, afu->interface_version);
c21e0bbf
MO
1756
1757 rc = start_afu(cfg);
1758 if (rc) {
fb67d44d 1759 dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc);
0df5bef7 1760 goto err1;
c21e0bbf
MO
1761 }
1762
1763 afu_err_intr_init(cfg->afu);
11f7b184
UK
1764 spin_lock_init(&afu->rrin_slock);
1765 afu->room = readq_be(&afu->host_map->cmd_room);
c21e0bbf 1766
2cb79266
MO
1767 /* Restore the LUN mappings */
1768 cxlflash_restore_luntable(cfg);
ee3491ba 1769out:
fb67d44d 1770 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf 1771 return rc;
ee3491ba 1772
ee3491ba 1773err1:
9526f360
MK
1774 term_intr(cfg, UNMAP_THREE);
1775 term_mc(cfg);
ee3491ba 1776 goto out;
c21e0bbf
MO
1777}
1778
c21e0bbf
MO
1779/**
1780 * cxlflash_afu_sync() - builds and sends an AFU sync command
1781 * @afu: AFU associated with the host.
1782 * @ctx_hndl_u: Identifies context requesting sync.
1783 * @res_hndl_u: Identifies resource requesting sync.
1784 * @mode: Type of sync to issue (lightweight, heavyweight, global).
1785 *
1786 * The AFU can only take 1 sync command at a time. This routine enforces this
f15fbf8d 1787 * limitation by using a mutex to provide exclusive access to the AFU during
c21e0bbf
MO
1788 * the sync. This design point requires calling threads to not be on interrupt
1789 * context due to the possibility of sleeping during concurrent sync operations.
1790 *
5cdac81a
MO
1791 * AFU sync operations are only necessary and allowed when the device is
1792 * operating normally. When not operating normally, sync requests can occur as
1793 * part of cleaning up resources associated with an adapter prior to removal.
1794 * In this scenario, these requests are simply ignored (safe due to the AFU
1795 * going away).
1796 *
c21e0bbf
MO
1797 * Return:
1798 * 0 on success
1799 * -1 on failure
1800 */
1801int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u,
1802 res_hndl_t res_hndl_u, u8 mode)
1803{
5cdac81a 1804 struct cxlflash_cfg *cfg = afu->parent;
4392ba49 1805 struct device *dev = &cfg->dev->dev;
c21e0bbf 1806 struct afu_cmd *cmd = NULL;
350bb478 1807 char *buf = NULL;
c21e0bbf 1808 int rc = 0;
c21e0bbf
MO
1809 static DEFINE_MUTEX(sync_active);
1810
5cdac81a 1811 if (cfg->state != STATE_NORMAL) {
fb67d44d
MO
1812 dev_dbg(dev, "%s: Sync not required state=%u\n",
1813 __func__, cfg->state);
5cdac81a
MO
1814 return 0;
1815 }
1816
c21e0bbf 1817 mutex_lock(&sync_active);
de01283b 1818 atomic_inc(&afu->cmds_active);
350bb478
MO
1819 buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL);
1820 if (unlikely(!buf)) {
1821 dev_err(dev, "%s: no memory for command\n", __func__);
c21e0bbf
MO
1822 rc = -1;
1823 goto out;
1824 }
1825
350bb478
MO
1826 cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd));
1827 init_completion(&cmd->cevent);
350bb478 1828 cmd->parent = afu;
c21e0bbf 1829
fb67d44d 1830 dev_dbg(dev, "%s: afu=%p cmd=%p %d\n", __func__, afu, cmd, ctx_hndl_u);
c21e0bbf
MO
1831
1832 cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD;
350bb478
MO
1833 cmd->rcb.ctx_id = afu->ctx_hndl;
1834 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
c21e0bbf
MO
1835 cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT;
1836
1837 cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */
1838 cmd->rcb.cdb[1] = mode;
1839
1840 /* The cdb is aligned, no unaligned accessors required */
1786f4a0
MO
1841 *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u);
1842 *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u);
c21e0bbf 1843
48b4be36 1844 rc = afu->send_cmd(afu, cmd);
c21e0bbf
MO
1845 if (unlikely(rc))
1846 goto out;
1847
9ba848ac
MO
1848 rc = wait_resp(afu, cmd);
1849 if (unlikely(rc))
c21e0bbf
MO
1850 rc = -1;
1851out:
de01283b 1852 atomic_dec(&afu->cmds_active);
c21e0bbf 1853 mutex_unlock(&sync_active);
350bb478 1854 kfree(buf);
fb67d44d 1855 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1856 return rc;
1857}
1858
1859/**
15305514
MO
1860 * afu_reset() - resets the AFU
1861 * @cfg: Internal structure associated with the host.
c21e0bbf 1862 *
1284fb0c 1863 * Return: 0 on success, -errno on failure
c21e0bbf 1864 */
15305514 1865static int afu_reset(struct cxlflash_cfg *cfg)
c21e0bbf 1866{
fb67d44d 1867 struct device *dev = &cfg->dev->dev;
c21e0bbf 1868 int rc = 0;
fb67d44d 1869
c21e0bbf
MO
1870 /* Stop the context before the reset. Since the context is
1871 * no longer available restart it after the reset is complete
1872 */
c21e0bbf
MO
1873 term_afu(cfg);
1874
1875 rc = init_afu(cfg);
1876
fb67d44d 1877 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1878 return rc;
1879}
1880
f411396d
MK
1881/**
1882 * drain_ioctls() - wait until all currently executing ioctls have completed
1883 * @cfg: Internal structure associated with the host.
1884 *
1885 * Obtain write access to read/write semaphore that wraps ioctl
1886 * handling to 'drain' ioctls currently executing.
1887 */
1888static void drain_ioctls(struct cxlflash_cfg *cfg)
1889{
1890 down_write(&cfg->ioctl_rwsem);
1891 up_write(&cfg->ioctl_rwsem);
1892}
1893
15305514
MO
1894/**
1895 * cxlflash_eh_device_reset_handler() - reset a single LUN
1896 * @scp: SCSI command to send.
1897 *
1898 * Return:
1899 * SUCCESS as defined in scsi/scsi.h
1900 * FAILED as defined in scsi/scsi.h
1901 */
1902static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp)
1903{
1904 int rc = SUCCESS;
1905 struct Scsi_Host *host = scp->device->host;
fb67d44d
MO
1906 struct cxlflash_cfg *cfg = shost_priv(host);
1907 struct device *dev = &cfg->dev->dev;
15305514
MO
1908 struct afu *afu = cfg->afu;
1909 int rcr = 0;
1910
fb67d44d
MO
1911 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
1912 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
1913 scp->device->channel, scp->device->id, scp->device->lun,
1914 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
1915 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
1916 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
1917 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
15305514 1918
ed486daa 1919retry:
15305514
MO
1920 switch (cfg->state) {
1921 case STATE_NORMAL:
1922 rcr = send_tmf(afu, scp, TMF_LUN_RESET);
1923 if (unlikely(rcr))
1924 rc = FAILED;
1925 break;
1926 case STATE_RESET:
1927 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
ed486daa 1928 goto retry;
15305514
MO
1929 default:
1930 rc = FAILED;
1931 break;
1932 }
1933
fb67d44d 1934 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
15305514
MO
1935 return rc;
1936}
1937
1938/**
1939 * cxlflash_eh_host_reset_handler() - reset the host adapter
1940 * @scp: SCSI command from stack identifying host.
1941 *
1d3324c3
MO
1942 * Following a reset, the state is evaluated again in case an EEH occurred
1943 * during the reset. In such a scenario, the host reset will either yield
1944 * until the EEH recovery is complete or return success or failure based
1945 * upon the current device state.
1946 *
15305514
MO
1947 * Return:
1948 * SUCCESS as defined in scsi/scsi.h
1949 * FAILED as defined in scsi/scsi.h
1950 */
1951static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp)
1952{
1953 int rc = SUCCESS;
1954 int rcr = 0;
1955 struct Scsi_Host *host = scp->device->host;
fb67d44d
MO
1956 struct cxlflash_cfg *cfg = shost_priv(host);
1957 struct device *dev = &cfg->dev->dev;
15305514 1958
fb67d44d
MO
1959 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
1960 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
1961 scp->device->channel, scp->device->id, scp->device->lun,
1962 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
1963 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
1964 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
1965 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
15305514
MO
1966
1967 switch (cfg->state) {
1968 case STATE_NORMAL:
1969 cfg->state = STATE_RESET;
f411396d 1970 drain_ioctls(cfg);
15305514
MO
1971 cxlflash_mark_contexts_error(cfg);
1972 rcr = afu_reset(cfg);
1973 if (rcr) {
1974 rc = FAILED;
1975 cfg->state = STATE_FAILTERM;
1976 } else
1977 cfg->state = STATE_NORMAL;
1978 wake_up_all(&cfg->reset_waitq);
1d3324c3
MO
1979 ssleep(1);
1980 /* fall through */
15305514
MO
1981 case STATE_RESET:
1982 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
1983 if (cfg->state == STATE_NORMAL)
1984 break;
1985 /* fall through */
1986 default:
1987 rc = FAILED;
1988 break;
1989 }
1990
fb67d44d 1991 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
15305514
MO
1992 return rc;
1993}
1994
1995/**
1996 * cxlflash_change_queue_depth() - change the queue depth for the device
1997 * @sdev: SCSI device destined for queue depth change.
1998 * @qdepth: Requested queue depth value to set.
1999 *
2000 * The requested queue depth is capped to the maximum supported value.
2001 *
2002 * Return: The actual queue depth set.
2003 */
2004static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth)
2005{
2006
2007 if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN)
2008 qdepth = CXLFLASH_MAX_CMDS_PER_LUN;
2009
2010 scsi_change_queue_depth(sdev, qdepth);
2011 return sdev->queue_depth;
2012}
2013
2014/**
2015 * cxlflash_show_port_status() - queries and presents the current port status
e0f01a21
MO
2016 * @port: Desired port for status reporting.
2017 * @afu: AFU owning the specified port.
15305514
MO
2018 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2019 *
2020 * Return: The size of the ASCII string returned in @buf.
2021 */
e0f01a21 2022static ssize_t cxlflash_show_port_status(u32 port, struct afu *afu, char *buf)
15305514 2023{
15305514 2024 char *disp_status;
15305514 2025 u64 status;
e0f01a21 2026 __be64 __iomem *fc_regs;
15305514 2027
e0f01a21 2028 if (port >= NUM_FC_PORTS)
15305514
MO
2029 return 0;
2030
2031 fc_regs = &afu->afu_map->global.fc_regs[port][0];
e0f01a21
MO
2032 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
2033 status &= FC_MTIP_STATUS_MASK;
15305514
MO
2034
2035 if (status == FC_MTIP_STATUS_ONLINE)
2036 disp_status = "online";
2037 else if (status == FC_MTIP_STATUS_OFFLINE)
2038 disp_status = "offline";
2039 else
2040 disp_status = "unknown";
2041
e0f01a21
MO
2042 return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status);
2043}
2044
2045/**
2046 * port0_show() - queries and presents the current status of port 0
2047 * @dev: Generic device associated with the host owning the port.
2048 * @attr: Device attribute representing the port.
2049 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2050 *
2051 * Return: The size of the ASCII string returned in @buf.
2052 */
2053static ssize_t port0_show(struct device *dev,
2054 struct device_attribute *attr,
2055 char *buf)
2056{
fb67d44d 2057 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21
MO
2058 struct afu *afu = cfg->afu;
2059
2060 return cxlflash_show_port_status(0, afu, buf);
15305514
MO
2061}
2062
2063/**
e0f01a21
MO
2064 * port1_show() - queries and presents the current status of port 1
2065 * @dev: Generic device associated with the host owning the port.
2066 * @attr: Device attribute representing the port.
2067 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2068 *
2069 * Return: The size of the ASCII string returned in @buf.
2070 */
2071static ssize_t port1_show(struct device *dev,
2072 struct device_attribute *attr,
2073 char *buf)
2074{
fb67d44d 2075 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21
MO
2076 struct afu *afu = cfg->afu;
2077
2078 return cxlflash_show_port_status(1, afu, buf);
2079}
2080
2081/**
2082 * lun_mode_show() - presents the current LUN mode of the host
15305514 2083 * @dev: Generic device associated with the host.
e0f01a21 2084 * @attr: Device attribute representing the LUN mode.
15305514
MO
2085 * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII.
2086 *
2087 * Return: The size of the ASCII string returned in @buf.
2088 */
e0f01a21
MO
2089static ssize_t lun_mode_show(struct device *dev,
2090 struct device_attribute *attr, char *buf)
15305514 2091{
fb67d44d 2092 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
15305514
MO
2093 struct afu *afu = cfg->afu;
2094
e0f01a21 2095 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun);
15305514
MO
2096}
2097
2098/**
e0f01a21 2099 * lun_mode_store() - sets the LUN mode of the host
15305514 2100 * @dev: Generic device associated with the host.
e0f01a21 2101 * @attr: Device attribute representing the LUN mode.
15305514
MO
2102 * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII.
2103 * @count: Length of data resizing in @buf.
2104 *
2105 * The CXL Flash AFU supports a dummy LUN mode where the external
2106 * links and storage are not required. Space on the FPGA is used
2107 * to create 1 or 2 small LUNs which are presented to the system
2108 * as if they were a normal storage device. This feature is useful
2109 * during development and also provides manufacturing with a way
2110 * to test the AFU without an actual device.
2111 *
2112 * 0 = external LUN[s] (default)
2113 * 1 = internal LUN (1 x 64K, 512B blocks, id 0)
2114 * 2 = internal LUN (1 x 64K, 4K blocks, id 0)
2115 * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1)
2116 * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1)
2117 *
2118 * Return: The size of the ASCII string returned in @buf.
2119 */
e0f01a21
MO
2120static ssize_t lun_mode_store(struct device *dev,
2121 struct device_attribute *attr,
2122 const char *buf, size_t count)
15305514
MO
2123{
2124 struct Scsi_Host *shost = class_to_shost(dev);
fb67d44d 2125 struct cxlflash_cfg *cfg = shost_priv(shost);
15305514
MO
2126 struct afu *afu = cfg->afu;
2127 int rc;
2128 u32 lun_mode;
2129
2130 rc = kstrtouint(buf, 10, &lun_mode);
2131 if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) {
2132 afu->internal_lun = lun_mode;
603ecce9
MK
2133
2134 /*
2135 * When configured for internal LUN, there is only one channel,
2136 * channel number 0, else there will be 2 (default).
2137 */
2138 if (afu->internal_lun)
2139 shost->max_channel = 0;
2140 else
2141 shost->max_channel = NUM_FC_PORTS - 1;
2142
15305514
MO
2143 afu_reset(cfg);
2144 scsi_scan_host(cfg->host);
2145 }
2146
2147 return count;
2148}
2149
2150/**
e0f01a21 2151 * ioctl_version_show() - presents the current ioctl version of the host
15305514
MO
2152 * @dev: Generic device associated with the host.
2153 * @attr: Device attribute representing the ioctl version.
2154 * @buf: Buffer of length PAGE_SIZE to report back the ioctl version.
2155 *
2156 * Return: The size of the ASCII string returned in @buf.
2157 */
e0f01a21
MO
2158static ssize_t ioctl_version_show(struct device *dev,
2159 struct device_attribute *attr, char *buf)
15305514
MO
2160{
2161 return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0);
2162}
2163
2164/**
e0f01a21
MO
2165 * cxlflash_show_port_lun_table() - queries and presents the port LUN table
2166 * @port: Desired port for status reporting.
2167 * @afu: AFU owning the specified port.
2168 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2169 *
2170 * Return: The size of the ASCII string returned in @buf.
2171 */
2172static ssize_t cxlflash_show_port_lun_table(u32 port,
2173 struct afu *afu,
2174 char *buf)
2175{
2176 int i;
2177 ssize_t bytes = 0;
2178 __be64 __iomem *fc_port;
2179
2180 if (port >= NUM_FC_PORTS)
2181 return 0;
2182
2183 fc_port = &afu->afu_map->global.fc_port[port][0];
2184
2185 for (i = 0; i < CXLFLASH_NUM_VLUNS; i++)
2186 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
fb67d44d 2187 "%03d: %016llx\n", i, readq_be(&fc_port[i]));
e0f01a21
MO
2188 return bytes;
2189}
2190
2191/**
2192 * port0_lun_table_show() - presents the current LUN table of port 0
2193 * @dev: Generic device associated with the host owning the port.
2194 * @attr: Device attribute representing the port.
2195 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2196 *
2197 * Return: The size of the ASCII string returned in @buf.
2198 */
2199static ssize_t port0_lun_table_show(struct device *dev,
2200 struct device_attribute *attr,
2201 char *buf)
2202{
fb67d44d 2203 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21
MO
2204 struct afu *afu = cfg->afu;
2205
2206 return cxlflash_show_port_lun_table(0, afu, buf);
2207}
2208
2209/**
2210 * port1_lun_table_show() - presents the current LUN table of port 1
2211 * @dev: Generic device associated with the host owning the port.
2212 * @attr: Device attribute representing the port.
2213 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2214 *
2215 * Return: The size of the ASCII string returned in @buf.
2216 */
2217static ssize_t port1_lun_table_show(struct device *dev,
2218 struct device_attribute *attr,
2219 char *buf)
2220{
fb67d44d 2221 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21
MO
2222 struct afu *afu = cfg->afu;
2223
2224 return cxlflash_show_port_lun_table(1, afu, buf);
2225}
2226
2227/**
2228 * mode_show() - presents the current mode of the device
15305514
MO
2229 * @dev: Generic device associated with the device.
2230 * @attr: Device attribute representing the device mode.
2231 * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII.
2232 *
2233 * Return: The size of the ASCII string returned in @buf.
2234 */
e0f01a21
MO
2235static ssize_t mode_show(struct device *dev,
2236 struct device_attribute *attr, char *buf)
15305514
MO
2237{
2238 struct scsi_device *sdev = to_scsi_device(dev);
2239
e0f01a21
MO
2240 return scnprintf(buf, PAGE_SIZE, "%s\n",
2241 sdev->hostdata ? "superpipe" : "legacy");
15305514
MO
2242}
2243
2244/*
2245 * Host attributes
2246 */
e0f01a21
MO
2247static DEVICE_ATTR_RO(port0);
2248static DEVICE_ATTR_RO(port1);
2249static DEVICE_ATTR_RW(lun_mode);
2250static DEVICE_ATTR_RO(ioctl_version);
2251static DEVICE_ATTR_RO(port0_lun_table);
2252static DEVICE_ATTR_RO(port1_lun_table);
15305514
MO
2253
2254static struct device_attribute *cxlflash_host_attrs[] = {
2255 &dev_attr_port0,
2256 &dev_attr_port1,
2257 &dev_attr_lun_mode,
2258 &dev_attr_ioctl_version,
e0f01a21
MO
2259 &dev_attr_port0_lun_table,
2260 &dev_attr_port1_lun_table,
15305514
MO
2261 NULL
2262};
2263
2264/*
2265 * Device attributes
2266 */
e0f01a21 2267static DEVICE_ATTR_RO(mode);
15305514
MO
2268
2269static struct device_attribute *cxlflash_dev_attrs[] = {
2270 &dev_attr_mode,
2271 NULL
2272};
2273
2274/*
2275 * Host template
2276 */
2277static struct scsi_host_template driver_template = {
2278 .module = THIS_MODULE,
2279 .name = CXLFLASH_ADAPTER_NAME,
2280 .info = cxlflash_driver_info,
2281 .ioctl = cxlflash_ioctl,
2282 .proc_name = CXLFLASH_NAME,
2283 .queuecommand = cxlflash_queuecommand,
2284 .eh_device_reset_handler = cxlflash_eh_device_reset_handler,
2285 .eh_host_reset_handler = cxlflash_eh_host_reset_handler,
2286 .change_queue_depth = cxlflash_change_queue_depth,
83430833 2287 .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN,
15305514 2288 .can_queue = CXLFLASH_MAX_CMDS,
5fbb96c8 2289 .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1,
15305514 2290 .this_id = -1,
68ab2d76 2291 .sg_tablesize = 1, /* No scatter gather support */
15305514
MO
2292 .max_sectors = CXLFLASH_MAX_SECTORS,
2293 .use_clustering = ENABLE_CLUSTERING,
2294 .shost_attrs = cxlflash_host_attrs,
2295 .sdev_attrs = cxlflash_dev_attrs,
2296};
2297
2298/*
2299 * Device dependent values
2300 */
96e1b660
UK
2301static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS,
2302 0ULL };
2303static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS,
704c4b0d 2304 CXLFLASH_NOTIFY_SHUTDOWN };
94344520
MO
2305static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS,
2306 CXLFLASH_NOTIFY_SHUTDOWN };
15305514
MO
2307
2308/*
2309 * PCI device binding table
2310 */
2311static struct pci_device_id cxlflash_pci_table[] = {
2312 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA,
2313 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals},
a2746fb1
MK
2314 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT,
2315 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals},
94344520
MO
2316 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD,
2317 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals},
15305514
MO
2318 {}
2319};
2320
2321MODULE_DEVICE_TABLE(pci, cxlflash_pci_table);
2322
c21e0bbf
MO
2323/**
2324 * cxlflash_worker_thread() - work thread handler for the AFU
2325 * @work: Work structure contained within cxlflash associated with host.
2326 *
2327 * Handles the following events:
2328 * - Link reset which cannot be performed on interrupt context due to
2329 * blocking up to a few seconds
ef51074a 2330 * - Rescan the host
c21e0bbf
MO
2331 */
2332static void cxlflash_worker_thread(struct work_struct *work)
2333{
5cdac81a
MO
2334 struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg,
2335 work_q);
c21e0bbf 2336 struct afu *afu = cfg->afu;
4392ba49 2337 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
2338 int port;
2339 ulong lock_flags;
2340
5cdac81a
MO
2341 /* Avoid MMIO if the device has failed */
2342
2343 if (cfg->state != STATE_NORMAL)
2344 return;
2345
c21e0bbf
MO
2346 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2347
2348 if (cfg->lr_state == LINK_RESET_REQUIRED) {
2349 port = cfg->lr_port;
2350 if (port < 0)
4392ba49
MO
2351 dev_err(dev, "%s: invalid port index %d\n",
2352 __func__, port);
c21e0bbf
MO
2353 else {
2354 spin_unlock_irqrestore(cfg->host->host_lock,
2355 lock_flags);
2356
2357 /* The reset can block... */
2358 afu_link_reset(afu, port,
f15fbf8d 2359 &afu->afu_map->global.fc_regs[port][0]);
c21e0bbf
MO
2360 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2361 }
2362
2363 cfg->lr_state = LINK_RESET_COMPLETE;
2364 }
2365
c21e0bbf 2366 spin_unlock_irqrestore(cfg->host->host_lock, lock_flags);
ef51074a
MO
2367
2368 if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0)
2369 scsi_scan_host(cfg->host);
c21e0bbf
MO
2370}
2371
2372/**
2373 * cxlflash_probe() - PCI entry point to add host
2374 * @pdev: PCI device associated with the host.
2375 * @dev_id: PCI device id associated with device.
2376 *
1284fb0c 2377 * Return: 0 on success, -errno on failure
c21e0bbf
MO
2378 */
2379static int cxlflash_probe(struct pci_dev *pdev,
2380 const struct pci_device_id *dev_id)
2381{
2382 struct Scsi_Host *host;
2383 struct cxlflash_cfg *cfg = NULL;
fb67d44d 2384 struct device *dev = &pdev->dev;
c21e0bbf
MO
2385 struct dev_dependent_vals *ddv;
2386 int rc = 0;
2387
2388 dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n",
2389 __func__, pdev->irq);
2390
2391 ddv = (struct dev_dependent_vals *)dev_id->driver_data;
2392 driver_template.max_sectors = ddv->max_sectors;
2393
2394 host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg));
2395 if (!host) {
fb67d44d 2396 dev_err(dev, "%s: scsi_host_alloc failed\n", __func__);
c21e0bbf
MO
2397 rc = -ENOMEM;
2398 goto out;
2399 }
2400
2401 host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS;
2402 host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET;
2403 host->max_channel = NUM_FC_PORTS - 1;
2404 host->unique_id = host->host_no;
2405 host->max_cmd_len = CXLFLASH_MAX_CDB_LEN;
2406
fb67d44d 2407 cfg = shost_priv(host);
c21e0bbf
MO
2408 cfg->host = host;
2409 rc = alloc_mem(cfg);
2410 if (rc) {
fb67d44d 2411 dev_err(dev, "%s: alloc_mem failed\n", __func__);
c21e0bbf 2412 rc = -ENOMEM;
8b5b1e87 2413 scsi_host_put(cfg->host);
c21e0bbf
MO
2414 goto out;
2415 }
2416
2417 cfg->init_state = INIT_STATE_NONE;
2418 cfg->dev = pdev;
17ead26f 2419 cfg->cxl_fops = cxlflash_cxl_fops;
2cb79266
MO
2420
2421 /*
2422 * The promoted LUNs move to the top of the LUN table. The rest stay
2423 * on the bottom half. The bottom half grows from the end
2424 * (index = 255), whereas the top half grows from the beginning
2425 * (index = 0).
2426 */
2427 cfg->promote_lun_index = 0;
2428 cfg->last_lun_index[0] = CXLFLASH_NUM_VLUNS/2 - 1;
2429 cfg->last_lun_index[1] = CXLFLASH_NUM_VLUNS/2 - 1;
2430
c21e0bbf 2431 cfg->dev_id = (struct pci_device_id *)dev_id;
c21e0bbf
MO
2432
2433 init_waitqueue_head(&cfg->tmf_waitq);
439e85c1 2434 init_waitqueue_head(&cfg->reset_waitq);
c21e0bbf
MO
2435
2436 INIT_WORK(&cfg->work_q, cxlflash_worker_thread);
2437 cfg->lr_state = LINK_RESET_INVALID;
2438 cfg->lr_port = -1;
0d73122c 2439 spin_lock_init(&cfg->tmf_slock);
65be2c79
MO
2440 mutex_init(&cfg->ctx_tbl_list_mutex);
2441 mutex_init(&cfg->ctx_recovery_mutex);
0a27ae51 2442 init_rwsem(&cfg->ioctl_rwsem);
65be2c79
MO
2443 INIT_LIST_HEAD(&cfg->ctx_err_recovery);
2444 INIT_LIST_HEAD(&cfg->lluns);
c21e0bbf
MO
2445
2446 pci_set_drvdata(pdev, cfg);
2447
c21e0bbf
MO
2448 cfg->cxl_afu = cxl_pci_to_afu(pdev);
2449
2450 rc = init_pci(cfg);
2451 if (rc) {
fb67d44d 2452 dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc);
c21e0bbf
MO
2453 goto out_remove;
2454 }
2455 cfg->init_state = INIT_STATE_PCI;
2456
2457 rc = init_afu(cfg);
2458 if (rc) {
fb67d44d 2459 dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc);
c21e0bbf
MO
2460 goto out_remove;
2461 }
2462 cfg->init_state = INIT_STATE_AFU;
2463
c21e0bbf
MO
2464 rc = init_scsi(cfg);
2465 if (rc) {
fb67d44d 2466 dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc);
c21e0bbf
MO
2467 goto out_remove;
2468 }
2469 cfg->init_state = INIT_STATE_SCSI;
2470
2471out:
fb67d44d 2472 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
2473 return rc;
2474
2475out_remove:
2476 cxlflash_remove(pdev);
2477 goto out;
2478}
2479
5cdac81a
MO
2480/**
2481 * cxlflash_pci_error_detected() - called when a PCI error is detected
2482 * @pdev: PCI device struct.
2483 * @state: PCI channel state.
2484 *
1d3324c3
MO
2485 * When an EEH occurs during an active reset, wait until the reset is
2486 * complete and then take action based upon the device state.
2487 *
5cdac81a
MO
2488 * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
2489 */
2490static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev,
2491 pci_channel_state_t state)
2492{
65be2c79 2493 int rc = 0;
5cdac81a
MO
2494 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2495 struct device *dev = &cfg->dev->dev;
2496
2497 dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state);
2498
2499 switch (state) {
2500 case pci_channel_io_frozen:
1d3324c3
MO
2501 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2502 if (cfg->state == STATE_FAILTERM)
2503 return PCI_ERS_RESULT_DISCONNECT;
2504
439e85c1 2505 cfg->state = STATE_RESET;
5cdac81a 2506 scsi_block_requests(cfg->host);
0a27ae51 2507 drain_ioctls(cfg);
65be2c79
MO
2508 rc = cxlflash_mark_contexts_error(cfg);
2509 if (unlikely(rc))
fb67d44d 2510 dev_err(dev, "%s: Failed to mark user contexts rc=%d\n",
65be2c79 2511 __func__, rc);
9526f360 2512 term_afu(cfg);
5cdac81a
MO
2513 return PCI_ERS_RESULT_NEED_RESET;
2514 case pci_channel_io_perm_failure:
2515 cfg->state = STATE_FAILTERM;
439e85c1 2516 wake_up_all(&cfg->reset_waitq);
5cdac81a
MO
2517 scsi_unblock_requests(cfg->host);
2518 return PCI_ERS_RESULT_DISCONNECT;
2519 default:
2520 break;
2521 }
2522 return PCI_ERS_RESULT_NEED_RESET;
2523}
2524
2525/**
2526 * cxlflash_pci_slot_reset() - called when PCI slot has been reset
2527 * @pdev: PCI device struct.
2528 *
2529 * This routine is called by the pci error recovery code after the PCI
2530 * slot has been reset, just before we should resume normal operations.
2531 *
2532 * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT
2533 */
2534static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev)
2535{
2536 int rc = 0;
2537 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2538 struct device *dev = &cfg->dev->dev;
2539
2540 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2541
2542 rc = init_afu(cfg);
2543 if (unlikely(rc)) {
fb67d44d 2544 dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc);
5cdac81a
MO
2545 return PCI_ERS_RESULT_DISCONNECT;
2546 }
2547
2548 return PCI_ERS_RESULT_RECOVERED;
2549}
2550
2551/**
2552 * cxlflash_pci_resume() - called when normal operation can resume
2553 * @pdev: PCI device struct
2554 */
2555static void cxlflash_pci_resume(struct pci_dev *pdev)
2556{
2557 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2558 struct device *dev = &cfg->dev->dev;
2559
2560 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2561
2562 cfg->state = STATE_NORMAL;
439e85c1 2563 wake_up_all(&cfg->reset_waitq);
5cdac81a
MO
2564 scsi_unblock_requests(cfg->host);
2565}
2566
2567static const struct pci_error_handlers cxlflash_err_handler = {
2568 .error_detected = cxlflash_pci_error_detected,
2569 .slot_reset = cxlflash_pci_slot_reset,
2570 .resume = cxlflash_pci_resume,
2571};
2572
c21e0bbf
MO
2573/*
2574 * PCI device structure
2575 */
2576static struct pci_driver cxlflash_driver = {
2577 .name = CXLFLASH_NAME,
2578 .id_table = cxlflash_pci_table,
2579 .probe = cxlflash_probe,
2580 .remove = cxlflash_remove,
babf985d 2581 .shutdown = cxlflash_remove,
5cdac81a 2582 .err_handler = &cxlflash_err_handler,
c21e0bbf
MO
2583};
2584
2585/**
2586 * init_cxlflash() - module entry point
2587 *
1284fb0c 2588 * Return: 0 on success, -errno on failure
c21e0bbf
MO
2589 */
2590static int __init init_cxlflash(void)
2591{
65be2c79
MO
2592 cxlflash_list_init();
2593
c21e0bbf
MO
2594 return pci_register_driver(&cxlflash_driver);
2595}
2596
2597/**
2598 * exit_cxlflash() - module exit point
2599 */
2600static void __exit exit_cxlflash(void)
2601{
65be2c79
MO
2602 cxlflash_term_global_luns();
2603 cxlflash_free_errpage();
2604
c21e0bbf
MO
2605 pci_unregister_driver(&cxlflash_driver);
2606}
2607
2608module_init(init_cxlflash);
2609module_exit(exit_cxlflash);