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cf4e6363 MC |
1 | /* bnx2i.h: Broadcom NetXtreme II iSCSI driver. |
2 | * | |
11cec1e2 | 3 | * Copyright (c) 2006 - 2010 Broadcom Corporation |
cf4e6363 MC |
4 | * Copyright (c) 2007, 2008 Red Hat, Inc. All rights reserved. |
5 | * Copyright (c) 2007, 2008 Mike Christie | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation. | |
10 | * | |
11 | * Written by: Anil Veerabhadrappa (anilgv@broadcom.com) | |
11cec1e2 | 12 | * Maintained by: Eddie Wai (eddie.wai@broadcom.com) |
cf4e6363 MC |
13 | */ |
14 | ||
15 | #ifndef _BNX2I_H_ | |
16 | #define _BNX2I_H_ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/moduleparam.h> | |
20 | ||
21 | #include <linux/errno.h> | |
22 | #include <linux/pci.h> | |
23 | #include <linux/spinlock.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/sched.h> | |
26 | #include <linux/in.h> | |
27 | #include <linux/kfifo.h> | |
28 | #include <linux/netdevice.h> | |
29 | #include <linux/completion.h> | |
30 | ||
31 | #include <scsi/scsi_cmnd.h> | |
32 | #include <scsi/scsi_device.h> | |
33 | #include <scsi/scsi_eh.h> | |
34 | #include <scsi/scsi_host.h> | |
35 | #include <scsi/scsi.h> | |
36 | #include <scsi/iscsi_proto.h> | |
37 | #include <scsi/libiscsi.h> | |
38 | #include <scsi/scsi_transport_iscsi.h> | |
39 | ||
40 | #include "../../net/cnic_if.h" | |
41 | #include "57xx_iscsi_hsi.h" | |
42 | #include "57xx_iscsi_constants.h" | |
43 | ||
44 | #define BNX2_ISCSI_DRIVER_NAME "bnx2i" | |
45 | ||
46 | #define BNX2I_MAX_ADAPTERS 8 | |
47 | ||
48 | #define ISCSI_MAX_CONNS_PER_HBA 128 | |
49 | #define ISCSI_MAX_SESS_PER_HBA ISCSI_MAX_CONNS_PER_HBA | |
50 | #define ISCSI_MAX_CMDS_PER_SESS 128 | |
51 | ||
52 | /* Total active commands across all connections supported by devices */ | |
53 | #define ISCSI_MAX_CMDS_PER_HBA_5708 (28 * (ISCSI_MAX_CMDS_PER_SESS - 1)) | |
54 | #define ISCSI_MAX_CMDS_PER_HBA_5709 (128 * (ISCSI_MAX_CMDS_PER_SESS - 1)) | |
55 | #define ISCSI_MAX_CMDS_PER_HBA_57710 (256 * (ISCSI_MAX_CMDS_PER_SESS - 1)) | |
56 | ||
57 | #define ISCSI_MAX_BDS_PER_CMD 32 | |
58 | ||
59 | #define MAX_PAGES_PER_CTRL_STRUCT_POOL 8 | |
60 | #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS 4 | |
61 | ||
523224a3 DK |
62 | #define BNX2I_5771X_DBELL_PAGE_SIZE 128 |
63 | ||
cf4e6363 MC |
64 | /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */ |
65 | #define MAX_BD_LENGTH 65535 | |
66 | #define BD_SPLIT_SIZE 32768 | |
67 | ||
68 | /* min, max & default values for SQ/RQ/CQ size, configurable via' modparam */ | |
9ae58e14 EW |
69 | #define BNX2I_SQ_WQES_MIN 16 |
70 | #define BNX2I_570X_SQ_WQES_MAX 128 | |
71 | #define BNX2I_5770X_SQ_WQES_MAX 512 | |
72 | #define BNX2I_570X_SQ_WQES_DEFAULT 128 | |
73 | #define BNX2I_5770X_SQ_WQES_DEFAULT 128 | |
cf4e6363 MC |
74 | |
75 | #define BNX2I_570X_CQ_WQES_MAX 128 | |
76 | #define BNX2I_5770X_CQ_WQES_MAX 512 | |
77 | ||
78 | #define BNX2I_RQ_WQES_MIN 16 | |
79 | #define BNX2I_RQ_WQES_MAX 32 | |
80 | #define BNX2I_RQ_WQES_DEFAULT 16 | |
81 | ||
82 | /* CCELLs per conn */ | |
83 | #define BNX2I_CCELLS_MIN 16 | |
84 | #define BNX2I_CCELLS_MAX 96 | |
85 | #define BNX2I_CCELLS_DEFAULT 64 | |
86 | ||
87 | #define ITT_INVALID_SIGNATURE 0xFFFF | |
88 | ||
89 | #define ISCSI_CMD_CLEANUP_TIMEOUT 100 | |
90 | ||
91 | #define BNX2I_CONN_CTX_BUF_SIZE 16384 | |
92 | ||
93 | #define BNX2I_SQ_WQE_SIZE 64 | |
94 | #define BNX2I_RQ_WQE_SIZE 256 | |
95 | #define BNX2I_CQE_SIZE 64 | |
96 | ||
97 | #define MB_KERNEL_CTX_SHIFT 8 | |
98 | #define MB_KERNEL_CTX_SIZE (1 << MB_KERNEL_CTX_SHIFT) | |
99 | ||
100 | #define CTX_SHIFT 7 | |
101 | #define GET_CID_NUM(cid_addr) ((cid_addr) >> CTX_SHIFT) | |
102 | ||
103 | #define CTX_OFFSET 0x10000 | |
104 | #define MAX_CID_CNT 0x4000 | |
105 | ||
53203244 AV |
106 | #define BNX2I_570X_PAGE_SIZE_DEFAULT 4096 |
107 | ||
cf4e6363 MC |
108 | /* 5709 context registers */ |
109 | #define BNX2_MQ_CONFIG2 0x00003d00 | |
110 | #define BNX2_MQ_CONFIG2_CONT_SZ (0x7L<<4) | |
111 | #define BNX2_MQ_CONFIG2_FIRST_L4L5 (0x1fL<<8) | |
112 | ||
113 | /* 57710's BAR2 is mapped to doorbell registers */ | |
114 | #define BNX2X_DOORBELL_PCI_BAR 2 | |
115 | #define BNX2X_MAX_CQS 8 | |
116 | ||
117 | #define CNIC_ARM_CQE 1 | |
9ae58e14 | 118 | #define CNIC_ARM_CQE_FP 2 |
cf4e6363 MC |
119 | #define CNIC_DISARM_CQE 0 |
120 | ||
121 | #define REG_RD(__hba, offset) \ | |
122 | readl(__hba->regview + offset) | |
123 | #define REG_WR(__hba, offset, val) \ | |
124 | writel(val, __hba->regview + offset) | |
125 | ||
126 | ||
127 | /** | |
128 | * struct generic_pdu_resc - login pdu resource structure | |
129 | * | |
130 | * @req_buf: driver buffer used to stage payload associated with | |
131 | * the login request | |
132 | * @req_dma_addr: dma address for iscsi login request payload buffer | |
133 | * @req_buf_size: actual login request payload length | |
134 | * @req_wr_ptr: pointer into login request buffer when next data is | |
135 | * to be written | |
136 | * @resp_hdr: iscsi header where iscsi login response header is to | |
137 | * be recreated | |
138 | * @resp_buf: buffer to stage login response payload | |
139 | * @resp_dma_addr: login response payload buffer dma address | |
140 | * @resp_buf_size: login response paylod length | |
141 | * @resp_wr_ptr: pointer into login response buffer when next data is | |
142 | * to be written | |
143 | * @req_bd_tbl: iscsi login request payload BD table | |
144 | * @req_bd_dma: login request BD table dma address | |
145 | * @resp_bd_tbl: iscsi login response payload BD table | |
146 | * @resp_bd_dma: login request BD table dma address | |
147 | * | |
148 | * following structure defines buffer info for generic pdus such as iSCSI Login, | |
149 | * Logout and NOP | |
150 | */ | |
151 | struct generic_pdu_resc { | |
152 | char *req_buf; | |
153 | dma_addr_t req_dma_addr; | |
154 | u32 req_buf_size; | |
155 | char *req_wr_ptr; | |
156 | struct iscsi_hdr resp_hdr; | |
157 | char *resp_buf; | |
158 | dma_addr_t resp_dma_addr; | |
159 | u32 resp_buf_size; | |
160 | char *resp_wr_ptr; | |
161 | char *req_bd_tbl; | |
162 | dma_addr_t req_bd_dma; | |
163 | char *resp_bd_tbl; | |
164 | dma_addr_t resp_bd_dma; | |
165 | }; | |
166 | ||
167 | ||
168 | /** | |
169 | * struct bd_resc_page - tracks DMA'able memory allocated for BD tables | |
170 | * | |
171 | * @link: list head to link elements | |
172 | * @max_ptrs: maximun pointers that can be stored in this page | |
173 | * @num_valid: number of pointer valid in this page | |
174 | * @page: base addess for page pointer array | |
175 | * | |
176 | * structure to track DMA'able memory allocated for command BD tables | |
177 | */ | |
178 | struct bd_resc_page { | |
179 | struct list_head link; | |
180 | u32 max_ptrs; | |
181 | u32 num_valid; | |
182 | void *page[1]; | |
183 | }; | |
184 | ||
185 | ||
186 | /** | |
187 | * struct io_bdt - I/O buffer destricptor table | |
188 | * | |
189 | * @bd_tbl: BD table's virtual address | |
190 | * @bd_tbl_dma: BD table's dma address | |
191 | * @bd_valid: num valid BD entries | |
192 | * | |
193 | * IO BD table | |
194 | */ | |
195 | struct io_bdt { | |
196 | struct iscsi_bd *bd_tbl; | |
197 | dma_addr_t bd_tbl_dma; | |
198 | u16 bd_valid; | |
199 | }; | |
200 | ||
201 | ||
202 | /** | |
203 | * bnx2i_cmd - iscsi command structure | |
204 | * | |
205 | * @scsi_cmd: SCSI-ML task pointer corresponding to this iscsi cmd | |
206 | * @sg: SG list | |
207 | * @io_tbl: buffer descriptor (BD) table | |
208 | * @bd_tbl_dma: buffer descriptor (BD) table's dma address | |
209 | */ | |
210 | struct bnx2i_cmd { | |
211 | struct iscsi_hdr hdr; | |
212 | struct bnx2i_conn *conn; | |
213 | struct scsi_cmnd *scsi_cmd; | |
214 | struct scatterlist *sg; | |
215 | struct io_bdt io_tbl; | |
216 | dma_addr_t bd_tbl_dma; | |
217 | struct bnx2i_cmd_request req; | |
218 | }; | |
219 | ||
220 | ||
221 | /** | |
222 | * struct bnx2i_conn - iscsi connection structure | |
223 | * | |
224 | * @cls_conn: pointer to iscsi cls conn | |
225 | * @hba: adapter structure pointer | |
226 | * @iscsi_conn_cid: iscsi conn id | |
227 | * @fw_cid: firmware iscsi context id | |
228 | * @ep: endpoint structure pointer | |
229 | * @gen_pdu: login/nopout/logout pdu resources | |
230 | * @violation_notified: bit mask used to track iscsi error/warning messages | |
231 | * already printed out | |
232 | * | |
233 | * iSCSI connection structure | |
234 | */ | |
235 | struct bnx2i_conn { | |
236 | struct iscsi_cls_conn *cls_conn; | |
237 | struct bnx2i_hba *hba; | |
238 | struct completion cmd_cleanup_cmpl; | |
cf4e6363 MC |
239 | |
240 | u32 iscsi_conn_cid; | |
241 | #define BNX2I_CID_RESERVED 0x5AFF | |
242 | u32 fw_cid; | |
243 | ||
244 | struct timer_list poll_timer; | |
245 | /* | |
246 | * Queue Pair (QP) related structure elements. | |
247 | */ | |
248 | struct bnx2i_endpoint *ep; | |
249 | ||
250 | /* | |
251 | * Buffer for login negotiation process | |
252 | */ | |
253 | struct generic_pdu_resc gen_pdu; | |
254 | u64 violation_notified; | |
255 | }; | |
256 | ||
257 | ||
258 | ||
259 | /** | |
260 | * struct iscsi_cid_queue - Per adapter iscsi cid queue | |
261 | * | |
262 | * @cid_que_base: queue base memory | |
263 | * @cid_que: queue memory pointer | |
264 | * @cid_q_prod_idx: produce index | |
265 | * @cid_q_cons_idx: consumer index | |
266 | * @cid_q_max_idx: max index. used to detect wrap around condition | |
267 | * @cid_free_cnt: queue size | |
268 | * @conn_cid_tbl: iscsi cid to conn structure mapping table | |
269 | * | |
270 | * Per adapter iSCSI CID Queue | |
271 | */ | |
272 | struct iscsi_cid_queue { | |
273 | void *cid_que_base; | |
274 | u32 *cid_que; | |
275 | u32 cid_q_prod_idx; | |
276 | u32 cid_q_cons_idx; | |
277 | u32 cid_q_max_idx; | |
278 | u32 cid_free_cnt; | |
279 | struct bnx2i_conn **conn_cid_tbl; | |
280 | }; | |
281 | ||
282 | /** | |
283 | * struct bnx2i_hba - bnx2i adapter structure | |
284 | * | |
285 | * @link: list head to link elements | |
286 | * @cnic: pointer to cnic device | |
287 | * @pcidev: pointer to pci dev | |
288 | * @netdev: pointer to netdev structure | |
289 | * @regview: mapped PCI register space | |
290 | * @age: age, incremented by every recovery | |
291 | * @cnic_dev_type: cnic device type, 5706/5708/5709/57710 | |
292 | * @mail_queue_access: mailbox queue access mode, applicable to 5709 only | |
293 | * @reg_with_cnic: indicates whether the device is register with CNIC | |
294 | * @adapter_state: adapter state, UP, GOING_DOWN, LINK_DOWN | |
295 | * @mtu_supported: Ethernet MTU supported | |
296 | * @shost: scsi host pointer | |
297 | * @max_sqes: SQ size | |
298 | * @max_rqes: RQ size | |
299 | * @max_cqes: CQ size | |
300 | * @num_ccell: number of command cells per connection | |
301 | * @ofld_conns_active: active connection list | |
55e15c97 | 302 | * @eh_wait: wait queue for the endpoint to shutdown |
cf4e6363 MC |
303 | * @max_active_conns: max offload connections supported by this device |
304 | * @cid_que: iscsi cid queue | |
305 | * @ep_rdwr_lock: read / write lock to synchronize various ep lists | |
306 | * @ep_ofld_list: connection list for pending offload completion | |
46012e8b | 307 | * @ep_active_list: connection list for active offload endpoints |
cf4e6363 MC |
308 | * @ep_destroy_list: connection list for pending offload completion |
309 | * @mp_bd_tbl: BD table to be used with middle path requests | |
310 | * @mp_bd_dma: DMA address of 'mp_bd_tbl' memory buffer | |
311 | * @dummy_buffer: Dummy buffer to be used with zero length scsicmd reqs | |
312 | * @dummy_buf_dma: DMA address of 'dummy_buffer' memory buffer | |
313 | * @lock: lock to synchonize access to hba structure | |
55e15c97 | 314 | * @hba_shutdown_tmo: Timeout value to shutdown each connection |
e37d2c47 EW |
315 | * @conn_teardown_tmo: Timeout value to tear down each connection |
316 | * @conn_ctx_destroy_tmo: Timeout value to destroy context of each connection | |
cf4e6363 MC |
317 | * @pci_did: PCI device ID |
318 | * @pci_vid: PCI vendor ID | |
319 | * @pci_sdid: PCI subsystem device ID | |
320 | * @pci_svid: PCI subsystem vendor ID | |
321 | * @pci_func: PCI function number in system pci tree | |
322 | * @pci_devno: PCI device number in system pci tree | |
323 | * @num_wqe_sent: statistic counter, total wqe's sent | |
324 | * @num_cqe_rcvd: statistic counter, total cqe's received | |
325 | * @num_intr_claimed: statistic counter, total interrupts claimed | |
326 | * @link_changed_count: statistic counter, num of link change notifications | |
327 | * received | |
328 | * @ipaddr_changed_count: statistic counter, num times IP address changed while | |
329 | * at least one connection is offloaded | |
330 | * @num_sess_opened: statistic counter, total num sessions opened | |
331 | * @num_conn_opened: statistic counter, total num conns opened on this hba | |
332 | * @ctx_ccell_tasks: captures number of ccells and tasks supported by | |
333 | * currently offloaded connection, used to decode | |
334 | * context memory | |
335 | * | |
336 | * Adapter Data Structure | |
337 | */ | |
338 | struct bnx2i_hba { | |
339 | struct list_head link; | |
340 | struct cnic_dev *cnic; | |
341 | struct pci_dev *pcidev; | |
342 | struct net_device *netdev; | |
343 | void __iomem *regview; | |
344 | ||
345 | u32 age; | |
346 | unsigned long cnic_dev_type; | |
347 | #define BNX2I_NX2_DEV_5706 0x0 | |
348 | #define BNX2I_NX2_DEV_5708 0x1 | |
349 | #define BNX2I_NX2_DEV_5709 0x2 | |
350 | #define BNX2I_NX2_DEV_57710 0x3 | |
351 | u32 mail_queue_access; | |
352 | #define BNX2I_MQ_KERNEL_MODE 0x0 | |
353 | #define BNX2I_MQ_KERNEL_BYPASS_MODE 0x1 | |
354 | #define BNX2I_MQ_BIN_MODE 0x2 | |
355 | unsigned long reg_with_cnic; | |
356 | #define BNX2I_CNIC_REGISTERED 1 | |
357 | ||
358 | unsigned long adapter_state; | |
359 | #define ADAPTER_STATE_UP 0 | |
360 | #define ADAPTER_STATE_GOING_DOWN 1 | |
361 | #define ADAPTER_STATE_LINK_DOWN 2 | |
362 | #define ADAPTER_STATE_INIT_FAILED 31 | |
363 | unsigned int mtu_supported; | |
45188354 | 364 | #define BNX2I_MAX_MTU_SUPPORTED 9000 |
cf4e6363 MC |
365 | |
366 | struct Scsi_Host *shost; | |
367 | ||
368 | u32 max_sqes; | |
369 | u32 max_rqes; | |
370 | u32 max_cqes; | |
371 | u32 num_ccell; | |
372 | ||
373 | int ofld_conns_active; | |
490475a9 | 374 | wait_queue_head_t eh_wait; |
cf4e6363 MC |
375 | |
376 | int max_active_conns; | |
377 | struct iscsi_cid_queue cid_que; | |
378 | ||
379 | rwlock_t ep_rdwr_lock; | |
380 | struct list_head ep_ofld_list; | |
46012e8b | 381 | struct list_head ep_active_list; |
cf4e6363 MC |
382 | struct list_head ep_destroy_list; |
383 | ||
384 | /* | |
385 | * BD table to be used with MP (Middle Path requests. | |
386 | */ | |
387 | char *mp_bd_tbl; | |
388 | dma_addr_t mp_bd_dma; | |
389 | char *dummy_buffer; | |
390 | dma_addr_t dummy_buf_dma; | |
391 | ||
392 | spinlock_t lock; /* protects hba structure access */ | |
393 | struct mutex net_dev_lock;/* sync net device access */ | |
394 | ||
490475a9 | 395 | int hba_shutdown_tmo; |
e37d2c47 EW |
396 | int conn_teardown_tmo; |
397 | int conn_ctx_destroy_tmo; | |
cf4e6363 MC |
398 | /* |
399 | * PCI related info. | |
400 | */ | |
401 | u16 pci_did; | |
402 | u16 pci_vid; | |
403 | u16 pci_sdid; | |
404 | u16 pci_svid; | |
405 | u16 pci_func; | |
406 | u16 pci_devno; | |
407 | ||
408 | /* | |
409 | * Following are a bunch of statistics useful during development | |
410 | * and later stage for score boarding. | |
411 | */ | |
412 | u32 num_wqe_sent; | |
413 | u32 num_cqe_rcvd; | |
414 | u32 num_intr_claimed; | |
415 | u32 link_changed_count; | |
416 | u32 ipaddr_changed_count; | |
417 | u32 num_sess_opened; | |
418 | u32 num_conn_opened; | |
419 | unsigned int ctx_ccell_tasks; | |
420 | }; | |
421 | ||
422 | ||
423 | /******************************************************************************* | |
424 | * QP [ SQ / RQ / CQ ] info. | |
425 | ******************************************************************************/ | |
426 | ||
427 | /* | |
428 | * SQ/RQ/CQ generic structure definition | |
429 | */ | |
430 | struct sqe { | |
431 | u8 sqe_byte[BNX2I_SQ_WQE_SIZE]; | |
432 | }; | |
433 | ||
434 | struct rqe { | |
435 | u8 rqe_byte[BNX2I_RQ_WQE_SIZE]; | |
436 | }; | |
437 | ||
438 | struct cqe { | |
439 | u8 cqe_byte[BNX2I_CQE_SIZE]; | |
440 | }; | |
441 | ||
442 | ||
443 | enum { | |
444 | #if defined(__LITTLE_ENDIAN) | |
445 | CNIC_EVENT_COAL_INDEX = 0x0, | |
446 | CNIC_SEND_DOORBELL = 0x4, | |
447 | CNIC_EVENT_CQ_ARM = 0x7, | |
448 | CNIC_RECV_DOORBELL = 0x8 | |
449 | #elif defined(__BIG_ENDIAN) | |
450 | CNIC_EVENT_COAL_INDEX = 0x2, | |
451 | CNIC_SEND_DOORBELL = 0x6, | |
452 | CNIC_EVENT_CQ_ARM = 0x4, | |
453 | CNIC_RECV_DOORBELL = 0xa | |
454 | #endif | |
455 | }; | |
456 | ||
457 | ||
458 | /* | |
459 | * CQ DB | |
460 | */ | |
461 | struct bnx2x_iscsi_cq_pend_cmpl { | |
462 | /* CQ producer, updated by Ustorm */ | |
463 | u16 ustrom_prod; | |
464 | /* CQ pending completion counter */ | |
465 | u16 pend_cntr; | |
466 | }; | |
467 | ||
468 | ||
469 | struct bnx2i_5771x_cq_db { | |
470 | struct bnx2x_iscsi_cq_pend_cmpl qp_pend_cmpl[BNX2X_MAX_CQS]; | |
471 | /* CQ pending completion ITT array */ | |
472 | u16 itt[BNX2X_MAX_CQS]; | |
473 | /* Cstorm CQ sequence to notify array, updated by driver */; | |
474 | u16 sqn[BNX2X_MAX_CQS]; | |
475 | u32 reserved[4] /* 16 byte allignment */; | |
476 | }; | |
477 | ||
478 | ||
479 | struct bnx2i_5771x_sq_rq_db { | |
480 | u16 prod_idx; | |
481 | u8 reserved0[14]; /* Pad structure size to 16 bytes */ | |
482 | }; | |
483 | ||
484 | ||
485 | struct bnx2i_5771x_dbell_hdr { | |
486 | u8 header; | |
487 | /* 1 for rx doorbell, 0 for tx doorbell */ | |
488 | #define B577XX_DOORBELL_HDR_RX (0x1<<0) | |
489 | #define B577XX_DOORBELL_HDR_RX_SHIFT 0 | |
490 | /* 0 for normal doorbell, 1 for advertise wnd doorbell */ | |
491 | #define B577XX_DOORBELL_HDR_DB_TYPE (0x1<<1) | |
492 | #define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT 1 | |
493 | /* rdma tx only: DPM transaction size specifier (64/128/256/512B) */ | |
494 | #define B577XX_DOORBELL_HDR_DPM_SIZE (0x3<<2) | |
495 | #define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT 2 | |
496 | /* connection type */ | |
497 | #define B577XX_DOORBELL_HDR_CONN_TYPE (0xF<<4) | |
498 | #define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT 4 | |
499 | }; | |
500 | ||
501 | struct bnx2i_5771x_dbell { | |
502 | struct bnx2i_5771x_dbell_hdr dbell; | |
503 | u8 pad[3]; | |
504 | ||
505 | }; | |
506 | ||
507 | /** | |
508 | * struct qp_info - QP (share queue region) atrributes structure | |
509 | * | |
510 | * @ctx_base: ioremapped pci register base to access doorbell register | |
511 | * pertaining to this offloaded connection | |
512 | * @sq_virt: virtual address of send queue (SQ) region | |
513 | * @sq_phys: DMA address of SQ memory region | |
514 | * @sq_mem_size: SQ size | |
515 | * @sq_prod_qe: SQ producer entry pointer | |
516 | * @sq_cons_qe: SQ consumer entry pointer | |
517 | * @sq_first_qe: virtaul address of first entry in SQ | |
518 | * @sq_last_qe: virtaul address of last entry in SQ | |
519 | * @sq_prod_idx: SQ producer index | |
520 | * @sq_cons_idx: SQ consumer index | |
521 | * @sqe_left: number sq entry left | |
522 | * @sq_pgtbl_virt: page table describing buffer consituting SQ region | |
523 | * @sq_pgtbl_phys: dma address of 'sq_pgtbl_virt' | |
524 | * @sq_pgtbl_size: SQ page table size | |
525 | * @cq_virt: virtual address of completion queue (CQ) region | |
526 | * @cq_phys: DMA address of RQ memory region | |
527 | * @cq_mem_size: CQ size | |
528 | * @cq_prod_qe: CQ producer entry pointer | |
529 | * @cq_cons_qe: CQ consumer entry pointer | |
530 | * @cq_first_qe: virtaul address of first entry in CQ | |
531 | * @cq_last_qe: virtaul address of last entry in CQ | |
532 | * @cq_prod_idx: CQ producer index | |
533 | * @cq_cons_idx: CQ consumer index | |
534 | * @cqe_left: number cq entry left | |
535 | * @cqe_size: size of each CQ entry | |
536 | * @cqe_exp_seq_sn: next expected CQE sequence number | |
537 | * @cq_pgtbl_virt: page table describing buffer consituting CQ region | |
538 | * @cq_pgtbl_phys: dma address of 'cq_pgtbl_virt' | |
539 | * @cq_pgtbl_size: CQ page table size | |
540 | * @rq_virt: virtual address of receive queue (RQ) region | |
541 | * @rq_phys: DMA address of RQ memory region | |
542 | * @rq_mem_size: RQ size | |
543 | * @rq_prod_qe: RQ producer entry pointer | |
544 | * @rq_cons_qe: RQ consumer entry pointer | |
545 | * @rq_first_qe: virtaul address of first entry in RQ | |
546 | * @rq_last_qe: virtaul address of last entry in RQ | |
547 | * @rq_prod_idx: RQ producer index | |
548 | * @rq_cons_idx: RQ consumer index | |
549 | * @rqe_left: number rq entry left | |
550 | * @rq_pgtbl_virt: page table describing buffer consituting RQ region | |
551 | * @rq_pgtbl_phys: dma address of 'rq_pgtbl_virt' | |
552 | * @rq_pgtbl_size: RQ page table size | |
553 | * | |
554 | * queue pair (QP) is a per connection shared data structure which is used | |
555 | * to send work requests (SQ), receive completion notifications (CQ) | |
556 | * and receive asynchoronous / scsi sense info (RQ). 'qp_info' structure | |
557 | * below holds queue memory, consumer/producer indexes and page table | |
558 | * information | |
559 | */ | |
560 | struct qp_info { | |
561 | void __iomem *ctx_base; | |
562 | #define DPM_TRIGER_TYPE 0x40 | |
563 | ||
564 | #define BNX2I_570x_QUE_DB_SIZE 0 | |
565 | #define BNX2I_5771x_QUE_DB_SIZE 16 | |
566 | struct sqe *sq_virt; | |
567 | dma_addr_t sq_phys; | |
568 | u32 sq_mem_size; | |
569 | ||
570 | struct sqe *sq_prod_qe; | |
571 | struct sqe *sq_cons_qe; | |
572 | struct sqe *sq_first_qe; | |
573 | struct sqe *sq_last_qe; | |
574 | u16 sq_prod_idx; | |
575 | u16 sq_cons_idx; | |
576 | u32 sqe_left; | |
577 | ||
578 | void *sq_pgtbl_virt; | |
579 | dma_addr_t sq_pgtbl_phys; | |
580 | u32 sq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */ | |
581 | ||
582 | struct cqe *cq_virt; | |
583 | dma_addr_t cq_phys; | |
584 | u32 cq_mem_size; | |
585 | ||
586 | struct cqe *cq_prod_qe; | |
587 | struct cqe *cq_cons_qe; | |
588 | struct cqe *cq_first_qe; | |
589 | struct cqe *cq_last_qe; | |
590 | u16 cq_prod_idx; | |
591 | u16 cq_cons_idx; | |
592 | u32 cqe_left; | |
593 | u32 cqe_size; | |
594 | u32 cqe_exp_seq_sn; | |
595 | ||
596 | void *cq_pgtbl_virt; | |
597 | dma_addr_t cq_pgtbl_phys; | |
598 | u32 cq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */ | |
599 | ||
600 | struct rqe *rq_virt; | |
601 | dma_addr_t rq_phys; | |
602 | u32 rq_mem_size; | |
603 | ||
604 | struct rqe *rq_prod_qe; | |
605 | struct rqe *rq_cons_qe; | |
606 | struct rqe *rq_first_qe; | |
607 | struct rqe *rq_last_qe; | |
608 | u16 rq_prod_idx; | |
609 | u16 rq_cons_idx; | |
610 | u32 rqe_left; | |
611 | ||
612 | void *rq_pgtbl_virt; | |
613 | dma_addr_t rq_pgtbl_phys; | |
614 | u32 rq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */ | |
615 | }; | |
616 | ||
617 | ||
618 | ||
619 | /* | |
620 | * CID handles | |
621 | */ | |
622 | struct ep_handles { | |
623 | u32 fw_cid; | |
624 | u32 drv_iscsi_cid; | |
625 | u16 pg_cid; | |
626 | u16 rsvd; | |
627 | }; | |
628 | ||
629 | ||
630 | enum { | |
631 | EP_STATE_IDLE = 0x0, | |
632 | EP_STATE_PG_OFLD_START = 0x1, | |
633 | EP_STATE_PG_OFLD_COMPL = 0x2, | |
634 | EP_STATE_OFLD_START = 0x4, | |
635 | EP_STATE_OFLD_COMPL = 0x8, | |
636 | EP_STATE_CONNECT_START = 0x10, | |
637 | EP_STATE_CONNECT_COMPL = 0x20, | |
638 | EP_STATE_ULP_UPDATE_START = 0x40, | |
639 | EP_STATE_ULP_UPDATE_COMPL = 0x80, | |
640 | EP_STATE_DISCONN_START = 0x100, | |
641 | EP_STATE_DISCONN_COMPL = 0x200, | |
642 | EP_STATE_CLEANUP_START = 0x400, | |
643 | EP_STATE_CLEANUP_CMPL = 0x800, | |
644 | EP_STATE_TCP_FIN_RCVD = 0x1000, | |
645 | EP_STATE_TCP_RST_RCVD = 0x2000, | |
2eefb20d EW |
646 | EP_STATE_LOGOUT_SENT = 0x4000, |
647 | EP_STATE_LOGOUT_RESP_RCVD = 0x8000, | |
cf4e6363 MC |
648 | EP_STATE_PG_OFLD_FAILED = 0x1000000, |
649 | EP_STATE_ULP_UPDATE_FAILED = 0x2000000, | |
650 | EP_STATE_CLEANUP_FAILED = 0x4000000, | |
651 | EP_STATE_OFLD_FAILED = 0x8000000, | |
652 | EP_STATE_CONNECT_FAILED = 0x10000000, | |
653 | EP_STATE_DISCONN_TIMEDOUT = 0x20000000, | |
bee34877 | 654 | EP_STATE_OFLD_FAILED_CID_BUSY = 0x80000000, |
cf4e6363 MC |
655 | }; |
656 | ||
657 | /** | |
658 | * struct bnx2i_endpoint - representation of tcp connection in NX2 world | |
659 | * | |
660 | * @link: list head to link elements | |
661 | * @hba: adapter to which this connection belongs | |
662 | * @conn: iscsi connection this EP is linked to | |
46012e8b | 663 | * @cls_ep: associated iSCSI endpoint pointer |
cf4e6363 MC |
664 | * @sess: iscsi session this EP is linked to |
665 | * @cm_sk: cnic sock struct | |
666 | * @hba_age: age to detect if 'iscsid' issues ep_disconnect() | |
667 | * after HBA reset is completed by bnx2i/cnic/bnx2 | |
668 | * modules | |
669 | * @state: tracks offload connection state machine | |
9ae58e14 EW |
670 | * @timestamp: tracks the start time when the ep begins to connect |
671 | * @num_active_cmds: tracks the number of outstanding commands for this ep | |
672 | * @ec_shift: the amount of shift as part of the event coal calc | |
cf4e6363 MC |
673 | * @qp: QP information |
674 | * @ids: contains chip allocated *context id* & driver assigned | |
675 | * *iscsi cid* | |
676 | * @ofld_timer: offload timer to detect timeout | |
677 | * @ofld_wait: wait queue | |
678 | * | |
679 | * Endpoint Structure - equivalent of tcp socket structure | |
680 | */ | |
681 | struct bnx2i_endpoint { | |
682 | struct list_head link; | |
683 | struct bnx2i_hba *hba; | |
684 | struct bnx2i_conn *conn; | |
46012e8b | 685 | struct iscsi_endpoint *cls_ep; |
cf4e6363 MC |
686 | struct cnic_sock *cm_sk; |
687 | u32 hba_age; | |
688 | u32 state; | |
689 | unsigned long timestamp; | |
690 | int num_active_cmds; | |
9ae58e14 | 691 | u32 ec_shift; |
cf4e6363 MC |
692 | |
693 | struct qp_info qp; | |
694 | struct ep_handles ids; | |
695 | #define ep_iscsi_cid ids.drv_iscsi_cid | |
696 | #define ep_cid ids.fw_cid | |
697 | #define ep_pg_cid ids.pg_cid | |
698 | struct timer_list ofld_timer; | |
699 | wait_queue_head_t ofld_wait; | |
700 | }; | |
701 | ||
702 | ||
703 | ||
704 | /* Global variables */ | |
705 | extern unsigned int error_mask1, error_mask2; | |
706 | extern u64 iscsi_error_mask; | |
707 | extern unsigned int en_tcp_dack; | |
708 | extern unsigned int event_coal_div; | |
8776193b | 709 | extern unsigned int event_coal_min; |
cf4e6363 MC |
710 | |
711 | extern struct scsi_transport_template *bnx2i_scsi_xport_template; | |
712 | extern struct iscsi_transport bnx2i_iscsi_transport; | |
713 | extern struct cnic_ulp_ops bnx2i_cnic_cb; | |
714 | ||
715 | extern unsigned int sq_size; | |
716 | extern unsigned int rq_size; | |
717 | ||
718 | extern struct device_attribute *bnx2i_dev_attributes[]; | |
719 | ||
720 | ||
721 | ||
722 | /* | |
723 | * Function Prototypes | |
724 | */ | |
725 | extern void bnx2i_identify_device(struct bnx2i_hba *hba); | |
cf4e6363 MC |
726 | |
727 | extern void bnx2i_ulp_init(struct cnic_dev *dev); | |
728 | extern void bnx2i_ulp_exit(struct cnic_dev *dev); | |
729 | extern void bnx2i_start(void *handle); | |
730 | extern void bnx2i_stop(void *handle); | |
cf4e6363 MC |
731 | extern struct bnx2i_hba *get_adapter_list_head(void); |
732 | ||
733 | struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba, | |
734 | u16 iscsi_cid); | |
735 | ||
736 | int bnx2i_alloc_ep_pool(void); | |
737 | void bnx2i_release_ep_pool(void); | |
738 | struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba); | |
739 | struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba); | |
740 | ||
741 | struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic); | |
742 | ||
743 | struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic); | |
744 | void bnx2i_free_hba(struct bnx2i_hba *hba); | |
745 | ||
746 | void bnx2i_get_rq_buf(struct bnx2i_conn *conn, char *ptr, int len); | |
747 | void bnx2i_put_rq_buf(struct bnx2i_conn *conn, int count); | |
748 | ||
749 | void bnx2i_iscsi_unmap_sg_list(struct bnx2i_cmd *cmd); | |
750 | ||
751 | void bnx2i_drop_session(struct iscsi_cls_session *session); | |
752 | ||
753 | extern int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba); | |
754 | extern int bnx2i_send_iscsi_login(struct bnx2i_conn *conn, | |
755 | struct iscsi_task *mtask); | |
756 | extern int bnx2i_send_iscsi_tmf(struct bnx2i_conn *conn, | |
757 | struct iscsi_task *mtask); | |
09813ba5 EW |
758 | extern int bnx2i_send_iscsi_text(struct bnx2i_conn *conn, |
759 | struct iscsi_task *mtask); | |
cf4e6363 MC |
760 | extern int bnx2i_send_iscsi_scsicmd(struct bnx2i_conn *conn, |
761 | struct bnx2i_cmd *cmnd); | |
762 | extern int bnx2i_send_iscsi_nopout(struct bnx2i_conn *conn, | |
39304072 | 763 | struct iscsi_task *mtask, |
cf4e6363 MC |
764 | char *datap, int data_len, int unsol); |
765 | extern int bnx2i_send_iscsi_logout(struct bnx2i_conn *conn, | |
766 | struct iscsi_task *mtask); | |
767 | extern void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba, | |
768 | struct bnx2i_cmd *cmd); | |
bee34877 | 769 | extern int bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba, |
cf4e6363 | 770 | struct bnx2i_endpoint *ep); |
bee34877 EW |
771 | extern void bnx2i_update_iscsi_conn(struct iscsi_conn *conn); |
772 | extern int bnx2i_send_conn_destroy(struct bnx2i_hba *hba, | |
773 | struct bnx2i_endpoint *ep); | |
cf4e6363 MC |
774 | |
775 | extern int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba, | |
776 | struct bnx2i_endpoint *ep); | |
777 | extern void bnx2i_free_qp_resc(struct bnx2i_hba *hba, | |
778 | struct bnx2i_endpoint *ep); | |
779 | extern void bnx2i_ep_ofld_timer(unsigned long data); | |
780 | extern struct bnx2i_endpoint *bnx2i_find_ep_in_ofld_list( | |
781 | struct bnx2i_hba *hba, u32 iscsi_cid); | |
782 | extern struct bnx2i_endpoint *bnx2i_find_ep_in_destroy_list( | |
783 | struct bnx2i_hba *hba, u32 iscsi_cid); | |
784 | ||
785 | extern int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep); | |
786 | extern void bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action); | |
787 | ||
55e15c97 EW |
788 | extern int bnx2i_hw_ep_disconnect(struct bnx2i_endpoint *bnx2i_ep); |
789 | ||
cf4e6363 MC |
790 | /* Debug related function prototypes */ |
791 | extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn); | |
792 | extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn); | |
793 | extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn); | |
794 | extern void bnx2i_print_recv_state(struct bnx2i_conn *conn); | |
795 | ||
796 | #endif |