projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[SCSI] bfa: Added support for flash configuration
[linux-2.6-block.git] / drivers / scsi / bfa / bfi.h
CommitLineData
a36c61f9
KG		 1/*
2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
3 * All rights reserved
4 * www.brocade.com
5 *
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#ifndef __BFI_H__
19#define __BFI_H__
20
21#include "bfa_defs.h"
22#include "bfa_defs_svc.h"
23
24#pragma pack(1)
25
4507025d
KG		 26/* Per dma segment max size */
27#define BFI_MEM_DMA_SEG_SZ (131072)
28
29/* Get number of dma segments required */
30#define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz) \
31 ((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) & \
32 ~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ))
33
34/* Get num dma reqs - that fit in a segment */
35#define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz))
36
37/* Get segment num from tag */
38#define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz))
39
40/* Get dma req offset in a segment */
41#define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz) \
42 ((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz)))
43
acdc79a6 44/*
a36c61f9
KG		 45 * BFI FW image type
46 */
47#define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
48#define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
a36c61f9 49
acdc79a6 50/*
a36c61f9
KG		 51 * Msg header common to all msgs
52 */
53struct bfi_mhdr_s {
54 u8 msg_class; /* @ref bfi_mclass_t */
55 u8 msg_id; /* msg opcode with in the class */
56 union {
57 struct {
d37779f8 58 u8 qid;
3fd45980 59 u8 fn_lpu; /* msg destination */
a36c61f9
KG		 60 } h2i;
61 u16 i2htok; /* token in msgs to host */
62 } mtag;
63};
64
3fd45980
KG		 65#define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
66#define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
d37779f8 67
3fd45980 68#define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
a36c61f9
KG		 69 (_mh).msg_class = (_mc); \
70 (_mh).msg_id = (_op); \
3fd45980 71 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
a36c61f9
KG		 72} while (0)
73
74#define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
75 (_mh).msg_class = (_mc); \
76 (_mh).msg_id = (_op); \
77 (_mh).mtag.i2htok = (_i2htok); \
78} while (0)
79
80/*
81 * Message opcodes: 0-127 to firmware, 128-255 to host
82 */
83#define BFI_I2H_OPCODE_BASE 128
84#define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
85
acdc79a6 86/*
a36c61f9
KG		 87 ****************************************************************************
88 *
89 * Scatter Gather Element and Page definition
90 *
91 ****************************************************************************
92 */
93
94#define BFI_SGE_INLINE 1
95#define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
96
acdc79a6 97/*
a36c61f9
KG		 98 * SG Flags
99 */
100enum {
101 BFI_SGE_DATA = 0, /* data address, not last */
102 BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
103 BFI_SGE_DATA_LAST = 3, /* data address, last */
104 BFI_SGE_LINK = 2, /* link address */
105 BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
106};
107
acdc79a6 108/*
a36c61f9
KG		 109 * DMA addresses
110 */
111union bfi_addr_u {
112 struct {
50444a34
M		 113 __be32 addr_lo;
114 __be32 addr_hi;
a36c61f9
KG		 115 } a32;
116};
117
acdc79a6 118/*
85ce928d 119 * Scatter Gather Element used for fast-path IO requests
a36c61f9
KG		 120 */
121struct bfi_sge_s {
f16a1750 122#ifdef __BIG_ENDIAN
a36c61f9
KG		 123 u32 flags:2,
124 rsvd:2,
125 sg_len:28;
126#else
127 u32 sg_len:28,
128 rsvd:2,
129 flags:2;
130#endif
131 union bfi_addr_u sga;
132};
133
85ce928d
KG		 134/**
135 * Generic DMA addr-len pair.
136 */
137struct bfi_alen_s {
138 union bfi_addr_u al_addr; /* DMA addr of buffer */
139 u32 al_len; /* length of buffer */
140};
141
acdc79a6 142/*
a36c61f9
KG		 143 * Scatter Gather Page
144 */
145#define BFI_SGPG_DATA_SGES 7
146#define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
147#define BFI_SGPG_RSVD_WD_LEN 8
148struct bfi_sgpg_s {
149 struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
150 u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
151};
152
4507025d
KG		 153/* FCP module definitions */
154#define BFI_IO_MAX (2000)
155#define BFI_IOIM_SNSLEN (256)
156#define BFI_IOIM_SNSBUF_SEGS \
157 BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN)
158
a36c61f9
KG		 159/*
160 * Large Message structure - 128 Bytes size Msgs
161 */
162#define BFI_LMSG_SZ 128
163#define BFI_LMSG_PL_WSZ \
164 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
165
166struct bfi_msg_s {
167 struct bfi_mhdr_s mhdr;
168 u32 pl[BFI_LMSG_PL_WSZ];
169};
170
acdc79a6 171/*
a36c61f9
KG		 172 * Mailbox message structure
173 */
174#define BFI_MBMSG_SZ 7
175struct bfi_mbmsg_s {
176 struct bfi_mhdr_s mh;
177 u32 pl[BFI_MBMSG_SZ];
178};
179
d37779f8
KG		 180/*
181 * Supported PCI function class codes (personality)
182 */
183enum bfi_pcifn_class {
184 BFI_PCIFN_CLASS_FC = 0x0c04,
185 BFI_PCIFN_CLASS_ETH = 0x0200,
186};
187
acdc79a6 188/*
a36c61f9
KG		 189 * Message Classes
190 */
191enum bfi_mclass {
192 BFI_MC_IOC = 1, /* IO Controller (IOC) */
5a54b1d5 193 BFI_MC_FLASH = 3, /* Flash message class */
148d6103 194 BFI_MC_CEE = 4, /* CEE */
a36c61f9
KG		 195 BFI_MC_FCPORT = 5, /* FC port */
196 BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
1a4d8e1b 197 BFI_MC_ABLK = 7, /* ASIC block configuration */
a36c61f9
KG		 198 BFI_MC_UF = 8, /* Unsolicited frame receive */
199 BFI_MC_FCXP = 9, /* FC Transport */
200 BFI_MC_LPS = 10, /* lport fc login services */
201 BFI_MC_RPORT = 11, /* Remote port */
dd5aaf45 202 BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */
a36c61f9
KG		 203 BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
204 BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
205 BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
206 BFI_MC_IOIM = 16, /* IO (Initiator mode) */
207 BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
208 BFI_MC_TSKIM = 18, /* Initiator Task management */
209 BFI_MC_PORT = 21, /* Physical port */
51e569aa 210 BFI_MC_SFP = 22, /* SFP module */
a36c61f9
KG		 211 BFI_MC_MAX = 32
212};
213
214#define BFI_IOC_MAX_CQS 4
215#define BFI_IOC_MAX_CQS_ASIC 8
216#define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
217
acdc79a6 218/*
a36c61f9
KG		 219 *----------------------------------------------------------------------
220 * IOC
221 *----------------------------------------------------------------------
222 */
223
11189208
KG		 224/*
225 * Different asic generations
226 */
227enum bfi_asic_gen {
228 BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */
229 BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */
230 BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */
231};
232
233enum bfi_asic_mode {
234 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
235 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
236 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
237 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
238};
239
a36c61f9
KG		 240enum bfi_ioc_h2i_msgs {
241 BFI_IOC_H2I_ENABLE_REQ = 1,
242 BFI_IOC_H2I_DISABLE_REQ = 2,
243 BFI_IOC_H2I_GETATTR_REQ = 3,
244 BFI_IOC_H2I_DBG_SYNC = 4,
245 BFI_IOC_H2I_DBG_DUMP = 5,
246};
247
248enum bfi_ioc_i2h_msgs {
249 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
250 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
251 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
775c7742 252 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
a714134a 253 BFI_IOC_I2H_ACQ_ADDR_REPLY = BFA_I2HM(5),
a36c61f9
KG		 254};
255
acdc79a6 256/*
a36c61f9
KG		 257 * BFI_IOC_H2I_GETATTR_REQ message
258 */
259struct bfi_ioc_getattr_req_s {
260 struct bfi_mhdr_s mh;
261 union bfi_addr_u attr_addr;
262};
263
264struct bfi_ioc_attr_s {
265 wwn_t mfg_pwwn; /* Mfg port wwn */
266 wwn_t mfg_nwwn; /* Mfg node wwn */
267 mac_t mfg_mac; /* Mfg mac */
5a0adaed
KG		 268 u8 port_mode; /* bfi_port_mode */
269 u8 rsvd_a;
a36c61f9
KG		 270 wwn_t pwwn;
271 wwn_t nwwn;
272 mac_t mac; /* PBC or Mfg mac */
273 u16 rsvd_b;
274 mac_t fcoe_mac;
275 u16 rsvd_c;
276 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
277 u8 pcie_gen;
278 u8 pcie_lanes_orig;
279 u8 pcie_lanes;
280 u8 rx_bbcredit; /* receive buffer credits */
281 u32 adapter_prop; /* adapter properties */
282 u16 maxfrsize; /* max receive frame size */
283 char asic_rev;
10a07379 284 u8 rsvd_d;
a36c61f9
KG		 285 char fw_version[BFA_VERSION_LEN];
286 char optrom_version[BFA_VERSION_LEN];
287 struct bfa_mfg_vpd_s vpd;
288 u32 card_type; /* card type */
289};
290
acdc79a6 291/*
a36c61f9
KG		 292 * BFI_IOC_I2H_GETATTR_REPLY message
293 */
294struct bfi_ioc_getattr_reply_s {
295 struct bfi_mhdr_s mh; /* Common msg header */
296 u8 status; /* cfg reply status */
297 u8 rsvd[3];
298};
299
acdc79a6 300/*
a36c61f9
KG		 301 * Firmware memory page offsets
302 */
303#define BFI_IOC_SMEM_PG0_CB (0x40)
304#define BFI_IOC_SMEM_PG0_CT (0x180)
305
acdc79a6 306/*
a36c61f9
KG		 307 * Firmware statistic offset
308 */
309#define BFI_IOC_FWSTATS_OFF (0x6B40)
310#define BFI_IOC_FWSTATS_SZ (4096)
311
acdc79a6 312/*
a36c61f9
KG		 313 * Firmware trace offset
314 */
315#define BFI_IOC_TRC_OFF (0x4b00)
316#define BFI_IOC_TRC_ENTS 256
317
318#define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
319#define BFI_IOC_MD5SUM_SZ 4
320struct bfi_ioc_image_hdr_s {
11189208
KG		 321 u32 signature; /* constant signature */
322 u8 asic_gen; /* asic generation */
323 u8 asic_mode;
324 u8 port0_mode; /* device mode for port 0 */
325 u8 port1_mode; /* device mode for port 1 */
326 u32 exec; /* exec vector */
327 u32 bootenv; /* fimware boot env */
a36c61f9
KG		 328 u32 rsvd_b[4];
329 u32 md5sum[BFI_IOC_MD5SUM_SZ];
330};
331
11189208
KG		 332#define BFI_FWBOOT_DEVMODE_OFF 4
333#define BFI_FWBOOT_TYPE_OFF 8
334#define BFI_FWBOOT_ENV_OFF 12
335#define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
336 (((u32)(__asic_gen)) << 24 | \
337 ((u32)(__asic_mode)) << 16 | \
338 ((u32)(__p0_mode)) << 8 | \
339 ((u32)(__p1_mode)))
340
341#define BFI_FWBOOT_TYPE_NORMAL 0
342#define BFI_FWBOOT_TYPE_MEMTEST 1
343#define BFI_FWBOOT_ENV_OS 0
344
345enum bfi_port_mode {
346 BFI_PORT_MODE_FC = 1,
347 BFI_PORT_MODE_ETH = 2,
348};
349
a36c61f9
KG		 350struct bfi_ioc_hbeat_s {
351 struct bfi_mhdr_s mh; /* common msg header */
352 u32 hb_count; /* current heart beat count */
353};
354
acdc79a6 355/*
a36c61f9
KG		 356 * IOC hardware/firmware state
357 */
358enum bfi_ioc_state {
359 BFI_IOC_UNINIT = 0, /* not initialized */
360 BFI_IOC_INITING = 1, /* h/w is being initialized */
361 BFI_IOC_HWINIT = 2, /* h/w is initialized */
362 BFI_IOC_CFG = 3, /* IOC configuration in progress */
363 BFI_IOC_OP = 4, /* IOC is operational */
364 BFI_IOC_DISABLING = 5, /* IOC is being disabled */
365 BFI_IOC_DISABLED = 6, /* IOC is disabled */
366 BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
367 BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
368 BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
369};
370
371#define BFI_IOC_ENDIAN_SIG 0x12345678
372
373enum {
374 BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
375 BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
376 BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
377 BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
378 BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
379 BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
380 BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
381 BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
382 BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
383 BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
384};
385
386#define BFI_ADAPTER_GETP(__prop, __adap_prop) \
387 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
388 BFI_ADAPTER_ ## __prop ## _SH)
389#define BFI_ADAPTER_SETP(__prop, __val) \
390 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
391#define BFI_ADAPTER_IS_PROTO(__adap_type) \
392 ((__adap_type) & BFI_ADAPTER_PROTO)
393#define BFI_ADAPTER_IS_TTV(__adap_type) \
394 ((__adap_type) & BFI_ADAPTER_TTV)
395#define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
396 ((__adap_type) & BFI_ADAPTER_UNSUPP)
397#define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
398 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
399 BFI_ADAPTER_UNSUPP))
400
acdc79a6 401/*
a36c61f9
KG		 402 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
403 */
404struct bfi_ioc_ctrl_req_s {
405 struct bfi_mhdr_s mh;
d37779f8
KG		 406 u16 clscode;
407 u16 rsvd;
a36c61f9
KG		 408 u32 tv_sec;
409};
410#define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
411#define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
412
acdc79a6 413/*
a36c61f9
KG		 414 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
415 */
416struct bfi_ioc_ctrl_reply_s {
417 struct bfi_mhdr_s mh; /* Common msg header */
418 u8 status; /* enable/disable status */
1a4d8e1b
KG		 419 u8 port_mode; /* bfa_mode_s */
420 u8 cap_bm; /* capability bit mask */
421 u8 rsvd;
a36c61f9
KG		 422};
423#define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
424#define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
425
426#define BFI_IOC_MSGSZ 8
acdc79a6 427/*
a36c61f9
KG		 428 * H2I Messages
429 */
430union bfi_ioc_h2i_msg_u {
431 struct bfi_mhdr_s mh;
432 struct bfi_ioc_ctrl_req_s enable_req;
433 struct bfi_ioc_ctrl_req_s disable_req;
434 struct bfi_ioc_getattr_req_s getattr_req;
435 u32 mboxmsg[BFI_IOC_MSGSZ];
436};
437
acdc79a6 438/*
a36c61f9
KG		 439 * I2H Messages
440 */
441union bfi_ioc_i2h_msg_u {
442 struct bfi_mhdr_s mh;
1a4d8e1b 443 struct bfi_ioc_ctrl_reply_s fw_event;
a36c61f9
KG		 444 u32 mboxmsg[BFI_IOC_MSGSZ];
445};
446
447
acdc79a6 448/*
a36c61f9
KG		 449 *----------------------------------------------------------------------
450 * PBC
451 *----------------------------------------------------------------------
452 */
453
454#define BFI_PBC_MAX_BLUNS 8
455#define BFI_PBC_MAX_VPORTS 16
43ffdf4d 456#define BFI_PBC_PORT_DISABLED 2
a36c61f9 457
acdc79a6 458/*
a36c61f9
KG		 459 * PBC boot lun configuration
460 */
461struct bfi_pbc_blun_s {
462 wwn_t tgt_pwwn;
f314878a 463 struct scsi_lun tgt_lun;
a36c61f9
KG		 464};
465
acdc79a6 466/*
a36c61f9
KG		 467 * PBC virtual port configuration
468 */
469struct bfi_pbc_vport_s {
470 wwn_t vp_pwwn;
471 wwn_t vp_nwwn;
472};
473
acdc79a6 474/*
a36c61f9
KG		 475 * BFI pre-boot configuration information
476 */
477struct bfi_pbc_s {
478 u8 port_enabled;
479 u8 boot_enabled;
480 u8 nbluns;
481 u8 nvports;
482 u8 port_speed;
483 u8 rsvd_a;
484 u16 hss;
485 wwn_t pbc_pwwn;
486 wwn_t pbc_nwwn;
487 struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
488 struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
489};
490
acdc79a6 491/*
a36c61f9
KG		 492 *----------------------------------------------------------------------
493 * MSGQ
494 *----------------------------------------------------------------------
495 */
496#define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
497#define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
498#define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
499#define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
500
501/* q_depth must be power of 2 */
502#define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
503
504enum bfi_msgq_h2i_msgs_e {
505 BFI_MSGQ_H2I_INIT_REQ = 1,
506 BFI_MSGQ_H2I_DOORBELL = 2,
507 BFI_MSGQ_H2I_SHUTDOWN = 3,
508};
509
510enum bfi_msgq_i2h_msgs_e {
511 BFI_MSGQ_I2H_INIT_RSP = 1,
512 BFI_MSGQ_I2H_DOORBELL = 2,
513};
514
515
516/* Messages(commands/responsed/AENS will have the following header */
517struct bfi_msgq_mhdr_s {
518 u8 msg_class;
519 u8 msg_id;
520 u16 msg_token;
521 u16 num_entries;
522 u8 enet_id;
523 u8 rsvd[1];
524};
525
526#define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
527 (_mh).msg_class = (_mc); \
528 (_mh).msg_id = (_mid); \
529 (_mh).msg_token = (_tok); \
530 (_mh).enet_id = (_enet_id); \
531} while (0)
532
533/*
534 * Mailbox for messaging interface
535 *
536*/
537#define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
538#define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
539#define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
540
541struct bfi_msgq_s {
542 union bfi_addr_u addr;
543 u16 q_depth; /* Total num of entries in the queue */
544 u8 rsvd[2];
545};
546
547/* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
548struct bfi_msgq_cfg_req_s {
549 struct bfi_mhdr_s mh;
550 struct bfi_msgq_s cmdq;
551 struct bfi_msgq_s rspq;
552};
553
554/* BFI_ENET_MSGQ_CFG_RSP */
555struct bfi_msgq_cfg_rsp_s {
556 struct bfi_mhdr_s mh;
557 u8 cmd_status;
558 u8 rsvd[3];
559};
560
561
562/* BFI_MSGQ_H2I_DOORBELL */
563struct bfi_msgq_h2i_db_s {
564 struct bfi_mhdr_s mh;
565 u16 cmdq_pi;
566 u16 rspq_ci;
567};
568
569/* BFI_MSGQ_I2H_DOORBELL */
570struct bfi_msgq_i2h_db_s {
571 struct bfi_mhdr_s mh;
572 u16 rspq_pi;
573 u16 cmdq_ci;
574};
575
576#pragma pack()
577
578/* BFI port specific */
579#pragma pack(1)
580
581enum bfi_port_h2i {
582 BFI_PORT_H2I_ENABLE_REQ = (1),
583 BFI_PORT_H2I_DISABLE_REQ = (2),
584 BFI_PORT_H2I_GET_STATS_REQ = (3),
585 BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
586};
587
588enum bfi_port_i2h {
589 BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
590 BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
591 BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
592 BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
593};
594
acdc79a6 595/*
a36c61f9
KG		 596 * Generic REQ type
597 */
598struct bfi_port_generic_req_s {
599 struct bfi_mhdr_s mh; /* msg header */
600 u32 msgtag; /* msgtag for reply */
601 u32 rsvd;
602};
603
acdc79a6 604/*
a36c61f9
KG		 605 * Generic RSP type
606 */
607struct bfi_port_generic_rsp_s {
608 struct bfi_mhdr_s mh; /* common msg header */
609 u8 status; /* port enable status */
610 u8 rsvd[3];
611 u32 msgtag; /* msgtag for reply */
612};
613
acdc79a6 614/*
a36c61f9
KG		 615 * BFI_PORT_H2I_GET_STATS_REQ
616 */
617struct bfi_port_get_stats_req_s {
618 struct bfi_mhdr_s mh; /* common msg header */
619 union bfi_addr_u dma_addr;
620};
621
622union bfi_port_h2i_msg_u {
623 struct bfi_mhdr_s mh;
624 struct bfi_port_generic_req_s enable_req;
625 struct bfi_port_generic_req_s disable_req;
626 struct bfi_port_get_stats_req_s getstats_req;
627 struct bfi_port_generic_req_s clearstats_req;
628};
629
630union bfi_port_i2h_msg_u {
631 struct bfi_mhdr_s mh;
632 struct bfi_port_generic_rsp_s enable_rsp;
633 struct bfi_port_generic_rsp_s disable_rsp;
634 struct bfi_port_generic_rsp_s getstats_rsp;
635 struct bfi_port_generic_rsp_s clearstats_rsp;
636};
637
1a4d8e1b
KG		 638/*
639 *----------------------------------------------------------------------
640 * ABLK
641 *----------------------------------------------------------------------
642 */
643enum bfi_ablk_h2i_msgs_e {
644 BFI_ABLK_H2I_QUERY = 1,
645 BFI_ABLK_H2I_ADPT_CONFIG = 2,
646 BFI_ABLK_H2I_PORT_CONFIG = 3,
647 BFI_ABLK_H2I_PF_CREATE = 4,
648 BFI_ABLK_H2I_PF_DELETE = 5,
649 BFI_ABLK_H2I_PF_UPDATE = 6,
650 BFI_ABLK_H2I_OPTROM_ENABLE = 7,
651 BFI_ABLK_H2I_OPTROM_DISABLE = 8,
652};
653
654enum bfi_ablk_i2h_msgs_e {
655 BFI_ABLK_I2H_QUERY = BFA_I2HM(BFI_ABLK_H2I_QUERY),
656 BFI_ABLK_I2H_ADPT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
657 BFI_ABLK_I2H_PORT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
658 BFI_ABLK_I2H_PF_CREATE = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
659 BFI_ABLK_I2H_PF_DELETE = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
660 BFI_ABLK_I2H_PF_UPDATE = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
661 BFI_ABLK_I2H_OPTROM_ENABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
662 BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
663};
664
665/* BFI_ABLK_H2I_QUERY */
666struct bfi_ablk_h2i_query_s {
667 struct bfi_mhdr_s mh;
668 union bfi_addr_u addr;
669};
670
671/* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
672struct bfi_ablk_h2i_cfg_req_s {
673 struct bfi_mhdr_s mh;
674 u8 mode;
675 u8 port;
676 u8 max_pf;
677 u8 max_vf;
678};
679
680/*
681 * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
682 */
683struct bfi_ablk_h2i_pf_req_s {
684 struct bfi_mhdr_s mh;
685 u8 pcifn;
686 u8 port;
687 u16 pers;
688 u32 bw;
689};
690
691/* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
692struct bfi_ablk_h2i_optrom_s {
693 struct bfi_mhdr_s mh;
694};
695
696/*
697 * BFI_ABLK_I2H_QUERY
698 * BFI_ABLK_I2H_PORT_CONFIG
699 * BFI_ABLK_I2H_PF_CREATE
700 * BFI_ABLK_I2H_PF_DELETE
701 * BFI_ABLK_I2H_PF_UPDATE
702 * BFI_ABLK_I2H_OPTROM_ENABLE
703 * BFI_ABLK_I2H_OPTROM_DISABLE
704 */
705struct bfi_ablk_i2h_rsp_s {
706 struct bfi_mhdr_s mh;
707 u8 status;
708 u8 pcifn;
709 u8 port_mode;
710};
711
148d6103
KG		 712
713/*
714 * CEE module specific messages
715 */
716
717/* Mailbox commands from host to firmware */
718enum bfi_cee_h2i_msgs_e {
719 BFI_CEE_H2I_GET_CFG_REQ = 1,
720 BFI_CEE_H2I_RESET_STATS = 2,
721 BFI_CEE_H2I_GET_STATS_REQ = 3,
722};
723
724enum bfi_cee_i2h_msgs_e {
725 BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1),
726 BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2),
727 BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3),
728};
729
730/*
731 * H2I command structure for resetting the stats
732 */
733struct bfi_cee_reset_stats_s {
734 struct bfi_mhdr_s mh;
735};
736
737/*
738 * Get configuration command from host
739 */
740struct bfi_cee_get_req_s {
741 struct bfi_mhdr_s mh;
742 union bfi_addr_u dma_addr;
743};
744
745/*
746 * Reply message from firmware
747 */
748struct bfi_cee_get_rsp_s {
749 struct bfi_mhdr_s mh;
750 u8 cmd_status;
751 u8 rsvd[3];
752};
753
754/*
755 * Reply message from firmware
756 */
757struct bfi_cee_stats_rsp_s {
758 struct bfi_mhdr_s mh;
759 u8 cmd_status;
760 u8 rsvd[3];
761};
762
763/* Mailbox message structures from firmware to host */
764union bfi_cee_i2h_msg_u {
765 struct bfi_mhdr_s mh;
766 struct bfi_cee_get_rsp_s get_rsp;
767 struct bfi_cee_stats_rsp_s stats_rsp;
768};
769
51e569aa
KG		 770/*
771 * SFP related
772 */
773
774enum bfi_sfp_h2i_e {
775 BFI_SFP_H2I_SHOW = 1,
776 BFI_SFP_H2I_SCN = 2,
777};
778
779enum bfi_sfp_i2h_e {
780 BFI_SFP_I2H_SHOW = BFA_I2HM(BFI_SFP_H2I_SHOW),
781 BFI_SFP_I2H_SCN = BFA_I2HM(BFI_SFP_H2I_SCN),
782};
783
784/*
785 * SFP state
786 */
787enum bfa_sfp_stat_e {
788 BFA_SFP_STATE_INIT = 0, /* SFP state is uninit */
789 BFA_SFP_STATE_REMOVED = 1, /* SFP is removed */
790 BFA_SFP_STATE_INSERTED = 2, /* SFP is inserted */
791 BFA_SFP_STATE_VALID = 3, /* SFP is valid */
792 BFA_SFP_STATE_UNSUPPORT = 4, /* SFP is unsupport */
793 BFA_SFP_STATE_FAILED = 5, /* SFP i2c read fail */
794};
795
796/*
797 * SFP memory access type
798 */
799enum bfi_sfp_mem_e {
800 BFI_SFP_MEM_ALL = 0x1, /* access all data field */
801 BFI_SFP_MEM_DIAGEXT = 0x2, /* access diag ext data field only */
802};
803
804struct bfi_sfp_req_s {
805 struct bfi_mhdr_s mh;
806 u8 memtype;
807 u8 rsvd[3];
808 struct bfi_alen_s alen;
809};
810
811struct bfi_sfp_rsp_s {
812 struct bfi_mhdr_s mh;
813 u8 status;
814 u8 state;
815 u8 rsvd[2];
816};
817
5a54b1d5
KG		 818/*
819 * FLASH module specific
820 */
821enum bfi_flash_h2i_msgs {
822 BFI_FLASH_H2I_QUERY_REQ = 1,
823 BFI_FLASH_H2I_ERASE_REQ = 2,
824 BFI_FLASH_H2I_WRITE_REQ = 3,
825 BFI_FLASH_H2I_READ_REQ = 4,
826 BFI_FLASH_H2I_BOOT_VER_REQ = 5,
827};
828
829enum bfi_flash_i2h_msgs {
830 BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
831 BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
832 BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
833 BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
834 BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
835 BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
836};
837
838/*
839 * Flash query request
840 */
841struct bfi_flash_query_req_s {
842 struct bfi_mhdr_s mh; /* Common msg header */
843 struct bfi_alen_s alen;
844};
845
846/*
847 * Flash erase request
848 */
849struct bfi_flash_erase_req_s {
850 struct bfi_mhdr_s mh; /* Common msg header */
851 u32 type; /* partition type */
852 u8 instance; /* partition instance */
853 u8 rsv[3];
854};
855
856/*
857 * Flash write request
858 */
859struct bfi_flash_write_req_s {
860 struct bfi_mhdr_s mh; /* Common msg header */
861 struct bfi_alen_s alen;
862 u32 type; /* partition type */
863 u8 instance; /* partition instance */
864 u8 last;
865 u8 rsv[2];
866 u32 offset;
867 u32 length;
868};
869
870/*
871 * Flash read request
872 */
873struct bfi_flash_read_req_s {
874 struct bfi_mhdr_s mh; /* Common msg header */
875 u32 type; /* partition type */
876 u8 instance; /* partition instance */
877 u8 rsv[3];
878 u32 offset;
879 u32 length;
880 struct bfi_alen_s alen;
881};
882
883/*
884 * Flash query response
885 */
886struct bfi_flash_query_rsp_s {
887 struct bfi_mhdr_s mh; /* Common msg header */
888 u32 status;
889};
890
891/*
892 * Flash read response
893 */
894struct bfi_flash_read_rsp_s {
895 struct bfi_mhdr_s mh; /* Common msg header */
896 u32 type; /* partition type */
897 u8 instance; /* partition instance */
898 u8 rsv[3];
899 u32 status;
900 u32 length;
901};
902
903/*
904 * Flash write response
905 */
906struct bfi_flash_write_rsp_s {
907 struct bfi_mhdr_s mh; /* Common msg header */
908 u32 type; /* partition type */
909 u8 instance; /* partition instance */
910 u8 rsv[3];
911 u32 status;
912 u32 length;
913};
914
915/*
916 * Flash erase response
917 */
918struct bfi_flash_erase_rsp_s {
919 struct bfi_mhdr_s mh; /* Common msg header */
920 u32 type; /* partition type */
921 u8 instance; /* partition instance */
922 u8 rsv[3];
923 u32 status;
924};
925
a36c61f9
KG		 926#pragma pack()
927
928#endif /* __BFI_H__ */
Linux 6.x block layer and io_uring tree(s)