[SCSI] bfa: Brocade-1860 Fabric Adapter vHBA support.
[linux-2.6-block.git] / drivers / scsi / bfa / bfi.h
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1/*
2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
3 * All rights reserved
4 * www.brocade.com
5 *
6 * Linux driver for Brocade Fibre Channel Host Bus Adapter.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License (GPL) Version 2 as
10 * published by the Free Software Foundation
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#ifndef __BFI_H__
19#define __BFI_H__
20
21#include "bfa_defs.h"
22#include "bfa_defs_svc.h"
23
24#pragma pack(1)
25
acdc79a6 26/*
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27 * BFI FW image type
28 */
29#define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
30#define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
a36c61f9 31
acdc79a6 32/*
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33 * Msg header common to all msgs
34 */
35struct bfi_mhdr_s {
36 u8 msg_class; /* @ref bfi_mclass_t */
37 u8 msg_id; /* msg opcode with in the class */
38 union {
39 struct {
d37779f8 40 u8 qid;
3fd45980 41 u8 fn_lpu; /* msg destination */
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42 } h2i;
43 u16 i2htok; /* token in msgs to host */
44 } mtag;
45};
46
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47#define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
48#define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
49#define bfi_mhdr_2_qid(_m) ((_mh)->mtag.h2i.qid)
d37779f8 50
3fd45980 51#define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
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52 (_mh).msg_class = (_mc); \
53 (_mh).msg_id = (_op); \
3fd45980 54 (_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
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55} while (0)
56
57#define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
58 (_mh).msg_class = (_mc); \
59 (_mh).msg_id = (_op); \
60 (_mh).mtag.i2htok = (_i2htok); \
61} while (0)
62
63/*
64 * Message opcodes: 0-127 to firmware, 128-255 to host
65 */
66#define BFI_I2H_OPCODE_BASE 128
67#define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
68
acdc79a6 69/*
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70 ****************************************************************************
71 *
72 * Scatter Gather Element and Page definition
73 *
74 ****************************************************************************
75 */
76
77#define BFI_SGE_INLINE 1
78#define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
79
acdc79a6 80/*
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81 * SG Flags
82 */
83enum {
84 BFI_SGE_DATA = 0, /* data address, not last */
85 BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
86 BFI_SGE_DATA_LAST = 3, /* data address, last */
87 BFI_SGE_LINK = 2, /* link address */
88 BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
89};
90
acdc79a6 91/*
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92 * DMA addresses
93 */
94union bfi_addr_u {
95 struct {
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96 __be32 addr_lo;
97 __be32 addr_hi;
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98 } a32;
99};
100
acdc79a6 101/*
85ce928d 102 * Scatter Gather Element used for fast-path IO requests
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103 */
104struct bfi_sge_s {
f16a1750 105#ifdef __BIG_ENDIAN
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106 u32 flags:2,
107 rsvd:2,
108 sg_len:28;
109#else
110 u32 sg_len:28,
111 rsvd:2,
112 flags:2;
113#endif
114 union bfi_addr_u sga;
115};
116
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117/**
118 * Generic DMA addr-len pair.
119 */
120struct bfi_alen_s {
121 union bfi_addr_u al_addr; /* DMA addr of buffer */
122 u32 al_len; /* length of buffer */
123};
124
acdc79a6 125/*
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126 * Scatter Gather Page
127 */
128#define BFI_SGPG_DATA_SGES 7
129#define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
130#define BFI_SGPG_RSVD_WD_LEN 8
131struct bfi_sgpg_s {
132 struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
133 u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
134};
135
136/*
137 * Large Message structure - 128 Bytes size Msgs
138 */
139#define BFI_LMSG_SZ 128
140#define BFI_LMSG_PL_WSZ \
141 ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
142
143struct bfi_msg_s {
144 struct bfi_mhdr_s mhdr;
145 u32 pl[BFI_LMSG_PL_WSZ];
146};
147
acdc79a6 148/*
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149 * Mailbox message structure
150 */
151#define BFI_MBMSG_SZ 7
152struct bfi_mbmsg_s {
153 struct bfi_mhdr_s mh;
154 u32 pl[BFI_MBMSG_SZ];
155};
156
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157/*
158 * Supported PCI function class codes (personality)
159 */
160enum bfi_pcifn_class {
161 BFI_PCIFN_CLASS_FC = 0x0c04,
162 BFI_PCIFN_CLASS_ETH = 0x0200,
163};
164
acdc79a6 165/*
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166 * Message Classes
167 */
168enum bfi_mclass {
169 BFI_MC_IOC = 1, /* IO Controller (IOC) */
170 BFI_MC_FCPORT = 5, /* FC port */
171 BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
1a4d8e1b 172 BFI_MC_ABLK = 7, /* ASIC block configuration */
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173 BFI_MC_UF = 8, /* Unsolicited frame receive */
174 BFI_MC_FCXP = 9, /* FC Transport */
175 BFI_MC_LPS = 10, /* lport fc login services */
176 BFI_MC_RPORT = 11, /* Remote port */
dd5aaf45 177 BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */
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178 BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
179 BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
180 BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
181 BFI_MC_IOIM = 16, /* IO (Initiator mode) */
182 BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
183 BFI_MC_TSKIM = 18, /* Initiator Task management */
184 BFI_MC_PORT = 21, /* Physical port */
185 BFI_MC_MAX = 32
186};
187
188#define BFI_IOC_MAX_CQS 4
189#define BFI_IOC_MAX_CQS_ASIC 8
190#define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
191
acdc79a6 192/*
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193 *----------------------------------------------------------------------
194 * IOC
195 *----------------------------------------------------------------------
196 */
197
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198/*
199 * Different asic generations
200 */
201enum bfi_asic_gen {
202 BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */
203 BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */
204 BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */
205};
206
207enum bfi_asic_mode {
208 BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
209 BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
210 BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
211 BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
212};
213
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214enum bfi_ioc_h2i_msgs {
215 BFI_IOC_H2I_ENABLE_REQ = 1,
216 BFI_IOC_H2I_DISABLE_REQ = 2,
217 BFI_IOC_H2I_GETATTR_REQ = 3,
218 BFI_IOC_H2I_DBG_SYNC = 4,
219 BFI_IOC_H2I_DBG_DUMP = 5,
220};
221
222enum bfi_ioc_i2h_msgs {
223 BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
224 BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
225 BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
775c7742 226 BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
a714134a 227 BFI_IOC_I2H_ACQ_ADDR_REPLY = BFA_I2HM(5),
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228};
229
acdc79a6 230/*
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231 * BFI_IOC_H2I_GETATTR_REQ message
232 */
233struct bfi_ioc_getattr_req_s {
234 struct bfi_mhdr_s mh;
235 union bfi_addr_u attr_addr;
236};
237
238struct bfi_ioc_attr_s {
239 wwn_t mfg_pwwn; /* Mfg port wwn */
240 wwn_t mfg_nwwn; /* Mfg node wwn */
241 mac_t mfg_mac; /* Mfg mac */
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242 u8 port_mode; /* bfi_port_mode */
243 u8 rsvd_a;
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244 wwn_t pwwn;
245 wwn_t nwwn;
246 mac_t mac; /* PBC or Mfg mac */
247 u16 rsvd_b;
248 mac_t fcoe_mac;
249 u16 rsvd_c;
250 char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
251 u8 pcie_gen;
252 u8 pcie_lanes_orig;
253 u8 pcie_lanes;
254 u8 rx_bbcredit; /* receive buffer credits */
255 u32 adapter_prop; /* adapter properties */
256 u16 maxfrsize; /* max receive frame size */
257 char asic_rev;
10a07379 258 u8 rsvd_d;
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259 char fw_version[BFA_VERSION_LEN];
260 char optrom_version[BFA_VERSION_LEN];
261 struct bfa_mfg_vpd_s vpd;
262 u32 card_type; /* card type */
263};
264
acdc79a6 265/*
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266 * BFI_IOC_I2H_GETATTR_REPLY message
267 */
268struct bfi_ioc_getattr_reply_s {
269 struct bfi_mhdr_s mh; /* Common msg header */
270 u8 status; /* cfg reply status */
271 u8 rsvd[3];
272};
273
acdc79a6 274/*
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275 * Firmware memory page offsets
276 */
277#define BFI_IOC_SMEM_PG0_CB (0x40)
278#define BFI_IOC_SMEM_PG0_CT (0x180)
279
acdc79a6 280/*
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281 * Firmware statistic offset
282 */
283#define BFI_IOC_FWSTATS_OFF (0x6B40)
284#define BFI_IOC_FWSTATS_SZ (4096)
285
acdc79a6 286/*
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287 * Firmware trace offset
288 */
289#define BFI_IOC_TRC_OFF (0x4b00)
290#define BFI_IOC_TRC_ENTS 256
291
292#define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
293#define BFI_IOC_MD5SUM_SZ 4
294struct bfi_ioc_image_hdr_s {
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295 u32 signature; /* constant signature */
296 u8 asic_gen; /* asic generation */
297 u8 asic_mode;
298 u8 port0_mode; /* device mode for port 0 */
299 u8 port1_mode; /* device mode for port 1 */
300 u32 exec; /* exec vector */
301 u32 bootenv; /* fimware boot env */
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302 u32 rsvd_b[4];
303 u32 md5sum[BFI_IOC_MD5SUM_SZ];
304};
305
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306#define BFI_FWBOOT_DEVMODE_OFF 4
307#define BFI_FWBOOT_TYPE_OFF 8
308#define BFI_FWBOOT_ENV_OFF 12
309#define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
310 (((u32)(__asic_gen)) << 24 | \
311 ((u32)(__asic_mode)) << 16 | \
312 ((u32)(__p0_mode)) << 8 | \
313 ((u32)(__p1_mode)))
314
315#define BFI_FWBOOT_TYPE_NORMAL 0
316#define BFI_FWBOOT_TYPE_MEMTEST 1
317#define BFI_FWBOOT_ENV_OS 0
318
319enum bfi_port_mode {
320 BFI_PORT_MODE_FC = 1,
321 BFI_PORT_MODE_ETH = 2,
322};
323
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324struct bfi_ioc_hbeat_s {
325 struct bfi_mhdr_s mh; /* common msg header */
326 u32 hb_count; /* current heart beat count */
327};
328
acdc79a6 329/*
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330 * IOC hardware/firmware state
331 */
332enum bfi_ioc_state {
333 BFI_IOC_UNINIT = 0, /* not initialized */
334 BFI_IOC_INITING = 1, /* h/w is being initialized */
335 BFI_IOC_HWINIT = 2, /* h/w is initialized */
336 BFI_IOC_CFG = 3, /* IOC configuration in progress */
337 BFI_IOC_OP = 4, /* IOC is operational */
338 BFI_IOC_DISABLING = 5, /* IOC is being disabled */
339 BFI_IOC_DISABLED = 6, /* IOC is disabled */
340 BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
341 BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
342 BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
343};
344
345#define BFI_IOC_ENDIAN_SIG 0x12345678
346
347enum {
348 BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
349 BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
350 BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
351 BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
352 BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
353 BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
354 BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
355 BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
356 BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
357 BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
358};
359
360#define BFI_ADAPTER_GETP(__prop, __adap_prop) \
361 (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
362 BFI_ADAPTER_ ## __prop ## _SH)
363#define BFI_ADAPTER_SETP(__prop, __val) \
364 ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
365#define BFI_ADAPTER_IS_PROTO(__adap_type) \
366 ((__adap_type) & BFI_ADAPTER_PROTO)
367#define BFI_ADAPTER_IS_TTV(__adap_type) \
368 ((__adap_type) & BFI_ADAPTER_TTV)
369#define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
370 ((__adap_type) & BFI_ADAPTER_UNSUPP)
371#define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
372 ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
373 BFI_ADAPTER_UNSUPP))
374
acdc79a6 375/*
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376 * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
377 */
378struct bfi_ioc_ctrl_req_s {
379 struct bfi_mhdr_s mh;
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380 u16 clscode;
381 u16 rsvd;
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382 u32 tv_sec;
383};
384#define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
385#define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
386
acdc79a6 387/*
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388 * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
389 */
390struct bfi_ioc_ctrl_reply_s {
391 struct bfi_mhdr_s mh; /* Common msg header */
392 u8 status; /* enable/disable status */
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393 u8 port_mode; /* bfa_mode_s */
394 u8 cap_bm; /* capability bit mask */
395 u8 rsvd;
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396};
397#define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
398#define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
399
400#define BFI_IOC_MSGSZ 8
acdc79a6 401/*
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402 * H2I Messages
403 */
404union bfi_ioc_h2i_msg_u {
405 struct bfi_mhdr_s mh;
406 struct bfi_ioc_ctrl_req_s enable_req;
407 struct bfi_ioc_ctrl_req_s disable_req;
408 struct bfi_ioc_getattr_req_s getattr_req;
409 u32 mboxmsg[BFI_IOC_MSGSZ];
410};
411
acdc79a6 412/*
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413 * I2H Messages
414 */
415union bfi_ioc_i2h_msg_u {
416 struct bfi_mhdr_s mh;
1a4d8e1b 417 struct bfi_ioc_ctrl_reply_s fw_event;
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418 u32 mboxmsg[BFI_IOC_MSGSZ];
419};
420
421
acdc79a6 422/*
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423 *----------------------------------------------------------------------
424 * PBC
425 *----------------------------------------------------------------------
426 */
427
428#define BFI_PBC_MAX_BLUNS 8
429#define BFI_PBC_MAX_VPORTS 16
43ffdf4d 430#define BFI_PBC_PORT_DISABLED 2
a36c61f9 431
acdc79a6 432/*
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433 * PBC boot lun configuration
434 */
435struct bfi_pbc_blun_s {
436 wwn_t tgt_pwwn;
f314878a 437 struct scsi_lun tgt_lun;
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438};
439
acdc79a6 440/*
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441 * PBC virtual port configuration
442 */
443struct bfi_pbc_vport_s {
444 wwn_t vp_pwwn;
445 wwn_t vp_nwwn;
446};
447
acdc79a6 448/*
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449 * BFI pre-boot configuration information
450 */
451struct bfi_pbc_s {
452 u8 port_enabled;
453 u8 boot_enabled;
454 u8 nbluns;
455 u8 nvports;
456 u8 port_speed;
457 u8 rsvd_a;
458 u16 hss;
459 wwn_t pbc_pwwn;
460 wwn_t pbc_nwwn;
461 struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
462 struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
463};
464
acdc79a6 465/*
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466 *----------------------------------------------------------------------
467 * MSGQ
468 *----------------------------------------------------------------------
469 */
470#define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
471#define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
472#define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
473#define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
474
475/* q_depth must be power of 2 */
476#define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
477
478enum bfi_msgq_h2i_msgs_e {
479 BFI_MSGQ_H2I_INIT_REQ = 1,
480 BFI_MSGQ_H2I_DOORBELL = 2,
481 BFI_MSGQ_H2I_SHUTDOWN = 3,
482};
483
484enum bfi_msgq_i2h_msgs_e {
485 BFI_MSGQ_I2H_INIT_RSP = 1,
486 BFI_MSGQ_I2H_DOORBELL = 2,
487};
488
489
490/* Messages(commands/responsed/AENS will have the following header */
491struct bfi_msgq_mhdr_s {
492 u8 msg_class;
493 u8 msg_id;
494 u16 msg_token;
495 u16 num_entries;
496 u8 enet_id;
497 u8 rsvd[1];
498};
499
500#define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
501 (_mh).msg_class = (_mc); \
502 (_mh).msg_id = (_mid); \
503 (_mh).msg_token = (_tok); \
504 (_mh).enet_id = (_enet_id); \
505} while (0)
506
507/*
508 * Mailbox for messaging interface
509 *
510*/
511#define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
512#define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
513#define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
514
515struct bfi_msgq_s {
516 union bfi_addr_u addr;
517 u16 q_depth; /* Total num of entries in the queue */
518 u8 rsvd[2];
519};
520
521/* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
522struct bfi_msgq_cfg_req_s {
523 struct bfi_mhdr_s mh;
524 struct bfi_msgq_s cmdq;
525 struct bfi_msgq_s rspq;
526};
527
528/* BFI_ENET_MSGQ_CFG_RSP */
529struct bfi_msgq_cfg_rsp_s {
530 struct bfi_mhdr_s mh;
531 u8 cmd_status;
532 u8 rsvd[3];
533};
534
535
536/* BFI_MSGQ_H2I_DOORBELL */
537struct bfi_msgq_h2i_db_s {
538 struct bfi_mhdr_s mh;
539 u16 cmdq_pi;
540 u16 rspq_ci;
541};
542
543/* BFI_MSGQ_I2H_DOORBELL */
544struct bfi_msgq_i2h_db_s {
545 struct bfi_mhdr_s mh;
546 u16 rspq_pi;
547 u16 cmdq_ci;
548};
549
550#pragma pack()
551
552/* BFI port specific */
553#pragma pack(1)
554
555enum bfi_port_h2i {
556 BFI_PORT_H2I_ENABLE_REQ = (1),
557 BFI_PORT_H2I_DISABLE_REQ = (2),
558 BFI_PORT_H2I_GET_STATS_REQ = (3),
559 BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
560};
561
562enum bfi_port_i2h {
563 BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
564 BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
565 BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
566 BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
567};
568
acdc79a6 569/*
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570 * Generic REQ type
571 */
572struct bfi_port_generic_req_s {
573 struct bfi_mhdr_s mh; /* msg header */
574 u32 msgtag; /* msgtag for reply */
575 u32 rsvd;
576};
577
acdc79a6 578/*
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579 * Generic RSP type
580 */
581struct bfi_port_generic_rsp_s {
582 struct bfi_mhdr_s mh; /* common msg header */
583 u8 status; /* port enable status */
584 u8 rsvd[3];
585 u32 msgtag; /* msgtag for reply */
586};
587
acdc79a6 588/*
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589 * BFI_PORT_H2I_GET_STATS_REQ
590 */
591struct bfi_port_get_stats_req_s {
592 struct bfi_mhdr_s mh; /* common msg header */
593 union bfi_addr_u dma_addr;
594};
595
596union bfi_port_h2i_msg_u {
597 struct bfi_mhdr_s mh;
598 struct bfi_port_generic_req_s enable_req;
599 struct bfi_port_generic_req_s disable_req;
600 struct bfi_port_get_stats_req_s getstats_req;
601 struct bfi_port_generic_req_s clearstats_req;
602};
603
604union bfi_port_i2h_msg_u {
605 struct bfi_mhdr_s mh;
606 struct bfi_port_generic_rsp_s enable_rsp;
607 struct bfi_port_generic_rsp_s disable_rsp;
608 struct bfi_port_generic_rsp_s getstats_rsp;
609 struct bfi_port_generic_rsp_s clearstats_rsp;
610};
611
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612/*
613 *----------------------------------------------------------------------
614 * ABLK
615 *----------------------------------------------------------------------
616 */
617enum bfi_ablk_h2i_msgs_e {
618 BFI_ABLK_H2I_QUERY = 1,
619 BFI_ABLK_H2I_ADPT_CONFIG = 2,
620 BFI_ABLK_H2I_PORT_CONFIG = 3,
621 BFI_ABLK_H2I_PF_CREATE = 4,
622 BFI_ABLK_H2I_PF_DELETE = 5,
623 BFI_ABLK_H2I_PF_UPDATE = 6,
624 BFI_ABLK_H2I_OPTROM_ENABLE = 7,
625 BFI_ABLK_H2I_OPTROM_DISABLE = 8,
626};
627
628enum bfi_ablk_i2h_msgs_e {
629 BFI_ABLK_I2H_QUERY = BFA_I2HM(BFI_ABLK_H2I_QUERY),
630 BFI_ABLK_I2H_ADPT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
631 BFI_ABLK_I2H_PORT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
632 BFI_ABLK_I2H_PF_CREATE = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
633 BFI_ABLK_I2H_PF_DELETE = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
634 BFI_ABLK_I2H_PF_UPDATE = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
635 BFI_ABLK_I2H_OPTROM_ENABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
636 BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
637};
638
639/* BFI_ABLK_H2I_QUERY */
640struct bfi_ablk_h2i_query_s {
641 struct bfi_mhdr_s mh;
642 union bfi_addr_u addr;
643};
644
645/* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
646struct bfi_ablk_h2i_cfg_req_s {
647 struct bfi_mhdr_s mh;
648 u8 mode;
649 u8 port;
650 u8 max_pf;
651 u8 max_vf;
652};
653
654/*
655 * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
656 */
657struct bfi_ablk_h2i_pf_req_s {
658 struct bfi_mhdr_s mh;
659 u8 pcifn;
660 u8 port;
661 u16 pers;
662 u32 bw;
663};
664
665/* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
666struct bfi_ablk_h2i_optrom_s {
667 struct bfi_mhdr_s mh;
668};
669
670/*
671 * BFI_ABLK_I2H_QUERY
672 * BFI_ABLK_I2H_PORT_CONFIG
673 * BFI_ABLK_I2H_PF_CREATE
674 * BFI_ABLK_I2H_PF_DELETE
675 * BFI_ABLK_I2H_PF_UPDATE
676 * BFI_ABLK_I2H_OPTROM_ENABLE
677 * BFI_ABLK_I2H_OPTROM_DISABLE
678 */
679struct bfi_ablk_i2h_rsp_s {
680 struct bfi_mhdr_s mh;
681 u8 status;
682 u8 pcifn;
683 u8 port_mode;
684};
685
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686#pragma pack()
687
688#endif /* __BFI_H__ */