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a36c61f9 KG |
1 | /* |
2 | * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. | |
3 | * All rights reserved | |
4 | * www.brocade.com | |
5 | * | |
6 | * Linux driver for Brocade Fibre Channel Host Bus Adapter. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License (GPL) Version 2 as | |
10 | * published by the Free Software Foundation | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but | |
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * General Public License for more details. | |
16 | */ | |
17 | ||
18 | #ifndef __BFA_DEFS_H__ | |
19 | #define __BFA_DEFS_H__ | |
20 | ||
21 | #include "bfa_fc.h" | |
f16a1750 | 22 | #include "bfad_drv.h" |
a36c61f9 KG |
23 | |
24 | #define BFA_MFG_SERIALNUM_SIZE 11 | |
25 | #define STRSZ(_n) (((_n) + 4) & ~3) | |
26 | ||
acdc79a6 | 27 | /* |
a36c61f9 KG |
28 | * Manufacturing card type |
29 | */ | |
30 | enum { | |
31 | BFA_MFG_TYPE_CB_MAX = 825, /* Crossbow card type max */ | |
32 | BFA_MFG_TYPE_FC8P2 = 825, /* 8G 2port FC card */ | |
33 | BFA_MFG_TYPE_FC8P1 = 815, /* 8G 1port FC card */ | |
34 | BFA_MFG_TYPE_FC4P2 = 425, /* 4G 2port FC card */ | |
35 | BFA_MFG_TYPE_FC4P1 = 415, /* 4G 1port FC card */ | |
36 | BFA_MFG_TYPE_CNA10P2 = 1020, /* 10G 2port CNA card */ | |
37 | BFA_MFG_TYPE_CNA10P1 = 1010, /* 10G 1port CNA card */ | |
38 | BFA_MFG_TYPE_JAYHAWK = 804, /* Jayhawk mezz card */ | |
39 | BFA_MFG_TYPE_WANCHESE = 1007, /* Wanchese mezz card */ | |
40 | BFA_MFG_TYPE_ASTRA = 807, /* Astra mezz card */ | |
41 | BFA_MFG_TYPE_LIGHTNING_P0 = 902, /* Lightning mezz card - old */ | |
42 | BFA_MFG_TYPE_LIGHTNING = 1741, /* Lightning mezz card */ | |
8b070b4a KG |
43 | BFA_MFG_TYPE_PROWLER_F = 1560, /* Prowler FC only cards */ |
44 | BFA_MFG_TYPE_PROWLER_N = 1410, /* Prowler NIC only cards */ | |
45 | BFA_MFG_TYPE_PROWLER_C = 1710, /* Prowler CNA only cards */ | |
46 | BFA_MFG_TYPE_PROWLER_D = 1860, /* Prowler Dual cards */ | |
47 | BFA_MFG_TYPE_CHINOOK = 1867, /* Chinook cards */ | |
079bcbc3 | 48 | BFA_MFG_TYPE_CHINOOK2 = 1869, /*!< Chinook2 cards */ |
8b070b4a | 49 | BFA_MFG_TYPE_INVALID = 0, /* Invalid card type */ |
a36c61f9 KG |
50 | }; |
51 | ||
52 | #pragma pack(1) | |
53 | ||
acdc79a6 | 54 | /* |
a36c61f9 KG |
55 | * Check if Mezz card |
56 | */ | |
57 | #define bfa_mfg_is_mezz(type) (( \ | |
58 | (type) == BFA_MFG_TYPE_JAYHAWK || \ | |
59 | (type) == BFA_MFG_TYPE_WANCHESE || \ | |
60 | (type) == BFA_MFG_TYPE_ASTRA || \ | |
61 | (type) == BFA_MFG_TYPE_LIGHTNING_P0 || \ | |
8b070b4a | 62 | (type) == BFA_MFG_TYPE_LIGHTNING || \ |
079bcbc3 VMG |
63 | (type) == BFA_MFG_TYPE_CHINOOK || \ |
64 | (type) == BFA_MFG_TYPE_CHINOOK2)) | |
a36c61f9 | 65 | |
acdc79a6 | 66 | /* |
a36c61f9 KG |
67 | * Check if the card having old wwn/mac handling |
68 | */ | |
69 | #define bfa_mfg_is_old_wwn_mac_model(type) (( \ | |
70 | (type) == BFA_MFG_TYPE_FC8P2 || \ | |
71 | (type) == BFA_MFG_TYPE_FC8P1 || \ | |
72 | (type) == BFA_MFG_TYPE_FC4P2 || \ | |
73 | (type) == BFA_MFG_TYPE_FC4P1 || \ | |
74 | (type) == BFA_MFG_TYPE_CNA10P2 || \ | |
75 | (type) == BFA_MFG_TYPE_CNA10P1 || \ | |
76 | (type) == BFA_MFG_TYPE_JAYHAWK || \ | |
77 | (type) == BFA_MFG_TYPE_WANCHESE)) | |
78 | ||
79 | #define bfa_mfg_increment_wwn_mac(m, i) \ | |
80 | do { \ | |
81 | u32 t = ((u32)(m)[0] << 16) | ((u32)(m)[1] << 8) | \ | |
82 | (u32)(m)[2]; \ | |
83 | t += (i); \ | |
84 | (m)[0] = (t >> 16) & 0xFF; \ | |
85 | (m)[1] = (t >> 8) & 0xFF; \ | |
86 | (m)[2] = t & 0xFF; \ | |
87 | } while (0) | |
88 | ||
acdc79a6 | 89 | /* |
a36c61f9 KG |
90 | * VPD data length |
91 | */ | |
92 | #define BFA_MFG_VPD_LEN 512 | |
93 | ||
acdc79a6 | 94 | /* |
a36c61f9 KG |
95 | * VPD vendor tag |
96 | */ | |
97 | enum { | |
98 | BFA_MFG_VPD_UNKNOWN = 0, /* vendor unknown */ | |
99 | BFA_MFG_VPD_IBM = 1, /* vendor IBM */ | |
100 | BFA_MFG_VPD_HP = 2, /* vendor HP */ | |
101 | BFA_MFG_VPD_DELL = 3, /* vendor DELL */ | |
102 | BFA_MFG_VPD_PCI_IBM = 0x08, /* PCI VPD IBM */ | |
103 | BFA_MFG_VPD_PCI_HP = 0x10, /* PCI VPD HP */ | |
104 | BFA_MFG_VPD_PCI_DELL = 0x20, /* PCI VPD DELL */ | |
105 | BFA_MFG_VPD_PCI_BRCD = 0xf8, /* PCI VPD Brocade */ | |
106 | }; | |
107 | ||
acdc79a6 | 108 | /* |
a36c61f9 KG |
109 | * All numerical fields are in big-endian format. |
110 | */ | |
111 | struct bfa_mfg_vpd_s { | |
112 | u8 version; /* vpd data version */ | |
113 | u8 vpd_sig[3]; /* characters 'V', 'P', 'D' */ | |
114 | u8 chksum; /* u8 checksum */ | |
115 | u8 vendor; /* vendor */ | |
116 | u8 len; /* vpd data length excluding header */ | |
117 | u8 rsv; | |
118 | u8 data[BFA_MFG_VPD_LEN]; /* vpd data */ | |
119 | }; | |
120 | ||
121 | #pragma pack() | |
122 | ||
acdc79a6 | 123 | /* |
a36c61f9 KG |
124 | * Status return values |
125 | */ | |
126 | enum bfa_status { | |
127 | BFA_STATUS_OK = 0, /* Success */ | |
128 | BFA_STATUS_FAILED = 1, /* Operation failed */ | |
129 | BFA_STATUS_EINVAL = 2, /* Invalid params Check input | |
130 | * parameters */ | |
131 | BFA_STATUS_ENOMEM = 3, /* Out of resources */ | |
132 | BFA_STATUS_ETIMER = 5, /* Timer expired - Retry, if persists, | |
133 | * contact support */ | |
134 | BFA_STATUS_EPROTOCOL = 6, /* Protocol error */ | |
28d358d0 | 135 | BFA_STATUS_BADFLASH = 9, /* Flash is bad */ |
51e569aa | 136 | BFA_STATUS_SFP_UNSUPP = 10, /* Unsupported SFP - Replace SFP */ |
b85daafe | 137 | BFA_STATUS_UNKNOWN_VFID = 11, /* VF_ID not found */ |
3d7fc66d | 138 | BFA_STATUS_DATACORRUPTED = 12, /* Diag returned data corrupted */ |
a36c61f9 | 139 | BFA_STATUS_DEVBUSY = 13, /* Device busy - Retry operation */ |
3d7fc66d | 140 | BFA_STATUS_HDMA_FAILED = 16, /* Host dma failed contact support */ |
5a54b1d5 | 141 | BFA_STATUS_FLASH_BAD_LEN = 17, /* Flash bad length */ |
a36c61f9 KG |
142 | BFA_STATUS_UNKNOWN_LWWN = 18, /* LPORT PWWN not found */ |
143 | BFA_STATUS_UNKNOWN_RWWN = 19, /* RPORT PWWN not found */ | |
144 | BFA_STATUS_VPORT_EXISTS = 21, /* VPORT already exists */ | |
145 | BFA_STATUS_VPORT_MAX = 22, /* Reached max VPORT supported limit */ | |
146 | BFA_STATUS_UNSUPP_SPEED = 23, /* Invalid Speed Check speed setting */ | |
147 | BFA_STATUS_INVLD_DFSZ = 24, /* Invalid Max data field size */ | |
3d7fc66d | 148 | BFA_STATUS_CMD_NOTSUPP = 26, /* Command/API not supported */ |
a36c61f9 | 149 | BFA_STATUS_FABRIC_RJT = 29, /* Reject from attached fabric */ |
f2ee7601 | 150 | BFA_STATUS_UNKNOWN_VWWN = 30, /* VPORT PWWN not found */ |
b85daafe | 151 | BFA_STATUS_PORT_OFFLINE = 34, /* Port is not online */ |
a36c61f9 | 152 | BFA_STATUS_VPORT_WWN_BP = 46, /* WWN is same as base port's WWN */ |
3d7fc66d | 153 | BFA_STATUS_PORT_NOT_DISABLED = 47, /* Port not disabled disable port */ |
a36c61f9 KG |
154 | BFA_STATUS_NO_FCPIM_NEXUS = 52, /* No FCP Nexus exists with the rport */ |
155 | BFA_STATUS_IOC_FAILURE = 56, /* IOC failure - Retry, if persists | |
156 | * contact support */ | |
157 | BFA_STATUS_INVALID_WWN = 57, /* Invalid WWN */ | |
3d7fc66d | 158 | BFA_STATUS_ADAPTER_ENABLED = 60, /* Adapter is not disabled */ |
a714134a | 159 | BFA_STATUS_IOC_NON_OP = 61, /* IOC is not operational */ |
b85daafe | 160 | BFA_STATUS_VERSION_FAIL = 70, /* Application/Driver version mismatch */ |
a36c61f9 | 161 | BFA_STATUS_DIAG_BUSY = 71, /* diag busy */ |
3d7fc66d | 162 | BFA_STATUS_BEACON_ON = 72, /* Port Beacon already on */ |
a36c61f9 KG |
163 | BFA_STATUS_ENOFSAVE = 78, /* No saved firmware trace */ |
164 | BFA_STATUS_IOC_DISABLED = 82, /* IOC is already disabled */ | |
bc0e2c2a KG |
165 | BFA_STATUS_ERROR_TRL_ENABLED = 87, /* TRL is enabled */ |
166 | BFA_STATUS_ERROR_QOS_ENABLED = 88, /* QoS is enabled */ | |
51e569aa | 167 | BFA_STATUS_NO_SFP_DEV = 89, /* No SFP device check or replace SFP */ |
3d7fc66d KG |
168 | BFA_STATUS_MEMTEST_FAILED = 90, /* Memory test failed contact support */ |
169 | BFA_STATUS_LEDTEST_OP = 109, /* LED test is operating */ | |
a36c61f9 | 170 | BFA_STATUS_INVALID_MAC = 134, /* Invalid MAC address */ |
e353546e | 171 | BFA_STATUS_CMD_NOTSUPP_CNA = 146, /* Command not supported for CNA */ |
a36c61f9 KG |
172 | BFA_STATUS_PBC = 154, /* Operation not allowed for pre-boot |
173 | * configuration */ | |
7826f304 KG |
174 | BFA_STATUS_BAD_FWCFG = 156, /* Bad firmware configuration */ |
175 | BFA_STATUS_INVALID_VENDOR = 158, /* Invalid switch vendor */ | |
51e569aa | 176 | BFA_STATUS_SFP_NOT_READY = 159, /* SFP info is not ready. Retry */ |
a36c61f9 KG |
177 | BFA_STATUS_TRUNK_ENABLED = 164, /* Trunk is already enabled on |
178 | * this adapter */ | |
179 | BFA_STATUS_TRUNK_DISABLED = 165, /* Trunking is disabled on | |
180 | * the adapter */ | |
181 | BFA_STATUS_IOPROFILE_OFF = 175, /* IO profile OFF */ | |
3350d98d | 182 | BFA_STATUS_PHY_NOT_PRESENT = 183, /* PHY module not present */ |
a714134a | 183 | BFA_STATUS_FEATURE_NOT_SUPPORTED = 192, /* Feature not supported */ |
4c5d22bf KG |
184 | BFA_STATUS_ENTRY_EXISTS = 193, /* Entry already exists */ |
185 | BFA_STATUS_ENTRY_NOT_EXISTS = 194, /* Entry does not exist */ | |
186 | BFA_STATUS_NO_CHANGE = 195, /* Feature already in that state */ | |
a714134a KG |
187 | BFA_STATUS_FAA_ENABLED = 197, /* FAA is already enabled */ |
188 | BFA_STATUS_FAA_DISABLED = 198, /* FAA is already disabled */ | |
189 | BFA_STATUS_FAA_ACQUIRED = 199, /* FAA is already acquired */ | |
190 | BFA_STATUS_FAA_ACQ_ADDR = 200, /* Acquiring addr */ | |
bbe37a67 VMG |
191 | BFA_STATUS_BBCR_FC_ONLY = 201, /*!< BBCredit Recovery is supported for * |
192 | * FC mode only */ | |
a714134a | 193 | BFA_STATUS_ERROR_TRUNK_ENABLED = 203, /* Trunk enabled on adapter */ |
4c5d22bf | 194 | BFA_STATUS_MAX_ENTRY_REACHED = 212, /* MAX entry reached */ |
bc0e2c2a KG |
195 | BFA_STATUS_TOPOLOGY_LOOP = 230, /* Topology is set to Loop */ |
196 | BFA_STATUS_LOOP_UNSUPP_MEZZ = 231, /* Loop topology is not supported | |
197 | * on mezz cards */ | |
1a1297c6 | 198 | BFA_STATUS_INVALID_BW = 233, /* Invalid bandwidth value */ |
6894f013 KG |
199 | BFA_STATUS_QOS_BW_INVALID = 234, /* Invalid QOS bandwidth |
200 | * configuration */ | |
e353546e KG |
201 | BFA_STATUS_DPORT_ENABLED = 235, /* D-port mode is already enabled */ |
202 | BFA_STATUS_DPORT_DISABLED = 236, /* D-port mode is already disabled */ | |
203 | BFA_STATUS_CMD_NOTSUPP_MEZZ = 239, /* Cmd not supported for MEZZ card */ | |
e6826c96 | 204 | BFA_STATUS_FRU_NOT_PRESENT = 240, /* fru module not present */ |
1a898a79 VMG |
205 | BFA_STATUS_DPORT_NO_SFP = 243, /* SFP is not present.\n D-port will be |
206 | * enabled but it will be operational | |
207 | * only after inserting a valid SFP. */ | |
e353546e | 208 | BFA_STATUS_DPORT_ERR = 245, /* D-port mode is enabled */ |
1a898a79 VMG |
209 | BFA_STATUS_DPORT_ENOSYS = 254, /* Switch has no D_Port functionality */ |
210 | BFA_STATUS_DPORT_CANT_PERF = 255, /* Switch port is not D_Port capable | |
211 | * or D_Port is disabled */ | |
212 | BFA_STATUS_DPORT_LOGICALERR = 256, /* Switch D_Port fail */ | |
213 | BFA_STATUS_DPORT_SWBUSY = 257, /* Switch port busy */ | |
bbe37a67 VMG |
214 | BFA_STATUS_ERR_BBCR_SPEED_UNSUPPORT = 258, /*!< BB credit recovery is |
215 | * supported at max port speed alone */ | |
216 | BFA_STATUS_ERROR_BBCR_ENABLED = 259, /*!< BB credit recovery | |
217 | * is enabled */ | |
218 | BFA_STATUS_INVALID_BBSCN = 260, /*!< Invalid BBSCN value. | |
219 | * Valid range is [1-15] */ | |
1a898a79 VMG |
220 | BFA_STATUS_DDPORT_ERR = 261, /* Dynamic D_Port mode is active.\n To |
221 | * exit dynamic mode, disable D_Port on | |
222 | * the remote port */ | |
223 | BFA_STATUS_DPORT_SFPWRAP_ERR = 262, /* Clear e/o_wrap fail, check or | |
224 | * replace SFP */ | |
bbe37a67 VMG |
225 | BFA_STATUS_BBCR_CFG_NO_CHANGE = 265, /*!< BBCR is operational. |
226 | * Disable BBCR and try this operation again. */ | |
1a898a79 VMG |
227 | BFA_STATUS_DPORT_SW_NOTREADY = 268, /* Remote port is not ready to |
228 | * start dport test. Check remote | |
229 | * port status. */ | |
230 | BFA_STATUS_DPORT_INV_SFP = 271, /* Invalid SFP for D-PORT mode. */ | |
231 | BFA_STATUS_DPORT_CMD_NOTSUPP = 273, /* Dport is not supported by | |
232 | * remote port */ | |
a36c61f9 KG |
233 | BFA_STATUS_MAX_VAL /* Unknown error code */ |
234 | }; | |
235 | #define bfa_status_t enum bfa_status | |
236 | ||
237 | enum bfa_eproto_status { | |
238 | BFA_EPROTO_BAD_ACCEPT = 0, | |
239 | BFA_EPROTO_UNKNOWN_RSP = 1 | |
240 | }; | |
241 | #define bfa_eproto_status_t enum bfa_eproto_status | |
242 | ||
243 | enum bfa_boolean { | |
244 | BFA_FALSE = 0, | |
245 | BFA_TRUE = 1 | |
246 | }; | |
247 | #define bfa_boolean_t enum bfa_boolean | |
248 | ||
249 | #define BFA_STRING_32 32 | |
250 | #define BFA_VERSION_LEN 64 | |
251 | ||
acdc79a6 | 252 | /* |
a36c61f9 KG |
253 | * ---------------------- adapter definitions ------------ |
254 | */ | |
255 | ||
acdc79a6 | 256 | /* |
a36c61f9 KG |
257 | * BFA adapter level attributes. |
258 | */ | |
259 | enum { | |
260 | BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE), | |
261 | /* | |
262 | *!< adapter serial num length | |
263 | */ | |
264 | BFA_ADAPTER_MODEL_NAME_LEN = 16, /* model name length */ | |
265 | BFA_ADAPTER_MODEL_DESCR_LEN = 128, /* model description length */ | |
266 | BFA_ADAPTER_MFG_NAME_LEN = 8, /* manufacturer name length */ | |
267 | BFA_ADAPTER_SYM_NAME_LEN = 64, /* adapter symbolic name length */ | |
268 | BFA_ADAPTER_OS_TYPE_LEN = 64, /* adapter os type length */ | |
079bcbc3 | 269 | BFA_ADAPTER_UUID_LEN = 16, /* adapter uuid length */ |
a36c61f9 KG |
270 | }; |
271 | ||
272 | struct bfa_adapter_attr_s { | |
273 | char manufacturer[BFA_ADAPTER_MFG_NAME_LEN]; | |
274 | char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN]; | |
275 | u32 card_type; | |
276 | char model[BFA_ADAPTER_MODEL_NAME_LEN]; | |
277 | char model_descr[BFA_ADAPTER_MODEL_DESCR_LEN]; | |
278 | wwn_t pwwn; | |
279 | char node_symname[FC_SYMNAME_MAX]; | |
280 | char hw_ver[BFA_VERSION_LEN]; | |
281 | char fw_ver[BFA_VERSION_LEN]; | |
282 | char optrom_ver[BFA_VERSION_LEN]; | |
283 | char os_type[BFA_ADAPTER_OS_TYPE_LEN]; | |
284 | struct bfa_mfg_vpd_s vpd; | |
285 | struct mac_s mac; | |
286 | ||
287 | u8 nports; | |
288 | u8 max_speed; | |
289 | u8 prototype; | |
290 | char asic_rev; | |
291 | ||
292 | u8 pcie_gen; | |
293 | u8 pcie_lanes_orig; | |
294 | u8 pcie_lanes; | |
295 | u8 cna_capable; | |
296 | ||
297 | u8 is_mezz; | |
298 | u8 trunk_capable; | |
ea5d7c9e KG |
299 | u8 mfg_day; /* manufacturing day */ |
300 | u8 mfg_month; /* manufacturing month */ | |
301 | u16 mfg_year; /* manufacturing year */ | |
302 | u16 rsvd; | |
079bcbc3 | 303 | u8 uuid[BFA_ADAPTER_UUID_LEN]; |
a36c61f9 KG |
304 | }; |
305 | ||
acdc79a6 | 306 | /* |
a36c61f9 KG |
307 | * ---------------------- IOC definitions ------------ |
308 | */ | |
309 | ||
310 | enum { | |
311 | BFA_IOC_DRIVER_LEN = 16, | |
312 | BFA_IOC_CHIP_REV_LEN = 8, | |
313 | }; | |
314 | ||
acdc79a6 | 315 | /* |
a36c61f9 KG |
316 | * Driver and firmware versions. |
317 | */ | |
318 | struct bfa_ioc_driver_attr_s { | |
319 | char driver[BFA_IOC_DRIVER_LEN]; /* driver name */ | |
320 | char driver_ver[BFA_VERSION_LEN]; /* driver version */ | |
321 | char fw_ver[BFA_VERSION_LEN]; /* firmware version */ | |
322 | char bios_ver[BFA_VERSION_LEN]; /* bios version */ | |
323 | char efi_ver[BFA_VERSION_LEN]; /* EFI version */ | |
324 | char ob_ver[BFA_VERSION_LEN]; /* openboot version */ | |
325 | }; | |
326 | ||
acdc79a6 | 327 | /* |
a36c61f9 KG |
328 | * IOC PCI device attributes |
329 | */ | |
330 | struct bfa_ioc_pci_attr_s { | |
331 | u16 vendor_id; /* PCI vendor ID */ | |
332 | u16 device_id; /* PCI device ID */ | |
333 | u16 ssid; /* subsystem ID */ | |
334 | u16 ssvid; /* subsystem vendor ID */ | |
335 | u32 pcifn; /* PCI device function */ | |
336 | u32 rsvd; /* padding */ | |
337 | char chip_rev[BFA_IOC_CHIP_REV_LEN]; /* chip revision */ | |
338 | }; | |
339 | ||
acdc79a6 | 340 | /* |
a36c61f9 KG |
341 | * IOC states |
342 | */ | |
343 | enum bfa_ioc_state { | |
344 | BFA_IOC_UNINIT = 1, /* IOC is in uninit state */ | |
345 | BFA_IOC_RESET = 2, /* IOC is in reset state */ | |
346 | BFA_IOC_SEMWAIT = 3, /* Waiting for IOC h/w semaphore */ | |
347 | BFA_IOC_HWINIT = 4, /* IOC h/w is being initialized */ | |
348 | BFA_IOC_GETATTR = 5, /* IOC is being configured */ | |
349 | BFA_IOC_OPERATIONAL = 6, /* IOC is operational */ | |
350 | BFA_IOC_INITFAIL = 7, /* IOC hardware failure */ | |
351 | BFA_IOC_FAIL = 8, /* IOC heart-beat failure */ | |
352 | BFA_IOC_DISABLING = 9, /* IOC is being disabled */ | |
353 | BFA_IOC_DISABLED = 10, /* IOC is disabled */ | |
354 | BFA_IOC_FWMISMATCH = 11, /* IOC f/w different from drivers */ | |
355 | BFA_IOC_ENABLING = 12, /* IOC is being enabled */ | |
5a0adaed | 356 | BFA_IOC_HWFAIL = 13, /* PCI mapping doesn't exist */ |
a714134a | 357 | BFA_IOC_ACQ_ADDR = 14, /* Acquiring addr from fabric */ |
a36c61f9 KG |
358 | }; |
359 | ||
acdc79a6 | 360 | /* |
a36c61f9 KG |
361 | * IOC firmware stats |
362 | */ | |
363 | struct bfa_fw_ioc_stats_s { | |
364 | u32 enable_reqs; | |
365 | u32 disable_reqs; | |
366 | u32 get_attr_reqs; | |
367 | u32 dbg_sync; | |
368 | u32 dbg_dump; | |
369 | u32 unknown_reqs; | |
370 | }; | |
371 | ||
acdc79a6 | 372 | /* |
a36c61f9 KG |
373 | * IOC driver stats |
374 | */ | |
375 | struct bfa_ioc_drv_stats_s { | |
376 | u32 ioc_isrs; | |
377 | u32 ioc_enables; | |
378 | u32 ioc_disables; | |
379 | u32 ioc_hbfails; | |
380 | u32 ioc_boots; | |
381 | u32 stats_tmos; | |
382 | u32 hb_count; | |
383 | u32 disable_reqs; | |
384 | u32 enable_reqs; | |
385 | u32 disable_replies; | |
386 | u32 enable_replies; | |
5a0adaed | 387 | u32 rsvd; |
a36c61f9 KG |
388 | }; |
389 | ||
acdc79a6 | 390 | /* |
a36c61f9 KG |
391 | * IOC statistics |
392 | */ | |
393 | struct bfa_ioc_stats_s { | |
394 | struct bfa_ioc_drv_stats_s drv_stats; /* driver IOC stats */ | |
395 | struct bfa_fw_ioc_stats_s fw_stats; /* firmware IOC stats */ | |
396 | }; | |
397 | ||
398 | enum bfa_ioc_type_e { | |
399 | BFA_IOC_TYPE_FC = 1, | |
400 | BFA_IOC_TYPE_FCoE = 2, | |
401 | BFA_IOC_TYPE_LL = 3, | |
402 | }; | |
403 | ||
acdc79a6 | 404 | /* |
a36c61f9 KG |
405 | * IOC attributes returned in queries |
406 | */ | |
407 | struct bfa_ioc_attr_s { | |
408 | enum bfa_ioc_type_e ioc_type; | |
409 | enum bfa_ioc_state state; /* IOC state */ | |
410 | struct bfa_adapter_attr_s adapter_attr; /* HBA attributes */ | |
411 | struct bfa_ioc_driver_attr_s driver_attr; /* driver attr */ | |
412 | struct bfa_ioc_pci_attr_s pci_attr; | |
413 | u8 port_id; /* port number */ | |
1a4d8e1b KG |
414 | u8 port_mode; /* bfa_mode_s */ |
415 | u8 cap_bm; /* capability */ | |
416 | u8 port_mode_cfg; /* bfa_mode_s */ | |
079bcbc3 VMG |
417 | u8 def_fn; /* 1 if default fn */ |
418 | u8 rsvd[3]; /* 64bit align */ | |
a36c61f9 KG |
419 | }; |
420 | ||
7826f304 KG |
421 | /* |
422 | * AEN related definitions | |
423 | */ | |
424 | enum bfa_aen_category { | |
425 | BFA_AEN_CAT_ADAPTER = 1, | |
426 | BFA_AEN_CAT_PORT = 2, | |
427 | BFA_AEN_CAT_LPORT = 3, | |
428 | BFA_AEN_CAT_RPORT = 4, | |
429 | BFA_AEN_CAT_ITNIM = 5, | |
430 | BFA_AEN_CAT_AUDIT = 8, | |
431 | BFA_AEN_CAT_IOC = 9, | |
432 | }; | |
433 | ||
434 | /* BFA adapter level events */ | |
435 | enum bfa_adapter_aen_event { | |
436 | BFA_ADAPTER_AEN_ADD = 1, /* New Adapter found event */ | |
437 | BFA_ADAPTER_AEN_REMOVE = 2, /* Adapter removed event */ | |
438 | }; | |
439 | ||
440 | struct bfa_adapter_aen_data_s { | |
441 | char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN]; | |
442 | u32 nports; /* Number of NPorts */ | |
443 | wwn_t pwwn; /* WWN of one of its physical port */ | |
444 | }; | |
445 | ||
446 | /* BFA physical port Level events */ | |
447 | enum bfa_port_aen_event { | |
448 | BFA_PORT_AEN_ONLINE = 1, /* Physical Port online event */ | |
449 | BFA_PORT_AEN_OFFLINE = 2, /* Physical Port offline event */ | |
450 | BFA_PORT_AEN_RLIR = 3, /* RLIR event, not supported */ | |
451 | BFA_PORT_AEN_SFP_INSERT = 4, /* SFP inserted event */ | |
452 | BFA_PORT_AEN_SFP_REMOVE = 5, /* SFP removed event */ | |
453 | BFA_PORT_AEN_SFP_POM = 6, /* SFP POM event */ | |
454 | BFA_PORT_AEN_ENABLE = 7, /* Physical Port enable event */ | |
455 | BFA_PORT_AEN_DISABLE = 8, /* Physical Port disable event */ | |
456 | BFA_PORT_AEN_AUTH_ON = 9, /* Physical Port auth success event */ | |
457 | BFA_PORT_AEN_AUTH_OFF = 10, /* Physical Port auth fail event */ | |
458 | BFA_PORT_AEN_DISCONNECT = 11, /* Physical Port disconnect event */ | |
459 | BFA_PORT_AEN_QOS_NEG = 12, /* Base Port QOS negotiation event */ | |
460 | BFA_PORT_AEN_FABRIC_NAME_CHANGE = 13, /* Fabric Name/WWN change */ | |
461 | BFA_PORT_AEN_SFP_ACCESS_ERROR = 14, /* SFP read error event */ | |
462 | BFA_PORT_AEN_SFP_UNSUPPORT = 15, /* Unsupported SFP event */ | |
463 | }; | |
464 | ||
465 | enum bfa_port_aen_sfp_pom { | |
466 | BFA_PORT_AEN_SFP_POM_GREEN = 1, /* Normal */ | |
467 | BFA_PORT_AEN_SFP_POM_AMBER = 2, /* Warning */ | |
468 | BFA_PORT_AEN_SFP_POM_RED = 3, /* Critical */ | |
469 | BFA_PORT_AEN_SFP_POM_MAX = BFA_PORT_AEN_SFP_POM_RED | |
470 | }; | |
471 | ||
472 | struct bfa_port_aen_data_s { | |
473 | wwn_t pwwn; /* WWN of the physical port */ | |
474 | wwn_t fwwn; /* WWN of the fabric port */ | |
475 | u32 phy_port_num; /* For SFP related events */ | |
476 | u16 ioc_type; | |
477 | u16 level; /* Only transitions will be informed */ | |
478 | mac_t mac; /* MAC address of the ethernet port */ | |
479 | u16 rsvd; | |
480 | }; | |
481 | ||
482 | /* BFA AEN logical port events */ | |
483 | enum bfa_lport_aen_event { | |
484 | BFA_LPORT_AEN_NEW = 1, /* LPort created event */ | |
485 | BFA_LPORT_AEN_DELETE = 2, /* LPort deleted event */ | |
486 | BFA_LPORT_AEN_ONLINE = 3, /* LPort online event */ | |
487 | BFA_LPORT_AEN_OFFLINE = 4, /* LPort offline event */ | |
488 | BFA_LPORT_AEN_DISCONNECT = 5, /* LPort disconnect event */ | |
489 | BFA_LPORT_AEN_NEW_PROP = 6, /* VPort created event */ | |
490 | BFA_LPORT_AEN_DELETE_PROP = 7, /* VPort deleted event */ | |
491 | BFA_LPORT_AEN_NEW_STANDARD = 8, /* VPort created event */ | |
492 | BFA_LPORT_AEN_DELETE_STANDARD = 9, /* VPort deleted event */ | |
493 | BFA_LPORT_AEN_NPIV_DUP_WWN = 10, /* VPort with duplicate WWN */ | |
494 | BFA_LPORT_AEN_NPIV_FABRIC_MAX = 11, /* Max NPIV in fabric/fport */ | |
495 | BFA_LPORT_AEN_NPIV_UNKNOWN = 12, /* Unknown NPIV Error code */ | |
496 | }; | |
497 | ||
498 | struct bfa_lport_aen_data_s { | |
499 | u16 vf_id; /* vf_id of this logical port */ | |
500 | u16 roles; /* Logical port mode,IM/TM/IP etc */ | |
501 | u32 rsvd; | |
502 | wwn_t ppwwn; /* WWN of its physical port */ | |
503 | wwn_t lpwwn; /* WWN of this logical port */ | |
504 | }; | |
505 | ||
506 | /* BFA ITNIM events */ | |
507 | enum bfa_itnim_aen_event { | |
508 | BFA_ITNIM_AEN_ONLINE = 1, /* Target online */ | |
509 | BFA_ITNIM_AEN_OFFLINE = 2, /* Target offline */ | |
510 | BFA_ITNIM_AEN_DISCONNECT = 3, /* Target disconnected */ | |
511 | }; | |
512 | ||
513 | struct bfa_itnim_aen_data_s { | |
514 | u16 vf_id; /* vf_id of the IT nexus */ | |
515 | u16 rsvd[3]; | |
516 | wwn_t ppwwn; /* WWN of its physical port */ | |
517 | wwn_t lpwwn; /* WWN of logical port */ | |
518 | wwn_t rpwwn; /* WWN of remote(target) port */ | |
519 | }; | |
520 | ||
521 | /* BFA audit events */ | |
522 | enum bfa_audit_aen_event { | |
523 | BFA_AUDIT_AEN_AUTH_ENABLE = 1, | |
524 | BFA_AUDIT_AEN_AUTH_DISABLE = 2, | |
525 | BFA_AUDIT_AEN_FLASH_ERASE = 3, | |
526 | BFA_AUDIT_AEN_FLASH_UPDATE = 4, | |
527 | }; | |
528 | ||
529 | struct bfa_audit_aen_data_s { | |
530 | wwn_t pwwn; | |
531 | int partition_inst; | |
532 | int partition_type; | |
533 | }; | |
534 | ||
535 | /* BFA IOC level events */ | |
536 | enum bfa_ioc_aen_event { | |
537 | BFA_IOC_AEN_HBGOOD = 1, /* Heart Beat restore event */ | |
538 | BFA_IOC_AEN_HBFAIL = 2, /* Heart Beat failure event */ | |
539 | BFA_IOC_AEN_ENABLE = 3, /* IOC enabled event */ | |
540 | BFA_IOC_AEN_DISABLE = 4, /* IOC disabled event */ | |
541 | BFA_IOC_AEN_FWMISMATCH = 5, /* IOC firmware mismatch */ | |
542 | BFA_IOC_AEN_FWCFG_ERROR = 6, /* IOC firmware config error */ | |
543 | BFA_IOC_AEN_INVALID_VENDOR = 7, | |
544 | BFA_IOC_AEN_INVALID_NWWN = 8, /* Zero NWWN */ | |
545 | BFA_IOC_AEN_INVALID_PWWN = 9 /* Zero PWWN */ | |
546 | }; | |
547 | ||
548 | struct bfa_ioc_aen_data_s { | |
549 | wwn_t pwwn; | |
550 | u16 ioc_type; | |
551 | mac_t mac; | |
552 | }; | |
553 | ||
acdc79a6 | 554 | /* |
a36c61f9 KG |
555 | * ---------------------- mfg definitions ------------ |
556 | */ | |
557 | ||
acdc79a6 | 558 | /* |
a36c61f9 KG |
559 | * Checksum size |
560 | */ | |
561 | #define BFA_MFG_CHKSUM_SIZE 16 | |
562 | ||
563 | #define BFA_MFG_PARTNUM_SIZE 14 | |
564 | #define BFA_MFG_SUPPLIER_ID_SIZE 10 | |
565 | #define BFA_MFG_SUPPLIER_PARTNUM_SIZE 20 | |
566 | #define BFA_MFG_SUPPLIER_SERIALNUM_SIZE 20 | |
567 | #define BFA_MFG_SUPPLIER_REVISION_SIZE 4 | |
8b070b4a KG |
568 | /* |
569 | * Initial capability definition | |
570 | */ | |
571 | #define BFA_MFG_IC_FC 0x01 | |
572 | #define BFA_MFG_IC_ETH 0x02 | |
a36c61f9 | 573 | |
1a4d8e1b KG |
574 | /* |
575 | * Adapter capability mask definition | |
576 | */ | |
577 | #define BFA_CM_HBA 0x01 | |
578 | #define BFA_CM_CNA 0x02 | |
579 | #define BFA_CM_NIC 0x04 | |
580 | #define BFA_CM_FC16G 0x08 | |
581 | #define BFA_CM_SRIOV 0x10 | |
582 | #define BFA_CM_MEZZ 0x20 | |
583 | ||
a36c61f9 KG |
584 | #pragma pack(1) |
585 | ||
acdc79a6 | 586 | /* |
a36c61f9 KG |
587 | * All numerical fields are in big-endian format. |
588 | */ | |
589 | struct bfa_mfg_block_s { | |
5a54b1d5 KG |
590 | u8 version; /*!< manufacturing block version */ |
591 | u8 mfg_sig[3]; /*!< characters 'M', 'F', 'G' */ | |
592 | u16 mfgsize; /*!< mfg block size */ | |
593 | u16 u16_chksum; /*!< old u16 checksum */ | |
594 | char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)]; | |
595 | char brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)]; | |
596 | u8 mfg_day; /*!< manufacturing day */ | |
597 | u8 mfg_month; /*!< manufacturing month */ | |
598 | u16 mfg_year; /*!< manufacturing year */ | |
599 | wwn_t mfg_wwn; /*!< wwn base for this adapter */ | |
600 | u8 num_wwn; /*!< number of wwns assigned */ | |
601 | u8 mfg_speeds; /*!< speeds allowed for this adapter */ | |
602 | u8 rsv[2]; | |
603 | char supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)]; | |
604 | char supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)]; | |
605 | char supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)]; | |
606 | char supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)]; | |
607 | mac_t mfg_mac; /*!< base mac address */ | |
608 | u8 num_mac; /*!< number of mac addresses */ | |
609 | u8 rsv2; | |
610 | u32 card_type; /*!< card type */ | |
611 | char cap_nic; /*!< capability nic */ | |
612 | char cap_cna; /*!< capability cna */ | |
613 | char cap_hba; /*!< capability hba */ | |
614 | char cap_fc16g; /*!< capability fc 16g */ | |
615 | char cap_sriov; /*!< capability sriov */ | |
616 | char cap_mezz; /*!< capability mezz */ | |
617 | u8 rsv3; | |
618 | u8 mfg_nports; /*!< number of ports */ | |
619 | char media[8]; /*!< xfi/xaui */ | |
620 | char initial_mode[8]; /*!< initial mode: hba/cna/nic */ | |
621 | u8 rsv4[84]; | |
622 | u8 md5_chksum[BFA_MFG_CHKSUM_SIZE]; /*!< md5 checksum */ | |
a36c61f9 KG |
623 | }; |
624 | ||
625 | #pragma pack() | |
626 | ||
acdc79a6 | 627 | /* |
a36c61f9 KG |
628 | * ---------------------- pci definitions ------------ |
629 | */ | |
630 | ||
acdc79a6 | 631 | /* |
a36c61f9 KG |
632 | * PCI device and vendor ID information |
633 | */ | |
634 | enum { | |
635 | BFA_PCI_VENDOR_ID_BROCADE = 0x1657, | |
636 | BFA_PCI_DEVICE_ID_FC_8G2P = 0x13, | |
637 | BFA_PCI_DEVICE_ID_FC_8G1P = 0x17, | |
638 | BFA_PCI_DEVICE_ID_CT = 0x14, | |
639 | BFA_PCI_DEVICE_ID_CT_FC = 0x21, | |
11189208 | 640 | BFA_PCI_DEVICE_ID_CT2 = 0x22, |
f9c867b4 | 641 | BFA_PCI_DEVICE_ID_CT2_QUAD = 0x23, |
a36c61f9 KG |
642 | }; |
643 | ||
11189208 KG |
644 | #define bfa_asic_id_cb(__d) \ |
645 | ((__d) == BFA_PCI_DEVICE_ID_FC_8G2P || \ | |
646 | (__d) == BFA_PCI_DEVICE_ID_FC_8G1P) | |
647 | #define bfa_asic_id_ct(__d) \ | |
648 | ((__d) == BFA_PCI_DEVICE_ID_CT || \ | |
649 | (__d) == BFA_PCI_DEVICE_ID_CT_FC) | |
f9c867b4 VMG |
650 | #define bfa_asic_id_ct2(__d) \ |
651 | ((__d) == BFA_PCI_DEVICE_ID_CT2 || \ | |
652 | (__d) == BFA_PCI_DEVICE_ID_CT2_QUAD) | |
11189208 KG |
653 | #define bfa_asic_id_ctc(__d) \ |
654 | (bfa_asic_id_ct(__d) || bfa_asic_id_ct2(__d)) | |
a36c61f9 | 655 | |
acdc79a6 | 656 | /* |
a36c61f9 KG |
657 | * PCI sub-system device and vendor ID information |
658 | */ | |
659 | enum { | |
660 | BFA_PCI_FCOE_SSDEVICE_ID = 0x14, | |
1a4d8e1b KG |
661 | BFA_PCI_CT2_SSID_FCoE = 0x22, |
662 | BFA_PCI_CT2_SSID_ETH = 0x23, | |
663 | BFA_PCI_CT2_SSID_FC = 0x24, | |
a36c61f9 KG |
664 | }; |
665 | ||
acdc79a6 | 666 | /* |
a36c61f9 KG |
667 | * Maximum number of device address ranges mapped through different BAR(s) |
668 | */ | |
669 | #define BFA_PCI_ACCESS_RANGES 1 | |
670 | ||
671 | /* | |
672 | * Port speed settings. Each specific speed is a bit field. Use multiple | |
673 | * bits to specify speeds to be selected for auto-negotiation. | |
674 | */ | |
675 | enum bfa_port_speed { | |
676 | BFA_PORT_SPEED_UNKNOWN = 0, | |
677 | BFA_PORT_SPEED_1GBPS = 1, | |
678 | BFA_PORT_SPEED_2GBPS = 2, | |
679 | BFA_PORT_SPEED_4GBPS = 4, | |
680 | BFA_PORT_SPEED_8GBPS = 8, | |
681 | BFA_PORT_SPEED_10GBPS = 10, | |
682 | BFA_PORT_SPEED_16GBPS = 16, | |
a714134a | 683 | BFA_PORT_SPEED_AUTO = 0xf, |
a36c61f9 KG |
684 | }; |
685 | #define bfa_port_speed_t enum bfa_port_speed | |
686 | ||
687 | enum { | |
688 | BFA_BOOT_BOOTLUN_MAX = 4, /* maximum boot lun per IOC */ | |
689 | BFA_PREBOOT_BOOTLUN_MAX = 8, /* maximum preboot lun per IOC */ | |
690 | }; | |
691 | ||
692 | #define BOOT_CFG_REV1 1 | |
693 | #define BOOT_CFG_VLAN 1 | |
694 | ||
acdc79a6 | 695 | /* |
a36c61f9 KG |
696 | * Boot options setting. Boot options setting determines from where |
697 | * to get the boot lun information | |
698 | */ | |
699 | enum bfa_boot_bootopt { | |
700 | BFA_BOOT_AUTO_DISCOVER = 0, /* Boot from blun provided by fabric */ | |
701 | BFA_BOOT_STORED_BLUN = 1, /* Boot from bluns stored in flash */ | |
702 | BFA_BOOT_FIRST_LUN = 2, /* Boot from first discovered blun */ | |
703 | BFA_BOOT_PBC = 3, /* Boot from pbc configured blun */ | |
704 | }; | |
705 | ||
706 | #pragma pack(1) | |
acdc79a6 | 707 | /* |
a36c61f9 KG |
708 | * Boot lun information. |
709 | */ | |
710 | struct bfa_boot_bootlun_s { | |
f314878a MZ |
711 | wwn_t pwwn; /* port wwn of target */ |
712 | struct scsi_lun lun; /* 64-bit lun */ | |
a36c61f9 KG |
713 | }; |
714 | #pragma pack() | |
715 | ||
acdc79a6 | 716 | /* |
a36c61f9 KG |
717 | * BOOT boot configuraton |
718 | */ | |
a46bd300 KG |
719 | struct bfa_boot_cfg_s { |
720 | u8 version; | |
721 | u8 rsvd1; | |
722 | u16 chksum; | |
723 | u8 enable; /* enable/disable SAN boot */ | |
724 | u8 speed; /* boot speed settings */ | |
725 | u8 topology; /* boot topology setting */ | |
726 | u8 bootopt; /* bfa_boot_bootopt_t */ | |
727 | u32 nbluns; /* number of boot luns */ | |
728 | u32 rsvd2; | |
729 | struct bfa_boot_bootlun_s blun[BFA_BOOT_BOOTLUN_MAX]; | |
730 | struct bfa_boot_bootlun_s blun_disc[BFA_BOOT_BOOTLUN_MAX]; | |
731 | }; | |
732 | ||
a36c61f9 KG |
733 | struct bfa_boot_pbc_s { |
734 | u8 enable; /* enable/disable SAN boot */ | |
735 | u8 speed; /* boot speed settings */ | |
736 | u8 topology; /* boot topology setting */ | |
737 | u8 rsvd1; | |
738 | u32 nbluns; /* number of boot luns */ | |
739 | struct bfa_boot_bootlun_s pblun[BFA_PREBOOT_BOOTLUN_MAX]; | |
740 | }; | |
741 | ||
a46bd300 KG |
742 | struct bfa_ethboot_cfg_s { |
743 | u8 version; | |
744 | u8 rsvd1; | |
745 | u16 chksum; | |
746 | u8 enable; /* enable/disable Eth/PXE boot */ | |
747 | u8 rsvd2; | |
748 | u16 vlan; | |
749 | }; | |
750 | ||
1a4d8e1b KG |
751 | /* |
752 | * ASIC block configuration related structures | |
753 | */ | |
754 | #define BFA_ABLK_MAX_PORTS 2 | |
755 | #define BFA_ABLK_MAX_PFS 16 | |
756 | #define BFA_ABLK_MAX 2 | |
757 | ||
758 | #pragma pack(1) | |
759 | enum bfa_mode_s { | |
760 | BFA_MODE_HBA = 1, | |
761 | BFA_MODE_CNA = 2, | |
762 | BFA_MODE_NIC = 3 | |
763 | }; | |
764 | ||
765 | struct bfa_adapter_cfg_mode_s { | |
766 | u16 max_pf; | |
767 | u16 max_vf; | |
768 | enum bfa_mode_s mode; | |
769 | }; | |
770 | ||
771 | struct bfa_ablk_cfg_pf_s { | |
772 | u16 pers; | |
773 | u8 port_id; | |
774 | u8 optrom; | |
775 | u8 valid; | |
776 | u8 sriov; | |
777 | u8 max_vfs; | |
778 | u8 rsvd[1]; | |
779 | u16 num_qpairs; | |
780 | u16 num_vectors; | |
1a1297c6 KG |
781 | u16 bw_min; |
782 | u16 bw_max; | |
1a4d8e1b KG |
783 | }; |
784 | ||
785 | struct bfa_ablk_cfg_port_s { | |
786 | u8 mode; | |
787 | u8 type; | |
788 | u8 max_pfs; | |
789 | u8 rsvd[5]; | |
790 | }; | |
791 | ||
792 | struct bfa_ablk_cfg_inst_s { | |
793 | u8 nports; | |
794 | u8 max_pfs; | |
795 | u8 rsvd[6]; | |
796 | struct bfa_ablk_cfg_pf_s pf_cfg[BFA_ABLK_MAX_PFS]; | |
797 | struct bfa_ablk_cfg_port_s port_cfg[BFA_ABLK_MAX_PORTS]; | |
798 | }; | |
799 | ||
800 | struct bfa_ablk_cfg_s { | |
801 | struct bfa_ablk_cfg_inst_s inst[BFA_ABLK_MAX]; | |
802 | }; | |
51e569aa KG |
803 | |
804 | ||
805 | /* | |
806 | * SFP module specific | |
807 | */ | |
808 | #define SFP_DIAGMON_SIZE 10 /* num bytes of diag monitor data */ | |
809 | ||
7826f304 KG |
810 | /* SFP state change notification event */ |
811 | #define BFA_SFP_SCN_REMOVED 0 | |
812 | #define BFA_SFP_SCN_INSERTED 1 | |
813 | #define BFA_SFP_SCN_POM 2 | |
814 | #define BFA_SFP_SCN_FAILED 3 | |
815 | #define BFA_SFP_SCN_UNSUPPORT 4 | |
816 | #define BFA_SFP_SCN_VALID 5 | |
817 | ||
51e569aa KG |
818 | enum bfa_defs_sfp_media_e { |
819 | BFA_SFP_MEDIA_UNKNOWN = 0x00, | |
820 | BFA_SFP_MEDIA_CU = 0x01, | |
821 | BFA_SFP_MEDIA_LW = 0x02, | |
822 | BFA_SFP_MEDIA_SW = 0x03, | |
823 | BFA_SFP_MEDIA_EL = 0x04, | |
824 | BFA_SFP_MEDIA_UNSUPPORT = 0x05, | |
825 | }; | |
826 | ||
827 | /* | |
828 | * values for xmtr_tech above | |
829 | */ | |
830 | enum { | |
831 | SFP_XMTR_TECH_CU = (1 << 0), /* copper FC-BaseT */ | |
832 | SFP_XMTR_TECH_CP = (1 << 1), /* copper passive */ | |
833 | SFP_XMTR_TECH_CA = (1 << 2), /* copper active */ | |
834 | SFP_XMTR_TECH_LL = (1 << 3), /* longwave laser */ | |
835 | SFP_XMTR_TECH_SL = (1 << 4), /* shortwave laser w/ OFC */ | |
836 | SFP_XMTR_TECH_SN = (1 << 5), /* shortwave laser w/o OFC */ | |
837 | SFP_XMTR_TECH_EL_INTRA = (1 << 6), /* elec intra-enclosure */ | |
838 | SFP_XMTR_TECH_EL_INTER = (1 << 7), /* elec inter-enclosure */ | |
839 | SFP_XMTR_TECH_LC = (1 << 8), /* longwave laser */ | |
840 | SFP_XMTR_TECH_SA = (1 << 9) | |
841 | }; | |
842 | ||
843 | /* | |
844 | * Serial ID: Data Fields -- Address A0h | |
845 | * Basic ID field total 64 bytes | |
846 | */ | |
847 | struct sfp_srlid_base_s { | |
848 | u8 id; /* 00: Identifier */ | |
849 | u8 extid; /* 01: Extended Identifier */ | |
850 | u8 connector; /* 02: Connector */ | |
851 | u8 xcvr[8]; /* 03-10: Transceiver */ | |
852 | u8 encoding; /* 11: Encoding */ | |
853 | u8 br_norm; /* 12: BR, Nominal */ | |
854 | u8 rate_id; /* 13: Rate Identifier */ | |
855 | u8 len_km; /* 14: Length single mode km */ | |
856 | u8 len_100m; /* 15: Length single mode 100m */ | |
857 | u8 len_om2; /* 16: Length om2 fiber 10m */ | |
858 | u8 len_om1; /* 17: Length om1 fiber 10m */ | |
859 | u8 len_cu; /* 18: Length copper 1m */ | |
860 | u8 len_om3; /* 19: Length om3 fiber 10m */ | |
861 | u8 vendor_name[16];/* 20-35 */ | |
862 | u8 unalloc1; | |
863 | u8 vendor_oui[3]; /* 37-39 */ | |
864 | u8 vendor_pn[16]; /* 40-55 */ | |
865 | u8 vendor_rev[4]; /* 56-59 */ | |
866 | u8 wavelen[2]; /* 60-61 */ | |
867 | u8 unalloc2; | |
868 | u8 cc_base; /* 63: check code for base id field */ | |
869 | }; | |
870 | ||
871 | /* | |
872 | * Serial ID: Data Fields -- Address A0h | |
873 | * Extended id field total 32 bytes | |
874 | */ | |
875 | struct sfp_srlid_ext_s { | |
876 | u8 options[2]; | |
877 | u8 br_max; | |
878 | u8 br_min; | |
879 | u8 vendor_sn[16]; | |
880 | u8 date_code[8]; | |
881 | u8 diag_mon_type; /* 92: Diagnostic Monitoring type */ | |
882 | u8 en_options; | |
883 | u8 sff_8472; | |
884 | u8 cc_ext; | |
885 | }; | |
886 | ||
887 | /* | |
888 | * Diagnostic: Data Fields -- Address A2h | |
889 | * Diagnostic and control/status base field total 96 bytes | |
890 | */ | |
891 | struct sfp_diag_base_s { | |
892 | /* | |
893 | * Alarm and warning Thresholds 40 bytes | |
894 | */ | |
895 | u8 temp_high_alarm[2]; /* 00-01 */ | |
896 | u8 temp_low_alarm[2]; /* 02-03 */ | |
897 | u8 temp_high_warning[2]; /* 04-05 */ | |
898 | u8 temp_low_warning[2]; /* 06-07 */ | |
899 | ||
900 | u8 volt_high_alarm[2]; /* 08-09 */ | |
901 | u8 volt_low_alarm[2]; /* 10-11 */ | |
902 | u8 volt_high_warning[2]; /* 12-13 */ | |
903 | u8 volt_low_warning[2]; /* 14-15 */ | |
904 | ||
905 | u8 bias_high_alarm[2]; /* 16-17 */ | |
906 | u8 bias_low_alarm[2]; /* 18-19 */ | |
907 | u8 bias_high_warning[2]; /* 20-21 */ | |
908 | u8 bias_low_warning[2]; /* 22-23 */ | |
909 | ||
910 | u8 tx_pwr_high_alarm[2]; /* 24-25 */ | |
911 | u8 tx_pwr_low_alarm[2]; /* 26-27 */ | |
912 | u8 tx_pwr_high_warning[2]; /* 28-29 */ | |
913 | u8 tx_pwr_low_warning[2]; /* 30-31 */ | |
914 | ||
915 | u8 rx_pwr_high_alarm[2]; /* 32-33 */ | |
916 | u8 rx_pwr_low_alarm[2]; /* 34-35 */ | |
917 | u8 rx_pwr_high_warning[2]; /* 36-37 */ | |
918 | u8 rx_pwr_low_warning[2]; /* 38-39 */ | |
919 | ||
920 | u8 unallocate_1[16]; | |
921 | ||
922 | /* | |
923 | * ext_cal_const[36] | |
924 | */ | |
925 | u8 rx_pwr[20]; | |
926 | u8 tx_i[4]; | |
927 | u8 tx_pwr[4]; | |
928 | u8 temp[4]; | |
929 | u8 volt[4]; | |
930 | u8 unallocate_2[3]; | |
931 | u8 cc_dmi; | |
932 | }; | |
933 | ||
934 | /* | |
935 | * Diagnostic: Data Fields -- Address A2h | |
936 | * Diagnostic and control/status extended field total 24 bytes | |
937 | */ | |
938 | struct sfp_diag_ext_s { | |
939 | u8 diag[SFP_DIAGMON_SIZE]; | |
940 | u8 unalloc1[4]; | |
941 | u8 status_ctl; | |
942 | u8 rsvd; | |
943 | u8 alarm_flags[2]; | |
944 | u8 unalloc2[2]; | |
945 | u8 warning_flags[2]; | |
946 | u8 ext_status_ctl[2]; | |
947 | }; | |
948 | ||
4a49b044 KG |
949 | /* |
950 | * Diagnostic: Data Fields -- Address A2h | |
951 | * General Use Fields: User Writable Table - Features's Control Registers | |
952 | * Total 32 bytes | |
953 | */ | |
954 | struct sfp_usr_eeprom_s { | |
955 | u8 rsvd1[2]; /* 128-129 */ | |
956 | u8 ewrap; /* 130 */ | |
957 | u8 rsvd2[2]; /* */ | |
958 | u8 owrap; /* 133 */ | |
959 | u8 rsvd3[2]; /* */ | |
960 | u8 prbs; /* 136: PRBS 7 generator */ | |
961 | u8 rsvd4[2]; /* */ | |
962 | u8 tx_eqz_16; /* 139: TX Equalizer (16xFC) */ | |
963 | u8 tx_eqz_8; /* 140: TX Equalizer (8xFC) */ | |
964 | u8 rsvd5[2]; /* */ | |
965 | u8 rx_emp_16; /* 143: RX Emphasis (16xFC) */ | |
966 | u8 rx_emp_8; /* 144: RX Emphasis (8xFC) */ | |
967 | u8 rsvd6[2]; /* */ | |
968 | u8 tx_eye_adj; /* 147: TX eye Threshold Adjust */ | |
969 | u8 rsvd7[3]; /* */ | |
970 | u8 tx_eye_qctl; /* 151: TX eye Quality Control */ | |
971 | u8 tx_eye_qres; /* 152: TX eye Quality Result */ | |
972 | u8 rsvd8[2]; /* */ | |
973 | u8 poh[3]; /* 155-157: Power On Hours */ | |
974 | u8 rsvd9[2]; /* */ | |
975 | }; | |
976 | ||
51e569aa KG |
977 | struct sfp_mem_s { |
978 | struct sfp_srlid_base_s srlid_base; | |
979 | struct sfp_srlid_ext_s srlid_ext; | |
980 | struct sfp_diag_base_s diag_base; | |
981 | struct sfp_diag_ext_s diag_ext; | |
4a49b044 | 982 | struct sfp_usr_eeprom_s usr_eeprom; |
51e569aa KG |
983 | }; |
984 | ||
985 | /* | |
986 | * transceiver codes (SFF-8472 Rev 10.2 Table 3.5) | |
987 | */ | |
988 | union sfp_xcvr_e10g_code_u { | |
989 | u8 b; | |
990 | struct { | |
98cdfb43 | 991 | #ifdef __BIG_ENDIAN |
51e569aa KG |
992 | u8 e10g_unall:1; /* 10G Ethernet compliance */ |
993 | u8 e10g_lrm:1; | |
994 | u8 e10g_lr:1; | |
995 | u8 e10g_sr:1; | |
996 | u8 ib_sx:1; /* Infiniband compliance */ | |
997 | u8 ib_lx:1; | |
998 | u8 ib_cu_a:1; | |
999 | u8 ib_cu_p:1; | |
1000 | #else | |
1001 | u8 ib_cu_p:1; | |
1002 | u8 ib_cu_a:1; | |
1003 | u8 ib_lx:1; | |
1004 | u8 ib_sx:1; /* Infiniband compliance */ | |
1005 | u8 e10g_sr:1; | |
1006 | u8 e10g_lr:1; | |
1007 | u8 e10g_lrm:1; | |
1008 | u8 e10g_unall:1; /* 10G Ethernet compliance */ | |
1009 | #endif | |
1010 | } r; | |
1011 | }; | |
1012 | ||
1013 | union sfp_xcvr_so1_code_u { | |
1014 | u8 b; | |
1015 | struct { | |
1016 | u8 escon:2; /* ESCON compliance code */ | |
1017 | u8 oc192_reach:1; /* SONET compliance code */ | |
1018 | u8 so_reach:2; | |
1019 | u8 oc48_reach:3; | |
1020 | } r; | |
1021 | }; | |
1022 | ||
1023 | union sfp_xcvr_so2_code_u { | |
1024 | u8 b; | |
1025 | struct { | |
1026 | u8 reserved:1; | |
1027 | u8 oc12_reach:3; /* OC12 reach */ | |
1028 | u8 reserved1:1; | |
1029 | u8 oc3_reach:3; /* OC3 reach */ | |
1030 | } r; | |
1031 | }; | |
1032 | ||
1033 | union sfp_xcvr_eth_code_u { | |
1034 | u8 b; | |
1035 | struct { | |
1036 | u8 base_px:1; | |
1037 | u8 base_bx10:1; | |
1038 | u8 e100base_fx:1; | |
1039 | u8 e100base_lx:1; | |
1040 | u8 e1000base_t:1; | |
1041 | u8 e1000base_cx:1; | |
1042 | u8 e1000base_lx:1; | |
1043 | u8 e1000base_sx:1; | |
1044 | } r; | |
1045 | }; | |
1046 | ||
1047 | struct sfp_xcvr_fc1_code_s { | |
1048 | u8 link_len:5; /* FC link length */ | |
1049 | u8 xmtr_tech2:3; | |
1050 | u8 xmtr_tech1:7; /* FC transmitter technology */ | |
1051 | u8 reserved1:1; | |
1052 | }; | |
1053 | ||
1054 | union sfp_xcvr_fc2_code_u { | |
1055 | u8 b; | |
1056 | struct { | |
1057 | u8 tw_media:1; /* twin axial pair (tw) */ | |
1058 | u8 tp_media:1; /* shielded twisted pair (sp) */ | |
1059 | u8 mi_media:1; /* miniature coax (mi) */ | |
1060 | u8 tv_media:1; /* video coax (tv) */ | |
1061 | u8 m6_media:1; /* multimode, 62.5m (m6) */ | |
1062 | u8 m5_media:1; /* multimode, 50m (m5) */ | |
1063 | u8 reserved:1; | |
1064 | u8 sm_media:1; /* single mode (sm) */ | |
1065 | } r; | |
1066 | }; | |
1067 | ||
1068 | union sfp_xcvr_fc3_code_u { | |
1069 | u8 b; | |
1070 | struct { | |
98cdfb43 | 1071 | #ifdef __BIG_ENDIAN |
51e569aa KG |
1072 | u8 rsv4:1; |
1073 | u8 mb800:1; /* 800 Mbytes/sec */ | |
1074 | u8 mb1600:1; /* 1600 Mbytes/sec */ | |
1075 | u8 mb400:1; /* 400 Mbytes/sec */ | |
1076 | u8 rsv2:1; | |
1077 | u8 mb200:1; /* 200 Mbytes/sec */ | |
1078 | u8 rsv1:1; | |
1079 | u8 mb100:1; /* 100 Mbytes/sec */ | |
1080 | #else | |
1081 | u8 mb100:1; /* 100 Mbytes/sec */ | |
1082 | u8 rsv1:1; | |
1083 | u8 mb200:1; /* 200 Mbytes/sec */ | |
1084 | u8 rsv2:1; | |
1085 | u8 mb400:1; /* 400 Mbytes/sec */ | |
1086 | u8 mb1600:1; /* 1600 Mbytes/sec */ | |
1087 | u8 mb800:1; /* 800 Mbytes/sec */ | |
1088 | u8 rsv4:1; | |
1089 | #endif | |
1090 | } r; | |
1091 | }; | |
1092 | ||
1093 | struct sfp_xcvr_s { | |
1094 | union sfp_xcvr_e10g_code_u e10g; | |
1095 | union sfp_xcvr_so1_code_u so1; | |
1096 | union sfp_xcvr_so2_code_u so2; | |
1097 | union sfp_xcvr_eth_code_u eth; | |
1098 | struct sfp_xcvr_fc1_code_s fc1; | |
1099 | union sfp_xcvr_fc2_code_u fc2; | |
1100 | union sfp_xcvr_fc3_code_u fc3; | |
1101 | }; | |
1102 | ||
5a54b1d5 KG |
1103 | /* |
1104 | * Flash module specific | |
1105 | */ | |
1106 | #define BFA_FLASH_PART_ENTRY_SIZE 32 /* partition entry size */ | |
1107 | #define BFA_FLASH_PART_MAX 32 /* maximal # of partitions */ | |
1108 | ||
1109 | enum bfa_flash_part_type { | |
1110 | BFA_FLASH_PART_OPTROM = 1, /* option rom partition */ | |
1111 | BFA_FLASH_PART_FWIMG = 2, /* firmware image partition */ | |
1112 | BFA_FLASH_PART_FWCFG = 3, /* firmware tuneable config */ | |
1113 | BFA_FLASH_PART_DRV = 4, /* IOC driver config */ | |
1114 | BFA_FLASH_PART_BOOT = 5, /* boot config */ | |
1115 | BFA_FLASH_PART_ASIC = 6, /* asic bootstrap configuration */ | |
1116 | BFA_FLASH_PART_MFG = 7, /* manufacturing block partition */ | |
1117 | BFA_FLASH_PART_OPTROM2 = 8, /* 2nd option rom partition */ | |
1118 | BFA_FLASH_PART_VPD = 9, /* vpd data of OEM info */ | |
1119 | BFA_FLASH_PART_PBC = 10, /* pre-boot config */ | |
1120 | BFA_FLASH_PART_BOOTOVL = 11, /* boot overlay partition */ | |
1121 | BFA_FLASH_PART_LOG = 12, /* firmware log partition */ | |
1122 | BFA_FLASH_PART_PXECFG = 13, /* pxe boot config partition */ | |
1123 | BFA_FLASH_PART_PXEOVL = 14, /* pxe boot overlay partition */ | |
1124 | BFA_FLASH_PART_PORTCFG = 15, /* port cfg partition */ | |
1125 | BFA_FLASH_PART_ASICBK = 16, /* asic backup partition */ | |
1126 | }; | |
1127 | ||
1128 | /* | |
1129 | * flash partition attributes | |
1130 | */ | |
1131 | struct bfa_flash_part_attr_s { | |
1132 | u32 part_type; /* partition type */ | |
1133 | u32 part_instance; /* partition instance */ | |
1134 | u32 part_off; /* partition offset */ | |
1135 | u32 part_size; /* partition size */ | |
1136 | u32 part_len; /* partition content length */ | |
1137 | u32 part_status; /* partition status */ | |
1138 | char rsv[BFA_FLASH_PART_ENTRY_SIZE - 24]; | |
1139 | }; | |
1140 | ||
1141 | /* | |
1142 | * flash attributes | |
1143 | */ | |
1144 | struct bfa_flash_attr_s { | |
1145 | u32 status; /* flash overall status */ | |
1146 | u32 npart; /* num of partitions */ | |
1147 | struct bfa_flash_part_attr_s part[BFA_FLASH_PART_MAX]; | |
1148 | }; | |
1149 | ||
3d7fc66d KG |
1150 | /* |
1151 | * DIAG module specific | |
1152 | */ | |
1153 | #define LB_PATTERN_DEFAULT 0xB5B5B5B5 | |
1154 | #define QTEST_CNT_DEFAULT 10 | |
1155 | #define QTEST_PAT_DEFAULT LB_PATTERN_DEFAULT | |
1a898a79 | 1156 | #define DPORT_ENABLE_LOOPCNT_DEFAULT (1024 * 1024) |
3d7fc66d KG |
1157 | |
1158 | struct bfa_diag_memtest_s { | |
1159 | u8 algo; | |
1160 | u8 rsvd[7]; | |
1161 | }; | |
1162 | ||
1163 | struct bfa_diag_memtest_result { | |
1164 | u32 status; | |
1165 | u32 addr; | |
1166 | u32 exp; /* expect value read from reg */ | |
1167 | u32 act; /* actually value read */ | |
1168 | u32 err_status; /* error status reg */ | |
1169 | u32 err_status1; /* extra error info reg */ | |
1170 | u32 err_addr; /* error address reg */ | |
1171 | u8 algo; | |
1172 | u8 rsv[3]; | |
1173 | }; | |
1174 | ||
1175 | struct bfa_diag_loopback_result_s { | |
1176 | u32 numtxmfrm; /* no. of transmit frame */ | |
1177 | u32 numosffrm; /* no. of outstanding frame */ | |
1178 | u32 numrcvfrm; /* no. of received good frame */ | |
1179 | u32 badfrminf; /* mis-match info */ | |
1180 | u32 badfrmnum; /* mis-match fram number */ | |
1181 | u8 status; /* loopback test result */ | |
1182 | u8 rsvd[3]; | |
1183 | }; | |
1184 | ||
1a898a79 VMG |
1185 | enum bfa_diag_dport_test_status { |
1186 | DPORT_TEST_ST_IDLE = 0, /* the test has not started yet. */ | |
1187 | DPORT_TEST_ST_FINAL = 1, /* the test done successfully */ | |
1188 | DPORT_TEST_ST_SKIP = 2, /* the test skipped */ | |
1189 | DPORT_TEST_ST_FAIL = 3, /* the test failed */ | |
1190 | DPORT_TEST_ST_INPRG = 4, /* the testing is in progress */ | |
1191 | DPORT_TEST_ST_RESPONDER = 5, /* test triggered from remote port */ | |
1192 | DPORT_TEST_ST_STOPPED = 6, /* the test stopped by user. */ | |
1193 | DPORT_TEST_ST_MAX | |
1194 | }; | |
1195 | ||
1196 | enum bfa_diag_dport_test_type { | |
1197 | DPORT_TEST_ELOOP = 0, | |
1198 | DPORT_TEST_OLOOP = 1, | |
1199 | DPORT_TEST_ROLOOP = 2, | |
1200 | DPORT_TEST_LINK = 3, | |
1201 | DPORT_TEST_MAX | |
1202 | }; | |
1203 | ||
1204 | enum bfa_diag_dport_test_opmode { | |
1205 | BFA_DPORT_OPMODE_AUTO = 0, | |
1206 | BFA_DPORT_OPMODE_MANU = 1, | |
1207 | }; | |
1208 | ||
1209 | struct bfa_diag_dport_subtest_result_s { | |
1210 | u8 status; /* bfa_diag_dport_test_status */ | |
1211 | u8 rsvd[7]; /* 64bit align */ | |
1212 | u64 start_time; /* timestamp */ | |
1213 | }; | |
1214 | ||
1215 | struct bfa_diag_dport_result_s { | |
1216 | wwn_t rp_pwwn; /* switch port wwn */ | |
1217 | wwn_t rp_nwwn; /* switch node wwn */ | |
1218 | u64 start_time; /* user/sw start time */ | |
1219 | u64 end_time; /* timestamp */ | |
1220 | u8 status; /* bfa_diag_dport_test_status */ | |
1221 | u8 mode; /* bfa_diag_dport_test_opmode */ | |
1222 | u8 rsvd; /* 64bit align */ | |
1223 | u8 speed; /* link speed for buf_reqd */ | |
1224 | u16 buffer_required; | |
1225 | u16 frmsz; /* frame size for buf_reqd */ | |
1226 | u32 lpcnt; /* Frame count */ | |
1227 | u32 pat; /* Pattern */ | |
1228 | u32 roundtrip_latency; /* in nano sec */ | |
1229 | u32 est_cable_distance; /* in meter */ | |
1230 | struct bfa_diag_dport_subtest_result_s subtest[DPORT_TEST_MAX]; | |
1231 | }; | |
1232 | ||
3d7fc66d KG |
1233 | struct bfa_diag_ledtest_s { |
1234 | u32 cmd; /* bfa_led_op_t */ | |
1235 | u32 color; /* bfa_led_color_t */ | |
1236 | u16 freq; /* no. of blinks every 10 secs */ | |
1237 | u8 led; /* bitmap of LEDs to be tested */ | |
1238 | u8 rsvd[5]; | |
1239 | }; | |
1240 | ||
1241 | struct bfa_diag_loopback_s { | |
1242 | u32 loopcnt; | |
1243 | u32 pattern; | |
1244 | u8 lb_mode; /* bfa_port_opmode_t */ | |
1245 | u8 speed; /* bfa_port_speed_t */ | |
1246 | u8 rsvd[2]; | |
1247 | }; | |
1248 | ||
3350d98d KG |
1249 | /* |
1250 | * PHY module specific | |
1251 | */ | |
1252 | enum bfa_phy_status_e { | |
1253 | BFA_PHY_STATUS_GOOD = 0, /* phy is good */ | |
1254 | BFA_PHY_STATUS_NOT_PRESENT = 1, /* phy does not exist */ | |
1255 | BFA_PHY_STATUS_BAD = 2, /* phy is bad */ | |
1256 | }; | |
1257 | ||
1258 | /* | |
1259 | * phy attributes for phy query | |
1260 | */ | |
1261 | struct bfa_phy_attr_s { | |
1262 | u32 status; /* phy present/absent status */ | |
1263 | u32 length; /* firmware length */ | |
1264 | u32 fw_ver; /* firmware version */ | |
1265 | u32 an_status; /* AN status */ | |
1266 | u32 pma_pmd_status; /* PMA/PMD link status */ | |
1267 | u32 pma_pmd_signal; /* PMA/PMD signal detect */ | |
1268 | u32 pcs_status; /* PCS link status */ | |
1269 | }; | |
1270 | ||
1271 | /* | |
1272 | * phy stats | |
1273 | */ | |
1274 | struct bfa_phy_stats_s { | |
1275 | u32 status; /* phy stats status */ | |
1276 | u32 link_breaks; /* Num of link breaks after linkup */ | |
1277 | u32 pma_pmd_fault; /* NPMA/PMD fault */ | |
1278 | u32 pcs_fault; /* PCS fault */ | |
1279 | u32 speed_neg; /* Num of speed negotiation */ | |
1280 | u32 tx_eq_training; /* Num of TX EQ training */ | |
1281 | u32 tx_eq_timeout; /* Num of TX EQ timeout */ | |
1282 | u32 crc_error; /* Num of CRC errors */ | |
1283 | }; | |
1284 | ||
1a4d8e1b KG |
1285 | #pragma pack() |
1286 | ||
a36c61f9 | 1287 | #endif /* __BFA_DEFS_H__ */ |