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Merge tag 'configfs-for-linus-2' of git://git.infradead.org/users/hch/configfs
[linux-2.6-block.git] / drivers / scsi / bfa / bfa.h
CommitLineData
a36c61f9 1/*
889d0d42
AG		 2 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
3 * Copyright (c) 2014- QLogic Corporation.
a36c61f9 4 * All rights reserved
889d0d42 5 * www.qlogic.com
a36c61f9 6 *
31e1d569 7 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
a36c61f9
KG		 8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License (GPL) Version 2 as
11 * published by the Free Software Foundation
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18#ifndef __BFA_H__
19#define __BFA_H__
20
f16a1750 21#include "bfad_drv.h"
a36c61f9
KG		 22#include "bfa_cs.h"
23#include "bfa_plog.h"
24#include "bfa_defs_svc.h"
25#include "bfi.h"
26#include "bfa_ioc.h"
27
28struct bfa_s;
29
30typedef void (*bfa_isr_func_t) (struct bfa_s *bfa, struct bfi_msg_s *m);
37ea0558 31typedef void (*bfa_cb_cbfn_status_t) (void *cbarg, bfa_status_t status);
a36c61f9 32
acdc79a6 33/*
a36c61f9
KG		 34 * Interrupt message handlers
35 */
36void bfa_isr_unhandled(struct bfa_s *bfa, struct bfi_msg_s *m);
a36c61f9 37
acdc79a6 38/*
a36c61f9
KG		 39 * Request and response queue related defines
40 */
41#define BFA_REQQ_NELEMS_MIN (4)
42#define BFA_RSPQ_NELEMS_MIN (4)
43
44#define bfa_reqq_pi(__bfa, __reqq) ((__bfa)->iocfc.req_cq_pi[__reqq])
45#define bfa_reqq_ci(__bfa, __reqq) \
46 (*(u32 *)((__bfa)->iocfc.req_cq_shadow_ci[__reqq].kva))
47
48#define bfa_reqq_full(__bfa, __reqq) \
49 (((bfa_reqq_pi(__bfa, __reqq) + 1) & \
50 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1)) == \
51 bfa_reqq_ci(__bfa, __reqq))
52
53#define bfa_reqq_next(__bfa, __reqq) \
54 (bfa_reqq_full(__bfa, __reqq) ? NULL : \
55 ((void *)((struct bfi_msg_s *)((__bfa)->iocfc.req_cq_ba[__reqq].kva) \
56 + bfa_reqq_pi((__bfa), (__reqq)))))
57
3fd45980
KG		 58#define bfa_reqq_produce(__bfa, __reqq, __mh) do { \
59 (__mh).mtag.h2i.qid = (__bfa)->iocfc.hw_qid[__reqq];\
a36c61f9
KG		 60 (__bfa)->iocfc.req_cq_pi[__reqq]++; \
61 (__bfa)->iocfc.req_cq_pi[__reqq] &= \
acdc79a6
JH		 62 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \
63 writel((__bfa)->iocfc.req_cq_pi[__reqq], \
53440260 64 (__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq]); \
a36c61f9
KG		 65 mmiowb(); \
66 } while (0)
67
68#define bfa_rspq_pi(__bfa, __rspq) \
69 (*(u32 *)((__bfa)->iocfc.rsp_cq_shadow_pi[__rspq].kva))
70
71#define bfa_rspq_ci(__bfa, __rspq) ((__bfa)->iocfc.rsp_cq_ci[__rspq])
72#define bfa_rspq_elem(__bfa, __rspq, __ci) \
73 (&((struct bfi_msg_s *)((__bfa)->iocfc.rsp_cq_ba[__rspq].kva))[__ci])
74
75#define CQ_INCR(__index, __size) do { \
76 (__index)++; \
77 (__index) &= ((__size) - 1); \
78} while (0)
79
acdc79a6 80/*
a36c61f9
KG		 81 * Circular queue usage assignments
82 */
83enum {
84 BFA_REQQ_IOC = 0, /* all low-priority IOC msgs */
85 BFA_REQQ_FCXP = 0, /* all FCXP messages */
86 BFA_REQQ_LPS = 0, /* all lport service msgs */
87 BFA_REQQ_PORT = 0, /* all port messages */
88 BFA_REQQ_FLASH = 0, /* for flash module */
89 BFA_REQQ_DIAG = 0, /* for diag module */
90 BFA_REQQ_RPORT = 0, /* all port messages */
91 BFA_REQQ_SBOOT = 0, /* all san boot messages */
92 BFA_REQQ_QOS_LO = 1, /* all low priority IO */
93 BFA_REQQ_QOS_MD = 2, /* all medium priority IO */
94 BFA_REQQ_QOS_HI = 3, /* all high priority IO */
95};
96
97static inline void
98bfa_reqq_winit(struct bfa_reqq_wait_s *wqe, void (*qresume) (void *cbarg),
99 void *cbarg)
100{
101 wqe->qresume = qresume;
102 wqe->cbarg = cbarg;
103}
104
105#define bfa_reqq(__bfa, __reqq) (&(__bfa)->reqq_waitq[__reqq])
106
acdc79a6 107/*
a36c61f9
KG		 108 * static inline void
109 * bfa_reqq_wait(struct bfa_s *bfa, int reqq, struct bfa_reqq_wait_s *wqe)
110 */
111#define bfa_reqq_wait(__bfa, __reqq, __wqe) do { \
112 \
113 struct list_head *waitq = bfa_reqq(__bfa, __reqq); \
114 \
d4b671c5
JH		 115 WARN_ON(((__reqq) >= BFI_IOC_MAX_CQS)); \
116 WARN_ON(!((__wqe)->qresume && (__wqe)->cbarg)); \
a36c61f9
KG		 117 \
118 list_add_tail(&(__wqe)->qe, waitq); \
119 } while (0)
120
121#define bfa_reqq_wcancel(__wqe) list_del(&(__wqe)->qe)
122
a36c61f9
KG		 123#define bfa_cb_queue(__bfa, __hcb_qe, __cbfn, __cbarg) do { \
124 (__hcb_qe)->cbfn = (__cbfn); \
125 (__hcb_qe)->cbarg = (__cbarg); \
37ea0558 126 (__hcb_qe)->pre_rmv = BFA_FALSE; \
a36c61f9
KG		 127 list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q); \
128 } while (0)
129
130#define bfa_cb_dequeue(__hcb_qe) list_del(&(__hcb_qe)->qe)
131
132#define bfa_cb_queue_once(__bfa, __hcb_qe, __cbfn, __cbarg) do { \
133 (__hcb_qe)->cbfn = (__cbfn); \
134 (__hcb_qe)->cbarg = (__cbarg); \
135 if (!(__hcb_qe)->once) { \
136 list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q); \
137 (__hcb_qe)->once = BFA_TRUE; \
138 } \
139 } while (0)
140
37ea0558
KG		 141#define bfa_cb_queue_status(__bfa, __hcb_qe, __status) do { \
142 (__hcb_qe)->fw_status = (__status); \
143 list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q); \
144} while (0)
145
a36c61f9
KG		 146#define bfa_cb_queue_done(__hcb_qe) do { \
147 (__hcb_qe)->once = BFA_FALSE; \
148 } while (0)
149
150
acdc79a6 151/*
a36c61f9
KG		 152 * PCI devices supported by the current BFA
153 */
154struct bfa_pciid_s {
155 u16 device_id;
156 u16 vendor_id;
157};
158
159extern char bfa_version[];
160
a36c61f9 161struct bfa_iocfc_regs_s {
53440260 162 void __iomem *intr_status;
acdc79a6 163 void __iomem *intr_mask;
53440260
JH		 164 void __iomem *cpe_q_pi[BFI_IOC_MAX_CQS];
165 void __iomem *cpe_q_ci[BFI_IOC_MAX_CQS];
53440260
JH		 166 void __iomem *cpe_q_ctrl[BFI_IOC_MAX_CQS];
167 void __iomem *rme_q_ci[BFI_IOC_MAX_CQS];
168 void __iomem *rme_q_pi[BFI_IOC_MAX_CQS];
53440260 169 void __iomem *rme_q_ctrl[BFI_IOC_MAX_CQS];
a36c61f9
KG		 170};
171
acdc79a6 172/*
a36c61f9
KG		 173 * MSIX vector handlers
174 */
175#define BFA_MSIX_MAX_VECTORS 22
176typedef void (*bfa_msix_handler_t)(struct bfa_s *bfa, int vec);
177struct bfa_msix_s {
178 int nvecs;
179 bfa_msix_handler_t handler[BFA_MSIX_MAX_VECTORS];
180};
181
acdc79a6 182/*
a36c61f9
KG		 183 * Chip specific interfaces
184 */
185struct bfa_hwif_s {
186 void (*hw_reginit)(struct bfa_s *bfa);
187 void (*hw_reqq_ack)(struct bfa_s *bfa, int reqq);
ca6e0ea7 188 void (*hw_rspq_ack)(struct bfa_s *bfa, int rspq, u32 ci);
a36c61f9 189 void (*hw_msix_init)(struct bfa_s *bfa, int nvecs);
775c7742
KG		 190 void (*hw_msix_ctrl_install)(struct bfa_s *bfa);
191 void (*hw_msix_queue_install)(struct bfa_s *bfa);
a36c61f9
KG		 192 void (*hw_msix_uninstall)(struct bfa_s *bfa);
193 void (*hw_isr_mode_set)(struct bfa_s *bfa, bfa_boolean_t msix);
194 void (*hw_msix_getvecs)(struct bfa_s *bfa, u32 *vecmap,
195 u32 *nvecs, u32 *maxvec);
196 void (*hw_msix_get_rme_range) (struct bfa_s *bfa, u32 *start,
197 u32 *end);
11189208
KG		 198 int cpe_vec_q0;
199 int rme_vec_q0;
a36c61f9
KG		 200};
201typedef void (*bfa_cb_iocfc_t) (void *cbarg, enum bfa_status status);
202
a714134a
KG		 203struct bfa_faa_cbfn_s {
204 bfa_cb_iocfc_t faa_cbfn;
205 void *faa_cbarg;
206};
207
208#define BFA_FAA_ENABLED 1
209#define BFA_FAA_DISABLED 2
210
211/*
212 * FAA attributes
213 */
214struct bfa_faa_attr_s {
215 wwn_t faa;
216 u8 faa_state;
217 u8 pwwn_source;
218 u8 rsvd[6];
219};
220
221struct bfa_faa_args_s {
222 struct bfa_faa_attr_s *faa_attr;
223 struct bfa_faa_cbfn_s faa_cb;
224 u8 faa_state;
225 bfa_boolean_t busy;
226};
227
a36c61f9 228struct bfa_iocfc_s {
db9d8a75 229 bfa_fsm_t fsm;
a36c61f9
KG		 230 struct bfa_s *bfa;
231 struct bfa_iocfc_cfg_s cfg;
a36c61f9
KG		 232 u32 req_cq_pi[BFI_IOC_MAX_CQS];
233 u32 rsp_cq_ci[BFI_IOC_MAX_CQS];
3fd45980 234 u8 hw_qid[BFI_IOC_MAX_CQS];
a36c61f9
KG		 235 struct bfa_cb_qe_s init_hcb_qe;
236 struct bfa_cb_qe_s stop_hcb_qe;
237 struct bfa_cb_qe_s dis_hcb_qe;
60138066 238 struct bfa_cb_qe_s en_hcb_qe;
a36c61f9 239 struct bfa_cb_qe_s stats_hcb_qe;
db9d8a75
KG		 240 bfa_boolean_t submod_enabled;
241 bfa_boolean_t cb_reqd; /* Driver call back reqd */
242 bfa_status_t op_status; /* Status of bfa iocfc op */
a36c61f9
KG		 243
244 struct bfa_dma_s cfg_info;
245 struct bfi_iocfc_cfg_s *cfginfo;
246 struct bfa_dma_s cfgrsp_dma;
247 struct bfi_iocfc_cfgrsp_s *cfgrsp;
a36c61f9
KG		 248 struct bfa_dma_s req_cq_ba[BFI_IOC_MAX_CQS];
249 struct bfa_dma_s req_cq_shadow_ci[BFI_IOC_MAX_CQS];
250 struct bfa_dma_s rsp_cq_ba[BFI_IOC_MAX_CQS];
251 struct bfa_dma_s rsp_cq_shadow_pi[BFI_IOC_MAX_CQS];
252 struct bfa_iocfc_regs_s bfa_regs; /* BFA device registers */
253 struct bfa_hwif_s hwif;
254 bfa_cb_iocfc_t updateq_cbfn; /* bios callback function */
255 void *updateq_cbarg; /* bios callback arg */
256 u32 intr_mask;
a714134a 257 struct bfa_faa_args_s faa_args;
4507025d
KG		 258 struct bfa_mem_dma_s ioc_dma;
259 struct bfa_mem_dma_s iocfc_dma;
260 struct bfa_mem_dma_s reqq_dma[BFI_IOC_MAX_CQS];
261 struct bfa_mem_dma_s rspq_dma[BFI_IOC_MAX_CQS];
262 struct bfa_mem_kva_s kva_seg;
a36c61f9
KG		 263};
264
4507025d
KG		 265#define BFA_MEM_IOC_DMA(_bfa) (&((_bfa)->iocfc.ioc_dma))
266#define BFA_MEM_IOCFC_DMA(_bfa) (&((_bfa)->iocfc.iocfc_dma))
267#define BFA_MEM_REQQ_DMA(_bfa, _qno) (&((_bfa)->iocfc.reqq_dma[(_qno)]))
268#define BFA_MEM_RSPQ_DMA(_bfa, _qno) (&((_bfa)->iocfc.rspq_dma[(_qno)]))
269#define BFA_MEM_IOCFC_KVA(_bfa) (&((_bfa)->iocfc.kva_seg))
270
3fd45980
KG		 271#define bfa_fn_lpu(__bfa) \
272 bfi_fn_lpu(bfa_ioc_pcifn(&(__bfa)->ioc), bfa_ioc_portid(&(__bfa)->ioc))
a36c61f9
KG		 273#define bfa_msix_init(__bfa, __nvecs) \
274 ((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs))
775c7742
KG		 275#define bfa_msix_ctrl_install(__bfa) \
276 ((__bfa)->iocfc.hwif.hw_msix_ctrl_install(__bfa))
277#define bfa_msix_queue_install(__bfa) \
278 ((__bfa)->iocfc.hwif.hw_msix_queue_install(__bfa))
a36c61f9
KG		 279#define bfa_msix_uninstall(__bfa) \
280 ((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa))
ca6e0ea7
KG		 281#define bfa_isr_rspq_ack(__bfa, __queue, __ci) \
282 ((__bfa)->iocfc.hwif.hw_rspq_ack(__bfa, __queue, __ci))
3fd45980
KG		 283#define bfa_isr_reqq_ack(__bfa, __queue) do { \
284 if ((__bfa)->iocfc.hwif.hw_reqq_ack) \
285 (__bfa)->iocfc.hwif.hw_reqq_ack(__bfa, __queue); \
286} while (0)
11189208
KG		 287#define bfa_isr_mode_set(__bfa, __msix) do { \
288 if ((__bfa)->iocfc.hwif.hw_isr_mode_set) \
289 (__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix); \
290} while (0)
a36c61f9
KG		 291#define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec) \
292 ((__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap, \
293 __nvecs, __maxvec))
294#define bfa_msix_get_rme_range(__bfa, __start, __end) \
295 ((__bfa)->iocfc.hwif.hw_msix_get_rme_range(__bfa, __start, __end))
296#define bfa_msix(__bfa, __vec) \
297 ((__bfa)->msix.handler[__vec](__bfa, __vec))
298
299/*
300 * FC specific IOC functions.
301 */
4507025d
KG		 302void bfa_iocfc_meminfo(struct bfa_iocfc_cfg_s *cfg,
303 struct bfa_meminfo_s *meminfo,
304 struct bfa_s *bfa);
a36c61f9
KG		 305void bfa_iocfc_attach(struct bfa_s *bfa, void *bfad,
306 struct bfa_iocfc_cfg_s *cfg,
a36c61f9 307 struct bfa_pcidev_s *pcidev);
a36c61f9
KG		 308void bfa_iocfc_init(struct bfa_s *bfa);
309void bfa_iocfc_start(struct bfa_s *bfa);
310void bfa_iocfc_stop(struct bfa_s *bfa);
311void bfa_iocfc_isr(void *bfa, struct bfi_mbmsg_s *msg);
4507025d 312void bfa_iocfc_set_snsbase(struct bfa_s *bfa, int seg_no, u64 snsbase_pa);
a36c61f9
KG		 313bfa_boolean_t bfa_iocfc_is_operational(struct bfa_s *bfa);
314void bfa_iocfc_reset_queues(struct bfa_s *bfa);
315
316void bfa_msix_all(struct bfa_s *bfa, int vec);
317void bfa_msix_reqq(struct bfa_s *bfa, int vec);
318void bfa_msix_rspq(struct bfa_s *bfa, int vec);
319void bfa_msix_lpu_err(struct bfa_s *bfa, int vec);
320
321void bfa_hwcb_reginit(struct bfa_s *bfa);
ca6e0ea7 322void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
a36c61f9 323void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs);
775c7742
KG		 324void bfa_hwcb_msix_ctrl_install(struct bfa_s *bfa);
325void bfa_hwcb_msix_queue_install(struct bfa_s *bfa);
a36c61f9
KG		 326void bfa_hwcb_msix_uninstall(struct bfa_s *bfa);
327void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
328void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,
329 u32 *maxvec);
330void bfa_hwcb_msix_get_rme_range(struct bfa_s *bfa, u32 *start,
331 u32 *end);
332void bfa_hwct_reginit(struct bfa_s *bfa);
11189208 333void bfa_hwct2_reginit(struct bfa_s *bfa);
a36c61f9 334void bfa_hwct_reqq_ack(struct bfa_s *bfa, int rspq);
ca6e0ea7
KG		 335void bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
336void bfa_hwct2_rspq_ack(struct bfa_s *bfa, int rspq, u32 ci);
a36c61f9 337void bfa_hwct_msix_init(struct bfa_s *bfa, int nvecs);
775c7742
KG		 338void bfa_hwct_msix_ctrl_install(struct bfa_s *bfa);
339void bfa_hwct_msix_queue_install(struct bfa_s *bfa);
a36c61f9
KG		 340void bfa_hwct_msix_uninstall(struct bfa_s *bfa);
341void bfa_hwct_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix);
342void bfa_hwct_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs,
343 u32 *maxvec);
344void bfa_hwct_msix_get_rme_range(struct bfa_s *bfa, u32 *start,
345 u32 *end);
a36c61f9 346void bfa_iocfc_get_bootwwns(struct bfa_s *bfa, u8 *nwwns, wwn_t *wwns);
a36c61f9
KG		 347int bfa_iocfc_get_pbc_vports(struct bfa_s *bfa,
348 struct bfi_pbc_vport_s *pbc_vport);
349
350
acdc79a6 351/*
a36c61f9
KG		 352 *----------------------------------------------------------------------
353 * BFA public interfaces
354 *----------------------------------------------------------------------
355 */
356#define bfa_stats(_mod, _stats) ((_mod)->stats._stats++)
357#define bfa_ioc_get_stats(__bfa, __ioc_stats) \
358 bfa_ioc_fetch_stats(&(__bfa)->ioc, __ioc_stats)
359#define bfa_ioc_clear_stats(__bfa) \
360 bfa_ioc_clr_stats(&(__bfa)->ioc)
361#define bfa_get_nports(__bfa) \
362 bfa_ioc_get_nports(&(__bfa)->ioc)
363#define bfa_get_adapter_manufacturer(__bfa, __manufacturer) \
364 bfa_ioc_get_adapter_manufacturer(&(__bfa)->ioc, __manufacturer)
365#define bfa_get_adapter_model(__bfa, __model) \
366 bfa_ioc_get_adapter_model(&(__bfa)->ioc, __model)
367#define bfa_get_adapter_serial_num(__bfa, __serial_num) \
368 bfa_ioc_get_adapter_serial_num(&(__bfa)->ioc, __serial_num)
369#define bfa_get_adapter_fw_ver(__bfa, __fw_ver) \
370 bfa_ioc_get_adapter_fw_ver(&(__bfa)->ioc, __fw_ver)
371#define bfa_get_adapter_optrom_ver(__bfa, __optrom_ver) \
372 bfa_ioc_get_adapter_optrom_ver(&(__bfa)->ioc, __optrom_ver)
373#define bfa_get_pci_chip_rev(__bfa, __chip_rev) \
374 bfa_ioc_get_pci_chip_rev(&(__bfa)->ioc, __chip_rev)
375#define bfa_get_ioc_state(__bfa) \
376 bfa_ioc_get_state(&(__bfa)->ioc)
377#define bfa_get_type(__bfa) \
378 bfa_ioc_get_type(&(__bfa)->ioc)
379#define bfa_get_mac(__bfa) \
380 bfa_ioc_get_mac(&(__bfa)->ioc)
381#define bfa_get_mfg_mac(__bfa) \
382 bfa_ioc_get_mfg_mac(&(__bfa)->ioc)
383#define bfa_get_fw_clock_res(__bfa) \
384 ((__bfa)->iocfc.cfgrsp->fwcfg.fw_tick_res)
385
83763d59
KG		 386/*
387 * lun mask macros return NULL when min cfg is enabled and there is
388 * no memory allocated for lunmask.
389 */
390#define bfa_get_lun_mask(__bfa) \
391 ((&(__bfa)->modules.dconf_mod)->min_cfg) ? NULL : \
392 (&(BFA_DCONF_MOD(__bfa)->dconf->lun_mask))
393
394#define bfa_get_lun_mask_list(_bfa) \
395 ((&(_bfa)->modules.dconf_mod)->min_cfg) ? NULL : \
396 (bfa_get_lun_mask(_bfa)->lun_list)
397
398#define bfa_get_lun_mask_status(_bfa) \
399 (((&(_bfa)->modules.dconf_mod)->min_cfg) \
400 ? BFA_LUNMASK_MINCFG : ((bfa_get_lun_mask(_bfa))->status))
401
a36c61f9
KG		 402void bfa_get_pciids(struct bfa_pciid_s **pciids, int *npciids);
403void bfa_cfg_get_default(struct bfa_iocfc_cfg_s *cfg);
404void bfa_cfg_get_min(struct bfa_iocfc_cfg_s *cfg);
405void bfa_cfg_get_meminfo(struct bfa_iocfc_cfg_s *cfg,
4507025d
KG		 406 struct bfa_meminfo_s *meminfo,
407 struct bfa_s *bfa);
a36c61f9
KG		 408void bfa_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg,
409 struct bfa_meminfo_s *meminfo,
410 struct bfa_pcidev_s *pcidev);
a36c61f9 411void bfa_detach(struct bfa_s *bfa);
a36c61f9
KG		 412void bfa_cb_init(void *bfad, bfa_status_t status);
413void bfa_cb_updateq(void *bfad, bfa_status_t status);
414
415bfa_boolean_t bfa_intx(struct bfa_s *bfa);
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KG		 416void bfa_isr_enable(struct bfa_s *bfa);
417void bfa_isr_disable(struct bfa_s *bfa);
418
419void bfa_comp_deq(struct bfa_s *bfa, struct list_head *comp_q);
420void bfa_comp_process(struct bfa_s *bfa, struct list_head *comp_q);
421void bfa_comp_free(struct bfa_s *bfa, struct list_head *comp_q);
422
423typedef void (*bfa_cb_ioc_t) (void *cbarg, enum bfa_status status);
424void bfa_iocfc_get_attr(struct bfa_s *bfa, struct bfa_iocfc_attr_s *attr);
a36c61f9 425
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KG		 426
427bfa_status_t bfa_iocfc_israttr_set(struct bfa_s *bfa,
428 struct bfa_iocfc_intr_attr_s *attr);
429
430void bfa_iocfc_enable(struct bfa_s *bfa);
431void bfa_iocfc_disable(struct bfa_s *bfa);
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KG		 432#define bfa_timer_start(_bfa, _timer, _timercb, _arg, _timeout) \
433 bfa_timer_begin(&(_bfa)->timer_mod, _timer, _timercb, _arg, _timeout)
434
37ea0558
KG		 435struct bfa_cb_pending_q_s {
436 struct bfa_cb_qe_s hcb_qe;
437 void *data; /* Driver buffer */
438};
439
440/* Common macros to operate on pending stats/attr apis */
441#define bfa_pending_q_init(__qe, __cbfn, __cbarg, __data) do { \
442 bfa_q_qe_init(&((__qe)->hcb_qe.qe)); \
443 (__qe)->hcb_qe.cbfn = (__cbfn); \
444 (__qe)->hcb_qe.cbarg = (__cbarg); \
445 (__qe)->hcb_qe.pre_rmv = BFA_TRUE; \
446 (__qe)->data = (__data); \
447} while (0)
448
a36c61f9 449#endif /* __BFA_H__ */
Linux 6.x block layer and io_uring tree(s)