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6733b39a | 1 | /** |
533c165f | 2 | * Copyright (C) 2005 - 2013 Emulex |
6733b39a JK |
3 | * All rights reserved. |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License version 2 | |
7 | * as published by the Free Software Foundation. The full GNU General | |
8 | * Public License is included in this distribution in the file called COPYING. | |
9 | * | |
10 | * Contact Information: | |
255fa9a3 | 11 | * linux-drivers@emulex.com |
6733b39a | 12 | * |
255fa9a3 JK |
13 | * Emulex |
14 | * 3333 Susan Street | |
15 | * Costa Mesa, CA 92626 | |
6733b39a JK |
16 | */ |
17 | ||
18 | #ifndef BEISCSI_H | |
19 | #define BEISCSI_H | |
20 | ||
21 | #include <linux/pci.h> | |
22 | #include <linux/if_vlan.h> | |
bfead3b2 JK |
23 | #include <linux/blk-iopoll.h> |
24 | #define FW_VER_LEN 32 | |
25 | #define MCC_Q_LEN 128 | |
26 | #define MCC_CQ_LEN 256 | |
756d29c8 | 27 | #define MAX_MCC_CMD 16 |
f98c96b0 JK |
28 | /* BladeEngine Generation numbers */ |
29 | #define BE_GEN2 2 | |
30 | #define BE_GEN3 3 | |
139a1b1e | 31 | #define BE_GEN4 4 |
6733b39a JK |
32 | struct be_dma_mem { |
33 | void *va; | |
34 | dma_addr_t dma; | |
35 | u32 size; | |
36 | }; | |
37 | ||
38 | struct be_queue_info { | |
39 | struct be_dma_mem dma_mem; | |
40 | u16 len; | |
41 | u16 entry_size; /* Size of an element in the queue */ | |
42 | u16 id; | |
43 | u16 tail, head; | |
44 | bool created; | |
45 | atomic_t used; /* Number of valid elements in the queue */ | |
46 | }; | |
47 | ||
48 | static inline u32 MODULO(u16 val, u16 limit) | |
49 | { | |
50 | WARN_ON(limit & (limit - 1)); | |
51 | return val & (limit - 1); | |
52 | } | |
53 | ||
54 | static inline void index_inc(u16 *index, u16 limit) | |
55 | { | |
56 | *index = MODULO((*index + 1), limit); | |
57 | } | |
58 | ||
59 | static inline void *queue_head_node(struct be_queue_info *q) | |
60 | { | |
61 | return q->dma_mem.va + q->head * q->entry_size; | |
62 | } | |
63 | ||
756d29c8 JK |
64 | static inline void *queue_get_wrb(struct be_queue_info *q, unsigned int wrb_num) |
65 | { | |
66 | return q->dma_mem.va + wrb_num * q->entry_size; | |
67 | } | |
68 | ||
6733b39a JK |
69 | static inline void *queue_tail_node(struct be_queue_info *q) |
70 | { | |
71 | return q->dma_mem.va + q->tail * q->entry_size; | |
72 | } | |
73 | ||
74 | static inline void queue_head_inc(struct be_queue_info *q) | |
75 | { | |
76 | index_inc(&q->head, q->len); | |
77 | } | |
78 | ||
79 | static inline void queue_tail_inc(struct be_queue_info *q) | |
80 | { | |
81 | index_inc(&q->tail, q->len); | |
82 | } | |
83 | ||
84 | /*ISCSI */ | |
85 | ||
86 | struct be_eq_obj { | |
72fb46a9 JSJ |
87 | bool todo_mcc_cq; |
88 | bool todo_cq; | |
6733b39a | 89 | struct be_queue_info q; |
bfead3b2 JK |
90 | struct beiscsi_hba *phba; |
91 | struct be_queue_info *cq; | |
72fb46a9 | 92 | struct work_struct work_cqs; /* Work Item */ |
bfead3b2 | 93 | struct blk_iopoll iopoll; |
6733b39a JK |
94 | }; |
95 | ||
96 | struct be_mcc_obj { | |
bfead3b2 JK |
97 | struct be_queue_info q; |
98 | struct be_queue_info cq; | |
6733b39a JK |
99 | }; |
100 | ||
1957aa7f JK |
101 | struct beiscsi_mcc_tag_state { |
102 | #define MCC_TAG_STATE_COMPLETED 0x00 | |
103 | #define MCC_TAG_STATE_RUNNING 0x01 | |
104 | #define MCC_TAG_STATE_TIMEOUT 0x02 | |
105 | uint8_t tag_state; | |
106 | struct be_dma_mem tag_mem_state; | |
107 | }; | |
108 | ||
6733b39a JK |
109 | struct be_ctrl_info { |
110 | u8 __iomem *csr; | |
111 | u8 __iomem *db; /* Door Bell */ | |
112 | u8 __iomem *pcicfg; /* PCI config space */ | |
113 | struct pci_dev *pdev; | |
114 | ||
115 | /* Mbox used for cmd request/response */ | |
116 | spinlock_t mbox_lock; /* For serializing mbox cmds to BE card */ | |
117 | struct be_dma_mem mbox_mem; | |
118 | /* Mbox mem is adjusted to align to 16 bytes. The allocated addr | |
119 | * is stored for freeing purpose */ | |
120 | struct be_dma_mem mbox_mem_alloced; | |
121 | ||
122 | /* MCC Rings */ | |
123 | struct be_mcc_obj mcc_obj; | |
124 | spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */ | |
125 | spinlock_t mcc_cq_lock; | |
126 | ||
756d29c8 JK |
127 | wait_queue_head_t mcc_wait[MAX_MCC_CMD + 1]; |
128 | unsigned int mcc_tag[MAX_MCC_CMD]; | |
129 | unsigned int mcc_numtag[MAX_MCC_CMD + 1]; | |
130 | unsigned short mcc_alloc_index; | |
131 | unsigned short mcc_free_index; | |
132 | unsigned int mcc_tag_available; | |
1957aa7f JK |
133 | |
134 | struct beiscsi_mcc_tag_state ptag_state[MAX_MCC_CMD + 1]; | |
6733b39a JK |
135 | }; |
136 | ||
137 | #include "be_cmds.h" | |
138 | ||
139 | #define PAGE_SHIFT_4K 12 | |
140 | #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K) | |
92665a66 | 141 | #define mcc_timeout 120000 /* 12s timeout */ |
6733b39a JK |
142 | |
143 | /* Returns number of pages spanned by the data starting at the given addr */ | |
457ff3b7 JK |
144 | #define PAGES_4K_SPANNED(_address, size) \ |
145 | ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \ | |
6733b39a JK |
146 | (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K)) |
147 | ||
6733b39a | 148 | /* Returns bit offset within a DWORD of a bitfield */ |
457ff3b7 | 149 | #define AMAP_BIT_OFFSET(_struct, field) \ |
6733b39a JK |
150 | (((size_t)&(((_struct *)0)->field))%32) |
151 | ||
152 | /* Returns the bit mask of the field that is NOT shifted into location. */ | |
153 | static inline u32 amap_mask(u32 bitsize) | |
154 | { | |
155 | return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1); | |
156 | } | |
157 | ||
158 | static inline void amap_set(void *ptr, u32 dw_offset, u32 mask, | |
159 | u32 offset, u32 value) | |
160 | { | |
161 | u32 *dw = (u32 *) ptr + dw_offset; | |
162 | *dw &= ~(mask << offset); | |
163 | *dw |= (mask & value) << offset; | |
164 | } | |
165 | ||
166 | #define AMAP_SET_BITS(_struct, field, ptr, val) \ | |
167 | amap_set(ptr, \ | |
168 | offsetof(_struct, field)/32, \ | |
169 | amap_mask(sizeof(((_struct *)0)->field)), \ | |
170 | AMAP_BIT_OFFSET(_struct, field), \ | |
171 | val) | |
172 | ||
173 | static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) | |
174 | { | |
175 | u32 *dw = ptr; | |
176 | return mask & (*(dw + dw_offset) >> offset); | |
177 | } | |
178 | ||
179 | #define AMAP_GET_BITS(_struct, field, ptr) \ | |
180 | amap_get(ptr, \ | |
181 | offsetof(_struct, field)/32, \ | |
182 | amap_mask(sizeof(((_struct *)0)->field)), \ | |
183 | AMAP_BIT_OFFSET(_struct, field)) | |
184 | ||
185 | #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len) | |
186 | #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len) | |
187 | static inline void swap_dws(void *wrb, int len) | |
188 | { | |
189 | #ifdef __BIG_ENDIAN | |
190 | u32 *dw = wrb; | |
191 | WARN_ON(len % 4); | |
192 | do { | |
193 | *dw = cpu_to_le32(*dw); | |
194 | dw++; | |
195 | len -= 4; | |
196 | } while (len); | |
197 | #endif /* __BIG_ENDIAN */ | |
198 | } | |
6733b39a | 199 | #endif /* BEISCSI_H */ |