[linux-2.6-block.git] / drivers / scsi / be2iscsi / be.h

/**
 * Copyright (C) 2005 - 2011 Emulex
 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.  The full GNU General
 * Public License is included in this distribution in the file called COPYING.
 *
 * Contact Information:
 * linux-drivers@emulex.com
 *
 * Emulex
 * 3333 Susan Street
 * Costa Mesa, CA 92626
 */

#ifndef BEISCSI_H
#define BEISCSI_H

#include <linux/pci.h>
#include <linux/if_vlan.h>
#include <linux/blk-iopoll.h>
#define FW_VER_LEN	32
#define MCC_Q_LEN	128
#define MCC_CQ_LEN	256
#define MAX_MCC_CMD	16
/* BladeEngine Generation numbers */
#define BE_GEN2 2
#define BE_GEN3 3

struct be_dma_mem {
	void *va;
	dma_addr_t dma;
	u32 size;
};

struct be_queue_info {
	struct be_dma_mem dma_mem;
	u16 len;
	u16 entry_size;		/* Size of an element in the queue */
	u16 id;
	u16 tail, head;
	bool created;
	atomic_t used;		/* Number of valid elements in the queue */
};

static inline u32 MODULO(u16 val, u16 limit)
{
	WARN_ON(limit & (limit - 1));
	return val & (limit - 1);
}

static inline void index_inc(u16 *index, u16 limit)
{
	*index = MODULO((*index + 1), limit);
}

static inline void *queue_head_node(struct be_queue_info *q)
{
	return q->dma_mem.va + q->head * q->entry_size;
}

static inline void *queue_get_wrb(struct be_queue_info *q, unsigned int wrb_num)
{
	return q->dma_mem.va + wrb_num * q->entry_size;
}

static inline void *queue_tail_node(struct be_queue_info *q)
{
	return q->dma_mem.va + q->tail * q->entry_size;
}

static inline void queue_head_inc(struct be_queue_info *q)
{
	index_inc(&q->head, q->len);
}

static inline void queue_tail_inc(struct be_queue_info *q)
{
	index_inc(&q->tail, q->len);
}

/*ISCSI */

struct be_eq_obj {
	struct be_queue_info q;
	struct beiscsi_hba *phba;
	struct be_queue_info *cq;
	struct blk_iopoll	iopoll;
};

struct be_mcc_obj {
	struct be_queue_info q;
	struct be_queue_info cq;
};

struct be_ctrl_info {
	u8 __iomem *csr;
	u8 __iomem *db;		/* Door Bell */
	u8 __iomem *pcicfg;	/* PCI config space */
	struct pci_dev *pdev;

	/* Mbox used for cmd request/response */
	spinlock_t mbox_lock;	/* For serializing mbox cmds to BE card */
	struct be_dma_mem mbox_mem;
	/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
	 * is stored for freeing purpose */
	struct be_dma_mem mbox_mem_alloced;

	/* MCC Rings */
	struct be_mcc_obj mcc_obj;
	spinlock_t mcc_lock;	/* For serializing mcc cmds to BE card */
	spinlock_t mcc_cq_lock;

	wait_queue_head_t mcc_wait[MAX_MCC_CMD + 1];
	unsigned int mcc_tag[MAX_MCC_CMD];
	unsigned int mcc_numtag[MAX_MCC_CMD + 1];
	unsigned short mcc_alloc_index;
	unsigned short mcc_free_index;
	unsigned int mcc_tag_available;
};

#include "be_cmds.h"

#define PAGE_SHIFT_4K 12
#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
#define mcc_timeout		120000 /* 5s timeout */

/* Returns number of pages spanned by the data starting at the given addr */
#define PAGES_4K_SPANNED(_address, size)				\
		((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) +	\
			(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))

/* Returns bit offset within a DWORD of a bitfield */
#define AMAP_BIT_OFFSET(_struct, field)					\
		(((size_t)&(((_struct *)0)->field))%32)

/* Returns the bit mask of the field that is NOT shifted into location. */
static inline u32 amap_mask(u32 bitsize)
{
	return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
}

static inline void amap_set(void *ptr, u32 dw_offset, u32 mask,
					u32 offset, u32 value)
{
	u32 *dw = (u32 *) ptr + dw_offset;
	*dw &= ~(mask << offset);
	*dw |= (mask & value) << offset;
}

#define AMAP_SET_BITS(_struct, field, ptr, val)				\
		amap_set(ptr,						\
			offsetof(_struct, field)/32,			\
			amap_mask(sizeof(((_struct *)0)->field)),	\
			AMAP_BIT_OFFSET(_struct, field),		\
			val)

static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
{
	u32 *dw = ptr;
	return mask & (*(dw + dw_offset) >> offset);
}

#define AMAP_GET_BITS(_struct, field, ptr)				\
		amap_get(ptr,						\
			offsetof(_struct, field)/32,			\
			amap_mask(sizeof(((_struct *)0)->field)),	\
			AMAP_BIT_OFFSET(_struct, field))

#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
static inline void swap_dws(void *wrb, int len)
{
#ifdef __BIG_ENDIAN
	u32 *dw = wrb;
	WARN_ON(len % 4);
	do {
		*dw = cpu_to_le32(*dw);
		dw++;
		len -= 4;
	} while (len);
#endif /* __BIG_ENDIAN */
}
#endif /* BEISCSI_H */
Commit	Line	Data
6733b39a	1	/**
255fa9a3	2	* Copyright (C) 2005 - 2011 Emulex
6733b39a JK	3	* All rights reserved.
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License version 2
	7	* as published by the Free Software Foundation. The full GNU General
	8	* Public License is included in this distribution in the file called COPYING.
	9	*
	10	* Contact Information:
255fa9a3	11	* linux-drivers@emulex.com
6733b39a	12	*
255fa9a3 JK	13	* Emulex
	14	* 3333 Susan Street
	15	* Costa Mesa, CA 92626
6733b39a JK	16	*/
	17
	18	#ifndef BEISCSI_H
	19	#define BEISCSI_H
	20
	21	#include <linux/pci.h>
	22	#include <linux/if_vlan.h>
bfead3b2 JK	23	#include <linux/blk-iopoll.h>
	24	#define FW_VER_LEN 32
	25	#define MCC_Q_LEN 128
	26	#define MCC_CQ_LEN 256
756d29c8	27	#define MAX_MCC_CMD 16
f98c96b0 JK	28	/* BladeEngine Generation numbers */
	29	#define BE_GEN2 2
	30	#define BE_GEN3 3
6733b39a JK	31
	32	struct be_dma_mem {
	33	void *va;
	34	dma_addr_t dma;
	35	u32 size;
	36	};
	37
	38	struct be_queue_info {
	39	struct be_dma_mem dma_mem;
	40	u16 len;
	41	u16 entry_size; /* Size of an element in the queue */
	42	u16 id;
	43	u16 tail, head;
	44	bool created;
	45	atomic_t used; /* Number of valid elements in the queue */
	46	};
	47
	48	static inline u32 MODULO(u16 val, u16 limit)
	49	{
	50	WARN_ON(limit & (limit - 1));
	51	return val & (limit - 1);
	52	}
	53
	54	static inline void index_inc(u16 *index, u16 limit)
	55	{
	56	index = MODULO((index + 1), limit);
	57	}
	58
	59	static inline void queue_head_node(struct be_queue_info q)
	60	{
	61	return q->dma_mem.va + q->head * q->entry_size;
	62	}
	63
756d29c8 JK	64	static inline void queue_get_wrb(struct be_queue_info q, unsigned int wrb_num)
	65	{
	66	return q->dma_mem.va + wrb_num * q->entry_size;
	67	}
	68
6733b39a JK	69	static inline void queue_tail_node(struct be_queue_info q)
	70	{
	71	return q->dma_mem.va + q->tail * q->entry_size;
	72	}
	73
	74	static inline void queue_head_inc(struct be_queue_info *q)
	75	{
	76	index_inc(&q->head, q->len);
	77	}
	78
	79	static inline void queue_tail_inc(struct be_queue_info *q)
	80	{
	81	index_inc(&q->tail, q->len);
	82	}
	83
	84	/ISCSI /
	85
	86	struct be_eq_obj {
	87	struct be_queue_info q;
bfead3b2 JK	88	struct beiscsi_hba *phba;
	89	struct be_queue_info *cq;
	90	struct blk_iopoll iopoll;
6733b39a JK	91	};
	92
	93	struct be_mcc_obj {
bfead3b2 JK	94	struct be_queue_info q;
bfead3b2 JK	95	struct be_queue_info cq;
6733b39a JK	96	};
	97
	98	struct be_ctrl_info {
	99	u8 __iomem *csr;
	100	u8 __iomem db; / Door Bell */
	101	u8 __iomem pcicfg; / PCI config space */
	102	struct pci_dev *pdev;
	103
	104	/* Mbox used for cmd request/response */
	105	spinlock_t mbox_lock; /* For serializing mbox cmds to BE card */
	106	struct be_dma_mem mbox_mem;
	107	/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
	108	* is stored for freeing purpose */
	109	struct be_dma_mem mbox_mem_alloced;
	110
	111	/* MCC Rings */
	112	struct be_mcc_obj mcc_obj;
	113	spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
	114	spinlock_t mcc_cq_lock;
	115
756d29c8 JK	116	wait_queue_head_t mcc_wait[MAX_MCC_CMD + 1];
	117	unsigned int mcc_tag[MAX_MCC_CMD];
	118	unsigned int mcc_numtag[MAX_MCC_CMD + 1];
	119	unsigned short mcc_alloc_index;
	120	unsigned short mcc_free_index;
	121	unsigned int mcc_tag_available;
6733b39a JK	122	};
	123
	124	#include "be_cmds.h"
	125
	126	#define PAGE_SHIFT_4K 12
	127	#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
756d29c8	128	#define mcc_timeout 120000 /* 5s timeout */
6733b39a JK	129
6733b39a JK	130	/* Returns number of pages spanned by the data starting at the given addr */
457ff3b7 JK	131	#define PAGES_4K_SPANNED(_address, size) \
457ff3b7 JK	132	((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
6733b39a JK	133	(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
6733b39a JK	134
6733b39a	135	/* Returns bit offset within a DWORD of a bitfield */
457ff3b7	136	#define AMAP_BIT_OFFSET(_struct, field) \
6733b39a JK	137	(((size_t)&(((_struct *)0)->field))%32)
	138
	139	/* Returns the bit mask of the field that is NOT shifted into location. */
	140	static inline u32 amap_mask(u32 bitsize)
	141	{
	142	return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
	143	}
	144
	145	static inline void amap_set(void *ptr, u32 dw_offset, u32 mask,
	146	u32 offset, u32 value)
	147	{
	148	u32 dw = (u32 ) ptr + dw_offset;
	149	*dw &= ~(mask << offset);
	150	*dw \|= (mask & value) << offset;
	151	}
	152
	153	#define AMAP_SET_BITS(_struct, field, ptr, val) \
	154	amap_set(ptr, \
	155	offsetof(_struct, field)/32, \
	156	amap_mask(sizeof(((_struct *)0)->field)), \
	157	AMAP_BIT_OFFSET(_struct, field), \
	158	val)
	159
	160	static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
	161	{
	162	u32 *dw = ptr;
	163	return mask & (*(dw + dw_offset) >> offset);
	164	}
	165
	166	#define AMAP_GET_BITS(_struct, field, ptr) \
	167	amap_get(ptr, \
	168	offsetof(_struct, field)/32, \
	169	amap_mask(sizeof(((_struct *)0)->field)), \
	170	AMAP_BIT_OFFSET(_struct, field))
	171
	172	#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
	173	#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
	174	static inline void swap_dws(void *wrb, int len)
	175	{
	176	#ifdef __BIG_ENDIAN
	177	u32 *dw = wrb;
	178	WARN_ON(len % 4);
	179	do {
	180	dw = cpu_to_le32(dw);
	181	dw++;
	182	len -= 4;
	183	} while (len);
	184	#endif /* __BIG_ENDIAN */
	185	}
6733b39a	186	#endif /* BEISCSI_H */