[linux-2.6-block.git] / drivers / scsi / be2iscsi / be.h

/**
 * Copyright (C) 2005 - 2015 Emulex
 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.  The full GNU General
 * Public License is included in this distribution in the file called COPYING.
 *
 * Contact Information:
 * linux-drivers@avagotech.com
 *
 * Emulex
 * 3333 Susan Street
 * Costa Mesa, CA 92626
 */

#ifndef BEISCSI_H
#define BEISCSI_H

#include <linux/pci.h>
#include <linux/if_vlan.h>
#include <linux/irq_poll.h>
#define FW_VER_LEN	32
#define MCC_Q_LEN	128
#define MCC_CQ_LEN	256
#define MAX_MCC_CMD	16
/* BladeEngine Generation numbers */
#define BE_GEN2 2
#define BE_GEN3 3
#define BE_GEN4	4
struct be_dma_mem {
	void *va;
	dma_addr_t dma;
	u32 size;
};

struct be_queue_info {
	struct be_dma_mem dma_mem;
	u16 len;
	u16 entry_size;		/* Size of an element in the queue */
	u16 id;
	u16 tail, head;
	bool created;
	u16 used;		/* Number of valid elements in the queue */
};

static inline u32 MODULO(u16 val, u16 limit)
{
	WARN_ON(limit & (limit - 1));
	return val & (limit - 1);
}

static inline void index_inc(u16 *index, u16 limit)
{
	*index = MODULO((*index + 1), limit);
}

static inline void *queue_head_node(struct be_queue_info *q)
{
	return q->dma_mem.va + q->head * q->entry_size;
}

static inline void *queue_get_wrb(struct be_queue_info *q, unsigned int wrb_num)
{
	return q->dma_mem.va + wrb_num * q->entry_size;
}

static inline void *queue_tail_node(struct be_queue_info *q)
{
	return q->dma_mem.va + q->tail * q->entry_size;
}

static inline void queue_head_inc(struct be_queue_info *q)
{
	index_inc(&q->head, q->len);
}

static inline void queue_tail_inc(struct be_queue_info *q)
{
	index_inc(&q->tail, q->len);
}

/*ISCSI */

struct be_aic_obj {		/* Adaptive interrupt coalescing (AIC) info */
	bool enable;
	u32 min_eqd;		/* in usecs */
	u32 max_eqd;		/* in usecs */
	u32 prev_eqd;		/* in usecs */
	u32 et_eqd;		/* configured val when aic is off */
	ulong jiffs;
	u64 eq_prev;		/* Used to calculate eqe */
};

struct be_eq_obj {
	bool todo_mcc_cq;
	bool todo_cq;
	u32 cq_count;
	struct be_queue_info q;
	struct beiscsi_hba *phba;
	struct be_queue_info *cq;
	struct work_struct work_cqs; /* Work Item */
	struct irq_poll	iopoll;
};

struct be_mcc_obj {
	struct be_queue_info q;
	struct be_queue_info cq;
};

struct beiscsi_mcc_tag_state {
	unsigned long tag_state;
#define MCC_TAG_STATE_RUNNING	1
#define MCC_TAG_STATE_TIMEOUT	2
	struct be_dma_mem tag_mem_state;
};

struct be_ctrl_info {
	u8 __iomem *csr;
	u8 __iomem *db;		/* Door Bell */
	u8 __iomem *pcicfg;	/* PCI config space */
	struct pci_dev *pdev;

	/* Mbox used for cmd request/response */
	struct mutex mbox_lock;	/* For serializing mbox cmds to BE card */
	struct be_dma_mem mbox_mem;
	/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
	 * is stored for freeing purpose */
	struct be_dma_mem mbox_mem_alloced;

	/* MCC Rings */
	struct be_mcc_obj mcc_obj;
	spinlock_t mcc_lock;	/* For serializing mcc cmds to BE card */

	wait_queue_head_t mcc_wait[MAX_MCC_CMD + 1];
	unsigned int mcc_tag[MAX_MCC_CMD];
	unsigned int mcc_tag_status[MAX_MCC_CMD + 1];
	unsigned short mcc_alloc_index;
	unsigned short mcc_free_index;
	unsigned int mcc_tag_available;

	struct beiscsi_mcc_tag_state ptag_state[MAX_MCC_CMD + 1];
};

#include "be_cmds.h"

/* WRB index mask for MCC_Q_LEN queue entries */
#define MCC_Q_WRB_IDX_MASK	CQE_STATUS_WRB_MASK
#define MCC_Q_WRB_IDX_SHIFT	CQE_STATUS_WRB_SHIFT
/* TAG is from 1...MAX_MCC_CMD, MASK includes MAX_MCC_CMD */
#define MCC_Q_CMD_TAG_MASK	((MAX_MCC_CMD << 1) - 1)

#define PAGE_SHIFT_4K 12
#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
#define mcc_timeout		120000 /* 12s timeout */
#define BEISCSI_LOGOUT_SYNC_DELAY	250

/* Returns number of pages spanned by the data starting at the given addr */
#define PAGES_4K_SPANNED(_address, size)				\
		((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) +	\
			(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))

/* Returns bit offset within a DWORD of a bitfield */
#define AMAP_BIT_OFFSET(_struct, field)					\
		(((size_t)&(((_struct *)0)->field))%32)

/* Returns the bit mask of the field that is NOT shifted into location. */
static inline u32 amap_mask(u32 bitsize)
{
	return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
}

static inline void amap_set(void *ptr, u32 dw_offset, u32 mask,
					u32 offset, u32 value)
{
	u32 *dw = (u32 *) ptr + dw_offset;
	*dw &= ~(mask << offset);
	*dw |= (mask & value) << offset;
}

#define AMAP_SET_BITS(_struct, field, ptr, val)				\
		amap_set(ptr,						\
			offsetof(_struct, field)/32,			\
			amap_mask(sizeof(((_struct *)0)->field)),	\
			AMAP_BIT_OFFSET(_struct, field),		\
			val)

static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
{
	u32 *dw = ptr;
	return mask & (*(dw + dw_offset) >> offset);
}

#define AMAP_GET_BITS(_struct, field, ptr)				\
		amap_get(ptr,						\
			offsetof(_struct, field)/32,			\
			amap_mask(sizeof(((_struct *)0)->field)),	\
			AMAP_BIT_OFFSET(_struct, field))

#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
static inline void swap_dws(void *wrb, int len)
{
#ifdef __BIG_ENDIAN
	u32 *dw = wrb;
	WARN_ON(len % 4);
	do {
		*dw = cpu_to_le32(*dw);
		dw++;
		len -= 4;
	} while (len);
#endif /* __BIG_ENDIAN */
}
#endif /* BEISCSI_H */
Commit	Line	Data
6733b39a	1	/**
c4f39bda	2	* Copyright (C) 2005 - 2015 Emulex
6733b39a JK	3	* All rights reserved.
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License version 2
	7	* as published by the Free Software Foundation. The full GNU General
	8	* Public License is included in this distribution in the file called COPYING.
	9	*
	10	* Contact Information:
4627de93	11	* linux-drivers@avagotech.com
6733b39a	12	*
c4f39bda	13	* Emulex
255fa9a3 JK	14	* 3333 Susan Street
255fa9a3 JK	15	* Costa Mesa, CA 92626
6733b39a JK	16	*/
	17
	18	#ifndef BEISCSI_H
	19	#define BEISCSI_H
	20
	21	#include <linux/pci.h>
	22	#include <linux/if_vlan.h>
511cbce2	23	#include <linux/irq_poll.h>
bfead3b2 JK	24	#define FW_VER_LEN 32
	25	#define MCC_Q_LEN 128
	26	#define MCC_CQ_LEN 256
756d29c8	27	#define MAX_MCC_CMD 16
f98c96b0 JK	28	/* BladeEngine Generation numbers */
	29	#define BE_GEN2 2
	30	#define BE_GEN3 3
139a1b1e	31	#define BE_GEN4 4
6733b39a JK	32	struct be_dma_mem {
	33	void *va;
	34	dma_addr_t dma;
	35	u32 size;
	36	};
	37
	38	struct be_queue_info {
	39	struct be_dma_mem dma_mem;
	40	u16 len;
	41	u16 entry_size; /* Size of an element in the queue */
	42	u16 id;
	43	u16 tail, head;
	44	bool created;
090e2184	45	u16 used; /* Number of valid elements in the queue */
6733b39a JK	46	};
	47
	48	static inline u32 MODULO(u16 val, u16 limit)
	49	{
	50	WARN_ON(limit & (limit - 1));
	51	return val & (limit - 1);
	52	}
	53
	54	static inline void index_inc(u16 *index, u16 limit)
	55	{
	56	index = MODULO((index + 1), limit);
	57	}
	58
	59	static inline void queue_head_node(struct be_queue_info q)
	60	{
	61	return q->dma_mem.va + q->head * q->entry_size;
	62	}
	63
756d29c8 JK	64	static inline void queue_get_wrb(struct be_queue_info q, unsigned int wrb_num)
	65	{
	66	return q->dma_mem.va + wrb_num * q->entry_size;
	67	}
	68
6733b39a JK	69	static inline void queue_tail_node(struct be_queue_info q)
	70	{
	71	return q->dma_mem.va + q->tail * q->entry_size;
	72	}
	73
	74	static inline void queue_head_inc(struct be_queue_info *q)
	75	{
	76	index_inc(&q->head, q->len);
	77	}
	78
	79	static inline void queue_tail_inc(struct be_queue_info *q)
	80	{
	81	index_inc(&q->tail, q->len);
	82	}
	83
	84	/ISCSI /
	85
73af08e1 JK	86	struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */
	87	bool enable;
	88	u32 min_eqd; /* in usecs */
	89	u32 max_eqd; /* in usecs */
	90	u32 prev_eqd; /* in usecs */
	91	u32 et_eqd; /* configured val when aic is off */
	92	ulong jiffs;
	93	u64 eq_prev; /* Used to calculate eqe */
	94	};
	95
6733b39a	96	struct be_eq_obj {
72fb46a9 JSJ	97	bool todo_mcc_cq;
72fb46a9 JSJ	98	bool todo_cq;
73af08e1	99	u32 cq_count;
6733b39a	100	struct be_queue_info q;
bfead3b2 JK	101	struct beiscsi_hba *phba;
bfead3b2 JK	102	struct be_queue_info *cq;
72fb46a9	103	struct work_struct work_cqs; /* Work Item */
511cbce2	104	struct irq_poll iopoll;
6733b39a JK	105	};
	106
	107	struct be_mcc_obj {
bfead3b2 JK	108	struct be_queue_info q;
bfead3b2 JK	109	struct be_queue_info cq;
6733b39a JK	110	};
6733b39a JK	111
1957aa7f	112	struct beiscsi_mcc_tag_state {
cdde6682 JB	113	unsigned long tag_state;
	114	#define MCC_TAG_STATE_RUNNING 1
	115	#define MCC_TAG_STATE_TIMEOUT 2
1957aa7f JK	116	struct be_dma_mem tag_mem_state;
	117	};
	118
6733b39a JK	119	struct be_ctrl_info {
	120	u8 __iomem *csr;
	121	u8 __iomem db; / Door Bell */
	122	u8 __iomem pcicfg; / PCI config space */
	123	struct pci_dev *pdev;
	124
	125	/* Mbox used for cmd request/response */
c03a50f7	126	struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
6733b39a JK	127	struct be_dma_mem mbox_mem;
	128	/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
	129	* is stored for freeing purpose */
	130	struct be_dma_mem mbox_mem_alloced;
	131
	132	/* MCC Rings */
	133	struct be_mcc_obj mcc_obj;
	134	spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
6733b39a	135
756d29c8 JK	136	wait_queue_head_t mcc_wait[MAX_MCC_CMD + 1];
756d29c8 JK	137	unsigned int mcc_tag[MAX_MCC_CMD];
67296ad9	138	unsigned int mcc_tag_status[MAX_MCC_CMD + 1];
756d29c8 JK	139	unsigned short mcc_alloc_index;
	140	unsigned short mcc_free_index;
	141	unsigned int mcc_tag_available;
1957aa7f JK	142
1957aa7f JK	143	struct beiscsi_mcc_tag_state ptag_state[MAX_MCC_CMD + 1];
6733b39a JK	144	};
	145
	146	#include "be_cmds.h"
	147
67296ad9 JB	148	/* WRB index mask for MCC_Q_LEN queue entries */
	149	#define MCC_Q_WRB_IDX_MASK CQE_STATUS_WRB_MASK
	150	#define MCC_Q_WRB_IDX_SHIFT CQE_STATUS_WRB_SHIFT
	151	/* TAG is from 1...MAX_MCC_CMD, MASK includes MAX_MCC_CMD */
	152	#define MCC_Q_CMD_TAG_MASK ((MAX_MCC_CMD << 1) - 1)
	153
6733b39a JK	154	#define PAGE_SHIFT_4K 12
6733b39a JK	155	#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
92665a66	156	#define mcc_timeout 120000 /* 12s timeout */
9343be74	157	#define BEISCSI_LOGOUT_SYNC_DELAY 250
6733b39a JK	158
6733b39a JK	159	/* Returns number of pages spanned by the data starting at the given addr */
457ff3b7 JK	160	#define PAGES_4K_SPANNED(_address, size) \
457ff3b7 JK	161	((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
6733b39a JK	162	(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
6733b39a JK	163
6733b39a	164	/* Returns bit offset within a DWORD of a bitfield */
457ff3b7	165	#define AMAP_BIT_OFFSET(_struct, field) \
6733b39a JK	166	(((size_t)&(((_struct *)0)->field))%32)
	167
	168	/* Returns the bit mask of the field that is NOT shifted into location. */
	169	static inline u32 amap_mask(u32 bitsize)
	170	{
	171	return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
	172	}
	173
	174	static inline void amap_set(void *ptr, u32 dw_offset, u32 mask,
	175	u32 offset, u32 value)
	176	{
	177	u32 dw = (u32 ) ptr + dw_offset;
	178	*dw &= ~(mask << offset);
	179	*dw \|= (mask & value) << offset;
	180	}
	181
	182	#define AMAP_SET_BITS(_struct, field, ptr, val) \
	183	amap_set(ptr, \
	184	offsetof(_struct, field)/32, \
	185	amap_mask(sizeof(((_struct *)0)->field)), \
	186	AMAP_BIT_OFFSET(_struct, field), \
	187	val)
	188
	189	static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
	190	{
	191	u32 *dw = ptr;
	192	return mask & (*(dw + dw_offset) >> offset);
	193	}
	194
	195	#define AMAP_GET_BITS(_struct, field, ptr) \
	196	amap_get(ptr, \
	197	offsetof(_struct, field)/32, \
	198	amap_mask(sizeof(((_struct *)0)->field)), \
	199	AMAP_BIT_OFFSET(_struct, field))
	200
	201	#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
	202	#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
	203	static inline void swap_dws(void *wrb, int len)
	204	{
	205	#ifdef __BIG_ENDIAN
	206	u32 *dw = wrb;
	207	WARN_ON(len % 4);
	208	do {
	209	dw = cpu_to_le32(dw);
	210	dw++;
	211	len -= 4;
	212	} while (len);
	213	#endif /* __BIG_ENDIAN */
	214	}
6733b39a	215	#endif /* BEISCSI_H */