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e8b12f0f MR |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
3 | * (c) Copyright 2001 Red Hat Inc. | |
4 | * | |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
8 | * Copyright (c) 2000-2010 Adaptec, Inc. | |
9 | * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2, or (at your option) | |
14 | * any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; see the file COPYING. If not, write to | |
23 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | * | |
25 | * Module Name: | |
26 | * src.c | |
27 | * | |
28 | * Abstract: Hardware Device Interface for PMC SRC based controllers | |
29 | * | |
30 | */ | |
31 | ||
32 | #include <linux/kernel.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/types.h> | |
35 | #include <linux/pci.h> | |
36 | #include <linux/spinlock.h> | |
37 | #include <linux/slab.h> | |
38 | #include <linux/blkdev.h> | |
39 | #include <linux/delay.h> | |
e8b12f0f MR |
40 | #include <linux/completion.h> |
41 | #include <linux/time.h> | |
42 | #include <linux/interrupt.h> | |
43 | #include <scsi/scsi_host.h> | |
44 | ||
45 | #include "aacraid.h" | |
46 | ||
47 | static irqreturn_t aac_src_intr_message(int irq, void *dev_id) | |
48 | { | |
49 | struct aac_dev *dev = dev_id; | |
50 | unsigned long bellbits, bellbits_shifted; | |
51 | int our_interrupt = 0; | |
52 | int isFastResponse; | |
53 | u32 index, handle; | |
54 | ||
55 | bellbits = src_readl(dev, MUnit.ODR_R); | |
56 | if (bellbits & PmDoorBellResponseSent) { | |
57 | bellbits = PmDoorBellResponseSent; | |
58 | /* handle async. status */ | |
59 | our_interrupt = 1; | |
60 | index = dev->host_rrq_idx; | |
61 | if (dev->host_rrq[index] == 0) { | |
62 | u32 old_index = index; | |
63 | /* adjust index */ | |
64 | do { | |
65 | index++; | |
66 | if (index == dev->scsi_host_ptr->can_queue + | |
67 | AAC_NUM_MGT_FIB) | |
68 | index = 0; | |
69 | if (dev->host_rrq[index] != 0) | |
70 | break; | |
71 | } while (index != old_index); | |
72 | dev->host_rrq_idx = index; | |
73 | } | |
74 | for (;;) { | |
75 | isFastResponse = 0; | |
76 | /* remove toggle bit (31) */ | |
b5f1758f | 77 | handle = le32_to_cpu(dev->host_rrq[index]) & 0x7fffffff; |
e8b12f0f MR |
78 | /* check fast response bit (30) */ |
79 | if (handle & 0x40000000) | |
80 | isFastResponse = 1; | |
81 | handle &= 0x0000ffff; | |
82 | if (handle == 0) | |
83 | break; | |
84 | ||
85 | aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL); | |
86 | ||
87 | dev->host_rrq[index++] = 0; | |
88 | if (index == dev->scsi_host_ptr->can_queue + | |
89 | AAC_NUM_MGT_FIB) | |
90 | index = 0; | |
91 | dev->host_rrq_idx = index; | |
92 | } | |
93 | } else { | |
94 | bellbits_shifted = (bellbits >> SRC_ODR_SHIFT); | |
95 | if (bellbits_shifted & DoorBellAifPending) { | |
96 | our_interrupt = 1; | |
97 | /* handle AIF */ | |
98 | aac_intr_normal(dev, 0, 2, 0, NULL); | |
11604612 MR |
99 | } else if (bellbits_shifted & OUTBOUNDDOORBELL_0) { |
100 | unsigned long sflags; | |
101 | struct list_head *entry; | |
102 | int send_it = 0; | |
103 | ||
104 | if (dev->sync_fib) { | |
105 | our_interrupt = 1; | |
106 | if (dev->sync_fib->callback) | |
107 | dev->sync_fib->callback(dev->sync_fib->callback_data, | |
108 | dev->sync_fib); | |
109 | spin_lock_irqsave(&dev->sync_fib->event_lock, sflags); | |
110 | if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) { | |
111 | dev->management_fib_count--; | |
112 | up(&dev->sync_fib->event_wait); | |
113 | } | |
114 | spin_unlock_irqrestore(&dev->sync_fib->event_lock, sflags); | |
115 | spin_lock_irqsave(&dev->sync_lock, sflags); | |
116 | if (!list_empty(&dev->sync_fib_list)) { | |
117 | entry = dev->sync_fib_list.next; | |
118 | dev->sync_fib = list_entry(entry, struct fib, fiblink); | |
119 | list_del(entry); | |
120 | send_it = 1; | |
121 | } else { | |
122 | dev->sync_fib = NULL; | |
123 | } | |
124 | spin_unlock_irqrestore(&dev->sync_lock, sflags); | |
125 | if (send_it) { | |
126 | aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB, | |
127 | (u32)dev->sync_fib->hw_fib_pa, 0, 0, 0, 0, 0, | |
128 | NULL, NULL, NULL, NULL, NULL); | |
129 | } | |
130 | } | |
e8b12f0f MR |
131 | } |
132 | } | |
133 | ||
134 | if (our_interrupt) { | |
135 | src_writel(dev, MUnit.ODR_C, bellbits); | |
136 | return IRQ_HANDLED; | |
137 | } | |
138 | return IRQ_NONE; | |
139 | } | |
140 | ||
141 | /** | |
142 | * aac_src_disable_interrupt - Disable interrupts | |
143 | * @dev: Adapter | |
144 | */ | |
145 | ||
146 | static void aac_src_disable_interrupt(struct aac_dev *dev) | |
147 | { | |
148 | src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); | |
149 | } | |
150 | ||
151 | /** | |
152 | * aac_src_enable_interrupt_message - Enable interrupts | |
153 | * @dev: Adapter | |
154 | */ | |
155 | ||
156 | static void aac_src_enable_interrupt_message(struct aac_dev *dev) | |
157 | { | |
158 | src_writel(dev, MUnit.OIMR, dev->OIMR = 0xfffffff8); | |
159 | } | |
160 | ||
161 | /** | |
162 | * src_sync_cmd - send a command and wait | |
163 | * @dev: Adapter | |
164 | * @command: Command to execute | |
165 | * @p1: first parameter | |
166 | * @ret: adapter status | |
167 | * | |
168 | * This routine will send a synchronous command to the adapter and wait | |
169 | * for its completion. | |
170 | */ | |
171 | ||
172 | static int src_sync_cmd(struct aac_dev *dev, u32 command, | |
173 | u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, | |
174 | u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) | |
175 | { | |
176 | unsigned long start; | |
177 | int ok; | |
178 | ||
179 | /* | |
180 | * Write the command into Mailbox 0 | |
181 | */ | |
182 | writel(command, &dev->IndexRegs->Mailbox[0]); | |
183 | /* | |
184 | * Write the parameters into Mailboxes 1 - 6 | |
185 | */ | |
186 | writel(p1, &dev->IndexRegs->Mailbox[1]); | |
187 | writel(p2, &dev->IndexRegs->Mailbox[2]); | |
188 | writel(p3, &dev->IndexRegs->Mailbox[3]); | |
189 | writel(p4, &dev->IndexRegs->Mailbox[4]); | |
190 | ||
191 | /* | |
192 | * Clear the synch command doorbell to start on a clean slate. | |
193 | */ | |
194 | src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); | |
195 | ||
196 | /* | |
197 | * Disable doorbell interrupts | |
198 | */ | |
199 | src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); | |
200 | ||
201 | /* | |
202 | * Force the completion of the mask register write before issuing | |
203 | * the interrupt. | |
204 | */ | |
205 | src_readl(dev, MUnit.OIMR); | |
206 | ||
207 | /* | |
208 | * Signal that there is a new synch command | |
209 | */ | |
210 | src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT); | |
211 | ||
11604612 MR |
212 | if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) { |
213 | ok = 0; | |
214 | start = jiffies; | |
e8b12f0f | 215 | |
11604612 MR |
216 | /* |
217 | * Wait up to 5 minutes | |
e8b12f0f | 218 | */ |
11604612 MR |
219 | while (time_before(jiffies, start+300*HZ)) { |
220 | udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ | |
221 | /* | |
222 | * Mon960 will set doorbell0 bit when it has completed the command. | |
223 | */ | |
224 | if ((src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT) & OUTBOUNDDOORBELL_0) { | |
225 | /* | |
226 | * Clear the doorbell. | |
227 | */ | |
228 | src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); | |
229 | ok = 1; | |
230 | break; | |
231 | } | |
232 | /* | |
233 | * Yield the processor in case we are slow | |
234 | */ | |
235 | msleep(1); | |
e8b12f0f | 236 | } |
11604612 MR |
237 | if (unlikely(ok != 1)) { |
238 | /* | |
239 | * Restore interrupt mask even though we timed out | |
240 | */ | |
241 | aac_adapter_enable_int(dev); | |
242 | return -ETIMEDOUT; | |
243 | } | |
244 | /* | |
245 | * Pull the synch status from Mailbox 0. | |
246 | */ | |
247 | if (status) | |
248 | *status = readl(&dev->IndexRegs->Mailbox[0]); | |
249 | if (r1) | |
250 | *r1 = readl(&dev->IndexRegs->Mailbox[1]); | |
251 | if (r2) | |
252 | *r2 = readl(&dev->IndexRegs->Mailbox[2]); | |
253 | if (r3) | |
254 | *r3 = readl(&dev->IndexRegs->Mailbox[3]); | |
255 | if (r4) | |
256 | *r4 = readl(&dev->IndexRegs->Mailbox[4]); | |
257 | ||
258 | /* | |
259 | * Clear the synch command doorbell. | |
260 | */ | |
261 | src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); | |
e8b12f0f MR |
262 | } |
263 | ||
11604612 MR |
264 | /* |
265 | * Restore interrupt mask | |
266 | */ | |
e8b12f0f MR |
267 | aac_adapter_enable_int(dev); |
268 | return 0; | |
e8b12f0f MR |
269 | } |
270 | ||
271 | /** | |
272 | * aac_src_interrupt_adapter - interrupt adapter | |
273 | * @dev: Adapter | |
274 | * | |
275 | * Send an interrupt to the i960 and breakpoint it. | |
276 | */ | |
277 | ||
278 | static void aac_src_interrupt_adapter(struct aac_dev *dev) | |
279 | { | |
280 | src_sync_cmd(dev, BREAKPOINT_REQUEST, | |
281 | 0, 0, 0, 0, 0, 0, | |
282 | NULL, NULL, NULL, NULL, NULL); | |
283 | } | |
284 | ||
285 | /** | |
286 | * aac_src_notify_adapter - send an event to the adapter | |
287 | * @dev: Adapter | |
288 | * @event: Event to send | |
289 | * | |
290 | * Notify the i960 that something it probably cares about has | |
291 | * happened. | |
292 | */ | |
293 | ||
294 | static void aac_src_notify_adapter(struct aac_dev *dev, u32 event) | |
295 | { | |
296 | switch (event) { | |
297 | ||
298 | case AdapNormCmdQue: | |
299 | src_writel(dev, MUnit.ODR_C, | |
300 | INBOUNDDOORBELL_1 << SRC_ODR_SHIFT); | |
301 | break; | |
302 | case HostNormRespNotFull: | |
303 | src_writel(dev, MUnit.ODR_C, | |
304 | INBOUNDDOORBELL_4 << SRC_ODR_SHIFT); | |
305 | break; | |
306 | case AdapNormRespQue: | |
307 | src_writel(dev, MUnit.ODR_C, | |
308 | INBOUNDDOORBELL_2 << SRC_ODR_SHIFT); | |
309 | break; | |
310 | case HostNormCmdNotFull: | |
311 | src_writel(dev, MUnit.ODR_C, | |
312 | INBOUNDDOORBELL_3 << SRC_ODR_SHIFT); | |
313 | break; | |
314 | case FastIo: | |
315 | src_writel(dev, MUnit.ODR_C, | |
316 | INBOUNDDOORBELL_6 << SRC_ODR_SHIFT); | |
317 | break; | |
318 | case AdapPrintfDone: | |
319 | src_writel(dev, MUnit.ODR_C, | |
320 | INBOUNDDOORBELL_5 << SRC_ODR_SHIFT); | |
321 | break; | |
322 | default: | |
323 | BUG(); | |
324 | break; | |
325 | } | |
326 | } | |
327 | ||
328 | /** | |
329 | * aac_src_start_adapter - activate adapter | |
330 | * @dev: Adapter | |
331 | * | |
332 | * Start up processing on an i960 based AAC adapter | |
333 | */ | |
334 | ||
335 | static void aac_src_start_adapter(struct aac_dev *dev) | |
336 | { | |
337 | struct aac_init *init; | |
338 | ||
339 | init = dev->init; | |
340 | init->HostElapsedSeconds = cpu_to_le32(get_seconds()); | |
341 | ||
342 | /* We can only use a 32 bit address here */ | |
343 | src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa, | |
344 | 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); | |
345 | } | |
346 | ||
347 | /** | |
348 | * aac_src_check_health | |
349 | * @dev: device to check if healthy | |
350 | * | |
351 | * Will attempt to determine if the specified adapter is alive and | |
352 | * capable of handling requests, returning 0 if alive. | |
353 | */ | |
354 | static int aac_src_check_health(struct aac_dev *dev) | |
355 | { | |
356 | u32 status = src_readl(dev, MUnit.OMR); | |
357 | ||
358 | /* | |
359 | * Check to see if the board failed any self tests. | |
360 | */ | |
361 | if (unlikely(status & SELF_TEST_FAILED)) | |
362 | return -1; | |
363 | ||
364 | /* | |
365 | * Check to see if the board panic'd. | |
366 | */ | |
367 | if (unlikely(status & KERNEL_PANIC)) | |
368 | return (status >> 16) & 0xFF; | |
369 | /* | |
370 | * Wait for the adapter to be up and running. | |
371 | */ | |
372 | if (unlikely(!(status & KERNEL_UP_AND_RUNNING))) | |
373 | return -3; | |
374 | /* | |
375 | * Everything is OK | |
376 | */ | |
377 | return 0; | |
378 | } | |
379 | ||
380 | /** | |
381 | * aac_src_deliver_message | |
382 | * @fib: fib to issue | |
383 | * | |
384 | * Will send a fib, returning 0 if successful. | |
385 | */ | |
386 | static int aac_src_deliver_message(struct fib *fib) | |
387 | { | |
388 | struct aac_dev *dev = fib->dev; | |
389 | struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; | |
390 | unsigned long qflags; | |
391 | u32 fibsize; | |
b5f1758f | 392 | dma_addr_t address; |
e8b12f0f | 393 | struct aac_fib_xporthdr *pFibX; |
b5f1758f | 394 | u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size); |
e8b12f0f MR |
395 | |
396 | spin_lock_irqsave(q->lock, qflags); | |
397 | q->numpending++; | |
398 | spin_unlock_irqrestore(q->lock, qflags); | |
399 | ||
400 | /* Calculate the amount to the fibsize bits */ | |
b5f1758f | 401 | fibsize = (sizeof(struct aac_fib_xporthdr) + hdr_size + 127) / 128 - 1; |
e8b12f0f | 402 | if (fibsize > (ALIGN32 - 1)) |
b5f1758f BC |
403 | return -EMSGSIZE; |
404 | ||
405 | /* Fill XPORT header */ | |
406 | pFibX = (void *)fib->hw_fib_va - sizeof(struct aac_fib_xporthdr); | |
407 | /* | |
408 | * This was stored by aac_fib_send() and it is the index into | |
409 | * dev->fibs. Not sure why we add 1 to it, but I suspect that it's | |
410 | * because it can't be zero when we pass it to the hardware. Note that | |
411 | * it was stored in native endian, hence the lack of swapping. -- BenC | |
412 | */ | |
413 | pFibX->Handle = cpu_to_le32(fib->hw_fib_va->header.SenderData + 1); | |
414 | pFibX->HostAddress = cpu_to_le64(fib->hw_fib_pa); | |
415 | pFibX->Size = cpu_to_le32(hdr_size); | |
416 | ||
417 | /* | |
418 | * The xport header has been 32-byte aligned for us so that fibsize | |
419 | * can be masked out of this address by hardware. -- BenC | |
420 | */ | |
421 | address = fib->hw_fib_pa - sizeof(struct aac_fib_xporthdr); | |
422 | if (address & (ALIGN32 - 1)) | |
423 | return -EINVAL; | |
424 | address |= fibsize; | |
425 | src_writel(dev, MUnit.IQ_H, (address >> 32) & 0xffffffff); | |
426 | src_writel(dev, MUnit.IQ_L, address & 0xffffffff); | |
427 | ||
e8b12f0f MR |
428 | return 0; |
429 | } | |
430 | ||
431 | /** | |
432 | * aac_src_ioremap | |
433 | * @size: mapping resize request | |
434 | * | |
435 | */ | |
436 | static int aac_src_ioremap(struct aac_dev *dev, u32 size) | |
437 | { | |
438 | if (!size) { | |
71552505 TH |
439 | iounmap(dev->regs.src.bar1); |
440 | dev->regs.src.bar1 = NULL; | |
e8b12f0f | 441 | iounmap(dev->regs.src.bar0); |
11604612 | 442 | dev->base = dev->regs.src.bar0 = NULL; |
e8b12f0f MR |
443 | return 0; |
444 | } | |
445 | dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2), | |
446 | AAC_MIN_SRC_BAR1_SIZE); | |
447 | dev->base = NULL; | |
448 | if (dev->regs.src.bar1 == NULL) | |
449 | return -1; | |
ff08784b | 450 | dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); |
e8b12f0f MR |
451 | if (dev->base == NULL) { |
452 | iounmap(dev->regs.src.bar1); | |
453 | dev->regs.src.bar1 = NULL; | |
454 | return -1; | |
455 | } | |
456 | dev->IndexRegs = &((struct src_registers __iomem *) | |
11604612 MR |
457 | dev->base)->u.tupelo.IndexRegs; |
458 | return 0; | |
459 | } | |
460 | ||
461 | /** | |
462 | * aac_srcv_ioremap | |
463 | * @size: mapping resize request | |
464 | * | |
465 | */ | |
466 | static int aac_srcv_ioremap(struct aac_dev *dev, u32 size) | |
467 | { | |
468 | if (!size) { | |
469 | iounmap(dev->regs.src.bar0); | |
470 | dev->base = dev->regs.src.bar0 = NULL; | |
471 | return 0; | |
472 | } | |
ff08784b | 473 | dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); |
11604612 MR |
474 | if (dev->base == NULL) |
475 | return -1; | |
476 | dev->IndexRegs = &((struct src_registers __iomem *) | |
477 | dev->base)->u.denali.IndexRegs; | |
e8b12f0f MR |
478 | return 0; |
479 | } | |
480 | ||
481 | static int aac_src_restart_adapter(struct aac_dev *dev, int bled) | |
482 | { | |
483 | u32 var, reset_mask; | |
484 | ||
485 | if (bled >= 0) { | |
486 | if (bled) | |
487 | printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n", | |
488 | dev->name, dev->id, bled); | |
489 | bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, | |
490 | 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL); | |
491 | if (bled || (var != 0x00000001)) | |
11604612 | 492 | return -EINVAL; |
e8b12f0f MR |
493 | if (dev->supplement_adapter_info.SupportedOptions2 & |
494 | AAC_OPTION_DOORBELL_RESET) { | |
495 | src_writel(dev, MUnit.IDR, reset_mask); | |
496 | msleep(5000); /* Delay 5 seconds */ | |
497 | } | |
498 | } | |
499 | ||
500 | if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC) | |
501 | return -ENODEV; | |
502 | ||
503 | if (startup_timeout < 300) | |
504 | startup_timeout = 300; | |
505 | ||
506 | return 0; | |
507 | } | |
508 | ||
509 | /** | |
510 | * aac_src_select_comm - Select communications method | |
511 | * @dev: Adapter | |
512 | * @comm: communications method | |
513 | */ | |
514 | int aac_src_select_comm(struct aac_dev *dev, int comm) | |
515 | { | |
516 | switch (comm) { | |
517 | case AAC_COMM_MESSAGE: | |
518 | dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; | |
519 | dev->a_ops.adapter_intr = aac_src_intr_message; | |
520 | dev->a_ops.adapter_deliver = aac_src_deliver_message; | |
521 | break; | |
522 | default: | |
523 | return 1; | |
524 | } | |
525 | return 0; | |
526 | } | |
527 | ||
528 | /** | |
529 | * aac_src_init - initialize an Cardinal Frey Bar card | |
530 | * @dev: device to configure | |
531 | * | |
532 | */ | |
533 | ||
534 | int aac_src_init(struct aac_dev *dev) | |
535 | { | |
536 | unsigned long start; | |
537 | unsigned long status; | |
538 | int restart = 0; | |
539 | int instance = dev->id; | |
540 | const char *name = dev->name; | |
541 | ||
542 | dev->a_ops.adapter_ioremap = aac_src_ioremap; | |
543 | dev->a_ops.adapter_comm = aac_src_select_comm; | |
544 | ||
545 | dev->base_size = AAC_MIN_SRC_BAR0_SIZE; | |
546 | if (aac_adapter_ioremap(dev, dev->base_size)) { | |
547 | printk(KERN_WARNING "%s: unable to map adapter.\n", name); | |
548 | goto error_iounmap; | |
549 | } | |
550 | ||
551 | /* Failure to reset here is an option ... */ | |
552 | dev->a_ops.adapter_sync_cmd = src_sync_cmd; | |
553 | dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; | |
554 | if ((aac_reset_devices || reset_devices) && | |
555 | !aac_src_restart_adapter(dev, 0)) | |
556 | ++restart; | |
557 | /* | |
558 | * Check to see if the board panic'd while booting. | |
559 | */ | |
560 | status = src_readl(dev, MUnit.OMR); | |
561 | if (status & KERNEL_PANIC) { | |
562 | if (aac_src_restart_adapter(dev, aac_src_check_health(dev))) | |
563 | goto error_iounmap; | |
564 | ++restart; | |
565 | } | |
566 | /* | |
567 | * Check to see if the board failed any self tests. | |
568 | */ | |
569 | status = src_readl(dev, MUnit.OMR); | |
570 | if (status & SELF_TEST_FAILED) { | |
571 | printk(KERN_ERR "%s%d: adapter self-test failed.\n", | |
572 | dev->name, instance); | |
573 | goto error_iounmap; | |
574 | } | |
575 | /* | |
576 | * Check to see if the monitor panic'd while booting. | |
577 | */ | |
578 | if (status & MONITOR_PANIC) { | |
579 | printk(KERN_ERR "%s%d: adapter monitor panic.\n", | |
580 | dev->name, instance); | |
581 | goto error_iounmap; | |
582 | } | |
583 | start = jiffies; | |
584 | /* | |
585 | * Wait for the adapter to be up and running. Wait up to 3 minutes | |
586 | */ | |
587 | while (!((status = src_readl(dev, MUnit.OMR)) & | |
588 | KERNEL_UP_AND_RUNNING)) { | |
589 | if ((restart && | |
590 | (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || | |
591 | time_after(jiffies, start+HZ*startup_timeout)) { | |
592 | printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", | |
593 | dev->name, instance, status); | |
594 | goto error_iounmap; | |
595 | } | |
596 | if (!restart && | |
597 | ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || | |
598 | time_after(jiffies, start + HZ * | |
599 | ((startup_timeout > 60) | |
600 | ? (startup_timeout - 60) | |
601 | : (startup_timeout / 2))))) { | |
602 | if (likely(!aac_src_restart_adapter(dev, | |
603 | aac_src_check_health(dev)))) | |
604 | start = jiffies; | |
605 | ++restart; | |
606 | } | |
607 | msleep(1); | |
608 | } | |
609 | if (restart && aac_commit) | |
610 | aac_commit = 1; | |
611 | /* | |
612 | * Fill in the common function dispatch table. | |
613 | */ | |
614 | dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; | |
615 | dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; | |
616 | dev->a_ops.adapter_notify = aac_src_notify_adapter; | |
617 | dev->a_ops.adapter_sync_cmd = src_sync_cmd; | |
618 | dev->a_ops.adapter_check_health = aac_src_check_health; | |
619 | dev->a_ops.adapter_restart = aac_src_restart_adapter; | |
620 | ||
621 | /* | |
622 | * First clear out all interrupts. Then enable the one's that we | |
623 | * can handle. | |
624 | */ | |
625 | aac_adapter_comm(dev, AAC_COMM_MESSAGE); | |
626 | aac_adapter_disable_int(dev); | |
627 | src_writel(dev, MUnit.ODR_C, 0xffffffff); | |
628 | aac_adapter_enable_int(dev); | |
629 | ||
630 | if (aac_init_adapter(dev) == NULL) | |
631 | goto error_iounmap; | |
632 | if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1) | |
633 | goto error_iounmap; | |
634 | ||
635 | dev->msi = aac_msi && !pci_enable_msi(dev->pdev); | |
636 | ||
637 | if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, | |
638 | IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) { | |
639 | ||
640 | if (dev->msi) | |
641 | pci_disable_msi(dev->pdev); | |
642 | ||
643 | printk(KERN_ERR "%s%d: Interrupt unavailable.\n", | |
644 | name, instance); | |
645 | goto error_iounmap; | |
646 | } | |
647 | dev->dbg_base = pci_resource_start(dev->pdev, 2); | |
648 | dev->dbg_base_mapped = dev->regs.src.bar1; | |
649 | dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE; | |
650 | ||
651 | aac_adapter_enable_int(dev); | |
11604612 MR |
652 | |
653 | if (!dev->sync_mode) { | |
654 | /* | |
655 | * Tell the adapter that all is configured, and it can | |
656 | * start accepting requests | |
657 | */ | |
658 | aac_src_start_adapter(dev); | |
659 | } | |
660 | return 0; | |
661 | ||
662 | error_iounmap: | |
663 | ||
664 | return -1; | |
665 | } | |
666 | ||
667 | /** | |
668 | * aac_srcv_init - initialize an SRCv card | |
669 | * @dev: device to configure | |
670 | * | |
671 | */ | |
672 | ||
673 | int aac_srcv_init(struct aac_dev *dev) | |
674 | { | |
675 | unsigned long start; | |
676 | unsigned long status; | |
677 | int restart = 0; | |
678 | int instance = dev->id; | |
679 | const char *name = dev->name; | |
680 | ||
681 | dev->a_ops.adapter_ioremap = aac_srcv_ioremap; | |
682 | dev->a_ops.adapter_comm = aac_src_select_comm; | |
683 | ||
684 | dev->base_size = AAC_MIN_SRCV_BAR0_SIZE; | |
685 | if (aac_adapter_ioremap(dev, dev->base_size)) { | |
686 | printk(KERN_WARNING "%s: unable to map adapter.\n", name); | |
687 | goto error_iounmap; | |
688 | } | |
689 | ||
690 | /* Failure to reset here is an option ... */ | |
691 | dev->a_ops.adapter_sync_cmd = src_sync_cmd; | |
692 | dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; | |
693 | if ((aac_reset_devices || reset_devices) && | |
694 | !aac_src_restart_adapter(dev, 0)) | |
695 | ++restart; | |
e8b12f0f | 696 | /* |
11604612 | 697 | * Check to see if the board panic'd while booting. |
e8b12f0f | 698 | */ |
11604612 MR |
699 | status = src_readl(dev, MUnit.OMR); |
700 | if (status & KERNEL_PANIC) { | |
701 | if (aac_src_restart_adapter(dev, aac_src_check_health(dev))) | |
702 | goto error_iounmap; | |
703 | ++restart; | |
704 | } | |
705 | /* | |
706 | * Check to see if the board failed any self tests. | |
707 | */ | |
708 | status = src_readl(dev, MUnit.OMR); | |
709 | if (status & SELF_TEST_FAILED) { | |
710 | printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); | |
711 | goto error_iounmap; | |
712 | } | |
713 | /* | |
714 | * Check to see if the monitor panic'd while booting. | |
715 | */ | |
716 | if (status & MONITOR_PANIC) { | |
717 | printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); | |
718 | goto error_iounmap; | |
719 | } | |
720 | start = jiffies; | |
721 | /* | |
722 | * Wait for the adapter to be up and running. Wait up to 3 minutes | |
723 | */ | |
724 | while (!((status = src_readl(dev, MUnit.OMR)) & KERNEL_UP_AND_RUNNING)) { | |
725 | if ((restart && | |
726 | (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || | |
727 | time_after(jiffies, start+HZ*startup_timeout)) { | |
728 | printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", | |
729 | dev->name, instance, status); | |
730 | goto error_iounmap; | |
731 | } | |
732 | if (!restart && | |
733 | ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || | |
734 | time_after(jiffies, start + HZ * | |
735 | ((startup_timeout > 60) | |
736 | ? (startup_timeout - 60) | |
737 | : (startup_timeout / 2))))) { | |
738 | if (likely(!aac_src_restart_adapter(dev, aac_src_check_health(dev)))) | |
739 | start = jiffies; | |
740 | ++restart; | |
741 | } | |
742 | msleep(1); | |
743 | } | |
744 | if (restart && aac_commit) | |
745 | aac_commit = 1; | |
746 | /* | |
747 | * Fill in the common function dispatch table. | |
748 | */ | |
749 | dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; | |
750 | dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; | |
751 | dev->a_ops.adapter_notify = aac_src_notify_adapter; | |
752 | dev->a_ops.adapter_sync_cmd = src_sync_cmd; | |
753 | dev->a_ops.adapter_check_health = aac_src_check_health; | |
754 | dev->a_ops.adapter_restart = aac_src_restart_adapter; | |
755 | ||
756 | /* | |
757 | * First clear out all interrupts. Then enable the one's that we | |
758 | * can handle. | |
759 | */ | |
760 | aac_adapter_comm(dev, AAC_COMM_MESSAGE); | |
761 | aac_adapter_disable_int(dev); | |
762 | src_writel(dev, MUnit.ODR_C, 0xffffffff); | |
763 | aac_adapter_enable_int(dev); | |
e8b12f0f | 764 | |
11604612 MR |
765 | if (aac_init_adapter(dev) == NULL) |
766 | goto error_iounmap; | |
767 | if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1) | |
768 | goto error_iounmap; | |
769 | dev->msi = aac_msi && !pci_enable_msi(dev->pdev); | |
770 | if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, | |
771 | IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) { | |
772 | if (dev->msi) | |
773 | pci_disable_msi(dev->pdev); | |
774 | printk(KERN_ERR "%s%d: Interrupt unavailable.\n", | |
775 | name, instance); | |
776 | goto error_iounmap; | |
777 | } | |
ff08784b | 778 | dev->dbg_base = dev->base_start; |
11604612 MR |
779 | dev->dbg_base_mapped = dev->base; |
780 | dev->dbg_size = dev->base_size; | |
781 | ||
782 | aac_adapter_enable_int(dev); | |
783 | ||
784 | if (!dev->sync_mode) { | |
785 | /* | |
786 | * Tell the adapter that all is configured, and it can | |
787 | * start accepting requests | |
788 | */ | |
789 | aac_src_start_adapter(dev); | |
790 | } | |
e8b12f0f MR |
791 | return 0; |
792 | ||
793 | error_iounmap: | |
794 | ||
795 | return -1; | |
796 | } | |
11604612 | 797 |