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scsi: aacraid: Reorder Adapter status check
[linux-block.git] / drivers / scsi / aacraid / src.c
CommitLineData
e8b12f0f
MR		 1/*
2 * Adaptec AAC series RAID controller driver
3 * (c) Copyright 2001 Red Hat Inc.
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
8 * Copyright (c) 2000-2010 Adaptec, Inc.
f4babba0
RAR		 9 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
10 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com)
e8b12f0f
MR		 11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Module Name:
27 * src.c
28 *
29 * Abstract: Hardware Device Interface for PMC SRC based controllers
30 *
31 */
32
33#include <linux/kernel.h>
34#include <linux/init.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/spinlock.h>
38#include <linux/slab.h>
39#include <linux/blkdev.h>
40#include <linux/delay.h>
e8b12f0f
MR		 41#include <linux/completion.h>
42#include <linux/time.h>
43#include <linux/interrupt.h>
44#include <scsi/scsi_host.h>
45
46#include "aacraid.h"
47
495c0217
MR		 48static int aac_src_get_sync_status(struct aac_dev *dev);
49
305974fe 50static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
e8b12f0f 51{
495c0217
MR		 52 struct aac_msix_ctx *ctx;
53 struct aac_dev *dev;
e8b12f0f 54 unsigned long bellbits, bellbits_shifted;
495c0217
MR		 55 int vector_no;
56 int isFastResponse, mode;
e8b12f0f
MR		 57 u32 index, handle;
58
495c0217
MR		 59 ctx = (struct aac_msix_ctx *)dev_id;
60 dev = ctx->dev;
61 vector_no = ctx->vector_no;
62
63 if (dev->msi_enabled) {
64 mode = AAC_INT_MODE_MSI;
65 if (vector_no == 0) {
66 bellbits = src_readl(dev, MUnit.ODR_MSI);
67 if (bellbits & 0x40000)
68 mode |= AAC_INT_MODE_AIF;
69 if (bellbits & 0x1000)
70 mode |= AAC_INT_MODE_SYNC;
e8b12f0f
MR		 71 }
72 } else {
495c0217
MR		 73 mode = AAC_INT_MODE_INTX;
74 bellbits = src_readl(dev, MUnit.ODR_R);
75 if (bellbits & PmDoorBellResponseSent) {
76 bellbits = PmDoorBellResponseSent;
77 src_writel(dev, MUnit.ODR_C, bellbits);
78 src_readl(dev, MUnit.ODR_C);
79 } else {
80 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
85d22bbf
MR		 81 src_writel(dev, MUnit.ODR_C, bellbits);
82 src_readl(dev, MUnit.ODR_C);
85d22bbf 83
495c0217
MR		 84 if (bellbits_shifted & DoorBellAifPending)
85 mode |= AAC_INT_MODE_AIF;
86 else if (bellbits_shifted & OUTBOUNDDOORBELL_0)
87 mode |= AAC_INT_MODE_SYNC;
88 }
89 }
90
91 if (mode & AAC_INT_MODE_SYNC) {
92 unsigned long sflags;
93 struct list_head *entry;
94 int send_it = 0;
95 extern int aac_sync_mode;
96
97 if (!aac_sync_mode && !dev->msi_enabled) {
c5bebd82
MR		 98 src_writel(dev, MUnit.ODR_C, bellbits);
99 src_readl(dev, MUnit.ODR_C);
495c0217 100 }
c5bebd82 101
495c0217
MR		 102 if (dev->sync_fib) {
103 if (dev->sync_fib->callback)
104 dev->sync_fib->callback(dev->sync_fib->callback_data,
105 dev->sync_fib);
106 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
107 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
108 dev->management_fib_count--;
109 up(&dev->sync_fib->event_wait);
85d22bbf 110 }
495c0217
MR		 111 spin_unlock_irqrestore(&dev->sync_fib->event_lock,
112 sflags);
113 spin_lock_irqsave(&dev->sync_lock, sflags);
114 if (!list_empty(&dev->sync_fib_list)) {
115 entry = dev->sync_fib_list.next;
116 dev->sync_fib = list_entry(entry,
117 struct fib,
118 fiblink);
119 list_del(entry);
120 send_it = 1;
121 } else {
122 dev->sync_fib = NULL;
123 }
124 spin_unlock_irqrestore(&dev->sync_lock, sflags);
125 if (send_it) {
126 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
127 (u32)dev->sync_fib->hw_fib_pa,
128 0, 0, 0, 0, 0,
129 NULL, NULL, NULL, NULL, NULL);
11604612 130 }
e8b12f0f 131 }
495c0217
MR		 132 if (!dev->msi_enabled)
133 mode = 0;
134
e8b12f0f
MR		 135 }
136
495c0217
MR		 137 if (mode & AAC_INT_MODE_AIF) {
138 /* handle AIF */
3ffd6c5a
RAR		 139 if (dev->sa_firmware) {
140 u32 events = src_readl(dev, MUnit.SCR0);
141
142 aac_intr_normal(dev, events, 1, 0, NULL);
143 writel(events, &dev->IndexRegs->Mailbox[0]);
144 src_writel(dev, MUnit.IDR, 1 << 23);
145 } else {
146 if (dev->aif_thread && dev->fsa_dev)
147 aac_intr_normal(dev, 0, 2, 0, NULL);
148 }
495c0217
MR		 149 if (dev->msi_enabled)
150 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT);
151 mode = 0;
e8b12f0f 152 }
495c0217
MR		 153
154 if (mode) {
155 index = dev->host_rrq_idx[vector_no];
156
157 for (;;) {
158 isFastResponse = 0;
159 /* remove toggle bit (31) */
3ffd6c5a
RAR		 160 handle = le32_to_cpu((dev->host_rrq[index])
161 & 0x7fffffff);
162 /* check fast response bits (30, 1) */
495c0217
MR		 163 if (handle & 0x40000000)
164 isFastResponse = 1;
165 handle &= 0x0000ffff;
166 if (handle == 0)
167 break;
3ffd6c5a 168 handle >>= 2;
495c0217
MR		 169 if (dev->msi_enabled && dev->max_msix > 1)
170 atomic_dec(&dev->rrq_outstanding[vector_no]);
3ffd6c5a 171 aac_intr_normal(dev, handle, 0, isFastResponse, NULL);
495c0217
MR		 172 dev->host_rrq[index++] = 0;
173 if (index == (vector_no + 1) * dev->vector_cap)
174 index = vector_no * dev->vector_cap;
175 dev->host_rrq_idx[vector_no] = index;
176 }
177 mode = 0;
178 }
179
180 return IRQ_HANDLED;
e8b12f0f
MR		 181}
182
183/**
184 * aac_src_disable_interrupt - Disable interrupts
185 * @dev: Adapter
186 */
187
188static void aac_src_disable_interrupt(struct aac_dev *dev)
189{
190 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
191}
192
193/**
194 * aac_src_enable_interrupt_message - Enable interrupts
195 * @dev: Adapter
196 */
197
198static void aac_src_enable_interrupt_message(struct aac_dev *dev)
199{
495c0217 200 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT);
e8b12f0f
MR		 201}
202
203/**
204 * src_sync_cmd - send a command and wait
205 * @dev: Adapter
206 * @command: Command to execute
207 * @p1: first parameter
208 * @ret: adapter status
209 *
210 * This routine will send a synchronous command to the adapter and wait
211 * for its completion.
212 */
213
214static int src_sync_cmd(struct aac_dev *dev, u32 command,
215 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
216 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
217{
218 unsigned long start;
dafde947 219 unsigned long delay;
e8b12f0f
MR		 220 int ok;
221
222 /*
223 * Write the command into Mailbox 0
224 */
225 writel(command, &dev->IndexRegs->Mailbox[0]);
226 /*
227 * Write the parameters into Mailboxes 1 - 6
228 */
229 writel(p1, &dev->IndexRegs->Mailbox[1]);
230 writel(p2, &dev->IndexRegs->Mailbox[2]);
231 writel(p3, &dev->IndexRegs->Mailbox[3]);
232 writel(p4, &dev->IndexRegs->Mailbox[4]);
233
234 /*
235 * Clear the synch command doorbell to start on a clean slate.
236 */
495c0217
MR		 237 if (!dev->msi_enabled)
238 src_writel(dev,
239 MUnit.ODR_C,
240 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
e8b12f0f
MR		 241
242 /*
243 * Disable doorbell interrupts
244 */
245 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
246
247 /*
248 * Force the completion of the mask register write before issuing
249 * the interrupt.
250 */
251 src_readl(dev, MUnit.OIMR);
252
253 /*
254 * Signal that there is a new synch command
255 */
256 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
257
11604612
MR		 258 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
259 ok = 0;
260 start = jiffies;
e8b12f0f 261
dafde947
MR		 262 if (command == IOP_RESET_ALWAYS) {
263 /* Wait up to 10 sec */
264 delay = 10*HZ;
265 } else {
266 /* Wait up to 5 minutes */
267 delay = 300*HZ;
268 }
269 while (time_before(jiffies, start+delay)) {
11604612
MR		 270 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
271 /*
272 * Mon960 will set doorbell0 bit when it has completed the command.
273 */
495c0217 274 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) {
11604612
MR		 275 /*
276 * Clear the doorbell.
277 */
495c0217
MR		 278 if (dev->msi_enabled)
279 aac_src_access_devreg(dev,
280 AAC_CLEAR_SYNC_BIT);
281 else
282 src_writel(dev,
283 MUnit.ODR_C,
284 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
11604612
MR		 285 ok = 1;
286 break;
287 }
288 /*
289 * Yield the processor in case we are slow
290 */
291 msleep(1);
e8b12f0f 292 }
11604612
MR		 293 if (unlikely(ok != 1)) {
294 /*
295 * Restore interrupt mask even though we timed out
296 */
297 aac_adapter_enable_int(dev);
298 return -ETIMEDOUT;
299 }
300 /*
301 * Pull the synch status from Mailbox 0.
302 */
303 if (status)
304 *status = readl(&dev->IndexRegs->Mailbox[0]);
305 if (r1)
306 *r1 = readl(&dev->IndexRegs->Mailbox[1]);
307 if (r2)
308 *r2 = readl(&dev->IndexRegs->Mailbox[2]);
309 if (r3)
310 *r3 = readl(&dev->IndexRegs->Mailbox[3]);
311 if (r4)
312 *r4 = readl(&dev->IndexRegs->Mailbox[4]);
495c0217
MR		 313 if (command == GET_COMM_PREFERRED_SETTINGS)
314 dev->max_msix =
315 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
11604612
MR		 316 /*
317 * Clear the synch command doorbell.
318 */
495c0217
MR		 319 if (!dev->msi_enabled)
320 src_writel(dev,
321 MUnit.ODR_C,
322 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
e8b12f0f
MR		 323 }
324
11604612
MR		 325 /*
326 * Restore interrupt mask
327 */
e8b12f0f
MR		 328 aac_adapter_enable_int(dev);
329 return 0;
e8b12f0f
MR		 330}
331
332/**
333 * aac_src_interrupt_adapter - interrupt adapter
334 * @dev: Adapter
335 *
336 * Send an interrupt to the i960 and breakpoint it.
337 */
338
339static void aac_src_interrupt_adapter(struct aac_dev *dev)
340{
341 src_sync_cmd(dev, BREAKPOINT_REQUEST,
342 0, 0, 0, 0, 0, 0,
343 NULL, NULL, NULL, NULL, NULL);
344}
345
346/**
347 * aac_src_notify_adapter - send an event to the adapter
348 * @dev: Adapter
349 * @event: Event to send
350 *
351 * Notify the i960 that something it probably cares about has
352 * happened.
353 */
354
355static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
356{
357 switch (event) {
358
359 case AdapNormCmdQue:
360 src_writel(dev, MUnit.ODR_C,
361 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
362 break;
363 case HostNormRespNotFull:
364 src_writel(dev, MUnit.ODR_C,
365 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
366 break;
367 case AdapNormRespQue:
368 src_writel(dev, MUnit.ODR_C,
369 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
370 break;
371 case HostNormCmdNotFull:
372 src_writel(dev, MUnit.ODR_C,
373 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
374 break;
375 case FastIo:
376 src_writel(dev, MUnit.ODR_C,
377 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
378 break;
379 case AdapPrintfDone:
380 src_writel(dev, MUnit.ODR_C,
381 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
382 break;
383 default:
384 BUG();
385 break;
386 }
387}
388
389/**
390 * aac_src_start_adapter - activate adapter
391 * @dev: Adapter
392 *
393 * Start up processing on an i960 based AAC adapter
394 */
395
396static void aac_src_start_adapter(struct aac_dev *dev)
397{
d1ef4da8 398 union aac_init *init;
495c0217 399 int i;
e8b12f0f 400
85d22bbf 401 /* reset host_rrq_idx first */
495c0217
MR		 402 for (i = 0; i < dev->max_msix; i++) {
403 dev->host_rrq_idx[i] = i * dev->vector_cap;
404 atomic_set(&dev->rrq_outstanding[i], 0);
405 }
3ffd6c5a 406 atomic_set(&dev->msix_counter, 0);
495c0217 407 dev->fibs_pushed_no = 0;
85d22bbf 408
e8b12f0f 409 init = dev->init;
d1ef4da8
RAR		 410 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
411 init->r8.host_elapsed_seconds = cpu_to_le32(get_seconds());
412 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
80a94bb3
AB		 413 lower_32_bits(dev->init_pa),
414 upper_32_bits(dev->init_pa),
d1ef4da8
RAR		 415 sizeof(struct _r8) +
416 (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq),
417 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
418 } else {
419 init->r7.host_elapsed_seconds = cpu_to_le32(get_seconds());
420 // We can only use a 32 bit address here
421 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS,
422 (u32)(ulong)dev->init_pa, 0, 0, 0, 0, 0,
423 NULL, NULL, NULL, NULL, NULL);
424 }
e8b12f0f 425
e8b12f0f
MR		 426}
427
428/**
429 * aac_src_check_health
430 * @dev: device to check if healthy
431 *
432 * Will attempt to determine if the specified adapter is alive and
433 * capable of handling requests, returning 0 if alive.
434 */
435static int aac_src_check_health(struct aac_dev *dev)
436{
437 u32 status = src_readl(dev, MUnit.OMR);
438
c421530b
RAR		 439 /*
440 * Check to see if the board panic'd.
441 */
442 if (unlikely(status & KERNEL_PANIC))
443 goto err_blink;
444
e8b12f0f
MR		 445 /*
446 * Check to see if the board failed any self tests.
447 */
448 if (unlikely(status & SELF_TEST_FAILED))
c421530b 449 goto err_out;
e8b12f0f
MR		 450
451 /*
c421530b 452 * Check to see if the board failed any self tests.
e8b12f0f 453 */
c421530b
RAR		 454 if (unlikely(status & MONITOR_PANIC))
455 goto err_out;
456
e8b12f0f
MR		 457 /*
458 * Wait for the adapter to be up and running.
459 */
460 if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
461 return -3;
462 /*
463 * Everything is OK
464 */
465 return 0;
c421530b
RAR		 466
467err_out:
468 return -1;
469
470err_blink:
471 return (status > 16) & 0xFF;
e8b12f0f
MR		 472}
473
423400e6
RAR		 474static inline u32 aac_get_vector(struct aac_dev *dev)
475{
476 return atomic_inc_return(&dev->msix_counter)%dev->max_msix;
477}
478
e8b12f0f
MR		 479/**
480 * aac_src_deliver_message
481 * @fib: fib to issue
482 *
483 * Will send a fib, returning 0 if successful.
484 */
485static int aac_src_deliver_message(struct fib *fib)
486{
487 struct aac_dev *dev = fib->dev;
488 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
e8b12f0f 489 u32 fibsize;
b5f1758f 490 dma_addr_t address;
e8b12f0f 491 struct aac_fib_xporthdr *pFibX;
423400e6 492 int native_hba;
c6992781
MR		 493#if !defined(writeq)
494 unsigned long flags;
495#endif
496
3f4ce057 497 u16 vector_no;
e8b12f0f 498
ef616233 499 atomic_inc(&q->numpending);
e8b12f0f 500
423400e6
RAR		 501 native_hba = (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) ? 1 : 0;
502
503
504 if (dev->msi_enabled && dev->max_msix > 1 &&
505 (native_hba || fib->hw_fib_va->header.Command != AifRequest)) {
506
507 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)
508 && dev->sa_firmware)
509 vector_no = aac_get_vector(dev);
510 else
511 vector_no = fib->vector_no;
512
513 if (native_hba) {
954b2b5a
RAR		 514 if (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA_TMF) {
515 struct aac_hba_tm_req *tm_req;
516
517 tm_req = (struct aac_hba_tm_req *)
518 fib->hw_fib_va;
519 if (tm_req->iu_type ==
520 HBA_IU_TYPE_SCSI_TM_REQ) {
521 ((struct aac_hba_tm_req *)
522 fib->hw_fib_va)->reply_qid
523 = vector_no;
524 ((struct aac_hba_tm_req *)
525 fib->hw_fib_va)->request_id
526 += (vector_no << 16);
527 } else {
528 ((struct aac_hba_reset_req *)
529 fib->hw_fib_va)->reply_qid
530 = vector_no;
531 ((struct aac_hba_reset_req *)
532 fib->hw_fib_va)->request_id
533 += (vector_no << 16);
534 }
535 } else {
536 ((struct aac_hba_cmd_req *)
537 fib->hw_fib_va)->reply_qid
538 = vector_no;
539 ((struct aac_hba_cmd_req *)
540 fib->hw_fib_va)->request_id
541 += (vector_no << 16);
542 }
423400e6
RAR		 543 } else {
544 fib->hw_fib_va->header.Handle += (vector_no << 16);
545 }
3f4ce057
RAR		 546 } else {
547 vector_no = 0;
495c0217
MR		 548 }
549
3f4ce057
RAR		 550 atomic_inc(&dev->rrq_outstanding[vector_no]);
551
423400e6 552 if (native_hba) {
85d22bbf 553 address = fib->hw_fib_pa;
423400e6
RAR		 554 fibsize = (fib->hbacmd_size + 127) / 128 - 1;
555 if (fibsize > 31)
556 fibsize = 31;
85d22bbf 557 address |= fibsize;
423400e6
RAR		 558#if defined(writeq)
559 src_writeq(dev, MUnit.IQN_L, (u64)address);
560#else
561 spin_lock_irqsave(&fib->dev->iq_lock, flags);
562 src_writel(dev, MUnit.IQN_H,
563 upper_32_bits(address) & 0xffffffff);
564 src_writel(dev, MUnit.IQN_L, address & 0xffffffff);
565 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
566#endif
85d22bbf 567 } else {
423400e6
RAR		 568 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 ||
569 dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
570 /* Calculate the amount to the fibsize bits */
571 fibsize = (le16_to_cpu(fib->hw_fib_va->header.Size)
572 + 127) / 128 - 1;
573 /* New FIB header, 32-bit */
574 address = fib->hw_fib_pa;
575 fib->hw_fib_va->header.StructType = FIB_MAGIC2;
576 fib->hw_fib_va->header.SenderFibAddress =
577 cpu_to_le32((u32)address);
578 fib->hw_fib_va->header.u.TimeStamp = 0;
80a94bb3 579 WARN_ON(upper_32_bits(address) != 0L);
423400e6
RAR		 580 } else {
581 /* Calculate the amount to the fibsize bits */
582 fibsize = (sizeof(struct aac_fib_xporthdr) +
583 le16_to_cpu(fib->hw_fib_va->header.Size)
584 + 127) / 128 - 1;
585 /* Fill XPORT header */
586 pFibX = (struct aac_fib_xporthdr *)
587 ((unsigned char *)fib->hw_fib_va -
588 sizeof(struct aac_fib_xporthdr));
589 pFibX->Handle = fib->hw_fib_va->header.Handle;
590 pFibX->HostAddress =
591 cpu_to_le64((u64)fib->hw_fib_pa);
592 pFibX->Size = cpu_to_le32(
593 le16_to_cpu(fib->hw_fib_va->header.Size));
594 address = fib->hw_fib_pa -
595 (u64)sizeof(struct aac_fib_xporthdr);
596 }
597 if (fibsize > 31)
598 fibsize = 31;
85d22bbf 599 address |= fibsize;
423400e6 600
c6992781 601#if defined(writeq)
423400e6 602 src_writeq(dev, MUnit.IQ_L, (u64)address);
c6992781 603#else
423400e6
RAR		 604 spin_lock_irqsave(&fib->dev->iq_lock, flags);
605 src_writel(dev, MUnit.IQ_H,
606 upper_32_bits(address) & 0xffffffff);
607 src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
608 spin_unlock_irqrestore(&fib->dev->iq_lock, flags);
c6992781 609#endif
423400e6 610 }
e8b12f0f
MR		 611 return 0;
612}
613
614/**
615 * aac_src_ioremap
616 * @size: mapping resize request
617 *
618 */
619static int aac_src_ioremap(struct aac_dev *dev, u32 size)
620{
621 if (!size) {
71552505
TH		 622 iounmap(dev->regs.src.bar1);
623 dev->regs.src.bar1 = NULL;
e8b12f0f 624 iounmap(dev->regs.src.bar0);
11604612 625 dev->base = dev->regs.src.bar0 = NULL;
e8b12f0f
MR		 626 return 0;
627 }
628 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
629 AAC_MIN_SRC_BAR1_SIZE);
630 dev->base = NULL;
631 if (dev->regs.src.bar1 == NULL)
632 return -1;
ff08784b 633 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
e8b12f0f
MR		 634 if (dev->base == NULL) {
635 iounmap(dev->regs.src.bar1);
636 dev->regs.src.bar1 = NULL;
637 return -1;
638 }
639 dev->IndexRegs = &((struct src_registers __iomem *)
11604612
MR		 640 dev->base)->u.tupelo.IndexRegs;
641 return 0;
642}
643
644/**
645 * aac_srcv_ioremap
646 * @size: mapping resize request
647 *
648 */
649static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
650{
651 if (!size) {
652 iounmap(dev->regs.src.bar0);
653 dev->base = dev->regs.src.bar0 = NULL;
654 return 0;
655 }
3ffd6c5a
RAR		 656
657 dev->regs.src.bar1 =
658 ioremap(pci_resource_start(dev->pdev, 2), AAC_MIN_SRCV_BAR1_SIZE);
659 dev->base = NULL;
660 if (dev->regs.src.bar1 == NULL)
661 return -1;
ff08784b 662 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
3ffd6c5a
RAR		 663 if (dev->base == NULL) {
664 iounmap(dev->regs.src.bar1);
665 dev->regs.src.bar1 = NULL;
11604612 666 return -1;
3ffd6c5a 667 }
11604612
MR		 668 dev->IndexRegs = &((struct src_registers __iomem *)
669 dev->base)->u.denali.IndexRegs;
e8b12f0f
MR		 670 return 0;
671}
672
a7e2c642 673void aac_set_intx_mode(struct aac_dev *dev)
31364329
RAR		 674{
675 if (dev->msi_enabled) {
676 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
677 dev->msi_enabled = 0;
678 msleep(5000); /* Delay 5 seconds */
679 }
680}
681
682static void aac_send_iop_reset(struct aac_dev *dev, int bled)
e8b12f0f
MR		 683{
684 u32 var, reset_mask;
685
31364329
RAR		 686 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
687 0, 0, 0, 0, 0, 0, &var,
688 &reset_mask, NULL, NULL, NULL);
689
690 if ((bled || var != 0x00000001) && !dev->doorbell_mask)
691 bled = -EINVAL;
692 else if (dev->doorbell_mask) {
693 reset_mask = dev->doorbell_mask;
694 bled = 0;
695 var = 0x00000001;
696 }
697
698 aac_set_intx_mode(dev);
699
1c68856e 700 if (!bled && (dev->supplement_adapter_info.supported_options2 &
31364329
RAR		 701 AAC_OPTION_DOORBELL_RESET)) {
702 src_writel(dev, MUnit.IDR, reset_mask);
703 } else {
704 src_writel(dev, MUnit.IDR, 0x100);
705 }
706 msleep(30000);
707}
708
709static void aac_send_hardware_soft_reset(struct aac_dev *dev)
710{
711 u_int32_t val;
712
713 val = readl(((char *)(dev->base) + IBW_SWR_OFFSET));
714 val |= 0x01;
715 writel(val, ((char *)(dev->base) + IBW_SWR_OFFSET));
716 msleep_interruptible(20000);
717}
718
719static int aac_src_restart_adapter(struct aac_dev *dev, int bled, u8 reset_type)
720{
721 unsigned long status, start;
722
723 if (bled < 0)
724 goto invalid_out;
725
726 if (bled)
727 pr_err("%s%d: adapter kernel panic'd %x.\n",
e8b12f0f 728 dev->name, dev->id, bled);
495c0217 729
146aa178
RAR		 730 /*
731 * When there is a BlinkLED, IOP_RESET has not effect
732 */
733 if (bled >= 2 && dev->sa_firmware && reset_type & HW_IOP_RESET)
734 reset_type &= ~HW_IOP_RESET;
735
31364329 736 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
495c0217 737
31364329
RAR		 738 switch (reset_type) {
739 case IOP_HWSOFT_RESET:
740 aac_send_iop_reset(dev, bled);
741 /*
742 * Check to see if KERNEL_UP_AND_RUNNING
743 * Wait for the adapter to be up and running.
744 * If !KERNEL_UP_AND_RUNNING issue HW Soft Reset
745 */
746 status = src_readl(dev, MUnit.OMR);
747 if (dev->sa_firmware
748 && !(status & KERNEL_UP_AND_RUNNING)) {
749 start = jiffies;
750 do {
751 status = src_readl(dev, MUnit.OMR);
752 if (time_after(jiffies,
753 start+HZ*SOFT_RESET_TIME)) {
754 aac_send_hardware_soft_reset(dev);
755 start = jiffies;
756 }
757 } while (!(status & KERNEL_UP_AND_RUNNING));
e8b12f0f 758 }
31364329
RAR		 759 break;
760 case HW_SOFT_RESET:
761 if (dev->sa_firmware) {
762 aac_send_hardware_soft_reset(dev);
763 aac_set_intx_mode(dev);
764 }
765 break;
766 default:
767 aac_send_iop_reset(dev, bled);
768 break;
e8b12f0f
MR		 769 }
770
31364329
RAR		 771invalid_out:
772
e8b12f0f
MR		 773 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
774 return -ENODEV;
775
776 if (startup_timeout < 300)
777 startup_timeout = 300;
778
779 return 0;
780}
781
782/**
783 * aac_src_select_comm - Select communications method
784 * @dev: Adapter
785 * @comm: communications method
786 */
a44199ee 787static int aac_src_select_comm(struct aac_dev *dev, int comm)
e8b12f0f
MR		 788{
789 switch (comm) {
790 case AAC_COMM_MESSAGE:
e8b12f0f
MR		 791 dev->a_ops.adapter_intr = aac_src_intr_message;
792 dev->a_ops.adapter_deliver = aac_src_deliver_message;
793 break;
794 default:
795 return 1;
796 }
797 return 0;
798}
799
800/**
801 * aac_src_init - initialize an Cardinal Frey Bar card
802 * @dev: device to configure
803 *
804 */
805
806int aac_src_init(struct aac_dev *dev)
807{
808 unsigned long start;
809 unsigned long status;
810 int restart = 0;
811 int instance = dev->id;
812 const char *name = dev->name;
813
814 dev->a_ops.adapter_ioremap = aac_src_ioremap;
815 dev->a_ops.adapter_comm = aac_src_select_comm;
816
817 dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
818 if (aac_adapter_ioremap(dev, dev->base_size)) {
819 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
820 goto error_iounmap;
821 }
822
823 /* Failure to reset here is an option ... */
824 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
825 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
826 if ((aac_reset_devices || reset_devices) &&
31364329 827 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
e8b12f0f
MR		 828 ++restart;
829 /*
830 * Check to see if the board panic'd while booting.
831 */
832 status = src_readl(dev, MUnit.OMR);
833 if (status & KERNEL_PANIC) {
31364329
RAR		 834 if (aac_src_restart_adapter(dev,
835 aac_src_check_health(dev), IOP_HWSOFT_RESET))
e8b12f0f
MR		 836 goto error_iounmap;
837 ++restart;
838 }
839 /*
840 * Check to see if the board failed any self tests.
841 */
842 status = src_readl(dev, MUnit.OMR);
843 if (status & SELF_TEST_FAILED) {
844 printk(KERN_ERR "%s%d: adapter self-test failed.\n",
845 dev->name, instance);
846 goto error_iounmap;
847 }
848 /*
849 * Check to see if the monitor panic'd while booting.
850 */
851 if (status & MONITOR_PANIC) {
852 printk(KERN_ERR "%s%d: adapter monitor panic.\n",
853 dev->name, instance);
854 goto error_iounmap;
855 }
856 start = jiffies;
857 /*
858 * Wait for the adapter to be up and running. Wait up to 3 minutes
859 */
860 while (!((status = src_readl(dev, MUnit.OMR)) &
861 KERNEL_UP_AND_RUNNING)) {
862 if ((restart &&
863 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
864 time_after(jiffies, start+HZ*startup_timeout)) {
865 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
866 dev->name, instance, status);
867 goto error_iounmap;
868 }
869 if (!restart &&
870 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
871 time_after(jiffies, start + HZ *
872 ((startup_timeout > 60)
873 ? (startup_timeout - 60)
874 : (startup_timeout / 2))))) {
875 if (likely(!aac_src_restart_adapter(dev,
31364329 876 aac_src_check_health(dev), IOP_HWSOFT_RESET)))
e8b12f0f
MR		 877 start = jiffies;
878 ++restart;
879 }
880 msleep(1);
881 }
882 if (restart && aac_commit)
883 aac_commit = 1;
884 /*
885 * Fill in the common function dispatch table.
886 */
887 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
888 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
dafde947 889 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
e8b12f0f
MR		 890 dev->a_ops.adapter_notify = aac_src_notify_adapter;
891 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
892 dev->a_ops.adapter_check_health = aac_src_check_health;
893 dev->a_ops.adapter_restart = aac_src_restart_adapter;
de665f28 894 dev->a_ops.adapter_start = aac_src_start_adapter;
e8b12f0f
MR		 895
896 /*
897 * First clear out all interrupts. Then enable the one's that we
898 * can handle.
899 */
900 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
901 aac_adapter_disable_int(dev);
902 src_writel(dev, MUnit.ODR_C, 0xffffffff);
903 aac_adapter_enable_int(dev);
904
905 if (aac_init_adapter(dev) == NULL)
906 goto error_iounmap;
907 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
908 goto error_iounmap;
909
9022d375 910 dev->msi = !pci_enable_msi(dev->pdev);
e8b12f0f 911
495c0217
MR		 912 dev->aac_msix[0].vector_no = 0;
913 dev->aac_msix[0].dev = dev;
914
e8b12f0f 915 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
495c0217 916 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) {
e8b12f0f
MR		 917
918 if (dev->msi)
919 pci_disable_msi(dev->pdev);
920
921 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
922 name, instance);
923 goto error_iounmap;
924 }
925 dev->dbg_base = pci_resource_start(dev->pdev, 2);
926 dev->dbg_base_mapped = dev->regs.src.bar1;
927 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
dafde947 928 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
e8b12f0f
MR		 929
930 aac_adapter_enable_int(dev);
11604612
MR		 931
932 if (!dev->sync_mode) {
933 /*
934 * Tell the adapter that all is configured, and it can
935 * start accepting requests
936 */
937 aac_src_start_adapter(dev);
938 }
939 return 0;
940
941error_iounmap:
942
943 return -1;
944}
945
946/**
947 * aac_srcv_init - initialize an SRCv card
948 * @dev: device to configure
949 *
950 */
951
952int aac_srcv_init(struct aac_dev *dev)
953{
954 unsigned long start;
955 unsigned long status;
956 int restart = 0;
957 int instance = dev->id;
958 const char *name = dev->name;
959
960 dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
961 dev->a_ops.adapter_comm = aac_src_select_comm;
962
963 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE;
964 if (aac_adapter_ioremap(dev, dev->base_size)) {
965 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
966 goto error_iounmap;
967 }
968
969 /* Failure to reset here is an option ... */
970 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
971 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
972 if ((aac_reset_devices || reset_devices) &&
31364329 973 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET))
11604612 974 ++restart;
2c10cd43
MR		 975 /*
976 * Check to see if flash update is running.
977 * Wait for the adapter to be up and running. Wait up to 5 minutes
978 */
979 status = src_readl(dev, MUnit.OMR);
980 if (status & FLASH_UPD_PENDING) {
981 start = jiffies;
982 do {
983 status = src_readl(dev, MUnit.OMR);
984 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) {
985 printk(KERN_ERR "%s%d: adapter flash update failed.\n",
986 dev->name, instance);
987 goto error_iounmap;
988 }
989 } while (!(status & FLASH_UPD_SUCCESS) &&
990 !(status & FLASH_UPD_FAILED));
991 /* Delay 10 seconds.
992 * Because right now FW is doing a soft reset,
993 * do not read scratch pad register at this time
994 */
995 ssleep(10);
996 }
e8b12f0f 997 /*
11604612 998 * Check to see if the board panic'd while booting.
e8b12f0f 999 */
11604612
MR		 1000 status = src_readl(dev, MUnit.OMR);
1001 if (status & KERNEL_PANIC) {
31364329
RAR		 1002 if (aac_src_restart_adapter(dev,
1003 aac_src_check_health(dev), IOP_HWSOFT_RESET))
11604612
MR		 1004 goto error_iounmap;
1005 ++restart;
1006 }
1007 /*
1008 * Check to see if the board failed any self tests.
1009 */
1010 status = src_readl(dev, MUnit.OMR);
1011 if (status & SELF_TEST_FAILED) {
1012 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
1013 goto error_iounmap;
1014 }
1015 /*
1016 * Check to see if the monitor panic'd while booting.
1017 */
1018 if (status & MONITOR_PANIC) {
1019 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
1020 goto error_iounmap;
1021 }
1022 start = jiffies;
1023 /*
1024 * Wait for the adapter to be up and running. Wait up to 3 minutes
1025 */
2c10cd43
MR		 1026 while (!((status = src_readl(dev, MUnit.OMR)) &
1027 KERNEL_UP_AND_RUNNING) ||
1028 status == 0xffffffff) {
11604612
MR		 1029 if ((restart &&
1030 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
1031 time_after(jiffies, start+HZ*startup_timeout)) {
1032 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
1033 dev->name, instance, status);
1034 goto error_iounmap;
1035 }
1036 if (!restart &&
1037 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
1038 time_after(jiffies, start + HZ *
1039 ((startup_timeout > 60)
1040 ? (startup_timeout - 60)
1041 : (startup_timeout / 2))))) {
31364329
RAR		 1042 if (likely(!aac_src_restart_adapter(dev,
1043 aac_src_check_health(dev), IOP_HWSOFT_RESET)))
11604612
MR		 1044 start = jiffies;
1045 ++restart;
1046 }
1047 msleep(1);
1048 }
1049 if (restart && aac_commit)
1050 aac_commit = 1;
1051 /*
1052 * Fill in the common function dispatch table.
1053 */
1054 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
1055 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
dafde947 1056 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
11604612
MR		 1057 dev->a_ops.adapter_notify = aac_src_notify_adapter;
1058 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
1059 dev->a_ops.adapter_check_health = aac_src_check_health;
1060 dev->a_ops.adapter_restart = aac_src_restart_adapter;
de665f28 1061 dev->a_ops.adapter_start = aac_src_start_adapter;
11604612
MR		 1062
1063 /*
1064 * First clear out all interrupts. Then enable the one's that we
1065 * can handle.
1066 */
1067 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
1068 aac_adapter_disable_int(dev);
1069 src_writel(dev, MUnit.ODR_C, 0xffffffff);
1070 aac_adapter_enable_int(dev);
e8b12f0f 1071
11604612
MR		 1072 if (aac_init_adapter(dev) == NULL)
1073 goto error_iounmap;
d1ef4da8
RAR		 1074 if ((dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) &&
1075 (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3))
11604612 1076 goto error_iounmap;
495c0217
MR		 1077 if (dev->msi_enabled)
1078 aac_src_access_devreg(dev, AAC_ENABLE_MSIX);
8b1462e0
MR		 1079
1080 if (aac_acquire_irq(dev))
1081 goto error_iounmap;
1082
3ffd6c5a
RAR		 1083 dev->dbg_base = pci_resource_start(dev->pdev, 2);
1084 dev->dbg_base_mapped = dev->regs.src.bar1;
1085 dev->dbg_size = AAC_MIN_SRCV_BAR1_SIZE;
dafde947 1086 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
11604612
MR		 1087
1088 aac_adapter_enable_int(dev);
1089
1090 if (!dev->sync_mode) {
1091 /*
1092 * Tell the adapter that all is configured, and it can
1093 * start accepting requests
1094 */
1095 aac_src_start_adapter(dev);
1096 }
e8b12f0f
MR		 1097 return 0;
1098
1099error_iounmap:
1100
1101 return -1;
1102}
11604612 1103
495c0217
MR		 1104void aac_src_access_devreg(struct aac_dev *dev, int mode)
1105{
1106 u_int32_t val;
1107
1108 switch (mode) {
1109 case AAC_ENABLE_INTERRUPT:
1110 src_writel(dev,
1111 MUnit.OIMR,
1112 dev->OIMR = (dev->msi_enabled ?
1113 AAC_INT_ENABLE_TYPE1_MSIX :
1114 AAC_INT_ENABLE_TYPE1_INTX));
1115 break;
1116
1117 case AAC_DISABLE_INTERRUPT:
1118 src_writel(dev,
1119 MUnit.OIMR,
1120 dev->OIMR = AAC_INT_DISABLE_ALL);
1121 break;
1122
1123 case AAC_ENABLE_MSIX:
1124 /* set bit 6 */
1125 val = src_readl(dev, MUnit.IDR);
1126 val |= 0x40;
1127 src_writel(dev, MUnit.IDR, val);
1128 src_readl(dev, MUnit.IDR);
1129 /* unmask int. */
1130 val = PMC_ALL_INTERRUPT_BITS;
1131 src_writel(dev, MUnit.IOAR, val);
1132 val = src_readl(dev, MUnit.OIMR);
1133 src_writel(dev,
1134 MUnit.OIMR,
1135 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
1136 break;
1137
1138 case AAC_DISABLE_MSIX:
1139 /* reset bit 6 */
1140 val = src_readl(dev, MUnit.IDR);
1141 val &= ~0x40;
1142 src_writel(dev, MUnit.IDR, val);
1143 src_readl(dev, MUnit.IDR);
1144 break;
1145
1146 case AAC_CLEAR_AIF_BIT:
1147 /* set bit 5 */
1148 val = src_readl(dev, MUnit.IDR);
1149 val |= 0x20;
1150 src_writel(dev, MUnit.IDR, val);
1151 src_readl(dev, MUnit.IDR);
1152 break;
1153
1154 case AAC_CLEAR_SYNC_BIT:
1155 /* set bit 4 */
1156 val = src_readl(dev, MUnit.IDR);
1157 val |= 0x10;
1158 src_writel(dev, MUnit.IDR, val);
1159 src_readl(dev, MUnit.IDR);
1160 break;
1161
1162 case AAC_ENABLE_INTX:
1163 /* set bit 7 */
1164 val = src_readl(dev, MUnit.IDR);
1165 val |= 0x80;
1166 src_writel(dev, MUnit.IDR, val);
1167 src_readl(dev, MUnit.IDR);
1168 /* unmask int. */
1169 val = PMC_ALL_INTERRUPT_BITS;
1170 src_writel(dev, MUnit.IOAR, val);
1171 src_readl(dev, MUnit.IOAR);
1172 val = src_readl(dev, MUnit.OIMR);
1173 src_writel(dev, MUnit.OIMR,
1174 val & (~(PMC_GLOBAL_INT_BIT2)));
1175 break;
1176
1177 default:
1178 break;
1179 }
1180}
1181
1182static int aac_src_get_sync_status(struct aac_dev *dev)
1183{
1184
1185 int val;
1186
1187 if (dev->msi_enabled)
1188 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0;
1189 else
1190 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT;
1191
1192 return val;
1193}
Linux 6.x block layer and io_uring tree(s)