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aacraid: 240 simple volume support
[linux-block.git] / drivers / scsi / aacraid / src.c
CommitLineData
e8b12f0f
MR		 1/*
2 * Adaptec AAC series RAID controller driver
3 * (c) Copyright 2001 Red Hat Inc.
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Module Name:
26 * src.c
27 *
28 * Abstract: Hardware Device Interface for PMC SRC based controllers
29 *
30 */
31
32#include <linux/kernel.h>
33#include <linux/init.h>
34#include <linux/types.h>
35#include <linux/pci.h>
36#include <linux/spinlock.h>
37#include <linux/slab.h>
38#include <linux/blkdev.h>
39#include <linux/delay.h>
e8b12f0f
MR		 40#include <linux/completion.h>
41#include <linux/time.h>
42#include <linux/interrupt.h>
43#include <scsi/scsi_host.h>
44
45#include "aacraid.h"
46
495c0217
MR		 47static int aac_src_get_sync_status(struct aac_dev *dev);
48
49irqreturn_t aac_src_intr_message(int irq, void *dev_id)
e8b12f0f 50{
495c0217
MR		 51 struct aac_msix_ctx *ctx;
52 struct aac_dev *dev;
e8b12f0f 53 unsigned long bellbits, bellbits_shifted;
495c0217
MR		 54 int vector_no;
55 int isFastResponse, mode;
e8b12f0f
MR		 56 u32 index, handle;
57
495c0217
MR		 58 ctx = (struct aac_msix_ctx *)dev_id;
59 dev = ctx->dev;
60 vector_no = ctx->vector_no;
61
62 if (dev->msi_enabled) {
63 mode = AAC_INT_MODE_MSI;
64 if (vector_no == 0) {
65 bellbits = src_readl(dev, MUnit.ODR_MSI);
66 if (bellbits & 0x40000)
67 mode |= AAC_INT_MODE_AIF;
68 if (bellbits & 0x1000)
69 mode |= AAC_INT_MODE_SYNC;
e8b12f0f
MR		 70 }
71 } else {
495c0217
MR		 72 mode = AAC_INT_MODE_INTX;
73 bellbits = src_readl(dev, MUnit.ODR_R);
74 if (bellbits & PmDoorBellResponseSent) {
75 bellbits = PmDoorBellResponseSent;
76 src_writel(dev, MUnit.ODR_C, bellbits);
77 src_readl(dev, MUnit.ODR_C);
78 } else {
79 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
85d22bbf
MR		 80 src_writel(dev, MUnit.ODR_C, bellbits);
81 src_readl(dev, MUnit.ODR_C);
85d22bbf 82
495c0217
MR		 83 if (bellbits_shifted & DoorBellAifPending)
84 mode |= AAC_INT_MODE_AIF;
85 else if (bellbits_shifted & OUTBOUNDDOORBELL_0)
86 mode |= AAC_INT_MODE_SYNC;
87 }
88 }
89
90 if (mode & AAC_INT_MODE_SYNC) {
91 unsigned long sflags;
92 struct list_head *entry;
93 int send_it = 0;
94 extern int aac_sync_mode;
95
96 if (!aac_sync_mode && !dev->msi_enabled) {
c5bebd82
MR		 97 src_writel(dev, MUnit.ODR_C, bellbits);
98 src_readl(dev, MUnit.ODR_C);
495c0217 99 }
c5bebd82 100
495c0217
MR		 101 if (dev->sync_fib) {
102 if (dev->sync_fib->callback)
103 dev->sync_fib->callback(dev->sync_fib->callback_data,
104 dev->sync_fib);
105 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
106 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
107 dev->management_fib_count--;
108 up(&dev->sync_fib->event_wait);
85d22bbf 109 }
495c0217
MR		 110 spin_unlock_irqrestore(&dev->sync_fib->event_lock,
111 sflags);
112 spin_lock_irqsave(&dev->sync_lock, sflags);
113 if (!list_empty(&dev->sync_fib_list)) {
114 entry = dev->sync_fib_list.next;
115 dev->sync_fib = list_entry(entry,
116 struct fib,
117 fiblink);
118 list_del(entry);
119 send_it = 1;
120 } else {
121 dev->sync_fib = NULL;
122 }
123 spin_unlock_irqrestore(&dev->sync_lock, sflags);
124 if (send_it) {
125 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
126 (u32)dev->sync_fib->hw_fib_pa,
127 0, 0, 0, 0, 0,
128 NULL, NULL, NULL, NULL, NULL);
11604612 129 }
e8b12f0f 130 }
495c0217
MR		 131 if (!dev->msi_enabled)
132 mode = 0;
133
e8b12f0f
MR		 134 }
135
495c0217
MR		 136 if (mode & AAC_INT_MODE_AIF) {
137 /* handle AIF */
138 aac_intr_normal(dev, 0, 2, 0, NULL);
139 if (dev->msi_enabled)
140 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT);
141 mode = 0;
e8b12f0f 142 }
495c0217
MR		 143
144 if (mode) {
145 index = dev->host_rrq_idx[vector_no];
146
147 for (;;) {
148 isFastResponse = 0;
149 /* remove toggle bit (31) */
150 handle = (dev->host_rrq[index] & 0x7fffffff);
151 /* check fast response bit (30) */
152 if (handle & 0x40000000)
153 isFastResponse = 1;
154 handle &= 0x0000ffff;
155 if (handle == 0)
156 break;
157 if (dev->msi_enabled && dev->max_msix > 1)
158 atomic_dec(&dev->rrq_outstanding[vector_no]);
159 aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL);
160 dev->host_rrq[index++] = 0;
161 if (index == (vector_no + 1) * dev->vector_cap)
162 index = vector_no * dev->vector_cap;
163 dev->host_rrq_idx[vector_no] = index;
164 }
165 mode = 0;
166 }
167
168 return IRQ_HANDLED;
e8b12f0f
MR		 169}
170
171/**
172 * aac_src_disable_interrupt - Disable interrupts
173 * @dev: Adapter
174 */
175
176static void aac_src_disable_interrupt(struct aac_dev *dev)
177{
178 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
179}
180
181/**
182 * aac_src_enable_interrupt_message - Enable interrupts
183 * @dev: Adapter
184 */
185
186static void aac_src_enable_interrupt_message(struct aac_dev *dev)
187{
495c0217 188 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT);
e8b12f0f
MR		 189}
190
191/**
192 * src_sync_cmd - send a command and wait
193 * @dev: Adapter
194 * @command: Command to execute
195 * @p1: first parameter
196 * @ret: adapter status
197 *
198 * This routine will send a synchronous command to the adapter and wait
199 * for its completion.
200 */
201
202static int src_sync_cmd(struct aac_dev *dev, u32 command,
203 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
204 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
205{
206 unsigned long start;
207 int ok;
208
209 /*
210 * Write the command into Mailbox 0
211 */
212 writel(command, &dev->IndexRegs->Mailbox[0]);
213 /*
214 * Write the parameters into Mailboxes 1 - 6
215 */
216 writel(p1, &dev->IndexRegs->Mailbox[1]);
217 writel(p2, &dev->IndexRegs->Mailbox[2]);
218 writel(p3, &dev->IndexRegs->Mailbox[3]);
219 writel(p4, &dev->IndexRegs->Mailbox[4]);
220
221 /*
222 * Clear the synch command doorbell to start on a clean slate.
223 */
495c0217
MR		 224 if (!dev->msi_enabled)
225 src_writel(dev,
226 MUnit.ODR_C,
227 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
e8b12f0f
MR		 228
229 /*
230 * Disable doorbell interrupts
231 */
232 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
233
234 /*
235 * Force the completion of the mask register write before issuing
236 * the interrupt.
237 */
238 src_readl(dev, MUnit.OIMR);
239
240 /*
241 * Signal that there is a new synch command
242 */
243 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
244
11604612
MR		 245 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
246 ok = 0;
247 start = jiffies;
e8b12f0f 248
11604612
MR		 249 /*
250 * Wait up to 5 minutes
e8b12f0f 251 */
11604612
MR		 252 while (time_before(jiffies, start+300*HZ)) {
253 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
254 /*
255 * Mon960 will set doorbell0 bit when it has completed the command.
256 */
495c0217 257 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) {
11604612
MR		 258 /*
259 * Clear the doorbell.
260 */
495c0217
MR		 261 if (dev->msi_enabled)
262 aac_src_access_devreg(dev,
263 AAC_CLEAR_SYNC_BIT);
264 else
265 src_writel(dev,
266 MUnit.ODR_C,
267 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
11604612
MR		 268 ok = 1;
269 break;
270 }
271 /*
272 * Yield the processor in case we are slow
273 */
274 msleep(1);
e8b12f0f 275 }
11604612
MR		 276 if (unlikely(ok != 1)) {
277 /*
278 * Restore interrupt mask even though we timed out
279 */
280 aac_adapter_enable_int(dev);
281 return -ETIMEDOUT;
282 }
283 /*
284 * Pull the synch status from Mailbox 0.
285 */
286 if (status)
287 *status = readl(&dev->IndexRegs->Mailbox[0]);
288 if (r1)
289 *r1 = readl(&dev->IndexRegs->Mailbox[1]);
290 if (r2)
291 *r2 = readl(&dev->IndexRegs->Mailbox[2]);
292 if (r3)
293 *r3 = readl(&dev->IndexRegs->Mailbox[3]);
294 if (r4)
295 *r4 = readl(&dev->IndexRegs->Mailbox[4]);
495c0217
MR		 296 if (command == GET_COMM_PREFERRED_SETTINGS)
297 dev->max_msix =
298 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF;
11604612
MR		 299 /*
300 * Clear the synch command doorbell.
301 */
495c0217
MR		 302 if (!dev->msi_enabled)
303 src_writel(dev,
304 MUnit.ODR_C,
305 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
e8b12f0f
MR		 306 }
307
11604612
MR		 308 /*
309 * Restore interrupt mask
310 */
e8b12f0f
MR		 311 aac_adapter_enable_int(dev);
312 return 0;
e8b12f0f
MR		 313}
314
315/**
316 * aac_src_interrupt_adapter - interrupt adapter
317 * @dev: Adapter
318 *
319 * Send an interrupt to the i960 and breakpoint it.
320 */
321
322static void aac_src_interrupt_adapter(struct aac_dev *dev)
323{
324 src_sync_cmd(dev, BREAKPOINT_REQUEST,
325 0, 0, 0, 0, 0, 0,
326 NULL, NULL, NULL, NULL, NULL);
327}
328
329/**
330 * aac_src_notify_adapter - send an event to the adapter
331 * @dev: Adapter
332 * @event: Event to send
333 *
334 * Notify the i960 that something it probably cares about has
335 * happened.
336 */
337
338static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
339{
340 switch (event) {
341
342 case AdapNormCmdQue:
343 src_writel(dev, MUnit.ODR_C,
344 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
345 break;
346 case HostNormRespNotFull:
347 src_writel(dev, MUnit.ODR_C,
348 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
349 break;
350 case AdapNormRespQue:
351 src_writel(dev, MUnit.ODR_C,
352 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
353 break;
354 case HostNormCmdNotFull:
355 src_writel(dev, MUnit.ODR_C,
356 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
357 break;
358 case FastIo:
359 src_writel(dev, MUnit.ODR_C,
360 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
361 break;
362 case AdapPrintfDone:
363 src_writel(dev, MUnit.ODR_C,
364 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
365 break;
366 default:
367 BUG();
368 break;
369 }
370}
371
372/**
373 * aac_src_start_adapter - activate adapter
374 * @dev: Adapter
375 *
376 * Start up processing on an i960 based AAC adapter
377 */
378
379static void aac_src_start_adapter(struct aac_dev *dev)
380{
381 struct aac_init *init;
495c0217 382 int i;
e8b12f0f 383
85d22bbf 384 /* reset host_rrq_idx first */
495c0217
MR		 385 for (i = 0; i < dev->max_msix; i++) {
386 dev->host_rrq_idx[i] = i * dev->vector_cap;
387 atomic_set(&dev->rrq_outstanding[i], 0);
388 }
389 dev->fibs_pushed_no = 0;
85d22bbf 390
e8b12f0f
MR		 391 init = dev->init;
392 init->HostElapsedSeconds = cpu_to_le32(get_seconds());
393
394 /* We can only use a 32 bit address here */
395 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
396 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
397}
398
399/**
400 * aac_src_check_health
401 * @dev: device to check if healthy
402 *
403 * Will attempt to determine if the specified adapter is alive and
404 * capable of handling requests, returning 0 if alive.
405 */
406static int aac_src_check_health(struct aac_dev *dev)
407{
408 u32 status = src_readl(dev, MUnit.OMR);
409
410 /*
411 * Check to see if the board failed any self tests.
412 */
413 if (unlikely(status & SELF_TEST_FAILED))
414 return -1;
415
416 /*
417 * Check to see if the board panic'd.
418 */
419 if (unlikely(status & KERNEL_PANIC))
420 return (status >> 16) & 0xFF;
421 /*
422 * Wait for the adapter to be up and running.
423 */
424 if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
425 return -3;
426 /*
427 * Everything is OK
428 */
429 return 0;
430}
431
432/**
433 * aac_src_deliver_message
434 * @fib: fib to issue
435 *
436 * Will send a fib, returning 0 if successful.
437 */
438static int aac_src_deliver_message(struct fib *fib)
439{
440 struct aac_dev *dev = fib->dev;
441 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
442 unsigned long qflags;
443 u32 fibsize;
b5f1758f 444 dma_addr_t address;
e8b12f0f 445 struct aac_fib_xporthdr *pFibX;
b5f1758f 446 u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size);
e8b12f0f
MR		 447
448 spin_lock_irqsave(q->lock, qflags);
449 q->numpending++;
450 spin_unlock_irqrestore(q->lock, qflags);
451
495c0217
MR		 452 if (dev->msi_enabled && fib->hw_fib_va->header.Command != AifRequest &&
453 dev->max_msix > 1) {
454 u_int16_t vector_no, first_choice = 0xffff;
455
456 vector_no = dev->fibs_pushed_no % dev->max_msix;
457 do {
458 vector_no += 1;
459 if (vector_no == dev->max_msix)
460 vector_no = 1;
461 if (atomic_read(&dev->rrq_outstanding[vector_no]) <
462 dev->vector_cap)
463 break;
464 if (0xffff == first_choice)
465 first_choice = vector_no;
466 else if (vector_no == first_choice)
467 break;
468 } while (1);
469 if (vector_no == first_choice)
470 vector_no = 0;
471 atomic_inc(&dev->rrq_outstanding[vector_no]);
472 if (dev->fibs_pushed_no == 0xffffffff)
473 dev->fibs_pushed_no = 0;
474 else
475 dev->fibs_pushed_no++;
476 fib->hw_fib_va->header.Handle += (vector_no << 16);
477 }
478
85d22bbf
MR		 479 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
480 /* Calculate the amount to the fibsize bits */
481 fibsize = (hdr_size + 127) / 128 - 1;
482 if (fibsize > (ALIGN32 - 1))
483 return -EMSGSIZE;
484 /* New FIB header, 32-bit */
485 address = fib->hw_fib_pa;
486 fib->hw_fib_va->header.StructType = FIB_MAGIC2;
487 fib->hw_fib_va->header.SenderFibAddress = (u32)address;
488 fib->hw_fib_va->header.u.TimeStamp = 0;
98f99a8a 489 BUG_ON(upper_32_bits(address) != 0L);
85d22bbf
MR		 490 address |= fibsize;
491 } else {
492 /* Calculate the amount to the fibsize bits */
493 fibsize = (sizeof(struct aac_fib_xporthdr) + hdr_size + 127) / 128 - 1;
494 if (fibsize > (ALIGN32 - 1))
495 return -EMSGSIZE;
496
497 /* Fill XPORT header */
498 pFibX = (void *)fib->hw_fib_va - sizeof(struct aac_fib_xporthdr);
499 pFibX->Handle = cpu_to_le32(fib->hw_fib_va->header.Handle);
500 pFibX->HostAddress = cpu_to_le64(fib->hw_fib_pa);
501 pFibX->Size = cpu_to_le32(hdr_size);
b5f1758f 502
85d22bbf
MR		 503 /*
504 * The xport header has been 32-byte aligned for us so that fibsize
505 * can be masked out of this address by hardware. -- BenC
506 */
507 address = fib->hw_fib_pa - sizeof(struct aac_fib_xporthdr);
508 if (address & (ALIGN32 - 1))
509 return -EINVAL;
510 address |= fibsize;
511 }
b5f1758f 512
98f99a8a 513 src_writel(dev, MUnit.IQ_H, upper_32_bits(address) & 0xffffffff);
b5f1758f
BC		 514 src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
515
e8b12f0f
MR		 516 return 0;
517}
518
519/**
520 * aac_src_ioremap
521 * @size: mapping resize request
522 *
523 */
524static int aac_src_ioremap(struct aac_dev *dev, u32 size)
525{
526 if (!size) {
71552505
TH		 527 iounmap(dev->regs.src.bar1);
528 dev->regs.src.bar1 = NULL;
e8b12f0f 529 iounmap(dev->regs.src.bar0);
11604612 530 dev->base = dev->regs.src.bar0 = NULL;
e8b12f0f
MR		 531 return 0;
532 }
533 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
534 AAC_MIN_SRC_BAR1_SIZE);
535 dev->base = NULL;
536 if (dev->regs.src.bar1 == NULL)
537 return -1;
ff08784b 538 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
e8b12f0f
MR		 539 if (dev->base == NULL) {
540 iounmap(dev->regs.src.bar1);
541 dev->regs.src.bar1 = NULL;
542 return -1;
543 }
544 dev->IndexRegs = &((struct src_registers __iomem *)
11604612
MR		 545 dev->base)->u.tupelo.IndexRegs;
546 return 0;
547}
548
549/**
550 * aac_srcv_ioremap
551 * @size: mapping resize request
552 *
553 */
554static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
555{
556 if (!size) {
557 iounmap(dev->regs.src.bar0);
558 dev->base = dev->regs.src.bar0 = NULL;
559 return 0;
560 }
ff08784b 561 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
11604612
MR		 562 if (dev->base == NULL)
563 return -1;
564 dev->IndexRegs = &((struct src_registers __iomem *)
565 dev->base)->u.denali.IndexRegs;
e8b12f0f
MR		 566 return 0;
567}
568
569static int aac_src_restart_adapter(struct aac_dev *dev, int bled)
570{
571 u32 var, reset_mask;
572
573 if (bled >= 0) {
574 if (bled)
575 printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
576 dev->name, dev->id, bled);
577 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
578 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL);
579 if (bled || (var != 0x00000001))
11604612 580 return -EINVAL;
495c0217
MR		 581
582 if ((dev->pdev->device == PMC_DEVICE_S7 ||
583 dev->pdev->device == PMC_DEVICE_S8 ||
584 dev->pdev->device == PMC_DEVICE_S9) && dev->msi_enabled) {
585 aac_src_access_devreg(dev, AAC_ENABLE_INTX);
586 dev->msi_enabled = 0;
587 msleep(5000); /* Delay 5 seconds */
588 }
589
e8b12f0f
MR		 590 if (dev->supplement_adapter_info.SupportedOptions2 &
591 AAC_OPTION_DOORBELL_RESET) {
592 src_writel(dev, MUnit.IDR, reset_mask);
495c0217 593 ssleep(45);
e8b12f0f
MR		 594 }
595 }
596
597 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
598 return -ENODEV;
599
600 if (startup_timeout < 300)
601 startup_timeout = 300;
602
603 return 0;
604}
605
606/**
607 * aac_src_select_comm - Select communications method
608 * @dev: Adapter
609 * @comm: communications method
610 */
611int aac_src_select_comm(struct aac_dev *dev, int comm)
612{
613 switch (comm) {
614 case AAC_COMM_MESSAGE:
615 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
616 dev->a_ops.adapter_intr = aac_src_intr_message;
617 dev->a_ops.adapter_deliver = aac_src_deliver_message;
618 break;
619 default:
620 return 1;
621 }
622 return 0;
623}
624
625/**
626 * aac_src_init - initialize an Cardinal Frey Bar card
627 * @dev: device to configure
628 *
629 */
630
631int aac_src_init(struct aac_dev *dev)
632{
633 unsigned long start;
634 unsigned long status;
635 int restart = 0;
636 int instance = dev->id;
637 const char *name = dev->name;
638
639 dev->a_ops.adapter_ioremap = aac_src_ioremap;
640 dev->a_ops.adapter_comm = aac_src_select_comm;
641
642 dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
643 if (aac_adapter_ioremap(dev, dev->base_size)) {
644 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
645 goto error_iounmap;
646 }
647
648 /* Failure to reset here is an option ... */
649 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
650 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
651 if ((aac_reset_devices || reset_devices) &&
652 !aac_src_restart_adapter(dev, 0))
653 ++restart;
654 /*
655 * Check to see if the board panic'd while booting.
656 */
657 status = src_readl(dev, MUnit.OMR);
658 if (status & KERNEL_PANIC) {
659 if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
660 goto error_iounmap;
661 ++restart;
662 }
663 /*
664 * Check to see if the board failed any self tests.
665 */
666 status = src_readl(dev, MUnit.OMR);
667 if (status & SELF_TEST_FAILED) {
668 printk(KERN_ERR "%s%d: adapter self-test failed.\n",
669 dev->name, instance);
670 goto error_iounmap;
671 }
672 /*
673 * Check to see if the monitor panic'd while booting.
674 */
675 if (status & MONITOR_PANIC) {
676 printk(KERN_ERR "%s%d: adapter monitor panic.\n",
677 dev->name, instance);
678 goto error_iounmap;
679 }
680 start = jiffies;
681 /*
682 * Wait for the adapter to be up and running. Wait up to 3 minutes
683 */
684 while (!((status = src_readl(dev, MUnit.OMR)) &
685 KERNEL_UP_AND_RUNNING)) {
686 if ((restart &&
687 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
688 time_after(jiffies, start+HZ*startup_timeout)) {
689 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
690 dev->name, instance, status);
691 goto error_iounmap;
692 }
693 if (!restart &&
694 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
695 time_after(jiffies, start + HZ *
696 ((startup_timeout > 60)
697 ? (startup_timeout - 60)
698 : (startup_timeout / 2))))) {
699 if (likely(!aac_src_restart_adapter(dev,
700 aac_src_check_health(dev))))
701 start = jiffies;
702 ++restart;
703 }
704 msleep(1);
705 }
706 if (restart && aac_commit)
707 aac_commit = 1;
708 /*
709 * Fill in the common function dispatch table.
710 */
711 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
712 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
713 dev->a_ops.adapter_notify = aac_src_notify_adapter;
714 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
715 dev->a_ops.adapter_check_health = aac_src_check_health;
716 dev->a_ops.adapter_restart = aac_src_restart_adapter;
717
718 /*
719 * First clear out all interrupts. Then enable the one's that we
720 * can handle.
721 */
722 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
723 aac_adapter_disable_int(dev);
724 src_writel(dev, MUnit.ODR_C, 0xffffffff);
725 aac_adapter_enable_int(dev);
726
727 if (aac_init_adapter(dev) == NULL)
728 goto error_iounmap;
729 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
730 goto error_iounmap;
731
732 dev->msi = aac_msi && !pci_enable_msi(dev->pdev);
733
495c0217
MR		 734 dev->aac_msix[0].vector_no = 0;
735 dev->aac_msix[0].dev = dev;
736
e8b12f0f 737 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
495c0217 738 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) {
e8b12f0f
MR		 739
740 if (dev->msi)
741 pci_disable_msi(dev->pdev);
742
743 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
744 name, instance);
745 goto error_iounmap;
746 }
747 dev->dbg_base = pci_resource_start(dev->pdev, 2);
748 dev->dbg_base_mapped = dev->regs.src.bar1;
749 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
750
751 aac_adapter_enable_int(dev);
11604612
MR		 752
753 if (!dev->sync_mode) {
754 /*
755 * Tell the adapter that all is configured, and it can
756 * start accepting requests
757 */
758 aac_src_start_adapter(dev);
759 }
760 return 0;
761
762error_iounmap:
763
764 return -1;
765}
766
767/**
768 * aac_srcv_init - initialize an SRCv card
769 * @dev: device to configure
770 *
771 */
772
773int aac_srcv_init(struct aac_dev *dev)
774{
775 unsigned long start;
776 unsigned long status;
777 int restart = 0;
778 int instance = dev->id;
495c0217 779 int i, j;
11604612
MR		 780 const char *name = dev->name;
781
782 dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
783 dev->a_ops.adapter_comm = aac_src_select_comm;
784
785 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE;
786 if (aac_adapter_ioremap(dev, dev->base_size)) {
787 printk(KERN_WARNING "%s: unable to map adapter.\n", name);
788 goto error_iounmap;
789 }
790
791 /* Failure to reset here is an option ... */
792 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
793 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
794 if ((aac_reset_devices || reset_devices) &&
795 !aac_src_restart_adapter(dev, 0))
796 ++restart;
2c10cd43
MR		 797 /*
798 * Check to see if flash update is running.
799 * Wait for the adapter to be up and running. Wait up to 5 minutes
800 */
801 status = src_readl(dev, MUnit.OMR);
802 if (status & FLASH_UPD_PENDING) {
803 start = jiffies;
804 do {
805 status = src_readl(dev, MUnit.OMR);
806 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) {
807 printk(KERN_ERR "%s%d: adapter flash update failed.\n",
808 dev->name, instance);
809 goto error_iounmap;
810 }
811 } while (!(status & FLASH_UPD_SUCCESS) &&
812 !(status & FLASH_UPD_FAILED));
813 /* Delay 10 seconds.
814 * Because right now FW is doing a soft reset,
815 * do not read scratch pad register at this time
816 */
817 ssleep(10);
818 }
e8b12f0f 819 /*
11604612 820 * Check to see if the board panic'd while booting.
e8b12f0f 821 */
11604612
MR		 822 status = src_readl(dev, MUnit.OMR);
823 if (status & KERNEL_PANIC) {
824 if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
825 goto error_iounmap;
826 ++restart;
827 }
828 /*
829 * Check to see if the board failed any self tests.
830 */
831 status = src_readl(dev, MUnit.OMR);
832 if (status & SELF_TEST_FAILED) {
833 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
834 goto error_iounmap;
835 }
836 /*
837 * Check to see if the monitor panic'd while booting.
838 */
839 if (status & MONITOR_PANIC) {
840 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
841 goto error_iounmap;
842 }
843 start = jiffies;
844 /*
845 * Wait for the adapter to be up and running. Wait up to 3 minutes
846 */
2c10cd43
MR		 847 while (!((status = src_readl(dev, MUnit.OMR)) &
848 KERNEL_UP_AND_RUNNING) ||
849 status == 0xffffffff) {
11604612
MR		 850 if ((restart &&
851 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
852 time_after(jiffies, start+HZ*startup_timeout)) {
853 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
854 dev->name, instance, status);
855 goto error_iounmap;
856 }
857 if (!restart &&
858 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
859 time_after(jiffies, start + HZ *
860 ((startup_timeout > 60)
861 ? (startup_timeout - 60)
862 : (startup_timeout / 2))))) {
863 if (likely(!aac_src_restart_adapter(dev, aac_src_check_health(dev))))
864 start = jiffies;
865 ++restart;
866 }
867 msleep(1);
868 }
869 if (restart && aac_commit)
870 aac_commit = 1;
871 /*
872 * Fill in the common function dispatch table.
873 */
874 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
875 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
876 dev->a_ops.adapter_notify = aac_src_notify_adapter;
877 dev->a_ops.adapter_sync_cmd = src_sync_cmd;
878 dev->a_ops.adapter_check_health = aac_src_check_health;
879 dev->a_ops.adapter_restart = aac_src_restart_adapter;
880
881 /*
882 * First clear out all interrupts. Then enable the one's that we
883 * can handle.
884 */
885 aac_adapter_comm(dev, AAC_COMM_MESSAGE);
886 aac_adapter_disable_int(dev);
887 src_writel(dev, MUnit.ODR_C, 0xffffffff);
888 aac_adapter_enable_int(dev);
e8b12f0f 889
11604612
MR		 890 if (aac_init_adapter(dev) == NULL)
891 goto error_iounmap;
85d22bbf 892 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE2)
11604612 893 goto error_iounmap;
495c0217
MR		 894 if (dev->msi_enabled)
895 aac_src_access_devreg(dev, AAC_ENABLE_MSIX);
896 if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) {
897 for (i = 0; i < dev->max_msix; i++) {
898 dev->aac_msix[i].vector_no = i;
899 dev->aac_msix[i].dev = dev;
900
901 if (request_irq(dev->msixentry[i].vector,
902 dev->a_ops.adapter_intr,
903 0,
904 "aacraid",
905 &(dev->aac_msix[i]))) {
906 printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n",
907 name, instance, i);
908 for (j = 0 ; j < i ; j++)
909 free_irq(dev->msixentry[j].vector,
910 &(dev->aac_msix[j]));
911 pci_disable_msix(dev->pdev);
912 goto error_iounmap;
913 }
914 }
915 } else {
916 dev->aac_msix[0].vector_no = 0;
917 dev->aac_msix[0].dev = dev;
918
919 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
920 IRQF_SHARED,
921 "aacraid",
922 &(dev->aac_msix[0])) < 0) {
923 if (dev->msi)
924 pci_disable_msi(dev->pdev);
925 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
926 name, instance);
927 goto error_iounmap;
928 }
11604612 929 }
ff08784b 930 dev->dbg_base = dev->base_start;
11604612
MR		 931 dev->dbg_base_mapped = dev->base;
932 dev->dbg_size = dev->base_size;
933
934 aac_adapter_enable_int(dev);
935
936 if (!dev->sync_mode) {
937 /*
938 * Tell the adapter that all is configured, and it can
939 * start accepting requests
940 */
941 aac_src_start_adapter(dev);
942 }
e8b12f0f
MR		 943 return 0;
944
945error_iounmap:
946
947 return -1;
948}
11604612 949
495c0217
MR		 950void aac_src_access_devreg(struct aac_dev *dev, int mode)
951{
952 u_int32_t val;
953
954 switch (mode) {
955 case AAC_ENABLE_INTERRUPT:
956 src_writel(dev,
957 MUnit.OIMR,
958 dev->OIMR = (dev->msi_enabled ?
959 AAC_INT_ENABLE_TYPE1_MSIX :
960 AAC_INT_ENABLE_TYPE1_INTX));
961 break;
962
963 case AAC_DISABLE_INTERRUPT:
964 src_writel(dev,
965 MUnit.OIMR,
966 dev->OIMR = AAC_INT_DISABLE_ALL);
967 break;
968
969 case AAC_ENABLE_MSIX:
970 /* set bit 6 */
971 val = src_readl(dev, MUnit.IDR);
972 val |= 0x40;
973 src_writel(dev, MUnit.IDR, val);
974 src_readl(dev, MUnit.IDR);
975 /* unmask int. */
976 val = PMC_ALL_INTERRUPT_BITS;
977 src_writel(dev, MUnit.IOAR, val);
978 val = src_readl(dev, MUnit.OIMR);
979 src_writel(dev,
980 MUnit.OIMR,
981 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0)));
982 break;
983
984 case AAC_DISABLE_MSIX:
985 /* reset bit 6 */
986 val = src_readl(dev, MUnit.IDR);
987 val &= ~0x40;
988 src_writel(dev, MUnit.IDR, val);
989 src_readl(dev, MUnit.IDR);
990 break;
991
992 case AAC_CLEAR_AIF_BIT:
993 /* set bit 5 */
994 val = src_readl(dev, MUnit.IDR);
995 val |= 0x20;
996 src_writel(dev, MUnit.IDR, val);
997 src_readl(dev, MUnit.IDR);
998 break;
999
1000 case AAC_CLEAR_SYNC_BIT:
1001 /* set bit 4 */
1002 val = src_readl(dev, MUnit.IDR);
1003 val |= 0x10;
1004 src_writel(dev, MUnit.IDR, val);
1005 src_readl(dev, MUnit.IDR);
1006 break;
1007
1008 case AAC_ENABLE_INTX:
1009 /* set bit 7 */
1010 val = src_readl(dev, MUnit.IDR);
1011 val |= 0x80;
1012 src_writel(dev, MUnit.IDR, val);
1013 src_readl(dev, MUnit.IDR);
1014 /* unmask int. */
1015 val = PMC_ALL_INTERRUPT_BITS;
1016 src_writel(dev, MUnit.IOAR, val);
1017 src_readl(dev, MUnit.IOAR);
1018 val = src_readl(dev, MUnit.OIMR);
1019 src_writel(dev, MUnit.OIMR,
1020 val & (~(PMC_GLOBAL_INT_BIT2)));
1021 break;
1022
1023 default:
1024 break;
1025 }
1026}
1027
1028static int aac_src_get_sync_status(struct aac_dev *dev)
1029{
1030
1031 int val;
1032
1033 if (dev->msi_enabled)
1034 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0;
1035 else
1036 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT;
1037
1038 return val;
1039}
Linux 6.x block layer and io_uring tree(s)