Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
fa195afe | 3 | * (c) Copyright 2001 Red Hat Inc. |
1da177e4 LT |
4 | * |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
912d4e88 | 8 | * Copyright (c) 2000-2007 Adaptec, Inc. (aacraid@adaptec.com) |
1da177e4 LT |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2, or (at your option) | |
13 | * any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; see the file COPYING. If not, write to | |
22 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | * | |
24 | * Module Name: | |
25 | * rx.c | |
26 | * | |
27 | * Abstract: Hardware miniport for Drawbridge specific hardware functions. | |
28 | * | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/types.h> | |
1da177e4 LT |
34 | #include <linux/pci.h> |
35 | #include <linux/spinlock.h> | |
1da177e4 LT |
36 | #include <linux/blkdev.h> |
37 | #include <linux/delay.h> | |
38 | #include <linux/completion.h> | |
39 | #include <linux/time.h> | |
40 | #include <linux/interrupt.h> | |
1da177e4 LT |
41 | |
42 | #include <scsi/scsi_host.h> | |
43 | ||
44 | #include "aacraid.h" | |
45 | ||
28713324 | 46 | static irqreturn_t aac_rx_intr_producer(int irq, void *dev_id) |
1da177e4 LT |
47 | { |
48 | struct aac_dev *dev = dev_id; | |
28713324 MH |
49 | unsigned long bellbits; |
50 | u8 intstat = rx_readb(dev, MUnit.OISR); | |
8e0c5ebd | 51 | |
28713324 MH |
52 | /* |
53 | * Read mask and invert because drawbridge is reversed. | |
54 | * This allows us to only service interrupts that have | |
55 | * been enabled. | |
56 | * Check to see if this is our interrupt. If it isn't just return | |
57 | */ | |
912d4e88 | 58 | if (likely(intstat & ~(dev->OIMR))) { |
28713324 | 59 | bellbits = rx_readl(dev, OutboundDoorbellReg); |
912d4e88 | 60 | if (unlikely(bellbits & DoorBellPrintfReady)) { |
28713324 MH |
61 | aac_printf(dev, readl (&dev->IndexRegs->Mailbox[5])); |
62 | rx_writel(dev, MUnit.ODR,DoorBellPrintfReady); | |
63 | rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone); | |
1da177e4 | 64 | } |
912d4e88 | 65 | else if (unlikely(bellbits & DoorBellAdapterNormCmdReady)) { |
28713324 MH |
66 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady); |
67 | aac_command_normal(&dev->queues->queue[HostNormCmdQueue]); | |
68 | } | |
912d4e88 | 69 | else if (likely(bellbits & DoorBellAdapterNormRespReady)) { |
28713324 MH |
70 | rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady); |
71 | aac_response_normal(&dev->queues->queue[HostNormRespQueue]); | |
72 | } | |
912d4e88 | 73 | else if (unlikely(bellbits & DoorBellAdapterNormCmdNotFull)) { |
28713324 | 74 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); |
1da177e4 | 75 | } |
912d4e88 | 76 | else if (unlikely(bellbits & DoorBellAdapterNormRespNotFull)) { |
28713324 MH |
77 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull); |
78 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull); | |
79 | } | |
80 | return IRQ_HANDLED; | |
81 | } | |
82 | return IRQ_NONE; | |
83 | } | |
84 | ||
85 | static irqreturn_t aac_rx_intr_message(int irq, void *dev_id) | |
86 | { | |
87 | struct aac_dev *dev = dev_id; | |
88 | u32 Index = rx_readl(dev, MUnit.OutboundQueue); | |
912d4e88 | 89 | if (unlikely(Index == 0xFFFFFFFFL)) |
28713324 | 90 | Index = rx_readl(dev, MUnit.OutboundQueue); |
912d4e88 | 91 | if (likely(Index != 0xFFFFFFFFL)) { |
28713324 | 92 | do { |
912d4e88 | 93 | if (unlikely(aac_intr_normal(dev, Index))) { |
28713324 MH |
94 | rx_writel(dev, MUnit.OutboundQueue, Index); |
95 | rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespReady); | |
96 | } | |
97 | Index = rx_readl(dev, MUnit.OutboundQueue); | |
98 | } while (Index != 0xFFFFFFFFL); | |
99 | return IRQ_HANDLED; | |
1da177e4 LT |
100 | } |
101 | return IRQ_NONE; | |
102 | } | |
103 | ||
bd1aac80 MH |
104 | /** |
105 | * aac_rx_disable_interrupt - Disable interrupts | |
106 | * @dev: Adapter | |
107 | */ | |
108 | ||
109 | static void aac_rx_disable_interrupt(struct aac_dev *dev) | |
110 | { | |
111 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff); | |
112 | } | |
113 | ||
28713324 MH |
114 | /** |
115 | * aac_rx_enable_interrupt_producer - Enable interrupts | |
116 | * @dev: Adapter | |
117 | */ | |
118 | ||
119 | static void aac_rx_enable_interrupt_producer(struct aac_dev *dev) | |
120 | { | |
121 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb); | |
122 | } | |
123 | ||
124 | /** | |
125 | * aac_rx_enable_interrupt_message - Enable interrupts | |
126 | * @dev: Adapter | |
127 | */ | |
128 | ||
129 | static void aac_rx_enable_interrupt_message(struct aac_dev *dev) | |
130 | { | |
131 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7); | |
132 | } | |
133 | ||
1da177e4 LT |
134 | /** |
135 | * rx_sync_cmd - send a command and wait | |
136 | * @dev: Adapter | |
137 | * @command: Command to execute | |
138 | * @p1: first parameter | |
139 | * @ret: adapter status | |
140 | * | |
141 | * This routine will send a synchronous command to the adapter and wait | |
142 | * for its completion. | |
143 | */ | |
144 | ||
7c00ffa3 MH |
145 | static int rx_sync_cmd(struct aac_dev *dev, u32 command, |
146 | u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, | |
147 | u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) | |
1da177e4 LT |
148 | { |
149 | unsigned long start; | |
150 | int ok; | |
151 | /* | |
152 | * Write the command into Mailbox 0 | |
153 | */ | |
76a7f8fd | 154 | writel(command, &dev->IndexRegs->Mailbox[0]); |
1da177e4 | 155 | /* |
7c00ffa3 | 156 | * Write the parameters into Mailboxes 1 - 6 |
1da177e4 | 157 | */ |
76a7f8fd MH |
158 | writel(p1, &dev->IndexRegs->Mailbox[1]); |
159 | writel(p2, &dev->IndexRegs->Mailbox[2]); | |
160 | writel(p3, &dev->IndexRegs->Mailbox[3]); | |
161 | writel(p4, &dev->IndexRegs->Mailbox[4]); | |
1da177e4 LT |
162 | /* |
163 | * Clear the synch command doorbell to start on a clean slate. | |
164 | */ | |
165 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
166 | /* | |
167 | * Disable doorbell interrupts | |
168 | */ | |
7c00ffa3 | 169 | rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff); |
1da177e4 LT |
170 | /* |
171 | * Force the completion of the mask register write before issuing | |
172 | * the interrupt. | |
173 | */ | |
174 | rx_readb (dev, MUnit.OIMR); | |
175 | /* | |
176 | * Signal that there is a new synch command | |
177 | */ | |
178 | rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0); | |
179 | ||
180 | ok = 0; | |
181 | start = jiffies; | |
182 | ||
183 | /* | |
184 | * Wait up to 30 seconds | |
185 | */ | |
186 | while (time_before(jiffies, start+30*HZ)) | |
187 | { | |
188 | udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ | |
189 | /* | |
190 | * Mon960 will set doorbell0 bit when it has completed the command. | |
191 | */ | |
192 | if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) { | |
193 | /* | |
194 | * Clear the doorbell. | |
195 | */ | |
196 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
197 | ok = 1; | |
198 | break; | |
199 | } | |
200 | /* | |
201 | * Yield the processor in case we are slow | |
202 | */ | |
1241f359 | 203 | msleep(1); |
1da177e4 | 204 | } |
912d4e88 | 205 | if (unlikely(ok != 1)) { |
1da177e4 LT |
206 | /* |
207 | * Restore interrupt mask even though we timed out | |
208 | */ | |
28713324 | 209 | aac_adapter_enable_int(dev); |
1da177e4 LT |
210 | return -ETIMEDOUT; |
211 | } | |
212 | /* | |
213 | * Pull the synch status from Mailbox 0. | |
214 | */ | |
215 | if (status) | |
76a7f8fd | 216 | *status = readl(&dev->IndexRegs->Mailbox[0]); |
7c00ffa3 | 217 | if (r1) |
76a7f8fd | 218 | *r1 = readl(&dev->IndexRegs->Mailbox[1]); |
7c00ffa3 | 219 | if (r2) |
76a7f8fd | 220 | *r2 = readl(&dev->IndexRegs->Mailbox[2]); |
7c00ffa3 | 221 | if (r3) |
76a7f8fd | 222 | *r3 = readl(&dev->IndexRegs->Mailbox[3]); |
7c00ffa3 | 223 | if (r4) |
76a7f8fd | 224 | *r4 = readl(&dev->IndexRegs->Mailbox[4]); |
1da177e4 LT |
225 | /* |
226 | * Clear the synch command doorbell. | |
227 | */ | |
228 | rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0); | |
229 | /* | |
230 | * Restore interrupt mask | |
231 | */ | |
28713324 | 232 | aac_adapter_enable_int(dev); |
1da177e4 LT |
233 | return 0; |
234 | ||
235 | } | |
236 | ||
237 | /** | |
238 | * aac_rx_interrupt_adapter - interrupt adapter | |
239 | * @dev: Adapter | |
240 | * | |
241 | * Send an interrupt to the i960 and breakpoint it. | |
242 | */ | |
243 | ||
244 | static void aac_rx_interrupt_adapter(struct aac_dev *dev) | |
245 | { | |
7c00ffa3 | 246 | rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); |
1da177e4 LT |
247 | } |
248 | ||
249 | /** | |
250 | * aac_rx_notify_adapter - send an event to the adapter | |
251 | * @dev: Adapter | |
252 | * @event: Event to send | |
253 | * | |
254 | * Notify the i960 that something it probably cares about has | |
255 | * happened. | |
256 | */ | |
257 | ||
258 | static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event) | |
259 | { | |
260 | switch (event) { | |
261 | ||
262 | case AdapNormCmdQue: | |
263 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1); | |
264 | break; | |
265 | case HostNormRespNotFull: | |
266 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4); | |
267 | break; | |
268 | case AdapNormRespQue: | |
269 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2); | |
270 | break; | |
271 | case HostNormCmdNotFull: | |
272 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3); | |
273 | break; | |
274 | case HostShutdown: | |
1da177e4 LT |
275 | break; |
276 | case FastIo: | |
277 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6); | |
278 | break; | |
279 | case AdapPrintfDone: | |
280 | rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5); | |
281 | break; | |
282 | default: | |
283 | BUG(); | |
284 | break; | |
285 | } | |
286 | } | |
287 | ||
288 | /** | |
289 | * aac_rx_start_adapter - activate adapter | |
290 | * @dev: Adapter | |
291 | * | |
292 | * Start up processing on an i960 based AAC adapter | |
293 | */ | |
294 | ||
9695a25d | 295 | static void aac_rx_start_adapter(struct aac_dev *dev) |
1da177e4 | 296 | { |
1da177e4 LT |
297 | struct aac_init *init; |
298 | ||
299 | init = dev->init; | |
300 | init->HostElapsedSeconds = cpu_to_le32(get_seconds()); | |
1da177e4 | 301 | // We can only use a 32 bit address here |
7c00ffa3 MH |
302 | rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa, |
303 | 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); | |
1da177e4 LT |
304 | } |
305 | ||
306 | /** | |
307 | * aac_rx_check_health | |
308 | * @dev: device to check if healthy | |
309 | * | |
310 | * Will attempt to determine if the specified adapter is alive and | |
311 | * capable of handling requests, returning 0 if alive. | |
312 | */ | |
313 | static int aac_rx_check_health(struct aac_dev *dev) | |
314 | { | |
315 | u32 status = rx_readl(dev, MUnit.OMRx[0]); | |
316 | ||
317 | /* | |
318 | * Check to see if the board failed any self tests. | |
319 | */ | |
912d4e88 | 320 | if (unlikely(status & SELF_TEST_FAILED)) |
1da177e4 LT |
321 | return -1; |
322 | /* | |
323 | * Check to see if the board panic'd. | |
324 | */ | |
912d4e88 | 325 | if (unlikely(status & KERNEL_PANIC)) { |
1da177e4 LT |
326 | char * buffer; |
327 | struct POSTSTATUS { | |
56b58712 MH |
328 | __le32 Post_Command; |
329 | __le32 Post_Address; | |
1da177e4 LT |
330 | } * post; |
331 | dma_addr_t paddr, baddr; | |
332 | int ret; | |
333 | ||
912d4e88 | 334 | if (likely((status & 0xFF000000L) == 0xBC000000L)) |
1da177e4 LT |
335 | return (status >> 16) & 0xFF; |
336 | buffer = pci_alloc_consistent(dev->pdev, 512, &baddr); | |
337 | ret = -2; | |
912d4e88 | 338 | if (unlikely(buffer == NULL)) |
1da177e4 LT |
339 | return ret; |
340 | post = pci_alloc_consistent(dev->pdev, | |
341 | sizeof(struct POSTSTATUS), &paddr); | |
912d4e88 | 342 | if (unlikely(post == NULL)) { |
1da177e4 LT |
343 | pci_free_consistent(dev->pdev, 512, buffer, baddr); |
344 | return ret; | |
345 | } | |
346 | memset(buffer, 0, 512); | |
347 | post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS); | |
348 | post->Post_Address = cpu_to_le32(baddr); | |
349 | rx_writel(dev, MUnit.IMRx[0], paddr); | |
7c00ffa3 MH |
350 | rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0, |
351 | NULL, NULL, NULL, NULL, NULL); | |
1da177e4 LT |
352 | pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS), |
353 | post, paddr); | |
912d4e88 | 354 | if (likely((buffer[0] == '0') && ((buffer[1] == 'x') || (buffer[1] == 'X')))) { |
ecc30990 AS |
355 | ret = (hex_to_bin(buffer[2]) << 4) + |
356 | hex_to_bin(buffer[3]); | |
1da177e4 LT |
357 | } |
358 | pci_free_consistent(dev->pdev, 512, buffer, baddr); | |
359 | return ret; | |
360 | } | |
361 | /* | |
362 | * Wait for the adapter to be up and running. | |
363 | */ | |
912d4e88 | 364 | if (unlikely(!(status & KERNEL_UP_AND_RUNNING))) |
1da177e4 LT |
365 | return -3; |
366 | /* | |
367 | * Everything is OK | |
368 | */ | |
369 | return 0; | |
370 | } | |
371 | ||
8e0c5ebd | 372 | /** |
28713324 | 373 | * aac_rx_deliver_producer |
8e0c5ebd MH |
374 | * @fib: fib to issue |
375 | * | |
376 | * Will send a fib, returning 0 if successful. | |
377 | */ | |
2ab01efd | 378 | int aac_rx_deliver_producer(struct fib * fib) |
8e0c5ebd | 379 | { |
8e0c5ebd | 380 | struct aac_dev *dev = fib->dev; |
28713324 MH |
381 | struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; |
382 | unsigned long qflags; | |
8e0c5ebd | 383 | u32 Index; |
28713324 | 384 | unsigned long nointr = 0; |
8e0c5ebd | 385 | |
28713324 | 386 | spin_lock_irqsave(q->lock, qflags); |
a8166a52 | 387 | aac_queue_get( dev, &Index, AdapNormCmdQueue, fib->hw_fib_va, 1, fib, &nointr); |
28713324 MH |
388 | |
389 | q->numpending++; | |
390 | *(q->headers.producer) = cpu_to_le32(Index + 1); | |
391 | spin_unlock_irqrestore(q->lock, qflags); | |
392 | if (!(nointr & aac_config.irq_mod)) | |
393 | aac_adapter_notify(dev, AdapNormCmdQueue); | |
394 | ||
395 | return 0; | |
396 | } | |
397 | ||
398 | /** | |
399 | * aac_rx_deliver_message | |
400 | * @fib: fib to issue | |
401 | * | |
402 | * Will send a fib, returning 0 if successful. | |
403 | */ | |
404 | static int aac_rx_deliver_message(struct fib * fib) | |
405 | { | |
406 | struct aac_dev *dev = fib->dev; | |
407 | struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; | |
408 | unsigned long qflags; | |
409 | u32 Index; | |
410 | u64 addr; | |
411 | volatile void __iomem *device; | |
412 | ||
413 | unsigned long count = 10000000L; /* 50 seconds */ | |
414 | spin_lock_irqsave(q->lock, qflags); | |
415 | q->numpending++; | |
416 | spin_unlock_irqrestore(q->lock, qflags); | |
417 | for(;;) { | |
8e0c5ebd | 418 | Index = rx_readl(dev, MUnit.InboundQueue); |
912d4e88 | 419 | if (unlikely(Index == 0xFFFFFFFFL)) |
28713324 | 420 | Index = rx_readl(dev, MUnit.InboundQueue); |
912d4e88 | 421 | if (likely(Index != 0xFFFFFFFFL)) |
28713324 MH |
422 | break; |
423 | if (--count == 0) { | |
424 | spin_lock_irqsave(q->lock, qflags); | |
425 | q->numpending--; | |
426 | spin_unlock_irqrestore(q->lock, qflags); | |
427 | return -ETIMEDOUT; | |
428 | } | |
429 | udelay(5); | |
430 | } | |
76a7f8fd | 431 | device = dev->base + Index; |
28713324 | 432 | addr = fib->hw_fib_pa; |
8e0c5ebd MH |
433 | writel((u32)(addr & 0xffffffff), device); |
434 | device += sizeof(u32); | |
435 | writel((u32)(addr >> 32), device); | |
436 | device += sizeof(u32); | |
a8166a52 | 437 | writel(le16_to_cpu(fib->hw_fib_va->header.Size), device); |
8e0c5ebd | 438 | rx_writel(dev, MUnit.InboundQueue, Index); |
8e0c5ebd MH |
439 | return 0; |
440 | } | |
441 | ||
76a7f8fd MH |
442 | /** |
443 | * aac_rx_ioremap | |
444 | * @size: mapping resize request | |
445 | * | |
446 | */ | |
447 | static int aac_rx_ioremap(struct aac_dev * dev, u32 size) | |
448 | { | |
449 | if (!size) { | |
450 | iounmap(dev->regs.rx); | |
451 | return 0; | |
452 | } | |
453 | dev->base = dev->regs.rx = ioremap(dev->scsi_host_ptr->base, size); | |
454 | if (dev->base == NULL) | |
455 | return -1; | |
456 | dev->IndexRegs = &dev->regs.rx->IndexRegs; | |
457 | return 0; | |
458 | } | |
459 | ||
8418852d | 460 | static int aac_rx_restart_adapter(struct aac_dev *dev, int bled) |
8c23cd74 MH |
461 | { |
462 | u32 var; | |
463 | ||
29c97684 | 464 | if (!(dev->supplement_adapter_info.SupportedOptions2 & |
a3940da5 | 465 | AAC_OPTION_MU_RESET) || (bled >= 0) || (bled == -2)) { |
29c97684 SM |
466 | if (bled) |
467 | printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n", | |
468 | dev->name, dev->id, bled); | |
469 | else { | |
470 | bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, | |
471 | 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL); | |
9859c1aa | 472 | if (!bled && (var != 0x00000001) && (var != 0x3803000F)) |
29c97684 SM |
473 | bled = -EINVAL; |
474 | } | |
475 | if (bled && (bled != -ETIMEDOUT)) | |
476 | bled = aac_adapter_sync_cmd(dev, IOP_RESET, | |
477 | 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL); | |
8418852d | 478 | |
29c97684 SM |
479 | if (bled && (bled != -ETIMEDOUT)) |
480 | return -EINVAL; | |
481 | } | |
18a6598f | 482 | if (bled || (var == 0x3803000F)) { /* USE_OTHER_METHOD */ |
8418852d MH |
483 | rx_writel(dev, MUnit.reserved2, 3); |
484 | msleep(5000); /* Delay 5 seconds */ | |
485 | var = 0x00000001; | |
486 | } | |
8c23cd74 | 487 | if (var != 0x00000001) |
8418852d | 488 | return -EINVAL; |
8c23cd74 | 489 | if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC) |
8418852d | 490 | return -ENODEV; |
1208bab5 SM |
491 | if (startup_timeout < 300) |
492 | startup_timeout = 300; | |
8c23cd74 MH |
493 | return 0; |
494 | } | |
495 | ||
28713324 MH |
496 | /** |
497 | * aac_rx_select_comm - Select communications method | |
498 | * @dev: Adapter | |
499 | * @comm: communications method | |
500 | */ | |
501 | ||
502 | int aac_rx_select_comm(struct aac_dev *dev, int comm) | |
503 | { | |
504 | switch (comm) { | |
505 | case AAC_COMM_PRODUCER: | |
506 | dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_producer; | |
507 | dev->a_ops.adapter_intr = aac_rx_intr_producer; | |
508 | dev->a_ops.adapter_deliver = aac_rx_deliver_producer; | |
509 | break; | |
510 | case AAC_COMM_MESSAGE: | |
511 | dev->a_ops.adapter_enable_int = aac_rx_enable_interrupt_message; | |
512 | dev->a_ops.adapter_intr = aac_rx_intr_message; | |
513 | dev->a_ops.adapter_deliver = aac_rx_deliver_message; | |
514 | break; | |
515 | default: | |
516 | return 1; | |
517 | } | |
518 | return 0; | |
519 | } | |
520 | ||
1da177e4 LT |
521 | /** |
522 | * aac_rx_init - initialize an i960 based AAC card | |
523 | * @dev: device to configure | |
524 | * | |
525 | * Allocate and set up resources for the i960 based AAC variants. The | |
526 | * device_interface in the commregion will be allocated and linked | |
527 | * to the comm region. | |
528 | */ | |
529 | ||
76a7f8fd | 530 | int _aac_rx_init(struct aac_dev *dev) |
1da177e4 LT |
531 | { |
532 | unsigned long start; | |
533 | unsigned long status; | |
18a6598f | 534 | int restart = 0; |
912d4e88 SM |
535 | int instance = dev->id; |
536 | const char * name = dev->name; | |
1da177e4 | 537 | |
76a7f8fd MH |
538 | if (aac_adapter_ioremap(dev, dev->base_size)) { |
539 | printk(KERN_WARNING "%s: unable to map adapter.\n", name); | |
540 | goto error_iounmap; | |
541 | } | |
542 | ||
18a6598f | 543 | /* Failure to reset here is an option ... */ |
a5694ec5 SM |
544 | dev->a_ops.adapter_sync_cmd = rx_sync_cmd; |
545 | dev->a_ops.adapter_enable_int = aac_rx_disable_interrupt; | |
18a6598f | 546 | dev->OIMR = status = rx_readb (dev, MUnit.OIMR); |
1208bab5 | 547 | if ((((status & 0x0c) != 0x0c) || aac_reset_devices || reset_devices) && |
18a6598f | 548 | !aac_rx_restart_adapter(dev, 0)) |
f858317d SM |
549 | /* Make sure the Hardware FIFO is empty */ |
550 | while ((++restart < 512) && | |
551 | (rx_readl(dev, MUnit.OutboundQueue) != 0xFFFFFFFFL)); | |
1da177e4 | 552 | /* |
8e0c5ebd | 553 | * Check to see if the board panic'd while booting. |
1da177e4 | 554 | */ |
76a7f8fd | 555 | status = rx_readl(dev, MUnit.OMRx[0]); |
8418852d | 556 | if (status & KERNEL_PANIC) { |
18a6598f | 557 | if (aac_rx_restart_adapter(dev, aac_rx_check_health(dev))) |
8418852d | 558 | goto error_iounmap; |
18a6598f | 559 | ++restart; |
8418852d | 560 | } |
1da177e4 LT |
561 | /* |
562 | * Check to see if the board failed any self tests. | |
563 | */ | |
76a7f8fd MH |
564 | status = rx_readl(dev, MUnit.OMRx[0]); |
565 | if (status & SELF_TEST_FAILED) { | |
1da177e4 LT |
566 | printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); |
567 | goto error_iounmap; | |
568 | } | |
1da177e4 LT |
569 | /* |
570 | * Check to see if the monitor panic'd while booting. | |
571 | */ | |
76a7f8fd | 572 | if (status & MONITOR_PANIC) { |
1da177e4 LT |
573 | printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); |
574 | goto error_iounmap; | |
575 | } | |
576 | start = jiffies; | |
577 | /* | |
578 | * Wait for the adapter to be up and running. Wait up to 3 minutes | |
579 | */ | |
76a7f8fd | 580 | while (!((status = rx_readl(dev, MUnit.OMRx[0])) & KERNEL_UP_AND_RUNNING)) |
1da177e4 | 581 | { |
18a6598f SM |
582 | if ((restart && |
583 | (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || | |
584 | time_after(jiffies, start+HZ*startup_timeout)) { | |
1da177e4 LT |
585 | printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", |
586 | dev->name, instance, status); | |
587 | goto error_iounmap; | |
588 | } | |
18a6598f SM |
589 | if (!restart && |
590 | ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || | |
591 | time_after(jiffies, start + HZ * | |
592 | ((startup_timeout > 60) | |
593 | ? (startup_timeout - 60) | |
594 | : (startup_timeout / 2))))) { | |
595 | if (likely(!aac_rx_restart_adapter(dev, aac_rx_check_health(dev)))) | |
596 | start = jiffies; | |
597 | ++restart; | |
598 | } | |
404d9a90 | 599 | msleep(1); |
1da177e4 | 600 | } |
29c97684 | 601 | if (restart && aac_commit) |
1208bab5 | 602 | aac_commit = 1; |
1da177e4 | 603 | /* |
28713324 | 604 | * Fill in the common function dispatch table. |
1da177e4 LT |
605 | */ |
606 | dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter; | |
bd1aac80 | 607 | dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt; |
1da177e4 LT |
608 | dev->a_ops.adapter_notify = aac_rx_notify_adapter; |
609 | dev->a_ops.adapter_sync_cmd = rx_sync_cmd; | |
610 | dev->a_ops.adapter_check_health = aac_rx_check_health; | |
8418852d | 611 | dev->a_ops.adapter_restart = aac_rx_restart_adapter; |
1da177e4 | 612 | |
bd1aac80 MH |
613 | /* |
614 | * First clear out all interrupts. Then enable the one's that we | |
615 | * can handle. | |
616 | */ | |
28713324 MH |
617 | aac_adapter_comm(dev, AAC_COMM_PRODUCER); |
618 | aac_adapter_disable_int(dev); | |
bd1aac80 | 619 | rx_writel(dev, MUnit.ODR, 0xffffffff); |
28713324 | 620 | aac_adapter_enable_int(dev); |
bd1aac80 | 621 | |
1da177e4 | 622 | if (aac_init_adapter(dev) == NULL) |
28713324 MH |
623 | goto error_iounmap; |
624 | aac_adapter_comm(dev, dev->comm_interface); | |
8ef22247 SM |
625 | dev->msi = aac_msi && !pci_enable_msi(dev->pdev); |
626 | if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, | |
28713324 | 627 | IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) { |
8ef22247 SM |
628 | if (dev->msi) |
629 | pci_disable_msi(dev->pdev); | |
28713324 MH |
630 | printk(KERN_ERR "%s%d: Interrupt unavailable.\n", |
631 | name, instance); | |
632 | goto error_iounmap; | |
633 | } | |
634 | aac_adapter_enable_int(dev); | |
635 | /* | |
636 | * Tell the adapter that all is configured, and it can | |
637 | * start accepting requests | |
638 | */ | |
639 | aac_rx_start_adapter(dev); | |
8e0c5ebd | 640 | |
1da177e4 LT |
641 | return 0; |
642 | ||
1da177e4 | 643 | error_iounmap: |
1da177e4 LT |
644 | |
645 | return -1; | |
646 | } | |
76a7f8fd MH |
647 | |
648 | int aac_rx_init(struct aac_dev *dev) | |
649 | { | |
76a7f8fd MH |
650 | /* |
651 | * Fill in the function dispatch table. | |
652 | */ | |
653 | dev->a_ops.adapter_ioremap = aac_rx_ioremap; | |
28713324 | 654 | dev->a_ops.adapter_comm = aac_rx_select_comm; |
76a7f8fd | 655 | |
28713324 | 656 | return _aac_rx_init(dev); |
76a7f8fd | 657 | } |