aacraid: performance improvement changes
[linux-2.6-block.git] / drivers / scsi / aacraid / commsup.c
CommitLineData
1da177e4
LT
1/*
2 * Adaptec AAC series RAID controller driver
fa195afe 3 * (c) Copyright 2001 Red Hat Inc.
1da177e4
LT
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
e8b12f0f
MR
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
1da177e4
LT
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Module Name:
26 * commsup.c
27 *
28 * Abstract: Contain all routines that are required for FSA host/adapter
7c00ffa3 29 * communication.
1da177e4
LT
30 *
31 */
32
33#include <linux/kernel.h>
34#include <linux/init.h>
35#include <linux/types.h>
36#include <linux/sched.h>
37#include <linux/pci.h>
38#include <linux/spinlock.h>
39#include <linux/slab.h>
40#include <linux/completion.h>
41#include <linux/blkdev.h>
164006da 42#include <linux/delay.h>
fe27381d 43#include <linux/kthread.h>
6a3670c4 44#include <linux/interrupt.h>
6188e10d 45#include <linux/semaphore.h>
8c867b25 46#include <scsi/scsi.h>
7c00ffa3 47#include <scsi/scsi_host.h>
131256cf 48#include <scsi/scsi_device.h>
8c867b25 49#include <scsi/scsi_cmnd.h>
1da177e4
LT
50
51#include "aacraid.h"
52
53/**
54 * fib_map_alloc - allocate the fib objects
55 * @dev: Adapter to allocate for
56 *
57 * Allocate and map the shared PCI space for the FIB blocks used to
58 * talk to the Adaptec firmware.
59 */
8ce3eca4 60
1da177e4
LT
61static int fib_map_alloc(struct aac_dev *dev)
62{
7c00ffa3
MH
63 dprintk((KERN_INFO
64 "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n",
65 dev->pdev, dev->max_fib_size, dev->scsi_host_ptr->can_queue,
66 AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
e8b12f0f
MR
67 dev->hw_fib_va = pci_alloc_consistent(dev->pdev,
68 (dev->max_fib_size + sizeof(struct aac_fib_xporthdr))
69 * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1),
70 &dev->hw_fib_pa);
71 if (dev->hw_fib_va == NULL)
1da177e4
LT
72 return -ENOMEM;
73 return 0;
74}
75
76/**
bfb35aa8 77 * aac_fib_map_free - free the fib objects
1da177e4
LT
78 * @dev: Adapter to free
79 *
80 * Free the PCI mappings and the memory allocated for FIB blocks
81 * on this adapter.
82 */
83
bfb35aa8 84void aac_fib_map_free(struct aac_dev *dev)
1da177e4 85{
9ad5204d
SM
86 pci_free_consistent(dev->pdev,
87 dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB),
88 dev->hw_fib_va, dev->hw_fib_pa);
89 dev->hw_fib_va = NULL;
90 dev->hw_fib_pa = 0;
1da177e4
LT
91}
92
93/**
bfb35aa8 94 * aac_fib_setup - setup the fibs
1da177e4
LT
95 * @dev: Adapter to set up
96 *
b595076a 97 * Allocate the PCI space for the fibs, map it and then initialise the
1da177e4
LT
98 * fib area, the unmapped fib data and also the free list
99 */
100
bfb35aa8 101int aac_fib_setup(struct aac_dev * dev)
1da177e4
LT
102{
103 struct fib *fibptr;
a8166a52 104 struct hw_fib *hw_fib;
1da177e4
LT
105 dma_addr_t hw_fib_pa;
106 int i;
7c00ffa3
MH
107
108 while (((i = fib_map_alloc(dev)) == -ENOMEM)
109 && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
110 dev->init->MaxIoCommands = cpu_to_le32((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) >> 1);
111 dev->scsi_host_ptr->can_queue = le32_to_cpu(dev->init->MaxIoCommands) - AAC_NUM_MGT_FIB;
112 }
113 if (i<0)
1da177e4 114 return -ENOMEM;
8ce3eca4 115
e8b12f0f
MR
116 /* 32 byte alignment for PMC */
117 hw_fib_pa = (dev->hw_fib_pa + (ALIGN32 - 1)) & ~(ALIGN32 - 1);
118 dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
119 (hw_fib_pa - dev->hw_fib_pa));
120 dev->hw_fib_pa = hw_fib_pa;
121 memset(dev->hw_fib_va, 0,
122 (dev->max_fib_size + sizeof(struct aac_fib_xporthdr)) *
123 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
124
125 /* add Xport header */
126 dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
127 sizeof(struct aac_fib_xporthdr));
128 dev->hw_fib_pa += sizeof(struct aac_fib_xporthdr);
129
a8166a52 130 hw_fib = dev->hw_fib_va;
1da177e4 131 hw_fib_pa = dev->hw_fib_pa;
1da177e4
LT
132 /*
133 * Initialise the fibs
134 */
8ce3eca4
SM
135 for (i = 0, fibptr = &dev->fibs[i];
136 i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
137 i++, fibptr++)
1da177e4 138 {
85d22bbf 139 fibptr->flags = 0;
1da177e4 140 fibptr->dev = dev;
a8166a52
MH
141 fibptr->hw_fib_va = hw_fib;
142 fibptr->data = (void *) fibptr->hw_fib_va->data;
1da177e4 143 fibptr->next = fibptr+1; /* Forward chain the fibs */
6de76cfc 144 sema_init(&fibptr->event_wait, 0);
1da177e4 145 spin_lock_init(&fibptr->event_lock);
a8166a52
MH
146 hw_fib->header.XferState = cpu_to_le32(0xffffffff);
147 hw_fib->header.SenderSize = cpu_to_le16(dev->max_fib_size);
1da177e4 148 fibptr->hw_fib_pa = hw_fib_pa;
e8b12f0f
MR
149 hw_fib = (struct hw_fib *)((unsigned char *)hw_fib +
150 dev->max_fib_size + sizeof(struct aac_fib_xporthdr));
151 hw_fib_pa = hw_fib_pa +
152 dev->max_fib_size + sizeof(struct aac_fib_xporthdr);
1da177e4
LT
153 }
154 /*
155 * Add the fib chain to the free list
156 */
7c00ffa3 157 dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
1da177e4
LT
158 /*
159 * Enable this to debug out of queue space
160 */
161 dev->free_fib = &dev->fibs[0];
162 return 0;
163}
164
165/**
bfb35aa8 166 * aac_fib_alloc - allocate a fib
1da177e4
LT
167 * @dev: Adapter to allocate the fib for
168 *
169 * Allocate a fib from the adapter fib pool. If the pool is empty we
7c00ffa3 170 * return NULL.
1da177e4 171 */
8ce3eca4 172
bfb35aa8 173struct fib *aac_fib_alloc(struct aac_dev *dev)
1da177e4
LT
174{
175 struct fib * fibptr;
176 unsigned long flags;
177 spin_lock_irqsave(&dev->fib_lock, flags);
8ce3eca4 178 fibptr = dev->free_fib;
7c00ffa3
MH
179 if(!fibptr){
180 spin_unlock_irqrestore(&dev->fib_lock, flags);
181 return fibptr;
182 }
1da177e4
LT
183 dev->free_fib = fibptr->next;
184 spin_unlock_irqrestore(&dev->fib_lock, flags);
185 /*
186 * Set the proper node type code and node byte size
187 */
188 fibptr->type = FSAFS_NTC_FIB_CONTEXT;
189 fibptr->size = sizeof(struct fib);
190 /*
191 * Null out fields that depend on being zero at the start of
192 * each I/O
193 */
a8166a52 194 fibptr->hw_fib_va->header.XferState = 0;
b6ef70f3 195 fibptr->flags = 0;
1da177e4
LT
196 fibptr->callback = NULL;
197 fibptr->callback_data = NULL;
198
199 return fibptr;
200}
201
202/**
bfb35aa8 203 * aac_fib_free - free a fib
1da177e4
LT
204 * @fibptr: fib to free up
205 *
206 * Frees up a fib and places it on the appropriate queue
1da177e4 207 */
8ce3eca4 208
bfb35aa8 209void aac_fib_free(struct fib *fibptr)
1da177e4 210{
ef616233 211 unsigned long flags;
cacb6dc3 212
ef616233 213 if (fibptr->done == 2)
cacb6dc3 214 return;
1da177e4
LT
215
216 spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
03d44337 217 if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
1da177e4 218 aac_config.fib_timeouts++;
03d44337
MH
219 if (fibptr->hw_fib_va->header.XferState != 0) {
220 printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
221 (void*)fibptr,
222 le32_to_cpu(fibptr->hw_fib_va->header.XferState));
223 }
224 fibptr->next = fibptr->dev->free_fib;
225 fibptr->dev->free_fib = fibptr;
1da177e4
LT
226 spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
227}
228
229/**
bfb35aa8 230 * aac_fib_init - initialise a fib
1da177e4 231 * @fibptr: The fib to initialize
8ce3eca4 232 *
1da177e4
LT
233 * Set up the generic fib fields ready for use
234 */
8ce3eca4 235
bfb35aa8 236void aac_fib_init(struct fib *fibptr)
1da177e4 237{
a8166a52 238 struct hw_fib *hw_fib = fibptr->hw_fib_va;
1da177e4 239
85d22bbf 240 memset(&hw_fib->header, 0, sizeof(struct aac_fibhdr));
1da177e4 241 hw_fib->header.StructType = FIB_MAGIC;
7c00ffa3
MH
242 hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
243 hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
85d22bbf 244 hw_fib->header.u.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
7c00ffa3 245 hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
1da177e4
LT
246}
247
248/**
249 * fib_deallocate - deallocate a fib
250 * @fibptr: fib to deallocate
251 *
252 * Will deallocate and return to the free pool the FIB pointed to by the
253 * caller.
254 */
8ce3eca4 255
4833869e 256static void fib_dealloc(struct fib * fibptr)
1da177e4 257{
a8166a52 258 struct hw_fib *hw_fib = fibptr->hw_fib_va;
8ce3eca4 259 hw_fib->header.XferState = 0;
1da177e4
LT
260}
261
262/*
263 * Commuication primitives define and support the queuing method we use to
264 * support host to adapter commuication. All queue accesses happen through
265 * these routines and are the only routines which have a knowledge of the
266 * how these queues are implemented.
267 */
8ce3eca4 268
1da177e4
LT
269/**
270 * aac_get_entry - get a queue entry
271 * @dev: Adapter
272 * @qid: Queue Number
273 * @entry: Entry return
274 * @index: Index return
275 * @nonotify: notification control
276 *
277 * With a priority the routine returns a queue entry if the queue has free entries. If the queue
278 * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
279 * returned.
280 */
8ce3eca4 281
1da177e4
LT
282static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
283{
284 struct aac_queue * q;
bed30de4 285 unsigned long idx;
1da177e4
LT
286
287 /*
288 * All of the queues wrap when they reach the end, so we check
289 * to see if they have reached the end and if they have we just
290 * set the index back to zero. This is a wrap. You could or off
291 * the high bits in all updates but this is a bit faster I think.
292 */
293
294 q = &dev->queues->queue[qid];
bed30de4
MH
295
296 idx = *index = le32_to_cpu(*(q->headers.producer));
297 /* Interrupt Moderation, only interrupt for first two entries */
298 if (idx != le32_to_cpu(*(q->headers.consumer))) {
299 if (--idx == 0) {
1640a2c3 300 if (qid == AdapNormCmdQueue)
bed30de4 301 idx = ADAP_NORM_CMD_ENTRIES;
1640a2c3 302 else
bed30de4
MH
303 idx = ADAP_NORM_RESP_ENTRIES;
304 }
305 if (idx != le32_to_cpu(*(q->headers.consumer)))
8ce3eca4 306 *nonotify = 1;
bed30de4 307 }
1da177e4 308
1640a2c3 309 if (qid == AdapNormCmdQueue) {
8ce3eca4 310 if (*index >= ADAP_NORM_CMD_ENTRIES)
1da177e4 311 *index = 0; /* Wrap to front of the Producer Queue. */
1640a2c3 312 } else {
8ce3eca4 313 if (*index >= ADAP_NORM_RESP_ENTRIES)
1da177e4
LT
314 *index = 0; /* Wrap to front of the Producer Queue. */
315 }
1da177e4 316
8ce3eca4
SM
317 /* Queue is full */
318 if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) {
7c00ffa3 319 printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
ef616233 320 qid, atomic_read(&q->numpending));
1da177e4
LT
321 return 0;
322 } else {
8ce3eca4 323 *entry = q->base + *index;
1da177e4
LT
324 return 1;
325 }
8ce3eca4 326}
1da177e4
LT
327
328/**
329 * aac_queue_get - get the next free QE
330 * @dev: Adapter
331 * @index: Returned index
332 * @priority: Priority of fib
333 * @fib: Fib to associate with the queue entry
334 * @wait: Wait if queue full
335 * @fibptr: Driver fib object to go with fib
336 * @nonotify: Don't notify the adapter
337 *
338 * Gets the next free QE off the requested priorty adapter command
339 * queue and associates the Fib with the QE. The QE represented by
340 * index is ready to insert on the queue when this routine returns
341 * success.
342 */
343
28713324 344int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
1da177e4
LT
345{
346 struct aac_entry * entry = NULL;
347 int map = 0;
8ce3eca4 348
1640a2c3 349 if (qid == AdapNormCmdQueue) {
1da177e4 350 /* if no entries wait for some if caller wants to */
8ce3eca4 351 while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
1da177e4
LT
352 printk(KERN_ERR "GetEntries failed\n");
353 }
8ce3eca4
SM
354 /*
355 * Setup queue entry with a command, status and fib mapped
356 */
357 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
358 map = 1;
1640a2c3 359 } else {
8ce3eca4 360 while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
1da177e4
LT
361 /* if no entries wait for some if caller wants to */
362 }
8ce3eca4
SM
363 /*
364 * Setup queue entry with command, status and fib mapped
365 */
366 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
367 entry->addr = hw_fib->header.SenderFibAddress;
368 /* Restore adapters pointer to the FIB */
85d22bbf 369 hw_fib->header.u.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
8ce3eca4 370 map = 0;
1da177e4
LT
371 }
372 /*
373 * If MapFib is true than we need to map the Fib and put pointers
374 * in the queue entry.
375 */
376 if (map)
377 entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
378 return 0;
379}
380
1da177e4 381/*
8ce3eca4
SM
382 * Define the highest level of host to adapter communication routines.
383 * These routines will support host to adapter FS commuication. These
1da177e4
LT
384 * routines have no knowledge of the commuication method used. This level
385 * sends and receives FIBs. This level has no knowledge of how these FIBs
386 * get passed back and forth.
387 */
388
389/**
bfb35aa8 390 * aac_fib_send - send a fib to the adapter
1da177e4
LT
391 * @command: Command to send
392 * @fibptr: The fib
393 * @size: Size of fib data area
394 * @priority: Priority of Fib
395 * @wait: Async/sync select
396 * @reply: True if a reply is wanted
397 * @callback: Called with reply
398 * @callback_data: Passed to callback
399 *
400 * Sends the requested FIB to the adapter and optionally will wait for a
401 * response FIB. If the caller does not wish to wait for a response than
402 * an event to wait on must be supplied. This event will be set when a
403 * response FIB is received from the adapter.
404 */
8ce3eca4 405
bfb35aa8
MH
406int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
407 int priority, int wait, int reply, fib_callback callback,
408 void *callback_data)
1da177e4 409{
1da177e4 410 struct aac_dev * dev = fibptr->dev;
a8166a52 411 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4 412 unsigned long flags = 0;
cacb6dc3 413 unsigned long mflags = 0;
11604612 414 unsigned long sflags = 0;
cacb6dc3 415
1640a2c3 416
1da177e4
LT
417 if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
418 return -EBUSY;
419 /*
25985edc 420 * There are 5 cases with the wait and response requested flags.
1da177e4
LT
421 * The only invalid cases are if the caller requests to wait and
422 * does not request a response and if the caller does not want a
423 * response and the Fib is not allocated from pool. If a response
424 * is not requesed the Fib will just be deallocaed by the DPC
425 * routine when the response comes back from the adapter. No
8ce3eca4 426 * further processing will be done besides deleting the Fib. We
1da177e4
LT
427 * will have a debug mode where the adapter can notify the host
428 * it had a problem and the host can log that fact.
429 */
b6ef70f3 430 fibptr->flags = 0;
1da177e4
LT
431 if (wait && !reply) {
432 return -EINVAL;
433 } else if (!wait && reply) {
434 hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
435 FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
436 } else if (!wait && !reply) {
437 hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
438 FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
439 } else if (wait && reply) {
440 hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
441 FIB_COUNTER_INCREMENT(aac_config.NormalSent);
8ce3eca4 442 }
1da177e4
LT
443 /*
444 * Map the fib into 32bits by using the fib number
445 */
446
8e0c5ebd 447 hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2);
85d22bbf 448 hw_fib->header.Handle = (u32)(fibptr - dev->fibs) + 1;
1da177e4
LT
449 /*
450 * Set FIB state to indicate where it came from and if we want a
451 * response from the adapter. Also load the command from the
452 * caller.
453 *
454 * Map the hw fib pointer as a 32bit value
455 */
456 hw_fib->header.Command = cpu_to_le16(command);
457 hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
1da177e4
LT
458 /*
459 * Set the size of the Fib we want to send to the adapter
460 */
461 hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
462 if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
463 return -EMSGSIZE;
8ce3eca4 464 }
1da177e4
LT
465 /*
466 * Get a queue entry connect the FIB to it and send an notify
467 * the adapter a command is ready.
468 */
1640a2c3 469 hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
1da177e4 470
1da177e4
LT
471 /*
472 * Fill in the Callback and CallbackContext if we are not
473 * going to wait.
474 */
475 if (!wait) {
476 fibptr->callback = callback;
477 fibptr->callback_data = callback_data;
b6ef70f3 478 fibptr->flags = FIB_CONTEXT_FLAG;
1da177e4 479 }
1da177e4
LT
480
481 fibptr->done = 0;
1da177e4 482
1640a2c3
MH
483 FIB_COUNTER_INCREMENT(aac_config.FibsSent);
484
1640a2c3 485 dprintk((KERN_DEBUG "Fib contents:.\n"));
8e0c5ebd
MH
486 dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command)));
487 dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command)));
488 dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState)));
a8166a52 489 dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va));
1640a2c3
MH
490 dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
491 dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
492
c8f7b073 493 if (!dev->queues)
65101355 494 return -EBUSY;
1640a2c3 495
cacb6dc3
PNRCEH
496 if (wait) {
497
498 spin_lock_irqsave(&dev->manage_lock, mflags);
499 if (dev->management_fib_count >= AAC_NUM_MGT_FIB) {
500 printk(KERN_INFO "No management Fibs Available:%d\n",
501 dev->management_fib_count);
502 spin_unlock_irqrestore(&dev->manage_lock, mflags);
503 return -EBUSY;
504 }
505 dev->management_fib_count++;
506 spin_unlock_irqrestore(&dev->manage_lock, mflags);
1640a2c3 507 spin_lock_irqsave(&fibptr->event_lock, flags);
cacb6dc3
PNRCEH
508 }
509
11604612
MR
510 if (dev->sync_mode) {
511 if (wait)
512 spin_unlock_irqrestore(&fibptr->event_lock, flags);
513 spin_lock_irqsave(&dev->sync_lock, sflags);
514 if (dev->sync_fib) {
515 list_add_tail(&fibptr->fiblink, &dev->sync_fib_list);
516 spin_unlock_irqrestore(&dev->sync_lock, sflags);
517 } else {
518 dev->sync_fib = fibptr;
519 spin_unlock_irqrestore(&dev->sync_lock, sflags);
520 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
521 (u32)fibptr->hw_fib_pa, 0, 0, 0, 0, 0,
522 NULL, NULL, NULL, NULL, NULL);
523 }
524 if (wait) {
525 fibptr->flags |= FIB_CONTEXT_FLAG_WAIT;
526 if (down_interruptible(&fibptr->event_wait)) {
527 fibptr->flags &= ~FIB_CONTEXT_FLAG_WAIT;
528 return -EFAULT;
529 }
530 return 0;
531 }
532 return -EINPROGRESS;
533 }
534
cacb6dc3
PNRCEH
535 if (aac_adapter_deliver(fibptr) != 0) {
536 printk(KERN_ERR "aac_fib_send: returned -EBUSY\n");
537 if (wait) {
538 spin_unlock_irqrestore(&fibptr->event_lock, flags);
539 spin_lock_irqsave(&dev->manage_lock, mflags);
540 dev->management_fib_count--;
541 spin_unlock_irqrestore(&dev->manage_lock, mflags);
542 }
543 return -EBUSY;
544 }
545
8e0c5ebd 546
1da177e4 547 /*
8ce3eca4 548 * If the caller wanted us to wait for response wait now.
1da177e4 549 */
8ce3eca4 550
1da177e4
LT
551 if (wait) {
552 spin_unlock_irqrestore(&fibptr->event_lock, flags);
9203344c
MH
553 /* Only set for first known interruptable command */
554 if (wait < 0) {
555 /*
556 * *VERY* Dangerous to time out a command, the
557 * assumption is made that we have no hope of
558 * functioning because an interrupt routing or other
559 * hardware failure has occurred.
560 */
30002f1c 561 unsigned long timeout = jiffies + (180 * HZ); /* 3 minutes */
9203344c 562 while (down_trylock(&fibptr->event_wait)) {
33524b70 563 int blink;
30002f1c 564 if (time_is_before_eq_jiffies(timeout)) {
28713324 565 struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue];
ef616233 566 atomic_dec(&q->numpending);
9203344c 567 if (wait == -1) {
bfb35aa8 568 printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
9203344c
MH
569 "Usually a result of a PCI interrupt routing problem;\n"
570 "update mother board BIOS or consider utilizing one of\n"
571 "the SAFE mode kernel options (acpi, apic etc)\n");
572 }
573 return -ETIMEDOUT;
574 }
33524b70
MH
575 if ((blink = aac_adapter_check_health(dev)) > 0) {
576 if (wait == -1) {
577 printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n"
578 "Usually a result of a serious unrecoverable hardware problem\n",
579 blink);
580 }
581 return -EFAULT;
582 }
30002f1c
BC
583 /* We used to udelay() here but that absorbed
584 * a CPU when a timeout occured. Not very
585 * useful. */
586 cpu_relax();
9203344c 587 }
0462590e 588 } else if (down_interruptible(&fibptr->event_wait)) {
cacb6dc3
PNRCEH
589 /* Do nothing ... satisfy
590 * down_interruptible must_check */
e6990c64 591 }
cacb6dc3 592
33bb3b29 593 spin_lock_irqsave(&fibptr->event_lock, flags);
cacb6dc3 594 if (fibptr->done == 0) {
33bb3b29 595 fibptr->done = 2; /* Tell interrupt we aborted */
c8f7b073 596 spin_unlock_irqrestore(&fibptr->event_lock, flags);
cacb6dc3 597 return -ERESTARTSYS;
c8f7b073 598 }
33bb3b29 599 spin_unlock_irqrestore(&fibptr->event_lock, flags);
125e1874 600 BUG_ON(fibptr->done == 0);
8ce3eca4 601
912d4e88 602 if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
1da177e4 603 return -ETIMEDOUT;
912d4e88 604 return 0;
1da177e4
LT
605 }
606 /*
607 * If the user does not want a response than return success otherwise
608 * return pending
609 */
610 if (reply)
611 return -EINPROGRESS;
612 else
613 return 0;
614}
615
8ce3eca4 616/**
1da177e4
LT
617 * aac_consumer_get - get the top of the queue
618 * @dev: Adapter
619 * @q: Queue
620 * @entry: Return entry
621 *
622 * Will return a pointer to the entry on the top of the queue requested that
8ce3eca4
SM
623 * we are a consumer of, and return the address of the queue entry. It does
624 * not change the state of the queue.
1da177e4
LT
625 */
626
627int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
628{
629 u32 index;
630 int status;
631 if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
632 status = 0;
633 } else {
634 /*
635 * The consumer index must be wrapped if we have reached
636 * the end of the queue, else we just use the entry
637 * pointed to by the header index
638 */
8ce3eca4
SM
639 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
640 index = 0;
1da177e4 641 else
8ce3eca4 642 index = le32_to_cpu(*q->headers.consumer);
1da177e4
LT
643 *entry = q->base + index;
644 status = 1;
645 }
646 return(status);
647}
648
649/**
650 * aac_consumer_free - free consumer entry
651 * @dev: Adapter
652 * @q: Queue
653 * @qid: Queue ident
654 *
655 * Frees up the current top of the queue we are a consumer of. If the
656 * queue was full notify the producer that the queue is no longer full.
657 */
658
659void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
660{
661 int wasfull = 0;
662 u32 notify;
663
664 if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
665 wasfull = 1;
8ce3eca4 666
1da177e4
LT
667 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
668 *q->headers.consumer = cpu_to_le32(1);
669 else
36b8dd1b 670 le32_add_cpu(q->headers.consumer, 1);
8ce3eca4 671
1da177e4
LT
672 if (wasfull) {
673 switch (qid) {
674
675 case HostNormCmdQueue:
676 notify = HostNormCmdNotFull;
677 break;
1da177e4
LT
678 case HostNormRespQueue:
679 notify = HostNormRespNotFull;
680 break;
1da177e4
LT
681 default:
682 BUG();
683 return;
684 }
685 aac_adapter_notify(dev, notify);
686 }
8ce3eca4 687}
1da177e4
LT
688
689/**
bfb35aa8 690 * aac_fib_adapter_complete - complete adapter issued fib
1da177e4
LT
691 * @fibptr: fib to complete
692 * @size: size of fib
693 *
694 * Will do all necessary work to complete a FIB that was sent from
695 * the adapter.
696 */
697
bfb35aa8 698int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
1da177e4 699{
a8166a52 700 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4 701 struct aac_dev * dev = fibptr->dev;
1640a2c3 702 struct aac_queue * q;
1da177e4 703 unsigned long nointr = 0;
1640a2c3
MH
704 unsigned long qflags;
705
85d22bbf
MR
706 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 ||
707 dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
e8b12f0f
MR
708 kfree(hw_fib);
709 return 0;
710 }
711
1640a2c3 712 if (hw_fib->header.XferState == 0) {
28713324 713 if (dev->comm_interface == AAC_COMM_MESSAGE)
e8b12f0f 714 kfree(hw_fib);
8ce3eca4 715 return 0;
1640a2c3 716 }
1da177e4
LT
717 /*
718 * If we plan to do anything check the structure type first.
8ce3eca4 719 */
85d22bbf
MR
720 if (hw_fib->header.StructType != FIB_MAGIC &&
721 hw_fib->header.StructType != FIB_MAGIC2 &&
722 hw_fib->header.StructType != FIB_MAGIC2_64) {
28713324 723 if (dev->comm_interface == AAC_COMM_MESSAGE)
e8b12f0f 724 kfree(hw_fib);
8ce3eca4 725 return -EINVAL;
1da177e4
LT
726 }
727 /*
728 * This block handles the case where the adapter had sent us a
729 * command and we have finished processing the command. We
8ce3eca4
SM
730 * call completeFib when we are done processing the command
731 * and want to send a response back to the adapter. This will
1da177e4
LT
732 * send the completed cdb to the adapter.
733 */
734 if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
28713324 735 if (dev->comm_interface == AAC_COMM_MESSAGE) {
8e0c5ebd
MH
736 kfree (hw_fib);
737 } else {
8ce3eca4
SM
738 u32 index;
739 hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
8e0c5ebd
MH
740 if (size) {
741 size += sizeof(struct aac_fibhdr);
8ce3eca4 742 if (size > le16_to_cpu(hw_fib->header.SenderSize))
8e0c5ebd
MH
743 return -EMSGSIZE;
744 hw_fib->header.Size = cpu_to_le16(size);
745 }
746 q = &dev->queues->queue[AdapNormRespQueue];
747 spin_lock_irqsave(q->lock, qflags);
748 aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
749 *(q->headers.producer) = cpu_to_le32(index + 1);
750 spin_unlock_irqrestore(q->lock, qflags);
751 if (!(nointr & (int)aac_config.irq_mod))
752 aac_adapter_notify(dev, AdapNormRespQueue);
1da177e4 753 }
8ce3eca4
SM
754 } else {
755 printk(KERN_WARNING "aac_fib_adapter_complete: "
756 "Unknown xferstate detected.\n");
757 BUG();
1da177e4 758 }
1da177e4
LT
759 return 0;
760}
761
762/**
bfb35aa8 763 * aac_fib_complete - fib completion handler
1da177e4
LT
764 * @fib: FIB to complete
765 *
766 * Will do all necessary work to complete a FIB.
767 */
8ce3eca4 768
bfb35aa8 769int aac_fib_complete(struct fib *fibptr)
1da177e4 770{
a8166a52 771 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4
LT
772
773 /*
774 * Check for a fib which has already been completed
775 */
776
777 if (hw_fib->header.XferState == 0)
8ce3eca4 778 return 0;
1da177e4
LT
779 /*
780 * If we plan to do anything check the structure type first.
8ce3eca4 781 */
1da177e4 782
85d22bbf
MR
783 if (hw_fib->header.StructType != FIB_MAGIC &&
784 hw_fib->header.StructType != FIB_MAGIC2 &&
785 hw_fib->header.StructType != FIB_MAGIC2_64)
8ce3eca4 786 return -EINVAL;
1da177e4 787 /*
8ce3eca4 788 * This block completes a cdb which orginated on the host and we
1da177e4
LT
789 * just need to deallocate the cdb or reinit it. At this point the
790 * command is complete that we had sent to the adapter and this
791 * cdb could be reused.
792 */
cacb6dc3 793
1da177e4
LT
794 if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
795 (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
796 {
797 fib_dealloc(fibptr);
798 }
799 else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
800 {
801 /*
802 * This handles the case when the host has aborted the I/O
803 * to the adapter because the adapter is not responding
804 */
805 fib_dealloc(fibptr);
806 } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
807 fib_dealloc(fibptr);
808 } else {
809 BUG();
8ce3eca4 810 }
1da177e4
LT
811 return 0;
812}
813
814/**
815 * aac_printf - handle printf from firmware
816 * @dev: Adapter
817 * @val: Message info
818 *
819 * Print a message passed to us by the controller firmware on the
820 * Adaptec board
821 */
822
823void aac_printf(struct aac_dev *dev, u32 val)
824{
1da177e4 825 char *cp = dev->printfbuf;
7c00ffa3
MH
826 if (dev->printf_enabled)
827 {
828 int length = val & 0xffff;
829 int level = (val >> 16) & 0xffff;
8ce3eca4 830
7c00ffa3
MH
831 /*
832 * The size of the printfbuf is set in port.c
833 * There is no variable or define for it
834 */
835 if (length > 255)
836 length = 255;
837 if (cp[length] != 0)
838 cp[length] = 0;
839 if (level == LOG_AAC_HIGH_ERROR)
1241f359 840 printk(KERN_WARNING "%s:%s", dev->name, cp);
7c00ffa3 841 else
1241f359 842 printk(KERN_INFO "%s:%s", dev->name, cp);
7c00ffa3 843 }
8ce3eca4 844 memset(cp, 0, 256);
1da177e4
LT
845}
846
131256cf
MH
847
848/**
849 * aac_handle_aif - Handle a message from the firmware
850 * @dev: Which adapter this fib is from
851 * @fibptr: Pointer to fibptr from adapter
852 *
853 * This routine handles a driver notify fib from the adapter and
854 * dispatches it to the appropriate routine for handling.
855 */
856
495c0217 857#define AIF_SNIFF_TIMEOUT (500*HZ)
131256cf
MH
858static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
859{
a8166a52 860 struct hw_fib * hw_fib = fibptr->hw_fib_va;
131256cf 861 struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
0995ad38 862 u32 channel, id, lun, container;
131256cf
MH
863 struct scsi_device *device;
864 enum {
865 NOTHING,
866 DELETE,
867 ADD,
868 CHANGE
0995ad38 869 } device_config_needed = NOTHING;
131256cf
MH
870
871 /* Sniff for container changes */
872
c8f7b073 873 if (!dev || !dev->fsa_dev)
131256cf 874 return;
0995ad38 875 container = channel = id = lun = (u32)-1;
131256cf
MH
876
877 /*
878 * We have set this up to try and minimize the number of
879 * re-configures that take place. As a result of this when
880 * certain AIF's come in we will set a flag waiting for another
881 * type of AIF before setting the re-config flag.
882 */
883 switch (le32_to_cpu(aifcmd->command)) {
884 case AifCmdDriverNotify:
f3307f72 885 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
131256cf
MH
886 /*
887 * Morph or Expand complete
888 */
889 case AifDenMorphComplete:
890 case AifDenVolumeExtendComplete:
f3307f72 891 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
892 if (container >= dev->maximum_num_containers)
893 break;
894
895 /*
f64a181d 896 * Find the scsi_device associated with the SCSI
131256cf
MH
897 * address. Make sure we have the right array, and if
898 * so set the flag to initiate a new re-config once we
899 * see an AifEnConfigChange AIF come through.
900 */
901
902 if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
8ce3eca4
SM
903 device = scsi_device_lookup(dev->scsi_host_ptr,
904 CONTAINER_TO_CHANNEL(container),
905 CONTAINER_TO_ID(container),
131256cf
MH
906 CONTAINER_TO_LUN(container));
907 if (device) {
908 dev->fsa_dev[container].config_needed = CHANGE;
909 dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
31876f32 910 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
911 scsi_device_put(device);
912 }
913 }
914 }
915
916 /*
917 * If we are waiting on something and this happens to be
918 * that thing then set the re-configure flag.
919 */
920 if (container != (u32)-1) {
921 if (container >= dev->maximum_num_containers)
922 break;
31876f32 923 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 924 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 925 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
926 dev->fsa_dev[container].config_waiting_on = 0;
927 } else for (container = 0;
928 container < dev->maximum_num_containers; ++container) {
31876f32 929 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 930 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 931 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
932 dev->fsa_dev[container].config_waiting_on = 0;
933 }
934 break;
935
936 case AifCmdEventNotify:
f3307f72 937 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
95e852e1
SM
938 case AifEnBatteryEvent:
939 dev->cache_protected =
940 (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3));
941 break;
131256cf
MH
942 /*
943 * Add an Array.
944 */
945 case AifEnAddContainer:
f3307f72 946 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
947 if (container >= dev->maximum_num_containers)
948 break;
949 dev->fsa_dev[container].config_needed = ADD;
950 dev->fsa_dev[container].config_waiting_on =
951 AifEnConfigChange;
31876f32 952 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
953 break;
954
955 /*
956 * Delete an Array.
957 */
958 case AifEnDeleteContainer:
f3307f72 959 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
960 if (container >= dev->maximum_num_containers)
961 break;
962 dev->fsa_dev[container].config_needed = DELETE;
963 dev->fsa_dev[container].config_waiting_on =
964 AifEnConfigChange;
31876f32 965 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
966 break;
967
968 /*
969 * Container change detected. If we currently are not
970 * waiting on something else, setup to wait on a Config Change.
971 */
972 case AifEnContainerChange:
f3307f72 973 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
974 if (container >= dev->maximum_num_containers)
975 break;
31876f32
MH
976 if (dev->fsa_dev[container].config_waiting_on &&
977 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
978 break;
979 dev->fsa_dev[container].config_needed = CHANGE;
980 dev->fsa_dev[container].config_waiting_on =
981 AifEnConfigChange;
31876f32 982 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
983 break;
984
985 case AifEnConfigChange:
986 break;
987
cb1042f2
SM
988 case AifEnAddJBOD:
989 case AifEnDeleteJBOD:
990 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
a4576b5d
MS
991 if ((container >> 28)) {
992 container = (u32)-1;
cb1042f2 993 break;
a4576b5d 994 }
cb1042f2 995 channel = (container >> 24) & 0xF;
a4576b5d
MS
996 if (channel >= dev->maximum_num_channels) {
997 container = (u32)-1;
cb1042f2 998 break;
a4576b5d 999 }
cb1042f2 1000 id = container & 0xFFFF;
a4576b5d
MS
1001 if (id >= dev->maximum_num_physicals) {
1002 container = (u32)-1;
cb1042f2 1003 break;
a4576b5d 1004 }
cb1042f2 1005 lun = (container >> 16) & 0xFF;
a4576b5d 1006 container = (u32)-1;
cb1042f2
SM
1007 channel = aac_phys_to_logical(channel);
1008 device_config_needed =
1009 (((__le32 *)aifcmd->data)[0] ==
1010 cpu_to_le32(AifEnAddJBOD)) ? ADD : DELETE;
5ca05594
RM
1011 if (device_config_needed == ADD) {
1012 device = scsi_device_lookup(dev->scsi_host_ptr,
1013 channel,
1014 id,
1015 lun);
1016 if (device) {
1017 scsi_remove_device(device);
1018 scsi_device_put(device);
1019 }
1020 }
cb1042f2
SM
1021 break;
1022
0995ad38 1023 case AifEnEnclosureManagement:
cb1042f2
SM
1024 /*
1025 * If in JBOD mode, automatic exposure of new
1026 * physical target to be suppressed until configured.
1027 */
1028 if (dev->jbod)
1029 break;
0995ad38
SM
1030 switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) {
1031 case EM_DRIVE_INSERTION:
1032 case EM_DRIVE_REMOVAL:
46154a02
MR
1033 case EM_SES_DRIVE_INSERTION:
1034 case EM_SES_DRIVE_REMOVAL:
0995ad38
SM
1035 container = le32_to_cpu(
1036 ((__le32 *)aifcmd->data)[2]);
a4576b5d
MS
1037 if ((container >> 28)) {
1038 container = (u32)-1;
0995ad38 1039 break;
a4576b5d 1040 }
0995ad38 1041 channel = (container >> 24) & 0xF;
a4576b5d
MS
1042 if (channel >= dev->maximum_num_channels) {
1043 container = (u32)-1;
0995ad38 1044 break;
a4576b5d 1045 }
0995ad38
SM
1046 id = container & 0xFFFF;
1047 lun = (container >> 16) & 0xFF;
a4576b5d 1048 container = (u32)-1;
0995ad38
SM
1049 if (id >= dev->maximum_num_physicals) {
1050 /* legacy dev_t ? */
1051 if ((0x2000 <= id) || lun || channel ||
1052 ((channel = (id >> 7) & 0x3F) >=
1053 dev->maximum_num_channels))
1054 break;
1055 lun = (id >> 4) & 7;
1056 id &= 0xF;
1057 }
1058 channel = aac_phys_to_logical(channel);
1059 device_config_needed =
46154a02
MR
1060 ((((__le32 *)aifcmd->data)[3]
1061 == cpu_to_le32(EM_DRIVE_INSERTION)) ||
1062 (((__le32 *)aifcmd->data)[3]
1063 == cpu_to_le32(EM_SES_DRIVE_INSERTION))) ?
0995ad38
SM
1064 ADD : DELETE;
1065 break;
1066 }
1067 break;
131256cf
MH
1068 }
1069
1070 /*
1071 * If we are waiting on something and this happens to be
1072 * that thing then set the re-configure flag.
1073 */
1074 if (container != (u32)-1) {
1075 if (container >= dev->maximum_num_containers)
1076 break;
31876f32 1077 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1078 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1079 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1080 dev->fsa_dev[container].config_waiting_on = 0;
1081 } else for (container = 0;
1082 container < dev->maximum_num_containers; ++container) {
31876f32 1083 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1084 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1085 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1086 dev->fsa_dev[container].config_waiting_on = 0;
1087 }
1088 break;
1089
1090 case AifCmdJobProgress:
1091 /*
1092 * These are job progress AIF's. When a Clear is being
1093 * done on a container it is initially created then hidden from
1094 * the OS. When the clear completes we don't get a config
1095 * change so we monitor the job status complete on a clear then
1096 * wait for a container change.
1097 */
1098
f3307f72
CH
1099 if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
1100 (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] ||
1101 ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) {
131256cf
MH
1102 for (container = 0;
1103 container < dev->maximum_num_containers;
1104 ++container) {
1105 /*
1106 * Stomp on all config sequencing for all
1107 * containers?
1108 */
1109 dev->fsa_dev[container].config_waiting_on =
1110 AifEnContainerChange;
1111 dev->fsa_dev[container].config_needed = ADD;
31876f32
MH
1112 dev->fsa_dev[container].config_waiting_stamp =
1113 jiffies;
131256cf
MH
1114 }
1115 }
f3307f72
CH
1116 if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
1117 ((__le32 *)aifcmd->data)[6] == 0 &&
1118 ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) {
131256cf
MH
1119 for (container = 0;
1120 container < dev->maximum_num_containers;
1121 ++container) {
1122 /*
1123 * Stomp on all config sequencing for all
1124 * containers?
1125 */
1126 dev->fsa_dev[container].config_waiting_on =
1127 AifEnContainerChange;
1128 dev->fsa_dev[container].config_needed = DELETE;
31876f32
MH
1129 dev->fsa_dev[container].config_waiting_stamp =
1130 jiffies;
131256cf
MH
1131 }
1132 }
1133 break;
1134 }
1135
a4576b5d
MS
1136 container = 0;
1137retry_next:
0995ad38 1138 if (device_config_needed == NOTHING)
a4576b5d 1139 for (; container < dev->maximum_num_containers; ++container) {
31876f32
MH
1140 if ((dev->fsa_dev[container].config_waiting_on == 0) &&
1141 (dev->fsa_dev[container].config_needed != NOTHING) &&
1142 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) {
131256cf
MH
1143 device_config_needed =
1144 dev->fsa_dev[container].config_needed;
1145 dev->fsa_dev[container].config_needed = NOTHING;
0995ad38
SM
1146 channel = CONTAINER_TO_CHANNEL(container);
1147 id = CONTAINER_TO_ID(container);
1148 lun = CONTAINER_TO_LUN(container);
131256cf
MH
1149 break;
1150 }
1151 }
1152 if (device_config_needed == NOTHING)
1153 return;
1154
1155 /*
1156 * If we decided that a re-configuration needs to be done,
1157 * schedule it here on the way out the door, please close the door
1158 * behind you.
1159 */
1160
131256cf 1161 /*
f64a181d 1162 * Find the scsi_device associated with the SCSI address,
131256cf
MH
1163 * and mark it as changed, invalidating the cache. This deals
1164 * with changes to existing device IDs.
1165 */
1166
1167 if (!dev || !dev->scsi_host_ptr)
1168 return;
1169 /*
bfb35aa8 1170 * force reload of disk info via aac_probe_container
131256cf 1171 */
0995ad38
SM
1172 if ((channel == CONTAINER_CHANNEL) &&
1173 (device_config_needed != NOTHING)) {
1174 if (dev->fsa_dev[container].valid == 1)
1175 dev->fsa_dev[container].valid = 2;
bfb35aa8 1176 aac_probe_container(dev, container);
0995ad38
SM
1177 }
1178 device = scsi_device_lookup(dev->scsi_host_ptr, channel, id, lun);
131256cf
MH
1179 if (device) {
1180 switch (device_config_needed) {
1181 case DELETE:
9cccde93
RM
1182#if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
1183 scsi_remove_device(device);
1184#else
0995ad38
SM
1185 if (scsi_device_online(device)) {
1186 scsi_device_set_state(device, SDEV_OFFLINE);
1187 sdev_printk(KERN_INFO, device,
1188 "Device offlined - %s\n",
1189 (channel == CONTAINER_CHANNEL) ?
1190 "array deleted" :
1191 "enclosure services event");
1192 }
9cccde93 1193#endif
0995ad38
SM
1194 break;
1195 case ADD:
1196 if (!scsi_device_online(device)) {
1197 sdev_printk(KERN_INFO, device,
1198 "Device online - %s\n",
1199 (channel == CONTAINER_CHANNEL) ?
1200 "array created" :
1201 "enclosure services event");
1202 scsi_device_set_state(device, SDEV_RUNNING);
1203 }
1204 /* FALLTHRU */
131256cf 1205 case CHANGE:
0995ad38
SM
1206 if ((channel == CONTAINER_CHANNEL)
1207 && (!dev->fsa_dev[container].valid)) {
9cccde93
RM
1208#if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
1209 scsi_remove_device(device);
1210#else
0995ad38
SM
1211 if (!scsi_device_online(device))
1212 break;
1213 scsi_device_set_state(device, SDEV_OFFLINE);
1214 sdev_printk(KERN_INFO, device,
1215 "Device offlined - %s\n",
1216 "array failed");
9cccde93 1217#endif
0995ad38
SM
1218 break;
1219 }
131256cf
MH
1220 scsi_rescan_device(&device->sdev_gendev);
1221
1222 default:
1223 break;
1224 }
1225 scsi_device_put(device);
0995ad38 1226 device_config_needed = NOTHING;
131256cf 1227 }
0995ad38
SM
1228 if (device_config_needed == ADD)
1229 scsi_add_device(dev->scsi_host_ptr, channel, id, lun);
a4576b5d
MS
1230 if (channel == CONTAINER_CHANNEL) {
1231 container++;
1232 device_config_needed = NOTHING;
1233 goto retry_next;
1234 }
131256cf
MH
1235}
1236
29c97684 1237static int _aac_reset_adapter(struct aac_dev *aac, int forced)
8c867b25
MH
1238{
1239 int index, quirks;
495c0217 1240 int retval, i;
8c867b25
MH
1241 struct Scsi_Host *host;
1242 struct scsi_device *dev;
1243 struct scsi_cmnd *command;
1244 struct scsi_cmnd *command_list;
29c97684 1245 int jafo = 0;
ef616233 1246 int cpu;
8c867b25
MH
1247
1248 /*
1249 * Assumptions:
29c97684
SM
1250 * - host is locked, unless called by the aacraid thread.
1251 * (a matter of convenience, due to legacy issues surrounding
1252 * eh_host_adapter_reset).
8c867b25
MH
1253 * - in_reset is asserted, so no new i/o is getting to the
1254 * card.
29c97684
SM
1255 * - The card is dead, or will be very shortly ;-/ so no new
1256 * commands are completing in the interrupt service.
8c867b25
MH
1257 */
1258 host = aac->scsi_host_ptr;
1259 scsi_block_requests(host);
1260 aac_adapter_disable_int(aac);
29c97684
SM
1261 if (aac->thread->pid != current->pid) {
1262 spin_unlock_irq(host->host_lock);
1263 kthread_stop(aac->thread);
1264 jafo = 1;
1265 }
8c867b25
MH
1266
1267 /*
1268 * If a positive health, means in a known DEAD PANIC
1269 * state and the adapter could be reset to `try again'.
1270 */
29c97684 1271 retval = aac_adapter_restart(aac, forced ? 0 : aac_adapter_check_health(aac));
8c867b25
MH
1272
1273 if (retval)
1274 goto out;
8c867b25 1275
d18b448f
MH
1276 /*
1277 * Loop through the fibs, close the synchronous FIBS
1278 */
33bb3b29 1279 for (retval = 1, index = 0; index < (aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); index++) {
d18b448f 1280 struct fib *fib = &aac->fibs[index];
a8166a52
MH
1281 if (!(fib->hw_fib_va->header.XferState & cpu_to_le32(NoResponseExpected | Async)) &&
1282 (fib->hw_fib_va->header.XferState & cpu_to_le32(ResponseExpected))) {
d18b448f
MH
1283 unsigned long flagv;
1284 spin_lock_irqsave(&fib->event_lock, flagv);
1285 up(&fib->event_wait);
1286 spin_unlock_irqrestore(&fib->event_lock, flagv);
1287 schedule();
33bb3b29 1288 retval = 0;
d18b448f
MH
1289 }
1290 }
33bb3b29
MH
1291 /* Give some extra time for ioctls to complete. */
1292 if (retval == 0)
1293 ssleep(2);
8c867b25
MH
1294 index = aac->cardtype;
1295
1296 /*
1297 * Re-initialize the adapter, first free resources, then carefully
1298 * apply the initialization sequence to come back again. Only risk
1299 * is a change in Firmware dropping cache, it is assumed the caller
1300 * will ensure that i/o is queisced and the card is flushed in that
1301 * case.
1302 */
1303 aac_fib_map_free(aac);
8c867b25
MH
1304 pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys);
1305 aac->comm_addr = NULL;
1306 aac->comm_phys = 0;
1307 kfree(aac->queues);
1308 aac->queues = NULL;
ef616233 1309 cpu = cpumask_first(cpu_online_mask);
495c0217
MR
1310 if (aac->pdev->device == PMC_DEVICE_S6 ||
1311 aac->pdev->device == PMC_DEVICE_S7 ||
1312 aac->pdev->device == PMC_DEVICE_S8 ||
1313 aac->pdev->device == PMC_DEVICE_S9) {
1314 if (aac->max_msix > 1) {
ef616233
MR
1315 for (i = 0; i < aac->max_msix; i++) {
1316 if (irq_set_affinity_hint(
1317 aac->msixentry[i].vector,
1318 NULL)) {
1319 printk(KERN_ERR "%s%d: Failed to reset IRQ affinity for cpu %d\n",
1320 aac->name,
1321 aac->id,
1322 cpu);
1323 }
1324 cpu = cpumask_next(cpu,
1325 cpu_online_mask);
495c0217
MR
1326 free_irq(aac->msixentry[i].vector,
1327 &(aac->aac_msix[i]));
ef616233 1328 }
495c0217
MR
1329 pci_disable_msix(aac->pdev);
1330 } else {
1331 free_irq(aac->pdev->irq, &(aac->aac_msix[0]));
1332 }
1333 } else {
1334 free_irq(aac->pdev->irq, aac);
1335 }
d0efab26
VA
1336 if (aac->msi)
1337 pci_disable_msi(aac->pdev);
8c867b25
MH
1338 kfree(aac->fsa_dev);
1339 aac->fsa_dev = NULL;
94cf6ba1
SM
1340 quirks = aac_get_driver_ident(index)->quirks;
1341 if (quirks & AAC_QUIRK_31BIT) {
929a22a5
YH
1342 if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(31)))) ||
1343 ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(31)))))
8c867b25
MH
1344 goto out;
1345 } else {
284901a9
YH
1346 if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32)))) ||
1347 ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(32)))))
8c867b25
MH
1348 goto out;
1349 }
1350 if ((retval = (*(aac_get_driver_ident(index)->init))(aac)))
1351 goto out;
94cf6ba1 1352 if (quirks & AAC_QUIRK_31BIT)
284901a9 1353 if ((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32))))
8c867b25 1354 goto out;
29c97684 1355 if (jafo) {
f170168b
KC
1356 aac->thread = kthread_run(aac_command_thread, aac, "%s",
1357 aac->name);
29c97684
SM
1358 if (IS_ERR(aac->thread)) {
1359 retval = PTR_ERR(aac->thread);
1360 goto out;
1361 }
8c867b25
MH
1362 }
1363 (void)aac_get_adapter_info(aac);
8c867b25 1364 if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) {
8ce3eca4
SM
1365 host->sg_tablesize = 34;
1366 host->max_sectors = (host->sg_tablesize * 8) + 112;
1367 }
1368 if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) {
1369 host->sg_tablesize = 17;
1370 host->max_sectors = (host->sg_tablesize * 8) + 112;
1371 }
8c867b25
MH
1372 aac_get_config_status(aac, 1);
1373 aac_get_containers(aac);
1374 /*
1375 * This is where the assumption that the Adapter is quiesced
1376 * is important.
1377 */
1378 command_list = NULL;
1379 __shost_for_each_device(dev, host) {
1380 unsigned long flags;
1381 spin_lock_irqsave(&dev->list_lock, flags);
1382 list_for_each_entry(command, &dev->cmd_list, list)
1383 if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
1384 command->SCp.buffer = (struct scatterlist *)command_list;
1385 command_list = command;
1386 }
1387 spin_unlock_irqrestore(&dev->list_lock, flags);
1388 }
1389 while ((command = command_list)) {
1390 command_list = (struct scsi_cmnd *)command->SCp.buffer;
1391 command->SCp.buffer = NULL;
1392 command->result = DID_OK << 16
1393 | COMMAND_COMPLETE << 8
1394 | SAM_STAT_TASK_SET_FULL;
1395 command->SCp.phase = AAC_OWNER_ERROR_HANDLER;
1396 command->scsi_done(command);
1397 }
1398 retval = 0;
1399
1400out:
1401 aac->in_reset = 0;
1402 scsi_unblock_requests(host);
29c97684
SM
1403 if (jafo) {
1404 spin_lock_irq(host->host_lock);
1405 }
1406 return retval;
1407}
1408
1409int aac_reset_adapter(struct aac_dev * aac, int forced)
1410{
1411 unsigned long flagv = 0;
1412 int retval;
1413 struct Scsi_Host * host;
1414
1415 if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
1416 return -EBUSY;
1417
1418 if (aac->in_reset) {
1419 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1420 return -EBUSY;
1421 }
1422 aac->in_reset = 1;
1423 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1424
1425 /*
1426 * Wait for all commands to complete to this specific
1427 * target (block maximum 60 seconds). Although not necessary,
1428 * it does make us a good storage citizen.
1429 */
1430 host = aac->scsi_host_ptr;
1431 scsi_block_requests(host);
1432 if (forced < 2) for (retval = 60; retval; --retval) {
1433 struct scsi_device * dev;
1434 struct scsi_cmnd * command;
1435 int active = 0;
1436
1437 __shost_for_each_device(dev, host) {
1438 spin_lock_irqsave(&dev->list_lock, flagv);
1439 list_for_each_entry(command, &dev->cmd_list, list) {
1440 if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
1441 active++;
1442 break;
1443 }
1444 }
1445 spin_unlock_irqrestore(&dev->list_lock, flagv);
1446 if (active)
1447 break;
1448
1449 }
1450 /*
1451 * We can exit If all the commands are complete
1452 */
1453 if (active == 0)
1454 break;
1455 ssleep(1);
1456 }
1457
1458 /* Quiesce build, flush cache, write through mode */
f858317d
SM
1459 if (forced < 2)
1460 aac_send_shutdown(aac);
29c97684 1461 spin_lock_irqsave(host->host_lock, flagv);
f858317d 1462 retval = _aac_reset_adapter(aac, forced ? forced : ((aac_check_reset != 0) && (aac_check_reset != 1)));
29c97684
SM
1463 spin_unlock_irqrestore(host->host_lock, flagv);
1464
f858317d 1465 if ((forced < 2) && (retval == -ENODEV)) {
29c97684
SM
1466 /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */
1467 struct fib * fibctx = aac_fib_alloc(aac);
1468 if (fibctx) {
1469 struct aac_pause *cmd;
1470 int status;
1471
1472 aac_fib_init(fibctx);
1473
1474 cmd = (struct aac_pause *) fib_data(fibctx);
1475
1476 cmd->command = cpu_to_le32(VM_ContainerConfig);
1477 cmd->type = cpu_to_le32(CT_PAUSE_IO);
1478 cmd->timeout = cpu_to_le32(1);
1479 cmd->min = cpu_to_le32(1);
1480 cmd->noRescan = cpu_to_le32(1);
1481 cmd->count = cpu_to_le32(0);
1482
1483 status = aac_fib_send(ContainerCommand,
1484 fibctx,
1485 sizeof(struct aac_pause),
1486 FsaNormal,
1487 -2 /* Timeout silently */, 1,
1488 NULL, NULL);
1489
1490 if (status >= 0)
1491 aac_fib_complete(fibctx);
cacb6dc3
PNRCEH
1492 /* FIB should be freed only after getting
1493 * the response from the F/W */
1494 if (status != -ERESTARTSYS)
1495 aac_fib_free(fibctx);
29c97684
SM
1496 }
1497 }
1498
8c867b25
MH
1499 return retval;
1500}
1501
1502int aac_check_health(struct aac_dev * aac)
1503{
1504 int BlinkLED;
1505 unsigned long time_now, flagv = 0;
1506 struct list_head * entry;
1507 struct Scsi_Host * host;
1508
1509 /* Extending the scope of fib_lock slightly to protect aac->in_reset */
1510 if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
1511 return 0;
1512
1513 if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) {
1514 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1515 return 0; /* OK */
1516 }
1517
1518 aac->in_reset = 1;
1519
1520 /* Fake up an AIF:
1521 * aac_aifcmd.command = AifCmdEventNotify = 1
1522 * aac_aifcmd.seqnum = 0xFFFFFFFF
1523 * aac_aifcmd.data[0] = AifEnExpEvent = 23
1524 * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3
1525 * aac.aifcmd.data[2] = AifHighPriority = 3
1526 * aac.aifcmd.data[3] = BlinkLED
1527 */
1528
1529 time_now = jiffies/HZ;
1530 entry = aac->fib_list.next;
1531
1532 /*
1533 * For each Context that is on the
1534 * fibctxList, make a copy of the
1535 * fib, and then set the event to wake up the
1536 * thread that is waiting for it.
1537 */
1538 while (entry != &aac->fib_list) {
1539 /*
1540 * Extract the fibctx
1541 */
1542 struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next);
1543 struct hw_fib * hw_fib;
1544 struct fib * fib;
1545 /*
1546 * Check if the queue is getting
1547 * backlogged
1548 */
1549 if (fibctx->count > 20) {
1550 /*
1551 * It's *not* jiffies folks,
1552 * but jiffies / HZ, so do not
1553 * panic ...
1554 */
1555 u32 time_last = fibctx->jiffies;
1556 /*
1557 * Has it been > 2 minutes
1558 * since the last read off
1559 * the queue?
1560 */
1561 if ((time_now - time_last) > aif_timeout) {
1562 entry = entry->next;
1563 aac_close_fib_context(aac, fibctx);
1564 continue;
1565 }
1566 }
1567 /*
1568 * Warning: no sleep allowed while
1569 * holding spinlock
1570 */
4dbc22d7
SM
1571 hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC);
1572 fib = kzalloc(sizeof(struct fib), GFP_ATOMIC);
8c867b25
MH
1573 if (fib && hw_fib) {
1574 struct aac_aifcmd * aif;
1575
a8166a52 1576 fib->hw_fib_va = hw_fib;
8c867b25
MH
1577 fib->dev = aac;
1578 aac_fib_init(fib);
1579 fib->type = FSAFS_NTC_FIB_CONTEXT;
1580 fib->size = sizeof (struct fib);
1581 fib->data = hw_fib->data;
1582 aif = (struct aac_aifcmd *)hw_fib->data;
1583 aif->command = cpu_to_le32(AifCmdEventNotify);
a3940da5
SM
1584 aif->seqnum = cpu_to_le32(0xFFFFFFFF);
1585 ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent);
1586 ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic);
1587 ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority);
1588 ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED);
8c867b25
MH
1589
1590 /*
1591 * Put the FIB onto the
1592 * fibctx's fibs
1593 */
1594 list_add_tail(&fib->fiblink, &fibctx->fib_list);
1595 fibctx->count++;
1596 /*
1597 * Set the event to wake up the
1598 * thread that will waiting.
1599 */
1600 up(&fibctx->wait_sem);
1601 } else {
1602 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
1603 kfree(fib);
1604 kfree(hw_fib);
1605 }
1606 entry = entry->next;
1607 }
1608
1609 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1610
1611 if (BlinkLED < 0) {
1612 printk(KERN_ERR "%s: Host adapter dead %d\n", aac->name, BlinkLED);
1613 goto out;
1614 }
1615
1616 printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED);
1617
2f7ecc55 1618 if (!aac_check_reset || ((aac_check_reset == 1) &&
a3940da5
SM
1619 (aac->supplement_adapter_info.SupportedOptions2 &
1620 AAC_OPTION_IGNORE_RESET)))
29c97684 1621 goto out;
8c867b25 1622 host = aac->scsi_host_ptr;
29c97684
SM
1623 if (aac->thread->pid != current->pid)
1624 spin_lock_irqsave(host->host_lock, flagv);
f858317d 1625 BlinkLED = _aac_reset_adapter(aac, aac_check_reset != 1);
29c97684
SM
1626 if (aac->thread->pid != current->pid)
1627 spin_unlock_irqrestore(host->host_lock, flagv);
8c867b25
MH
1628 return BlinkLED;
1629
1630out:
1631 aac->in_reset = 0;
1632 return BlinkLED;
1633}
1634
1635
1da177e4
LT
1636/**
1637 * aac_command_thread - command processing thread
1638 * @dev: Adapter to monitor
1639 *
1640 * Waits on the commandready event in it's queue. When the event gets set
1641 * it will pull FIBs off it's queue. It will continue to pull FIBs off
1642 * until the queue is empty. When the queue is empty it will wait for
1643 * more FIBs.
1644 */
8ce3eca4 1645
fe27381d 1646int aac_command_thread(void *data)
1da177e4 1647{
fe27381d 1648 struct aac_dev *dev = data;
1da177e4
LT
1649 struct hw_fib *hw_fib, *hw_newfib;
1650 struct fib *fib, *newfib;
1da177e4
LT
1651 struct aac_fib_context *fibctx;
1652 unsigned long flags;
1653 DECLARE_WAITQUEUE(wait, current);
29c97684
SM
1654 unsigned long next_jiffies = jiffies + HZ;
1655 unsigned long next_check_jiffies = next_jiffies;
1656 long difference = HZ;
1da177e4
LT
1657
1658 /*
1659 * We can only have one thread per adapter for AIF's.
1660 */
1661 if (dev->aif_thread)
1662 return -EINVAL;
fe27381d 1663
1da177e4
LT
1664 /*
1665 * Let the DPC know it has a place to send the AIF's to.
1666 */
1667 dev->aif_thread = 1;
2f130980 1668 add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 1669 set_current_state(TASK_INTERRUPTIBLE);
2f130980 1670 dprintk ((KERN_INFO "aac_command_thread start\n"));
8ce3eca4 1671 while (1) {
2f130980
MH
1672 spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
1673 while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
1da177e4
LT
1674 struct list_head *entry;
1675 struct aac_aifcmd * aifcmd;
1676
1677 set_current_state(TASK_RUNNING);
8ce3eca4 1678
2f130980 1679 entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
1da177e4 1680 list_del(entry);
8ce3eca4 1681
2f130980 1682 spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
1da177e4
LT
1683 fib = list_entry(entry, struct fib, fiblink);
1684 /*
8ce3eca4
SM
1685 * We will process the FIB here or pass it to a
1686 * worker thread that is TBD. We Really can't
1da177e4
LT
1687 * do anything at this point since we don't have
1688 * anything defined for this thread to do.
1689 */
a8166a52 1690 hw_fib = fib->hw_fib_va;
1da177e4
LT
1691 memset(fib, 0, sizeof(struct fib));
1692 fib->type = FSAFS_NTC_FIB_CONTEXT;
8ce3eca4 1693 fib->size = sizeof(struct fib);
a8166a52 1694 fib->hw_fib_va = hw_fib;
1da177e4
LT
1695 fib->data = hw_fib->data;
1696 fib->dev = dev;
1697 /*
1698 * We only handle AifRequest fibs from the adapter.
1699 */
1700 aifcmd = (struct aac_aifcmd *) hw_fib->data;
1701 if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
1702 /* Handle Driver Notify Events */
131256cf 1703 aac_handle_aif(dev, fib);
56b58712 1704 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
bfb35aa8 1705 aac_fib_adapter_complete(fib, (u16)sizeof(u32));
1da177e4 1706 } else {
1da177e4
LT
1707 /* The u32 here is important and intended. We are using
1708 32bit wrapping time to fit the adapter field */
8ce3eca4 1709
1da177e4
LT
1710 u32 time_now, time_last;
1711 unsigned long flagv;
2f130980
MH
1712 unsigned num;
1713 struct hw_fib ** hw_fib_pool, ** hw_fib_p;
1714 struct fib ** fib_pool, ** fib_p;
8ce3eca4 1715
131256cf 1716 /* Sniff events */
8ce3eca4 1717 if ((aifcmd->command ==
131256cf 1718 cpu_to_le32(AifCmdEventNotify)) ||
8ce3eca4 1719 (aifcmd->command ==
131256cf
MH
1720 cpu_to_le32(AifCmdJobProgress))) {
1721 aac_handle_aif(dev, fib);
1722 }
29c97684 1723
1da177e4
LT
1724 time_now = jiffies/HZ;
1725
2f130980
MH
1726 /*
1727 * Warning: no sleep allowed while
1728 * holding spinlock. We take the estimate
1729 * and pre-allocate a set of fibs outside the
1730 * lock.
1731 */
1732 num = le32_to_cpu(dev->init->AdapterFibsSize)
1733 / sizeof(struct hw_fib); /* some extra */
1734 spin_lock_irqsave(&dev->fib_lock, flagv);
1735 entry = dev->fib_list.next;
1736 while (entry != &dev->fib_list) {
1737 entry = entry->next;
1738 ++num;
1739 }
1740 spin_unlock_irqrestore(&dev->fib_lock, flagv);
1741 hw_fib_pool = NULL;
1742 fib_pool = NULL;
1743 if (num
1744 && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL)))
1745 && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) {
1746 hw_fib_p = hw_fib_pool;
1747 fib_p = fib_pool;
1748 while (hw_fib_p < &hw_fib_pool[num]) {
1749 if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) {
1750 --hw_fib_p;
1751 break;
1752 }
1753 if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) {
1754 kfree(*(--hw_fib_p));
1755 break;
1756 }
1757 }
1758 if ((num = hw_fib_p - hw_fib_pool) == 0) {
1759 kfree(fib_pool);
1760 fib_pool = NULL;
1761 kfree(hw_fib_pool);
1762 hw_fib_pool = NULL;
1763 }
c9475cb0 1764 } else {
2f130980
MH
1765 kfree(hw_fib_pool);
1766 hw_fib_pool = NULL;
1767 }
1da177e4
LT
1768 spin_lock_irqsave(&dev->fib_lock, flagv);
1769 entry = dev->fib_list.next;
1770 /*
8ce3eca4 1771 * For each Context that is on the
1da177e4
LT
1772 * fibctxList, make a copy of the
1773 * fib, and then set the event to wake up the
1774 * thread that is waiting for it.
1775 */
2f130980
MH
1776 hw_fib_p = hw_fib_pool;
1777 fib_p = fib_pool;
1da177e4
LT
1778 while (entry != &dev->fib_list) {
1779 /*
1780 * Extract the fibctx
1781 */
1782 fibctx = list_entry(entry, struct aac_fib_context, next);
1783 /*
1784 * Check if the queue is getting
1785 * backlogged
1786 */
1787 if (fibctx->count > 20)
1788 {
1789 /*
1790 * It's *not* jiffies folks,
1791 * but jiffies / HZ so do not
1792 * panic ...
1793 */
1794 time_last = fibctx->jiffies;
1795 /*
8ce3eca4 1796 * Has it been > 2 minutes
1da177e4
LT
1797 * since the last read off
1798 * the queue?
1799 */
404d9a90 1800 if ((time_now - time_last) > aif_timeout) {
1da177e4
LT
1801 entry = entry->next;
1802 aac_close_fib_context(dev, fibctx);
1803 continue;
1804 }
1805 }
1806 /*
1807 * Warning: no sleep allowed while
1808 * holding spinlock
1809 */
2f130980
MH
1810 if (hw_fib_p < &hw_fib_pool[num]) {
1811 hw_newfib = *hw_fib_p;
1812 *(hw_fib_p++) = NULL;
1813 newfib = *fib_p;
1814 *(fib_p++) = NULL;
1da177e4
LT
1815 /*
1816 * Make the copy of the FIB
1817 */
1818 memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
1819 memcpy(newfib, fib, sizeof(struct fib));
a8166a52 1820 newfib->hw_fib_va = hw_newfib;
1da177e4
LT
1821 /*
1822 * Put the FIB onto the
1823 * fibctx's fibs
1824 */
1825 list_add_tail(&newfib->fiblink, &fibctx->fib_list);
1826 fibctx->count++;
8ce3eca4 1827 /*
1da177e4 1828 * Set the event to wake up the
2f130980 1829 * thread that is waiting.
1da177e4
LT
1830 */
1831 up(&fibctx->wait_sem);
1832 } else {
1833 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
1da177e4
LT
1834 }
1835 entry = entry->next;
1836 }
1837 /*
1838 * Set the status of this FIB
1839 */
56b58712 1840 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
bfb35aa8 1841 aac_fib_adapter_complete(fib, sizeof(u32));
1da177e4 1842 spin_unlock_irqrestore(&dev->fib_lock, flagv);
2f130980
MH
1843 /* Free up the remaining resources */
1844 hw_fib_p = hw_fib_pool;
1845 fib_p = fib_pool;
1846 while (hw_fib_p < &hw_fib_pool[num]) {
c9475cb0
JJ
1847 kfree(*hw_fib_p);
1848 kfree(*fib_p);
2f130980
MH
1849 ++fib_p;
1850 ++hw_fib_p;
1851 }
c9475cb0
JJ
1852 kfree(hw_fib_pool);
1853 kfree(fib_pool);
1da177e4 1854 }
1da177e4 1855 kfree(fib);
2f130980 1856 spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
1da177e4
LT
1857 }
1858 /*
1859 * There are no more AIF's
1860 */
2f130980 1861 spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
29c97684
SM
1862
1863 /*
1864 * Background activity
1865 */
1866 if ((time_before(next_check_jiffies,next_jiffies))
1867 && ((difference = next_check_jiffies - jiffies) <= 0)) {
1868 next_check_jiffies = next_jiffies;
1869 if (aac_check_health(dev) == 0) {
1870 difference = ((long)(unsigned)check_interval)
1871 * HZ;
1872 next_check_jiffies = jiffies + difference;
1873 } else if (!dev->queues)
1874 break;
1875 }
1876 if (!time_before(next_check_jiffies,next_jiffies)
1877 && ((difference = next_jiffies - jiffies) <= 0)) {
1878 struct timeval now;
1879 int ret;
1880
1881 /* Don't even try to talk to adapter if its sick */
1882 ret = aac_check_health(dev);
1883 if (!ret && !dev->queues)
1884 break;
1885 next_check_jiffies = jiffies
1886 + ((long)(unsigned)check_interval)
1887 * HZ;
1888 do_gettimeofday(&now);
1889
1890 /* Synchronize our watches */
1891 if (((1000000 - (1000000 / HZ)) > now.tv_usec)
1892 && (now.tv_usec > (1000000 / HZ)))
1893 difference = (((1000000 - now.tv_usec) * HZ)
1894 + 500000) / 1000000;
1895 else if (ret == 0) {
1896 struct fib *fibptr;
1897
1898 if ((fibptr = aac_fib_alloc(dev))) {
cacb6dc3 1899 int status;
f3307f72 1900 __le32 *info;
29c97684
SM
1901
1902 aac_fib_init(fibptr);
1903
f3307f72 1904 info = (__le32 *) fib_data(fibptr);
29c97684
SM
1905 if (now.tv_usec > 500000)
1906 ++now.tv_sec;
1907
1908 *info = cpu_to_le32(now.tv_sec);
1909
cacb6dc3 1910 status = aac_fib_send(SendHostTime,
29c97684
SM
1911 fibptr,
1912 sizeof(*info),
1913 FsaNormal,
1914 1, 1,
1915 NULL,
1916 NULL);
cacb6dc3
PNRCEH
1917 /* Do not set XferState to zero unless
1918 * receives a response from F/W */
1919 if (status >= 0)
1920 aac_fib_complete(fibptr);
1921 /* FIB should be freed only after
1922 * getting the response from the F/W */
1923 if (status != -ERESTARTSYS)
1924 aac_fib_free(fibptr);
29c97684
SM
1925 }
1926 difference = (long)(unsigned)update_interval*HZ;
1927 } else {
1928 /* retry shortly */
1929 difference = 10 * HZ;
1930 }
1931 next_jiffies = jiffies + difference;
1932 if (time_before(next_check_jiffies,next_jiffies))
1933 difference = next_check_jiffies - jiffies;
1934 }
1935 if (difference <= 0)
1936 difference = 1;
1937 set_current_state(TASK_INTERRUPTIBLE);
1938 schedule_timeout(difference);
1da177e4 1939
fe27381d 1940 if (kthread_should_stop())
1da177e4 1941 break;
1da177e4 1942 }
2f130980
MH
1943 if (dev->queues)
1944 remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 1945 dev->aif_thread = 0;
2f130980 1946 return 0;
1da177e4 1947}