atari_NCR5380: Merge changes from NCR5380.c
[linux-2.6-block.git] / drivers / scsi / NCR5380.c
CommitLineData
aff0cf9a 1/*
1da177e4 2 * NCR 5380 generic driver routines. These should make it *trivial*
594d4ba3
FT
3 * to implement 5380 SCSI drivers under Linux with a non-trantor
4 * architecture.
1da177e4 5 *
594d4ba3 6 * Note that these routines also work with NR53c400 family chips.
1da177e4
LT
7 *
8 * Copyright 1993, Drew Eckhardt
594d4ba3
FT
9 * Visionary Computing
10 * (Unix and Linux consulting and custom programming)
11 * drew@colorado.edu
12 * +1 (303) 666-5836
1da177e4 13 *
aff0cf9a 14 * For more information, please consult
1da177e4
LT
15 *
16 * NCR 5380 Family
17 * SCSI Protocol Controller
18 * Databook
19 *
20 * NCR Microelectronics
21 * 1635 Aeroplaza Drive
22 * Colorado Springs, CO 80916
23 * 1+ (719) 578-3400
24 * 1+ (800) 334-5454
25 */
26
27/*
c16df32e
FT
28 * With contributions from Ray Van Tassle, Ingmar Baumgart,
29 * Ronald van Cuijlenborg, Alan Cox and others.
1da177e4
LT
30 */
31
32/*
aff0cf9a 33 * Further development / testing that should be done :
1da177e4 34 * 1. Cleanup the NCR5380_transfer_dma function and DMA operation complete
594d4ba3
FT
35 * code so that everything does the same thing that's done at the
36 * end of a pseudo-DMA read operation.
1da177e4
LT
37 *
38 * 2. Fix REAL_DMA (interrupt driven, polled works fine) -
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FT
39 * basically, transfer size needs to be reduced by one
40 * and the last byte read as is done with PSEUDO_DMA.
aff0cf9a
FT
41 *
42 * 4. Test SCSI-II tagged queueing (I have no devices which support
594d4ba3 43 * tagged queueing)
1da177e4
LT
44 */
45
1da177e4 46#ifndef notyet
1da177e4
LT
47#undef REAL_DMA
48#endif
49
1da177e4
LT
50#ifdef BOARD_REQUIRES_NO_DELAY
51#define io_recovery_delay(x)
52#else
53#define io_recovery_delay(x) udelay(x)
54#endif
55
56/*
57 * Design
58 *
aff0cf9a 59 * This is a generic 5380 driver. To use it on a different platform,
1da177e4 60 * one simply writes appropriate system specific macros (ie, data
aff0cf9a 61 * transfer - some PC's will use the I/O bus, 68K's must use
1da177e4
LT
62 * memory mapped) and drops this file in their 'C' wrapper.
63 *
aff0cf9a 64 * As far as command queueing, two queues are maintained for
1da177e4 65 * each 5380 in the system - commands that haven't been issued yet,
aff0cf9a
FT
66 * and commands that are currently executing. This means that an
67 * unlimited number of commands may be queued, letting
68 * more commands propagate from the higher driver levels giving higher
69 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
70 * allowing multiple commands to propagate all the way to a SCSI-II device
1da177e4
LT
71 * while a command is already executing.
72 *
73 *
aff0cf9a 74 * Issues specific to the NCR5380 :
1da177e4 75 *
aff0cf9a
FT
76 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
77 * piece of hardware that requires you to sit in a loop polling for
78 * the REQ signal as long as you are connected. Some devices are
79 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
686f3990 80 * while doing long seek operations. [...] These
1da177e4
LT
81 * broken devices are the exception rather than the rule and I'd rather
82 * spend my time optimizing for the normal case.
83 *
84 * Architecture :
85 *
86 * At the heart of the design is a coroutine, NCR5380_main,
87 * which is started from a workqueue for each NCR5380 host in the
88 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
89 * removing the commands from the issue queue and calling
aff0cf9a 90 * NCR5380_select() if a nexus is not established.
1da177e4
LT
91 *
92 * Once a nexus is established, the NCR5380_information_transfer()
93 * phase goes through the various phases as instructed by the target.
94 * if the target goes into MSG IN and sends a DISCONNECT message,
95 * the command structure is placed into the per instance disconnected
aff0cf9a 96 * queue, and NCR5380_main tries to find more work. If the target is
1da177e4
LT
97 * idle for too long, the system will try to sleep.
98 *
99 * If a command has disconnected, eventually an interrupt will trigger,
100 * calling NCR5380_intr() which will in turn call NCR5380_reselect
101 * to reestablish a nexus. This will run main if necessary.
102 *
aff0cf9a 103 * On command termination, the done function will be called as
1da177e4
LT
104 * appropriate.
105 *
aff0cf9a 106 * SCSI pointers are maintained in the SCp field of SCSI command
1da177e4
LT
107 * structures, being initialized after the command is connected
108 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
109 * Note that in violation of the standard, an implicit SAVE POINTERS operation
110 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
111 */
112
113/*
114 * Using this file :
115 * This file a skeleton Linux SCSI driver for the NCR 5380 series
aff0cf9a 116 * of chips. To use it, you write an architecture specific functions
1da177e4
LT
117 * and macros and include this file in your driver.
118 *
aff0cf9a
FT
119 * These macros control options :
120 * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be
594d4ba3 121 * defined.
aff0cf9a 122 *
1da177e4 123 * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically
594d4ba3 124 * for commands that return with a CHECK CONDITION status.
1da177e4
LT
125 *
126 * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential
594d4ba3 127 * transceivers.
1da177e4
LT
128 *
129 * DONT_USE_INTR - if defined, never use interrupts, even if we probe or
594d4ba3 130 * override-configure an IRQ.
1da177e4 131 *
1da177e4
LT
132 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases.
133 *
134 * REAL_DMA - if defined, REAL DMA is used during the data transfer phases.
135 *
136 * REAL_DMA_POLL - if defined, REAL DMA is used but the driver doesn't
594d4ba3
FT
137 * rely on phase mismatch and EOP interrupts to determine end
138 * of phase.
1da177e4 139 *
1da177e4 140 * These macros MUST be defined :
aff0cf9a 141 *
1da177e4
LT
142 * NCR5380_read(register) - read from the specified register
143 *
aff0cf9a 144 * NCR5380_write(register, value) - write to the specific register
1da177e4 145 *
aff0cf9a 146 * NCR5380_implementation_fields - additional fields needed for this
594d4ba3 147 * specific implementation of the NCR5380
1da177e4
LT
148 *
149 * Either real DMA *or* pseudo DMA may be implemented
aff0cf9a 150 * REAL functions :
1da177e4 151 * NCR5380_REAL_DMA should be defined if real DMA is to be used.
aff0cf9a 152 * Note that the DMA setup functions should return the number of bytes
594d4ba3 153 * that they were able to program the controller for.
1da177e4 154 *
aff0cf9a 155 * Also note that generic i386/PC versions of these macros are
594d4ba3
FT
156 * available as NCR5380_i386_dma_write_setup,
157 * NCR5380_i386_dma_read_setup, and NCR5380_i386_dma_residual.
1da177e4
LT
158 *
159 * NCR5380_dma_write_setup(instance, src, count) - initialize
160 * NCR5380_dma_read_setup(instance, dst, count) - initialize
161 * NCR5380_dma_residual(instance); - residual count
162 *
163 * PSEUDO functions :
164 * NCR5380_pwrite(instance, src, count)
165 * NCR5380_pread(instance, dst, count);
166 *
167 * The generic driver is initialized by calling NCR5380_init(instance),
aff0cf9a 168 * after setting the appropriate host specific fields and ID. If the
1da177e4
LT
169 * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance,
170 * possible) function may be used.
171 */
172
54d8fe44
FT
173static int do_abort(struct Scsi_Host *);
174static void do_reset(struct Scsi_Host *);
1da177e4 175
c16df32e 176/**
0d2cf867 177 * initialize_SCp - init the scsi pointer field
594d4ba3 178 * @cmd: command block to set up
1da177e4 179 *
594d4ba3 180 * Set up the internal fields in the SCSI command.
1da177e4
LT
181 */
182
710ddd0d 183static inline void initialize_SCp(struct scsi_cmnd *cmd)
1da177e4 184{
aff0cf9a
FT
185 /*
186 * Initialize the Scsi Pointer field so that all of the commands in the
1da177e4
LT
187 * various queues are valid.
188 */
189
9e0fe44d
BH
190 if (scsi_bufflen(cmd)) {
191 cmd->SCp.buffer = scsi_sglist(cmd);
192 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
45711f1a 193 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1da177e4
LT
194 cmd->SCp.this_residual = cmd->SCp.buffer->length;
195 } else {
196 cmd->SCp.buffer = NULL;
197 cmd->SCp.buffers_residual = 0;
9e0fe44d
BH
198 cmd->SCp.ptr = NULL;
199 cmd->SCp.this_residual = 0;
1da177e4 200 }
f27db8eb
FT
201
202 cmd->SCp.Status = 0;
203 cmd->SCp.Message = 0;
1da177e4
LT
204}
205
206/**
b32ade12 207 * NCR5380_poll_politely2 - wait for two chip register values
2f854b82 208 * @instance: controller to poll
b32ade12
FT
209 * @reg1: 5380 register to poll
210 * @bit1: Bitmask to check
211 * @val1: Expected value
212 * @reg2: Second 5380 register to poll
213 * @bit2: Second bitmask to check
214 * @val2: Second expected value
2f854b82
FT
215 * @wait: Time-out in jiffies
216 *
217 * Polls the chip in a reasonably efficient manner waiting for an
218 * event to occur. After a short quick poll we begin to yield the CPU
219 * (if possible). In irq contexts the time-out is arbitrarily limited.
220 * Callers may hold locks as long as they are held in irq mode.
221 *
b32ade12 222 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
1da177e4 223 */
2f854b82 224
b32ade12
FT
225static int NCR5380_poll_politely2(struct Scsi_Host *instance,
226 int reg1, int bit1, int val1,
227 int reg2, int bit2, int val2, int wait)
1da177e4 228{
2f854b82
FT
229 struct NCR5380_hostdata *hostdata = shost_priv(instance);
230 unsigned long deadline = jiffies + wait;
231 unsigned long n;
232
233 /* Busy-wait for up to 10 ms */
234 n = min(10000U, jiffies_to_usecs(wait));
235 n *= hostdata->accesses_per_ms;
b32ade12 236 n /= 2000;
2f854b82 237 do {
b32ade12
FT
238 if ((NCR5380_read(reg1) & bit1) == val1)
239 return 0;
240 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4
LT
241 return 0;
242 cpu_relax();
2f854b82
FT
243 } while (n--);
244
245 if (irqs_disabled() || in_interrupt())
246 return -ETIMEDOUT;
247
248 /* Repeatedly sleep for 1 ms until deadline */
249 while (time_is_after_jiffies(deadline)) {
250 schedule_timeout_uninterruptible(1);
b32ade12
FT
251 if ((NCR5380_read(reg1) & bit1) == val1)
252 return 0;
253 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4 254 return 0;
1da177e4 255 }
2f854b82 256
1da177e4
LT
257 return -ETIMEDOUT;
258}
259
b32ade12
FT
260static inline int NCR5380_poll_politely(struct Scsi_Host *instance,
261 int reg, int bit, int val, int wait)
262{
263 return NCR5380_poll_politely2(instance, reg, bit, val,
264 reg, bit, val, wait);
265}
266
185a7a1c 267#if NDEBUG
1da177e4
LT
268static struct {
269 unsigned char mask;
270 const char *name;
aff0cf9a
FT
271} signals[] = {
272 {SR_DBP, "PARITY"},
273 {SR_RST, "RST"},
274 {SR_BSY, "BSY"},
275 {SR_REQ, "REQ"},
276 {SR_MSG, "MSG"},
277 {SR_CD, "CD"},
278 {SR_IO, "IO"},
279 {SR_SEL, "SEL"},
1da177e4 280 {0, NULL}
aff0cf9a 281},
1da177e4 282basrs[] = {
aff0cf9a
FT
283 {BASR_ATN, "ATN"},
284 {BASR_ACK, "ACK"},
1da177e4 285 {0, NULL}
aff0cf9a
FT
286},
287icrs[] = {
288 {ICR_ASSERT_RST, "ASSERT RST"},
289 {ICR_ASSERT_ACK, "ASSERT ACK"},
290 {ICR_ASSERT_BSY, "ASSERT BSY"},
291 {ICR_ASSERT_SEL, "ASSERT SEL"},
292 {ICR_ASSERT_ATN, "ASSERT ATN"},
293 {ICR_ASSERT_DATA, "ASSERT DATA"},
1da177e4 294 {0, NULL}
aff0cf9a
FT
295},
296mrs[] = {
297 {MR_BLOCK_DMA_MODE, "MODE BLOCK DMA"},
298 {MR_TARGET, "MODE TARGET"},
299 {MR_ENABLE_PAR_CHECK, "MODE PARITY CHECK"},
300 {MR_ENABLE_PAR_INTR, "MODE PARITY INTR"},
0d2cf867 301 {MR_ENABLE_EOP_INTR, "MODE EOP INTR"},
aff0cf9a
FT
302 {MR_MONITOR_BSY, "MODE MONITOR BSY"},
303 {MR_DMA_MODE, "MODE DMA"},
304 {MR_ARBITRATE, "MODE ARBITRATION"},
1da177e4
LT
305 {0, NULL}
306};
307
308/**
0d2cf867
FT
309 * NCR5380_print - print scsi bus signals
310 * @instance: adapter state to dump
1da177e4 311 *
594d4ba3 312 * Print the SCSI bus signals for debugging purposes
1da177e4
LT
313 */
314
315static void NCR5380_print(struct Scsi_Host *instance)
316{
1da177e4 317 unsigned char status, data, basr, mr, icr, i;
1da177e4
LT
318
319 data = NCR5380_read(CURRENT_SCSI_DATA_REG);
320 status = NCR5380_read(STATUS_REG);
321 mr = NCR5380_read(MODE_REG);
322 icr = NCR5380_read(INITIATOR_COMMAND_REG);
323 basr = NCR5380_read(BUS_AND_STATUS_REG);
324
325 printk("STATUS_REG: %02x ", status);
326 for (i = 0; signals[i].mask; ++i)
327 if (status & signals[i].mask)
328 printk(",%s", signals[i].name);
329 printk("\nBASR: %02x ", basr);
330 for (i = 0; basrs[i].mask; ++i)
331 if (basr & basrs[i].mask)
332 printk(",%s", basrs[i].name);
333 printk("\nICR: %02x ", icr);
334 for (i = 0; icrs[i].mask; ++i)
335 if (icr & icrs[i].mask)
336 printk(",%s", icrs[i].name);
337 printk("\nMODE: %02x ", mr);
338 for (i = 0; mrs[i].mask; ++i)
339 if (mr & mrs[i].mask)
340 printk(",%s", mrs[i].name);
341 printk("\n");
342}
343
0d2cf867
FT
344static struct {
345 unsigned char value;
346 const char *name;
347} phases[] = {
348 {PHASE_DATAOUT, "DATAOUT"},
349 {PHASE_DATAIN, "DATAIN"},
350 {PHASE_CMDOUT, "CMDOUT"},
351 {PHASE_STATIN, "STATIN"},
352 {PHASE_MSGOUT, "MSGOUT"},
353 {PHASE_MSGIN, "MSGIN"},
354 {PHASE_UNKNOWN, "UNKNOWN"}
355};
1da177e4 356
c16df32e 357/**
0d2cf867 358 * NCR5380_print_phase - show SCSI phase
594d4ba3 359 * @instance: adapter to dump
1da177e4 360 *
594d4ba3 361 * Print the current SCSI phase for debugging purposes
1da177e4
LT
362 */
363
364static void NCR5380_print_phase(struct Scsi_Host *instance)
365{
1da177e4
LT
366 unsigned char status;
367 int i;
1da177e4
LT
368
369 status = NCR5380_read(STATUS_REG);
370 if (!(status & SR_REQ))
6a6ff4ac 371 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
1da177e4 372 else {
0d2cf867
FT
373 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
374 (phases[i].value != (status & PHASE_MASK)); ++i)
375 ;
6a6ff4ac 376 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
1da177e4
LT
377 }
378}
379#endif
380
1da177e4 381
d5f7e65d 382static int probe_irq __initdata;
1da177e4
LT
383
384/**
594d4ba3
FT
385 * probe_intr - helper for IRQ autoprobe
386 * @irq: interrupt number
387 * @dev_id: unused
388 * @regs: unused
1da177e4 389 *
594d4ba3
FT
390 * Set a flag to indicate the IRQ in question was received. This is
391 * used by the IRQ probe code.
1da177e4 392 */
aff0cf9a 393
7d12e780 394static irqreturn_t __init probe_intr(int irq, void *dev_id)
1da177e4
LT
395{
396 probe_irq = irq;
397 return IRQ_HANDLED;
398}
399
400/**
594d4ba3
FT
401 * NCR5380_probe_irq - find the IRQ of an NCR5380
402 * @instance: NCR5380 controller
403 * @possible: bitmask of ISA IRQ lines
1da177e4 404 *
594d4ba3
FT
405 * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ
406 * and then looking to see what interrupt actually turned up.
1da177e4
LT
407 */
408
702809ce
AM
409static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance,
410 int possible)
1da177e4 411{
e8a60144 412 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
413 unsigned long timeout;
414 int trying_irqs, i, mask;
1da177e4 415
22f5f10d 416 for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1)
4909cc2b 417 if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0))
1da177e4
LT
418 trying_irqs |= mask;
419
4e5a800c 420 timeout = jiffies + msecs_to_jiffies(250);
22f5f10d 421 probe_irq = NO_IRQ;
1da177e4
LT
422
423 /*
424 * A interrupt is triggered whenever BSY = false, SEL = true
aff0cf9a 425 * and a bit set in the SELECT_ENABLE_REG is asserted on the
1da177e4
LT
426 * SCSI bus.
427 *
428 * Note that the bus is only driven when the phase control signals
429 * (I/O, C/D, and MSG) match those in the TCR, so we must reset that
430 * to zero.
431 */
432
433 NCR5380_write(TARGET_COMMAND_REG, 0);
434 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
435 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
436 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
437
22f5f10d 438 while (probe_irq == NO_IRQ && time_before(jiffies, timeout))
a9a3047d 439 schedule_timeout_uninterruptible(1);
aff0cf9a 440
1da177e4
LT
441 NCR5380_write(SELECT_ENABLE_REG, 0);
442 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
443
22f5f10d 444 for (i = 1, mask = 2; i < 16; ++i, mask <<= 1)
1da177e4
LT
445 if (trying_irqs & mask)
446 free_irq(i, NULL);
447
448 return probe_irq;
449}
450
451/**
594d4ba3
FT
452 * NCR58380_info - report driver and host information
453 * @instance: relevant scsi host instance
1da177e4 454 *
594d4ba3 455 * For use as the host template info() handler.
1da177e4
LT
456 */
457
8c32513b 458static const char *NCR5380_info(struct Scsi_Host *instance)
1da177e4 459{
8c32513b
FT
460 struct NCR5380_hostdata *hostdata = shost_priv(instance);
461
462 return hostdata->info;
463}
464
465static void prepare_info(struct Scsi_Host *instance)
466{
467 struct NCR5380_hostdata *hostdata = shost_priv(instance);
468
469 snprintf(hostdata->info, sizeof(hostdata->info),
470 "%s, io_port 0x%lx, n_io_port %d, "
471 "base 0x%lx, irq %d, "
472 "can_queue %d, cmd_per_lun %d, "
473 "sg_tablesize %d, this_id %d, "
be3f4121 474 "flags { %s%s%s}, "
8c32513b
FT
475 "options { %s} ",
476 instance->hostt->name, instance->io_port, instance->n_io_port,
477 instance->base, instance->irq,
478 instance->can_queue, instance->cmd_per_lun,
479 instance->sg_tablesize, instance->this_id,
55181be8 480 hostdata->flags & FLAG_NO_DMA_FIXUP ? "NO_DMA_FIXUP " : "",
8c32513b 481 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
9c3f0e2b 482 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "",
1da177e4 483#ifdef AUTOPROBE_IRQ
8c32513b 484 "AUTOPROBE_IRQ "
1da177e4 485#endif
1da177e4 486#ifdef DIFFERENTIAL
8c32513b 487 "DIFFERENTIAL "
1da177e4
LT
488#endif
489#ifdef REAL_DMA
8c32513b 490 "REAL_DMA "
1da177e4
LT
491#endif
492#ifdef REAL_DMA_POLL
8c32513b 493 "REAL_DMA_POLL "
1da177e4
LT
494#endif
495#ifdef PARITY
8c32513b 496 "PARITY "
1da177e4
LT
497#endif
498#ifdef PSEUDO_DMA
8c32513b 499 "PSEUDO_DMA "
8c32513b
FT
500#endif
501 "");
1da177e4
LT
502}
503
a9c2dc43 504#ifdef PSEUDO_DMA
dd7ab71b
AV
505static int __maybe_unused NCR5380_write_info(struct Scsi_Host *instance,
506 char *buffer, int length)
507{
a9c2dc43
FT
508 struct NCR5380_hostdata *hostdata = shost_priv(instance);
509
510 hostdata->spin_max_r = 0;
511 hostdata->spin_max_w = 0;
512 return 0;
dd7ab71b 513}
1da177e4 514
dd7ab71b 515static int __maybe_unused NCR5380_show_info(struct seq_file *m,
0d2cf867 516 struct Scsi_Host *instance)
1da177e4 517{
e8a60144 518 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 519
0c3de38f 520 seq_printf(m, "Highwater I/O busy spin counts: write %d, read %d\n",
a9c2dc43 521 hostdata->spin_max_w, hostdata->spin_max_r);
dd7ab71b 522 return 0;
1da177e4 523}
e5c3fddf 524#endif
1da177e4
LT
525
526/**
0d2cf867 527 * NCR5380_init - initialise an NCR5380
594d4ba3
FT
528 * @instance: adapter to configure
529 * @flags: control flags
1da177e4 530 *
594d4ba3
FT
531 * Initializes *instance and corresponding 5380 chip,
532 * with flags OR'd into the initial flags value.
1da177e4 533 *
594d4ba3 534 * Notes : I assume that the host, hostno, and id bits have been
0d2cf867 535 * set correctly. I don't care about the irq and other fields.
1da177e4 536 *
594d4ba3 537 * Returns 0 for success
1da177e4
LT
538 */
539
6f039790 540static int NCR5380_init(struct Scsi_Host *instance, int flags)
1da177e4 541{
e8a60144 542 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 543 int i;
2f854b82 544 unsigned long deadline;
1da177e4 545
0d2cf867 546 hostdata->host = instance;
1da177e4 547 hostdata->id_mask = 1 << instance->this_id;
0d2cf867 548 hostdata->id_higher_mask = 0;
1da177e4
LT
549 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
550 if (i > hostdata->id_mask)
551 hostdata->id_higher_mask |= i;
552 for (i = 0; i < 8; ++i)
553 hostdata->busy[i] = 0;
554#ifdef REAL_DMA
555 hostdata->dmalen = 0;
556#endif
11d2f63b 557 spin_lock_init(&hostdata->lock);
1da177e4 558 hostdata->connected = NULL;
f27db8eb
FT
559 hostdata->sensing = NULL;
560 INIT_LIST_HEAD(&hostdata->autosense);
32b26a10
FT
561 INIT_LIST_HEAD(&hostdata->unissued);
562 INIT_LIST_HEAD(&hostdata->disconnected);
563
55181be8 564 hostdata->flags = flags;
aff0cf9a 565
8d8601a7 566 INIT_WORK(&hostdata->main_task, NCR5380_main);
0ad0eff9
FT
567 hostdata->work_q = alloc_workqueue("ncr5380_%d",
568 WQ_UNBOUND | WQ_MEM_RECLAIM,
569 1, instance->host_no);
570 if (!hostdata->work_q)
571 return -ENOMEM;
572
8c32513b
FT
573 prepare_info(instance);
574
1da177e4
LT
575 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
576 NCR5380_write(MODE_REG, MR_BASE);
577 NCR5380_write(TARGET_COMMAND_REG, 0);
578 NCR5380_write(SELECT_ENABLE_REG, 0);
2f854b82
FT
579
580 /* Calibrate register polling loop */
581 i = 0;
582 deadline = jiffies + 1;
583 do {
584 cpu_relax();
585 } while (time_is_after_jiffies(deadline));
586 deadline += msecs_to_jiffies(256);
587 do {
588 NCR5380_read(STATUS_REG);
589 ++i;
590 cpu_relax();
591 } while (time_is_after_jiffies(deadline));
592 hostdata->accesses_per_ms = i / 256;
593
b6488f97
FT
594 return 0;
595}
1da177e4 596
b6488f97
FT
597/**
598 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
599 * @instance: adapter to check
600 *
601 * If the system crashed, it may have crashed with a connected target and
602 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
603 * currently established nexus, which we know nothing about. Failing that
604 * do a bus reset.
605 *
606 * Note that a bus reset will cause the chip to assert IRQ.
607 *
608 * Returns 0 if successful, otherwise -ENXIO.
609 */
610
611static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
612{
9c3f0e2b 613 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 614 int pass;
1da177e4
LT
615
616 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
617 switch (pass) {
618 case 1:
619 case 3:
620 case 5:
636b1ec8
FT
621 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
622 NCR5380_poll_politely(instance,
623 STATUS_REG, SR_BSY, 0, 5 * HZ);
1da177e4
LT
624 break;
625 case 2:
636b1ec8 626 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
1da177e4
LT
627 do_abort(instance);
628 break;
629 case 4:
636b1ec8 630 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
1da177e4 631 do_reset(instance);
9c3f0e2b
FT
632 /* Wait after a reset; the SCSI standard calls for
633 * 250ms, we wait 500ms to be on the safe side.
634 * But some Toshiba CD-ROMs need ten times that.
635 */
636 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
637 msleep(2500);
638 else
639 msleep(500);
1da177e4
LT
640 break;
641 case 6:
636b1ec8 642 shost_printk(KERN_ERR, instance, "bus locked solid\n");
1da177e4
LT
643 return -ENXIO;
644 }
645 }
646 return 0;
647}
648
649/**
0d2cf867 650 * NCR5380_exit - remove an NCR5380
594d4ba3 651 * @instance: adapter to remove
0d2cf867
FT
652 *
653 * Assumes that no more work can be queued (e.g. by NCR5380_intr).
1da177e4
LT
654 */
655
a43cf0f3 656static void NCR5380_exit(struct Scsi_Host *instance)
1da177e4 657{
e8a60144 658 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 659
8d8601a7 660 cancel_work_sync(&hostdata->main_task);
0ad0eff9 661 destroy_workqueue(hostdata->work_q);
1da177e4
LT
662}
663
677e0194
FT
664/**
665 * complete_cmd - finish processing a command and return it to the SCSI ML
666 * @instance: the host instance
667 * @cmd: command to complete
668 */
669
670static void complete_cmd(struct Scsi_Host *instance,
671 struct scsi_cmnd *cmd)
672{
673 struct NCR5380_hostdata *hostdata = shost_priv(instance);
674
675 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
676
f27db8eb
FT
677 if (hostdata->sensing == cmd) {
678 /* Autosense processing ends here */
679 if ((cmd->result & 0xff) != SAM_STAT_GOOD) {
680 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
681 set_host_byte(cmd, DID_ERROR);
682 } else
683 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
684 hostdata->sensing = NULL;
685 }
686
677e0194
FT
687 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
688
689 cmd->scsi_done(cmd);
690}
691
1da177e4 692/**
1bb40589
FT
693 * NCR5380_queue_command - queue a command
694 * @instance: the relevant SCSI adapter
695 * @cmd: SCSI command
1da177e4 696 *
1bb40589
FT
697 * cmd is added to the per-instance issue queue, with minor
698 * twiddling done to the host specific fields of cmd. If the
699 * main coroutine is not running, it is restarted.
1da177e4
LT
700 */
701
1bb40589
FT
702static int NCR5380_queue_command(struct Scsi_Host *instance,
703 struct scsi_cmnd *cmd)
1da177e4 704{
1bb40589 705 struct NCR5380_hostdata *hostdata = shost_priv(instance);
32b26a10 706 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1bb40589 707 unsigned long flags;
1da177e4
LT
708
709#if (NDEBUG & NDEBUG_NO_WRITE)
710 switch (cmd->cmnd[0]) {
711 case WRITE_6:
712 case WRITE_10:
dbb6b350 713 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
1da177e4 714 cmd->result = (DID_ERROR << 16);
1bb40589 715 cmd->scsi_done(cmd);
1da177e4
LT
716 return 0;
717 }
0d2cf867 718#endif /* (NDEBUG & NDEBUG_NO_WRITE) */
1da177e4 719
1da177e4
LT
720 cmd->result = 0;
721
11d2f63b 722 spin_lock_irqsave(&hostdata->lock, flags);
1bb40589 723
aff0cf9a
FT
724 /*
725 * Insert the cmd into the issue queue. Note that REQUEST SENSE
1da177e4 726 * commands are added to the head of the queue since any command will
aff0cf9a 727 * clear the contingent allegiance condition that exists and the
1da177e4
LT
728 * sense data is only guaranteed to be valid while the condition exists.
729 */
730
32b26a10
FT
731 if (cmd->cmnd[0] == REQUEST_SENSE)
732 list_add(&ncmd->list, &hostdata->unissued);
733 else
734 list_add_tail(&ncmd->list, &hostdata->unissued);
735
11d2f63b 736 spin_unlock_irqrestore(&hostdata->lock, flags);
1bb40589 737
dbb6b350
FT
738 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
739 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
1da177e4 740
1da177e4 741 /* Kick off command processing */
8d8601a7 742 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4
LT
743 return 0;
744}
745
f27db8eb
FT
746/**
747 * dequeue_next_cmd - dequeue a command for processing
748 * @instance: the scsi host instance
749 *
750 * Priority is given to commands on the autosense queue. These commands
751 * need autosense because of a CHECK CONDITION result.
752 *
753 * Returns a command pointer if a command is found for a target that is
754 * not already busy. Otherwise returns NULL.
755 */
756
757static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
758{
759 struct NCR5380_hostdata *hostdata = shost_priv(instance);
760 struct NCR5380_cmd *ncmd;
761 struct scsi_cmnd *cmd;
762
763 if (list_empty(&hostdata->autosense)) {
764 list_for_each_entry(ncmd, &hostdata->unissued, list) {
765 cmd = NCR5380_to_scmd(ncmd);
766 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
767 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
768
769 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
770 list_del(&ncmd->list);
771 dsprintk(NDEBUG_QUEUES, instance,
772 "dequeue: removed %p from issue queue\n", cmd);
773 return cmd;
774 }
775 }
776 } else {
777 /* Autosense processing begins here */
778 ncmd = list_first_entry(&hostdata->autosense,
779 struct NCR5380_cmd, list);
780 list_del(&ncmd->list);
781 cmd = NCR5380_to_scmd(ncmd);
782 dsprintk(NDEBUG_QUEUES, instance,
783 "dequeue: removed %p from autosense queue\n", cmd);
784 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
785 hostdata->sensing = cmd;
786 return cmd;
787 }
788 return NULL;
789}
790
791static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
792{
793 struct NCR5380_hostdata *hostdata = shost_priv(instance);
794 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
795
796 if (hostdata->sensing) {
797 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
798 list_add(&ncmd->list, &hostdata->autosense);
799 hostdata->sensing = NULL;
800 } else
801 list_add(&ncmd->list, &hostdata->unissued);
802}
803
1da177e4 804/**
0d2cf867 805 * NCR5380_main - NCR state machines
1da177e4 806 *
594d4ba3
FT
807 * NCR5380_main is a coroutine that runs as long as more work can
808 * be done on the NCR5380 host adapters in a system. Both
809 * NCR5380_queue_command() and NCR5380_intr() will try to start it
810 * in case it is not running.
1da177e4
LT
811 */
812
c4028958 813static void NCR5380_main(struct work_struct *work)
1da177e4 814{
c4028958 815 struct NCR5380_hostdata *hostdata =
8d8601a7 816 container_of(work, struct NCR5380_hostdata, main_task);
1da177e4 817 struct Scsi_Host *instance = hostdata->host;
f27db8eb 818 struct scsi_cmnd *cmd;
1da177e4 819 int done;
aff0cf9a 820
1da177e4 821 do {
1da177e4 822 done = 1;
11d2f63b 823
0a4e3612 824 spin_lock_irq(&hostdata->lock);
f27db8eb
FT
825 while (!hostdata->connected &&
826 (cmd = dequeue_next_cmd(instance))) {
1da177e4 827
f27db8eb 828 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
76f13b93 829
f27db8eb
FT
830 /*
831 * Attempt to establish an I_T_L nexus here.
832 * On success, instance->hostdata->connected is set.
833 * On failure, we must add the command back to the
834 * issue queue so we can keep trying.
835 */
836 /*
837 * REQUEST SENSE commands are issued without tagged
838 * queueing, even on SCSI-II devices because the
839 * contingent allegiance condition exists for the
840 * entire unit.
841 */
11d2f63b 842
707d62b3
FT
843 cmd = NCR5380_select(instance, cmd);
844 if (!cmd) {
845 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
f27db8eb
FT
846 } else {
847 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
848 "main: select failed, returning %p to queue\n", cmd);
849 requeue_cmd(instance, cmd);
850 }
851 }
1da177e4
LT
852 if (hostdata->connected
853#ifdef REAL_DMA
854 && !hostdata->dmalen
855#endif
1da177e4 856 ) {
b746545f 857 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
1da177e4 858 NCR5380_information_transfer(instance);
1da177e4 859 done = 0;
1d3db59d 860 }
0a4e3612
FT
861 spin_unlock_irq(&hostdata->lock);
862 if (!done)
863 cond_resched();
1da177e4 864 } while (!done);
1da177e4
LT
865}
866
867#ifndef DONT_USE_INTR
868
869/**
cd400825
FT
870 * NCR5380_intr - generic NCR5380 irq handler
871 * @irq: interrupt number
872 * @dev_id: device info
873 *
874 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
875 * from the disconnected queue, and restarting NCR5380_main()
876 * as required.
877 *
878 * The chip can assert IRQ in any of six different conditions. The IRQ flag
879 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
880 * Three of these six conditions are latched in the Bus and Status Register:
881 * - End of DMA (cleared by ending DMA Mode)
882 * - Parity error (cleared by reading RPIR)
883 * - Loss of BSY (cleared by reading RPIR)
884 * Two conditions have flag bits that are not latched:
885 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
886 * - Bus reset (non-maskable)
887 * The remaining condition has no flag bit at all:
888 * - Selection/reselection
889 *
890 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
891 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
892 * claimed that "the design of the [DP8490] interrupt logic ensures
893 * interrupts will not be lost (they can be on the DP5380)."
894 * The L5380/53C80 datasheet from LOGIC Devices has more details.
895 *
896 * Checking for bus reset by reading RST is futile because of interrupt
897 * latency, but a bus reset will reset chip logic. Checking for parity error
898 * is unnecessary because that interrupt is never enabled. A Loss of BSY
899 * condition will clear DMA Mode. We can tell when this occurs because the
900 * the Busy Monitor interrupt is enabled together with DMA Mode.
1da177e4
LT
901 */
902
cd400825 903static irqreturn_t NCR5380_intr(int irq, void *dev_id)
1da177e4 904{
baa9aac6 905 struct Scsi_Host *instance = dev_id;
cd400825
FT
906 struct NCR5380_hostdata *hostdata = shost_priv(instance);
907 int handled = 0;
1da177e4
LT
908 unsigned char basr;
909 unsigned long flags;
910
11d2f63b 911 spin_lock_irqsave(&hostdata->lock, flags);
cd400825
FT
912
913 basr = NCR5380_read(BUS_AND_STATUS_REG);
914 if (basr & BASR_IRQ) {
915 unsigned char mr = NCR5380_read(MODE_REG);
916 unsigned char sr = NCR5380_read(STATUS_REG);
917
b746545f
FT
918 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
919 irq, basr, sr, mr);
1da177e4 920
1da177e4 921#if defined(REAL_DMA)
cd400825
FT
922 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
923 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
924 * We ack IRQ after clearing Mode Register. Workarounds
925 * for End of DMA errata need to happen in DMA Mode.
926 */
1da177e4 927
b746545f 928 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
1da177e4 929
cd400825 930 int transferred;
1da177e4 931
cd400825
FT
932 if (!hostdata->connected)
933 panic("scsi%d : DMA interrupt with no connected cmd\n",
934 instance->hostno);
1da177e4 935
cd400825
FT
936 transferred = hostdata->dmalen - NCR5380_dma_residual(instance);
937 hostdata->connected->SCp.this_residual -= transferred;
938 hostdata->connected->SCp.ptr += transferred;
939 hostdata->dmalen = 0;
1da177e4 940
cd400825
FT
941 /* FIXME: we need to poll briefly then defer a workqueue task ! */
942 NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, BASR_ACK, 0, 2 * HZ);
943
944 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
945 NCR5380_write(MODE_REG, MR_BASE);
946 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
947 } else
948#endif /* REAL_DMA */
949 if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
950 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
951 /* Probably reselected */
952 NCR5380_write(SELECT_ENABLE_REG, 0);
953 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
954
b746545f 955 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
cd400825
FT
956
957 if (!hostdata->connected) {
958 NCR5380_reselect(instance);
959 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4 960 }
cd400825
FT
961 if (!hostdata->connected)
962 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
963 } else {
964 /* Probably Bus Reset */
965 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
966
b746545f 967 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
cd400825
FT
968 }
969 handled = 1;
970 } else {
971 shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n");
972 }
973
11d2f63b 974 spin_unlock_irqrestore(&hostdata->lock, flags);
cd400825
FT
975
976 return IRQ_RETVAL(handled);
1da177e4
LT
977}
978
aff0cf9a 979#endif
1da177e4 980
aff0cf9a 981/*
710ddd0d 982 * Function : int NCR5380_select(struct Scsi_Host *instance,
594d4ba3 983 * struct scsi_cmnd *cmd)
1da177e4
LT
984 *
985 * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command,
594d4ba3
FT
986 * including ARBITRATION, SELECTION, and initial message out for
987 * IDENTIFY and queue messages.
1da177e4 988 *
aff0cf9a 989 * Inputs : instance - instantiation of the 5380 driver on which this
594d4ba3 990 * target lives, cmd - SCSI command to execute.
aff0cf9a 991 *
707d62b3
FT
992 * Returns cmd if selection failed but should be retried,
993 * NULL if selection failed and should not be retried, or
994 * NULL if selection succeeded (hostdata->connected == cmd).
1da177e4 995 *
aff0cf9a 996 * Side effects :
594d4ba3
FT
997 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
998 * with registers as they should have been on entry - ie
999 * SELECT_ENABLE will be set appropriately, the NCR5380
1000 * will cease to drive any SCSI bus signals.
1da177e4 1001 *
594d4ba3
FT
1002 * If successful : I_T_L or I_T_L_Q nexus will be established,
1003 * instance->connected will be set to cmd.
1004 * SELECT interrupt will be disabled.
1da177e4 1005 *
594d4ba3
FT
1006 * If failed (no target) : cmd->scsi_done() will be called, and the
1007 * cmd->result host byte set to DID_BAD_TARGET.
1da177e4 1008 */
aff0cf9a 1009
707d62b3
FT
1010static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance,
1011 struct scsi_cmnd *cmd)
1da177e4 1012{
e8a60144 1013 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1014 unsigned char tmp[3], phase;
1015 unsigned char *data;
1016 int len;
1da177e4 1017 int err;
1da177e4 1018
1da177e4 1019 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
b746545f
FT
1020 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
1021 instance->this_id);
1da177e4 1022
707d62b3
FT
1023 /*
1024 * Arbitration and selection phases are slow and involve dropping the
1025 * lock, so we have to watch out for EH. An exception handler may
1026 * change 'selecting' to NULL. This function will then return NULL
1027 * so that the caller will forget about 'cmd'. (During information
1028 * transfer phases, EH may change 'connected' to NULL.)
1029 */
1030 hostdata->selecting = cmd;
1031
aff0cf9a
FT
1032 /*
1033 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
1da177e4
LT
1034 * data bus during SELECTION.
1035 */
1036
1037 NCR5380_write(TARGET_COMMAND_REG, 0);
1038
aff0cf9a 1039 /*
1da177e4
LT
1040 * Start arbitration.
1041 */
1042
1043 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
1044 NCR5380_write(MODE_REG, MR_ARBITRATE);
1045
55500d9b
FT
1046 /* The chip now waits for BUS FREE phase. Then after the 800 ns
1047 * Bus Free Delay, arbitration will begin.
1048 */
1da177e4 1049
11d2f63b 1050 spin_unlock_irq(&hostdata->lock);
b32ade12
FT
1051 err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0,
1052 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1053 ICR_ARBITRATION_PROGRESS, HZ);
11d2f63b 1054 spin_lock_irq(&hostdata->lock);
b32ade12
FT
1055 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1056 /* Reselection interrupt */
707d62b3 1057 goto out;
b32ade12
FT
1058 }
1059 if (err < 0) {
1060 NCR5380_write(MODE_REG, MR_BASE);
1061 shost_printk(KERN_ERR, instance,
1062 "select: arbitration timeout\n");
707d62b3 1063 goto out;
1da177e4 1064 }
11d2f63b 1065 spin_unlock_irq(&hostdata->lock);
1da177e4 1066
55500d9b 1067 /* The SCSI-2 arbitration delay is 2.4 us */
1da177e4
LT
1068 udelay(3);
1069
1070 /* Check for lost arbitration */
0d2cf867
FT
1071 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1072 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1073 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1da177e4 1074 NCR5380_write(MODE_REG, MR_BASE);
b746545f 1075 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
11d2f63b 1076 spin_lock_irq(&hostdata->lock);
707d62b3 1077 goto out;
1da177e4 1078 }
cf13b083
FT
1079
1080 /* After/during arbitration, BSY should be asserted.
1081 * IBM DPES-31080 Version S31Q works now
1082 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1083 */
1084 NCR5380_write(INITIATOR_COMMAND_REG,
1085 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1da177e4 1086
aff0cf9a
FT
1087 /*
1088 * Again, bus clear + bus settle time is 1.2us, however, this is
1da177e4
LT
1089 * a minimum so we'll udelay ceil(1.2)
1090 */
1091
9c3f0e2b
FT
1092 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1093 udelay(15);
1094 else
1095 udelay(2);
1da177e4 1096
11d2f63b
FT
1097 spin_lock_irq(&hostdata->lock);
1098
72064a78
FT
1099 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1100 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
707d62b3
FT
1101 goto out;
1102
1103 if (!hostdata->selecting) {
1104 NCR5380_write(MODE_REG, MR_BASE);
1105 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1106 goto out;
1107 }
72064a78 1108
b746545f 1109 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1da177e4 1110
aff0cf9a
FT
1111 /*
1112 * Now that we have won arbitration, start Selection process, asserting
1da177e4
LT
1113 * the host and target ID's on the SCSI bus.
1114 */
1115
422c0d61 1116 NCR5380_write(OUTPUT_DATA_REG, (hostdata->id_mask | (1 << scmd_id(cmd))));
1da177e4 1117
aff0cf9a 1118 /*
1da177e4
LT
1119 * Raise ATN while SEL is true before BSY goes false from arbitration,
1120 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1121 * phase immediately after selection.
1122 */
1123
1124 NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_BSY | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL));
1125 NCR5380_write(MODE_REG, MR_BASE);
1126
aff0cf9a 1127 /*
1da177e4
LT
1128 * Reselect interrupts must be turned off prior to the dropping of BSY,
1129 * otherwise we will trigger an interrupt.
1130 */
1131 NCR5380_write(SELECT_ENABLE_REG, 0);
1132
11d2f63b
FT
1133 spin_unlock_irq(&hostdata->lock);
1134
1da177e4 1135 /*
aff0cf9a 1136 * The initiator shall then wait at least two deskew delays and release
1da177e4
LT
1137 * the BSY signal.
1138 */
0d2cf867 1139 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1da177e4
LT
1140
1141 /* Reset BSY */
1142 NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL));
1143
aff0cf9a 1144 /*
1da177e4 1145 * Something weird happens when we cease to drive BSY - looks
aff0cf9a 1146 * like the board/chip is letting us do another read before the
1da177e4
LT
1147 * appropriate propagation delay has expired, and we're confusing
1148 * a BSY signal from ourselves as the target's response to SELECTION.
1149 *
1150 * A small delay (the 'C++' frontend breaks the pipeline with an
1151 * unnecessary jump, making it work on my 386-33/Trantor T128, the
aff0cf9a
FT
1152 * tighter 'C' code breaks and requires this) solves the problem -
1153 * the 1 us delay is arbitrary, and only used because this delay will
1154 * be the same on other platforms and since it works here, it should
1da177e4
LT
1155 * work there.
1156 *
1157 * wingel suggests that this could be due to failing to wait
1158 * one deskew delay.
1159 */
1160
1161 udelay(1);
1162
b746545f 1163 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1da177e4 1164
aff0cf9a
FT
1165 /*
1166 * The SCSI specification calls for a 250 ms timeout for the actual
1da177e4
LT
1167 * selection.
1168 */
1169
ae753a33
FT
1170 err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY,
1171 msecs_to_jiffies(250));
1da177e4 1172
1da177e4 1173 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
11d2f63b 1174 spin_lock_irq(&hostdata->lock);
1da177e4
LT
1175 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1176 NCR5380_reselect(instance);
cd400825
FT
1177 if (!hostdata->connected)
1178 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
6a6ff4ac 1179 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
707d62b3 1180 goto out;
1da177e4 1181 }
ae753a33
FT
1182
1183 if (err < 0) {
11d2f63b 1184 spin_lock_irq(&hostdata->lock);
ae753a33 1185 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
ae753a33 1186 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1187 /* Can't touch cmd if it has been reclaimed by the scsi ML */
1188 if (hostdata->selecting) {
1189 cmd->result = DID_BAD_TARGET << 16;
1190 complete_cmd(instance, cmd);
1191 dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n");
1192 cmd = NULL;
1193 }
1194 goto out;
ae753a33
FT
1195 }
1196
aff0cf9a
FT
1197 /*
1198 * No less than two deskew delays after the initiator detects the
1199 * BSY signal is true, it shall release the SEL signal and may
1da177e4
LT
1200 * change the DATA BUS. -wingel
1201 */
1202
1203 udelay(1);
1204
1205 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1206
1da177e4 1207 /*
aff0cf9a 1208 * Since we followed the SCSI spec, and raised ATN while SEL
1da177e4
LT
1209 * was true but before BSY was false during selection, the information
1210 * transfer phase should be a MESSAGE OUT phase so that we can send the
1211 * IDENTIFY message.
aff0cf9a 1212 *
1da177e4
LT
1213 * If SCSI-II tagged queuing is enabled, we also send a SIMPLE_QUEUE_TAG
1214 * message (2 bytes) with a tag ID that we increment with every command
1215 * until it wraps back to 0.
1216 *
1217 * XXX - it turns out that there are some broken SCSI-II devices,
594d4ba3
FT
1218 * which claim to support tagged queuing but fail when more than
1219 * some number of commands are issued at once.
1da177e4
LT
1220 */
1221
1222 /* Wait for start of REQ/ACK handshake */
1223
1da177e4 1224 err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 1225 spin_lock_irq(&hostdata->lock);
1cc160e1 1226 if (err < 0) {
55500d9b
FT
1227 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1228 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1da177e4 1229 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1230 goto out;
1231 }
1232 if (!hostdata->selecting) {
1233 do_abort(instance);
1234 goto out;
1da177e4
LT
1235 }
1236
b746545f
FT
1237 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1238 scmd_id(cmd));
22f5f10d 1239 tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun);
1da177e4
LT
1240
1241 len = 1;
1242 cmd->tag = 0;
1243
1244 /* Send message(s) */
1245 data = tmp;
1246 phase = PHASE_MSGOUT;
1247 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f 1248 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1da177e4 1249 /* XXX need to handle errors here */
11d2f63b 1250
1da177e4 1251 hostdata->connected = cmd;
9cb78c16 1252 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1da177e4 1253
28424d3a 1254 initialize_SCp(cmd);
1da177e4 1255
707d62b3
FT
1256 cmd = NULL;
1257
1258out:
1259 if (!hostdata->selecting)
1260 return NULL;
1261 hostdata->selecting = NULL;
1262 return cmd;
1da177e4
LT
1263}
1264
aff0cf9a
FT
1265/*
1266 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
594d4ba3 1267 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1268 *
1269 * Purpose : transfers data in given phase using polled I/O
1270 *
aff0cf9a 1271 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1272 * what phase is expected, *count - pointer to number of
1273 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1274 *
1da177e4 1275 * Returns : -1 when different phase is entered without transferring
0d2cf867 1276 * maximum number of bytes, 0 if all bytes are transferred or exit
594d4ba3 1277 * is in same phase.
1da177e4 1278 *
594d4ba3 1279 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1280 *
1281 * XXX Note : handling for bus free may be useful.
1282 */
1283
1284/*
aff0cf9a 1285 * Note : this code is not as quick as it could be, however it
1da177e4
LT
1286 * IS 100% reliable, and for the actual data transfer where speed
1287 * counts, we will always do a pseudo DMA or DMA transfer.
1288 */
1289
0d2cf867
FT
1290static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1291 unsigned char *phase, int *count,
1292 unsigned char **data)
1293{
1da177e4
LT
1294 unsigned char p = *phase, tmp;
1295 int c = *count;
1296 unsigned char *d = *data;
1da177e4 1297
aff0cf9a
FT
1298 /*
1299 * The NCR5380 chip will only drive the SCSI bus when the
1da177e4
LT
1300 * phase specified in the appropriate bits of the TARGET COMMAND
1301 * REGISTER match the STATUS REGISTER
1302 */
1303
0d2cf867 1304 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1da177e4 1305
1da177e4 1306 do {
aff0cf9a
FT
1307 /*
1308 * Wait for assertion of REQ, after which the phase bits will be
1309 * valid
1da177e4
LT
1310 */
1311
686f3990 1312 if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1da177e4 1313 break;
1da177e4 1314
b746545f 1315 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1da177e4
LT
1316
1317 /* Check for phase mismatch */
686f3990 1318 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
b746545f
FT
1319 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1320 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1da177e4
LT
1321 break;
1322 }
0d2cf867 1323
1da177e4
LT
1324 /* Do actual transfer from SCSI bus to / from memory */
1325 if (!(p & SR_IO))
1326 NCR5380_write(OUTPUT_DATA_REG, *d);
1327 else
1328 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1329
1330 ++d;
1331
aff0cf9a 1332 /*
1da177e4
LT
1333 * The SCSI standard suggests that in MSGOUT phase, the initiator
1334 * should drop ATN on the last byte of the message phase
1335 * after REQ has been asserted for the handshake but before
1336 * the initiator raises ACK.
1337 */
1338
1339 if (!(p & SR_IO)) {
1340 if (!((p & SR_MSG) && c > 1)) {
1341 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1342 NCR5380_dprint(NDEBUG_PIO, instance);
1343 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1344 } else {
1345 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1346 NCR5380_dprint(NDEBUG_PIO, instance);
1347 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1348 }
1349 } else {
1350 NCR5380_dprint(NDEBUG_PIO, instance);
1351 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1352 }
1353
a2edc4a6
FT
1354 if (NCR5380_poll_politely(instance,
1355 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1356 break;
1357
b746545f 1358 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1da177e4
LT
1359
1360/*
aff0cf9a
FT
1361 * We have several special cases to consider during REQ/ACK handshaking :
1362 * 1. We were in MSGOUT phase, and we are on the last byte of the
594d4ba3 1363 * message. ATN must be dropped as ACK is dropped.
1da177e4 1364 *
aff0cf9a 1365 * 2. We are in a MSGIN phase, and we are on the last byte of the
594d4ba3
FT
1366 * message. We must exit with ACK asserted, so that the calling
1367 * code may raise ATN before dropping ACK to reject the message.
1da177e4
LT
1368 *
1369 * 3. ACK and ATN are clear and the target may proceed as normal.
1370 */
1371 if (!(p == PHASE_MSGIN && c == 1)) {
1372 if (p == PHASE_MSGOUT && c > 1)
1373 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1374 else
1375 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1376 }
1377 } while (--c);
1378
b746545f 1379 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1da177e4
LT
1380
1381 *count = c;
1382 *data = d;
1383 tmp = NCR5380_read(STATUS_REG);
a2edc4a6
FT
1384 /* The phase read from the bus is valid if either REQ is (already)
1385 * asserted or if ACK hasn't been released yet. The latter applies if
1386 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1387 */
1388 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1da177e4
LT
1389 *phase = tmp & PHASE_MASK;
1390 else
1391 *phase = PHASE_UNKNOWN;
1392
1393 if (!c || (*phase == p))
1394 return 0;
1395 else
1396 return -1;
1397}
1398
1399/**
636b1ec8
FT
1400 * do_reset - issue a reset command
1401 * @instance: adapter to reset
1da177e4 1402 *
636b1ec8
FT
1403 * Issue a reset sequence to the NCR5380 and try and get the bus
1404 * back into sane shape.
1da177e4 1405 *
636b1ec8
FT
1406 * This clears the reset interrupt flag because there may be no handler for
1407 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1408 * been installed. And when in EH we may have released the ST DMA interrupt.
1da177e4 1409 */
aff0cf9a 1410
54d8fe44
FT
1411static void do_reset(struct Scsi_Host *instance)
1412{
636b1ec8
FT
1413 unsigned long flags;
1414
1415 local_irq_save(flags);
1416 NCR5380_write(TARGET_COMMAND_REG,
1417 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1da177e4 1418 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
636b1ec8 1419 udelay(50);
1da177e4 1420 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
636b1ec8
FT
1421 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1422 local_irq_restore(flags);
1da177e4
LT
1423}
1424
80d3eb6d
FT
1425/**
1426 * do_abort - abort the currently established nexus by going to
1427 * MESSAGE OUT phase and sending an ABORT message.
1428 * @instance: relevant scsi host instance
1da177e4 1429 *
80d3eb6d 1430 * Returns 0 on success, -1 on failure.
1da177e4
LT
1431 */
1432
54d8fe44
FT
1433static int do_abort(struct Scsi_Host *instance)
1434{
1da177e4
LT
1435 unsigned char *msgptr, phase, tmp;
1436 int len;
1437 int rc;
1da177e4
LT
1438
1439 /* Request message out phase */
1440 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1441
aff0cf9a
FT
1442 /*
1443 * Wait for the target to indicate a valid phase by asserting
1444 * REQ. Once this happens, we'll have either a MSGOUT phase
1445 * and can immediately send the ABORT message, or we'll have some
1da177e4 1446 * other phase and will have to source/sink data.
aff0cf9a 1447 *
1da177e4
LT
1448 * We really don't care what value was on the bus or what value
1449 * the target sees, so we just handshake.
1450 */
1451
80d3eb6d 1452 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1cc160e1 1453 if (rc < 0)
80d3eb6d 1454 goto timeout;
1da177e4 1455
f35d3474 1456 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
aff0cf9a 1457
1da177e4
LT
1458 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1459
f35d3474 1460 if (tmp != PHASE_MSGOUT) {
0d2cf867
FT
1461 NCR5380_write(INITIATOR_COMMAND_REG,
1462 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
54d8fe44 1463 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ);
1cc160e1 1464 if (rc < 0)
80d3eb6d
FT
1465 goto timeout;
1466 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1da177e4 1467 }
0d2cf867 1468
1da177e4
LT
1469 tmp = ABORT;
1470 msgptr = &tmp;
1471 len = 1;
1472 phase = PHASE_MSGOUT;
54d8fe44 1473 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1da177e4
LT
1474
1475 /*
1476 * If we got here, and the command completed successfully,
1477 * we're about to go into bus free state.
1478 */
1479
1480 return len ? -1 : 0;
80d3eb6d
FT
1481
1482timeout:
1483 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1484 return -1;
1da177e4
LT
1485}
1486
1487#if defined(REAL_DMA) || defined(PSEUDO_DMA) || defined (REAL_DMA_POLL)
aff0cf9a
FT
1488/*
1489 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
594d4ba3 1490 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1491 *
1492 * Purpose : transfers data in given phase using either real
594d4ba3 1493 * or pseudo DMA.
1da177e4 1494 *
aff0cf9a 1495 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1496 * what phase is expected, *count - pointer to number of
1497 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1498 *
1da177e4 1499 * Returns : -1 when different phase is entered without transferring
594d4ba3
FT
1500 * maximum number of bytes, 0 if all bytes or transferred or exit
1501 * is in same phase.
1da177e4 1502 *
594d4ba3 1503 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1504 */
1505
1506
0d2cf867
FT
1507static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1508 unsigned char *phase, int *count,
1509 unsigned char **data)
1510{
1511 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1512 register int c = *count;
1513 register unsigned char p = *phase;
1514 register unsigned char *d = *data;
1515 unsigned char tmp;
1516 int foo;
1517#if defined(REAL_DMA_POLL)
1518 int cnt, toPIO;
1519 unsigned char saved_data = 0, overrun = 0, residue;
1520#endif
1521
1da177e4
LT
1522 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1523 *phase = tmp;
1524 return -1;
1525 }
1526#if defined(REAL_DMA) || defined(REAL_DMA_POLL)
1da177e4 1527 if (p & SR_IO) {
9db6024e
FT
1528 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS))
1529 c -= 2;
1da177e4 1530 }
1da177e4 1531 hostdata->dma_len = (p & SR_IO) ? NCR5380_dma_read_setup(instance, d, c) : NCR5380_dma_write_setup(instance, d, c);
b746545f
FT
1532
1533 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1534 (p & SR_IO) ? "receive" : "send", c, *data);
1da177e4
LT
1535#endif
1536
1537 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1538
1539#ifdef REAL_DMA
cd400825
FT
1540 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1541 MR_ENABLE_EOP_INTR);
1da177e4 1542#elif defined(REAL_DMA_POLL)
cd400825 1543 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1da177e4
LT
1544#else
1545 /*
1546 * Note : on my sample board, watch-dog timeouts occurred when interrupts
aff0cf9a 1547 * were not disabled for the duration of a single DMA transfer, from
1da177e4
LT
1548 * before the setting of DMA mode to after transfer of the last byte.
1549 */
1550
55181be8 1551 if (hostdata->flags & FLAG_NO_DMA_FIXUP)
cd400825
FT
1552 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1553 MR_ENABLE_EOP_INTR);
1da177e4 1554 else
cd400825 1555 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1da177e4
LT
1556#endif /* def REAL_DMA */
1557
52a6a1cb 1558 dprintk(NDEBUG_DMA, "scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG));
1da177e4 1559
aff0cf9a 1560 /*
594d4ba3
FT
1561 * On the PAS16 at least I/O recovery delays are not needed here.
1562 * Everyone else seems to want them.
1da177e4
LT
1563 */
1564
1565 if (p & SR_IO) {
1566 io_recovery_delay(1);
1567 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1568 } else {
1569 io_recovery_delay(1);
1570 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1571 io_recovery_delay(1);
1572 NCR5380_write(START_DMA_SEND_REG, 0);
1573 io_recovery_delay(1);
1574 }
1575
1576#if defined(REAL_DMA_POLL)
1577 do {
1578 tmp = NCR5380_read(BUS_AND_STATUS_REG);
1579 } while ((tmp & BASR_PHASE_MATCH) && !(tmp & (BASR_BUSY_ERROR | BASR_END_DMA_TRANSFER)));
1580
1581/*
c16df32e
FT
1582 * At this point, either we've completed DMA, or we have a phase mismatch,
1583 * or we've unexpectedly lost BUSY (which is a real error).
1584 *
1585 * For DMA sends, we want to wait until the last byte has been
1586 * transferred out over the bus before we turn off DMA mode. Alas, there
1587 * seems to be no terribly good way of doing this on a 5380 under all
1588 * conditions. For non-scatter-gather operations, we can wait until REQ
1589 * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1590 * are nastier, since the device will be expecting more data than we
1591 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1592 * could test Last Byte Sent to assure transfer (I imagine this is precisely
1593 * why this signal was added to the newer chips) but on the older 538[01]
1594 * this signal does not exist. The workaround for this lack is a watchdog;
1595 * we bail out of the wait-loop after a modest amount of wait-time if
1596 * the usual exit conditions are not met. Not a terribly clean or
1597 * correct solution :-%
1598 *
1599 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1600 * If the chip is in DMA receive mode, it will respond to a target's
1601 * REQ by latching the SCSI data into the INPUT DATA register and asserting
1602 * ACK, even if it has _already_ been notified by the DMA controller that
1603 * the current DMA transfer has completed! If the NCR5380 is then taken
1604 * out of DMA mode, this already-acknowledged byte is lost. This is
1605 * not a problem for "one DMA transfer per READ command", because
1606 * the situation will never arise... either all of the data is DMA'ed
1607 * properly, or the target switches to MESSAGE IN phase to signal a
1608 * disconnection (either operation bringing the DMA to a clean halt).
1609 * However, in order to handle scatter-receive, we must work around the
1610 * problem. The chosen fix is to DMA N-2 bytes, then check for the
1611 * condition before taking the NCR5380 out of DMA mode. One or two extra
1612 * bytes are transferred via PIO as necessary to fill out the original
1613 * request.
1da177e4
LT
1614 */
1615
1616 if (p & SR_IO) {
9db6024e
FT
1617 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS)) {
1618 udelay(10);
1619 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
1620 (BASR_PHASE_MATCH | BASR_ACK)) {
1621 saved_data = NCR5380_read(INPUT_DATA_REGISTER);
1622 overrun = 1;
1623 }
1da177e4 1624 }
1da177e4
LT
1625 } else {
1626 int limit = 100;
1627 while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ)) {
1628 if (!(tmp & BASR_PHASE_MATCH))
1629 break;
1630 if (--limit < 0)
1631 break;
1632 }
1633 }
1634
b746545f
FT
1635 dsprintk(NDEBUG_DMA, "polled DMA transfer complete, basr 0x%02x, sr 0x%02x\n",
1636 tmp, NCR5380_read(STATUS_REG));
1da177e4
LT
1637
1638 NCR5380_write(MODE_REG, MR_BASE);
1639 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1640
1641 residue = NCR5380_dma_residual(instance);
1642 c -= residue;
1643 *count -= c;
1644 *data += c;
1645 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1646
9db6024e
FT
1647 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS) &&
1648 *phase == p && (p & SR_IO) && residue == 0) {
1da177e4 1649 if (overrun) {
52a6a1cb 1650 dprintk(NDEBUG_DMA, "Got an input overrun, using saved byte\n");
1da177e4
LT
1651 **data = saved_data;
1652 *data += 1;
1653 *count -= 1;
1654 cnt = toPIO = 1;
1655 } else {
1656 printk("No overrun??\n");
1657 cnt = toPIO = 2;
1658 }
52a6a1cb 1659 dprintk(NDEBUG_DMA, "Doing %d-byte PIO to 0x%X\n", cnt, *data);
1da177e4
LT
1660 NCR5380_transfer_pio(instance, phase, &cnt, data);
1661 *count -= toPIO - cnt;
1662 }
1da177e4 1663
52a6a1cb 1664 dprintk(NDEBUG_DMA, "Return with data ptr = 0x%X, count %d, last 0x%X, next 0x%X\n", *data, *count, *(*data + *count - 1), *(*data + *count));
1da177e4
LT
1665 return 0;
1666
1667#elif defined(REAL_DMA)
1668 return 0;
1669#else /* defined(REAL_DMA_POLL) */
1670 if (p & SR_IO) {
55181be8
FT
1671 foo = NCR5380_pread(instance, d,
1672 hostdata->flags & FLAG_NO_DMA_FIXUP ? c : c - 1);
1673 if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1da177e4 1674 /*
aff0cf9a 1675 * We can't disable DMA mode after successfully transferring
1da177e4 1676 * what we plan to be the last byte, since that would open up
aff0cf9a 1677 * a race condition where if the target asserted REQ before
1da177e4
LT
1678 * we got the DMA mode reset, the NCR5380 would have latched
1679 * an additional byte into the INPUT DATA register and we'd
1680 * have dropped it.
aff0cf9a
FT
1681 *
1682 * The workaround was to transfer one fewer bytes than we
1683 * intended to with the pseudo-DMA read function, wait for
1da177e4
LT
1684 * the chip to latch the last byte, read it, and then disable
1685 * pseudo-DMA mode.
aff0cf9a 1686 *
1da177e4
LT
1687 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1688 * REQ is deasserted when ACK is asserted, and not reasserted
1689 * until ACK goes false. Since the NCR5380 won't lower ACK
1690 * until DACK is asserted, which won't happen unless we twiddle
aff0cf9a
FT
1691 * the DMA port or we take the NCR5380 out of DMA mode, we
1692 * can guarantee that we won't handshake another extra
1da177e4
LT
1693 * byte.
1694 */
1695
55181be8
FT
1696 if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG,
1697 BASR_DRQ, BASR_DRQ, HZ) < 0) {
1698 foo = -1;
1699 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1700 }
1701 if (NCR5380_poll_politely(instance, STATUS_REG,
1702 SR_REQ, 0, HZ) < 0) {
1703 foo = -1;
1704 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1da177e4 1705 }
55181be8 1706 d[c - 1] = NCR5380_read(INPUT_DATA_REG);
1da177e4 1707 }
1da177e4 1708 } else {
1da177e4 1709 foo = NCR5380_pwrite(instance, d, c);
55181be8 1710 if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1da177e4 1711 /*
aff0cf9a
FT
1712 * Wait for the last byte to be sent. If REQ is being asserted for
1713 * the byte we're interested, we'll ACK it and it will go false.
1da177e4 1714 */
55181be8
FT
1715 if (NCR5380_poll_politely2(instance,
1716 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1717 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1718 foo = -1;
1719 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1da177e4
LT
1720 }
1721 }
1da177e4
LT
1722 }
1723 NCR5380_write(MODE_REG, MR_BASE);
1724 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
cd400825 1725 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1da177e4
LT
1726 *data = d + c;
1727 *count = 0;
1728 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1da177e4
LT
1729 return foo;
1730#endif /* def REAL_DMA */
1731}
1732#endif /* defined(REAL_DMA) | defined(PSEUDO_DMA) */
1733
1734/*
1735 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1736 *
aff0cf9a 1737 * Purpose : run through the various SCSI phases and do as the target
594d4ba3
FT
1738 * directs us to. Operates on the currently connected command,
1739 * instance->connected.
1da177e4
LT
1740 *
1741 * Inputs : instance, instance for which we are doing commands
1742 *
aff0cf9a 1743 * Side effects : SCSI things happen, the disconnected queue will be
594d4ba3
FT
1744 * modified if a command disconnects, *instance->connected will
1745 * change.
1da177e4 1746 *
aff0cf9a 1747 * XXX Note : we need to watch for bus free or a reset condition here
594d4ba3 1748 * to recover from an unexpected bus free condition.
1da177e4
LT
1749 */
1750
0d2cf867
FT
1751static void NCR5380_information_transfer(struct Scsi_Host *instance)
1752{
e8a60144 1753 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1754 unsigned char msgout = NOP;
1755 int sink = 0;
1756 int len;
1757#if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL)
1758 int transfersize;
1759#endif
1760 unsigned char *data;
1761 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
11d2f63b 1762 struct scsi_cmnd *cmd;
1da177e4 1763
11d2f63b 1764 while ((cmd = hostdata->connected)) {
32b26a10
FT
1765 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1766
1da177e4
LT
1767 tmp = NCR5380_read(STATUS_REG);
1768 /* We only have a valid SCSI phase when REQ is asserted */
1769 if (tmp & SR_REQ) {
1770 phase = (tmp & PHASE_MASK);
1771 if (phase != old_phase) {
1772 old_phase = phase;
1773 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1774 }
1775 if (sink && (phase != PHASE_MSGOUT)) {
1776 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1777
1778 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
0d2cf867
FT
1779 while (NCR5380_read(STATUS_REG) & SR_REQ)
1780 ;
1da177e4
LT
1781 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1782 sink = 0;
1783 continue;
1784 }
0d2cf867 1785
1da177e4 1786 switch (phase) {
1da177e4
LT
1787 case PHASE_DATAOUT:
1788#if (NDEBUG & NDEBUG_NO_DATAOUT)
6a6ff4ac 1789 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1da177e4
LT
1790 sink = 1;
1791 do_abort(instance);
1792 cmd->result = DID_ERROR << 16;
677e0194 1793 complete_cmd(instance, cmd);
1da177e4
LT
1794 return;
1795#endif
bf1a0c6f 1796 case PHASE_DATAIN:
aff0cf9a 1797 /*
1da177e4
LT
1798 * If there is no room left in the current buffer in the
1799 * scatter-gather list, move onto the next one.
1800 */
1801
1802 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1803 ++cmd->SCp.buffer;
1804 --cmd->SCp.buffers_residual;
1805 cmd->SCp.this_residual = cmd->SCp.buffer->length;
45711f1a 1806 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
b746545f
FT
1807 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n",
1808 cmd->SCp.this_residual,
1809 cmd->SCp.buffers_residual);
1da177e4 1810 }
0d2cf867 1811
1da177e4 1812 /*
aff0cf9a 1813 * The preferred transfer method is going to be
1da177e4
LT
1814 * PSEUDO-DMA for systems that are strictly PIO,
1815 * since we can let the hardware do the handshaking.
1816 *
1817 * For this to work, we need to know the transfersize
1818 * ahead of time, since the pseudo-DMA code will sit
1819 * in an unconditional loop.
1820 */
1821
1822#if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL)
ff3d4578
FT
1823 transfersize = 0;
1824 if (!cmd->device->borken &&
1825 !(hostdata->flags & FLAG_NO_PSEUDO_DMA))
1826 transfersize = NCR5380_dma_xfer_len(instance, cmd, phase);
1827
1828 if (transfersize) {
1da177e4 1829 len = transfersize;
0d2cf867
FT
1830 if (NCR5380_transfer_dma(instance, &phase,
1831 &len, (unsigned char **)&cmd->SCp.ptr)) {
1da177e4 1832 /*
0d2cf867
FT
1833 * If the watchdog timer fires, all future
1834 * accesses to this device will use the
1835 * polled-IO.
1da177e4 1836 */
017560fc 1837 scmd_printk(KERN_INFO, cmd,
0d2cf867 1838 "switching to slow handshake\n");
1da177e4 1839 cmd->device->borken = 1;
1da177e4
LT
1840 sink = 1;
1841 do_abort(instance);
1842 cmd->result = DID_ERROR << 16;
677e0194 1843 complete_cmd(instance, cmd);
1da177e4
LT
1844 /* XXX - need to source or sink data here, as appropriate */
1845 } else
1846 cmd->SCp.this_residual -= transfersize - len;
1847 } else
1848#endif /* defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) */
11d2f63b
FT
1849 {
1850 spin_unlock_irq(&hostdata->lock);
1da177e4
LT
1851 NCR5380_transfer_pio(instance, &phase, (int *) &cmd->SCp.this_residual, (unsigned char **)
1852 &cmd->SCp.ptr);
11d2f63b
FT
1853 spin_lock_irq(&hostdata->lock);
1854 }
1da177e4
LT
1855 break;
1856 case PHASE_MSGIN:
1857 len = 1;
1858 data = &tmp;
1859 NCR5380_transfer_pio(instance, &phase, &len, &data);
1860 cmd->SCp.Message = tmp;
1861
1862 switch (tmp) {
1da177e4
LT
1863 case ABORT:
1864 case COMMAND_COMPLETE:
1865 /* Accept message by clearing ACK */
1866 sink = 1;
1867 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
0d3d9a42
FT
1868 dsprintk(NDEBUG_QUEUES, instance,
1869 "COMMAND COMPLETE %p target %d lun %llu\n",
1870 cmd, scmd_id(cmd), cmd->device->lun);
1871
1da177e4 1872 hostdata->connected = NULL;
1da177e4 1873
f27db8eb
FT
1874 cmd->result &= ~0xffff;
1875 cmd->result |= cmd->SCp.Status;
1876 cmd->result |= cmd->SCp.Message << 8;
28424d3a 1877
f27db8eb 1878 if (cmd->cmnd[0] == REQUEST_SENSE)
677e0194 1879 complete_cmd(instance, cmd);
f27db8eb
FT
1880 else {
1881 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1882 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1883 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1884 cmd);
1885 list_add_tail(&ncmd->list,
1886 &hostdata->autosense);
1887 } else
1888 complete_cmd(instance, cmd);
1da177e4
LT
1889 }
1890
aff0cf9a
FT
1891 /*
1892 * Restore phase bits to 0 so an interrupted selection,
1da177e4
LT
1893 * arbitration can resume.
1894 */
1895 NCR5380_write(TARGET_COMMAND_REG, 0);
72064a78
FT
1896
1897 /* Enable reselect interrupts */
1898 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1da177e4
LT
1899 return;
1900 case MESSAGE_REJECT:
1901 /* Accept message by clearing ACK */
1902 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1903 switch (hostdata->last_message) {
1904 case HEAD_OF_QUEUE_TAG:
1905 case ORDERED_QUEUE_TAG:
1906 case SIMPLE_QUEUE_TAG:
1907 cmd->device->simple_tags = 0;
9cb78c16 1908 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1da177e4
LT
1909 break;
1910 default:
1911 break;
1912 }
340b9612 1913 break;
0d2cf867
FT
1914 case DISCONNECT:
1915 /* Accept message by clearing ACK */
1916 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1917 hostdata->connected = NULL;
1918 list_add(&ncmd->list, &hostdata->disconnected);
1919 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1920 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1921 cmd, scmd_id(cmd), cmd->device->lun);
0d3d9a42 1922
0d2cf867
FT
1923 /*
1924 * Restore phase bits to 0 so an interrupted selection,
1925 * arbitration can resume.
1926 */
1927 NCR5380_write(TARGET_COMMAND_REG, 0);
1da177e4 1928
0d2cf867
FT
1929 /* Enable reselect interrupts */
1930 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1931 return;
aff0cf9a 1932 /*
1da177e4 1933 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
aff0cf9a 1934 * operation, in violation of the SCSI spec so we can safely
1da177e4
LT
1935 * ignore SAVE/RESTORE pointers calls.
1936 *
aff0cf9a 1937 * Unfortunately, some disks violate the SCSI spec and
1da177e4 1938 * don't issue the required SAVE_POINTERS message before
aff0cf9a 1939 * disconnecting, and we have to break spec to remain
1da177e4
LT
1940 * compatible.
1941 */
1942 case SAVE_POINTERS:
1943 case RESTORE_POINTERS:
1944 /* Accept message by clearing ACK */
1945 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1946 break;
1947 case EXTENDED_MESSAGE:
c16df32e
FT
1948 /*
1949 * Start the message buffer with the EXTENDED_MESSAGE
1950 * byte, since spi_print_msg() wants the whole thing.
1951 */
1da177e4
LT
1952 extended_msg[0] = EXTENDED_MESSAGE;
1953 /* Accept first byte by clearing ACK */
1954 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
11d2f63b
FT
1955
1956 spin_unlock_irq(&hostdata->lock);
1957
b746545f 1958 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1da177e4
LT
1959
1960 len = 2;
1961 data = extended_msg + 1;
1962 phase = PHASE_MSGIN;
1963 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1964 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1965 (int)extended_msg[1],
1966 (int)extended_msg[2]);
1da177e4 1967
e0783ed3
FT
1968 if (!len && extended_msg[1] > 0 &&
1969 extended_msg[1] <= sizeof(extended_msg) - 2) {
1da177e4
LT
1970 /* Accept third byte by clearing ACK */
1971 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1972 len = extended_msg[1] - 1;
1973 data = extended_msg + 3;
1974 phase = PHASE_MSGIN;
1975
1976 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1977 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1978 len);
1da177e4
LT
1979
1980 switch (extended_msg[2]) {
1981 case EXTENDED_SDTR:
1982 case EXTENDED_WDTR:
1983 case EXTENDED_MODIFY_DATA_POINTER:
1984 case EXTENDED_EXTENDED_IDENTIFY:
1985 tmp = 0;
1986 }
1987 } else if (len) {
6a6ff4ac 1988 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1da177e4
LT
1989 tmp = 0;
1990 } else {
6a6ff4ac
FT
1991 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1992 extended_msg[2], extended_msg[1]);
1da177e4
LT
1993 tmp = 0;
1994 }
11d2f63b
FT
1995
1996 spin_lock_irq(&hostdata->lock);
1997 if (!hostdata->connected)
1998 return;
1999
1da177e4
LT
2000 /* Fall through to reject message */
2001
aff0cf9a
FT
2002 /*
2003 * If we get something weird that we aren't expecting,
1da177e4
LT
2004 * reject it.
2005 */
2006 default:
2007 if (!tmp) {
6a6ff4ac 2008 shost_printk(KERN_ERR, instance, "rejecting message ");
1abfd370 2009 spi_print_msg(extended_msg);
1da177e4
LT
2010 printk("\n");
2011 } else if (tmp != EXTENDED_MESSAGE)
017560fc 2012 scmd_printk(KERN_INFO, cmd,
0d2cf867
FT
2013 "rejecting unknown message %02x\n",
2014 tmp);
1da177e4 2015 else
017560fc 2016 scmd_printk(KERN_INFO, cmd,
0d2cf867
FT
2017 "rejecting unknown extended message code %02x, length %d\n",
2018 extended_msg[1], extended_msg[0]);
1da177e4
LT
2019
2020 msgout = MESSAGE_REJECT;
2021 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
2022 break;
0d2cf867 2023 } /* switch (tmp) */
1da177e4
LT
2024 break;
2025 case PHASE_MSGOUT:
2026 len = 1;
2027 data = &msgout;
2028 hostdata->last_message = msgout;
2029 NCR5380_transfer_pio(instance, &phase, &len, &data);
2030 if (msgout == ABORT) {
1da177e4
LT
2031 hostdata->connected = NULL;
2032 cmd->result = DID_ERROR << 16;
677e0194 2033 complete_cmd(instance, cmd);
1da177e4
LT
2034 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
2035 return;
2036 }
2037 msgout = NOP;
2038 break;
2039 case PHASE_CMDOUT:
2040 len = cmd->cmd_len;
2041 data = cmd->cmnd;
aff0cf9a
FT
2042 /*
2043 * XXX for performance reasons, on machines with a
2044 * PSEUDO-DMA architecture we should probably
2045 * use the dma transfer function.
1da177e4
LT
2046 */
2047 NCR5380_transfer_pio(instance, &phase, &len, &data);
1da177e4
LT
2048 break;
2049 case PHASE_STATIN:
2050 len = 1;
2051 data = &tmp;
2052 NCR5380_transfer_pio(instance, &phase, &len, &data);
2053 cmd->SCp.Status = tmp;
2054 break;
2055 default:
6a6ff4ac 2056 shost_printk(KERN_ERR, instance, "unknown phase\n");
4dde8f7d 2057 NCR5380_dprint(NDEBUG_ANY, instance);
0d2cf867 2058 } /* switch(phase) */
686f3990 2059 } else {
11d2f63b 2060 spin_unlock_irq(&hostdata->lock);
686f3990 2061 NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 2062 spin_lock_irq(&hostdata->lock);
1da177e4 2063 }
11d2f63b 2064 }
1da177e4
LT
2065}
2066
2067/*
2068 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2069 *
aff0cf9a 2070 * Purpose : does reselection, initializing the instance->connected
594d4ba3
FT
2071 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2072 * nexus has been reestablished,
aff0cf9a 2073 *
1da177e4 2074 * Inputs : instance - this instance of the NCR5380.
1da177e4
LT
2075 */
2076
0d2cf867
FT
2077static void NCR5380_reselect(struct Scsi_Host *instance)
2078{
e8a60144 2079 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
2080 unsigned char target_mask;
2081 unsigned char lun, phase;
2082 int len;
2083 unsigned char msg[3];
2084 unsigned char *data;
32b26a10
FT
2085 struct NCR5380_cmd *ncmd;
2086 struct scsi_cmnd *tmp;
1da177e4
LT
2087
2088 /*
2089 * Disable arbitration, etc. since the host adapter obviously
2090 * lost, and tell an interrupted NCR5380_select() to restart.
2091 */
2092
2093 NCR5380_write(MODE_REG, MR_BASE);
1da177e4
LT
2094
2095 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
b746545f
FT
2096
2097 dsprintk(NDEBUG_RESELECTION, instance, "reselect\n");
1da177e4 2098
aff0cf9a 2099 /*
1da177e4
LT
2100 * At this point, we have detected that our SCSI ID is on the bus,
2101 * SEL is true and BSY was false for at least one bus settle delay
2102 * (400 ns).
2103 *
2104 * We must assert BSY ourselves, until the target drops the SEL
2105 * signal.
2106 */
2107
2108 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
72064a78
FT
2109 if (NCR5380_poll_politely(instance,
2110 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2111 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2112 return;
2113 }
1da177e4
LT
2114 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2115
2116 /*
2117 * Wait for target to go into MSGIN.
1da177e4
LT
2118 */
2119
1cc160e1 2120 if (NCR5380_poll_politely(instance,
72064a78
FT
2121 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2122 do_abort(instance);
2123 return;
2124 }
1da177e4
LT
2125
2126 len = 1;
2127 data = msg;
2128 phase = PHASE_MSGIN;
2129 NCR5380_transfer_pio(instance, &phase, &len, &data);
2130
72064a78
FT
2131 if (len) {
2132 do_abort(instance);
2133 return;
2134 }
2135
1da177e4 2136 if (!(msg[0] & 0x80)) {
72064a78 2137 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
1abfd370 2138 spi_print_msg(msg);
72064a78
FT
2139 printk("\n");
2140 do_abort(instance);
2141 return;
2142 }
2143 lun = msg[0] & 0x07;
1da177e4 2144
72064a78
FT
2145 /*
2146 * We need to add code for SCSI-II to track which devices have
2147 * I_T_L_Q nexuses established, and which have simple I_T_L
2148 * nexuses so we can chose to do additional data transfer.
2149 */
1da177e4 2150
72064a78
FT
2151 /*
2152 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2153 * just reestablished, and remove it from the disconnected queue.
2154 */
1da177e4 2155
32b26a10
FT
2156 tmp = NULL;
2157 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2158 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2159
2160 if (target_mask == (1 << scmd_id(cmd)) &&
2161 lun == (u8)cmd->device->lun) {
2162 list_del(&ncmd->list);
2163 tmp = cmd;
72064a78 2164 break;
1da177e4
LT
2165 }
2166 }
0d3d9a42
FT
2167
2168 if (tmp) {
2169 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2170 "reselect: removed %p from disconnected queue\n", tmp);
2171 } else {
72064a78
FT
2172 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2173 target_mask, lun);
2174 /*
0d2cf867
FT
2175 * Since we have an established nexus that we can't do anything
2176 * with, we must abort it.
72064a78 2177 */
1da177e4 2178 do_abort(instance);
72064a78 2179 return;
1da177e4 2180 }
72064a78
FT
2181
2182 /* Accept message by clearing ACK */
2183 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2184
2185 hostdata->connected = tmp;
b746545f
FT
2186 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu, tag %d\n",
2187 scmd_id(tmp), tmp->device->lun, tmp->tag);
1da177e4
LT
2188}
2189
2190/*
2191 * Function : void NCR5380_dma_complete (struct Scsi_Host *instance)
2192 *
2193 * Purpose : called by interrupt handler when DMA finishes or a phase
594d4ba3 2194 * mismatch occurs (which would finish the DMA transfer).
1da177e4
LT
2195 *
2196 * Inputs : instance - this instance of the NCR5380.
2197 *
710ddd0d 2198 * Returns : pointer to the scsi_cmnd structure for which the I_T_L
594d4ba3 2199 * nexus has been reestablished, on failure NULL is returned.
1da177e4
LT
2200 */
2201
2202#ifdef REAL_DMA
2203static void NCR5380_dma_complete(NCR5380_instance * instance) {
e8a60144 2204 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 2205 int transferred;
1da177e4
LT
2206
2207 /*
2208 * XXX this might not be right.
2209 *
2210 * Wait for final byte to transfer, ie wait for ACK to go false.
2211 *
aff0cf9a 2212 * We should use the Last Byte Sent bit, unfortunately this is
1da177e4
LT
2213 * not available on the 5380/5381 (only the various CMOS chips)
2214 *
2215 * FIXME: timeout, and need to handle long timeout/irq case
2216 */
2217
2218 NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, BASR_ACK, 0, 5*HZ);
2219
1da177e4
LT
2220 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2221
2222 /*
2223 * The only places we should see a phase mismatch and have to send
2224 * data from the same set of pointers will be the data transfer
2225 * phases. So, residual, requested length are only important here.
2226 */
2227
2228 if (!(hostdata->connected->SCp.phase & SR_CD)) {
2229 transferred = instance->dmalen - NCR5380_dma_residual();
2230 hostdata->connected->SCp.this_residual -= transferred;
2231 hostdata->connected->SCp.ptr += transferred;
2232 }
2233}
2234#endif /* def REAL_DMA */
2235
8b00c3d5
FT
2236/**
2237 * list_find_cmd - test for presence of a command in a linked list
2238 * @haystack: list of commands
2239 * @needle: command to search for
2240 */
2241
2242static bool list_find_cmd(struct list_head *haystack,
2243 struct scsi_cmnd *needle)
2244{
2245 struct NCR5380_cmd *ncmd;
2246
2247 list_for_each_entry(ncmd, haystack, list)
2248 if (NCR5380_to_scmd(ncmd) == needle)
2249 return true;
2250 return false;
2251}
2252
2253/**
2254 * list_remove_cmd - remove a command from linked list
2255 * @haystack: list of commands
2256 * @needle: command to remove
2257 */
2258
2259static bool list_del_cmd(struct list_head *haystack,
2260 struct scsi_cmnd *needle)
2261{
2262 if (list_find_cmd(haystack, needle)) {
2263 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2264
2265 list_del(&ncmd->list);
2266 return true;
2267 }
2268 return false;
2269}
2270
2271/**
2272 * NCR5380_abort - scsi host eh_abort_handler() method
2273 * @cmd: the command to be aborted
2274 *
2275 * Try to abort a given command by removing it from queues and/or sending
2276 * the target an abort message. This may not succeed in causing a target
2277 * to abort the command. Nonetheless, the low-level driver must forget about
2278 * the command because the mid-layer reclaims it and it may be re-issued.
2279 *
2280 * The normal path taken by a command is as follows. For EH we trace this
2281 * same path to locate and abort the command.
2282 *
2283 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2284 * [disconnected -> connected ->]...
2285 * [autosense -> connected ->] done
2286 *
2287 * If cmd is unissued then just remove it.
2288 * If cmd is disconnected, try to select the target.
2289 * If cmd is connected, try to send an abort message.
2290 * If cmd is waiting for autosense, give it a chance to complete but check
2291 * that it isn't left connected.
2292 * If cmd was not found at all then presumably it has already been completed,
2293 * in which case return SUCCESS to try to avoid further EH measures.
2294 * If the command has not completed yet, we must not fail to find it.
1da177e4
LT
2295 */
2296
710ddd0d
FT
2297static int NCR5380_abort(struct scsi_cmnd *cmd)
2298{
1da177e4 2299 struct Scsi_Host *instance = cmd->device->host;
e8a60144 2300 struct NCR5380_hostdata *hostdata = shost_priv(instance);
11d2f63b 2301 unsigned long flags;
8b00c3d5 2302 int result = SUCCESS;
1fa6b5fb 2303
11d2f63b
FT
2304 spin_lock_irqsave(&hostdata->lock, flags);
2305
32b26a10 2306#if (NDEBUG & NDEBUG_ANY)
8b00c3d5 2307 scmd_printk(KERN_INFO, cmd, __func__);
32b26a10 2308#endif
e5c3fddf
FT
2309 NCR5380_dprint(NDEBUG_ANY, instance);
2310 NCR5380_dprint_phase(NDEBUG_ANY, instance);
1da177e4 2311
8b00c3d5
FT
2312 if (list_del_cmd(&hostdata->unissued, cmd)) {
2313 dsprintk(NDEBUG_ABORT, instance,
2314 "abort: removed %p from issue queue\n", cmd);
2315 cmd->result = DID_ABORT << 16;
2316 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
2317 }
2318
707d62b3
FT
2319 if (hostdata->selecting == cmd) {
2320 dsprintk(NDEBUG_ABORT, instance,
2321 "abort: cmd %p == selecting\n", cmd);
2322 hostdata->selecting = NULL;
2323 cmd->result = DID_ABORT << 16;
2324 complete_cmd(instance, cmd);
2325 goto out;
2326 }
2327
8b00c3d5
FT
2328 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2329 dsprintk(NDEBUG_ABORT, instance,
2330 "abort: removed %p from disconnected list\n", cmd);
2331 cmd->result = DID_ERROR << 16;
2332 if (!hostdata->connected)
2333 NCR5380_select(instance, cmd);
2334 if (hostdata->connected != cmd) {
2335 complete_cmd(instance, cmd);
2336 result = FAILED;
2337 goto out;
2338 }
2339 }
2340
2341 if (hostdata->connected == cmd) {
2342 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2343 hostdata->connected = NULL;
2344 if (do_abort(instance)) {
2345 set_host_byte(cmd, DID_ERROR);
2346 complete_cmd(instance, cmd);
2347 result = FAILED;
2348 goto out;
2349 }
2350 set_host_byte(cmd, DID_ABORT);
2351#ifdef REAL_DMA
2352 hostdata->dma_len = 0;
2353#endif
2354 if (cmd->cmnd[0] == REQUEST_SENSE)
2355 complete_cmd(instance, cmd);
2356 else {
2357 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
2358
2359 /* Perform autosense for this command */
2360 list_add(&ncmd->list, &hostdata->autosense);
2361 }
2362 }
2363
2364 if (list_find_cmd(&hostdata->autosense, cmd)) {
2365 dsprintk(NDEBUG_ABORT, instance,
2366 "abort: found %p on sense queue\n", cmd);
2367 spin_unlock_irqrestore(&hostdata->lock, flags);
2368 queue_work(hostdata->work_q, &hostdata->main_task);
2369 msleep(1000);
2370 spin_lock_irqsave(&hostdata->lock, flags);
2371 if (list_del_cmd(&hostdata->autosense, cmd)) {
2372 dsprintk(NDEBUG_ABORT, instance,
2373 "abort: removed %p from sense queue\n", cmd);
2374 set_host_byte(cmd, DID_ABORT);
2375 complete_cmd(instance, cmd);
2376 goto out;
2377 }
2378 }
2379
2380 if (hostdata->connected == cmd) {
2381 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2382 hostdata->connected = NULL;
2383 if (do_abort(instance)) {
2384 set_host_byte(cmd, DID_ERROR);
2385 complete_cmd(instance, cmd);
2386 result = FAILED;
2387 goto out;
2388 }
2389 set_host_byte(cmd, DID_ABORT);
2390#ifdef REAL_DMA
2391 hostdata->dma_len = 0;
2392#endif
2393 complete_cmd(instance, cmd);
2394 }
2395
2396out:
2397 if (result == FAILED)
2398 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2399 else
2400 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2401
2402 queue_work(hostdata->work_q, &hostdata->main_task);
11d2f63b 2403 spin_unlock_irqrestore(&hostdata->lock, flags);
32b26a10 2404
8b00c3d5 2405 return result;
1da177e4
LT
2406}
2407
2408
3be1b3ea
FT
2409/**
2410 * NCR5380_bus_reset - reset the SCSI bus
2411 * @cmd: SCSI command undergoing EH
1da177e4 2412 *
3be1b3ea 2413 * Returns SUCCESS
1da177e4
LT
2414 */
2415
710ddd0d 2416static int NCR5380_bus_reset(struct scsi_cmnd *cmd)
68b3aa7c
JG
2417{
2418 struct Scsi_Host *instance = cmd->device->host;
11d2f63b 2419 struct NCR5380_hostdata *hostdata = shost_priv(instance);
62717f53 2420 int i;
11d2f63b 2421 unsigned long flags;
62717f53 2422 struct NCR5380_cmd *ncmd;
68b3aa7c 2423
11d2f63b 2424 spin_lock_irqsave(&hostdata->lock, flags);
3be1b3ea
FT
2425
2426#if (NDEBUG & NDEBUG_ANY)
62717f53 2427 scmd_printk(KERN_INFO, cmd, __func__);
3be1b3ea 2428#endif
e5c3fddf
FT
2429 NCR5380_dprint(NDEBUG_ANY, instance);
2430 NCR5380_dprint_phase(NDEBUG_ANY, instance);
68b3aa7c 2431
68b3aa7c 2432 do_reset(instance);
3be1b3ea 2433
62717f53
FT
2434 /* reset NCR registers */
2435 NCR5380_write(MODE_REG, MR_BASE);
2436 NCR5380_write(TARGET_COMMAND_REG, 0);
2437 NCR5380_write(SELECT_ENABLE_REG, 0);
2438
2439 /* After the reset, there are no more connected or disconnected commands
2440 * and no busy units; so clear the low-level status here to avoid
2441 * conflicts when the mid-level code tries to wake up the affected
2442 * commands!
2443 */
2444
2445 hostdata->selecting = NULL;
2446
2447 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2448 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2449
2450 set_host_byte(cmd, DID_RESET);
2451 cmd->scsi_done(cmd);
2452 }
2453
2454 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2455 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2456
2457 set_host_byte(cmd, DID_RESET);
2458 cmd->scsi_done(cmd);
2459 }
2460
2461 if (hostdata->connected) {
2462 set_host_byte(hostdata->connected, DID_RESET);
2463 complete_cmd(instance, hostdata->connected);
2464 hostdata->connected = NULL;
2465 }
2466
2467 if (hostdata->sensing) {
2468 set_host_byte(hostdata->connected, DID_RESET);
2469 complete_cmd(instance, hostdata->sensing);
2470 hostdata->sensing = NULL;
2471 }
2472
2473 for (i = 0; i < 8; ++i)
2474 hostdata->busy[i] = 0;
2475#ifdef REAL_DMA
2476 hostdata->dma_len = 0;
2477#endif
2478
2479 queue_work(hostdata->work_q, &hostdata->main_task);
11d2f63b 2480 spin_unlock_irqrestore(&hostdata->lock, flags);
1da177e4 2481
1da177e4
LT
2482 return SUCCESS;
2483}