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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
aff0cf9a | 2 | /* |
1da177e4 | 3 | * NCR 5380 generic driver routines. These should make it *trivial* |
594d4ba3 FT |
4 | * to implement 5380 SCSI drivers under Linux with a non-trantor |
5 | * architecture. | |
1da177e4 | 6 | * |
594d4ba3 | 7 | * Note that these routines also work with NR53c400 family chips. |
1da177e4 LT |
8 | * |
9 | * Copyright 1993, Drew Eckhardt | |
594d4ba3 FT |
10 | * Visionary Computing |
11 | * (Unix and Linux consulting and custom programming) | |
12 | * drew@colorado.edu | |
13 | * +1 (303) 666-5836 | |
1da177e4 | 14 | * |
aff0cf9a | 15 | * For more information, please consult |
1da177e4 LT |
16 | * |
17 | * NCR 5380 Family | |
18 | * SCSI Protocol Controller | |
19 | * Databook | |
20 | * | |
21 | * NCR Microelectronics | |
22 | * 1635 Aeroplaza Drive | |
23 | * Colorado Springs, CO 80916 | |
24 | * 1+ (719) 578-3400 | |
25 | * 1+ (800) 334-5454 | |
26 | */ | |
27 | ||
28 | /* | |
c16df32e FT |
29 | * With contributions from Ray Van Tassle, Ingmar Baumgart, |
30 | * Ronald van Cuijlenborg, Alan Cox and others. | |
1da177e4 LT |
31 | */ |
32 | ||
52d3e561 FT |
33 | /* Ported to Atari by Roman Hodek and others. */ |
34 | ||
e9db3198 FT |
35 | /* Adapted for the Sun 3 by Sam Creasey. */ |
36 | ||
1da177e4 LT |
37 | /* |
38 | * Design | |
39 | * | |
aff0cf9a | 40 | * This is a generic 5380 driver. To use it on a different platform, |
1da177e4 | 41 | * one simply writes appropriate system specific macros (ie, data |
aff0cf9a | 42 | * transfer - some PC's will use the I/O bus, 68K's must use |
1da177e4 LT |
43 | * memory mapped) and drops this file in their 'C' wrapper. |
44 | * | |
aff0cf9a | 45 | * As far as command queueing, two queues are maintained for |
1da177e4 | 46 | * each 5380 in the system - commands that haven't been issued yet, |
aff0cf9a FT |
47 | * and commands that are currently executing. This means that an |
48 | * unlimited number of commands may be queued, letting | |
49 | * more commands propagate from the higher driver levels giving higher | |
50 | * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, | |
51 | * allowing multiple commands to propagate all the way to a SCSI-II device | |
1da177e4 LT |
52 | * while a command is already executing. |
53 | * | |
54 | * | |
aff0cf9a | 55 | * Issues specific to the NCR5380 : |
1da177e4 | 56 | * |
aff0cf9a FT |
57 | * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead |
58 | * piece of hardware that requires you to sit in a loop polling for | |
59 | * the REQ signal as long as you are connected. Some devices are | |
60 | * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect | |
686f3990 | 61 | * while doing long seek operations. [...] These |
1da177e4 LT |
62 | * broken devices are the exception rather than the rule and I'd rather |
63 | * spend my time optimizing for the normal case. | |
64 | * | |
65 | * Architecture : | |
66 | * | |
67 | * At the heart of the design is a coroutine, NCR5380_main, | |
68 | * which is started from a workqueue for each NCR5380 host in the | |
69 | * system. It attempts to establish I_T_L or I_T_L_Q nexuses by | |
70 | * removing the commands from the issue queue and calling | |
aff0cf9a | 71 | * NCR5380_select() if a nexus is not established. |
1da177e4 LT |
72 | * |
73 | * Once a nexus is established, the NCR5380_information_transfer() | |
74 | * phase goes through the various phases as instructed by the target. | |
75 | * if the target goes into MSG IN and sends a DISCONNECT message, | |
76 | * the command structure is placed into the per instance disconnected | |
aff0cf9a | 77 | * queue, and NCR5380_main tries to find more work. If the target is |
1da177e4 LT |
78 | * idle for too long, the system will try to sleep. |
79 | * | |
80 | * If a command has disconnected, eventually an interrupt will trigger, | |
81 | * calling NCR5380_intr() which will in turn call NCR5380_reselect | |
82 | * to reestablish a nexus. This will run main if necessary. | |
83 | * | |
aff0cf9a | 84 | * On command termination, the done function will be called as |
1da177e4 LT |
85 | * appropriate. |
86 | * | |
ff1269cb | 87 | * The command data pointer is initialized after the command is connected |
1da177e4 LT |
88 | * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. |
89 | * Note that in violation of the standard, an implicit SAVE POINTERS operation | |
90 | * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. | |
91 | */ | |
92 | ||
93 | /* | |
94 | * Using this file : | |
95 | * This file a skeleton Linux SCSI driver for the NCR 5380 series | |
aff0cf9a | 96 | * of chips. To use it, you write an architecture specific functions |
1da177e4 LT |
97 | * and macros and include this file in your driver. |
98 | * | |
1da177e4 | 99 | * These macros MUST be defined : |
aff0cf9a | 100 | * |
1da177e4 LT |
101 | * NCR5380_read(register) - read from the specified register |
102 | * | |
aff0cf9a | 103 | * NCR5380_write(register, value) - write to the specific register |
1da177e4 | 104 | * |
aff0cf9a | 105 | * NCR5380_implementation_fields - additional fields needed for this |
594d4ba3 | 106 | * specific implementation of the NCR5380 |
1da177e4 LT |
107 | * |
108 | * Either real DMA *or* pseudo DMA may be implemented | |
1da177e4 | 109 | * |
4a98f896 FT |
110 | * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer |
111 | * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380 | |
112 | * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory | |
113 | * NCR5380_dma_residual - residual byte count | |
1da177e4 | 114 | * |
1da177e4 | 115 | * The generic driver is initialized by calling NCR5380_init(instance), |
906e4a3c | 116 | * after setting the appropriate host specific fields and ID. |
1da177e4 LT |
117 | */ |
118 | ||
e5d55d1a FT |
119 | #ifndef NCR5380_io_delay |
120 | #define NCR5380_io_delay(x) | |
121 | #endif | |
122 | ||
52d3e561 FT |
123 | #ifndef NCR5380_acquire_dma_irq |
124 | #define NCR5380_acquire_dma_irq(x) (1) | |
125 | #endif | |
126 | ||
127 | #ifndef NCR5380_release_dma_irq | |
128 | #define NCR5380_release_dma_irq(x) | |
129 | #endif | |
130 | ||
0b7a2235 FT |
131 | static unsigned int disconnect_mask = ~0; |
132 | module_param(disconnect_mask, int, 0444); | |
133 | ||
e7734ef1 | 134 | static int do_abort(struct Scsi_Host *, unsigned int); |
54d8fe44 | 135 | static void do_reset(struct Scsi_Host *); |
6b0e87a6 | 136 | static void bus_reset_cleanup(struct Scsi_Host *); |
1da177e4 | 137 | |
c16df32e | 138 | /** |
0d2cf867 | 139 | * initialize_SCp - init the scsi pointer field |
594d4ba3 | 140 | * @cmd: command block to set up |
1da177e4 | 141 | * |
594d4ba3 | 142 | * Set up the internal fields in the SCSI command. |
1da177e4 LT |
143 | */ |
144 | ||
710ddd0d | 145 | static inline void initialize_SCp(struct scsi_cmnd *cmd) |
1da177e4 | 146 | { |
ff1269cb | 147 | struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd); |
1da177e4 | 148 | |
9e0fe44d | 149 | if (scsi_bufflen(cmd)) { |
ff1269cb FT |
150 | ncmd->buffer = scsi_sglist(cmd); |
151 | ncmd->ptr = sg_virt(ncmd->buffer); | |
152 | ncmd->this_residual = ncmd->buffer->length; | |
1da177e4 | 153 | } else { |
ff1269cb FT |
154 | ncmd->buffer = NULL; |
155 | ncmd->ptr = NULL; | |
156 | ncmd->this_residual = 0; | |
1da177e4 | 157 | } |
f27db8eb | 158 | |
ff1269cb FT |
159 | ncmd->status = 0; |
160 | ncmd->message = 0; | |
1da177e4 LT |
161 | } |
162 | ||
ff1269cb | 163 | static inline void advance_sg_buffer(struct NCR5380_cmd *ncmd) |
0e9fdd2b | 164 | { |
ff1269cb | 165 | struct scatterlist *s = ncmd->buffer; |
0e9fdd2b | 166 | |
ff1269cb FT |
167 | if (!ncmd->this_residual && s && !sg_is_last(s)) { |
168 | ncmd->buffer = sg_next(s); | |
169 | ncmd->ptr = sg_virt(ncmd->buffer); | |
170 | ncmd->this_residual = ncmd->buffer->length; | |
0e9fdd2b FT |
171 | } |
172 | } | |
173 | ||
350767f2 FT |
174 | static inline void set_resid_from_SCp(struct scsi_cmnd *cmd) |
175 | { | |
ff1269cb FT |
176 | struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd); |
177 | int resid = ncmd->this_residual; | |
178 | struct scatterlist *s = ncmd->buffer; | |
350767f2 FT |
179 | |
180 | if (s) | |
181 | while (!sg_is_last(s)) { | |
182 | s = sg_next(s); | |
183 | resid += s->length; | |
184 | } | |
185 | scsi_set_resid(cmd, resid); | |
186 | } | |
187 | ||
1da177e4 | 188 | /** |
b32ade12 | 189 | * NCR5380_poll_politely2 - wait for two chip register values |
d5d37a0a | 190 | * @hostdata: host private data |
b32ade12 FT |
191 | * @reg1: 5380 register to poll |
192 | * @bit1: Bitmask to check | |
193 | * @val1: Expected value | |
194 | * @reg2: Second 5380 register to poll | |
195 | * @bit2: Second bitmask to check | |
196 | * @val2: Second expected value | |
e7734ef1 | 197 | * @wait: Time-out in jiffies, 0 if sleeping is not allowed |
2f854b82 FT |
198 | * |
199 | * Polls the chip in a reasonably efficient manner waiting for an | |
200 | * event to occur. After a short quick poll we begin to yield the CPU | |
201 | * (if possible). In irq contexts the time-out is arbitrarily limited. | |
202 | * Callers may hold locks as long as they are held in irq mode. | |
203 | * | |
b32ade12 | 204 | * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. |
1da177e4 | 205 | */ |
2f854b82 | 206 | |
d5d37a0a | 207 | static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata, |
61e1ce58 FT |
208 | unsigned int reg1, u8 bit1, u8 val1, |
209 | unsigned int reg2, u8 bit2, u8 val2, | |
210 | unsigned long wait) | |
1da177e4 | 211 | { |
d4408dd7 | 212 | unsigned long n = hostdata->poll_loops; |
2f854b82 | 213 | unsigned long deadline = jiffies + wait; |
2f854b82 | 214 | |
2f854b82 | 215 | do { |
b32ade12 FT |
216 | if ((NCR5380_read(reg1) & bit1) == val1) |
217 | return 0; | |
218 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 LT |
219 | return 0; |
220 | cpu_relax(); | |
2f854b82 FT |
221 | } while (n--); |
222 | ||
e7734ef1 | 223 | if (!wait) |
2f854b82 FT |
224 | return -ETIMEDOUT; |
225 | ||
226 | /* Repeatedly sleep for 1 ms until deadline */ | |
227 | while (time_is_after_jiffies(deadline)) { | |
228 | schedule_timeout_uninterruptible(1); | |
b32ade12 FT |
229 | if ((NCR5380_read(reg1) & bit1) == val1) |
230 | return 0; | |
231 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 | 232 | return 0; |
1da177e4 | 233 | } |
2f854b82 | 234 | |
1da177e4 LT |
235 | return -ETIMEDOUT; |
236 | } | |
237 | ||
185a7a1c | 238 | #if NDEBUG |
1da177e4 LT |
239 | static struct { |
240 | unsigned char mask; | |
241 | const char *name; | |
aff0cf9a FT |
242 | } signals[] = { |
243 | {SR_DBP, "PARITY"}, | |
244 | {SR_RST, "RST"}, | |
245 | {SR_BSY, "BSY"}, | |
246 | {SR_REQ, "REQ"}, | |
247 | {SR_MSG, "MSG"}, | |
248 | {SR_CD, "CD"}, | |
249 | {SR_IO, "IO"}, | |
250 | {SR_SEL, "SEL"}, | |
1da177e4 | 251 | {0, NULL} |
aff0cf9a | 252 | }, |
1da177e4 | 253 | basrs[] = { |
12866b99 FT |
254 | {BASR_END_DMA_TRANSFER, "END OF DMA"}, |
255 | {BASR_DRQ, "DRQ"}, | |
256 | {BASR_PARITY_ERROR, "PARITY ERROR"}, | |
257 | {BASR_IRQ, "IRQ"}, | |
258 | {BASR_PHASE_MATCH, "PHASE MATCH"}, | |
259 | {BASR_BUSY_ERROR, "BUSY ERROR"}, | |
aff0cf9a FT |
260 | {BASR_ATN, "ATN"}, |
261 | {BASR_ACK, "ACK"}, | |
1da177e4 | 262 | {0, NULL} |
aff0cf9a FT |
263 | }, |
264 | icrs[] = { | |
265 | {ICR_ASSERT_RST, "ASSERT RST"}, | |
12866b99 FT |
266 | {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"}, |
267 | {ICR_ARBITRATION_LOST, "LOST ARB."}, | |
aff0cf9a FT |
268 | {ICR_ASSERT_ACK, "ASSERT ACK"}, |
269 | {ICR_ASSERT_BSY, "ASSERT BSY"}, | |
270 | {ICR_ASSERT_SEL, "ASSERT SEL"}, | |
271 | {ICR_ASSERT_ATN, "ASSERT ATN"}, | |
272 | {ICR_ASSERT_DATA, "ASSERT DATA"}, | |
1da177e4 | 273 | {0, NULL} |
aff0cf9a FT |
274 | }, |
275 | mrs[] = { | |
12866b99 FT |
276 | {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"}, |
277 | {MR_TARGET, "TARGET"}, | |
278 | {MR_ENABLE_PAR_CHECK, "PARITY CHECK"}, | |
279 | {MR_ENABLE_PAR_INTR, "PARITY INTR"}, | |
280 | {MR_ENABLE_EOP_INTR, "EOP INTR"}, | |
281 | {MR_MONITOR_BSY, "MONITOR BSY"}, | |
282 | {MR_DMA_MODE, "DMA MODE"}, | |
283 | {MR_ARBITRATE, "ARBITRATE"}, | |
1da177e4 LT |
284 | {0, NULL} |
285 | }; | |
286 | ||
287 | /** | |
0d2cf867 FT |
288 | * NCR5380_print - print scsi bus signals |
289 | * @instance: adapter state to dump | |
1da177e4 | 290 | * |
594d4ba3 | 291 | * Print the SCSI bus signals for debugging purposes |
1da177e4 LT |
292 | */ |
293 | ||
294 | static void NCR5380_print(struct Scsi_Host *instance) | |
295 | { | |
61e1ce58 | 296 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
8cee3e16 | 297 | unsigned char status, basr, mr, icr, i; |
1da177e4 | 298 | |
1da177e4 LT |
299 | status = NCR5380_read(STATUS_REG); |
300 | mr = NCR5380_read(MODE_REG); | |
301 | icr = NCR5380_read(INITIATOR_COMMAND_REG); | |
302 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
303 | ||
12866b99 | 304 | printk(KERN_DEBUG "SR = 0x%02x : ", status); |
1da177e4 LT |
305 | for (i = 0; signals[i].mask; ++i) |
306 | if (status & signals[i].mask) | |
12866b99 FT |
307 | printk(KERN_CONT "%s, ", signals[i].name); |
308 | printk(KERN_CONT "\nBASR = 0x%02x : ", basr); | |
1da177e4 LT |
309 | for (i = 0; basrs[i].mask; ++i) |
310 | if (basr & basrs[i].mask) | |
12866b99 FT |
311 | printk(KERN_CONT "%s, ", basrs[i].name); |
312 | printk(KERN_CONT "\nICR = 0x%02x : ", icr); | |
1da177e4 LT |
313 | for (i = 0; icrs[i].mask; ++i) |
314 | if (icr & icrs[i].mask) | |
12866b99 FT |
315 | printk(KERN_CONT "%s, ", icrs[i].name); |
316 | printk(KERN_CONT "\nMR = 0x%02x : ", mr); | |
1da177e4 LT |
317 | for (i = 0; mrs[i].mask; ++i) |
318 | if (mr & mrs[i].mask) | |
12866b99 FT |
319 | printk(KERN_CONT "%s, ", mrs[i].name); |
320 | printk(KERN_CONT "\n"); | |
1da177e4 LT |
321 | } |
322 | ||
0d2cf867 FT |
323 | static struct { |
324 | unsigned char value; | |
325 | const char *name; | |
326 | } phases[] = { | |
327 | {PHASE_DATAOUT, "DATAOUT"}, | |
328 | {PHASE_DATAIN, "DATAIN"}, | |
329 | {PHASE_CMDOUT, "CMDOUT"}, | |
330 | {PHASE_STATIN, "STATIN"}, | |
331 | {PHASE_MSGOUT, "MSGOUT"}, | |
332 | {PHASE_MSGIN, "MSGIN"}, | |
333 | {PHASE_UNKNOWN, "UNKNOWN"} | |
334 | }; | |
1da177e4 | 335 | |
c16df32e | 336 | /** |
0d2cf867 | 337 | * NCR5380_print_phase - show SCSI phase |
594d4ba3 | 338 | * @instance: adapter to dump |
1da177e4 | 339 | * |
594d4ba3 | 340 | * Print the current SCSI phase for debugging purposes |
1da177e4 LT |
341 | */ |
342 | ||
343 | static void NCR5380_print_phase(struct Scsi_Host *instance) | |
344 | { | |
61e1ce58 | 345 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
346 | unsigned char status; |
347 | int i; | |
1da177e4 LT |
348 | |
349 | status = NCR5380_read(STATUS_REG); | |
350 | if (!(status & SR_REQ)) | |
6a6ff4ac | 351 | shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); |
1da177e4 | 352 | else { |
0d2cf867 FT |
353 | for (i = 0; (phases[i].value != PHASE_UNKNOWN) && |
354 | (phases[i].value != (status & PHASE_MASK)); ++i) | |
355 | ; | |
6a6ff4ac | 356 | shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); |
1da177e4 LT |
357 | } |
358 | } | |
359 | #endif | |
360 | ||
1da177e4 | 361 | /** |
09028461 | 362 | * NCR5380_info - report driver and host information |
594d4ba3 | 363 | * @instance: relevant scsi host instance |
1da177e4 | 364 | * |
594d4ba3 | 365 | * For use as the host template info() handler. |
1da177e4 LT |
366 | */ |
367 | ||
8c32513b | 368 | static const char *NCR5380_info(struct Scsi_Host *instance) |
1da177e4 | 369 | { |
8c32513b FT |
370 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
371 | ||
372 | return hostdata->info; | |
373 | } | |
374 | ||
1da177e4 | 375 | /** |
0d2cf867 | 376 | * NCR5380_init - initialise an NCR5380 |
594d4ba3 FT |
377 | * @instance: adapter to configure |
378 | * @flags: control flags | |
1da177e4 | 379 | * |
594d4ba3 FT |
380 | * Initializes *instance and corresponding 5380 chip, |
381 | * with flags OR'd into the initial flags value. | |
1da177e4 | 382 | * |
594d4ba3 | 383 | * Notes : I assume that the host, hostno, and id bits have been |
0d2cf867 | 384 | * set correctly. I don't care about the irq and other fields. |
1da177e4 | 385 | * |
594d4ba3 | 386 | * Returns 0 for success |
1da177e4 LT |
387 | */ |
388 | ||
6f039790 | 389 | static int NCR5380_init(struct Scsi_Host *instance, int flags) |
1da177e4 | 390 | { |
e8a60144 | 391 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 392 | int i; |
2f854b82 | 393 | unsigned long deadline; |
d4408dd7 | 394 | unsigned long accesses_per_ms; |
1da177e4 | 395 | |
ae5e33af FT |
396 | instance->max_lun = 7; |
397 | ||
0d2cf867 | 398 | hostdata->host = instance; |
1da177e4 | 399 | hostdata->id_mask = 1 << instance->this_id; |
0d2cf867 | 400 | hostdata->id_higher_mask = 0; |
1da177e4 LT |
401 | for (i = hostdata->id_mask; i <= 0x80; i <<= 1) |
402 | if (i > hostdata->id_mask) | |
403 | hostdata->id_higher_mask |= i; | |
404 | for (i = 0; i < 8; ++i) | |
405 | hostdata->busy[i] = 0; | |
e4dec680 FT |
406 | hostdata->dma_len = 0; |
407 | ||
11d2f63b | 408 | spin_lock_init(&hostdata->lock); |
1da177e4 | 409 | hostdata->connected = NULL; |
f27db8eb FT |
410 | hostdata->sensing = NULL; |
411 | INIT_LIST_HEAD(&hostdata->autosense); | |
32b26a10 FT |
412 | INIT_LIST_HEAD(&hostdata->unissued); |
413 | INIT_LIST_HEAD(&hostdata->disconnected); | |
414 | ||
55181be8 | 415 | hostdata->flags = flags; |
aff0cf9a | 416 | |
8d8601a7 | 417 | INIT_WORK(&hostdata->main_task, NCR5380_main); |
0ad0eff9 FT |
418 | hostdata->work_q = alloc_workqueue("ncr5380_%d", |
419 | WQ_UNBOUND | WQ_MEM_RECLAIM, | |
6f640df1 | 420 | 0, instance->host_no); |
0ad0eff9 FT |
421 | if (!hostdata->work_q) |
422 | return -ENOMEM; | |
423 | ||
09028461 FT |
424 | snprintf(hostdata->info, sizeof(hostdata->info), |
425 | "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}", | |
426 | instance->hostt->name, instance->irq, hostdata->io_port, | |
427 | hostdata->base, instance->can_queue, instance->cmd_per_lun, | |
428 | instance->sg_tablesize, instance->this_id, | |
429 | hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "", | |
430 | hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", | |
431 | hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : ""); | |
8c32513b | 432 | |
1da177e4 LT |
433 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
434 | NCR5380_write(MODE_REG, MR_BASE); | |
435 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
436 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2f854b82 FT |
437 | |
438 | /* Calibrate register polling loop */ | |
439 | i = 0; | |
440 | deadline = jiffies + 1; | |
441 | do { | |
442 | cpu_relax(); | |
443 | } while (time_is_after_jiffies(deadline)); | |
444 | deadline += msecs_to_jiffies(256); | |
445 | do { | |
446 | NCR5380_read(STATUS_REG); | |
447 | ++i; | |
448 | cpu_relax(); | |
449 | } while (time_is_after_jiffies(deadline)); | |
d4408dd7 FT |
450 | accesses_per_ms = i / 256; |
451 | hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2; | |
2f854b82 | 452 | |
b6488f97 FT |
453 | return 0; |
454 | } | |
1da177e4 | 455 | |
b6488f97 FT |
456 | /** |
457 | * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. | |
458 | * @instance: adapter to check | |
459 | * | |
460 | * If the system crashed, it may have crashed with a connected target and | |
461 | * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the | |
462 | * currently established nexus, which we know nothing about. Failing that | |
463 | * do a bus reset. | |
464 | * | |
465 | * Note that a bus reset will cause the chip to assert IRQ. | |
466 | * | |
467 | * Returns 0 if successful, otherwise -ENXIO. | |
468 | */ | |
469 | ||
470 | static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) | |
471 | { | |
9c3f0e2b | 472 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 473 | int pass; |
1da177e4 LT |
474 | |
475 | for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { | |
476 | switch (pass) { | |
477 | case 1: | |
478 | case 3: | |
479 | case 5: | |
636b1ec8 | 480 | shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); |
d5d37a0a | 481 | NCR5380_poll_politely(hostdata, |
636b1ec8 | 482 | STATUS_REG, SR_BSY, 0, 5 * HZ); |
1da177e4 LT |
483 | break; |
484 | case 2: | |
636b1ec8 | 485 | shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); |
e7734ef1 | 486 | do_abort(instance, 1); |
1da177e4 LT |
487 | break; |
488 | case 4: | |
636b1ec8 | 489 | shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); |
1da177e4 | 490 | do_reset(instance); |
9c3f0e2b FT |
491 | /* Wait after a reset; the SCSI standard calls for |
492 | * 250ms, we wait 500ms to be on the safe side. | |
493 | * But some Toshiba CD-ROMs need ten times that. | |
494 | */ | |
495 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) | |
496 | msleep(2500); | |
497 | else | |
498 | msleep(500); | |
1da177e4 LT |
499 | break; |
500 | case 6: | |
636b1ec8 | 501 | shost_printk(KERN_ERR, instance, "bus locked solid\n"); |
1da177e4 LT |
502 | return -ENXIO; |
503 | } | |
504 | } | |
505 | return 0; | |
506 | } | |
507 | ||
508 | /** | |
0d2cf867 | 509 | * NCR5380_exit - remove an NCR5380 |
594d4ba3 | 510 | * @instance: adapter to remove |
0d2cf867 FT |
511 | * |
512 | * Assumes that no more work can be queued (e.g. by NCR5380_intr). | |
1da177e4 LT |
513 | */ |
514 | ||
a43cf0f3 | 515 | static void NCR5380_exit(struct Scsi_Host *instance) |
1da177e4 | 516 | { |
e8a60144 | 517 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 518 | |
8d8601a7 | 519 | cancel_work_sync(&hostdata->main_task); |
0ad0eff9 | 520 | destroy_workqueue(hostdata->work_q); |
1da177e4 LT |
521 | } |
522 | ||
677e0194 FT |
523 | /** |
524 | * complete_cmd - finish processing a command and return it to the SCSI ML | |
525 | * @instance: the host instance | |
526 | * @cmd: command to complete | |
527 | */ | |
528 | ||
529 | static void complete_cmd(struct Scsi_Host *instance, | |
530 | struct scsi_cmnd *cmd) | |
531 | { | |
532 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
533 | ||
534 | dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); | |
535 | ||
f27db8eb FT |
536 | if (hostdata->sensing == cmd) { |
537 | /* Autosense processing ends here */ | |
3d45cefc | 538 | if (get_status_byte(cmd) != SAM_STAT_GOOD) { |
f27db8eb | 539 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); |
07035651 | 540 | } else { |
f27db8eb | 541 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); |
464a00c9 | 542 | set_status_byte(cmd, SAM_STAT_CHECK_CONDITION); |
07035651 | 543 | } |
f27db8eb FT |
544 | hostdata->sensing = NULL; |
545 | } | |
546 | ||
117cd238 | 547 | scsi_done(cmd); |
677e0194 FT |
548 | } |
549 | ||
1da177e4 | 550 | /** |
1bb40589 FT |
551 | * NCR5380_queue_command - queue a command |
552 | * @instance: the relevant SCSI adapter | |
553 | * @cmd: SCSI command | |
1da177e4 | 554 | * |
1bb40589 FT |
555 | * cmd is added to the per-instance issue queue, with minor |
556 | * twiddling done to the host specific fields of cmd. If the | |
557 | * main coroutine is not running, it is restarted. | |
1da177e4 LT |
558 | */ |
559 | ||
1bb40589 FT |
560 | static int NCR5380_queue_command(struct Scsi_Host *instance, |
561 | struct scsi_cmnd *cmd) | |
1da177e4 | 562 | { |
1bb40589 | 563 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
ff1269cb | 564 | struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd); |
1bb40589 | 565 | unsigned long flags; |
1da177e4 LT |
566 | |
567 | #if (NDEBUG & NDEBUG_NO_WRITE) | |
568 | switch (cmd->cmnd[0]) { | |
569 | case WRITE_6: | |
570 | case WRITE_10: | |
dbb6b350 | 571 | shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); |
1da177e4 | 572 | cmd->result = (DID_ERROR << 16); |
117cd238 | 573 | scsi_done(cmd); |
1da177e4 LT |
574 | return 0; |
575 | } | |
0d2cf867 | 576 | #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ |
1da177e4 | 577 | |
1da177e4 LT |
578 | cmd->result = 0; |
579 | ||
11d2f63b | 580 | spin_lock_irqsave(&hostdata->lock, flags); |
1bb40589 | 581 | |
03fe6a64 FT |
582 | if (!NCR5380_acquire_dma_irq(instance)) { |
583 | spin_unlock_irqrestore(&hostdata->lock, flags); | |
584 | ||
585 | return SCSI_MLQUEUE_HOST_BUSY; | |
586 | } | |
587 | ||
aff0cf9a FT |
588 | /* |
589 | * Insert the cmd into the issue queue. Note that REQUEST SENSE | |
1da177e4 | 590 | * commands are added to the head of the queue since any command will |
aff0cf9a | 591 | * clear the contingent allegiance condition that exists and the |
1da177e4 LT |
592 | * sense data is only guaranteed to be valid while the condition exists. |
593 | */ | |
594 | ||
32b26a10 FT |
595 | if (cmd->cmnd[0] == REQUEST_SENSE) |
596 | list_add(&ncmd->list, &hostdata->unissued); | |
597 | else | |
598 | list_add_tail(&ncmd->list, &hostdata->unissued); | |
599 | ||
11d2f63b | 600 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1bb40589 | 601 | |
dbb6b350 FT |
602 | dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", |
603 | cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); | |
1da177e4 | 604 | |
1da177e4 | 605 | /* Kick off command processing */ |
8d8601a7 | 606 | queue_work(hostdata->work_q, &hostdata->main_task); |
1da177e4 LT |
607 | return 0; |
608 | } | |
609 | ||
52d3e561 FT |
610 | static inline void maybe_release_dma_irq(struct Scsi_Host *instance) |
611 | { | |
612 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
613 | ||
614 | /* Caller does the locking needed to set & test these data atomically */ | |
615 | if (list_empty(&hostdata->disconnected) && | |
616 | list_empty(&hostdata->unissued) && | |
617 | list_empty(&hostdata->autosense) && | |
618 | !hostdata->connected && | |
4ab2a787 | 619 | !hostdata->selecting) { |
52d3e561 | 620 | NCR5380_release_dma_irq(instance); |
4ab2a787 | 621 | } |
52d3e561 FT |
622 | } |
623 | ||
f27db8eb FT |
624 | /** |
625 | * dequeue_next_cmd - dequeue a command for processing | |
626 | * @instance: the scsi host instance | |
627 | * | |
628 | * Priority is given to commands on the autosense queue. These commands | |
629 | * need autosense because of a CHECK CONDITION result. | |
630 | * | |
631 | * Returns a command pointer if a command is found for a target that is | |
632 | * not already busy. Otherwise returns NULL. | |
633 | */ | |
634 | ||
635 | static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) | |
636 | { | |
637 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
638 | struct NCR5380_cmd *ncmd; | |
639 | struct scsi_cmnd *cmd; | |
640 | ||
8d5dbec3 | 641 | if (hostdata->sensing || list_empty(&hostdata->autosense)) { |
f27db8eb FT |
642 | list_for_each_entry(ncmd, &hostdata->unissued, list) { |
643 | cmd = NCR5380_to_scmd(ncmd); | |
644 | dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", | |
645 | cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); | |
646 | ||
647 | if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { | |
648 | list_del(&ncmd->list); | |
649 | dsprintk(NDEBUG_QUEUES, instance, | |
650 | "dequeue: removed %p from issue queue\n", cmd); | |
651 | return cmd; | |
652 | } | |
653 | } | |
654 | } else { | |
655 | /* Autosense processing begins here */ | |
656 | ncmd = list_first_entry(&hostdata->autosense, | |
657 | struct NCR5380_cmd, list); | |
658 | list_del(&ncmd->list); | |
659 | cmd = NCR5380_to_scmd(ncmd); | |
660 | dsprintk(NDEBUG_QUEUES, instance, | |
661 | "dequeue: removed %p from autosense queue\n", cmd); | |
662 | scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); | |
663 | hostdata->sensing = cmd; | |
664 | return cmd; | |
665 | } | |
666 | return NULL; | |
667 | } | |
668 | ||
669 | static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) | |
670 | { | |
671 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
ff1269cb | 672 | struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd); |
f27db8eb | 673 | |
8d5dbec3 | 674 | if (hostdata->sensing == cmd) { |
f27db8eb FT |
675 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); |
676 | list_add(&ncmd->list, &hostdata->autosense); | |
677 | hostdata->sensing = NULL; | |
678 | } else | |
679 | list_add(&ncmd->list, &hostdata->unissued); | |
680 | } | |
681 | ||
1da177e4 | 682 | /** |
0d2cf867 | 683 | * NCR5380_main - NCR state machines |
1da177e4 | 684 | * |
594d4ba3 FT |
685 | * NCR5380_main is a coroutine that runs as long as more work can |
686 | * be done on the NCR5380 host adapters in a system. Both | |
687 | * NCR5380_queue_command() and NCR5380_intr() will try to start it | |
688 | * in case it is not running. | |
1da177e4 LT |
689 | */ |
690 | ||
c4028958 | 691 | static void NCR5380_main(struct work_struct *work) |
1da177e4 | 692 | { |
c4028958 | 693 | struct NCR5380_hostdata *hostdata = |
8d8601a7 | 694 | container_of(work, struct NCR5380_hostdata, main_task); |
1da177e4 | 695 | struct Scsi_Host *instance = hostdata->host; |
1da177e4 | 696 | int done; |
aff0cf9a | 697 | |
1da177e4 | 698 | do { |
1da177e4 | 699 | done = 1; |
11d2f63b | 700 | |
0a4e3612 | 701 | spin_lock_irq(&hostdata->lock); |
ccf6efd7 FT |
702 | while (!hostdata->connected && !hostdata->selecting) { |
703 | struct scsi_cmnd *cmd = dequeue_next_cmd(instance); | |
704 | ||
705 | if (!cmd) | |
706 | break; | |
1da177e4 | 707 | |
f27db8eb | 708 | dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); |
76f13b93 | 709 | |
f27db8eb FT |
710 | /* |
711 | * Attempt to establish an I_T_L nexus here. | |
712 | * On success, instance->hostdata->connected is set. | |
713 | * On failure, we must add the command back to the | |
714 | * issue queue so we can keep trying. | |
715 | */ | |
716 | /* | |
717 | * REQUEST SENSE commands are issued without tagged | |
718 | * queueing, even on SCSI-II devices because the | |
719 | * contingent allegiance condition exists for the | |
720 | * entire unit. | |
721 | */ | |
11d2f63b | 722 | |
ccf6efd7 | 723 | if (!NCR5380_select(instance, cmd)) { |
707d62b3 | 724 | dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); |
f27db8eb FT |
725 | } else { |
726 | dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, | |
727 | "main: select failed, returning %p to queue\n", cmd); | |
728 | requeue_cmd(instance, cmd); | |
729 | } | |
730 | } | |
e4dec680 | 731 | if (hostdata->connected && !hostdata->dma_len) { |
b746545f | 732 | dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); |
1da177e4 | 733 | NCR5380_information_transfer(instance); |
1da177e4 | 734 | done = 0; |
1d3db59d | 735 | } |
bdd1cc03 | 736 | if (!hostdata->connected) { |
57f31326 | 737 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
bdd1cc03 FT |
738 | maybe_release_dma_irq(instance); |
739 | } | |
0a4e3612 FT |
740 | spin_unlock_irq(&hostdata->lock); |
741 | if (!done) | |
742 | cond_resched(); | |
1da177e4 | 743 | } while (!done); |
1da177e4 LT |
744 | } |
745 | ||
8053b0ee FT |
746 | /* |
747 | * NCR5380_dma_complete - finish DMA transfer | |
748 | * @instance: the scsi host instance | |
749 | * | |
750 | * Called by the interrupt handler when DMA finishes or a phase | |
751 | * mismatch occurs (which would end the DMA transfer). | |
752 | */ | |
753 | ||
754 | static void NCR5380_dma_complete(struct Scsi_Host *instance) | |
755 | { | |
756 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
ff1269cb | 757 | struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(hostdata->connected); |
8053b0ee FT |
758 | int transferred; |
759 | unsigned char **data; | |
760 | int *count; | |
761 | int saved_data = 0, overrun = 0; | |
762 | unsigned char p; | |
763 | ||
764 | if (hostdata->read_overruns) { | |
ff1269cb | 765 | p = ncmd->phase; |
8053b0ee FT |
766 | if (p & SR_IO) { |
767 | udelay(10); | |
768 | if ((NCR5380_read(BUS_AND_STATUS_REG) & | |
769 | (BASR_PHASE_MATCH | BASR_ACK)) == | |
770 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
771 | saved_data = NCR5380_read(INPUT_DATA_REG); | |
772 | overrun = 1; | |
773 | dsprintk(NDEBUG_DMA, instance, "read overrun handled\n"); | |
774 | } | |
775 | } | |
776 | } | |
777 | ||
e9db3198 | 778 | #ifdef CONFIG_SUN3 |
2e4b231a | 779 | if (sun3scsi_dma_finish(hostdata->connected->sc_data_direction)) { |
e9db3198 FT |
780 | pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n", |
781 | instance->host_no); | |
782 | BUG(); | |
783 | } | |
784 | ||
785 | if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == | |
786 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
787 | pr_err("scsi%d: BASR %02x\n", instance->host_no, | |
788 | NCR5380_read(BUS_AND_STATUS_REG)); | |
789 | pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n", | |
790 | instance->host_no); | |
791 | BUG(); | |
792 | } | |
793 | #endif | |
794 | ||
8053b0ee FT |
795 | NCR5380_write(MODE_REG, MR_BASE); |
796 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
797 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
798 | ||
4a98f896 | 799 | transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata); |
8053b0ee FT |
800 | hostdata->dma_len = 0; |
801 | ||
ff1269cb FT |
802 | data = (unsigned char **)&ncmd->ptr; |
803 | count = &ncmd->this_residual; | |
8053b0ee FT |
804 | *data += transferred; |
805 | *count -= transferred; | |
806 | ||
807 | if (hostdata->read_overruns) { | |
808 | int cnt, toPIO; | |
809 | ||
810 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { | |
811 | cnt = toPIO = hostdata->read_overruns; | |
812 | if (overrun) { | |
813 | dsprintk(NDEBUG_DMA, instance, | |
814 | "Got an input overrun, using saved byte\n"); | |
815 | *(*data)++ = saved_data; | |
816 | (*count)--; | |
817 | cnt--; | |
818 | toPIO--; | |
819 | } | |
820 | if (toPIO > 0) { | |
821 | dsprintk(NDEBUG_DMA, instance, | |
822 | "Doing %d byte PIO to 0x%p\n", cnt, *data); | |
e7734ef1 | 823 | NCR5380_transfer_pio(instance, &p, &cnt, data, 0); |
8053b0ee FT |
824 | *count -= toPIO - cnt; |
825 | } | |
826 | } | |
827 | } | |
828 | } | |
829 | ||
1da177e4 | 830 | /** |
cd400825 FT |
831 | * NCR5380_intr - generic NCR5380 irq handler |
832 | * @irq: interrupt number | |
833 | * @dev_id: device info | |
834 | * | |
835 | * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses | |
836 | * from the disconnected queue, and restarting NCR5380_main() | |
837 | * as required. | |
838 | * | |
839 | * The chip can assert IRQ in any of six different conditions. The IRQ flag | |
840 | * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). | |
841 | * Three of these six conditions are latched in the Bus and Status Register: | |
842 | * - End of DMA (cleared by ending DMA Mode) | |
843 | * - Parity error (cleared by reading RPIR) | |
844 | * - Loss of BSY (cleared by reading RPIR) | |
845 | * Two conditions have flag bits that are not latched: | |
846 | * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) | |
847 | * - Bus reset (non-maskable) | |
848 | * The remaining condition has no flag bit at all: | |
849 | * - Selection/reselection | |
850 | * | |
851 | * Hence, establishing the cause(s) of any interrupt is partly guesswork. | |
852 | * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor | |
853 | * claimed that "the design of the [DP8490] interrupt logic ensures | |
854 | * interrupts will not be lost (they can be on the DP5380)." | |
855 | * The L5380/53C80 datasheet from LOGIC Devices has more details. | |
856 | * | |
857 | * Checking for bus reset by reading RST is futile because of interrupt | |
858 | * latency, but a bus reset will reset chip logic. Checking for parity error | |
859 | * is unnecessary because that interrupt is never enabled. A Loss of BSY | |
860 | * condition will clear DMA Mode. We can tell when this occurs because the | |
e47c4921 | 861 | * Busy Monitor interrupt is enabled together with DMA Mode. |
1da177e4 LT |
862 | */ |
863 | ||
a46865dc | 864 | static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id) |
1da177e4 | 865 | { |
baa9aac6 | 866 | struct Scsi_Host *instance = dev_id; |
cd400825 FT |
867 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
868 | int handled = 0; | |
1da177e4 LT |
869 | unsigned char basr; |
870 | unsigned long flags; | |
871 | ||
11d2f63b | 872 | spin_lock_irqsave(&hostdata->lock, flags); |
cd400825 FT |
873 | |
874 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
875 | if (basr & BASR_IRQ) { | |
876 | unsigned char mr = NCR5380_read(MODE_REG); | |
877 | unsigned char sr = NCR5380_read(STATUS_REG); | |
878 | ||
b746545f FT |
879 | dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", |
880 | irq, basr, sr, mr); | |
1da177e4 | 881 | |
8053b0ee FT |
882 | if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { |
883 | /* Probably End of DMA, Phase Mismatch or Loss of BSY. | |
884 | * We ack IRQ after clearing Mode Register. Workarounds | |
885 | * for End of DMA errata need to happen in DMA Mode. | |
886 | */ | |
887 | ||
888 | dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); | |
889 | ||
890 | if (hostdata->connected) { | |
891 | NCR5380_dma_complete(instance); | |
892 | queue_work(hostdata->work_q, &hostdata->main_task); | |
893 | } else { | |
894 | NCR5380_write(MODE_REG, MR_BASE); | |
895 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
896 | } | |
897 | } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && | |
cd400825 FT |
898 | (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { |
899 | /* Probably reselected */ | |
900 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
901 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
902 | ||
b746545f | 903 | dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); |
cd400825 FT |
904 | |
905 | if (!hostdata->connected) { | |
906 | NCR5380_reselect(instance); | |
907 | queue_work(hostdata->work_q, &hostdata->main_task); | |
1da177e4 | 908 | } |
cd400825 FT |
909 | if (!hostdata->connected) |
910 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
911 | } else { | |
912 | /* Probably Bus Reset */ | |
913 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
914 | ||
6b0e87a6 FT |
915 | if (sr & SR_RST) { |
916 | /* Certainly Bus Reset */ | |
917 | shost_printk(KERN_WARNING, instance, | |
918 | "bus reset interrupt\n"); | |
919 | bus_reset_cleanup(instance); | |
920 | } else { | |
921 | dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); | |
922 | } | |
e9db3198 FT |
923 | #ifdef SUN3_SCSI_VME |
924 | dregs->csr |= CSR_DMA_ENABLE; | |
925 | #endif | |
cd400825 FT |
926 | } |
927 | handled = 1; | |
928 | } else { | |
9af9fecb | 929 | dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n"); |
e9db3198 FT |
930 | #ifdef SUN3_SCSI_VME |
931 | dregs->csr |= CSR_DMA_ENABLE; | |
932 | #endif | |
cd400825 FT |
933 | } |
934 | ||
11d2f63b | 935 | spin_unlock_irqrestore(&hostdata->lock, flags); |
cd400825 FT |
936 | |
937 | return IRQ_RETVAL(handled); | |
1da177e4 LT |
938 | } |
939 | ||
dad8261e FT |
940 | /** |
941 | * NCR5380_select - attempt arbitration and selection for a given command | |
942 | * @instance: the Scsi_Host instance | |
943 | * @cmd: the scsi_cmnd to execute | |
1da177e4 | 944 | * |
dad8261e FT |
945 | * This routine establishes an I_T_L nexus for a SCSI command. This involves |
946 | * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message. | |
aff0cf9a | 947 | * |
dad8261e FT |
948 | * Returns true if the operation should be retried. |
949 | * Returns false if it should not be retried. | |
1da177e4 | 950 | * |
aff0cf9a | 951 | * Side effects : |
594d4ba3 FT |
952 | * If bus busy, arbitration failed, etc, NCR5380_select() will exit |
953 | * with registers as they should have been on entry - ie | |
954 | * SELECT_ENABLE will be set appropriately, the NCR5380 | |
955 | * will cease to drive any SCSI bus signals. | |
1da177e4 | 956 | * |
dad8261e FT |
957 | * If successful : the I_T_L nexus will be established, and |
958 | * hostdata->connected will be set to cmd. | |
594d4ba3 | 959 | * SELECT interrupt will be disabled. |
1da177e4 | 960 | * |
117cd238 | 961 | * If failed (no target) : scsi_done() will be called, and the |
594d4ba3 | 962 | * cmd->result host byte set to DID_BAD_TARGET. |
1da177e4 | 963 | */ |
aff0cf9a | 964 | |
dad8261e | 965 | static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd) |
4ab2a787 | 966 | __releases(&hostdata->lock) __acquires(&hostdata->lock) |
1da177e4 | 967 | { |
e8a60144 | 968 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
969 | unsigned char tmp[3], phase; |
970 | unsigned char *data; | |
971 | int len; | |
1da177e4 | 972 | int err; |
dad8261e | 973 | bool ret = true; |
7c8ed783 | 974 | bool can_disconnect = instance->irq != NO_IRQ && |
0b7a2235 FT |
975 | cmd->cmnd[0] != REQUEST_SENSE && |
976 | (disconnect_mask & BIT(scmd_id(cmd))); | |
1da177e4 | 977 | |
1da177e4 | 978 | NCR5380_dprint(NDEBUG_ARBITRATION, instance); |
b746545f FT |
979 | dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", |
980 | instance->this_id); | |
1da177e4 | 981 | |
707d62b3 FT |
982 | /* |
983 | * Arbitration and selection phases are slow and involve dropping the | |
984 | * lock, so we have to watch out for EH. An exception handler may | |
dad8261e | 985 | * change 'selecting' to NULL. This function will then return false |
707d62b3 FT |
986 | * so that the caller will forget about 'cmd'. (During information |
987 | * transfer phases, EH may change 'connected' to NULL.) | |
988 | */ | |
989 | hostdata->selecting = cmd; | |
990 | ||
aff0cf9a FT |
991 | /* |
992 | * Set the phase bits to 0, otherwise the NCR5380 won't drive the | |
1da177e4 LT |
993 | * data bus during SELECTION. |
994 | */ | |
995 | ||
996 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
997 | ||
aff0cf9a | 998 | /* |
1da177e4 LT |
999 | * Start arbitration. |
1000 | */ | |
1001 | ||
1002 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
1003 | NCR5380_write(MODE_REG, MR_ARBITRATE); | |
1004 | ||
55500d9b FT |
1005 | /* The chip now waits for BUS FREE phase. Then after the 800 ns |
1006 | * Bus Free Delay, arbitration will begin. | |
1007 | */ | |
1da177e4 | 1008 | |
11d2f63b | 1009 | spin_unlock_irq(&hostdata->lock); |
d5d37a0a | 1010 | err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0, |
b32ade12 FT |
1011 | INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, |
1012 | ICR_ARBITRATION_PROGRESS, HZ); | |
11d2f63b | 1013 | spin_lock_irq(&hostdata->lock); |
b32ade12 FT |
1014 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { |
1015 | /* Reselection interrupt */ | |
707d62b3 | 1016 | goto out; |
b32ade12 | 1017 | } |
ccf6efd7 FT |
1018 | if (!hostdata->selecting) { |
1019 | /* Command was aborted */ | |
1020 | NCR5380_write(MODE_REG, MR_BASE); | |
dad8261e | 1021 | return false; |
ccf6efd7 | 1022 | } |
b32ade12 FT |
1023 | if (err < 0) { |
1024 | NCR5380_write(MODE_REG, MR_BASE); | |
1025 | shost_printk(KERN_ERR, instance, | |
1026 | "select: arbitration timeout\n"); | |
707d62b3 | 1027 | goto out; |
1da177e4 | 1028 | } |
11d2f63b | 1029 | spin_unlock_irq(&hostdata->lock); |
1da177e4 | 1030 | |
55500d9b | 1031 | /* The SCSI-2 arbitration delay is 2.4 us */ |
1da177e4 LT |
1032 | udelay(3); |
1033 | ||
1034 | /* Check for lost arbitration */ | |
0d2cf867 FT |
1035 | if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || |
1036 | (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || | |
1037 | (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { | |
1da177e4 | 1038 | NCR5380_write(MODE_REG, MR_BASE); |
b746545f | 1039 | dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); |
11d2f63b | 1040 | spin_lock_irq(&hostdata->lock); |
707d62b3 | 1041 | goto out; |
1da177e4 | 1042 | } |
cf13b083 FT |
1043 | |
1044 | /* After/during arbitration, BSY should be asserted. | |
1045 | * IBM DPES-31080 Version S31Q works now | |
1046 | * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) | |
1047 | */ | |
1048 | NCR5380_write(INITIATOR_COMMAND_REG, | |
1049 | ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); | |
1da177e4 | 1050 | |
aff0cf9a FT |
1051 | /* |
1052 | * Again, bus clear + bus settle time is 1.2us, however, this is | |
1da177e4 LT |
1053 | * a minimum so we'll udelay ceil(1.2) |
1054 | */ | |
1055 | ||
9c3f0e2b FT |
1056 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) |
1057 | udelay(15); | |
1058 | else | |
1059 | udelay(2); | |
1da177e4 | 1060 | |
11d2f63b FT |
1061 | spin_lock_irq(&hostdata->lock); |
1062 | ||
72064a78 FT |
1063 | /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ |
1064 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) | |
707d62b3 FT |
1065 | goto out; |
1066 | ||
1067 | if (!hostdata->selecting) { | |
1068 | NCR5380_write(MODE_REG, MR_BASE); | |
1069 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
dad8261e | 1070 | return false; |
707d62b3 | 1071 | } |
72064a78 | 1072 | |
b746545f | 1073 | dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); |
1da177e4 | 1074 | |
aff0cf9a FT |
1075 | /* |
1076 | * Now that we have won arbitration, start Selection process, asserting | |
1da177e4 LT |
1077 | * the host and target ID's on the SCSI bus. |
1078 | */ | |
1079 | ||
3d07d22b | 1080 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); |
1da177e4 | 1081 | |
aff0cf9a | 1082 | /* |
1da177e4 LT |
1083 | * Raise ATN while SEL is true before BSY goes false from arbitration, |
1084 | * since this is the only way to guarantee that we'll get a MESSAGE OUT | |
1085 | * phase immediately after selection. | |
1086 | */ | |
1087 | ||
3d07d22b FT |
1088 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | |
1089 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1da177e4 LT |
1090 | NCR5380_write(MODE_REG, MR_BASE); |
1091 | ||
aff0cf9a | 1092 | /* |
1da177e4 LT |
1093 | * Reselect interrupts must be turned off prior to the dropping of BSY, |
1094 | * otherwise we will trigger an interrupt. | |
1095 | */ | |
1096 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
1097 | ||
11d2f63b FT |
1098 | spin_unlock_irq(&hostdata->lock); |
1099 | ||
1da177e4 | 1100 | /* |
aff0cf9a | 1101 | * The initiator shall then wait at least two deskew delays and release |
1da177e4 LT |
1102 | * the BSY signal. |
1103 | */ | |
0d2cf867 | 1104 | udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ |
1da177e4 LT |
1105 | |
1106 | /* Reset BSY */ | |
3d07d22b FT |
1107 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | |
1108 | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1da177e4 | 1109 | |
aff0cf9a | 1110 | /* |
1da177e4 | 1111 | * Something weird happens when we cease to drive BSY - looks |
aff0cf9a | 1112 | * like the board/chip is letting us do another read before the |
1da177e4 LT |
1113 | * appropriate propagation delay has expired, and we're confusing |
1114 | * a BSY signal from ourselves as the target's response to SELECTION. | |
1115 | * | |
1116 | * A small delay (the 'C++' frontend breaks the pipeline with an | |
1117 | * unnecessary jump, making it work on my 386-33/Trantor T128, the | |
aff0cf9a FT |
1118 | * tighter 'C' code breaks and requires this) solves the problem - |
1119 | * the 1 us delay is arbitrary, and only used because this delay will | |
1120 | * be the same on other platforms and since it works here, it should | |
1da177e4 LT |
1121 | * work there. |
1122 | * | |
1123 | * wingel suggests that this could be due to failing to wait | |
1124 | * one deskew delay. | |
1125 | */ | |
1126 | ||
1127 | udelay(1); | |
1128 | ||
b746545f | 1129 | dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); |
1da177e4 | 1130 | |
aff0cf9a FT |
1131 | /* |
1132 | * The SCSI specification calls for a 250 ms timeout for the actual | |
1da177e4 LT |
1133 | * selection. |
1134 | */ | |
1135 | ||
d5d37a0a | 1136 | err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY, |
ae753a33 | 1137 | msecs_to_jiffies(250)); |
1da177e4 | 1138 | |
1da177e4 | 1139 | if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { |
11d2f63b | 1140 | spin_lock_irq(&hostdata->lock); |
1da177e4 LT |
1141 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
1142 | NCR5380_reselect(instance); | |
6a6ff4ac | 1143 | shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); |
707d62b3 | 1144 | goto out; |
1da177e4 | 1145 | } |
ae753a33 FT |
1146 | |
1147 | if (err < 0) { | |
11d2f63b | 1148 | spin_lock_irq(&hostdata->lock); |
ae753a33 | 1149 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
6a162836 | 1150 | |
707d62b3 | 1151 | /* Can't touch cmd if it has been reclaimed by the scsi ML */ |
6a162836 | 1152 | if (!hostdata->selecting) |
dad8261e | 1153 | return false; |
6a162836 FT |
1154 | |
1155 | cmd->result = DID_BAD_TARGET << 16; | |
1156 | complete_cmd(instance, cmd); | |
1157 | dsprintk(NDEBUG_SELECTION, instance, | |
1158 | "target did not respond within 250ms\n"); | |
dad8261e | 1159 | ret = false; |
707d62b3 | 1160 | goto out; |
ae753a33 FT |
1161 | } |
1162 | ||
aff0cf9a FT |
1163 | /* |
1164 | * No less than two deskew delays after the initiator detects the | |
1165 | * BSY signal is true, it shall release the SEL signal and may | |
1da177e4 LT |
1166 | * change the DATA BUS. -wingel |
1167 | */ | |
1168 | ||
1169 | udelay(1); | |
1170 | ||
1171 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1172 | ||
1da177e4 | 1173 | /* |
aff0cf9a | 1174 | * Since we followed the SCSI spec, and raised ATN while SEL |
1da177e4 LT |
1175 | * was true but before BSY was false during selection, the information |
1176 | * transfer phase should be a MESSAGE OUT phase so that we can send the | |
1177 | * IDENTIFY message. | |
1da177e4 LT |
1178 | */ |
1179 | ||
1180 | /* Wait for start of REQ/ACK handshake */ | |
1181 | ||
d5d37a0a | 1182 | err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 1183 | spin_lock_irq(&hostdata->lock); |
1cc160e1 | 1184 | if (err < 0) { |
55500d9b FT |
1185 | shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); |
1186 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
707d62b3 FT |
1187 | goto out; |
1188 | } | |
1189 | if (!hostdata->selecting) { | |
e7734ef1 | 1190 | do_abort(instance, 0); |
dad8261e | 1191 | return false; |
1da177e4 LT |
1192 | } |
1193 | ||
b746545f FT |
1194 | dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", |
1195 | scmd_id(cmd)); | |
7c8ed783 | 1196 | tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun); |
1da177e4 LT |
1197 | |
1198 | len = 1; | |
1da177e4 LT |
1199 | data = tmp; |
1200 | phase = PHASE_MSGOUT; | |
e7734ef1 | 1201 | NCR5380_transfer_pio(instance, &phase, &len, &data, 0); |
b15e791d FT |
1202 | if (len) { |
1203 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1204 | cmd->result = DID_ERROR << 16; | |
1205 | complete_cmd(instance, cmd); | |
1206 | dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n"); | |
dad8261e | 1207 | ret = false; |
b15e791d FT |
1208 | goto out; |
1209 | } | |
1210 | ||
b746545f | 1211 | dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); |
11d2f63b | 1212 | |
1da177e4 | 1213 | hostdata->connected = cmd; |
3d07d22b | 1214 | hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun; |
1da177e4 | 1215 | |
e9db3198 FT |
1216 | #ifdef SUN3_SCSI_VME |
1217 | dregs->csr |= CSR_INTR; | |
1218 | #endif | |
1219 | ||
28424d3a | 1220 | initialize_SCp(cmd); |
1da177e4 | 1221 | |
dad8261e | 1222 | ret = false; |
707d62b3 FT |
1223 | |
1224 | out: | |
1225 | if (!hostdata->selecting) | |
96edebd6 | 1226 | return false; |
707d62b3 | 1227 | hostdata->selecting = NULL; |
dad8261e | 1228 | return ret; |
1da177e4 LT |
1229 | } |
1230 | ||
aff0cf9a FT |
1231 | /* |
1232 | * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, | |
594d4ba3 | 1233 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1234 | * |
1235 | * Purpose : transfers data in given phase using polled I/O | |
1236 | * | |
aff0cf9a | 1237 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 | 1238 | * what phase is expected, *count - pointer to number of |
e7734ef1 AD |
1239 | * bytes to transfer, **data - pointer to data pointer, |
1240 | * can_sleep - 1 or 0 when sleeping is permitted or not, respectively. | |
aff0cf9a | 1241 | * |
1da177e4 | 1242 | * Returns : -1 when different phase is entered without transferring |
0d2cf867 | 1243 | * maximum number of bytes, 0 if all bytes are transferred or exit |
594d4ba3 | 1244 | * is in same phase. |
1da177e4 | 1245 | * |
594d4ba3 | 1246 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1247 | * |
1248 | * XXX Note : handling for bus free may be useful. | |
1249 | */ | |
1250 | ||
1251 | /* | |
aff0cf9a | 1252 | * Note : this code is not as quick as it could be, however it |
1da177e4 LT |
1253 | * IS 100% reliable, and for the actual data transfer where speed |
1254 | * counts, we will always do a pseudo DMA or DMA transfer. | |
1255 | */ | |
1256 | ||
0d2cf867 FT |
1257 | static int NCR5380_transfer_pio(struct Scsi_Host *instance, |
1258 | unsigned char *phase, int *count, | |
e7734ef1 | 1259 | unsigned char **data, unsigned int can_sleep) |
0d2cf867 | 1260 | { |
61e1ce58 | 1261 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1262 | unsigned char p = *phase, tmp; |
1263 | int c = *count; | |
1264 | unsigned char *d = *data; | |
1da177e4 | 1265 | |
aff0cf9a FT |
1266 | /* |
1267 | * The NCR5380 chip will only drive the SCSI bus when the | |
1da177e4 LT |
1268 | * phase specified in the appropriate bits of the TARGET COMMAND |
1269 | * REGISTER match the STATUS REGISTER | |
1270 | */ | |
1271 | ||
0d2cf867 | 1272 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); |
1da177e4 | 1273 | |
1da177e4 | 1274 | do { |
aff0cf9a FT |
1275 | /* |
1276 | * Wait for assertion of REQ, after which the phase bits will be | |
1277 | * valid | |
1da177e4 LT |
1278 | */ |
1279 | ||
e7734ef1 AD |
1280 | if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, |
1281 | HZ * can_sleep) < 0) | |
1da177e4 | 1282 | break; |
1da177e4 | 1283 | |
b746545f | 1284 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); |
1da177e4 LT |
1285 | |
1286 | /* Check for phase mismatch */ | |
686f3990 | 1287 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { |
b746545f FT |
1288 | dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); |
1289 | NCR5380_dprint_phase(NDEBUG_PIO, instance); | |
1da177e4 LT |
1290 | break; |
1291 | } | |
0d2cf867 | 1292 | |
1da177e4 LT |
1293 | /* Do actual transfer from SCSI bus to / from memory */ |
1294 | if (!(p & SR_IO)) | |
1295 | NCR5380_write(OUTPUT_DATA_REG, *d); | |
1296 | else | |
1297 | *d = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
1298 | ||
1299 | ++d; | |
1300 | ||
aff0cf9a | 1301 | /* |
1da177e4 LT |
1302 | * The SCSI standard suggests that in MSGOUT phase, the initiator |
1303 | * should drop ATN on the last byte of the message phase | |
1304 | * after REQ has been asserted for the handshake but before | |
1305 | * the initiator raises ACK. | |
1306 | */ | |
1307 | ||
1308 | if (!(p & SR_IO)) { | |
1309 | if (!((p & SR_MSG) && c > 1)) { | |
1310 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1311 | NCR5380_dprint(NDEBUG_PIO, instance); | |
3d07d22b FT |
1312 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1313 | ICR_ASSERT_DATA | ICR_ASSERT_ACK); | |
1da177e4 | 1314 | } else { |
3d07d22b FT |
1315 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1316 | ICR_ASSERT_DATA | ICR_ASSERT_ATN); | |
1da177e4 | 1317 | NCR5380_dprint(NDEBUG_PIO, instance); |
3d07d22b FT |
1318 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1319 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1da177e4 LT |
1320 | } |
1321 | } else { | |
1322 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1323 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
1324 | } | |
1325 | ||
d5d37a0a | 1326 | if (NCR5380_poll_politely(hostdata, |
e7734ef1 | 1327 | STATUS_REG, SR_REQ, 0, 5 * HZ * can_sleep) < 0) |
a2edc4a6 FT |
1328 | break; |
1329 | ||
b746545f | 1330 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); |
1da177e4 LT |
1331 | |
1332 | /* | |
aff0cf9a FT |
1333 | * We have several special cases to consider during REQ/ACK handshaking : |
1334 | * 1. We were in MSGOUT phase, and we are on the last byte of the | |
594d4ba3 | 1335 | * message. ATN must be dropped as ACK is dropped. |
1da177e4 | 1336 | * |
aff0cf9a | 1337 | * 2. We are in a MSGIN phase, and we are on the last byte of the |
594d4ba3 FT |
1338 | * message. We must exit with ACK asserted, so that the calling |
1339 | * code may raise ATN before dropping ACK to reject the message. | |
1da177e4 LT |
1340 | * |
1341 | * 3. ACK and ATN are clear and the target may proceed as normal. | |
1342 | */ | |
1343 | if (!(p == PHASE_MSGIN && c == 1)) { | |
1344 | if (p == PHASE_MSGOUT && c > 1) | |
1345 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1346 | else | |
1347 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1348 | } | |
1349 | } while (--c); | |
1350 | ||
b746545f | 1351 | dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); |
1da177e4 LT |
1352 | |
1353 | *count = c; | |
1354 | *data = d; | |
1355 | tmp = NCR5380_read(STATUS_REG); | |
a2edc4a6 FT |
1356 | /* The phase read from the bus is valid if either REQ is (already) |
1357 | * asserted or if ACK hasn't been released yet. The latter applies if | |
1358 | * we're in MSG IN, DATA IN or STATUS and all bytes have been received. | |
1359 | */ | |
1360 | if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) | |
1da177e4 LT |
1361 | *phase = tmp & PHASE_MASK; |
1362 | else | |
1363 | *phase = PHASE_UNKNOWN; | |
1364 | ||
1365 | if (!c || (*phase == p)) | |
1366 | return 0; | |
1367 | else | |
1368 | return -1; | |
1369 | } | |
1370 | ||
1371 | /** | |
636b1ec8 FT |
1372 | * do_reset - issue a reset command |
1373 | * @instance: adapter to reset | |
1da177e4 | 1374 | * |
636b1ec8 FT |
1375 | * Issue a reset sequence to the NCR5380 and try and get the bus |
1376 | * back into sane shape. | |
1da177e4 | 1377 | * |
636b1ec8 FT |
1378 | * This clears the reset interrupt flag because there may be no handler for |
1379 | * it. When the driver is initialized, the NCR5380_intr() handler has not yet | |
1380 | * been installed. And when in EH we may have released the ST DMA interrupt. | |
1da177e4 | 1381 | */ |
aff0cf9a | 1382 | |
54d8fe44 FT |
1383 | static void do_reset(struct Scsi_Host *instance) |
1384 | { | |
61e1ce58 | 1385 | struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance); |
636b1ec8 FT |
1386 | unsigned long flags; |
1387 | ||
1388 | local_irq_save(flags); | |
1389 | NCR5380_write(TARGET_COMMAND_REG, | |
1390 | PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); | |
1da177e4 | 1391 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); |
636b1ec8 | 1392 | udelay(50); |
1da177e4 | 1393 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
636b1ec8 FT |
1394 | (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
1395 | local_irq_restore(flags); | |
1da177e4 LT |
1396 | } |
1397 | ||
80d3eb6d FT |
1398 | /** |
1399 | * do_abort - abort the currently established nexus by going to | |
1400 | * MESSAGE OUT phase and sending an ABORT message. | |
1401 | * @instance: relevant scsi host instance | |
e7734ef1 | 1402 | * @can_sleep: 1 or 0 when sleeping is permitted or not, respectively |
1da177e4 | 1403 | * |
d04fc41a | 1404 | * Returns 0 on success, negative error code on failure. |
1da177e4 LT |
1405 | */ |
1406 | ||
e7734ef1 | 1407 | static int do_abort(struct Scsi_Host *instance, unsigned int can_sleep) |
54d8fe44 | 1408 | { |
61e1ce58 | 1409 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1410 | unsigned char *msgptr, phase, tmp; |
1411 | int len; | |
1412 | int rc; | |
1da177e4 LT |
1413 | |
1414 | /* Request message out phase */ | |
1415 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1416 | ||
aff0cf9a FT |
1417 | /* |
1418 | * Wait for the target to indicate a valid phase by asserting | |
1419 | * REQ. Once this happens, we'll have either a MSGOUT phase | |
1420 | * and can immediately send the ABORT message, or we'll have some | |
1da177e4 | 1421 | * other phase and will have to source/sink data. |
aff0cf9a | 1422 | * |
1da177e4 LT |
1423 | * We really don't care what value was on the bus or what value |
1424 | * the target sees, so we just handshake. | |
1425 | */ | |
1426 | ||
e7734ef1 AD |
1427 | rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, |
1428 | 10 * HZ * can_sleep); | |
1cc160e1 | 1429 | if (rc < 0) |
d04fc41a | 1430 | goto out; |
1da177e4 | 1431 | |
f35d3474 | 1432 | tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; |
aff0cf9a | 1433 | |
1da177e4 LT |
1434 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); |
1435 | ||
f35d3474 | 1436 | if (tmp != PHASE_MSGOUT) { |
0d2cf867 FT |
1437 | NCR5380_write(INITIATOR_COMMAND_REG, |
1438 | ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
e7734ef1 AD |
1439 | rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, |
1440 | 3 * HZ * can_sleep); | |
1cc160e1 | 1441 | if (rc < 0) |
d04fc41a | 1442 | goto out; |
80d3eb6d | 1443 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); |
1da177e4 | 1444 | } |
0d2cf867 | 1445 | |
1da177e4 LT |
1446 | tmp = ABORT; |
1447 | msgptr = &tmp; | |
1448 | len = 1; | |
1449 | phase = PHASE_MSGOUT; | |
e7734ef1 | 1450 | NCR5380_transfer_pio(instance, &phase, &len, &msgptr, can_sleep); |
d04fc41a FT |
1451 | if (len) |
1452 | rc = -ENXIO; | |
1da177e4 LT |
1453 | |
1454 | /* | |
1455 | * If we got here, and the command completed successfully, | |
1456 | * we're about to go into bus free state. | |
1457 | */ | |
1458 | ||
d04fc41a | 1459 | out: |
80d3eb6d | 1460 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
d04fc41a | 1461 | return rc; |
1da177e4 LT |
1462 | } |
1463 | ||
aff0cf9a FT |
1464 | /* |
1465 | * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, | |
594d4ba3 | 1466 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1467 | * |
1468 | * Purpose : transfers data in given phase using either real | |
594d4ba3 | 1469 | * or pseudo DMA. |
1da177e4 | 1470 | * |
aff0cf9a | 1471 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 FT |
1472 | * what phase is expected, *count - pointer to number of |
1473 | * bytes to transfer, **data - pointer to data pointer. | |
aff0cf9a | 1474 | * |
1da177e4 | 1475 | * Returns : -1 when different phase is entered without transferring |
594d4ba3 FT |
1476 | * maximum number of bytes, 0 if all bytes or transferred or exit |
1477 | * is in same phase. | |
1da177e4 | 1478 | * |
594d4ba3 | 1479 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1480 | */ |
1481 | ||
1482 | ||
0d2cf867 FT |
1483 | static int NCR5380_transfer_dma(struct Scsi_Host *instance, |
1484 | unsigned char *phase, int *count, | |
1485 | unsigned char **data) | |
1486 | { | |
1487 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
f0ea73a4 FT |
1488 | int c = *count; |
1489 | unsigned char p = *phase; | |
1490 | unsigned char *d = *data; | |
1da177e4 | 1491 | unsigned char tmp; |
8053b0ee | 1492 | int result = 0; |
1da177e4 | 1493 | |
1da177e4 LT |
1494 | if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { |
1495 | *phase = tmp; | |
1496 | return -1; | |
1497 | } | |
1da177e4 | 1498 | |
ff1269cb | 1499 | NCR5380_to_ncmd(hostdata->connected)->phase = p; |
1da177e4 | 1500 | |
8053b0ee FT |
1501 | if (p & SR_IO) { |
1502 | if (hostdata->read_overruns) | |
1503 | c -= hostdata->read_overruns; | |
1504 | else if (hostdata->flags & FLAG_DMA_FIXUP) | |
1505 | --c; | |
1506 | } | |
1da177e4 | 1507 | |
8053b0ee FT |
1508 | dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", |
1509 | (p & SR_IO) ? "receive" : "send", c, d); | |
1da177e4 | 1510 | |
e9db3198 FT |
1511 | #ifdef CONFIG_SUN3 |
1512 | /* send start chain */ | |
1513 | sun3scsi_dma_start(c, *data); | |
1514 | #endif | |
1515 | ||
8053b0ee FT |
1516 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); |
1517 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | | |
1518 | MR_ENABLE_EOP_INTR); | |
1519 | ||
1520 | if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) { | |
1521 | /* On the Medusa, it is a must to initialize the DMA before | |
1522 | * starting the NCR. This is also the cleaner way for the TT. | |
1523 | */ | |
1524 | if (p & SR_IO) | |
4a98f896 | 1525 | result = NCR5380_dma_recv_setup(hostdata, d, c); |
8053b0ee | 1526 | else |
4a98f896 | 1527 | result = NCR5380_dma_send_setup(hostdata, d, c); |
8053b0ee | 1528 | } |
1da177e4 | 1529 | |
aff0cf9a | 1530 | /* |
594d4ba3 FT |
1531 | * On the PAS16 at least I/O recovery delays are not needed here. |
1532 | * Everyone else seems to want them. | |
1da177e4 LT |
1533 | */ |
1534 | ||
1535 | if (p & SR_IO) { | |
e9db3198 | 1536 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
e5d55d1a | 1537 | NCR5380_io_delay(1); |
1da177e4 LT |
1538 | NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); |
1539 | } else { | |
e5d55d1a | 1540 | NCR5380_io_delay(1); |
1da177e4 | 1541 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); |
e5d55d1a | 1542 | NCR5380_io_delay(1); |
1da177e4 | 1543 | NCR5380_write(START_DMA_SEND_REG, 0); |
e5d55d1a | 1544 | NCR5380_io_delay(1); |
1da177e4 LT |
1545 | } |
1546 | ||
e9db3198 FT |
1547 | #ifdef CONFIG_SUN3 |
1548 | #ifdef SUN3_SCSI_VME | |
1549 | dregs->csr |= CSR_DMA_ENABLE; | |
1550 | #endif | |
1551 | sun3_dma_active = 1; | |
1552 | #endif | |
1553 | ||
8053b0ee FT |
1554 | if (hostdata->flags & FLAG_LATE_DMA_SETUP) { |
1555 | /* On the Falcon, the DMA setup must be done after the last | |
1556 | * NCR access, else the DMA setup gets trashed! | |
1557 | */ | |
1558 | if (p & SR_IO) | |
4a98f896 | 1559 | result = NCR5380_dma_recv_setup(hostdata, d, c); |
8053b0ee | 1560 | else |
4a98f896 | 1561 | result = NCR5380_dma_send_setup(hostdata, d, c); |
8053b0ee FT |
1562 | } |
1563 | ||
1564 | /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */ | |
1565 | if (result < 0) | |
1566 | return result; | |
1567 | ||
1568 | /* For real DMA, result is the byte count. DMA interrupt is expected. */ | |
1569 | if (result > 0) { | |
1570 | hostdata->dma_len = result; | |
1571 | return 0; | |
1572 | } | |
1573 | ||
1574 | /* The result is zero iff pseudo DMA send/receive was completed. */ | |
1575 | hostdata->dma_len = c; | |
1576 | ||
1da177e4 | 1577 | /* |
e4dec680 | 1578 | * A note regarding the DMA errata workarounds for early NMOS silicon. |
c16df32e FT |
1579 | * |
1580 | * For DMA sends, we want to wait until the last byte has been | |
1581 | * transferred out over the bus before we turn off DMA mode. Alas, there | |
1582 | * seems to be no terribly good way of doing this on a 5380 under all | |
1583 | * conditions. For non-scatter-gather operations, we can wait until REQ | |
1584 | * and ACK both go false, or until a phase mismatch occurs. Gather-sends | |
1585 | * are nastier, since the device will be expecting more data than we | |
1586 | * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we | |
1587 | * could test Last Byte Sent to assure transfer (I imagine this is precisely | |
1588 | * why this signal was added to the newer chips) but on the older 538[01] | |
1589 | * this signal does not exist. The workaround for this lack is a watchdog; | |
1590 | * we bail out of the wait-loop after a modest amount of wait-time if | |
1591 | * the usual exit conditions are not met. Not a terribly clean or | |
1592 | * correct solution :-% | |
1593 | * | |
1594 | * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. | |
1595 | * If the chip is in DMA receive mode, it will respond to a target's | |
1596 | * REQ by latching the SCSI data into the INPUT DATA register and asserting | |
1597 | * ACK, even if it has _already_ been notified by the DMA controller that | |
1598 | * the current DMA transfer has completed! If the NCR5380 is then taken | |
1599 | * out of DMA mode, this already-acknowledged byte is lost. This is | |
1600 | * not a problem for "one DMA transfer per READ command", because | |
1601 | * the situation will never arise... either all of the data is DMA'ed | |
1602 | * properly, or the target switches to MESSAGE IN phase to signal a | |
1603 | * disconnection (either operation bringing the DMA to a clean halt). | |
1604 | * However, in order to handle scatter-receive, we must work around the | |
e4dec680 | 1605 | * problem. The chosen fix is to DMA fewer bytes, then check for the |
c16df32e FT |
1606 | * condition before taking the NCR5380 out of DMA mode. One or two extra |
1607 | * bytes are transferred via PIO as necessary to fill out the original | |
1608 | * request. | |
1da177e4 LT |
1609 | */ |
1610 | ||
8053b0ee FT |
1611 | if (hostdata->flags & FLAG_DMA_FIXUP) { |
1612 | if (p & SR_IO) { | |
1da177e4 | 1613 | /* |
e4dec680 | 1614 | * The workaround was to transfer fewer bytes than we |
aff0cf9a | 1615 | * intended to with the pseudo-DMA read function, wait for |
1da177e4 LT |
1616 | * the chip to latch the last byte, read it, and then disable |
1617 | * pseudo-DMA mode. | |
aff0cf9a | 1618 | * |
1da177e4 LT |
1619 | * After REQ is asserted, the NCR5380 asserts DRQ and ACK. |
1620 | * REQ is deasserted when ACK is asserted, and not reasserted | |
1621 | * until ACK goes false. Since the NCR5380 won't lower ACK | |
1622 | * until DACK is asserted, which won't happen unless we twiddle | |
aff0cf9a FT |
1623 | * the DMA port or we take the NCR5380 out of DMA mode, we |
1624 | * can guarantee that we won't handshake another extra | |
1da177e4 LT |
1625 | * byte. |
1626 | */ | |
1627 | ||
d5d37a0a | 1628 | if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, |
e7734ef1 | 1629 | BASR_DRQ, BASR_DRQ, 0) < 0) { |
438af51c | 1630 | result = -1; |
55181be8 FT |
1631 | shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); |
1632 | } | |
d5d37a0a | 1633 | if (NCR5380_poll_politely(hostdata, STATUS_REG, |
e7734ef1 | 1634 | SR_REQ, 0, 0) < 0) { |
438af51c | 1635 | result = -1; |
55181be8 | 1636 | shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); |
1da177e4 | 1637 | } |
8053b0ee FT |
1638 | d[*count - 1] = NCR5380_read(INPUT_DATA_REG); |
1639 | } else { | |
1da177e4 | 1640 | /* |
aff0cf9a FT |
1641 | * Wait for the last byte to be sent. If REQ is being asserted for |
1642 | * the byte we're interested, we'll ACK it and it will go false. | |
1da177e4 | 1643 | */ |
d5d37a0a | 1644 | if (NCR5380_poll_politely2(hostdata, |
55181be8 | 1645 | BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, |
e7734ef1 | 1646 | BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, 0) < 0) { |
438af51c | 1647 | result = -1; |
55181be8 | 1648 | shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); |
1da177e4 LT |
1649 | } |
1650 | } | |
1da177e4 | 1651 | } |
8053b0ee FT |
1652 | |
1653 | NCR5380_dma_complete(instance); | |
438af51c | 1654 | return result; |
1da177e4 | 1655 | } |
1da177e4 LT |
1656 | |
1657 | /* | |
1658 | * Function : NCR5380_information_transfer (struct Scsi_Host *instance) | |
1659 | * | |
aff0cf9a | 1660 | * Purpose : run through the various SCSI phases and do as the target |
594d4ba3 FT |
1661 | * directs us to. Operates on the currently connected command, |
1662 | * instance->connected. | |
1da177e4 LT |
1663 | * |
1664 | * Inputs : instance, instance for which we are doing commands | |
1665 | * | |
aff0cf9a | 1666 | * Side effects : SCSI things happen, the disconnected queue will be |
594d4ba3 FT |
1667 | * modified if a command disconnects, *instance->connected will |
1668 | * change. | |
1da177e4 | 1669 | * |
aff0cf9a | 1670 | * XXX Note : we need to watch for bus free or a reset condition here |
594d4ba3 | 1671 | * to recover from an unexpected bus free condition. |
1da177e4 LT |
1672 | */ |
1673 | ||
0d2cf867 | 1674 | static void NCR5380_information_transfer(struct Scsi_Host *instance) |
4ab2a787 | 1675 | __releases(&hostdata->lock) __acquires(&hostdata->lock) |
0d2cf867 | 1676 | { |
e8a60144 | 1677 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1678 | unsigned char msgout = NOP; |
1679 | int sink = 0; | |
1680 | int len; | |
1da177e4 | 1681 | int transfersize; |
1da177e4 LT |
1682 | unsigned char *data; |
1683 | unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; | |
11d2f63b | 1684 | struct scsi_cmnd *cmd; |
1da177e4 | 1685 | |
e9db3198 FT |
1686 | #ifdef SUN3_SCSI_VME |
1687 | dregs->csr |= CSR_INTR; | |
1688 | #endif | |
1689 | ||
11d2f63b | 1690 | while ((cmd = hostdata->connected)) { |
ff1269cb | 1691 | struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd); |
32b26a10 | 1692 | |
1da177e4 LT |
1693 | tmp = NCR5380_read(STATUS_REG); |
1694 | /* We only have a valid SCSI phase when REQ is asserted */ | |
1695 | if (tmp & SR_REQ) { | |
1696 | phase = (tmp & PHASE_MASK); | |
1697 | if (phase != old_phase) { | |
1698 | old_phase = phase; | |
1699 | NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); | |
1700 | } | |
e9db3198 | 1701 | #ifdef CONFIG_SUN3 |
4a98f896 FT |
1702 | if (phase == PHASE_CMDOUT && |
1703 | sun3_dma_setup_done != cmd) { | |
1704 | int count; | |
e9db3198 | 1705 | |
ff1269cb | 1706 | advance_sg_buffer(ncmd); |
e9db3198 | 1707 | |
4a98f896 FT |
1708 | count = sun3scsi_dma_xfer_len(hostdata, cmd); |
1709 | ||
1710 | if (count > 0) { | |
2e4b231a | 1711 | if (cmd->sc_data_direction == DMA_TO_DEVICE) |
4a98f896 | 1712 | sun3scsi_dma_send_setup(hostdata, |
ff1269cb | 1713 | ncmd->ptr, count); |
4a98f896 FT |
1714 | else |
1715 | sun3scsi_dma_recv_setup(hostdata, | |
ff1269cb | 1716 | ncmd->ptr, count); |
e9db3198 FT |
1717 | sun3_dma_setup_done = cmd; |
1718 | } | |
1719 | #ifdef SUN3_SCSI_VME | |
1720 | dregs->csr |= CSR_INTR; | |
1721 | #endif | |
1722 | } | |
1723 | #endif /* CONFIG_SUN3 */ | |
1724 | ||
1da177e4 LT |
1725 | if (sink && (phase != PHASE_MSGOUT)) { |
1726 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); | |
1727 | ||
3d07d22b FT |
1728 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | |
1729 | ICR_ASSERT_ACK); | |
0d2cf867 FT |
1730 | while (NCR5380_read(STATUS_REG) & SR_REQ) |
1731 | ; | |
3d07d22b FT |
1732 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1733 | ICR_ASSERT_ATN); | |
1da177e4 LT |
1734 | sink = 0; |
1735 | continue; | |
1736 | } | |
0d2cf867 | 1737 | |
1da177e4 | 1738 | switch (phase) { |
1da177e4 LT |
1739 | case PHASE_DATAOUT: |
1740 | #if (NDEBUG & NDEBUG_NO_DATAOUT) | |
6a6ff4ac | 1741 | shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); |
1da177e4 | 1742 | sink = 1; |
e7734ef1 | 1743 | do_abort(instance, 0); |
1da177e4 | 1744 | cmd->result = DID_ERROR << 16; |
677e0194 | 1745 | complete_cmd(instance, cmd); |
dc183965 | 1746 | hostdata->connected = NULL; |
45ddc1b2 | 1747 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
1da177e4 LT |
1748 | return; |
1749 | #endif | |
bf1a0c6f | 1750 | case PHASE_DATAIN: |
aff0cf9a | 1751 | /* |
1da177e4 LT |
1752 | * If there is no room left in the current buffer in the |
1753 | * scatter-gather list, move onto the next one. | |
1754 | */ | |
1755 | ||
ff1269cb | 1756 | advance_sg_buffer(ncmd); |
0e9fdd2b FT |
1757 | dsprintk(NDEBUG_INFORMATION, instance, |
1758 | "this residual %d, sg ents %d\n", | |
ff1269cb FT |
1759 | ncmd->this_residual, |
1760 | sg_nents(ncmd->buffer)); | |
0d2cf867 | 1761 | |
1da177e4 | 1762 | /* |
aff0cf9a | 1763 | * The preferred transfer method is going to be |
1da177e4 LT |
1764 | * PSEUDO-DMA for systems that are strictly PIO, |
1765 | * since we can let the hardware do the handshaking. | |
1766 | * | |
1767 | * For this to work, we need to know the transfersize | |
1768 | * ahead of time, since the pseudo-DMA code will sit | |
1769 | * in an unconditional loop. | |
1770 | */ | |
1771 | ||
ff3d4578 | 1772 | transfersize = 0; |
7e9ec8d9 | 1773 | if (!cmd->device->borken) |
4a98f896 | 1774 | transfersize = NCR5380_dma_xfer_len(hostdata, cmd); |
ff3d4578 | 1775 | |
438af51c | 1776 | if (transfersize > 0) { |
1da177e4 | 1777 | len = transfersize; |
0d2cf867 | 1778 | if (NCR5380_transfer_dma(instance, &phase, |
ff1269cb | 1779 | &len, (unsigned char **)&ncmd->ptr)) { |
1da177e4 | 1780 | /* |
0d2cf867 FT |
1781 | * If the watchdog timer fires, all future |
1782 | * accesses to this device will use the | |
1783 | * polled-IO. | |
1da177e4 | 1784 | */ |
017560fc | 1785 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 | 1786 | "switching to slow handshake\n"); |
1da177e4 | 1787 | cmd->device->borken = 1; |
f9dfed1c FT |
1788 | do_reset(instance); |
1789 | bus_reset_cleanup(instance); | |
8053b0ee | 1790 | } |
f825e40b | 1791 | } else { |
08348b1c FT |
1792 | /* Transfer a small chunk so that the |
1793 | * irq mode lock is not held too long. | |
1678847e | 1794 | */ |
ff1269cb | 1795 | transfersize = min(ncmd->this_residual, |
08348b1c | 1796 | NCR5380_PIO_CHUNK_SIZE); |
1678847e FT |
1797 | len = transfersize; |
1798 | NCR5380_transfer_pio(instance, &phase, &len, | |
ff1269cb | 1799 | (unsigned char **)&ncmd->ptr, |
e7734ef1 | 1800 | 0); |
ff1269cb | 1801 | ncmd->this_residual -= transfersize - len; |
11d2f63b | 1802 | } |
e9db3198 FT |
1803 | #ifdef CONFIG_SUN3 |
1804 | if (sun3_dma_setup_done == cmd) | |
1805 | sun3_dma_setup_done = NULL; | |
1806 | #endif | |
1678847e | 1807 | return; |
1da177e4 LT |
1808 | case PHASE_MSGIN: |
1809 | len = 1; | |
1810 | data = &tmp; | |
e7734ef1 | 1811 | NCR5380_transfer_pio(instance, &phase, &len, &data, 0); |
ff1269cb | 1812 | ncmd->message = tmp; |
1da177e4 LT |
1813 | |
1814 | switch (tmp) { | |
1da177e4 | 1815 | case ABORT: |
7b25bdb1 | 1816 | set_host_byte(cmd, DID_ABORT); |
61f4f11b | 1817 | fallthrough; |
1da177e4 LT |
1818 | case COMMAND_COMPLETE: |
1819 | /* Accept message by clearing ACK */ | |
1820 | sink = 1; | |
1821 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
0d3d9a42 FT |
1822 | dsprintk(NDEBUG_QUEUES, instance, |
1823 | "COMMAND COMPLETE %p target %d lun %llu\n", | |
1824 | cmd, scmd_id(cmd), cmd->device->lun); | |
1825 | ||
1da177e4 | 1826 | hostdata->connected = NULL; |
45ddc1b2 | 1827 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
1da177e4 | 1828 | |
ff1269cb | 1829 | set_status_byte(cmd, ncmd->status); |
28424d3a | 1830 | |
350767f2 FT |
1831 | set_resid_from_SCp(cmd); |
1832 | ||
f27db8eb | 1833 | if (cmd->cmnd[0] == REQUEST_SENSE) |
677e0194 | 1834 | complete_cmd(instance, cmd); |
f27db8eb | 1835 | else { |
ff1269cb FT |
1836 | if (ncmd->status == SAM_STAT_CHECK_CONDITION || |
1837 | ncmd->status == SAM_STAT_COMMAND_TERMINATED) { | |
f27db8eb FT |
1838 | dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", |
1839 | cmd); | |
1840 | list_add_tail(&ncmd->list, | |
1841 | &hostdata->autosense); | |
1842 | } else | |
1843 | complete_cmd(instance, cmd); | |
1da177e4 LT |
1844 | } |
1845 | ||
aff0cf9a FT |
1846 | /* |
1847 | * Restore phase bits to 0 so an interrupted selection, | |
1da177e4 LT |
1848 | * arbitration can resume. |
1849 | */ | |
1850 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
72064a78 | 1851 | |
1da177e4 LT |
1852 | return; |
1853 | case MESSAGE_REJECT: | |
1854 | /* Accept message by clearing ACK */ | |
1855 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1856 | switch (hostdata->last_message) { | |
1857 | case HEAD_OF_QUEUE_TAG: | |
1858 | case ORDERED_QUEUE_TAG: | |
1859 | case SIMPLE_QUEUE_TAG: | |
1860 | cmd->device->simple_tags = 0; | |
9cb78c16 | 1861 | hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); |
1da177e4 LT |
1862 | break; |
1863 | default: | |
1864 | break; | |
1865 | } | |
340b9612 | 1866 | break; |
0d2cf867 FT |
1867 | case DISCONNECT: |
1868 | /* Accept message by clearing ACK */ | |
1869 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1870 | hostdata->connected = NULL; | |
1871 | list_add(&ncmd->list, &hostdata->disconnected); | |
1872 | dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, | |
1873 | instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", | |
1874 | cmd, scmd_id(cmd), cmd->device->lun); | |
0d3d9a42 | 1875 | |
0d2cf867 FT |
1876 | /* |
1877 | * Restore phase bits to 0 so an interrupted selection, | |
1878 | * arbitration can resume. | |
1879 | */ | |
1880 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1da177e4 | 1881 | |
e9db3198 FT |
1882 | #ifdef SUN3_SCSI_VME |
1883 | dregs->csr |= CSR_DMA_ENABLE; | |
1884 | #endif | |
0d2cf867 | 1885 | return; |
aff0cf9a | 1886 | /* |
1da177e4 | 1887 | * The SCSI data pointer is *IMPLICITLY* saved on a disconnect |
aff0cf9a | 1888 | * operation, in violation of the SCSI spec so we can safely |
1da177e4 LT |
1889 | * ignore SAVE/RESTORE pointers calls. |
1890 | * | |
aff0cf9a | 1891 | * Unfortunately, some disks violate the SCSI spec and |
1da177e4 | 1892 | * don't issue the required SAVE_POINTERS message before |
aff0cf9a | 1893 | * disconnecting, and we have to break spec to remain |
1da177e4 LT |
1894 | * compatible. |
1895 | */ | |
1896 | case SAVE_POINTERS: | |
1897 | case RESTORE_POINTERS: | |
1898 | /* Accept message by clearing ACK */ | |
1899 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1900 | break; | |
1901 | case EXTENDED_MESSAGE: | |
c16df32e FT |
1902 | /* |
1903 | * Start the message buffer with the EXTENDED_MESSAGE | |
1904 | * byte, since spi_print_msg() wants the whole thing. | |
1905 | */ | |
1da177e4 LT |
1906 | extended_msg[0] = EXTENDED_MESSAGE; |
1907 | /* Accept first byte by clearing ACK */ | |
1908 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
11d2f63b FT |
1909 | |
1910 | spin_unlock_irq(&hostdata->lock); | |
1911 | ||
b746545f | 1912 | dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); |
1da177e4 LT |
1913 | |
1914 | len = 2; | |
1915 | data = extended_msg + 1; | |
1916 | phase = PHASE_MSGIN; | |
e7734ef1 | 1917 | NCR5380_transfer_pio(instance, &phase, &len, &data, 1); |
b746545f FT |
1918 | dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", |
1919 | (int)extended_msg[1], | |
1920 | (int)extended_msg[2]); | |
1da177e4 | 1921 | |
e0783ed3 FT |
1922 | if (!len && extended_msg[1] > 0 && |
1923 | extended_msg[1] <= sizeof(extended_msg) - 2) { | |
1da177e4 LT |
1924 | /* Accept third byte by clearing ACK */ |
1925 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1926 | len = extended_msg[1] - 1; | |
1927 | data = extended_msg + 3; | |
1928 | phase = PHASE_MSGIN; | |
1929 | ||
e7734ef1 | 1930 | NCR5380_transfer_pio(instance, &phase, &len, &data, 1); |
b746545f FT |
1931 | dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", |
1932 | len); | |
1da177e4 LT |
1933 | |
1934 | switch (extended_msg[2]) { | |
1935 | case EXTENDED_SDTR: | |
1936 | case EXTENDED_WDTR: | |
1da177e4 LT |
1937 | tmp = 0; |
1938 | } | |
1939 | } else if (len) { | |
6a6ff4ac | 1940 | shost_printk(KERN_ERR, instance, "error receiving extended message\n"); |
1da177e4 LT |
1941 | tmp = 0; |
1942 | } else { | |
6a6ff4ac FT |
1943 | shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", |
1944 | extended_msg[2], extended_msg[1]); | |
1da177e4 LT |
1945 | tmp = 0; |
1946 | } | |
11d2f63b FT |
1947 | |
1948 | spin_lock_irq(&hostdata->lock); | |
1949 | if (!hostdata->connected) | |
1950 | return; | |
1951 | ||
df135e32 | 1952 | /* Reject message */ |
df561f66 | 1953 | fallthrough; |
df135e32 | 1954 | default: |
aff0cf9a FT |
1955 | /* |
1956 | * If we get something weird that we aren't expecting, | |
df135e32 | 1957 | * log it. |
1da177e4 | 1958 | */ |
39bef87c | 1959 | if (tmp == EXTENDED_MESSAGE) |
017560fc | 1960 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 | 1961 | "rejecting unknown extended message code %02x, length %d\n", |
39bef87c FT |
1962 | extended_msg[2], extended_msg[1]); |
1963 | else if (tmp) | |
1964 | scmd_printk(KERN_INFO, cmd, | |
1965 | "rejecting unknown message code %02x\n", | |
1966 | tmp); | |
1da177e4 LT |
1967 | |
1968 | msgout = MESSAGE_REJECT; | |
1969 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1970 | break; | |
0d2cf867 | 1971 | } /* switch (tmp) */ |
1da177e4 LT |
1972 | break; |
1973 | case PHASE_MSGOUT: | |
1974 | len = 1; | |
1975 | data = &msgout; | |
1976 | hostdata->last_message = msgout; | |
e7734ef1 | 1977 | NCR5380_transfer_pio(instance, &phase, &len, &data, 0); |
1da177e4 | 1978 | if (msgout == ABORT) { |
1da177e4 | 1979 | hostdata->connected = NULL; |
45ddc1b2 | 1980 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
1da177e4 | 1981 | cmd->result = DID_ERROR << 16; |
677e0194 | 1982 | complete_cmd(instance, cmd); |
1da177e4 LT |
1983 | return; |
1984 | } | |
1985 | msgout = NOP; | |
1986 | break; | |
1987 | case PHASE_CMDOUT: | |
1988 | len = cmd->cmd_len; | |
1989 | data = cmd->cmnd; | |
aff0cf9a FT |
1990 | /* |
1991 | * XXX for performance reasons, on machines with a | |
1992 | * PSEUDO-DMA architecture we should probably | |
1993 | * use the dma transfer function. | |
1da177e4 | 1994 | */ |
e7734ef1 | 1995 | NCR5380_transfer_pio(instance, &phase, &len, &data, 0); |
1da177e4 LT |
1996 | break; |
1997 | case PHASE_STATIN: | |
1998 | len = 1; | |
1999 | data = &tmp; | |
e7734ef1 | 2000 | NCR5380_transfer_pio(instance, &phase, &len, &data, 0); |
ff1269cb | 2001 | ncmd->status = tmp; |
1da177e4 LT |
2002 | break; |
2003 | default: | |
6a6ff4ac | 2004 | shost_printk(KERN_ERR, instance, "unknown phase\n"); |
4dde8f7d | 2005 | NCR5380_dprint(NDEBUG_ANY, instance); |
0d2cf867 | 2006 | } /* switch(phase) */ |
686f3990 | 2007 | } else { |
11d2f63b | 2008 | spin_unlock_irq(&hostdata->lock); |
d5d37a0a | 2009 | NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 2010 | spin_lock_irq(&hostdata->lock); |
1da177e4 | 2011 | } |
11d2f63b | 2012 | } |
1da177e4 LT |
2013 | } |
2014 | ||
2015 | /* | |
2016 | * Function : void NCR5380_reselect (struct Scsi_Host *instance) | |
2017 | * | |
aff0cf9a | 2018 | * Purpose : does reselection, initializing the instance->connected |
594d4ba3 FT |
2019 | * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q |
2020 | * nexus has been reestablished, | |
aff0cf9a | 2021 | * |
1da177e4 | 2022 | * Inputs : instance - this instance of the NCR5380. |
1da177e4 LT |
2023 | */ |
2024 | ||
0d2cf867 FT |
2025 | static void NCR5380_reselect(struct Scsi_Host *instance) |
2026 | { | |
e8a60144 | 2027 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 2028 | unsigned char target_mask; |
e9db3198 | 2029 | unsigned char lun; |
1da177e4 | 2030 | unsigned char msg[3]; |
32b26a10 FT |
2031 | struct NCR5380_cmd *ncmd; |
2032 | struct scsi_cmnd *tmp; | |
1da177e4 LT |
2033 | |
2034 | /* | |
2035 | * Disable arbitration, etc. since the host adapter obviously | |
2036 | * lost, and tell an interrupted NCR5380_select() to restart. | |
2037 | */ | |
2038 | ||
2039 | NCR5380_write(MODE_REG, MR_BASE); | |
1da177e4 LT |
2040 | |
2041 | target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); | |
7ef55f67 FT |
2042 | if (!target_mask || target_mask & (target_mask - 1)) { |
2043 | shost_printk(KERN_WARNING, instance, | |
2044 | "reselect: bad target_mask 0x%02x\n", target_mask); | |
2045 | return; | |
2046 | } | |
b746545f | 2047 | |
aff0cf9a | 2048 | /* |
1da177e4 LT |
2049 | * At this point, we have detected that our SCSI ID is on the bus, |
2050 | * SEL is true and BSY was false for at least one bus settle delay | |
2051 | * (400 ns). | |
2052 | * | |
2053 | * We must assert BSY ourselves, until the target drops the SEL | |
2054 | * signal. | |
2055 | */ | |
2056 | ||
2057 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); | |
d5d37a0a | 2058 | if (NCR5380_poll_politely(hostdata, |
e7734ef1 | 2059 | STATUS_REG, SR_SEL, 0, 0) < 0) { |
08267216 | 2060 | shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n"); |
72064a78 FT |
2061 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2062 | return; | |
2063 | } | |
1da177e4 LT |
2064 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2065 | ||
2066 | /* | |
2067 | * Wait for target to go into MSGIN. | |
1da177e4 LT |
2068 | */ |
2069 | ||
d5d37a0a | 2070 | if (NCR5380_poll_politely(hostdata, |
e7734ef1 | 2071 | STATUS_REG, SR_REQ, SR_REQ, 0) < 0) { |
ca694afa FT |
2072 | if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0) |
2073 | /* BUS FREE phase */ | |
2074 | return; | |
08267216 | 2075 | shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n"); |
e7734ef1 | 2076 | do_abort(instance, 0); |
72064a78 FT |
2077 | return; |
2078 | } | |
1da177e4 | 2079 | |
e9db3198 FT |
2080 | #ifdef CONFIG_SUN3 |
2081 | /* acknowledge toggle to MSGIN */ | |
2082 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); | |
1da177e4 | 2083 | |
e9db3198 FT |
2084 | /* peek at the byte without really hitting the bus */ |
2085 | msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
2086 | #else | |
2087 | { | |
2088 | int len = 1; | |
2089 | unsigned char *data = msg; | |
2090 | unsigned char phase = PHASE_MSGIN; | |
2091 | ||
e7734ef1 | 2092 | NCR5380_transfer_pio(instance, &phase, &len, &data, 0); |
e9db3198 FT |
2093 | |
2094 | if (len) { | |
e7734ef1 | 2095 | do_abort(instance, 0); |
e9db3198 FT |
2096 | return; |
2097 | } | |
72064a78 | 2098 | } |
e9db3198 | 2099 | #endif /* CONFIG_SUN3 */ |
72064a78 | 2100 | |
1da177e4 | 2101 | if (!(msg[0] & 0x80)) { |
72064a78 | 2102 | shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); |
1abfd370 | 2103 | spi_print_msg(msg); |
72064a78 | 2104 | printk("\n"); |
e7734ef1 | 2105 | do_abort(instance, 0); |
72064a78 FT |
2106 | return; |
2107 | } | |
2108 | lun = msg[0] & 0x07; | |
1da177e4 | 2109 | |
72064a78 FT |
2110 | /* |
2111 | * We need to add code for SCSI-II to track which devices have | |
2112 | * I_T_L_Q nexuses established, and which have simple I_T_L | |
2113 | * nexuses so we can chose to do additional data transfer. | |
2114 | */ | |
1da177e4 | 2115 | |
72064a78 FT |
2116 | /* |
2117 | * Find the command corresponding to the I_T_L or I_T_L_Q nexus we | |
2118 | * just reestablished, and remove it from the disconnected queue. | |
2119 | */ | |
1da177e4 | 2120 | |
32b26a10 FT |
2121 | tmp = NULL; |
2122 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2123 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2124 | ||
2125 | if (target_mask == (1 << scmd_id(cmd)) && | |
2126 | lun == (u8)cmd->device->lun) { | |
2127 | list_del(&ncmd->list); | |
2128 | tmp = cmd; | |
72064a78 | 2129 | break; |
1da177e4 LT |
2130 | } |
2131 | } | |
0d3d9a42 FT |
2132 | |
2133 | if (tmp) { | |
2134 | dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, | |
2135 | "reselect: removed %p from disconnected queue\n", tmp); | |
2136 | } else { | |
45ddc1b2 FT |
2137 | int target = ffs(target_mask) - 1; |
2138 | ||
72064a78 FT |
2139 | shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", |
2140 | target_mask, lun); | |
2141 | /* | |
0d2cf867 FT |
2142 | * Since we have an established nexus that we can't do anything |
2143 | * with, we must abort it. | |
72064a78 | 2144 | */ |
e7734ef1 | 2145 | if (do_abort(instance, 0) == 0) |
45ddc1b2 | 2146 | hostdata->busy[target] &= ~(1 << lun); |
72064a78 | 2147 | return; |
1da177e4 | 2148 | } |
72064a78 | 2149 | |
e9db3198 | 2150 | #ifdef CONFIG_SUN3 |
4a98f896 FT |
2151 | if (sun3_dma_setup_done != tmp) { |
2152 | int count; | |
e9db3198 | 2153 | |
ff1269cb | 2154 | advance_sg_buffer(ncmd); |
e9db3198 | 2155 | |
4a98f896 FT |
2156 | count = sun3scsi_dma_xfer_len(hostdata, tmp); |
2157 | ||
2158 | if (count > 0) { | |
2e4b231a | 2159 | if (tmp->sc_data_direction == DMA_TO_DEVICE) |
4a98f896 | 2160 | sun3scsi_dma_send_setup(hostdata, |
ff1269cb | 2161 | ncmd->ptr, count); |
4a98f896 FT |
2162 | else |
2163 | sun3scsi_dma_recv_setup(hostdata, | |
ff1269cb | 2164 | ncmd->ptr, count); |
e9db3198 FT |
2165 | sun3_dma_setup_done = tmp; |
2166 | } | |
2167 | } | |
2168 | ||
2169 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
2170 | #endif /* CONFIG_SUN3 */ | |
2171 | ||
72064a78 FT |
2172 | /* Accept message by clearing ACK */ |
2173 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2174 | ||
2175 | hostdata->connected = tmp; | |
c4ec6f92 FT |
2176 | dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n", |
2177 | scmd_id(tmp), tmp->device->lun); | |
1da177e4 LT |
2178 | } |
2179 | ||
8b00c3d5 FT |
2180 | /** |
2181 | * list_find_cmd - test for presence of a command in a linked list | |
2182 | * @haystack: list of commands | |
2183 | * @needle: command to search for | |
2184 | */ | |
2185 | ||
2186 | static bool list_find_cmd(struct list_head *haystack, | |
2187 | struct scsi_cmnd *needle) | |
2188 | { | |
2189 | struct NCR5380_cmd *ncmd; | |
2190 | ||
2191 | list_for_each_entry(ncmd, haystack, list) | |
2192 | if (NCR5380_to_scmd(ncmd) == needle) | |
2193 | return true; | |
2194 | return false; | |
2195 | } | |
2196 | ||
2197 | /** | |
2198 | * list_remove_cmd - remove a command from linked list | |
2199 | * @haystack: list of commands | |
2200 | * @needle: command to remove | |
2201 | */ | |
2202 | ||
2203 | static bool list_del_cmd(struct list_head *haystack, | |
2204 | struct scsi_cmnd *needle) | |
2205 | { | |
2206 | if (list_find_cmd(haystack, needle)) { | |
ff1269cb | 2207 | struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(needle); |
8b00c3d5 FT |
2208 | |
2209 | list_del(&ncmd->list); | |
2210 | return true; | |
2211 | } | |
2212 | return false; | |
2213 | } | |
2214 | ||
2215 | /** | |
2216 | * NCR5380_abort - scsi host eh_abort_handler() method | |
2217 | * @cmd: the command to be aborted | |
2218 | * | |
2219 | * Try to abort a given command by removing it from queues and/or sending | |
2220 | * the target an abort message. This may not succeed in causing a target | |
2221 | * to abort the command. Nonetheless, the low-level driver must forget about | |
2222 | * the command because the mid-layer reclaims it and it may be re-issued. | |
2223 | * | |
2224 | * The normal path taken by a command is as follows. For EH we trace this | |
2225 | * same path to locate and abort the command. | |
2226 | * | |
2227 | * unissued -> selecting -> [unissued -> selecting ->]... connected -> | |
2228 | * [disconnected -> connected ->]... | |
2229 | * [autosense -> connected ->] done | |
2230 | * | |
8b00c3d5 FT |
2231 | * If cmd was not found at all then presumably it has already been completed, |
2232 | * in which case return SUCCESS to try to avoid further EH measures. | |
dc183965 | 2233 | * |
8b00c3d5 | 2234 | * If the command has not completed yet, we must not fail to find it. |
dc183965 FT |
2235 | * We have no option but to forget the aborted command (even if it still |
2236 | * lacks sense data). The mid-layer may re-issue a command that is in error | |
2237 | * recovery (see scsi_send_eh_cmnd), but the logic and data structures in | |
2238 | * this driver are such that a command can appear on one queue only. | |
71a00593 FT |
2239 | * |
2240 | * The lock protects driver data structures, but EH handlers also use it | |
2241 | * to serialize their own execution and prevent their own re-entry. | |
1da177e4 LT |
2242 | */ |
2243 | ||
710ddd0d FT |
2244 | static int NCR5380_abort(struct scsi_cmnd *cmd) |
2245 | { | |
1da177e4 | 2246 | struct Scsi_Host *instance = cmd->device->host; |
e8a60144 | 2247 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
11d2f63b | 2248 | unsigned long flags; |
8b00c3d5 | 2249 | int result = SUCCESS; |
1fa6b5fb | 2250 | |
11d2f63b FT |
2251 | spin_lock_irqsave(&hostdata->lock, flags); |
2252 | ||
32b26a10 | 2253 | #if (NDEBUG & NDEBUG_ANY) |
8b00c3d5 | 2254 | scmd_printk(KERN_INFO, cmd, __func__); |
32b26a10 | 2255 | #endif |
e5c3fddf FT |
2256 | NCR5380_dprint(NDEBUG_ANY, instance); |
2257 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
1da177e4 | 2258 | |
8b00c3d5 FT |
2259 | if (list_del_cmd(&hostdata->unissued, cmd)) { |
2260 | dsprintk(NDEBUG_ABORT, instance, | |
2261 | "abort: removed %p from issue queue\n", cmd); | |
2262 | cmd->result = DID_ABORT << 16; | |
117cd238 | 2263 | scsi_done(cmd); /* No tag or busy flag to worry about */ |
dc183965 | 2264 | goto out; |
8b00c3d5 FT |
2265 | } |
2266 | ||
707d62b3 FT |
2267 | if (hostdata->selecting == cmd) { |
2268 | dsprintk(NDEBUG_ABORT, instance, | |
2269 | "abort: cmd %p == selecting\n", cmd); | |
2270 | hostdata->selecting = NULL; | |
2271 | cmd->result = DID_ABORT << 16; | |
2272 | complete_cmd(instance, cmd); | |
2273 | goto out; | |
2274 | } | |
2275 | ||
8b00c3d5 FT |
2276 | if (list_del_cmd(&hostdata->disconnected, cmd)) { |
2277 | dsprintk(NDEBUG_ABORT, instance, | |
2278 | "abort: removed %p from disconnected list\n", cmd); | |
71a00593 FT |
2279 | /* Can't call NCR5380_select() and send ABORT because that |
2280 | * means releasing the lock. Need a bus reset. | |
2281 | */ | |
dc183965 FT |
2282 | set_host_byte(cmd, DID_ERROR); |
2283 | complete_cmd(instance, cmd); | |
71a00593 FT |
2284 | result = FAILED; |
2285 | goto out; | |
8b00c3d5 FT |
2286 | } |
2287 | ||
2288 | if (hostdata->connected == cmd) { | |
2289 | dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); | |
2290 | hostdata->connected = NULL; | |
8b00c3d5 | 2291 | hostdata->dma_len = 0; |
e7734ef1 | 2292 | if (do_abort(instance, 0) < 0) { |
8b00c3d5 FT |
2293 | set_host_byte(cmd, DID_ERROR); |
2294 | complete_cmd(instance, cmd); | |
2295 | result = FAILED; | |
2296 | goto out; | |
2297 | } | |
2298 | set_host_byte(cmd, DID_ABORT); | |
dc183965 FT |
2299 | complete_cmd(instance, cmd); |
2300 | goto out; | |
2301 | } | |
2302 | ||
2303 | if (list_del_cmd(&hostdata->autosense, cmd)) { | |
2304 | dsprintk(NDEBUG_ABORT, instance, | |
2305 | "abort: removed %p from sense queue\n", cmd); | |
8b00c3d5 FT |
2306 | complete_cmd(instance, cmd); |
2307 | } | |
2308 | ||
2309 | out: | |
2310 | if (result == FAILED) | |
2311 | dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); | |
45ddc1b2 FT |
2312 | else { |
2313 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); | |
8b00c3d5 | 2314 | dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); |
45ddc1b2 | 2315 | } |
8b00c3d5 FT |
2316 | |
2317 | queue_work(hostdata->work_q, &hostdata->main_task); | |
11d2f63b | 2318 | spin_unlock_irqrestore(&hostdata->lock, flags); |
32b26a10 | 2319 | |
8b00c3d5 | 2320 | return result; |
1da177e4 LT |
2321 | } |
2322 | ||
2323 | ||
6b0e87a6 | 2324 | static void bus_reset_cleanup(struct Scsi_Host *instance) |
68b3aa7c | 2325 | { |
11d2f63b | 2326 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
62717f53 | 2327 | int i; |
62717f53 | 2328 | struct NCR5380_cmd *ncmd; |
68b3aa7c | 2329 | |
62717f53 FT |
2330 | /* reset NCR registers */ |
2331 | NCR5380_write(MODE_REG, MR_BASE); | |
2332 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
2333 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2334 | ||
2335 | /* After the reset, there are no more connected or disconnected commands | |
2336 | * and no busy units; so clear the low-level status here to avoid | |
2337 | * conflicts when the mid-level code tries to wake up the affected | |
2338 | * commands! | |
2339 | */ | |
2340 | ||
1884c283 FT |
2341 | if (hostdata->selecting) { |
2342 | hostdata->selecting->result = DID_RESET << 16; | |
2343 | complete_cmd(instance, hostdata->selecting); | |
2344 | hostdata->selecting = NULL; | |
2345 | } | |
62717f53 FT |
2346 | |
2347 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2348 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2349 | ||
2350 | set_host_byte(cmd, DID_RESET); | |
216fad91 | 2351 | complete_cmd(instance, cmd); |
62717f53 | 2352 | } |
1884c283 | 2353 | INIT_LIST_HEAD(&hostdata->disconnected); |
62717f53 FT |
2354 | |
2355 | list_for_each_entry(ncmd, &hostdata->autosense, list) { | |
2356 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2357 | ||
117cd238 | 2358 | scsi_done(cmd); |
62717f53 | 2359 | } |
1884c283 | 2360 | INIT_LIST_HEAD(&hostdata->autosense); |
62717f53 FT |
2361 | |
2362 | if (hostdata->connected) { | |
2363 | set_host_byte(hostdata->connected, DID_RESET); | |
2364 | complete_cmd(instance, hostdata->connected); | |
2365 | hostdata->connected = NULL; | |
2366 | } | |
2367 | ||
62717f53 FT |
2368 | for (i = 0; i < 8; ++i) |
2369 | hostdata->busy[i] = 0; | |
62717f53 | 2370 | hostdata->dma_len = 0; |
62717f53 FT |
2371 | |
2372 | queue_work(hostdata->work_q, &hostdata->main_task); | |
6b0e87a6 FT |
2373 | } |
2374 | ||
2375 | /** | |
2376 | * NCR5380_host_reset - reset the SCSI host | |
2377 | * @cmd: SCSI command undergoing EH | |
2378 | * | |
2379 | * Returns SUCCESS | |
2380 | */ | |
2381 | ||
2382 | static int NCR5380_host_reset(struct scsi_cmnd *cmd) | |
2383 | { | |
2384 | struct Scsi_Host *instance = cmd->device->host; | |
2385 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
2386 | unsigned long flags; | |
2387 | struct NCR5380_cmd *ncmd; | |
2388 | ||
2389 | spin_lock_irqsave(&hostdata->lock, flags); | |
2390 | ||
2391 | #if (NDEBUG & NDEBUG_ANY) | |
2392 | shost_printk(KERN_INFO, instance, __func__); | |
2393 | #endif | |
2394 | NCR5380_dprint(NDEBUG_ANY, instance); | |
2395 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
2396 | ||
2397 | list_for_each_entry(ncmd, &hostdata->unissued, list) { | |
2398 | struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd); | |
2399 | ||
2400 | scmd->result = DID_RESET << 16; | |
117cd238 | 2401 | scsi_done(scmd); |
6b0e87a6 FT |
2402 | } |
2403 | INIT_LIST_HEAD(&hostdata->unissued); | |
2404 | ||
2405 | do_reset(instance); | |
2406 | bus_reset_cleanup(instance); | |
2407 | ||
11d2f63b | 2408 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1da177e4 | 2409 | |
1da177e4 LT |
2410 | return SUCCESS; |
2411 | } |