Merge tag 's390-5.3-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
[linux-2.6-block.git] / drivers / scsi / NCR5380.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
aff0cf9a 2/*
1da177e4 3 * NCR 5380 generic driver routines. These should make it *trivial*
594d4ba3
FT
4 * to implement 5380 SCSI drivers under Linux with a non-trantor
5 * architecture.
1da177e4 6 *
594d4ba3 7 * Note that these routines also work with NR53c400 family chips.
1da177e4
LT
8 *
9 * Copyright 1993, Drew Eckhardt
594d4ba3
FT
10 * Visionary Computing
11 * (Unix and Linux consulting and custom programming)
12 * drew@colorado.edu
13 * +1 (303) 666-5836
1da177e4 14 *
aff0cf9a 15 * For more information, please consult
1da177e4
LT
16 *
17 * NCR 5380 Family
18 * SCSI Protocol Controller
19 * Databook
20 *
21 * NCR Microelectronics
22 * 1635 Aeroplaza Drive
23 * Colorado Springs, CO 80916
24 * 1+ (719) 578-3400
25 * 1+ (800) 334-5454
26 */
27
28/*
c16df32e
FT
29 * With contributions from Ray Van Tassle, Ingmar Baumgart,
30 * Ronald van Cuijlenborg, Alan Cox and others.
1da177e4
LT
31 */
32
52d3e561
FT
33/* Ported to Atari by Roman Hodek and others. */
34
e9db3198
FT
35/* Adapted for the Sun 3 by Sam Creasey. */
36
1da177e4
LT
37/*
38 * Design
39 *
aff0cf9a 40 * This is a generic 5380 driver. To use it on a different platform,
1da177e4 41 * one simply writes appropriate system specific macros (ie, data
aff0cf9a 42 * transfer - some PC's will use the I/O bus, 68K's must use
1da177e4
LT
43 * memory mapped) and drops this file in their 'C' wrapper.
44 *
aff0cf9a 45 * As far as command queueing, two queues are maintained for
1da177e4 46 * each 5380 in the system - commands that haven't been issued yet,
aff0cf9a
FT
47 * and commands that are currently executing. This means that an
48 * unlimited number of commands may be queued, letting
49 * more commands propagate from the higher driver levels giving higher
50 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
51 * allowing multiple commands to propagate all the way to a SCSI-II device
1da177e4
LT
52 * while a command is already executing.
53 *
54 *
aff0cf9a 55 * Issues specific to the NCR5380 :
1da177e4 56 *
aff0cf9a
FT
57 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
58 * piece of hardware that requires you to sit in a loop polling for
59 * the REQ signal as long as you are connected. Some devices are
60 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
686f3990 61 * while doing long seek operations. [...] These
1da177e4
LT
62 * broken devices are the exception rather than the rule and I'd rather
63 * spend my time optimizing for the normal case.
64 *
65 * Architecture :
66 *
67 * At the heart of the design is a coroutine, NCR5380_main,
68 * which is started from a workqueue for each NCR5380 host in the
69 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
70 * removing the commands from the issue queue and calling
aff0cf9a 71 * NCR5380_select() if a nexus is not established.
1da177e4
LT
72 *
73 * Once a nexus is established, the NCR5380_information_transfer()
74 * phase goes through the various phases as instructed by the target.
75 * if the target goes into MSG IN and sends a DISCONNECT message,
76 * the command structure is placed into the per instance disconnected
aff0cf9a 77 * queue, and NCR5380_main tries to find more work. If the target is
1da177e4
LT
78 * idle for too long, the system will try to sleep.
79 *
80 * If a command has disconnected, eventually an interrupt will trigger,
81 * calling NCR5380_intr() which will in turn call NCR5380_reselect
82 * to reestablish a nexus. This will run main if necessary.
83 *
aff0cf9a 84 * On command termination, the done function will be called as
1da177e4
LT
85 * appropriate.
86 *
aff0cf9a 87 * SCSI pointers are maintained in the SCp field of SCSI command
1da177e4
LT
88 * structures, being initialized after the command is connected
89 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
90 * Note that in violation of the standard, an implicit SAVE POINTERS operation
91 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
92 */
93
94/*
95 * Using this file :
96 * This file a skeleton Linux SCSI driver for the NCR 5380 series
aff0cf9a 97 * of chips. To use it, you write an architecture specific functions
1da177e4
LT
98 * and macros and include this file in your driver.
99 *
1da177e4 100 * These macros MUST be defined :
aff0cf9a 101 *
1da177e4
LT
102 * NCR5380_read(register) - read from the specified register
103 *
aff0cf9a 104 * NCR5380_write(register, value) - write to the specific register
1da177e4 105 *
aff0cf9a 106 * NCR5380_implementation_fields - additional fields needed for this
594d4ba3 107 * specific implementation of the NCR5380
1da177e4
LT
108 *
109 * Either real DMA *or* pseudo DMA may be implemented
1da177e4 110 *
4a98f896
FT
111 * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer
112 * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
113 * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
114 * NCR5380_dma_residual - residual byte count
1da177e4 115 *
1da177e4 116 * The generic driver is initialized by calling NCR5380_init(instance),
906e4a3c 117 * after setting the appropriate host specific fields and ID.
1da177e4
LT
118 */
119
e5d55d1a
FT
120#ifndef NCR5380_io_delay
121#define NCR5380_io_delay(x)
122#endif
123
52d3e561
FT
124#ifndef NCR5380_acquire_dma_irq
125#define NCR5380_acquire_dma_irq(x) (1)
126#endif
127
128#ifndef NCR5380_release_dma_irq
129#define NCR5380_release_dma_irq(x)
130#endif
131
54d8fe44
FT
132static int do_abort(struct Scsi_Host *);
133static void do_reset(struct Scsi_Host *);
6b0e87a6 134static void bus_reset_cleanup(struct Scsi_Host *);
1da177e4 135
c16df32e 136/**
0d2cf867 137 * initialize_SCp - init the scsi pointer field
594d4ba3 138 * @cmd: command block to set up
1da177e4 139 *
594d4ba3 140 * Set up the internal fields in the SCSI command.
1da177e4
LT
141 */
142
710ddd0d 143static inline void initialize_SCp(struct scsi_cmnd *cmd)
1da177e4 144{
aff0cf9a
FT
145 /*
146 * Initialize the Scsi Pointer field so that all of the commands in the
1da177e4
LT
147 * various queues are valid.
148 */
149
9e0fe44d
BH
150 if (scsi_bufflen(cmd)) {
151 cmd->SCp.buffer = scsi_sglist(cmd);
45711f1a 152 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1da177e4
LT
153 cmd->SCp.this_residual = cmd->SCp.buffer->length;
154 } else {
155 cmd->SCp.buffer = NULL;
9e0fe44d
BH
156 cmd->SCp.ptr = NULL;
157 cmd->SCp.this_residual = 0;
1da177e4 158 }
f27db8eb
FT
159
160 cmd->SCp.Status = 0;
161 cmd->SCp.Message = 0;
1da177e4
LT
162}
163
0e9fdd2b
FT
164static inline void advance_sg_buffer(struct scsi_cmnd *cmd)
165{
166 struct scatterlist *s = cmd->SCp.buffer;
167
168 if (!cmd->SCp.this_residual && s && !sg_is_last(s)) {
169 cmd->SCp.buffer = sg_next(s);
170 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
171 cmd->SCp.this_residual = cmd->SCp.buffer->length;
172 }
173}
174
1da177e4 175/**
b32ade12 176 * NCR5380_poll_politely2 - wait for two chip register values
d5d37a0a 177 * @hostdata: host private data
b32ade12
FT
178 * @reg1: 5380 register to poll
179 * @bit1: Bitmask to check
180 * @val1: Expected value
181 * @reg2: Second 5380 register to poll
182 * @bit2: Second bitmask to check
183 * @val2: Second expected value
2f854b82
FT
184 * @wait: Time-out in jiffies
185 *
186 * Polls the chip in a reasonably efficient manner waiting for an
187 * event to occur. After a short quick poll we begin to yield the CPU
188 * (if possible). In irq contexts the time-out is arbitrarily limited.
189 * Callers may hold locks as long as they are held in irq mode.
190 *
b32ade12 191 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
1da177e4 192 */
2f854b82 193
d5d37a0a 194static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
61e1ce58
FT
195 unsigned int reg1, u8 bit1, u8 val1,
196 unsigned int reg2, u8 bit2, u8 val2,
197 unsigned long wait)
1da177e4 198{
d4408dd7 199 unsigned long n = hostdata->poll_loops;
2f854b82 200 unsigned long deadline = jiffies + wait;
2f854b82 201
2f854b82 202 do {
b32ade12
FT
203 if ((NCR5380_read(reg1) & bit1) == val1)
204 return 0;
205 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4
LT
206 return 0;
207 cpu_relax();
2f854b82
FT
208 } while (n--);
209
210 if (irqs_disabled() || in_interrupt())
211 return -ETIMEDOUT;
212
213 /* Repeatedly sleep for 1 ms until deadline */
214 while (time_is_after_jiffies(deadline)) {
215 schedule_timeout_uninterruptible(1);
b32ade12
FT
216 if ((NCR5380_read(reg1) & bit1) == val1)
217 return 0;
218 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4 219 return 0;
1da177e4 220 }
2f854b82 221
1da177e4
LT
222 return -ETIMEDOUT;
223}
224
185a7a1c 225#if NDEBUG
1da177e4
LT
226static struct {
227 unsigned char mask;
228 const char *name;
aff0cf9a
FT
229} signals[] = {
230 {SR_DBP, "PARITY"},
231 {SR_RST, "RST"},
232 {SR_BSY, "BSY"},
233 {SR_REQ, "REQ"},
234 {SR_MSG, "MSG"},
235 {SR_CD, "CD"},
236 {SR_IO, "IO"},
237 {SR_SEL, "SEL"},
1da177e4 238 {0, NULL}
aff0cf9a 239},
1da177e4 240basrs[] = {
12866b99
FT
241 {BASR_END_DMA_TRANSFER, "END OF DMA"},
242 {BASR_DRQ, "DRQ"},
243 {BASR_PARITY_ERROR, "PARITY ERROR"},
244 {BASR_IRQ, "IRQ"},
245 {BASR_PHASE_MATCH, "PHASE MATCH"},
246 {BASR_BUSY_ERROR, "BUSY ERROR"},
aff0cf9a
FT
247 {BASR_ATN, "ATN"},
248 {BASR_ACK, "ACK"},
1da177e4 249 {0, NULL}
aff0cf9a
FT
250},
251icrs[] = {
252 {ICR_ASSERT_RST, "ASSERT RST"},
12866b99
FT
253 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
254 {ICR_ARBITRATION_LOST, "LOST ARB."},
aff0cf9a
FT
255 {ICR_ASSERT_ACK, "ASSERT ACK"},
256 {ICR_ASSERT_BSY, "ASSERT BSY"},
257 {ICR_ASSERT_SEL, "ASSERT SEL"},
258 {ICR_ASSERT_ATN, "ASSERT ATN"},
259 {ICR_ASSERT_DATA, "ASSERT DATA"},
1da177e4 260 {0, NULL}
aff0cf9a
FT
261},
262mrs[] = {
12866b99
FT
263 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
264 {MR_TARGET, "TARGET"},
265 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
266 {MR_ENABLE_PAR_INTR, "PARITY INTR"},
267 {MR_ENABLE_EOP_INTR, "EOP INTR"},
268 {MR_MONITOR_BSY, "MONITOR BSY"},
269 {MR_DMA_MODE, "DMA MODE"},
270 {MR_ARBITRATE, "ARBITRATE"},
1da177e4
LT
271 {0, NULL}
272};
273
274/**
0d2cf867
FT
275 * NCR5380_print - print scsi bus signals
276 * @instance: adapter state to dump
1da177e4 277 *
594d4ba3 278 * Print the SCSI bus signals for debugging purposes
1da177e4
LT
279 */
280
281static void NCR5380_print(struct Scsi_Host *instance)
282{
61e1ce58 283 struct NCR5380_hostdata *hostdata = shost_priv(instance);
8cee3e16 284 unsigned char status, basr, mr, icr, i;
1da177e4 285
1da177e4
LT
286 status = NCR5380_read(STATUS_REG);
287 mr = NCR5380_read(MODE_REG);
288 icr = NCR5380_read(INITIATOR_COMMAND_REG);
289 basr = NCR5380_read(BUS_AND_STATUS_REG);
290
12866b99 291 printk(KERN_DEBUG "SR = 0x%02x : ", status);
1da177e4
LT
292 for (i = 0; signals[i].mask; ++i)
293 if (status & signals[i].mask)
12866b99
FT
294 printk(KERN_CONT "%s, ", signals[i].name);
295 printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
1da177e4
LT
296 for (i = 0; basrs[i].mask; ++i)
297 if (basr & basrs[i].mask)
12866b99
FT
298 printk(KERN_CONT "%s, ", basrs[i].name);
299 printk(KERN_CONT "\nICR = 0x%02x : ", icr);
1da177e4
LT
300 for (i = 0; icrs[i].mask; ++i)
301 if (icr & icrs[i].mask)
12866b99
FT
302 printk(KERN_CONT "%s, ", icrs[i].name);
303 printk(KERN_CONT "\nMR = 0x%02x : ", mr);
1da177e4
LT
304 for (i = 0; mrs[i].mask; ++i)
305 if (mr & mrs[i].mask)
12866b99
FT
306 printk(KERN_CONT "%s, ", mrs[i].name);
307 printk(KERN_CONT "\n");
1da177e4
LT
308}
309
0d2cf867
FT
310static struct {
311 unsigned char value;
312 const char *name;
313} phases[] = {
314 {PHASE_DATAOUT, "DATAOUT"},
315 {PHASE_DATAIN, "DATAIN"},
316 {PHASE_CMDOUT, "CMDOUT"},
317 {PHASE_STATIN, "STATIN"},
318 {PHASE_MSGOUT, "MSGOUT"},
319 {PHASE_MSGIN, "MSGIN"},
320 {PHASE_UNKNOWN, "UNKNOWN"}
321};
1da177e4 322
c16df32e 323/**
0d2cf867 324 * NCR5380_print_phase - show SCSI phase
594d4ba3 325 * @instance: adapter to dump
1da177e4 326 *
594d4ba3 327 * Print the current SCSI phase for debugging purposes
1da177e4
LT
328 */
329
330static void NCR5380_print_phase(struct Scsi_Host *instance)
331{
61e1ce58 332 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
333 unsigned char status;
334 int i;
1da177e4
LT
335
336 status = NCR5380_read(STATUS_REG);
337 if (!(status & SR_REQ))
6a6ff4ac 338 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
1da177e4 339 else {
0d2cf867
FT
340 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
341 (phases[i].value != (status & PHASE_MASK)); ++i)
342 ;
6a6ff4ac 343 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
1da177e4
LT
344 }
345}
346#endif
347
1da177e4 348/**
09028461 349 * NCR5380_info - report driver and host information
594d4ba3 350 * @instance: relevant scsi host instance
1da177e4 351 *
594d4ba3 352 * For use as the host template info() handler.
1da177e4
LT
353 */
354
8c32513b 355static const char *NCR5380_info(struct Scsi_Host *instance)
1da177e4 356{
8c32513b
FT
357 struct NCR5380_hostdata *hostdata = shost_priv(instance);
358
359 return hostdata->info;
360}
361
1da177e4 362/**
0d2cf867 363 * NCR5380_init - initialise an NCR5380
594d4ba3
FT
364 * @instance: adapter to configure
365 * @flags: control flags
1da177e4 366 *
594d4ba3
FT
367 * Initializes *instance and corresponding 5380 chip,
368 * with flags OR'd into the initial flags value.
1da177e4 369 *
594d4ba3 370 * Notes : I assume that the host, hostno, and id bits have been
0d2cf867 371 * set correctly. I don't care about the irq and other fields.
1da177e4 372 *
594d4ba3 373 * Returns 0 for success
1da177e4
LT
374 */
375
6f039790 376static int NCR5380_init(struct Scsi_Host *instance, int flags)
1da177e4 377{
e8a60144 378 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 379 int i;
2f854b82 380 unsigned long deadline;
d4408dd7 381 unsigned long accesses_per_ms;
1da177e4 382
ae5e33af
FT
383 instance->max_lun = 7;
384
0d2cf867 385 hostdata->host = instance;
1da177e4 386 hostdata->id_mask = 1 << instance->this_id;
0d2cf867 387 hostdata->id_higher_mask = 0;
1da177e4
LT
388 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
389 if (i > hostdata->id_mask)
390 hostdata->id_higher_mask |= i;
391 for (i = 0; i < 8; ++i)
392 hostdata->busy[i] = 0;
e4dec680
FT
393 hostdata->dma_len = 0;
394
11d2f63b 395 spin_lock_init(&hostdata->lock);
1da177e4 396 hostdata->connected = NULL;
f27db8eb
FT
397 hostdata->sensing = NULL;
398 INIT_LIST_HEAD(&hostdata->autosense);
32b26a10
FT
399 INIT_LIST_HEAD(&hostdata->unissued);
400 INIT_LIST_HEAD(&hostdata->disconnected);
401
55181be8 402 hostdata->flags = flags;
aff0cf9a 403
8d8601a7 404 INIT_WORK(&hostdata->main_task, NCR5380_main);
0ad0eff9
FT
405 hostdata->work_q = alloc_workqueue("ncr5380_%d",
406 WQ_UNBOUND | WQ_MEM_RECLAIM,
407 1, instance->host_no);
408 if (!hostdata->work_q)
409 return -ENOMEM;
410
09028461
FT
411 snprintf(hostdata->info, sizeof(hostdata->info),
412 "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
413 instance->hostt->name, instance->irq, hostdata->io_port,
414 hostdata->base, instance->can_queue, instance->cmd_per_lun,
415 instance->sg_tablesize, instance->this_id,
416 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
417 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
418 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
8c32513b 419
1da177e4
LT
420 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
421 NCR5380_write(MODE_REG, MR_BASE);
422 NCR5380_write(TARGET_COMMAND_REG, 0);
423 NCR5380_write(SELECT_ENABLE_REG, 0);
2f854b82
FT
424
425 /* Calibrate register polling loop */
426 i = 0;
427 deadline = jiffies + 1;
428 do {
429 cpu_relax();
430 } while (time_is_after_jiffies(deadline));
431 deadline += msecs_to_jiffies(256);
432 do {
433 NCR5380_read(STATUS_REG);
434 ++i;
435 cpu_relax();
436 } while (time_is_after_jiffies(deadline));
d4408dd7
FT
437 accesses_per_ms = i / 256;
438 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
2f854b82 439
b6488f97
FT
440 return 0;
441}
1da177e4 442
b6488f97
FT
443/**
444 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
445 * @instance: adapter to check
446 *
447 * If the system crashed, it may have crashed with a connected target and
448 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
449 * currently established nexus, which we know nothing about. Failing that
450 * do a bus reset.
451 *
452 * Note that a bus reset will cause the chip to assert IRQ.
453 *
454 * Returns 0 if successful, otherwise -ENXIO.
455 */
456
457static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
458{
9c3f0e2b 459 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 460 int pass;
1da177e4
LT
461
462 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
463 switch (pass) {
464 case 1:
465 case 3:
466 case 5:
636b1ec8 467 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
d5d37a0a 468 NCR5380_poll_politely(hostdata,
636b1ec8 469 STATUS_REG, SR_BSY, 0, 5 * HZ);
1da177e4
LT
470 break;
471 case 2:
636b1ec8 472 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
1da177e4
LT
473 do_abort(instance);
474 break;
475 case 4:
636b1ec8 476 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
1da177e4 477 do_reset(instance);
9c3f0e2b
FT
478 /* Wait after a reset; the SCSI standard calls for
479 * 250ms, we wait 500ms to be on the safe side.
480 * But some Toshiba CD-ROMs need ten times that.
481 */
482 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
483 msleep(2500);
484 else
485 msleep(500);
1da177e4
LT
486 break;
487 case 6:
636b1ec8 488 shost_printk(KERN_ERR, instance, "bus locked solid\n");
1da177e4
LT
489 return -ENXIO;
490 }
491 }
492 return 0;
493}
494
495/**
0d2cf867 496 * NCR5380_exit - remove an NCR5380
594d4ba3 497 * @instance: adapter to remove
0d2cf867
FT
498 *
499 * Assumes that no more work can be queued (e.g. by NCR5380_intr).
1da177e4
LT
500 */
501
a43cf0f3 502static void NCR5380_exit(struct Scsi_Host *instance)
1da177e4 503{
e8a60144 504 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 505
8d8601a7 506 cancel_work_sync(&hostdata->main_task);
0ad0eff9 507 destroy_workqueue(hostdata->work_q);
1da177e4
LT
508}
509
677e0194
FT
510/**
511 * complete_cmd - finish processing a command and return it to the SCSI ML
512 * @instance: the host instance
513 * @cmd: command to complete
514 */
515
516static void complete_cmd(struct Scsi_Host *instance,
517 struct scsi_cmnd *cmd)
518{
519 struct NCR5380_hostdata *hostdata = shost_priv(instance);
520
521 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
522
f27db8eb
FT
523 if (hostdata->sensing == cmd) {
524 /* Autosense processing ends here */
07035651 525 if (status_byte(cmd->result) != GOOD) {
f27db8eb 526 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
07035651 527 } else {
f27db8eb 528 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
07035651
FT
529 set_driver_byte(cmd, DRIVER_SENSE);
530 }
f27db8eb
FT
531 hostdata->sensing = NULL;
532 }
533
677e0194
FT
534 cmd->scsi_done(cmd);
535}
536
1da177e4 537/**
1bb40589
FT
538 * NCR5380_queue_command - queue a command
539 * @instance: the relevant SCSI adapter
540 * @cmd: SCSI command
1da177e4 541 *
1bb40589
FT
542 * cmd is added to the per-instance issue queue, with minor
543 * twiddling done to the host specific fields of cmd. If the
544 * main coroutine is not running, it is restarted.
1da177e4
LT
545 */
546
1bb40589
FT
547static int NCR5380_queue_command(struct Scsi_Host *instance,
548 struct scsi_cmnd *cmd)
1da177e4 549{
1bb40589 550 struct NCR5380_hostdata *hostdata = shost_priv(instance);
32b26a10 551 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1bb40589 552 unsigned long flags;
1da177e4
LT
553
554#if (NDEBUG & NDEBUG_NO_WRITE)
555 switch (cmd->cmnd[0]) {
556 case WRITE_6:
557 case WRITE_10:
dbb6b350 558 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
1da177e4 559 cmd->result = (DID_ERROR << 16);
1bb40589 560 cmd->scsi_done(cmd);
1da177e4
LT
561 return 0;
562 }
0d2cf867 563#endif /* (NDEBUG & NDEBUG_NO_WRITE) */
1da177e4 564
1da177e4
LT
565 cmd->result = 0;
566
52d3e561
FT
567 if (!NCR5380_acquire_dma_irq(instance))
568 return SCSI_MLQUEUE_HOST_BUSY;
569
11d2f63b 570 spin_lock_irqsave(&hostdata->lock, flags);
1bb40589 571
aff0cf9a
FT
572 /*
573 * Insert the cmd into the issue queue. Note that REQUEST SENSE
1da177e4 574 * commands are added to the head of the queue since any command will
aff0cf9a 575 * clear the contingent allegiance condition that exists and the
1da177e4
LT
576 * sense data is only guaranteed to be valid while the condition exists.
577 */
578
32b26a10
FT
579 if (cmd->cmnd[0] == REQUEST_SENSE)
580 list_add(&ncmd->list, &hostdata->unissued);
581 else
582 list_add_tail(&ncmd->list, &hostdata->unissued);
583
11d2f63b 584 spin_unlock_irqrestore(&hostdata->lock, flags);
1bb40589 585
dbb6b350
FT
586 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
587 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
1da177e4 588
1da177e4 589 /* Kick off command processing */
8d8601a7 590 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4
LT
591 return 0;
592}
593
52d3e561
FT
594static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
595{
596 struct NCR5380_hostdata *hostdata = shost_priv(instance);
597
598 /* Caller does the locking needed to set & test these data atomically */
599 if (list_empty(&hostdata->disconnected) &&
600 list_empty(&hostdata->unissued) &&
601 list_empty(&hostdata->autosense) &&
602 !hostdata->connected &&
4ab2a787 603 !hostdata->selecting) {
52d3e561 604 NCR5380_release_dma_irq(instance);
4ab2a787 605 }
52d3e561
FT
606}
607
f27db8eb
FT
608/**
609 * dequeue_next_cmd - dequeue a command for processing
610 * @instance: the scsi host instance
611 *
612 * Priority is given to commands on the autosense queue. These commands
613 * need autosense because of a CHECK CONDITION result.
614 *
615 * Returns a command pointer if a command is found for a target that is
616 * not already busy. Otherwise returns NULL.
617 */
618
619static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
620{
621 struct NCR5380_hostdata *hostdata = shost_priv(instance);
622 struct NCR5380_cmd *ncmd;
623 struct scsi_cmnd *cmd;
624
8d5dbec3 625 if (hostdata->sensing || list_empty(&hostdata->autosense)) {
f27db8eb
FT
626 list_for_each_entry(ncmd, &hostdata->unissued, list) {
627 cmd = NCR5380_to_scmd(ncmd);
628 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
629 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
630
631 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
632 list_del(&ncmd->list);
633 dsprintk(NDEBUG_QUEUES, instance,
634 "dequeue: removed %p from issue queue\n", cmd);
635 return cmd;
636 }
637 }
638 } else {
639 /* Autosense processing begins here */
640 ncmd = list_first_entry(&hostdata->autosense,
641 struct NCR5380_cmd, list);
642 list_del(&ncmd->list);
643 cmd = NCR5380_to_scmd(ncmd);
644 dsprintk(NDEBUG_QUEUES, instance,
645 "dequeue: removed %p from autosense queue\n", cmd);
646 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
647 hostdata->sensing = cmd;
648 return cmd;
649 }
650 return NULL;
651}
652
653static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
654{
655 struct NCR5380_hostdata *hostdata = shost_priv(instance);
656 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
657
8d5dbec3 658 if (hostdata->sensing == cmd) {
f27db8eb
FT
659 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
660 list_add(&ncmd->list, &hostdata->autosense);
661 hostdata->sensing = NULL;
662 } else
663 list_add(&ncmd->list, &hostdata->unissued);
664}
665
1da177e4 666/**
0d2cf867 667 * NCR5380_main - NCR state machines
1da177e4 668 *
594d4ba3
FT
669 * NCR5380_main is a coroutine that runs as long as more work can
670 * be done on the NCR5380 host adapters in a system. Both
671 * NCR5380_queue_command() and NCR5380_intr() will try to start it
672 * in case it is not running.
1da177e4
LT
673 */
674
c4028958 675static void NCR5380_main(struct work_struct *work)
1da177e4 676{
c4028958 677 struct NCR5380_hostdata *hostdata =
8d8601a7 678 container_of(work, struct NCR5380_hostdata, main_task);
1da177e4 679 struct Scsi_Host *instance = hostdata->host;
1da177e4 680 int done;
aff0cf9a 681
1da177e4 682 do {
1da177e4 683 done = 1;
11d2f63b 684
0a4e3612 685 spin_lock_irq(&hostdata->lock);
ccf6efd7
FT
686 while (!hostdata->connected && !hostdata->selecting) {
687 struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
688
689 if (!cmd)
690 break;
1da177e4 691
f27db8eb 692 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
76f13b93 693
f27db8eb
FT
694 /*
695 * Attempt to establish an I_T_L nexus here.
696 * On success, instance->hostdata->connected is set.
697 * On failure, we must add the command back to the
698 * issue queue so we can keep trying.
699 */
700 /*
701 * REQUEST SENSE commands are issued without tagged
702 * queueing, even on SCSI-II devices because the
703 * contingent allegiance condition exists for the
704 * entire unit.
705 */
11d2f63b 706
ccf6efd7 707 if (!NCR5380_select(instance, cmd)) {
707d62b3 708 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
52d3e561 709 maybe_release_dma_irq(instance);
f27db8eb
FT
710 } else {
711 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
712 "main: select failed, returning %p to queue\n", cmd);
713 requeue_cmd(instance, cmd);
714 }
715 }
e4dec680 716 if (hostdata->connected && !hostdata->dma_len) {
b746545f 717 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
1da177e4 718 NCR5380_information_transfer(instance);
1da177e4 719 done = 0;
1d3db59d 720 }
57f31326
FT
721 if (!hostdata->connected)
722 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
0a4e3612
FT
723 spin_unlock_irq(&hostdata->lock);
724 if (!done)
725 cond_resched();
1da177e4 726 } while (!done);
1da177e4
LT
727}
728
8053b0ee
FT
729/*
730 * NCR5380_dma_complete - finish DMA transfer
731 * @instance: the scsi host instance
732 *
733 * Called by the interrupt handler when DMA finishes or a phase
734 * mismatch occurs (which would end the DMA transfer).
735 */
736
737static void NCR5380_dma_complete(struct Scsi_Host *instance)
738{
739 struct NCR5380_hostdata *hostdata = shost_priv(instance);
740 int transferred;
741 unsigned char **data;
742 int *count;
743 int saved_data = 0, overrun = 0;
744 unsigned char p;
745
746 if (hostdata->read_overruns) {
747 p = hostdata->connected->SCp.phase;
748 if (p & SR_IO) {
749 udelay(10);
750 if ((NCR5380_read(BUS_AND_STATUS_REG) &
751 (BASR_PHASE_MATCH | BASR_ACK)) ==
752 (BASR_PHASE_MATCH | BASR_ACK)) {
753 saved_data = NCR5380_read(INPUT_DATA_REG);
754 overrun = 1;
755 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
756 }
757 }
758 }
759
e9db3198
FT
760#ifdef CONFIG_SUN3
761 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) {
762 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
763 instance->host_no);
764 BUG();
765 }
766
767 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
768 (BASR_PHASE_MATCH | BASR_ACK)) {
769 pr_err("scsi%d: BASR %02x\n", instance->host_no,
770 NCR5380_read(BUS_AND_STATUS_REG));
771 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
772 instance->host_no);
773 BUG();
774 }
775#endif
776
8053b0ee
FT
777 NCR5380_write(MODE_REG, MR_BASE);
778 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
779 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
780
4a98f896 781 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
8053b0ee
FT
782 hostdata->dma_len = 0;
783
784 data = (unsigned char **)&hostdata->connected->SCp.ptr;
785 count = &hostdata->connected->SCp.this_residual;
786 *data += transferred;
787 *count -= transferred;
788
789 if (hostdata->read_overruns) {
790 int cnt, toPIO;
791
792 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
793 cnt = toPIO = hostdata->read_overruns;
794 if (overrun) {
795 dsprintk(NDEBUG_DMA, instance,
796 "Got an input overrun, using saved byte\n");
797 *(*data)++ = saved_data;
798 (*count)--;
799 cnt--;
800 toPIO--;
801 }
802 if (toPIO > 0) {
803 dsprintk(NDEBUG_DMA, instance,
804 "Doing %d byte PIO to 0x%p\n", cnt, *data);
805 NCR5380_transfer_pio(instance, &p, &cnt, data);
806 *count -= toPIO - cnt;
807 }
808 }
809 }
810}
811
1da177e4 812/**
cd400825
FT
813 * NCR5380_intr - generic NCR5380 irq handler
814 * @irq: interrupt number
815 * @dev_id: device info
816 *
817 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
818 * from the disconnected queue, and restarting NCR5380_main()
819 * as required.
820 *
821 * The chip can assert IRQ in any of six different conditions. The IRQ flag
822 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
823 * Three of these six conditions are latched in the Bus and Status Register:
824 * - End of DMA (cleared by ending DMA Mode)
825 * - Parity error (cleared by reading RPIR)
826 * - Loss of BSY (cleared by reading RPIR)
827 * Two conditions have flag bits that are not latched:
828 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
829 * - Bus reset (non-maskable)
830 * The remaining condition has no flag bit at all:
831 * - Selection/reselection
832 *
833 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
834 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
835 * claimed that "the design of the [DP8490] interrupt logic ensures
836 * interrupts will not be lost (they can be on the DP5380)."
837 * The L5380/53C80 datasheet from LOGIC Devices has more details.
838 *
839 * Checking for bus reset by reading RST is futile because of interrupt
840 * latency, but a bus reset will reset chip logic. Checking for parity error
841 * is unnecessary because that interrupt is never enabled. A Loss of BSY
842 * condition will clear DMA Mode. We can tell when this occurs because the
843 * the Busy Monitor interrupt is enabled together with DMA Mode.
1da177e4
LT
844 */
845
a46865dc 846static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
1da177e4 847{
baa9aac6 848 struct Scsi_Host *instance = dev_id;
cd400825
FT
849 struct NCR5380_hostdata *hostdata = shost_priv(instance);
850 int handled = 0;
1da177e4
LT
851 unsigned char basr;
852 unsigned long flags;
853
11d2f63b 854 spin_lock_irqsave(&hostdata->lock, flags);
cd400825
FT
855
856 basr = NCR5380_read(BUS_AND_STATUS_REG);
857 if (basr & BASR_IRQ) {
858 unsigned char mr = NCR5380_read(MODE_REG);
859 unsigned char sr = NCR5380_read(STATUS_REG);
860
b746545f
FT
861 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
862 irq, basr, sr, mr);
1da177e4 863
8053b0ee
FT
864 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
865 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
866 * We ack IRQ after clearing Mode Register. Workarounds
867 * for End of DMA errata need to happen in DMA Mode.
868 */
869
870 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
871
872 if (hostdata->connected) {
873 NCR5380_dma_complete(instance);
874 queue_work(hostdata->work_q, &hostdata->main_task);
875 } else {
876 NCR5380_write(MODE_REG, MR_BASE);
877 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
878 }
879 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
cd400825
FT
880 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
881 /* Probably reselected */
882 NCR5380_write(SELECT_ENABLE_REG, 0);
883 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
884
b746545f 885 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
cd400825
FT
886
887 if (!hostdata->connected) {
888 NCR5380_reselect(instance);
889 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4 890 }
cd400825
FT
891 if (!hostdata->connected)
892 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
893 } else {
894 /* Probably Bus Reset */
895 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
896
6b0e87a6
FT
897 if (sr & SR_RST) {
898 /* Certainly Bus Reset */
899 shost_printk(KERN_WARNING, instance,
900 "bus reset interrupt\n");
901 bus_reset_cleanup(instance);
902 } else {
903 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
904 }
e9db3198
FT
905#ifdef SUN3_SCSI_VME
906 dregs->csr |= CSR_DMA_ENABLE;
907#endif
cd400825
FT
908 }
909 handled = 1;
910 } else {
9af9fecb 911 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
e9db3198
FT
912#ifdef SUN3_SCSI_VME
913 dregs->csr |= CSR_DMA_ENABLE;
914#endif
cd400825
FT
915 }
916
11d2f63b 917 spin_unlock_irqrestore(&hostdata->lock, flags);
cd400825
FT
918
919 return IRQ_RETVAL(handled);
1da177e4
LT
920}
921
dad8261e
FT
922/**
923 * NCR5380_select - attempt arbitration and selection for a given command
924 * @instance: the Scsi_Host instance
925 * @cmd: the scsi_cmnd to execute
1da177e4 926 *
dad8261e
FT
927 * This routine establishes an I_T_L nexus for a SCSI command. This involves
928 * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message.
aff0cf9a 929 *
dad8261e
FT
930 * Returns true if the operation should be retried.
931 * Returns false if it should not be retried.
1da177e4 932 *
aff0cf9a 933 * Side effects :
594d4ba3
FT
934 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
935 * with registers as they should have been on entry - ie
936 * SELECT_ENABLE will be set appropriately, the NCR5380
937 * will cease to drive any SCSI bus signals.
1da177e4 938 *
dad8261e
FT
939 * If successful : the I_T_L nexus will be established, and
940 * hostdata->connected will be set to cmd.
594d4ba3 941 * SELECT interrupt will be disabled.
1da177e4 942 *
594d4ba3
FT
943 * If failed (no target) : cmd->scsi_done() will be called, and the
944 * cmd->result host byte set to DID_BAD_TARGET.
1da177e4 945 */
aff0cf9a 946
dad8261e 947static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
4ab2a787 948 __releases(&hostdata->lock) __acquires(&hostdata->lock)
1da177e4 949{
e8a60144 950 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
951 unsigned char tmp[3], phase;
952 unsigned char *data;
953 int len;
1da177e4 954 int err;
dad8261e 955 bool ret = true;
7c8ed783
FT
956 bool can_disconnect = instance->irq != NO_IRQ &&
957 cmd->cmnd[0] != REQUEST_SENSE;
1da177e4 958
1da177e4 959 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
b746545f
FT
960 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
961 instance->this_id);
1da177e4 962
707d62b3
FT
963 /*
964 * Arbitration and selection phases are slow and involve dropping the
965 * lock, so we have to watch out for EH. An exception handler may
dad8261e 966 * change 'selecting' to NULL. This function will then return false
707d62b3
FT
967 * so that the caller will forget about 'cmd'. (During information
968 * transfer phases, EH may change 'connected' to NULL.)
969 */
970 hostdata->selecting = cmd;
971
aff0cf9a
FT
972 /*
973 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
1da177e4
LT
974 * data bus during SELECTION.
975 */
976
977 NCR5380_write(TARGET_COMMAND_REG, 0);
978
aff0cf9a 979 /*
1da177e4
LT
980 * Start arbitration.
981 */
982
983 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
984 NCR5380_write(MODE_REG, MR_ARBITRATE);
985
55500d9b
FT
986 /* The chip now waits for BUS FREE phase. Then after the 800 ns
987 * Bus Free Delay, arbitration will begin.
988 */
1da177e4 989
11d2f63b 990 spin_unlock_irq(&hostdata->lock);
d5d37a0a 991 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
b32ade12
FT
992 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
993 ICR_ARBITRATION_PROGRESS, HZ);
11d2f63b 994 spin_lock_irq(&hostdata->lock);
b32ade12
FT
995 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
996 /* Reselection interrupt */
707d62b3 997 goto out;
b32ade12 998 }
ccf6efd7
FT
999 if (!hostdata->selecting) {
1000 /* Command was aborted */
1001 NCR5380_write(MODE_REG, MR_BASE);
dad8261e 1002 return false;
ccf6efd7 1003 }
b32ade12
FT
1004 if (err < 0) {
1005 NCR5380_write(MODE_REG, MR_BASE);
1006 shost_printk(KERN_ERR, instance,
1007 "select: arbitration timeout\n");
707d62b3 1008 goto out;
1da177e4 1009 }
11d2f63b 1010 spin_unlock_irq(&hostdata->lock);
1da177e4 1011
55500d9b 1012 /* The SCSI-2 arbitration delay is 2.4 us */
1da177e4
LT
1013 udelay(3);
1014
1015 /* Check for lost arbitration */
0d2cf867
FT
1016 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1017 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1018 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1da177e4 1019 NCR5380_write(MODE_REG, MR_BASE);
b746545f 1020 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
11d2f63b 1021 spin_lock_irq(&hostdata->lock);
707d62b3 1022 goto out;
1da177e4 1023 }
cf13b083
FT
1024
1025 /* After/during arbitration, BSY should be asserted.
1026 * IBM DPES-31080 Version S31Q works now
1027 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1028 */
1029 NCR5380_write(INITIATOR_COMMAND_REG,
1030 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1da177e4 1031
aff0cf9a
FT
1032 /*
1033 * Again, bus clear + bus settle time is 1.2us, however, this is
1da177e4
LT
1034 * a minimum so we'll udelay ceil(1.2)
1035 */
1036
9c3f0e2b
FT
1037 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1038 udelay(15);
1039 else
1040 udelay(2);
1da177e4 1041
11d2f63b
FT
1042 spin_lock_irq(&hostdata->lock);
1043
72064a78
FT
1044 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1045 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
707d62b3
FT
1046 goto out;
1047
1048 if (!hostdata->selecting) {
1049 NCR5380_write(MODE_REG, MR_BASE);
1050 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
dad8261e 1051 return false;
707d62b3 1052 }
72064a78 1053
b746545f 1054 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1da177e4 1055
aff0cf9a
FT
1056 /*
1057 * Now that we have won arbitration, start Selection process, asserting
1da177e4
LT
1058 * the host and target ID's on the SCSI bus.
1059 */
1060
3d07d22b 1061 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1da177e4 1062
aff0cf9a 1063 /*
1da177e4
LT
1064 * Raise ATN while SEL is true before BSY goes false from arbitration,
1065 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1066 * phase immediately after selection.
1067 */
1068
3d07d22b
FT
1069 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1070 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1da177e4
LT
1071 NCR5380_write(MODE_REG, MR_BASE);
1072
aff0cf9a 1073 /*
1da177e4
LT
1074 * Reselect interrupts must be turned off prior to the dropping of BSY,
1075 * otherwise we will trigger an interrupt.
1076 */
1077 NCR5380_write(SELECT_ENABLE_REG, 0);
1078
11d2f63b
FT
1079 spin_unlock_irq(&hostdata->lock);
1080
1da177e4 1081 /*
aff0cf9a 1082 * The initiator shall then wait at least two deskew delays and release
1da177e4
LT
1083 * the BSY signal.
1084 */
0d2cf867 1085 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1da177e4
LT
1086
1087 /* Reset BSY */
3d07d22b
FT
1088 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1089 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1da177e4 1090
aff0cf9a 1091 /*
1da177e4 1092 * Something weird happens when we cease to drive BSY - looks
aff0cf9a 1093 * like the board/chip is letting us do another read before the
1da177e4
LT
1094 * appropriate propagation delay has expired, and we're confusing
1095 * a BSY signal from ourselves as the target's response to SELECTION.
1096 *
1097 * A small delay (the 'C++' frontend breaks the pipeline with an
1098 * unnecessary jump, making it work on my 386-33/Trantor T128, the
aff0cf9a
FT
1099 * tighter 'C' code breaks and requires this) solves the problem -
1100 * the 1 us delay is arbitrary, and only used because this delay will
1101 * be the same on other platforms and since it works here, it should
1da177e4
LT
1102 * work there.
1103 *
1104 * wingel suggests that this could be due to failing to wait
1105 * one deskew delay.
1106 */
1107
1108 udelay(1);
1109
b746545f 1110 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1da177e4 1111
aff0cf9a
FT
1112 /*
1113 * The SCSI specification calls for a 250 ms timeout for the actual
1da177e4
LT
1114 * selection.
1115 */
1116
d5d37a0a 1117 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
ae753a33 1118 msecs_to_jiffies(250));
1da177e4 1119
1da177e4 1120 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
11d2f63b 1121 spin_lock_irq(&hostdata->lock);
1da177e4
LT
1122 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1123 NCR5380_reselect(instance);
6a6ff4ac 1124 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
707d62b3 1125 goto out;
1da177e4 1126 }
ae753a33
FT
1127
1128 if (err < 0) {
11d2f63b 1129 spin_lock_irq(&hostdata->lock);
ae753a33 1130 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
6a162836 1131
707d62b3 1132 /* Can't touch cmd if it has been reclaimed by the scsi ML */
6a162836 1133 if (!hostdata->selecting)
dad8261e 1134 return false;
6a162836
FT
1135
1136 cmd->result = DID_BAD_TARGET << 16;
1137 complete_cmd(instance, cmd);
1138 dsprintk(NDEBUG_SELECTION, instance,
1139 "target did not respond within 250ms\n");
dad8261e 1140 ret = false;
707d62b3 1141 goto out;
ae753a33
FT
1142 }
1143
aff0cf9a
FT
1144 /*
1145 * No less than two deskew delays after the initiator detects the
1146 * BSY signal is true, it shall release the SEL signal and may
1da177e4
LT
1147 * change the DATA BUS. -wingel
1148 */
1149
1150 udelay(1);
1151
1152 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1153
1da177e4 1154 /*
aff0cf9a 1155 * Since we followed the SCSI spec, and raised ATN while SEL
1da177e4
LT
1156 * was true but before BSY was false during selection, the information
1157 * transfer phase should be a MESSAGE OUT phase so that we can send the
1158 * IDENTIFY message.
1da177e4
LT
1159 */
1160
1161 /* Wait for start of REQ/ACK handshake */
1162
d5d37a0a 1163 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 1164 spin_lock_irq(&hostdata->lock);
1cc160e1 1165 if (err < 0) {
55500d9b
FT
1166 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1167 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
707d62b3
FT
1168 goto out;
1169 }
1170 if (!hostdata->selecting) {
1171 do_abort(instance);
dad8261e 1172 return false;
1da177e4
LT
1173 }
1174
b746545f
FT
1175 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1176 scmd_id(cmd));
7c8ed783 1177 tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun);
1da177e4
LT
1178
1179 len = 1;
1da177e4
LT
1180 data = tmp;
1181 phase = PHASE_MSGOUT;
1182 NCR5380_transfer_pio(instance, &phase, &len, &data);
b15e791d
FT
1183 if (len) {
1184 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1185 cmd->result = DID_ERROR << 16;
1186 complete_cmd(instance, cmd);
1187 dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
dad8261e 1188 ret = false;
b15e791d
FT
1189 goto out;
1190 }
1191
b746545f 1192 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
11d2f63b 1193
1da177e4 1194 hostdata->connected = cmd;
3d07d22b 1195 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1da177e4 1196
e9db3198
FT
1197#ifdef SUN3_SCSI_VME
1198 dregs->csr |= CSR_INTR;
1199#endif
1200
28424d3a 1201 initialize_SCp(cmd);
1da177e4 1202
dad8261e 1203 ret = false;
707d62b3
FT
1204
1205out:
1206 if (!hostdata->selecting)
96edebd6 1207 return false;
707d62b3 1208 hostdata->selecting = NULL;
dad8261e 1209 return ret;
1da177e4
LT
1210}
1211
aff0cf9a
FT
1212/*
1213 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
594d4ba3 1214 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1215 *
1216 * Purpose : transfers data in given phase using polled I/O
1217 *
aff0cf9a 1218 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1219 * what phase is expected, *count - pointer to number of
1220 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1221 *
1da177e4 1222 * Returns : -1 when different phase is entered without transferring
0d2cf867 1223 * maximum number of bytes, 0 if all bytes are transferred or exit
594d4ba3 1224 * is in same phase.
1da177e4 1225 *
594d4ba3 1226 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1227 *
1228 * XXX Note : handling for bus free may be useful.
1229 */
1230
1231/*
aff0cf9a 1232 * Note : this code is not as quick as it could be, however it
1da177e4
LT
1233 * IS 100% reliable, and for the actual data transfer where speed
1234 * counts, we will always do a pseudo DMA or DMA transfer.
1235 */
1236
0d2cf867
FT
1237static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1238 unsigned char *phase, int *count,
1239 unsigned char **data)
1240{
61e1ce58 1241 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1242 unsigned char p = *phase, tmp;
1243 int c = *count;
1244 unsigned char *d = *data;
1da177e4 1245
aff0cf9a
FT
1246 /*
1247 * The NCR5380 chip will only drive the SCSI bus when the
1da177e4
LT
1248 * phase specified in the appropriate bits of the TARGET COMMAND
1249 * REGISTER match the STATUS REGISTER
1250 */
1251
0d2cf867 1252 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1da177e4 1253
1da177e4 1254 do {
aff0cf9a
FT
1255 /*
1256 * Wait for assertion of REQ, after which the phase bits will be
1257 * valid
1da177e4
LT
1258 */
1259
d5d37a0a 1260 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1da177e4 1261 break;
1da177e4 1262
b746545f 1263 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1da177e4
LT
1264
1265 /* Check for phase mismatch */
686f3990 1266 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
b746545f
FT
1267 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1268 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1da177e4
LT
1269 break;
1270 }
0d2cf867 1271
1da177e4
LT
1272 /* Do actual transfer from SCSI bus to / from memory */
1273 if (!(p & SR_IO))
1274 NCR5380_write(OUTPUT_DATA_REG, *d);
1275 else
1276 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1277
1278 ++d;
1279
aff0cf9a 1280 /*
1da177e4
LT
1281 * The SCSI standard suggests that in MSGOUT phase, the initiator
1282 * should drop ATN on the last byte of the message phase
1283 * after REQ has been asserted for the handshake but before
1284 * the initiator raises ACK.
1285 */
1286
1287 if (!(p & SR_IO)) {
1288 if (!((p & SR_MSG) && c > 1)) {
1289 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1290 NCR5380_dprint(NDEBUG_PIO, instance);
3d07d22b
FT
1291 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1292 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1da177e4 1293 } else {
3d07d22b
FT
1294 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1295 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1da177e4 1296 NCR5380_dprint(NDEBUG_PIO, instance);
3d07d22b
FT
1297 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1298 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1da177e4
LT
1299 }
1300 } else {
1301 NCR5380_dprint(NDEBUG_PIO, instance);
1302 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1303 }
1304
d5d37a0a 1305 if (NCR5380_poll_politely(hostdata,
a2edc4a6
FT
1306 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1307 break;
1308
b746545f 1309 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1da177e4
LT
1310
1311/*
aff0cf9a
FT
1312 * We have several special cases to consider during REQ/ACK handshaking :
1313 * 1. We were in MSGOUT phase, and we are on the last byte of the
594d4ba3 1314 * message. ATN must be dropped as ACK is dropped.
1da177e4 1315 *
aff0cf9a 1316 * 2. We are in a MSGIN phase, and we are on the last byte of the
594d4ba3
FT
1317 * message. We must exit with ACK asserted, so that the calling
1318 * code may raise ATN before dropping ACK to reject the message.
1da177e4
LT
1319 *
1320 * 3. ACK and ATN are clear and the target may proceed as normal.
1321 */
1322 if (!(p == PHASE_MSGIN && c == 1)) {
1323 if (p == PHASE_MSGOUT && c > 1)
1324 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1325 else
1326 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1327 }
1328 } while (--c);
1329
b746545f 1330 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1da177e4
LT
1331
1332 *count = c;
1333 *data = d;
1334 tmp = NCR5380_read(STATUS_REG);
a2edc4a6
FT
1335 /* The phase read from the bus is valid if either REQ is (already)
1336 * asserted or if ACK hasn't been released yet. The latter applies if
1337 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1338 */
1339 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1da177e4
LT
1340 *phase = tmp & PHASE_MASK;
1341 else
1342 *phase = PHASE_UNKNOWN;
1343
1344 if (!c || (*phase == p))
1345 return 0;
1346 else
1347 return -1;
1348}
1349
1350/**
636b1ec8
FT
1351 * do_reset - issue a reset command
1352 * @instance: adapter to reset
1da177e4 1353 *
636b1ec8
FT
1354 * Issue a reset sequence to the NCR5380 and try and get the bus
1355 * back into sane shape.
1da177e4 1356 *
636b1ec8
FT
1357 * This clears the reset interrupt flag because there may be no handler for
1358 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1359 * been installed. And when in EH we may have released the ST DMA interrupt.
1da177e4 1360 */
aff0cf9a 1361
54d8fe44
FT
1362static void do_reset(struct Scsi_Host *instance)
1363{
61e1ce58 1364 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
636b1ec8
FT
1365 unsigned long flags;
1366
1367 local_irq_save(flags);
1368 NCR5380_write(TARGET_COMMAND_REG,
1369 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1da177e4 1370 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
636b1ec8 1371 udelay(50);
1da177e4 1372 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
636b1ec8
FT
1373 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1374 local_irq_restore(flags);
1da177e4
LT
1375}
1376
80d3eb6d
FT
1377/**
1378 * do_abort - abort the currently established nexus by going to
1379 * MESSAGE OUT phase and sending an ABORT message.
1380 * @instance: relevant scsi host instance
1da177e4 1381 *
80d3eb6d 1382 * Returns 0 on success, -1 on failure.
1da177e4
LT
1383 */
1384
54d8fe44
FT
1385static int do_abort(struct Scsi_Host *instance)
1386{
61e1ce58 1387 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1388 unsigned char *msgptr, phase, tmp;
1389 int len;
1390 int rc;
1da177e4
LT
1391
1392 /* Request message out phase */
1393 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1394
aff0cf9a
FT
1395 /*
1396 * Wait for the target to indicate a valid phase by asserting
1397 * REQ. Once this happens, we'll have either a MSGOUT phase
1398 * and can immediately send the ABORT message, or we'll have some
1da177e4 1399 * other phase and will have to source/sink data.
aff0cf9a 1400 *
1da177e4
LT
1401 * We really don't care what value was on the bus or what value
1402 * the target sees, so we just handshake.
1403 */
1404
d5d37a0a 1405 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1cc160e1 1406 if (rc < 0)
80d3eb6d 1407 goto timeout;
1da177e4 1408
f35d3474 1409 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
aff0cf9a 1410
1da177e4
LT
1411 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1412
f35d3474 1413 if (tmp != PHASE_MSGOUT) {
0d2cf867
FT
1414 NCR5380_write(INITIATOR_COMMAND_REG,
1415 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
d5d37a0a 1416 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ);
1cc160e1 1417 if (rc < 0)
80d3eb6d
FT
1418 goto timeout;
1419 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1da177e4 1420 }
0d2cf867 1421
1da177e4
LT
1422 tmp = ABORT;
1423 msgptr = &tmp;
1424 len = 1;
1425 phase = PHASE_MSGOUT;
54d8fe44 1426 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1da177e4
LT
1427
1428 /*
1429 * If we got here, and the command completed successfully,
1430 * we're about to go into bus free state.
1431 */
1432
1433 return len ? -1 : 0;
80d3eb6d
FT
1434
1435timeout:
1436 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1437 return -1;
1da177e4
LT
1438}
1439
aff0cf9a
FT
1440/*
1441 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
594d4ba3 1442 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1443 *
1444 * Purpose : transfers data in given phase using either real
594d4ba3 1445 * or pseudo DMA.
1da177e4 1446 *
aff0cf9a 1447 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1448 * what phase is expected, *count - pointer to number of
1449 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1450 *
1da177e4 1451 * Returns : -1 when different phase is entered without transferring
594d4ba3
FT
1452 * maximum number of bytes, 0 if all bytes or transferred or exit
1453 * is in same phase.
1da177e4 1454 *
594d4ba3 1455 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1456 */
1457
1458
0d2cf867
FT
1459static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1460 unsigned char *phase, int *count,
1461 unsigned char **data)
1462{
1463 struct NCR5380_hostdata *hostdata = shost_priv(instance);
f0ea73a4
FT
1464 int c = *count;
1465 unsigned char p = *phase;
1466 unsigned char *d = *data;
1da177e4 1467 unsigned char tmp;
8053b0ee 1468 int result = 0;
1da177e4 1469
1da177e4
LT
1470 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1471 *phase = tmp;
1472 return -1;
1473 }
1da177e4 1474
8053b0ee 1475 hostdata->connected->SCp.phase = p;
1da177e4 1476
8053b0ee
FT
1477 if (p & SR_IO) {
1478 if (hostdata->read_overruns)
1479 c -= hostdata->read_overruns;
1480 else if (hostdata->flags & FLAG_DMA_FIXUP)
1481 --c;
1482 }
1da177e4 1483
8053b0ee
FT
1484 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1485 (p & SR_IO) ? "receive" : "send", c, d);
1da177e4 1486
e9db3198
FT
1487#ifdef CONFIG_SUN3
1488 /* send start chain */
1489 sun3scsi_dma_start(c, *data);
1490#endif
1491
8053b0ee
FT
1492 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1493 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1494 MR_ENABLE_EOP_INTR);
1495
1496 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1497 /* On the Medusa, it is a must to initialize the DMA before
1498 * starting the NCR. This is also the cleaner way for the TT.
1499 */
1500 if (p & SR_IO)
4a98f896 1501 result = NCR5380_dma_recv_setup(hostdata, d, c);
8053b0ee 1502 else
4a98f896 1503 result = NCR5380_dma_send_setup(hostdata, d, c);
8053b0ee 1504 }
1da177e4 1505
aff0cf9a 1506 /*
594d4ba3
FT
1507 * On the PAS16 at least I/O recovery delays are not needed here.
1508 * Everyone else seems to want them.
1da177e4
LT
1509 */
1510
1511 if (p & SR_IO) {
e9db3198 1512 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
e5d55d1a 1513 NCR5380_io_delay(1);
1da177e4
LT
1514 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1515 } else {
e5d55d1a 1516 NCR5380_io_delay(1);
1da177e4 1517 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
e5d55d1a 1518 NCR5380_io_delay(1);
1da177e4 1519 NCR5380_write(START_DMA_SEND_REG, 0);
e5d55d1a 1520 NCR5380_io_delay(1);
1da177e4
LT
1521 }
1522
e9db3198
FT
1523#ifdef CONFIG_SUN3
1524#ifdef SUN3_SCSI_VME
1525 dregs->csr |= CSR_DMA_ENABLE;
1526#endif
1527 sun3_dma_active = 1;
1528#endif
1529
8053b0ee
FT
1530 if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1531 /* On the Falcon, the DMA setup must be done after the last
1532 * NCR access, else the DMA setup gets trashed!
1533 */
1534 if (p & SR_IO)
4a98f896 1535 result = NCR5380_dma_recv_setup(hostdata, d, c);
8053b0ee 1536 else
4a98f896 1537 result = NCR5380_dma_send_setup(hostdata, d, c);
8053b0ee
FT
1538 }
1539
1540 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
1541 if (result < 0)
1542 return result;
1543
1544 /* For real DMA, result is the byte count. DMA interrupt is expected. */
1545 if (result > 0) {
1546 hostdata->dma_len = result;
1547 return 0;
1548 }
1549
1550 /* The result is zero iff pseudo DMA send/receive was completed. */
1551 hostdata->dma_len = c;
1552
1da177e4 1553/*
e4dec680 1554 * A note regarding the DMA errata workarounds for early NMOS silicon.
c16df32e
FT
1555 *
1556 * For DMA sends, we want to wait until the last byte has been
1557 * transferred out over the bus before we turn off DMA mode. Alas, there
1558 * seems to be no terribly good way of doing this on a 5380 under all
1559 * conditions. For non-scatter-gather operations, we can wait until REQ
1560 * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1561 * are nastier, since the device will be expecting more data than we
1562 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1563 * could test Last Byte Sent to assure transfer (I imagine this is precisely
1564 * why this signal was added to the newer chips) but on the older 538[01]
1565 * this signal does not exist. The workaround for this lack is a watchdog;
1566 * we bail out of the wait-loop after a modest amount of wait-time if
1567 * the usual exit conditions are not met. Not a terribly clean or
1568 * correct solution :-%
1569 *
1570 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1571 * If the chip is in DMA receive mode, it will respond to a target's
1572 * REQ by latching the SCSI data into the INPUT DATA register and asserting
1573 * ACK, even if it has _already_ been notified by the DMA controller that
1574 * the current DMA transfer has completed! If the NCR5380 is then taken
1575 * out of DMA mode, this already-acknowledged byte is lost. This is
1576 * not a problem for "one DMA transfer per READ command", because
1577 * the situation will never arise... either all of the data is DMA'ed
1578 * properly, or the target switches to MESSAGE IN phase to signal a
1579 * disconnection (either operation bringing the DMA to a clean halt).
1580 * However, in order to handle scatter-receive, we must work around the
e4dec680 1581 * problem. The chosen fix is to DMA fewer bytes, then check for the
c16df32e
FT
1582 * condition before taking the NCR5380 out of DMA mode. One or two extra
1583 * bytes are transferred via PIO as necessary to fill out the original
1584 * request.
1da177e4
LT
1585 */
1586
8053b0ee
FT
1587 if (hostdata->flags & FLAG_DMA_FIXUP) {
1588 if (p & SR_IO) {
1da177e4 1589 /*
e4dec680 1590 * The workaround was to transfer fewer bytes than we
aff0cf9a 1591 * intended to with the pseudo-DMA read function, wait for
1da177e4
LT
1592 * the chip to latch the last byte, read it, and then disable
1593 * pseudo-DMA mode.
aff0cf9a 1594 *
1da177e4
LT
1595 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1596 * REQ is deasserted when ACK is asserted, and not reasserted
1597 * until ACK goes false. Since the NCR5380 won't lower ACK
1598 * until DACK is asserted, which won't happen unless we twiddle
aff0cf9a
FT
1599 * the DMA port or we take the NCR5380 out of DMA mode, we
1600 * can guarantee that we won't handshake another extra
1da177e4
LT
1601 * byte.
1602 */
1603
d5d37a0a 1604 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
55181be8 1605 BASR_DRQ, BASR_DRQ, HZ) < 0) {
438af51c 1606 result = -1;
55181be8
FT
1607 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1608 }
d5d37a0a 1609 if (NCR5380_poll_politely(hostdata, STATUS_REG,
55181be8 1610 SR_REQ, 0, HZ) < 0) {
438af51c 1611 result = -1;
55181be8 1612 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1da177e4 1613 }
8053b0ee
FT
1614 d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1615 } else {
1da177e4 1616 /*
aff0cf9a
FT
1617 * Wait for the last byte to be sent. If REQ is being asserted for
1618 * the byte we're interested, we'll ACK it and it will go false.
1da177e4 1619 */
d5d37a0a 1620 if (NCR5380_poll_politely2(hostdata,
55181be8
FT
1621 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1622 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
438af51c 1623 result = -1;
55181be8 1624 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1da177e4
LT
1625 }
1626 }
1da177e4 1627 }
8053b0ee
FT
1628
1629 NCR5380_dma_complete(instance);
438af51c 1630 return result;
1da177e4 1631}
1da177e4
LT
1632
1633/*
1634 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1635 *
aff0cf9a 1636 * Purpose : run through the various SCSI phases and do as the target
594d4ba3
FT
1637 * directs us to. Operates on the currently connected command,
1638 * instance->connected.
1da177e4
LT
1639 *
1640 * Inputs : instance, instance for which we are doing commands
1641 *
aff0cf9a 1642 * Side effects : SCSI things happen, the disconnected queue will be
594d4ba3
FT
1643 * modified if a command disconnects, *instance->connected will
1644 * change.
1da177e4 1645 *
aff0cf9a 1646 * XXX Note : we need to watch for bus free or a reset condition here
594d4ba3 1647 * to recover from an unexpected bus free condition.
1da177e4
LT
1648 */
1649
0d2cf867 1650static void NCR5380_information_transfer(struct Scsi_Host *instance)
4ab2a787 1651 __releases(&hostdata->lock) __acquires(&hostdata->lock)
0d2cf867 1652{
e8a60144 1653 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1654 unsigned char msgout = NOP;
1655 int sink = 0;
1656 int len;
1da177e4 1657 int transfersize;
1da177e4
LT
1658 unsigned char *data;
1659 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
11d2f63b 1660 struct scsi_cmnd *cmd;
1da177e4 1661
e9db3198
FT
1662#ifdef SUN3_SCSI_VME
1663 dregs->csr |= CSR_INTR;
1664#endif
1665
11d2f63b 1666 while ((cmd = hostdata->connected)) {
32b26a10
FT
1667 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1668
1da177e4
LT
1669 tmp = NCR5380_read(STATUS_REG);
1670 /* We only have a valid SCSI phase when REQ is asserted */
1671 if (tmp & SR_REQ) {
1672 phase = (tmp & PHASE_MASK);
1673 if (phase != old_phase) {
1674 old_phase = phase;
1675 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1676 }
e9db3198 1677#ifdef CONFIG_SUN3
4a98f896
FT
1678 if (phase == PHASE_CMDOUT &&
1679 sun3_dma_setup_done != cmd) {
1680 int count;
e9db3198 1681
0e9fdd2b 1682 advance_sg_buffer(cmd);
e9db3198 1683
4a98f896
FT
1684 count = sun3scsi_dma_xfer_len(hostdata, cmd);
1685
1686 if (count > 0) {
1687 if (rq_data_dir(cmd->request))
1688 sun3scsi_dma_send_setup(hostdata,
1689 cmd->SCp.ptr, count);
1690 else
1691 sun3scsi_dma_recv_setup(hostdata,
1692 cmd->SCp.ptr, count);
e9db3198
FT
1693 sun3_dma_setup_done = cmd;
1694 }
1695#ifdef SUN3_SCSI_VME
1696 dregs->csr |= CSR_INTR;
1697#endif
1698 }
1699#endif /* CONFIG_SUN3 */
1700
1da177e4
LT
1701 if (sink && (phase != PHASE_MSGOUT)) {
1702 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1703
3d07d22b
FT
1704 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1705 ICR_ASSERT_ACK);
0d2cf867
FT
1706 while (NCR5380_read(STATUS_REG) & SR_REQ)
1707 ;
3d07d22b
FT
1708 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1709 ICR_ASSERT_ATN);
1da177e4
LT
1710 sink = 0;
1711 continue;
1712 }
0d2cf867 1713
1da177e4 1714 switch (phase) {
1da177e4
LT
1715 case PHASE_DATAOUT:
1716#if (NDEBUG & NDEBUG_NO_DATAOUT)
6a6ff4ac 1717 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1da177e4
LT
1718 sink = 1;
1719 do_abort(instance);
1720 cmd->result = DID_ERROR << 16;
677e0194 1721 complete_cmd(instance, cmd);
dc183965 1722 hostdata->connected = NULL;
45ddc1b2 1723 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1da177e4
LT
1724 return;
1725#endif
bf1a0c6f 1726 case PHASE_DATAIN:
aff0cf9a 1727 /*
1da177e4
LT
1728 * If there is no room left in the current buffer in the
1729 * scatter-gather list, move onto the next one.
1730 */
1731
0e9fdd2b
FT
1732 advance_sg_buffer(cmd);
1733 dsprintk(NDEBUG_INFORMATION, instance,
1734 "this residual %d, sg ents %d\n",
1735 cmd->SCp.this_residual,
1736 sg_nents(cmd->SCp.buffer));
0d2cf867 1737
1da177e4 1738 /*
aff0cf9a 1739 * The preferred transfer method is going to be
1da177e4
LT
1740 * PSEUDO-DMA for systems that are strictly PIO,
1741 * since we can let the hardware do the handshaking.
1742 *
1743 * For this to work, we need to know the transfersize
1744 * ahead of time, since the pseudo-DMA code will sit
1745 * in an unconditional loop.
1746 */
1747
ff3d4578 1748 transfersize = 0;
7e9ec8d9 1749 if (!cmd->device->borken)
4a98f896 1750 transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
ff3d4578 1751
438af51c 1752 if (transfersize > 0) {
1da177e4 1753 len = transfersize;
0d2cf867
FT
1754 if (NCR5380_transfer_dma(instance, &phase,
1755 &len, (unsigned char **)&cmd->SCp.ptr)) {
1da177e4 1756 /*
0d2cf867
FT
1757 * If the watchdog timer fires, all future
1758 * accesses to this device will use the
1759 * polled-IO.
1da177e4 1760 */
017560fc 1761 scmd_printk(KERN_INFO, cmd,
0d2cf867 1762 "switching to slow handshake\n");
1da177e4 1763 cmd->device->borken = 1;
f9dfed1c
FT
1764 do_reset(instance);
1765 bus_reset_cleanup(instance);
8053b0ee 1766 }
f825e40b 1767 } else {
08348b1c
FT
1768 /* Transfer a small chunk so that the
1769 * irq mode lock is not held too long.
1678847e 1770 */
08348b1c
FT
1771 transfersize = min(cmd->SCp.this_residual,
1772 NCR5380_PIO_CHUNK_SIZE);
1678847e
FT
1773 len = transfersize;
1774 NCR5380_transfer_pio(instance, &phase, &len,
3d07d22b 1775 (unsigned char **)&cmd->SCp.ptr);
1678847e 1776 cmd->SCp.this_residual -= transfersize - len;
11d2f63b 1777 }
e9db3198
FT
1778#ifdef CONFIG_SUN3
1779 if (sun3_dma_setup_done == cmd)
1780 sun3_dma_setup_done = NULL;
1781#endif
1678847e 1782 return;
1da177e4
LT
1783 case PHASE_MSGIN:
1784 len = 1;
1785 data = &tmp;
1786 NCR5380_transfer_pio(instance, &phase, &len, &data);
1787 cmd->SCp.Message = tmp;
1788
1789 switch (tmp) {
1da177e4
LT
1790 case ABORT:
1791 case COMMAND_COMPLETE:
1792 /* Accept message by clearing ACK */
1793 sink = 1;
1794 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
0d3d9a42
FT
1795 dsprintk(NDEBUG_QUEUES, instance,
1796 "COMMAND COMPLETE %p target %d lun %llu\n",
1797 cmd, scmd_id(cmd), cmd->device->lun);
1798
1da177e4 1799 hostdata->connected = NULL;
45ddc1b2 1800 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1da177e4 1801
f27db8eb
FT
1802 cmd->result &= ~0xffff;
1803 cmd->result |= cmd->SCp.Status;
1804 cmd->result |= cmd->SCp.Message << 8;
28424d3a 1805
f27db8eb 1806 if (cmd->cmnd[0] == REQUEST_SENSE)
677e0194 1807 complete_cmd(instance, cmd);
f27db8eb
FT
1808 else {
1809 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1810 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1811 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1812 cmd);
1813 list_add_tail(&ncmd->list,
1814 &hostdata->autosense);
1815 } else
1816 complete_cmd(instance, cmd);
1da177e4
LT
1817 }
1818
aff0cf9a
FT
1819 /*
1820 * Restore phase bits to 0 so an interrupted selection,
1da177e4
LT
1821 * arbitration can resume.
1822 */
1823 NCR5380_write(TARGET_COMMAND_REG, 0);
72064a78 1824
52d3e561 1825 maybe_release_dma_irq(instance);
1da177e4
LT
1826 return;
1827 case MESSAGE_REJECT:
1828 /* Accept message by clearing ACK */
1829 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1830 switch (hostdata->last_message) {
1831 case HEAD_OF_QUEUE_TAG:
1832 case ORDERED_QUEUE_TAG:
1833 case SIMPLE_QUEUE_TAG:
1834 cmd->device->simple_tags = 0;
9cb78c16 1835 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1da177e4
LT
1836 break;
1837 default:
1838 break;
1839 }
340b9612 1840 break;
0d2cf867
FT
1841 case DISCONNECT:
1842 /* Accept message by clearing ACK */
1843 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1844 hostdata->connected = NULL;
1845 list_add(&ncmd->list, &hostdata->disconnected);
1846 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1847 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1848 cmd, scmd_id(cmd), cmd->device->lun);
0d3d9a42 1849
0d2cf867
FT
1850 /*
1851 * Restore phase bits to 0 so an interrupted selection,
1852 * arbitration can resume.
1853 */
1854 NCR5380_write(TARGET_COMMAND_REG, 0);
1da177e4 1855
e9db3198
FT
1856#ifdef SUN3_SCSI_VME
1857 dregs->csr |= CSR_DMA_ENABLE;
1858#endif
0d2cf867 1859 return;
aff0cf9a 1860 /*
1da177e4 1861 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
aff0cf9a 1862 * operation, in violation of the SCSI spec so we can safely
1da177e4
LT
1863 * ignore SAVE/RESTORE pointers calls.
1864 *
aff0cf9a 1865 * Unfortunately, some disks violate the SCSI spec and
1da177e4 1866 * don't issue the required SAVE_POINTERS message before
aff0cf9a 1867 * disconnecting, and we have to break spec to remain
1da177e4
LT
1868 * compatible.
1869 */
1870 case SAVE_POINTERS:
1871 case RESTORE_POINTERS:
1872 /* Accept message by clearing ACK */
1873 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1874 break;
1875 case EXTENDED_MESSAGE:
c16df32e
FT
1876 /*
1877 * Start the message buffer with the EXTENDED_MESSAGE
1878 * byte, since spi_print_msg() wants the whole thing.
1879 */
1da177e4
LT
1880 extended_msg[0] = EXTENDED_MESSAGE;
1881 /* Accept first byte by clearing ACK */
1882 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
11d2f63b
FT
1883
1884 spin_unlock_irq(&hostdata->lock);
1885
b746545f 1886 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1da177e4
LT
1887
1888 len = 2;
1889 data = extended_msg + 1;
1890 phase = PHASE_MSGIN;
1891 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1892 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1893 (int)extended_msg[1],
1894 (int)extended_msg[2]);
1da177e4 1895
e0783ed3
FT
1896 if (!len && extended_msg[1] > 0 &&
1897 extended_msg[1] <= sizeof(extended_msg) - 2) {
1da177e4
LT
1898 /* Accept third byte by clearing ACK */
1899 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1900 len = extended_msg[1] - 1;
1901 data = extended_msg + 3;
1902 phase = PHASE_MSGIN;
1903
1904 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1905 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1906 len);
1da177e4
LT
1907
1908 switch (extended_msg[2]) {
1909 case EXTENDED_SDTR:
1910 case EXTENDED_WDTR:
1da177e4
LT
1911 tmp = 0;
1912 }
1913 } else if (len) {
6a6ff4ac 1914 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1da177e4
LT
1915 tmp = 0;
1916 } else {
6a6ff4ac
FT
1917 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1918 extended_msg[2], extended_msg[1]);
1da177e4
LT
1919 tmp = 0;
1920 }
11d2f63b
FT
1921
1922 spin_lock_irq(&hostdata->lock);
1923 if (!hostdata->connected)
1924 return;
1925
df135e32
FT
1926 /* Reject message */
1927 /* Fall through */
1928 default:
aff0cf9a
FT
1929 /*
1930 * If we get something weird that we aren't expecting,
df135e32 1931 * log it.
1da177e4 1932 */
39bef87c 1933 if (tmp == EXTENDED_MESSAGE)
017560fc 1934 scmd_printk(KERN_INFO, cmd,
0d2cf867 1935 "rejecting unknown extended message code %02x, length %d\n",
39bef87c
FT
1936 extended_msg[2], extended_msg[1]);
1937 else if (tmp)
1938 scmd_printk(KERN_INFO, cmd,
1939 "rejecting unknown message code %02x\n",
1940 tmp);
1da177e4
LT
1941
1942 msgout = MESSAGE_REJECT;
1943 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1944 break;
0d2cf867 1945 } /* switch (tmp) */
1da177e4
LT
1946 break;
1947 case PHASE_MSGOUT:
1948 len = 1;
1949 data = &msgout;
1950 hostdata->last_message = msgout;
1951 NCR5380_transfer_pio(instance, &phase, &len, &data);
1952 if (msgout == ABORT) {
1da177e4 1953 hostdata->connected = NULL;
45ddc1b2 1954 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1da177e4 1955 cmd->result = DID_ERROR << 16;
677e0194 1956 complete_cmd(instance, cmd);
52d3e561 1957 maybe_release_dma_irq(instance);
1da177e4
LT
1958 return;
1959 }
1960 msgout = NOP;
1961 break;
1962 case PHASE_CMDOUT:
1963 len = cmd->cmd_len;
1964 data = cmd->cmnd;
aff0cf9a
FT
1965 /*
1966 * XXX for performance reasons, on machines with a
1967 * PSEUDO-DMA architecture we should probably
1968 * use the dma transfer function.
1da177e4
LT
1969 */
1970 NCR5380_transfer_pio(instance, &phase, &len, &data);
1da177e4
LT
1971 break;
1972 case PHASE_STATIN:
1973 len = 1;
1974 data = &tmp;
1975 NCR5380_transfer_pio(instance, &phase, &len, &data);
1976 cmd->SCp.Status = tmp;
1977 break;
1978 default:
6a6ff4ac 1979 shost_printk(KERN_ERR, instance, "unknown phase\n");
4dde8f7d 1980 NCR5380_dprint(NDEBUG_ANY, instance);
0d2cf867 1981 } /* switch(phase) */
686f3990 1982 } else {
11d2f63b 1983 spin_unlock_irq(&hostdata->lock);
d5d37a0a 1984 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 1985 spin_lock_irq(&hostdata->lock);
1da177e4 1986 }
11d2f63b 1987 }
1da177e4
LT
1988}
1989
1990/*
1991 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
1992 *
aff0cf9a 1993 * Purpose : does reselection, initializing the instance->connected
594d4ba3
FT
1994 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
1995 * nexus has been reestablished,
aff0cf9a 1996 *
1da177e4 1997 * Inputs : instance - this instance of the NCR5380.
1da177e4
LT
1998 */
1999
0d2cf867
FT
2000static void NCR5380_reselect(struct Scsi_Host *instance)
2001{
e8a60144 2002 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 2003 unsigned char target_mask;
e9db3198 2004 unsigned char lun;
1da177e4 2005 unsigned char msg[3];
32b26a10
FT
2006 struct NCR5380_cmd *ncmd;
2007 struct scsi_cmnd *tmp;
1da177e4
LT
2008
2009 /*
2010 * Disable arbitration, etc. since the host adapter obviously
2011 * lost, and tell an interrupted NCR5380_select() to restart.
2012 */
2013
2014 NCR5380_write(MODE_REG, MR_BASE);
1da177e4
LT
2015
2016 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
7ef55f67
FT
2017 if (!target_mask || target_mask & (target_mask - 1)) {
2018 shost_printk(KERN_WARNING, instance,
2019 "reselect: bad target_mask 0x%02x\n", target_mask);
2020 return;
2021 }
b746545f 2022
aff0cf9a 2023 /*
1da177e4
LT
2024 * At this point, we have detected that our SCSI ID is on the bus,
2025 * SEL is true and BSY was false for at least one bus settle delay
2026 * (400 ns).
2027 *
2028 * We must assert BSY ourselves, until the target drops the SEL
2029 * signal.
2030 */
2031
2032 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
d5d37a0a 2033 if (NCR5380_poll_politely(hostdata,
72064a78 2034 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
08267216 2035 shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n");
72064a78
FT
2036 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2037 return;
2038 }
1da177e4
LT
2039 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2040
2041 /*
2042 * Wait for target to go into MSGIN.
1da177e4
LT
2043 */
2044
d5d37a0a 2045 if (NCR5380_poll_politely(hostdata,
72064a78 2046 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
ca694afa
FT
2047 if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
2048 /* BUS FREE phase */
2049 return;
08267216 2050 shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n");
72064a78
FT
2051 do_abort(instance);
2052 return;
2053 }
1da177e4 2054
e9db3198
FT
2055#ifdef CONFIG_SUN3
2056 /* acknowledge toggle to MSGIN */
2057 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
1da177e4 2058
e9db3198
FT
2059 /* peek at the byte without really hitting the bus */
2060 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2061#else
2062 {
2063 int len = 1;
2064 unsigned char *data = msg;
2065 unsigned char phase = PHASE_MSGIN;
2066
2067 NCR5380_transfer_pio(instance, &phase, &len, &data);
2068
2069 if (len) {
2070 do_abort(instance);
2071 return;
2072 }
72064a78 2073 }
e9db3198 2074#endif /* CONFIG_SUN3 */
72064a78 2075
1da177e4 2076 if (!(msg[0] & 0x80)) {
72064a78 2077 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
1abfd370 2078 spi_print_msg(msg);
72064a78
FT
2079 printk("\n");
2080 do_abort(instance);
2081 return;
2082 }
2083 lun = msg[0] & 0x07;
1da177e4 2084
72064a78
FT
2085 /*
2086 * We need to add code for SCSI-II to track which devices have
2087 * I_T_L_Q nexuses established, and which have simple I_T_L
2088 * nexuses so we can chose to do additional data transfer.
2089 */
1da177e4 2090
72064a78
FT
2091 /*
2092 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2093 * just reestablished, and remove it from the disconnected queue.
2094 */
1da177e4 2095
32b26a10
FT
2096 tmp = NULL;
2097 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2098 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2099
2100 if (target_mask == (1 << scmd_id(cmd)) &&
2101 lun == (u8)cmd->device->lun) {
2102 list_del(&ncmd->list);
2103 tmp = cmd;
72064a78 2104 break;
1da177e4
LT
2105 }
2106 }
0d3d9a42
FT
2107
2108 if (tmp) {
2109 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2110 "reselect: removed %p from disconnected queue\n", tmp);
2111 } else {
45ddc1b2
FT
2112 int target = ffs(target_mask) - 1;
2113
72064a78
FT
2114 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2115 target_mask, lun);
2116 /*
0d2cf867
FT
2117 * Since we have an established nexus that we can't do anything
2118 * with, we must abort it.
72064a78 2119 */
45ddc1b2
FT
2120 if (do_abort(instance) == 0)
2121 hostdata->busy[target] &= ~(1 << lun);
72064a78 2122 return;
1da177e4 2123 }
72064a78 2124
e9db3198 2125#ifdef CONFIG_SUN3
4a98f896
FT
2126 if (sun3_dma_setup_done != tmp) {
2127 int count;
e9db3198 2128
0e9fdd2b 2129 advance_sg_buffer(tmp);
e9db3198 2130
4a98f896
FT
2131 count = sun3scsi_dma_xfer_len(hostdata, tmp);
2132
2133 if (count > 0) {
2134 if (rq_data_dir(tmp->request))
2135 sun3scsi_dma_send_setup(hostdata,
2136 tmp->SCp.ptr, count);
2137 else
2138 sun3scsi_dma_recv_setup(hostdata,
2139 tmp->SCp.ptr, count);
e9db3198
FT
2140 sun3_dma_setup_done = tmp;
2141 }
2142 }
2143
2144 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2145#endif /* CONFIG_SUN3 */
2146
72064a78
FT
2147 /* Accept message by clearing ACK */
2148 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2149
2150 hostdata->connected = tmp;
c4ec6f92
FT
2151 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2152 scmd_id(tmp), tmp->device->lun);
1da177e4
LT
2153}
2154
8b00c3d5
FT
2155/**
2156 * list_find_cmd - test for presence of a command in a linked list
2157 * @haystack: list of commands
2158 * @needle: command to search for
2159 */
2160
2161static bool list_find_cmd(struct list_head *haystack,
2162 struct scsi_cmnd *needle)
2163{
2164 struct NCR5380_cmd *ncmd;
2165
2166 list_for_each_entry(ncmd, haystack, list)
2167 if (NCR5380_to_scmd(ncmd) == needle)
2168 return true;
2169 return false;
2170}
2171
2172/**
2173 * list_remove_cmd - remove a command from linked list
2174 * @haystack: list of commands
2175 * @needle: command to remove
2176 */
2177
2178static bool list_del_cmd(struct list_head *haystack,
2179 struct scsi_cmnd *needle)
2180{
2181 if (list_find_cmd(haystack, needle)) {
2182 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2183
2184 list_del(&ncmd->list);
2185 return true;
2186 }
2187 return false;
2188}
2189
2190/**
2191 * NCR5380_abort - scsi host eh_abort_handler() method
2192 * @cmd: the command to be aborted
2193 *
2194 * Try to abort a given command by removing it from queues and/or sending
2195 * the target an abort message. This may not succeed in causing a target
2196 * to abort the command. Nonetheless, the low-level driver must forget about
2197 * the command because the mid-layer reclaims it and it may be re-issued.
2198 *
2199 * The normal path taken by a command is as follows. For EH we trace this
2200 * same path to locate and abort the command.
2201 *
2202 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2203 * [disconnected -> connected ->]...
2204 * [autosense -> connected ->] done
2205 *
8b00c3d5
FT
2206 * If cmd was not found at all then presumably it has already been completed,
2207 * in which case return SUCCESS to try to avoid further EH measures.
dc183965 2208 *
8b00c3d5 2209 * If the command has not completed yet, we must not fail to find it.
dc183965
FT
2210 * We have no option but to forget the aborted command (even if it still
2211 * lacks sense data). The mid-layer may re-issue a command that is in error
2212 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2213 * this driver are such that a command can appear on one queue only.
71a00593
FT
2214 *
2215 * The lock protects driver data structures, but EH handlers also use it
2216 * to serialize their own execution and prevent their own re-entry.
1da177e4
LT
2217 */
2218
710ddd0d
FT
2219static int NCR5380_abort(struct scsi_cmnd *cmd)
2220{
1da177e4 2221 struct Scsi_Host *instance = cmd->device->host;
e8a60144 2222 struct NCR5380_hostdata *hostdata = shost_priv(instance);
11d2f63b 2223 unsigned long flags;
8b00c3d5 2224 int result = SUCCESS;
1fa6b5fb 2225
11d2f63b
FT
2226 spin_lock_irqsave(&hostdata->lock, flags);
2227
32b26a10 2228#if (NDEBUG & NDEBUG_ANY)
8b00c3d5 2229 scmd_printk(KERN_INFO, cmd, __func__);
32b26a10 2230#endif
e5c3fddf
FT
2231 NCR5380_dprint(NDEBUG_ANY, instance);
2232 NCR5380_dprint_phase(NDEBUG_ANY, instance);
1da177e4 2233
8b00c3d5
FT
2234 if (list_del_cmd(&hostdata->unissued, cmd)) {
2235 dsprintk(NDEBUG_ABORT, instance,
2236 "abort: removed %p from issue queue\n", cmd);
2237 cmd->result = DID_ABORT << 16;
2238 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
dc183965 2239 goto out;
8b00c3d5
FT
2240 }
2241
707d62b3
FT
2242 if (hostdata->selecting == cmd) {
2243 dsprintk(NDEBUG_ABORT, instance,
2244 "abort: cmd %p == selecting\n", cmd);
2245 hostdata->selecting = NULL;
2246 cmd->result = DID_ABORT << 16;
2247 complete_cmd(instance, cmd);
2248 goto out;
2249 }
2250
8b00c3d5
FT
2251 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2252 dsprintk(NDEBUG_ABORT, instance,
2253 "abort: removed %p from disconnected list\n", cmd);
71a00593
FT
2254 /* Can't call NCR5380_select() and send ABORT because that
2255 * means releasing the lock. Need a bus reset.
2256 */
dc183965
FT
2257 set_host_byte(cmd, DID_ERROR);
2258 complete_cmd(instance, cmd);
71a00593
FT
2259 result = FAILED;
2260 goto out;
8b00c3d5
FT
2261 }
2262
2263 if (hostdata->connected == cmd) {
2264 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2265 hostdata->connected = NULL;
8b00c3d5 2266 hostdata->dma_len = 0;
8b00c3d5
FT
2267 if (do_abort(instance)) {
2268 set_host_byte(cmd, DID_ERROR);
2269 complete_cmd(instance, cmd);
2270 result = FAILED;
2271 goto out;
2272 }
2273 set_host_byte(cmd, DID_ABORT);
dc183965
FT
2274 complete_cmd(instance, cmd);
2275 goto out;
2276 }
2277
2278 if (list_del_cmd(&hostdata->autosense, cmd)) {
2279 dsprintk(NDEBUG_ABORT, instance,
2280 "abort: removed %p from sense queue\n", cmd);
8b00c3d5
FT
2281 complete_cmd(instance, cmd);
2282 }
2283
2284out:
2285 if (result == FAILED)
2286 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
45ddc1b2
FT
2287 else {
2288 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
8b00c3d5 2289 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
45ddc1b2 2290 }
8b00c3d5
FT
2291
2292 queue_work(hostdata->work_q, &hostdata->main_task);
52d3e561 2293 maybe_release_dma_irq(instance);
11d2f63b 2294 spin_unlock_irqrestore(&hostdata->lock, flags);
32b26a10 2295
8b00c3d5 2296 return result;
1da177e4
LT
2297}
2298
2299
6b0e87a6 2300static void bus_reset_cleanup(struct Scsi_Host *instance)
68b3aa7c 2301{
11d2f63b 2302 struct NCR5380_hostdata *hostdata = shost_priv(instance);
62717f53 2303 int i;
62717f53 2304 struct NCR5380_cmd *ncmd;
68b3aa7c 2305
62717f53
FT
2306 /* reset NCR registers */
2307 NCR5380_write(MODE_REG, MR_BASE);
2308 NCR5380_write(TARGET_COMMAND_REG, 0);
2309 NCR5380_write(SELECT_ENABLE_REG, 0);
2310
2311 /* After the reset, there are no more connected or disconnected commands
2312 * and no busy units; so clear the low-level status here to avoid
2313 * conflicts when the mid-level code tries to wake up the affected
2314 * commands!
2315 */
2316
1884c283
FT
2317 if (hostdata->selecting) {
2318 hostdata->selecting->result = DID_RESET << 16;
2319 complete_cmd(instance, hostdata->selecting);
2320 hostdata->selecting = NULL;
2321 }
62717f53
FT
2322
2323 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2324 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2325
2326 set_host_byte(cmd, DID_RESET);
216fad91 2327 complete_cmd(instance, cmd);
62717f53 2328 }
1884c283 2329 INIT_LIST_HEAD(&hostdata->disconnected);
62717f53
FT
2330
2331 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2332 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2333
62717f53
FT
2334 cmd->scsi_done(cmd);
2335 }
1884c283 2336 INIT_LIST_HEAD(&hostdata->autosense);
62717f53
FT
2337
2338 if (hostdata->connected) {
2339 set_host_byte(hostdata->connected, DID_RESET);
2340 complete_cmd(instance, hostdata->connected);
2341 hostdata->connected = NULL;
2342 }
2343
62717f53
FT
2344 for (i = 0; i < 8; ++i)
2345 hostdata->busy[i] = 0;
62717f53 2346 hostdata->dma_len = 0;
62717f53
FT
2347
2348 queue_work(hostdata->work_q, &hostdata->main_task);
52d3e561 2349 maybe_release_dma_irq(instance);
6b0e87a6
FT
2350}
2351
2352/**
2353 * NCR5380_host_reset - reset the SCSI host
2354 * @cmd: SCSI command undergoing EH
2355 *
2356 * Returns SUCCESS
2357 */
2358
2359static int NCR5380_host_reset(struct scsi_cmnd *cmd)
2360{
2361 struct Scsi_Host *instance = cmd->device->host;
2362 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2363 unsigned long flags;
2364 struct NCR5380_cmd *ncmd;
2365
2366 spin_lock_irqsave(&hostdata->lock, flags);
2367
2368#if (NDEBUG & NDEBUG_ANY)
2369 shost_printk(KERN_INFO, instance, __func__);
2370#endif
2371 NCR5380_dprint(NDEBUG_ANY, instance);
2372 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2373
2374 list_for_each_entry(ncmd, &hostdata->unissued, list) {
2375 struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd);
2376
2377 scmd->result = DID_RESET << 16;
2378 scmd->scsi_done(scmd);
2379 }
2380 INIT_LIST_HEAD(&hostdata->unissued);
2381
2382 do_reset(instance);
2383 bus_reset_cleanup(instance);
2384
11d2f63b 2385 spin_unlock_irqrestore(&hostdata->lock, flags);
1da177e4 2386
1da177e4
LT
2387 return SUCCESS;
2388}