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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
4a71df50 | 2 | /* |
4a71df50 FB |
3 | * Copyright IBM Corp. 2007 |
4 | * Author(s): Frank Pavlic <fpavlic@de.ibm.com>, | |
5 | * Thomas Spatzier <tspat@de.ibm.com>, | |
6 | * Frank Blaschka <frank.blaschka@de.ibm.com> | |
7 | */ | |
8 | ||
9 | #ifndef __QETH_CORE_MPC_H__ | |
10 | #define __QETH_CORE_MPC_H__ | |
11 | ||
12 | #include <asm/qeth.h> | |
99f0b85d | 13 | #include <uapi/linux/if_ether.h> |
8bf70b68 | 14 | #include <uapi/linux/in6.h> |
4a71df50 FB |
15 | |
16 | #define IPA_PDU_HEADER_SIZE 0x40 | |
17 | #define QETH_IPA_PDU_LEN_TOTAL(buffer) (buffer + 0x0e) | |
18 | #define QETH_IPA_PDU_LEN_PDU1(buffer) (buffer + 0x26) | |
19 | #define QETH_IPA_PDU_LEN_PDU2(buffer) (buffer + 0x29) | |
20 | #define QETH_IPA_PDU_LEN_PDU3(buffer) (buffer + 0x3a) | |
21 | ||
22 | extern unsigned char IPA_PDU_HEADER[]; | |
23 | #define QETH_IPA_CMD_DEST_ADDR(buffer) (buffer + 0x2c) | |
24 | ||
4a71df50 FB |
25 | #define QETH_SEQ_NO_LENGTH 4 |
26 | #define QETH_MPC_TOKEN_LENGTH 4 | |
27 | #define QETH_MCL_LENGTH 4 | |
4a71df50 FB |
28 | |
29 | #define QETH_TIMEOUT (10 * HZ) | |
30 | #define QETH_IPA_TIMEOUT (45 * HZ) | |
db71bbbd | 31 | |
4a71df50 FB |
32 | /*****************************************************************************/ |
33 | /* IP Assist related definitions */ | |
34 | /*****************************************************************************/ | |
35 | #define IPA_CMD_INITIATOR_HOST 0x00 | |
36 | #define IPA_CMD_INITIATOR_OSA 0x01 | |
37 | #define IPA_CMD_INITIATOR_HOST_REPLY 0x80 | |
38 | #define IPA_CMD_INITIATOR_OSA_REPLY 0x81 | |
39 | #define IPA_CMD_PRIM_VERSION_NO 0x01 | |
40 | ||
4666d7fb JW |
41 | struct qeth_ipa_caps { |
42 | u32 supported; | |
43 | u32 enabled; | |
44 | }; | |
45 | ||
46 | static inline bool qeth_ipa_caps_supported(struct qeth_ipa_caps *caps, u32 mask) | |
47 | { | |
48 | return (caps->supported & mask) == mask; | |
49 | } | |
50 | ||
51 | static inline bool qeth_ipa_caps_enabled(struct qeth_ipa_caps *caps, u32 mask) | |
52 | { | |
53 | return (caps->enabled & mask) == mask; | |
54 | } | |
55 | ||
4a71df50 | 56 | enum qeth_card_types { |
5113fec0 UB |
57 | QETH_CARD_TYPE_OSD = 1, |
58 | QETH_CARD_TYPE_IQD = 5, | |
59 | QETH_CARD_TYPE_OSN = 6, | |
60 | QETH_CARD_TYPE_OSM = 3, | |
61 | QETH_CARD_TYPE_OSX = 2, | |
4a71df50 FB |
62 | }; |
63 | ||
86c0cdb9 | 64 | #define IS_IQD(card) ((card)->info.type == QETH_CARD_TYPE_IQD) |
b144b99f | 65 | #define IS_OSD(card) ((card)->info.type == QETH_CARD_TYPE_OSD) |
5fc692a7 | 66 | #define IS_OSM(card) ((card)->info.type == QETH_CARD_TYPE_OSM) |
72f219da | 67 | #define IS_OSN(card) ((card)->info.type == QETH_CARD_TYPE_OSN) |
8024cc9e | 68 | #define IS_OSX(card) ((card)->info.type == QETH_CARD_TYPE_OSX) |
379ac99e | 69 | #define IS_VM_NIC(card) ((card)->info.is_vm_nic) |
86c0cdb9 | 70 | |
4a71df50 FB |
71 | #define QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE 0x18 |
72 | /* only the first two bytes are looked at in qeth_get_cardname_short */ | |
73 | enum qeth_link_types { | |
74 | QETH_LINK_TYPE_FAST_ETH = 0x01, | |
75 | QETH_LINK_TYPE_HSTR = 0x02, | |
76 | QETH_LINK_TYPE_GBIT_ETH = 0x03, | |
77 | QETH_LINK_TYPE_OSN = 0x04, | |
78 | QETH_LINK_TYPE_10GBIT_ETH = 0x10, | |
54e049c2 | 79 | QETH_LINK_TYPE_25GBIT_ETH = 0x12, |
4a71df50 FB |
80 | QETH_LINK_TYPE_LANE_ETH100 = 0x81, |
81 | QETH_LINK_TYPE_LANE_TR = 0x82, | |
82 | QETH_LINK_TYPE_LANE_ETH1000 = 0x83, | |
83 | QETH_LINK_TYPE_LANE = 0x88, | |
4a71df50 FB |
84 | }; |
85 | ||
4a71df50 FB |
86 | /* |
87 | * Routing stuff | |
88 | */ | |
89 | #define RESET_ROUTING_FLAG 0x10 /* indicate that routing type shall be set */ | |
90 | enum qeth_routing_types { | |
91 | /* TODO: set to bit flag used in IPA Command */ | |
92 | NO_ROUTER = 0, | |
93 | PRIMARY_ROUTER = 1, | |
94 | SECONDARY_ROUTER = 2, | |
95 | MULTICAST_ROUTER = 3, | |
96 | PRIMARY_CONNECTOR = 4, | |
97 | SECONDARY_CONNECTOR = 5, | |
98 | }; | |
99 | ||
100 | /* IPA Commands */ | |
101 | enum qeth_ipa_cmds { | |
102 | IPA_CMD_STARTLAN = 0x01, | |
103 | IPA_CMD_STOPLAN = 0x02, | |
104 | IPA_CMD_SETVMAC = 0x21, | |
105 | IPA_CMD_DELVMAC = 0x22, | |
106 | IPA_CMD_SETGMAC = 0x23, | |
107 | IPA_CMD_DELGMAC = 0x24, | |
108 | IPA_CMD_SETVLAN = 0x25, | |
109 | IPA_CMD_DELVLAN = 0x26, | |
a45b3faf | 110 | IPA_CMD_VNICC = 0x2a, |
9c23f4da | 111 | IPA_CMD_SETBRIDGEPORT_OSA = 0x2b, |
4a71df50 FB |
112 | IPA_CMD_SETCCID = 0x41, |
113 | IPA_CMD_DELCCID = 0x42, | |
114 | IPA_CMD_MODCCID = 0x43, | |
115 | IPA_CMD_SETIP = 0xb1, | |
116 | IPA_CMD_QIPASSIST = 0xb2, | |
117 | IPA_CMD_SETASSPARMS = 0xb3, | |
118 | IPA_CMD_SETIPM = 0xb4, | |
119 | IPA_CMD_DELIPM = 0xb5, | |
120 | IPA_CMD_SETRTG = 0xb6, | |
121 | IPA_CMD_DELIP = 0xb7, | |
122 | IPA_CMD_SETADAPTERPARMS = 0xb8, | |
123 | IPA_CMD_SET_DIAG_ASS = 0xb9, | |
9c23f4da | 124 | IPA_CMD_SETBRIDGEPORT_IQD = 0xbe, |
4a71df50 FB |
125 | IPA_CMD_CREATE_ADDR = 0xc3, |
126 | IPA_CMD_DESTROY_ADDR = 0xc4, | |
127 | IPA_CMD_REGISTER_LOCAL_ADDR = 0xd1, | |
128 | IPA_CMD_UNREGISTER_LOCAL_ADDR = 0xd2, | |
9f48b9db | 129 | IPA_CMD_ADDRESS_CHANGE_NOTIF = 0xd3, |
4a71df50 FB |
130 | IPA_CMD_UNKNOWN = 0x00 |
131 | }; | |
132 | ||
133 | enum qeth_ip_ass_cmds { | |
134 | IPA_CMD_ASS_START = 0x0001, | |
135 | IPA_CMD_ASS_STOP = 0x0002, | |
136 | IPA_CMD_ASS_CONFIGURE = 0x0003, | |
137 | IPA_CMD_ASS_ENABLE = 0x0004, | |
138 | }; | |
139 | ||
140 | enum qeth_arp_process_subcmds { | |
141 | IPA_CMD_ASS_ARP_SET_NO_ENTRIES = 0x0003, | |
142 | IPA_CMD_ASS_ARP_QUERY_CACHE = 0x0004, | |
143 | IPA_CMD_ASS_ARP_ADD_ENTRY = 0x0005, | |
144 | IPA_CMD_ASS_ARP_REMOVE_ENTRY = 0x0006, | |
145 | IPA_CMD_ASS_ARP_FLUSH_CACHE = 0x0007, | |
146 | IPA_CMD_ASS_ARP_QUERY_INFO = 0x0104, | |
147 | IPA_CMD_ASS_ARP_QUERY_STATS = 0x0204, | |
148 | }; | |
149 | ||
150 | ||
151 | /* Return Codes for IPA Commands | |
152 | * according to OSA card Specs */ | |
153 | ||
154 | enum qeth_ipa_return_codes { | |
155 | IPA_RC_SUCCESS = 0x0000, | |
156 | IPA_RC_NOTSUPP = 0x0001, | |
157 | IPA_RC_IP_TABLE_FULL = 0x0002, | |
158 | IPA_RC_UNKNOWN_ERROR = 0x0003, | |
159 | IPA_RC_UNSUPPORTED_COMMAND = 0x0004, | |
76b11f8e UB |
160 | IPA_RC_TRACE_ALREADY_ACTIVE = 0x0005, |
161 | IPA_RC_INVALID_FORMAT = 0x0006, | |
4a71df50 | 162 | IPA_RC_DUP_IPV6_REMOTE = 0x0008, |
2063a5f5 | 163 | IPA_RC_SBP_IQD_NOT_CONFIGURED = 0x000C, |
4a71df50 FB |
164 | IPA_RC_DUP_IPV6_HOME = 0x0010, |
165 | IPA_RC_UNREGISTERED_ADDR = 0x0011, | |
166 | IPA_RC_NO_ID_AVAILABLE = 0x0012, | |
167 | IPA_RC_ID_NOT_FOUND = 0x0013, | |
2063a5f5 KM |
168 | IPA_RC_SBP_IQD_ANO_DEV_PRIMARY = 0x0014, |
169 | IPA_RC_SBP_IQD_CURRENT_SECOND = 0x0018, | |
170 | IPA_RC_SBP_IQD_LIMIT_SECOND = 0x001C, | |
4a71df50 | 171 | IPA_RC_INVALID_IP_VERSION = 0x0020, |
2063a5f5 | 172 | IPA_RC_SBP_IQD_CURRENT_PRIMARY = 0x0024, |
4a71df50 | 173 | IPA_RC_LAN_FRAME_MISMATCH = 0x0040, |
2063a5f5 | 174 | IPA_RC_SBP_IQD_NO_QDIO_QUEUES = 0x00EB, |
4a71df50 FB |
175 | IPA_RC_L2_UNSUPPORTED_CMD = 0x2003, |
176 | IPA_RC_L2_DUP_MAC = 0x2005, | |
177 | IPA_RC_L2_ADDR_TABLE_FULL = 0x2006, | |
178 | IPA_RC_L2_DUP_LAYER3_MAC = 0x200a, | |
179 | IPA_RC_L2_GMAC_NOT_FOUND = 0x200b, | |
0666eb06 UB |
180 | IPA_RC_L2_MAC_NOT_AUTH_BY_HYP = 0x200c, |
181 | IPA_RC_L2_MAC_NOT_AUTH_BY_ADP = 0x200d, | |
4a71df50 FB |
182 | IPA_RC_L2_MAC_NOT_FOUND = 0x2010, |
183 | IPA_RC_L2_INVALID_VLAN_ID = 0x2015, | |
184 | IPA_RC_L2_DUP_VLAN_ID = 0x2016, | |
185 | IPA_RC_L2_VLAN_ID_NOT_FOUND = 0x2017, | |
2aa48671 | 186 | IPA_RC_L2_VLAN_ID_NOT_ALLOWED = 0x2050, |
a45b3faf | 187 | IPA_RC_VNICC_VNICBP = 0x20B0, |
2063a5f5 KM |
188 | IPA_RC_SBP_OSA_NOT_CONFIGURED = 0x2B0C, |
189 | IPA_RC_SBP_OSA_OS_MISMATCH = 0x2B10, | |
190 | IPA_RC_SBP_OSA_ANO_DEV_PRIMARY = 0x2B14, | |
191 | IPA_RC_SBP_OSA_CURRENT_SECOND = 0x2B18, | |
192 | IPA_RC_SBP_OSA_LIMIT_SECOND = 0x2B1C, | |
193 | IPA_RC_SBP_OSA_NOT_AUTHD_BY_ZMAN = 0x2B20, | |
194 | IPA_RC_SBP_OSA_CURRENT_PRIMARY = 0x2B24, | |
195 | IPA_RC_SBP_OSA_NO_QDIO_QUEUES = 0x2BEB, | |
4a71df50 FB |
196 | IPA_RC_DATA_MISMATCH = 0xe001, |
197 | IPA_RC_INVALID_MTU_SIZE = 0xe002, | |
198 | IPA_RC_INVALID_LANTYPE = 0xe003, | |
199 | IPA_RC_INVALID_LANNUM = 0xe004, | |
200 | IPA_RC_DUPLICATE_IP_ADDRESS = 0xe005, | |
201 | IPA_RC_IP_ADDR_TABLE_FULL = 0xe006, | |
202 | IPA_RC_LAN_PORT_STATE_ERROR = 0xe007, | |
203 | IPA_RC_SETIP_NO_STARTLAN = 0xe008, | |
204 | IPA_RC_SETIP_ALREADY_RECEIVED = 0xe009, | |
205 | IPA_RC_IP_ADDR_ALREADY_USED = 0xe00a, | |
2d921c32 | 206 | IPA_RC_MC_ADDR_NOT_FOUND = 0xe00b, |
4a71df50 FB |
207 | IPA_RC_SETIP_INVALID_VERSION = 0xe00d, |
208 | IPA_RC_UNSUPPORTED_SUBCMD = 0xe00e, | |
209 | IPA_RC_ARP_ASSIST_NO_ENABLE = 0xe00f, | |
210 | IPA_RC_PRIMARY_ALREADY_DEFINED = 0xe010, | |
211 | IPA_RC_SECOND_ALREADY_DEFINED = 0xe011, | |
212 | IPA_RC_INVALID_SETRTG_INDICATOR = 0xe012, | |
213 | IPA_RC_MC_ADDR_ALREADY_DEFINED = 0xe013, | |
214 | IPA_RC_LAN_OFFLINE = 0xe080, | |
0f54761d | 215 | IPA_RC_VEPA_TO_VEB_TRANSITION = 0xe090, |
4a71df50 FB |
216 | IPA_RC_INVALID_IP_VERSION2 = 0xf001, |
217 | IPA_RC_FFFF = 0xffff | |
218 | }; | |
a45b3faf HW |
219 | /* for VNIC Characteristics */ |
220 | #define IPA_RC_VNICC_OOSEQ 0x0005 | |
221 | ||
76b11f8e UB |
222 | /* for SET_DIAGNOSTIC_ASSIST */ |
223 | #define IPA_RC_INVALID_SUBCMD IPA_RC_IP_TABLE_FULL | |
224 | #define IPA_RC_HARDWARE_AUTH_ERROR IPA_RC_UNKNOWN_ERROR | |
4a71df50 | 225 | |
2063a5f5 KM |
226 | /* for SETBRIDGEPORT (double occupancies) */ |
227 | #define IPA_RC_SBP_IQD_OS_MISMATCH IPA_RC_DUP_IPV6_HOME | |
228 | #define IPA_RC_SBP_IQD_NOT_AUTHD_BY_ZMAN IPA_RC_INVALID_IP_VERSION | |
229 | ||
4a71df50 FB |
230 | /* IPA function flags; each flag marks availability of respective function */ |
231 | enum qeth_ipa_funcs { | |
232 | IPA_ARP_PROCESSING = 0x00000001L, | |
233 | IPA_INBOUND_CHECKSUM = 0x00000002L, | |
234 | IPA_OUTBOUND_CHECKSUM = 0x00000004L, | |
4845b93f | 235 | /* RESERVED = 0x00000008L,*/ |
4a71df50 FB |
236 | IPA_FILTERING = 0x00000010L, |
237 | IPA_IPV6 = 0x00000020L, | |
238 | IPA_MULTICASTING = 0x00000040L, | |
239 | IPA_IP_REASSEMBLY = 0x00000080L, | |
240 | IPA_QUERY_ARP_COUNTERS = 0x00000100L, | |
241 | IPA_QUERY_ARP_ADDR_INFO = 0x00000200L, | |
242 | IPA_SETADAPTERPARMS = 0x00000400L, | |
243 | IPA_VLAN_PRIO = 0x00000800L, | |
244 | IPA_PASSTHRU = 0x00001000L, | |
245 | IPA_FLUSH_ARP_SUPPORT = 0x00002000L, | |
246 | IPA_FULL_VLAN = 0x00004000L, | |
247 | IPA_INBOUND_PASSTHRU = 0x00008000L, | |
248 | IPA_SOURCE_MAC = 0x00010000L, | |
249 | IPA_OSA_MC_ROUTER = 0x00020000L, | |
250 | IPA_QUERY_ARP_ASSIST = 0x00040000L, | |
251 | IPA_INBOUND_TSO = 0x00080000L, | |
252 | IPA_OUTBOUND_TSO = 0x00100000L, | |
d7e6ed97 | 253 | IPA_INBOUND_CHECKSUM_V6 = 0x00400000L, |
571f9dd8 | 254 | IPA_OUTBOUND_CHECKSUM_V6 = 0x00800000L, |
4a71df50 FB |
255 | }; |
256 | ||
257 | /* SETIP/DELIP IPA Command: ***************************************************/ | |
258 | enum qeth_ipa_setdelip_flags { | |
259 | QETH_IPA_SETDELIP_DEFAULT = 0x00L, /* default */ | |
260 | QETH_IPA_SETIP_VIPA_FLAG = 0x01L, /* no grat. ARP */ | |
261 | QETH_IPA_SETIP_TAKEOVER_FLAG = 0x02L, /* nofail on grat. ARP */ | |
262 | QETH_IPA_DELIP_ADDR_2_B_TAKEN_OVER = 0x20L, | |
263 | QETH_IPA_DELIP_VIPA_FLAG = 0x40L, | |
264 | QETH_IPA_DELIP_ADDR_NEEDS_SETIP = 0x80L, | |
265 | }; | |
266 | ||
267 | /* SETADAPTER IPA Command: ****************************************************/ | |
268 | enum qeth_ipa_setadp_cmd { | |
d64ecc22 EL |
269 | IPA_SETADP_QUERY_COMMANDS_SUPPORTED = 0x00000001L, |
270 | IPA_SETADP_ALTER_MAC_ADDRESS = 0x00000002L, | |
271 | IPA_SETADP_ADD_DELETE_GROUP_ADDRESS = 0x00000004L, | |
272 | IPA_SETADP_ADD_DELETE_FUNCTIONAL_ADDR = 0x00000008L, | |
273 | IPA_SETADP_SET_ADDRESSING_MODE = 0x00000010L, | |
274 | IPA_SETADP_SET_CONFIG_PARMS = 0x00000020L, | |
275 | IPA_SETADP_SET_CONFIG_PARMS_EXTENDED = 0x00000040L, | |
276 | IPA_SETADP_SET_BROADCAST_MODE = 0x00000080L, | |
277 | IPA_SETADP_SEND_OSA_MESSAGE = 0x00000100L, | |
278 | IPA_SETADP_SET_SNMP_CONTROL = 0x00000200L, | |
279 | IPA_SETADP_QUERY_CARD_INFO = 0x00000400L, | |
280 | IPA_SETADP_SET_PROMISC_MODE = 0x00000800L, | |
76b11f8e | 281 | IPA_SETADP_SET_DIAG_ASSIST = 0x00002000L, |
d64ecc22 | 282 | IPA_SETADP_SET_ACCESS_CONTROL = 0x00010000L, |
c3ab96f3 | 283 | IPA_SETADP_QUERY_OAT = 0x00080000L, |
45cbb2e4 | 284 | IPA_SETADP_QUERY_SWITCH_ATTRIBUTES = 0x00100000L, |
4a71df50 FB |
285 | }; |
286 | enum qeth_ipa_mac_ops { | |
287 | CHANGE_ADDR_READ_MAC = 0, | |
288 | CHANGE_ADDR_REPLACE_MAC = 1, | |
289 | CHANGE_ADDR_ADD_MAC = 2, | |
290 | CHANGE_ADDR_DEL_MAC = 4, | |
291 | CHANGE_ADDR_RESET_MAC = 8, | |
292 | }; | |
293 | enum qeth_ipa_addr_ops { | |
294 | CHANGE_ADDR_READ_ADDR = 0, | |
295 | CHANGE_ADDR_ADD_ADDR = 1, | |
296 | CHANGE_ADDR_DEL_ADDR = 2, | |
297 | CHANGE_ADDR_FLUSH_ADDR_TABLE = 4, | |
298 | }; | |
299 | enum qeth_ipa_promisc_modes { | |
300 | SET_PROMISC_MODE_OFF = 0, | |
301 | SET_PROMISC_MODE_ON = 1, | |
302 | }; | |
d64ecc22 EL |
303 | enum qeth_ipa_isolation_modes { |
304 | ISOLATION_MODE_NONE = 0x00000000L, | |
305 | ISOLATION_MODE_FWD = 0x00000001L, | |
306 | ISOLATION_MODE_DROP = 0x00000002L, | |
307 | }; | |
308 | enum qeth_ipa_set_access_mode_rc { | |
309 | SET_ACCESS_CTRL_RC_SUCCESS = 0x0000, | |
310 | SET_ACCESS_CTRL_RC_NOT_SUPPORTED = 0x0004, | |
311 | SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED = 0x0008, | |
312 | SET_ACCESS_CTRL_RC_ALREADY_ISOLATED = 0x0010, | |
313 | SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER = 0x0014, | |
314 | SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF = 0x0018, | |
0f54761d SR |
315 | SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED = 0x0022, |
316 | SET_ACCESS_CTRL_RC_REFLREL_FAILED = 0x0024, | |
317 | SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED = 0x0028, | |
d64ecc22 | 318 | }; |
02d5cb5b EC |
319 | enum qeth_card_info_card_type { |
320 | CARD_INFO_TYPE_1G_COPPER_A = 0x61, | |
321 | CARD_INFO_TYPE_1G_FIBRE_A = 0x71, | |
322 | CARD_INFO_TYPE_10G_FIBRE_A = 0x91, | |
323 | CARD_INFO_TYPE_1G_COPPER_B = 0xb1, | |
324 | CARD_INFO_TYPE_1G_FIBRE_B = 0xa1, | |
325 | CARD_INFO_TYPE_10G_FIBRE_B = 0xc1, | |
326 | }; | |
327 | enum qeth_card_info_port_mode { | |
328 | CARD_INFO_PORTM_HALFDUPLEX = 0x0002, | |
329 | CARD_INFO_PORTM_FULLDUPLEX = 0x0003, | |
330 | }; | |
331 | enum qeth_card_info_port_speed { | |
332 | CARD_INFO_PORTS_10M = 0x00000005, | |
333 | CARD_INFO_PORTS_100M = 0x00000006, | |
334 | CARD_INFO_PORTS_1G = 0x00000007, | |
335 | CARD_INFO_PORTS_10G = 0x00000008, | |
54e049c2 | 336 | CARD_INFO_PORTS_25G = 0x0000000A, |
02d5cb5b | 337 | }; |
4a71df50 FB |
338 | |
339 | /* (SET)DELIP(M) IPA stuff ***************************************************/ | |
340 | struct qeth_ipacmd_setdelip4 { | |
341 | __u8 ip_addr[4]; | |
342 | __u8 mask[4]; | |
343 | __u32 flags; | |
344 | } __attribute__ ((packed)); | |
345 | ||
346 | struct qeth_ipacmd_setdelip6 { | |
347 | __u8 ip_addr[16]; | |
348 | __u8 mask[16]; | |
349 | __u32 flags; | |
350 | } __attribute__ ((packed)); | |
351 | ||
352 | struct qeth_ipacmd_setdelipm { | |
353 | __u8 mac[6]; | |
354 | __u8 padding[2]; | |
8bf70b68 | 355 | struct in6_addr ip; |
4a71df50 FB |
356 | } __attribute__ ((packed)); |
357 | ||
358 | struct qeth_ipacmd_layer2setdelmac { | |
359 | __u32 mac_length; | |
360 | __u8 mac[6]; | |
361 | } __attribute__ ((packed)); | |
362 | ||
363 | struct qeth_ipacmd_layer2setdelvlan { | |
364 | __u16 vlan_id; | |
365 | } __attribute__ ((packed)); | |
366 | ||
4a71df50 | 367 | struct qeth_ipacmd_setassparms_hdr { |
4a71df50 FB |
368 | __u16 length; |
369 | __u16 command_code; | |
370 | __u16 return_code; | |
371 | __u8 number_of_replies; | |
372 | __u8 seq_no; | |
373 | } __attribute__((packed)); | |
374 | ||
375 | struct qeth_arp_query_data { | |
376 | __u16 request_bits; | |
377 | __u16 reply_bits; | |
378 | __u32 no_entries; | |
d0ddf30f | 379 | char data; /* only for replies */ |
4a71df50 FB |
380 | } __attribute__((packed)); |
381 | ||
382 | /* used as parameter for arp_query reply */ | |
383 | struct qeth_arp_query_info { | |
384 | __u32 udata_len; | |
385 | __u16 mask_bits; | |
386 | __u32 udata_offset; | |
387 | __u32 no_entries; | |
388 | char *udata; | |
389 | }; | |
390 | ||
f9d8e6dc TR |
391 | /* IPA set assist segmentation bit definitions for receive and |
392 | * transmit checksum offloading. | |
393 | */ | |
394 | enum qeth_ipa_checksum_bits { | |
395 | QETH_IPA_CHECKSUM_IP_HDR = 0x0002, | |
396 | QETH_IPA_CHECKSUM_UDP = 0x0008, | |
397 | QETH_IPA_CHECKSUM_TCP = 0x0010, | |
398 | QETH_IPA_CHECKSUM_LP2LP = 0x0020 | |
399 | }; | |
400 | ||
4666d7fb JW |
401 | enum qeth_ipa_large_send_caps { |
402 | QETH_IPA_LARGE_SEND_TCP = 0x00000001, | |
403 | }; | |
404 | ||
405 | struct qeth_tso_start_data { | |
406 | u32 mss; | |
407 | u32 supported; | |
408 | }; | |
409 | ||
4a71df50 FB |
410 | /* SETASSPARMS IPA Command: */ |
411 | struct qeth_ipacmd_setassparms { | |
b9150461 | 412 | u32 assist_no; |
4a71df50 FB |
413 | struct qeth_ipacmd_setassparms_hdr hdr; |
414 | union { | |
415 | __u32 flags_32bit; | |
4666d7fb | 416 | struct qeth_ipa_caps caps; |
125d7d30 | 417 | struct qeth_arp_cache_entry arp_entry; |
4a71df50 | 418 | struct qeth_arp_query_data query_arp; |
4666d7fb | 419 | struct qeth_tso_start_data tso; |
4a71df50 FB |
420 | __u8 ip[16]; |
421 | } data; | |
422 | } __attribute__ ((packed)); | |
423 | ||
c593642c | 424 | #define SETASS_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_setassparms,\ |
1c696c89 | 425 | data.field) |
4a71df50 FB |
426 | |
427 | /* SETRTG IPA Command: ****************************************************/ | |
428 | struct qeth_set_routing { | |
429 | __u8 type; | |
430 | }; | |
431 | ||
432 | /* SETADAPTERPARMS IPA Command: *******************************************/ | |
433 | struct qeth_query_cmds_supp { | |
434 | __u32 no_lantypes_supp; | |
435 | __u8 lan_type; | |
436 | __u8 reserved1[3]; | |
437 | __u32 supported_cmds; | |
438 | __u8 reserved2[8]; | |
439 | } __attribute__ ((packed)); | |
440 | ||
441 | struct qeth_change_addr { | |
99f0b85d JW |
442 | u32 cmd; |
443 | u32 addr_size; | |
444 | u32 no_macs; | |
445 | u8 addr[ETH_ALEN]; | |
446 | }; | |
4a71df50 FB |
447 | |
448 | struct qeth_snmp_cmd { | |
449 | __u8 token[16]; | |
450 | __u32 request; | |
451 | __u32 interface; | |
452 | __u32 returncode; | |
453 | __u32 firmwarelevel; | |
454 | __u32 seqno; | |
455 | __u8 data; | |
456 | } __attribute__ ((packed)); | |
457 | ||
458 | struct qeth_snmp_ureq_hdr { | |
459 | __u32 data_len; | |
460 | __u32 req_len; | |
461 | __u32 reserved1; | |
462 | __u32 reserved2; | |
463 | } __attribute__ ((packed)); | |
464 | ||
465 | struct qeth_snmp_ureq { | |
466 | struct qeth_snmp_ureq_hdr hdr; | |
467 | struct qeth_snmp_cmd cmd; | |
468 | } __attribute__((packed)); | |
469 | ||
d64ecc22 EL |
470 | /* SET_ACCESS_CONTROL: same format for request and reply */ |
471 | struct qeth_set_access_ctrl { | |
472 | __u32 subcmd_code; | |
0f54761d | 473 | __u8 reserved[8]; |
d64ecc22 EL |
474 | } __attribute__((packed)); |
475 | ||
c3ab96f3 FB |
476 | struct qeth_query_oat { |
477 | __u32 subcmd_code; | |
478 | __u8 reserved[12]; | |
479 | } __packed; | |
480 | ||
481 | struct qeth_qoat_priv { | |
482 | __u32 buffer_len; | |
483 | __u32 response_len; | |
484 | char *buffer; | |
485 | }; | |
486 | ||
02d5cb5b EC |
487 | struct qeth_query_card_info { |
488 | __u8 card_type; | |
489 | __u8 reserved1; | |
490 | __u16 port_mode; | |
491 | __u32 port_speed; | |
492 | __u32 reserved2; | |
493 | }; | |
494 | ||
45cbb2e4 SR |
495 | #define QETH_SWITCH_FORW_802_1 0x00000001 |
496 | #define QETH_SWITCH_FORW_REFL_RELAY 0x00000002 | |
497 | #define QETH_SWITCH_CAP_RTE 0x00000004 | |
498 | #define QETH_SWITCH_CAP_ECP 0x00000008 | |
499 | #define QETH_SWITCH_CAP_VDP 0x00000010 | |
500 | ||
501 | struct qeth_query_switch_attributes { | |
502 | __u8 version; | |
503 | __u8 reserved1; | |
504 | __u16 reserved2; | |
505 | __u32 capabilities; | |
506 | __u32 settings; | |
507 | __u8 reserved3[8]; | |
508 | }; | |
509 | ||
b144b99f JW |
510 | #define QETH_SETADP_FLAGS_VIRTUAL_MAC 0x80 /* for CHANGE_ADDR_READ_MAC */ |
511 | ||
4a71df50 | 512 | struct qeth_ipacmd_setadpparms_hdr { |
b144b99f JW |
513 | u16 cmdlength; |
514 | u16 reserved2; | |
515 | u32 command_code; | |
516 | u16 return_code; | |
517 | u8 used_total; | |
518 | u8 seq_no; | |
519 | u8 flags; | |
520 | u8 reserved3[3]; | |
521 | }; | |
4a71df50 FB |
522 | |
523 | struct qeth_ipacmd_setadpparms { | |
b9150461 | 524 | struct qeth_ipa_caps hw_cmds; |
4a71df50 FB |
525 | struct qeth_ipacmd_setadpparms_hdr hdr; |
526 | union { | |
527 | struct qeth_query_cmds_supp query_cmds_supp; | |
528 | struct qeth_change_addr change_addr; | |
529 | struct qeth_snmp_cmd snmp; | |
d64ecc22 | 530 | struct qeth_set_access_ctrl set_access_ctrl; |
c3ab96f3 | 531 | struct qeth_query_oat query_oat; |
02d5cb5b | 532 | struct qeth_query_card_info card_info; |
45cbb2e4 | 533 | struct qeth_query_switch_attributes query_switch_attributes; |
4a71df50 FB |
534 | __u32 mode; |
535 | } data; | |
536 | } __attribute__ ((packed)); | |
537 | ||
c593642c | 538 | #define SETADP_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_setadpparms,\ |
b9150461 JW |
539 | data.field) |
540 | ||
4a71df50 FB |
541 | /* CREATE_ADDR IPA Command: ***********************************************/ |
542 | struct qeth_create_destroy_address { | |
543 | __u8 unique_id[8]; | |
544 | } __attribute__ ((packed)); | |
545 | ||
76b11f8e UB |
546 | /* SET DIAGNOSTIC ASSIST IPA Command: *************************************/ |
547 | ||
548 | enum qeth_diags_cmds { | |
549 | QETH_DIAGS_CMD_QUERY = 0x0001, | |
550 | QETH_DIAGS_CMD_TRAP = 0x0002, | |
551 | QETH_DIAGS_CMD_TRACE = 0x0004, | |
552 | QETH_DIAGS_CMD_NOLOG = 0x0008, | |
553 | QETH_DIAGS_CMD_DUMP = 0x0010, | |
554 | }; | |
555 | ||
556 | enum qeth_diags_trace_types { | |
557 | QETH_DIAGS_TYPE_HIPERSOCKET = 0x02, | |
558 | }; | |
559 | ||
560 | enum qeth_diags_trace_cmds { | |
561 | QETH_DIAGS_CMD_TRACE_ENABLE = 0x0001, | |
562 | QETH_DIAGS_CMD_TRACE_DISABLE = 0x0002, | |
563 | QETH_DIAGS_CMD_TRACE_MODIFY = 0x0004, | |
564 | QETH_DIAGS_CMD_TRACE_REPLACE = 0x0008, | |
565 | QETH_DIAGS_CMD_TRACE_QUERY = 0x0010, | |
566 | }; | |
567 | ||
1da74b1c FB |
568 | enum qeth_diags_trap_action { |
569 | QETH_DIAGS_TRAP_ARM = 0x01, | |
570 | QETH_DIAGS_TRAP_DISARM = 0x02, | |
571 | QETH_DIAGS_TRAP_CAPTURE = 0x04, | |
572 | }; | |
573 | ||
76b11f8e UB |
574 | struct qeth_ipacmd_diagass { |
575 | __u32 host_tod2; | |
576 | __u32:32; | |
577 | __u16 subcmd_len; | |
578 | __u16:16; | |
579 | __u32 subcmd; | |
580 | __u8 type; | |
581 | __u8 action; | |
582 | __u16 options; | |
1da74b1c FB |
583 | __u32 ext; |
584 | __u8 cdata[64]; | |
76b11f8e UB |
585 | } __attribute__ ((packed)); |
586 | ||
5cfbe10a JW |
587 | #define DIAG_HDR_LEN offsetofend(struct qeth_ipacmd_diagass, ext) |
588 | #define DIAG_SUB_HDR_LEN (offsetofend(struct qeth_ipacmd_diagass, ext) -\ | |
589 | offsetof(struct qeth_ipacmd_diagass, \ | |
590 | subcmd_len)) | |
591 | ||
a45b3faf HW |
592 | /* VNIC Characteristics IPA Command: *****************************************/ |
593 | /* IPA commands/sub commands for VNICC */ | |
594 | #define IPA_VNICC_QUERY_CHARS 0x00000000L | |
caa1f0b1 HW |
595 | #define IPA_VNICC_QUERY_CMDS 0x00000001L |
596 | #define IPA_VNICC_ENABLE 0x00000002L | |
597 | #define IPA_VNICC_DISABLE 0x00000004L | |
349d13d5 HW |
598 | #define IPA_VNICC_SET_TIMEOUT 0x00000008L |
599 | #define IPA_VNICC_GET_TIMEOUT 0x00000010L | |
caa1f0b1 HW |
600 | |
601 | /* VNICC flags */ | |
602 | #define QETH_VNICC_FLOODING 0x80000000 | |
603 | #define QETH_VNICC_MCAST_FLOODING 0x40000000 | |
604 | #define QETH_VNICC_LEARNING 0x20000000 | |
605 | #define QETH_VNICC_TAKEOVER_SETVMAC 0x10000000 | |
606 | #define QETH_VNICC_TAKEOVER_LEARNING 0x08000000 | |
607 | #define QETH_VNICC_BRIDGE_INVISIBLE 0x04000000 | |
608 | #define QETH_VNICC_RX_BCAST 0x02000000 | |
609 | ||
610 | /* VNICC default values */ | |
611 | #define QETH_VNICC_ALL 0xff000000 | |
612 | #define QETH_VNICC_DEFAULT QETH_VNICC_RX_BCAST | |
349d13d5 HW |
613 | /* default VNICC timeout in seconds */ |
614 | #define QETH_VNICC_DEFAULT_TIMEOUT 600 | |
a45b3faf HW |
615 | |
616 | /* VNICC header */ | |
617 | struct qeth_ipacmd_vnicc_hdr { | |
a45b3faf HW |
618 | u16 data_length; |
619 | u16 reserved; | |
620 | u32 sub_command; | |
621 | }; | |
622 | ||
caa1f0b1 HW |
623 | /* query supported commands for VNIC characteristic */ |
624 | struct qeth_vnicc_query_cmds { | |
625 | u32 vnic_char; | |
626 | u32 sup_cmds; | |
627 | }; | |
628 | ||
629 | /* enable/disable VNIC characteristic */ | |
630 | struct qeth_vnicc_set_char { | |
631 | u32 vnic_char; | |
632 | }; | |
633 | ||
349d13d5 HW |
634 | /* get/set timeout for VNIC characteristic */ |
635 | struct qeth_vnicc_getset_timeout { | |
636 | u32 vnic_char; | |
637 | u32 timeout; | |
638 | }; | |
639 | ||
a45b3faf HW |
640 | /* complete VNICC IPA command message */ |
641 | struct qeth_ipacmd_vnicc { | |
2cfb4810 | 642 | struct qeth_ipa_caps vnicc_cmds; |
a45b3faf | 643 | struct qeth_ipacmd_vnicc_hdr hdr; |
caa1f0b1 HW |
644 | union { |
645 | struct qeth_vnicc_query_cmds query_cmds; | |
646 | struct qeth_vnicc_set_char set_char; | |
349d13d5 | 647 | struct qeth_vnicc_getset_timeout getset_timeout; |
2cfb4810 | 648 | } data; |
a45b3faf HW |
649 | }; |
650 | ||
c593642c | 651 | #define VNICC_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_vnicc,\ |
2cfb4810 JW |
652 | data.field) |
653 | ||
b4d72c08 EC |
654 | /* SETBRIDGEPORT IPA Command: *********************************************/ |
655 | enum qeth_ipa_sbp_cmd { | |
656 | IPA_SBP_QUERY_COMMANDS_SUPPORTED = 0x00000000L, | |
657 | IPA_SBP_RESET_BRIDGE_PORT_ROLE = 0x00000001L, | |
658 | IPA_SBP_SET_PRIMARY_BRIDGE_PORT = 0x00000002L, | |
659 | IPA_SBP_SET_SECONDARY_BRIDGE_PORT = 0x00000004L, | |
660 | IPA_SBP_QUERY_BRIDGE_PORTS = 0x00000008L, | |
661 | IPA_SBP_BRIDGE_PORT_STATE_CHANGE = 0x00000010L, | |
662 | }; | |
663 | ||
664 | struct net_if_token { | |
665 | __u16 devnum; | |
666 | __u8 cssid; | |
667 | __u8 iid; | |
668 | __u8 ssid; | |
669 | __u8 chpid; | |
670 | __u16 chid; | |
671 | } __packed; | |
672 | ||
9f48b9db EC |
673 | struct mac_addr_lnid { |
674 | __u8 mac[6]; | |
675 | __u16 lnid; | |
676 | } __packed; | |
677 | ||
b4d72c08 | 678 | struct qeth_ipacmd_sbp_hdr { |
b4d72c08 EC |
679 | __u16 cmdlength; |
680 | __u16 reserved1; | |
681 | __u32 command_code; | |
682 | __u16 return_code; | |
683 | __u8 used_total; | |
684 | __u8 seq_no; | |
685 | __u32 reserved2; | |
686 | } __packed; | |
687 | ||
688 | struct qeth_sbp_query_cmds_supp { | |
689 | __u32 supported_cmds; | |
690 | __u32 reserved; | |
691 | } __packed; | |
692 | ||
b4d72c08 EC |
693 | struct qeth_sbp_set_primary { |
694 | struct net_if_token token; | |
695 | } __packed; | |
696 | ||
b4d72c08 EC |
697 | struct qeth_sbp_port_entry { |
698 | __u8 role; | |
699 | __u8 state; | |
700 | __u8 reserved1; | |
701 | __u8 reserved2; | |
702 | struct net_if_token token; | |
703 | } __packed; | |
704 | ||
705 | struct qeth_sbp_query_ports { | |
706 | __u8 primary_bp_supported; | |
707 | __u8 secondary_bp_supported; | |
708 | __u8 num_entries; | |
709 | __u8 entry_length; | |
710 | struct qeth_sbp_port_entry entry[]; | |
711 | } __packed; | |
712 | ||
713 | struct qeth_sbp_state_change { | |
714 | __u8 primary_bp_supported; | |
715 | __u8 secondary_bp_supported; | |
716 | __u8 num_entries; | |
717 | __u8 entry_length; | |
718 | struct qeth_sbp_port_entry entry[]; | |
719 | } __packed; | |
720 | ||
721 | struct qeth_ipacmd_setbridgeport { | |
b9150461 | 722 | struct qeth_ipa_caps sbp_cmds; |
b4d72c08 EC |
723 | struct qeth_ipacmd_sbp_hdr hdr; |
724 | union { | |
725 | struct qeth_sbp_query_cmds_supp query_cmds_supp; | |
b4d72c08 | 726 | struct qeth_sbp_set_primary set_primary; |
b4d72c08 EC |
727 | struct qeth_sbp_query_ports query_ports; |
728 | struct qeth_sbp_state_change state_change; | |
729 | } data; | |
730 | } __packed; | |
731 | ||
c593642c | 732 | #define SBP_DATA_SIZEOF(field) sizeof_field(struct qeth_ipacmd_setbridgeport,\ |
b9150461 JW |
733 | data.field) |
734 | ||
9f48b9db EC |
735 | /* ADDRESS_CHANGE_NOTIFICATION adapter-initiated "command" *******************/ |
736 | /* Bitmask for entry->change_code. Both bits may be raised. */ | |
737 | enum qeth_ipa_addr_change_code { | |
738 | IPA_ADDR_CHANGE_CODE_VLANID = 0x01, | |
739 | IPA_ADDR_CHANGE_CODE_MACADDR = 0x02, | |
740 | IPA_ADDR_CHANGE_CODE_REMOVAL = 0x80, /* else addition */ | |
741 | }; | |
9f48b9db EC |
742 | |
743 | struct qeth_ipacmd_addr_change_entry { | |
744 | struct net_if_token token; | |
745 | struct mac_addr_lnid addr_lnid; | |
746 | __u8 change_code; | |
747 | __u8 reserved1; | |
748 | __u16 reserved2; | |
749 | } __packed; | |
750 | ||
751 | struct qeth_ipacmd_addr_change { | |
752 | __u8 lost_event_mask; | |
753 | __u8 reserved; | |
754 | __u16 num_entries; | |
755 | struct qeth_ipacmd_addr_change_entry entry[]; | |
756 | } __packed; | |
757 | ||
4a71df50 FB |
758 | /* Header for each IPA command */ |
759 | struct qeth_ipacmd_hdr { | |
760 | __u8 command; | |
761 | __u8 initiator; | |
762 | __u16 seqno; | |
763 | __u16 return_code; | |
764 | __u8 adapter_type; | |
765 | __u8 rel_adapter_no; | |
766 | __u8 prim_version_no; | |
767 | __u8 param_count; | |
768 | __u16 prot_version; | |
769 | __u32 ipa_supported; | |
770 | __u32 ipa_enabled; | |
771 | } __attribute__ ((packed)); | |
772 | ||
773 | /* The IPA command itself */ | |
774 | struct qeth_ipa_cmd { | |
775 | struct qeth_ipacmd_hdr hdr; | |
776 | union { | |
777 | struct qeth_ipacmd_setdelip4 setdelip4; | |
778 | struct qeth_ipacmd_setdelip6 setdelip6; | |
779 | struct qeth_ipacmd_setdelipm setdelipm; | |
780 | struct qeth_ipacmd_setassparms setassparms; | |
781 | struct qeth_ipacmd_layer2setdelmac setdelmac; | |
782 | struct qeth_ipacmd_layer2setdelvlan setdelvlan; | |
783 | struct qeth_create_destroy_address create_destroy_addr; | |
784 | struct qeth_ipacmd_setadpparms setadapterparms; | |
785 | struct qeth_set_routing setrtg; | |
76b11f8e | 786 | struct qeth_ipacmd_diagass diagass; |
b4d72c08 | 787 | struct qeth_ipacmd_setbridgeport sbp; |
9f48b9db | 788 | struct qeth_ipacmd_addr_change addrchange; |
a45b3faf | 789 | struct qeth_ipacmd_vnicc vnicc; |
4a71df50 FB |
790 | } data; |
791 | } __attribute__ ((packed)); | |
792 | ||
c593642c | 793 | #define IPA_DATA_SIZEOF(field) sizeof_field(struct qeth_ipa_cmd, data.field) |
a59d121d | 794 | |
4a71df50 FB |
795 | /* |
796 | * special command for ARP processing. | |
797 | * this is not included in setassparms command before, because we get | |
798 | * problem with the size of struct qeth_ipacmd_setassparms otherwise | |
799 | */ | |
800 | enum qeth_ipa_arp_return_codes { | |
801 | QETH_IPA_ARP_RC_SUCCESS = 0x0000, | |
802 | QETH_IPA_ARP_RC_FAILED = 0x0001, | |
803 | QETH_IPA_ARP_RC_NOTSUPP = 0x0002, | |
804 | QETH_IPA_ARP_RC_OUT_OF_RANGE = 0x0003, | |
805 | QETH_IPA_ARP_RC_Q_NOTSUPP = 0x0004, | |
806 | QETH_IPA_ARP_RC_Q_NO_DATA = 0x0008, | |
807 | }; | |
808 | ||
048a7f8b JD |
809 | extern const char *qeth_get_ipa_msg(enum qeth_ipa_return_codes rc); |
810 | extern const char *qeth_get_ipa_cmd_name(enum qeth_ipa_cmds cmd); | |
4a71df50 | 811 | |
4a71df50 FB |
812 | /* Helper functions */ |
813 | #define IS_IPA_REPLY(cmd) ((cmd->hdr.initiator == IPA_CMD_INITIATOR_HOST) || \ | |
814 | (cmd->hdr.initiator == IPA_CMD_INITIATOR_OSA_REPLY)) | |
815 | ||
816 | /*****************************************************************************/ | |
817 | /* END OF IP Assist related definitions */ | |
818 | /*****************************************************************************/ | |
819 | ||
4a71df50 FB |
820 | extern unsigned char CM_ENABLE[]; |
821 | #define CM_ENABLE_SIZE 0x63 | |
822 | #define QETH_CM_ENABLE_ISSUER_RM_TOKEN(buffer) (buffer + 0x2c) | |
823 | #define QETH_CM_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53) | |
824 | #define QETH_CM_ENABLE_USER_DATA(buffer) (buffer + 0x5b) | |
825 | ||
826 | #define QETH_CM_ENABLE_RESP_FILTER_TOKEN(buffer) \ | |
827 | (PDU_ENCAPSULATION(buffer) + 0x13) | |
828 | ||
829 | ||
830 | extern unsigned char CM_SETUP[]; | |
831 | #define CM_SETUP_SIZE 0x64 | |
832 | #define QETH_CM_SETUP_DEST_ADDR(buffer) (buffer + 0x2c) | |
833 | #define QETH_CM_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51) | |
834 | #define QETH_CM_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a) | |
835 | ||
836 | #define QETH_CM_SETUP_RESP_DEST_ADDR(buffer) \ | |
837 | (PDU_ENCAPSULATION(buffer) + 0x1a) | |
838 | ||
839 | extern unsigned char ULP_ENABLE[]; | |
840 | #define ULP_ENABLE_SIZE 0x6b | |
841 | #define QETH_ULP_ENABLE_LINKNUM(buffer) (buffer + 0x61) | |
842 | #define QETH_ULP_ENABLE_DEST_ADDR(buffer) (buffer + 0x2c) | |
843 | #define QETH_ULP_ENABLE_FILTER_TOKEN(buffer) (buffer + 0x53) | |
844 | #define QETH_ULP_ENABLE_PORTNAME_AND_LL(buffer) (buffer + 0x62) | |
845 | #define QETH_ULP_ENABLE_RESP_FILTER_TOKEN(buffer) \ | |
846 | (PDU_ENCAPSULATION(buffer) + 0x13) | |
847 | #define QETH_ULP_ENABLE_RESP_MAX_MTU(buffer) \ | |
848 | (PDU_ENCAPSULATION(buffer) + 0x1f) | |
849 | #define QETH_ULP_ENABLE_RESP_DIFINFO_LEN(buffer) \ | |
850 | (PDU_ENCAPSULATION(buffer) + 0x17) | |
851 | #define QETH_ULP_ENABLE_RESP_LINK_TYPE(buffer) \ | |
852 | (PDU_ENCAPSULATION(buffer) + 0x2b) | |
6070d81e | 853 | /* Layer 2 definitions */ |
4a71df50 FB |
854 | #define QETH_PROT_LAYER2 0x08 |
855 | #define QETH_PROT_TCPIP 0x03 | |
856 | #define QETH_PROT_OSN2 0x0a | |
857 | #define QETH_ULP_ENABLE_PROT_TYPE(buffer) (buffer + 0x50) | |
858 | #define QETH_IPA_CMD_PROT_TYPE(buffer) (buffer + 0x19) | |
859 | ||
860 | extern unsigned char ULP_SETUP[]; | |
861 | #define ULP_SETUP_SIZE 0x6c | |
862 | #define QETH_ULP_SETUP_DEST_ADDR(buffer) (buffer + 0x2c) | |
863 | #define QETH_ULP_SETUP_CONNECTION_TOKEN(buffer) (buffer + 0x51) | |
864 | #define QETH_ULP_SETUP_FILTER_TOKEN(buffer) (buffer + 0x5a) | |
865 | #define QETH_ULP_SETUP_CUA(buffer) (buffer + 0x68) | |
866 | #define QETH_ULP_SETUP_REAL_DEVADDR(buffer) (buffer + 0x6a) | |
867 | ||
868 | #define QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(buffer) \ | |
869 | (PDU_ENCAPSULATION(buffer) + 0x1a) | |
870 | ||
871 | ||
872 | extern unsigned char DM_ACT[]; | |
873 | #define DM_ACT_SIZE 0x55 | |
874 | #define QETH_DM_ACT_DEST_ADDR(buffer) (buffer + 0x2c) | |
875 | #define QETH_DM_ACT_CONNECTION_TOKEN(buffer) (buffer + 0x51) | |
876 | ||
877 | ||
878 | ||
879 | #define QETH_TRANSPORT_HEADER_SEQ_NO(buffer) (buffer + 4) | |
880 | #define QETH_PDU_HEADER_SEQ_NO(buffer) (buffer + 0x1c) | |
881 | #define QETH_PDU_HEADER_ACK_SEQ_NO(buffer) (buffer + 0x20) | |
882 | ||
883 | extern unsigned char IDX_ACTIVATE_READ[]; | |
884 | extern unsigned char IDX_ACTIVATE_WRITE[]; | |
885 | ||
886 | #define IDX_ACTIVATE_SIZE 0x22 | |
887 | #define QETH_IDX_ACT_PNO(buffer) (buffer+0x0b) | |
888 | #define QETH_IDX_ACT_ISSUER_RM_TOKEN(buffer) (buffer + 0x0c) | |
5fd3fcbb | 889 | #define QETH_IDX_ACT_INVAL_FRAME 0x40 |
4a71df50 FB |
890 | #define QETH_IDX_NO_PORTNAME_REQUIRED(buffer) ((buffer)[0x0b] & 0x80) |
891 | #define QETH_IDX_ACT_FUNC_LEVEL(buffer) (buffer + 0x10) | |
892 | #define QETH_IDX_ACT_DATASET_NAME(buffer) (buffer + 0x16) | |
893 | #define QETH_IDX_ACT_QDIO_DEV_CUA(buffer) (buffer + 0x1e) | |
894 | #define QETH_IDX_ACT_QDIO_DEV_REALADDR(buffer) (buffer + 0x20) | |
895 | #define QETH_IS_IDX_ACT_POS_REPLY(buffer) (((buffer)[0x08] & 3) == 2) | |
896 | #define QETH_IDX_REPLY_LEVEL(buffer) (buffer + 0x12) | |
897 | #define QETH_IDX_ACT_CAUSE_CODE(buffer) (buffer)[0x09] | |
01fc3e86 UB |
898 | #define QETH_IDX_ACT_ERR_EXCL 0x19 |
899 | #define QETH_IDX_ACT_ERR_AUTH 0x1E | |
900 | #define QETH_IDX_ACT_ERR_AUTH_USER 0x20 | |
4a71df50 FB |
901 | |
902 | #define PDU_ENCAPSULATION(buffer) \ | |
903 | (buffer + *(buffer + (*(buffer + 0x0b)) + \ | |
904 | *(buffer + *(buffer + 0x0b) + 0x11) + 0x07)) | |
905 | ||
906 | #define IS_IPA(buffer) \ | |
907 | ((buffer) && \ | |
908 | (*(buffer + ((*(buffer + 0x0b)) + 4)) == 0xc1)) | |
909 | ||
4a71df50 | 910 | #endif |