Commit | Line | Data |
---|---|---|
4a71df50 FB |
1 | /* |
2 | * drivers/s390/net/qeth_core_main.c | |
3 | * | |
4 | * Copyright IBM Corp. 2007 | |
5 | * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, | |
6 | * Frank Pavlic <fpavlic@de.ibm.com>, | |
7 | * Thomas Spatzier <tspat@de.ibm.com>, | |
8 | * Frank Blaschka <frank.blaschka@de.ibm.com> | |
9 | */ | |
10 | ||
74eacdb9 FB |
11 | #define KMSG_COMPONENT "qeth" |
12 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
13 | ||
4a71df50 FB |
14 | #include <linux/module.h> |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/errno.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/ip.h> | |
20 | #include <linux/ipv6.h> | |
21 | #include <linux/tcp.h> | |
22 | #include <linux/mii.h> | |
23 | #include <linux/kthread.h> | |
24 | ||
ab4227cb MS |
25 | #include <asm/ebcdic.h> |
26 | #include <asm/io.h> | |
4a71df50 FB |
27 | #include <asm/s390_rdev.h> |
28 | ||
29 | #include "qeth_core.h" | |
30 | #include "qeth_core_offl.h" | |
31 | ||
d11ba0c4 PT |
32 | struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { |
33 | /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ | |
34 | /* N P A M L V H */ | |
35 | [QETH_DBF_SETUP] = {"qeth_setup", | |
36 | 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, | |
37 | [QETH_DBF_QERR] = {"qeth_qerr", | |
38 | 2, 1, 8, 2, &debug_hex_ascii_view, NULL}, | |
39 | [QETH_DBF_TRACE] = {"qeth_trace", | |
40 | 4, 1, 8, 3, &debug_hex_ascii_view, NULL}, | |
41 | [QETH_DBF_MSG] = {"qeth_msg", | |
42 | 8, 1, 128, 3, &debug_sprintf_view, NULL}, | |
43 | [QETH_DBF_SENSE] = {"qeth_sense", | |
44 | 2, 1, 64, 2, &debug_hex_ascii_view, NULL}, | |
45 | [QETH_DBF_MISC] = {"qeth_misc", | |
46 | 2, 1, 256, 2, &debug_hex_ascii_view, NULL}, | |
47 | [QETH_DBF_CTRL] = {"qeth_control", | |
48 | 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, | |
49 | }; | |
50 | EXPORT_SYMBOL_GPL(qeth_dbf); | |
4a71df50 FB |
51 | |
52 | struct qeth_card_list_struct qeth_core_card_list; | |
53 | EXPORT_SYMBOL_GPL(qeth_core_card_list); | |
683d718a FB |
54 | struct kmem_cache *qeth_core_header_cache; |
55 | EXPORT_SYMBOL_GPL(qeth_core_header_cache); | |
4a71df50 FB |
56 | |
57 | static struct device *qeth_core_root_dev; | |
58 | static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY; | |
59 | static struct lock_class_key qdio_out_skb_queue_key; | |
4a71df50 FB |
60 | |
61 | static void qeth_send_control_data_cb(struct qeth_channel *, | |
62 | struct qeth_cmd_buffer *); | |
63 | static int qeth_issue_next_read(struct qeth_card *); | |
64 | static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); | |
65 | static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); | |
66 | static void qeth_free_buffer_pool(struct qeth_card *); | |
67 | static int qeth_qdio_establish(struct qeth_card *); | |
68 | ||
69 | ||
70 | static inline void __qeth_fill_buffer_frag(struct sk_buff *skb, | |
71 | struct qdio_buffer *buffer, int is_tso, | |
72 | int *next_element_to_fill) | |
73 | { | |
74 | struct skb_frag_struct *frag; | |
75 | int fragno; | |
76 | unsigned long addr; | |
77 | int element, cnt, dlen; | |
78 | ||
79 | fragno = skb_shinfo(skb)->nr_frags; | |
80 | element = *next_element_to_fill; | |
81 | dlen = 0; | |
82 | ||
83 | if (is_tso) | |
84 | buffer->element[element].flags = | |
85 | SBAL_FLAGS_MIDDLE_FRAG; | |
86 | else | |
87 | buffer->element[element].flags = | |
88 | SBAL_FLAGS_FIRST_FRAG; | |
89 | dlen = skb->len - skb->data_len; | |
90 | if (dlen) { | |
91 | buffer->element[element].addr = skb->data; | |
92 | buffer->element[element].length = dlen; | |
93 | element++; | |
94 | } | |
95 | for (cnt = 0; cnt < fragno; cnt++) { | |
96 | frag = &skb_shinfo(skb)->frags[cnt]; | |
97 | addr = (page_to_pfn(frag->page) << PAGE_SHIFT) + | |
98 | frag->page_offset; | |
99 | buffer->element[element].addr = (char *)addr; | |
100 | buffer->element[element].length = frag->size; | |
101 | if (cnt < (fragno - 1)) | |
102 | buffer->element[element].flags = | |
103 | SBAL_FLAGS_MIDDLE_FRAG; | |
104 | else | |
105 | buffer->element[element].flags = | |
106 | SBAL_FLAGS_LAST_FRAG; | |
107 | element++; | |
108 | } | |
109 | *next_element_to_fill = element; | |
110 | } | |
111 | ||
112 | static inline const char *qeth_get_cardname(struct qeth_card *card) | |
113 | { | |
114 | if (card->info.guestlan) { | |
115 | switch (card->info.type) { | |
116 | case QETH_CARD_TYPE_OSAE: | |
117 | return " Guest LAN QDIO"; | |
118 | case QETH_CARD_TYPE_IQD: | |
119 | return " Guest LAN Hiper"; | |
120 | default: | |
121 | return " unknown"; | |
122 | } | |
123 | } else { | |
124 | switch (card->info.type) { | |
125 | case QETH_CARD_TYPE_OSAE: | |
126 | return " OSD Express"; | |
127 | case QETH_CARD_TYPE_IQD: | |
128 | return " HiperSockets"; | |
129 | case QETH_CARD_TYPE_OSN: | |
130 | return " OSN QDIO"; | |
131 | default: | |
132 | return " unknown"; | |
133 | } | |
134 | } | |
135 | return " n/a"; | |
136 | } | |
137 | ||
138 | /* max length to be returned: 14 */ | |
139 | const char *qeth_get_cardname_short(struct qeth_card *card) | |
140 | { | |
141 | if (card->info.guestlan) { | |
142 | switch (card->info.type) { | |
143 | case QETH_CARD_TYPE_OSAE: | |
144 | return "GuestLAN QDIO"; | |
145 | case QETH_CARD_TYPE_IQD: | |
146 | return "GuestLAN Hiper"; | |
147 | default: | |
148 | return "unknown"; | |
149 | } | |
150 | } else { | |
151 | switch (card->info.type) { | |
152 | case QETH_CARD_TYPE_OSAE: | |
153 | switch (card->info.link_type) { | |
154 | case QETH_LINK_TYPE_FAST_ETH: | |
155 | return "OSD_100"; | |
156 | case QETH_LINK_TYPE_HSTR: | |
157 | return "HSTR"; | |
158 | case QETH_LINK_TYPE_GBIT_ETH: | |
159 | return "OSD_1000"; | |
160 | case QETH_LINK_TYPE_10GBIT_ETH: | |
161 | return "OSD_10GIG"; | |
162 | case QETH_LINK_TYPE_LANE_ETH100: | |
163 | return "OSD_FE_LANE"; | |
164 | case QETH_LINK_TYPE_LANE_TR: | |
165 | return "OSD_TR_LANE"; | |
166 | case QETH_LINK_TYPE_LANE_ETH1000: | |
167 | return "OSD_GbE_LANE"; | |
168 | case QETH_LINK_TYPE_LANE: | |
169 | return "OSD_ATM_LANE"; | |
170 | default: | |
171 | return "OSD_Express"; | |
172 | } | |
173 | case QETH_CARD_TYPE_IQD: | |
174 | return "HiperSockets"; | |
175 | case QETH_CARD_TYPE_OSN: | |
176 | return "OSN"; | |
177 | default: | |
178 | return "unknown"; | |
179 | } | |
180 | } | |
181 | return "n/a"; | |
182 | } | |
183 | ||
184 | void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, | |
185 | int clear_start_mask) | |
186 | { | |
187 | unsigned long flags; | |
188 | ||
189 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
190 | card->thread_allowed_mask = threads; | |
191 | if (clear_start_mask) | |
192 | card->thread_start_mask &= threads; | |
193 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
194 | wake_up(&card->wait_q); | |
195 | } | |
196 | EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); | |
197 | ||
198 | int qeth_threads_running(struct qeth_card *card, unsigned long threads) | |
199 | { | |
200 | unsigned long flags; | |
201 | int rc = 0; | |
202 | ||
203 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
204 | rc = (card->thread_running_mask & threads); | |
205 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
206 | return rc; | |
207 | } | |
208 | EXPORT_SYMBOL_GPL(qeth_threads_running); | |
209 | ||
210 | int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) | |
211 | { | |
212 | return wait_event_interruptible(card->wait_q, | |
213 | qeth_threads_running(card, threads) == 0); | |
214 | } | |
215 | EXPORT_SYMBOL_GPL(qeth_wait_for_threads); | |
216 | ||
217 | void qeth_clear_working_pool_list(struct qeth_card *card) | |
218 | { | |
219 | struct qeth_buffer_pool_entry *pool_entry, *tmp; | |
220 | ||
d11ba0c4 | 221 | QETH_DBF_TEXT(TRACE, 5, "clwrklst"); |
4a71df50 FB |
222 | list_for_each_entry_safe(pool_entry, tmp, |
223 | &card->qdio.in_buf_pool.entry_list, list){ | |
224 | list_del(&pool_entry->list); | |
225 | } | |
226 | } | |
227 | EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); | |
228 | ||
229 | static int qeth_alloc_buffer_pool(struct qeth_card *card) | |
230 | { | |
231 | struct qeth_buffer_pool_entry *pool_entry; | |
232 | void *ptr; | |
233 | int i, j; | |
234 | ||
d11ba0c4 | 235 | QETH_DBF_TEXT(TRACE, 5, "alocpool"); |
4a71df50 FB |
236 | for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { |
237 | pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL); | |
238 | if (!pool_entry) { | |
239 | qeth_free_buffer_pool(card); | |
240 | return -ENOMEM; | |
241 | } | |
242 | for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { | |
508b3c4f | 243 | ptr = (void *) __get_free_page(GFP_KERNEL); |
4a71df50 FB |
244 | if (!ptr) { |
245 | while (j > 0) | |
246 | free_page((unsigned long) | |
247 | pool_entry->elements[--j]); | |
248 | kfree(pool_entry); | |
249 | qeth_free_buffer_pool(card); | |
250 | return -ENOMEM; | |
251 | } | |
252 | pool_entry->elements[j] = ptr; | |
253 | } | |
254 | list_add(&pool_entry->init_list, | |
255 | &card->qdio.init_pool.entry_list); | |
256 | } | |
257 | return 0; | |
258 | } | |
259 | ||
260 | int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) | |
261 | { | |
d11ba0c4 | 262 | QETH_DBF_TEXT(TRACE, 2, "realcbp"); |
4a71df50 FB |
263 | |
264 | if ((card->state != CARD_STATE_DOWN) && | |
265 | (card->state != CARD_STATE_RECOVER)) | |
266 | return -EPERM; | |
267 | ||
268 | /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ | |
269 | qeth_clear_working_pool_list(card); | |
270 | qeth_free_buffer_pool(card); | |
271 | card->qdio.in_buf_pool.buf_count = bufcnt; | |
272 | card->qdio.init_pool.buf_count = bufcnt; | |
273 | return qeth_alloc_buffer_pool(card); | |
274 | } | |
275 | ||
276 | int qeth_set_large_send(struct qeth_card *card, | |
277 | enum qeth_large_send_types type) | |
278 | { | |
279 | int rc = 0; | |
280 | ||
281 | if (card->dev == NULL) { | |
282 | card->options.large_send = type; | |
283 | return 0; | |
284 | } | |
285 | if (card->state == CARD_STATE_UP) | |
286 | netif_tx_disable(card->dev); | |
287 | card->options.large_send = type; | |
288 | switch (card->options.large_send) { | |
289 | case QETH_LARGE_SEND_EDDP: | |
290 | card->dev->features |= NETIF_F_TSO | NETIF_F_SG | | |
291 | NETIF_F_HW_CSUM; | |
292 | break; | |
293 | case QETH_LARGE_SEND_TSO: | |
294 | if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) { | |
295 | card->dev->features |= NETIF_F_TSO | NETIF_F_SG | | |
296 | NETIF_F_HW_CSUM; | |
297 | } else { | |
4a71df50 FB |
298 | card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | |
299 | NETIF_F_HW_CSUM); | |
300 | card->options.large_send = QETH_LARGE_SEND_NO; | |
301 | rc = -EOPNOTSUPP; | |
302 | } | |
303 | break; | |
304 | default: /* includes QETH_LARGE_SEND_NO */ | |
305 | card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | | |
306 | NETIF_F_HW_CSUM); | |
307 | break; | |
308 | } | |
309 | if (card->state == CARD_STATE_UP) | |
310 | netif_wake_queue(card->dev); | |
311 | return rc; | |
312 | } | |
313 | EXPORT_SYMBOL_GPL(qeth_set_large_send); | |
314 | ||
315 | static int qeth_issue_next_read(struct qeth_card *card) | |
316 | { | |
317 | int rc; | |
318 | struct qeth_cmd_buffer *iob; | |
319 | ||
d11ba0c4 | 320 | QETH_DBF_TEXT(TRACE, 5, "issnxrd"); |
4a71df50 FB |
321 | if (card->read.state != CH_STATE_UP) |
322 | return -EIO; | |
323 | iob = qeth_get_buffer(&card->read); | |
324 | if (!iob) { | |
74eacdb9 FB |
325 | dev_warn(&card->gdev->dev, "The qeth device driver " |
326 | "failed to recover an error on the device\n"); | |
327 | QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " | |
328 | "available\n", dev_name(&card->gdev->dev)); | |
4a71df50 FB |
329 | return -ENOMEM; |
330 | } | |
331 | qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); | |
d11ba0c4 | 332 | QETH_DBF_TEXT(TRACE, 6, "noirqpnd"); |
4a71df50 FB |
333 | rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, |
334 | (addr_t) iob, 0, 0); | |
335 | if (rc) { | |
74eacdb9 FB |
336 | QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " |
337 | "rc=%i\n", dev_name(&card->gdev->dev), rc); | |
4a71df50 FB |
338 | atomic_set(&card->read.irq_pending, 0); |
339 | qeth_schedule_recovery(card); | |
340 | wake_up(&card->wait_q); | |
341 | } | |
342 | return rc; | |
343 | } | |
344 | ||
345 | static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) | |
346 | { | |
347 | struct qeth_reply *reply; | |
348 | ||
349 | reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); | |
350 | if (reply) { | |
351 | atomic_set(&reply->refcnt, 1); | |
352 | atomic_set(&reply->received, 0); | |
353 | reply->card = card; | |
354 | }; | |
355 | return reply; | |
356 | } | |
357 | ||
358 | static void qeth_get_reply(struct qeth_reply *reply) | |
359 | { | |
360 | WARN_ON(atomic_read(&reply->refcnt) <= 0); | |
361 | atomic_inc(&reply->refcnt); | |
362 | } | |
363 | ||
364 | static void qeth_put_reply(struct qeth_reply *reply) | |
365 | { | |
366 | WARN_ON(atomic_read(&reply->refcnt) <= 0); | |
367 | if (atomic_dec_and_test(&reply->refcnt)) | |
368 | kfree(reply); | |
369 | } | |
370 | ||
d11ba0c4 | 371 | static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, |
4a71df50 FB |
372 | struct qeth_card *card) |
373 | { | |
4a71df50 | 374 | char *ipa_name; |
d11ba0c4 | 375 | int com = cmd->hdr.command; |
4a71df50 | 376 | ipa_name = qeth_get_ipa_cmd_name(com); |
d11ba0c4 PT |
377 | if (rc) |
378 | QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n", | |
379 | ipa_name, com, QETH_CARD_IFNAME(card), | |
380 | rc, qeth_get_ipa_msg(rc)); | |
381 | else | |
382 | QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n", | |
383 | ipa_name, com, QETH_CARD_IFNAME(card)); | |
4a71df50 FB |
384 | } |
385 | ||
386 | static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, | |
387 | struct qeth_cmd_buffer *iob) | |
388 | { | |
389 | struct qeth_ipa_cmd *cmd = NULL; | |
390 | ||
d11ba0c4 | 391 | QETH_DBF_TEXT(TRACE, 5, "chkipad"); |
4a71df50 FB |
392 | if (IS_IPA(iob->data)) { |
393 | cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); | |
394 | if (IS_IPA_REPLY(cmd)) { | |
d11ba0c4 PT |
395 | if (cmd->hdr.command < IPA_CMD_SETCCID || |
396 | cmd->hdr.command > IPA_CMD_MODCCID) | |
397 | qeth_issue_ipa_msg(cmd, | |
398 | cmd->hdr.return_code, card); | |
4a71df50 FB |
399 | return cmd; |
400 | } else { | |
401 | switch (cmd->hdr.command) { | |
402 | case IPA_CMD_STOPLAN: | |
74eacdb9 FB |
403 | dev_warn(&card->gdev->dev, |
404 | "The link for interface %s on CHPID" | |
405 | " 0x%X failed\n", | |
4a71df50 FB |
406 | QETH_CARD_IFNAME(card), |
407 | card->info.chpid); | |
408 | card->lan_online = 0; | |
409 | if (card->dev && netif_carrier_ok(card->dev)) | |
410 | netif_carrier_off(card->dev); | |
411 | return NULL; | |
412 | case IPA_CMD_STARTLAN: | |
74eacdb9 FB |
413 | dev_info(&card->gdev->dev, |
414 | "The link for %s on CHPID 0x%X has" | |
415 | " been restored\n", | |
4a71df50 FB |
416 | QETH_CARD_IFNAME(card), |
417 | card->info.chpid); | |
418 | netif_carrier_on(card->dev); | |
922dc062 | 419 | card->lan_online = 1; |
4a71df50 FB |
420 | qeth_schedule_recovery(card); |
421 | return NULL; | |
422 | case IPA_CMD_MODCCID: | |
423 | return cmd; | |
424 | case IPA_CMD_REGISTER_LOCAL_ADDR: | |
d11ba0c4 | 425 | QETH_DBF_TEXT(TRACE, 3, "irla"); |
4a71df50 FB |
426 | break; |
427 | case IPA_CMD_UNREGISTER_LOCAL_ADDR: | |
d11ba0c4 | 428 | QETH_DBF_TEXT(TRACE, 3, "urla"); |
4a71df50 FB |
429 | break; |
430 | default: | |
c4cef07c | 431 | QETH_DBF_MESSAGE(2, "Received data is IPA " |
4a71df50 FB |
432 | "but not a reply!\n"); |
433 | break; | |
434 | } | |
435 | } | |
436 | } | |
437 | return cmd; | |
438 | } | |
439 | ||
440 | void qeth_clear_ipacmd_list(struct qeth_card *card) | |
441 | { | |
442 | struct qeth_reply *reply, *r; | |
443 | unsigned long flags; | |
444 | ||
d11ba0c4 | 445 | QETH_DBF_TEXT(TRACE, 4, "clipalst"); |
4a71df50 FB |
446 | |
447 | spin_lock_irqsave(&card->lock, flags); | |
448 | list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { | |
449 | qeth_get_reply(reply); | |
450 | reply->rc = -EIO; | |
451 | atomic_inc(&reply->received); | |
452 | list_del_init(&reply->list); | |
453 | wake_up(&reply->wait_q); | |
454 | qeth_put_reply(reply); | |
455 | } | |
456 | spin_unlock_irqrestore(&card->lock, flags); | |
457 | } | |
458 | EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); | |
459 | ||
460 | static int qeth_check_idx_response(unsigned char *buffer) | |
461 | { | |
462 | if (!buffer) | |
463 | return 0; | |
464 | ||
d11ba0c4 | 465 | QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); |
4a71df50 | 466 | if ((buffer[2] & 0xc0) == 0xc0) { |
74eacdb9 | 467 | QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " |
4a71df50 FB |
468 | "with cause code 0x%02x%s\n", |
469 | buffer[4], | |
470 | ((buffer[4] == 0x22) ? | |
471 | " -- try another portname" : "")); | |
d11ba0c4 PT |
472 | QETH_DBF_TEXT(TRACE, 2, "ckidxres"); |
473 | QETH_DBF_TEXT(TRACE, 2, " idxterm"); | |
474 | QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO); | |
4a71df50 FB |
475 | return -EIO; |
476 | } | |
477 | return 0; | |
478 | } | |
479 | ||
480 | static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, | |
481 | __u32 len) | |
482 | { | |
483 | struct qeth_card *card; | |
484 | ||
d11ba0c4 | 485 | QETH_DBF_TEXT(TRACE, 4, "setupccw"); |
4a71df50 FB |
486 | card = CARD_FROM_CDEV(channel->ccwdev); |
487 | if (channel == &card->read) | |
488 | memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); | |
489 | else | |
490 | memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); | |
491 | channel->ccw.count = len; | |
492 | channel->ccw.cda = (__u32) __pa(iob); | |
493 | } | |
494 | ||
495 | static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) | |
496 | { | |
497 | __u8 index; | |
498 | ||
d11ba0c4 | 499 | QETH_DBF_TEXT(TRACE, 6, "getbuff"); |
4a71df50 FB |
500 | index = channel->io_buf_no; |
501 | do { | |
502 | if (channel->iob[index].state == BUF_STATE_FREE) { | |
503 | channel->iob[index].state = BUF_STATE_LOCKED; | |
504 | channel->io_buf_no = (channel->io_buf_no + 1) % | |
505 | QETH_CMD_BUFFER_NO; | |
506 | memset(channel->iob[index].data, 0, QETH_BUFSIZE); | |
507 | return channel->iob + index; | |
508 | } | |
509 | index = (index + 1) % QETH_CMD_BUFFER_NO; | |
510 | } while (index != channel->io_buf_no); | |
511 | ||
512 | return NULL; | |
513 | } | |
514 | ||
515 | void qeth_release_buffer(struct qeth_channel *channel, | |
516 | struct qeth_cmd_buffer *iob) | |
517 | { | |
518 | unsigned long flags; | |
519 | ||
d11ba0c4 | 520 | QETH_DBF_TEXT(TRACE, 6, "relbuff"); |
4a71df50 FB |
521 | spin_lock_irqsave(&channel->iob_lock, flags); |
522 | memset(iob->data, 0, QETH_BUFSIZE); | |
523 | iob->state = BUF_STATE_FREE; | |
524 | iob->callback = qeth_send_control_data_cb; | |
525 | iob->rc = 0; | |
526 | spin_unlock_irqrestore(&channel->iob_lock, flags); | |
527 | } | |
528 | EXPORT_SYMBOL_GPL(qeth_release_buffer); | |
529 | ||
530 | static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) | |
531 | { | |
532 | struct qeth_cmd_buffer *buffer = NULL; | |
533 | unsigned long flags; | |
534 | ||
535 | spin_lock_irqsave(&channel->iob_lock, flags); | |
536 | buffer = __qeth_get_buffer(channel); | |
537 | spin_unlock_irqrestore(&channel->iob_lock, flags); | |
538 | return buffer; | |
539 | } | |
540 | ||
541 | struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) | |
542 | { | |
543 | struct qeth_cmd_buffer *buffer; | |
544 | wait_event(channel->wait_q, | |
545 | ((buffer = qeth_get_buffer(channel)) != NULL)); | |
546 | return buffer; | |
547 | } | |
548 | EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); | |
549 | ||
550 | void qeth_clear_cmd_buffers(struct qeth_channel *channel) | |
551 | { | |
552 | int cnt; | |
553 | ||
554 | for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) | |
555 | qeth_release_buffer(channel, &channel->iob[cnt]); | |
556 | channel->buf_no = 0; | |
557 | channel->io_buf_no = 0; | |
558 | } | |
559 | EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); | |
560 | ||
561 | static void qeth_send_control_data_cb(struct qeth_channel *channel, | |
562 | struct qeth_cmd_buffer *iob) | |
563 | { | |
564 | struct qeth_card *card; | |
565 | struct qeth_reply *reply, *r; | |
566 | struct qeth_ipa_cmd *cmd; | |
567 | unsigned long flags; | |
568 | int keep_reply; | |
569 | ||
d11ba0c4 | 570 | QETH_DBF_TEXT(TRACE, 4, "sndctlcb"); |
4a71df50 FB |
571 | |
572 | card = CARD_FROM_CDEV(channel->ccwdev); | |
573 | if (qeth_check_idx_response(iob->data)) { | |
574 | qeth_clear_ipacmd_list(card); | |
575 | qeth_schedule_recovery(card); | |
576 | goto out; | |
577 | } | |
578 | ||
579 | cmd = qeth_check_ipa_data(card, iob); | |
580 | if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) | |
581 | goto out; | |
582 | /*in case of OSN : check if cmd is set */ | |
583 | if (card->info.type == QETH_CARD_TYPE_OSN && | |
584 | cmd && | |
585 | cmd->hdr.command != IPA_CMD_STARTLAN && | |
586 | card->osn_info.assist_cb != NULL) { | |
587 | card->osn_info.assist_cb(card->dev, cmd); | |
588 | goto out; | |
589 | } | |
590 | ||
591 | spin_lock_irqsave(&card->lock, flags); | |
592 | list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { | |
593 | if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || | |
594 | ((cmd) && (reply->seqno == cmd->hdr.seqno))) { | |
595 | qeth_get_reply(reply); | |
596 | list_del_init(&reply->list); | |
597 | spin_unlock_irqrestore(&card->lock, flags); | |
598 | keep_reply = 0; | |
599 | if (reply->callback != NULL) { | |
600 | if (cmd) { | |
601 | reply->offset = (__u16)((char *)cmd - | |
602 | (char *)iob->data); | |
603 | keep_reply = reply->callback(card, | |
604 | reply, | |
605 | (unsigned long)cmd); | |
606 | } else | |
607 | keep_reply = reply->callback(card, | |
608 | reply, | |
609 | (unsigned long)iob); | |
610 | } | |
611 | if (cmd) | |
612 | reply->rc = (u16) cmd->hdr.return_code; | |
613 | else if (iob->rc) | |
614 | reply->rc = iob->rc; | |
615 | if (keep_reply) { | |
616 | spin_lock_irqsave(&card->lock, flags); | |
617 | list_add_tail(&reply->list, | |
618 | &card->cmd_waiter_list); | |
619 | spin_unlock_irqrestore(&card->lock, flags); | |
620 | } else { | |
621 | atomic_inc(&reply->received); | |
622 | wake_up(&reply->wait_q); | |
623 | } | |
624 | qeth_put_reply(reply); | |
625 | goto out; | |
626 | } | |
627 | } | |
628 | spin_unlock_irqrestore(&card->lock, flags); | |
629 | out: | |
630 | memcpy(&card->seqno.pdu_hdr_ack, | |
631 | QETH_PDU_HEADER_SEQ_NO(iob->data), | |
632 | QETH_SEQ_NO_LENGTH); | |
633 | qeth_release_buffer(channel, iob); | |
634 | } | |
635 | ||
636 | static int qeth_setup_channel(struct qeth_channel *channel) | |
637 | { | |
638 | int cnt; | |
639 | ||
d11ba0c4 | 640 | QETH_DBF_TEXT(SETUP, 2, "setupch"); |
4a71df50 FB |
641 | for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { |
642 | channel->iob[cnt].data = (char *) | |
643 | kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); | |
644 | if (channel->iob[cnt].data == NULL) | |
645 | break; | |
646 | channel->iob[cnt].state = BUF_STATE_FREE; | |
647 | channel->iob[cnt].channel = channel; | |
648 | channel->iob[cnt].callback = qeth_send_control_data_cb; | |
649 | channel->iob[cnt].rc = 0; | |
650 | } | |
651 | if (cnt < QETH_CMD_BUFFER_NO) { | |
652 | while (cnt-- > 0) | |
653 | kfree(channel->iob[cnt].data); | |
654 | return -ENOMEM; | |
655 | } | |
656 | channel->buf_no = 0; | |
657 | channel->io_buf_no = 0; | |
658 | atomic_set(&channel->irq_pending, 0); | |
659 | spin_lock_init(&channel->iob_lock); | |
660 | ||
661 | init_waitqueue_head(&channel->wait_q); | |
662 | return 0; | |
663 | } | |
664 | ||
665 | static int qeth_set_thread_start_bit(struct qeth_card *card, | |
666 | unsigned long thread) | |
667 | { | |
668 | unsigned long flags; | |
669 | ||
670 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
671 | if (!(card->thread_allowed_mask & thread) || | |
672 | (card->thread_start_mask & thread)) { | |
673 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
674 | return -EPERM; | |
675 | } | |
676 | card->thread_start_mask |= thread; | |
677 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
678 | return 0; | |
679 | } | |
680 | ||
681 | void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) | |
682 | { | |
683 | unsigned long flags; | |
684 | ||
685 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
686 | card->thread_start_mask &= ~thread; | |
687 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
688 | wake_up(&card->wait_q); | |
689 | } | |
690 | EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); | |
691 | ||
692 | void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) | |
693 | { | |
694 | unsigned long flags; | |
695 | ||
696 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
697 | card->thread_running_mask &= ~thread; | |
698 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
699 | wake_up(&card->wait_q); | |
700 | } | |
701 | EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); | |
702 | ||
703 | static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) | |
704 | { | |
705 | unsigned long flags; | |
706 | int rc = 0; | |
707 | ||
708 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
709 | if (card->thread_start_mask & thread) { | |
710 | if ((card->thread_allowed_mask & thread) && | |
711 | !(card->thread_running_mask & thread)) { | |
712 | rc = 1; | |
713 | card->thread_start_mask &= ~thread; | |
714 | card->thread_running_mask |= thread; | |
715 | } else | |
716 | rc = -EPERM; | |
717 | } | |
718 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
719 | return rc; | |
720 | } | |
721 | ||
722 | int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) | |
723 | { | |
724 | int rc = 0; | |
725 | ||
726 | wait_event(card->wait_q, | |
727 | (rc = __qeth_do_run_thread(card, thread)) >= 0); | |
728 | return rc; | |
729 | } | |
730 | EXPORT_SYMBOL_GPL(qeth_do_run_thread); | |
731 | ||
732 | void qeth_schedule_recovery(struct qeth_card *card) | |
733 | { | |
d11ba0c4 | 734 | QETH_DBF_TEXT(TRACE, 2, "startrec"); |
4a71df50 FB |
735 | if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) |
736 | schedule_work(&card->kernel_thread_starter); | |
737 | } | |
738 | EXPORT_SYMBOL_GPL(qeth_schedule_recovery); | |
739 | ||
740 | static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) | |
741 | { | |
742 | int dstat, cstat; | |
743 | char *sense; | |
744 | ||
745 | sense = (char *) irb->ecw; | |
23d805b6 PO |
746 | cstat = irb->scsw.cmd.cstat; |
747 | dstat = irb->scsw.cmd.dstat; | |
4a71df50 FB |
748 | |
749 | if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | | |
750 | SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | | |
751 | SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { | |
d11ba0c4 | 752 | QETH_DBF_TEXT(TRACE, 2, "CGENCHK"); |
74eacdb9 FB |
753 | dev_warn(&cdev->dev, "The qeth device driver " |
754 | "failed to recover an error on the device\n"); | |
755 | QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ", | |
756 | dev_name(&cdev->dev), dstat, cstat); | |
4a71df50 FB |
757 | print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, |
758 | 16, 1, irb, 64, 1); | |
759 | return 1; | |
760 | } | |
761 | ||
762 | if (dstat & DEV_STAT_UNIT_CHECK) { | |
763 | if (sense[SENSE_RESETTING_EVENT_BYTE] & | |
764 | SENSE_RESETTING_EVENT_FLAG) { | |
d11ba0c4 | 765 | QETH_DBF_TEXT(TRACE, 2, "REVIND"); |
4a71df50 FB |
766 | return 1; |
767 | } | |
768 | if (sense[SENSE_COMMAND_REJECT_BYTE] & | |
769 | SENSE_COMMAND_REJECT_FLAG) { | |
d11ba0c4 | 770 | QETH_DBF_TEXT(TRACE, 2, "CMDREJi"); |
28a7e4c9 | 771 | return 1; |
4a71df50 FB |
772 | } |
773 | if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { | |
d11ba0c4 | 774 | QETH_DBF_TEXT(TRACE, 2, "AFFE"); |
4a71df50 FB |
775 | return 1; |
776 | } | |
777 | if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { | |
d11ba0c4 | 778 | QETH_DBF_TEXT(TRACE, 2, "ZEROSEN"); |
4a71df50 FB |
779 | return 0; |
780 | } | |
d11ba0c4 | 781 | QETH_DBF_TEXT(TRACE, 2, "DGENCHK"); |
4a71df50 FB |
782 | return 1; |
783 | } | |
784 | return 0; | |
785 | } | |
786 | ||
787 | static long __qeth_check_irb_error(struct ccw_device *cdev, | |
788 | unsigned long intparm, struct irb *irb) | |
789 | { | |
790 | if (!IS_ERR(irb)) | |
791 | return 0; | |
792 | ||
793 | switch (PTR_ERR(irb)) { | |
794 | case -EIO: | |
74eacdb9 FB |
795 | QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", |
796 | dev_name(&cdev->dev)); | |
d11ba0c4 PT |
797 | QETH_DBF_TEXT(TRACE, 2, "ckirberr"); |
798 | QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO); | |
4a71df50 FB |
799 | break; |
800 | case -ETIMEDOUT: | |
74eacdb9 FB |
801 | dev_warn(&cdev->dev, "A hardware operation timed out" |
802 | " on the device\n"); | |
d11ba0c4 PT |
803 | QETH_DBF_TEXT(TRACE, 2, "ckirberr"); |
804 | QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT); | |
4a71df50 FB |
805 | if (intparm == QETH_RCD_PARM) { |
806 | struct qeth_card *card = CARD_FROM_CDEV(cdev); | |
807 | ||
808 | if (card && (card->data.ccwdev == cdev)) { | |
809 | card->data.state = CH_STATE_DOWN; | |
810 | wake_up(&card->wait_q); | |
811 | } | |
812 | } | |
813 | break; | |
814 | default: | |
74eacdb9 FB |
815 | QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", |
816 | dev_name(&cdev->dev), PTR_ERR(irb)); | |
d11ba0c4 PT |
817 | QETH_DBF_TEXT(TRACE, 2, "ckirberr"); |
818 | QETH_DBF_TEXT(TRACE, 2, " rc???"); | |
4a71df50 FB |
819 | } |
820 | return PTR_ERR(irb); | |
821 | } | |
822 | ||
823 | static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, | |
824 | struct irb *irb) | |
825 | { | |
826 | int rc; | |
827 | int cstat, dstat; | |
828 | struct qeth_cmd_buffer *buffer; | |
829 | struct qeth_channel *channel; | |
830 | struct qeth_card *card; | |
831 | struct qeth_cmd_buffer *iob; | |
832 | __u8 index; | |
833 | ||
d11ba0c4 | 834 | QETH_DBF_TEXT(TRACE, 5, "irq"); |
4a71df50 FB |
835 | |
836 | if (__qeth_check_irb_error(cdev, intparm, irb)) | |
837 | return; | |
23d805b6 PO |
838 | cstat = irb->scsw.cmd.cstat; |
839 | dstat = irb->scsw.cmd.dstat; | |
4a71df50 FB |
840 | |
841 | card = CARD_FROM_CDEV(cdev); | |
842 | if (!card) | |
843 | return; | |
844 | ||
845 | if (card->read.ccwdev == cdev) { | |
846 | channel = &card->read; | |
d11ba0c4 | 847 | QETH_DBF_TEXT(TRACE, 5, "read"); |
4a71df50 FB |
848 | } else if (card->write.ccwdev == cdev) { |
849 | channel = &card->write; | |
d11ba0c4 | 850 | QETH_DBF_TEXT(TRACE, 5, "write"); |
4a71df50 FB |
851 | } else { |
852 | channel = &card->data; | |
d11ba0c4 | 853 | QETH_DBF_TEXT(TRACE, 5, "data"); |
4a71df50 FB |
854 | } |
855 | atomic_set(&channel->irq_pending, 0); | |
856 | ||
23d805b6 | 857 | if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) |
4a71df50 FB |
858 | channel->state = CH_STATE_STOPPED; |
859 | ||
23d805b6 | 860 | if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) |
4a71df50 FB |
861 | channel->state = CH_STATE_HALTED; |
862 | ||
863 | /*let's wake up immediately on data channel*/ | |
864 | if ((channel == &card->data) && (intparm != 0) && | |
865 | (intparm != QETH_RCD_PARM)) | |
866 | goto out; | |
867 | ||
868 | if (intparm == QETH_CLEAR_CHANNEL_PARM) { | |
d11ba0c4 | 869 | QETH_DBF_TEXT(TRACE, 6, "clrchpar"); |
4a71df50 FB |
870 | /* we don't have to handle this further */ |
871 | intparm = 0; | |
872 | } | |
873 | if (intparm == QETH_HALT_CHANNEL_PARM) { | |
d11ba0c4 | 874 | QETH_DBF_TEXT(TRACE, 6, "hltchpar"); |
4a71df50 FB |
875 | /* we don't have to handle this further */ |
876 | intparm = 0; | |
877 | } | |
878 | if ((dstat & DEV_STAT_UNIT_EXCEP) || | |
879 | (dstat & DEV_STAT_UNIT_CHECK) || | |
880 | (cstat)) { | |
881 | if (irb->esw.esw0.erw.cons) { | |
74eacdb9 FB |
882 | dev_warn(&channel->ccwdev->dev, |
883 | "The qeth device driver failed to recover " | |
884 | "an error on the device\n"); | |
885 | QETH_DBF_MESSAGE(2, "%s sense data available. cstat " | |
886 | "0x%X dstat 0x%X\n", | |
887 | dev_name(&channel->ccwdev->dev), cstat, dstat); | |
4a71df50 FB |
888 | print_hex_dump(KERN_WARNING, "qeth: irb ", |
889 | DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); | |
890 | print_hex_dump(KERN_WARNING, "qeth: sense data ", | |
891 | DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); | |
892 | } | |
893 | if (intparm == QETH_RCD_PARM) { | |
894 | channel->state = CH_STATE_DOWN; | |
895 | goto out; | |
896 | } | |
897 | rc = qeth_get_problem(cdev, irb); | |
898 | if (rc) { | |
28a7e4c9 | 899 | qeth_clear_ipacmd_list(card); |
4a71df50 FB |
900 | qeth_schedule_recovery(card); |
901 | goto out; | |
902 | } | |
903 | } | |
904 | ||
905 | if (intparm == QETH_RCD_PARM) { | |
906 | channel->state = CH_STATE_RCD_DONE; | |
907 | goto out; | |
908 | } | |
909 | if (intparm) { | |
910 | buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); | |
911 | buffer->state = BUF_STATE_PROCESSED; | |
912 | } | |
913 | if (channel == &card->data) | |
914 | return; | |
915 | if (channel == &card->read && | |
916 | channel->state == CH_STATE_UP) | |
917 | qeth_issue_next_read(card); | |
918 | ||
919 | iob = channel->iob; | |
920 | index = channel->buf_no; | |
921 | while (iob[index].state == BUF_STATE_PROCESSED) { | |
922 | if (iob[index].callback != NULL) | |
923 | iob[index].callback(channel, iob + index); | |
924 | ||
925 | index = (index + 1) % QETH_CMD_BUFFER_NO; | |
926 | } | |
927 | channel->buf_no = index; | |
928 | out: | |
929 | wake_up(&card->wait_q); | |
930 | return; | |
931 | } | |
932 | ||
933 | static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, | |
934 | struct qeth_qdio_out_buffer *buf) | |
935 | { | |
936 | int i; | |
937 | struct sk_buff *skb; | |
938 | ||
939 | /* is PCI flag set on buffer? */ | |
940 | if (buf->buffer->element[0].flags & 0x40) | |
941 | atomic_dec(&queue->set_pci_flags_count); | |
942 | ||
943 | skb = skb_dequeue(&buf->skb_list); | |
944 | while (skb) { | |
945 | atomic_dec(&skb->users); | |
946 | dev_kfree_skb_any(skb); | |
947 | skb = skb_dequeue(&buf->skb_list); | |
948 | } | |
949 | qeth_eddp_buf_release_contexts(buf); | |
950 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { | |
683d718a FB |
951 | if (buf->buffer->element[i].addr && buf->is_header[i]) |
952 | kmem_cache_free(qeth_core_header_cache, | |
953 | buf->buffer->element[i].addr); | |
954 | buf->is_header[i] = 0; | |
4a71df50 FB |
955 | buf->buffer->element[i].length = 0; |
956 | buf->buffer->element[i].addr = NULL; | |
957 | buf->buffer->element[i].flags = 0; | |
958 | } | |
959 | buf->next_element_to_fill = 0; | |
960 | atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); | |
961 | } | |
962 | ||
963 | void qeth_clear_qdio_buffers(struct qeth_card *card) | |
964 | { | |
965 | int i, j; | |
966 | ||
d11ba0c4 | 967 | QETH_DBF_TEXT(TRACE, 2, "clearqdbf"); |
4a71df50 FB |
968 | /* clear outbound buffers to free skbs */ |
969 | for (i = 0; i < card->qdio.no_out_queues; ++i) | |
970 | if (card->qdio.out_qs[i]) { | |
971 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) | |
972 | qeth_clear_output_buffer(card->qdio.out_qs[i], | |
973 | &card->qdio.out_qs[i]->bufs[j]); | |
974 | } | |
975 | } | |
976 | EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); | |
977 | ||
978 | static void qeth_free_buffer_pool(struct qeth_card *card) | |
979 | { | |
980 | struct qeth_buffer_pool_entry *pool_entry, *tmp; | |
981 | int i = 0; | |
d11ba0c4 | 982 | QETH_DBF_TEXT(TRACE, 5, "freepool"); |
4a71df50 FB |
983 | list_for_each_entry_safe(pool_entry, tmp, |
984 | &card->qdio.init_pool.entry_list, init_list){ | |
985 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) | |
986 | free_page((unsigned long)pool_entry->elements[i]); | |
987 | list_del(&pool_entry->init_list); | |
988 | kfree(pool_entry); | |
989 | } | |
990 | } | |
991 | ||
992 | static void qeth_free_qdio_buffers(struct qeth_card *card) | |
993 | { | |
994 | int i, j; | |
995 | ||
d11ba0c4 | 996 | QETH_DBF_TEXT(TRACE, 2, "freeqdbf"); |
4a71df50 FB |
997 | if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == |
998 | QETH_QDIO_UNINITIALIZED) | |
999 | return; | |
1000 | kfree(card->qdio.in_q); | |
1001 | card->qdio.in_q = NULL; | |
1002 | /* inbound buffer pool */ | |
1003 | qeth_free_buffer_pool(card); | |
1004 | /* free outbound qdio_qs */ | |
1005 | if (card->qdio.out_qs) { | |
1006 | for (i = 0; i < card->qdio.no_out_queues; ++i) { | |
1007 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) | |
1008 | qeth_clear_output_buffer(card->qdio.out_qs[i], | |
1009 | &card->qdio.out_qs[i]->bufs[j]); | |
1010 | kfree(card->qdio.out_qs[i]); | |
1011 | } | |
1012 | kfree(card->qdio.out_qs); | |
1013 | card->qdio.out_qs = NULL; | |
1014 | } | |
1015 | } | |
1016 | ||
1017 | static void qeth_clean_channel(struct qeth_channel *channel) | |
1018 | { | |
1019 | int cnt; | |
1020 | ||
d11ba0c4 | 1021 | QETH_DBF_TEXT(SETUP, 2, "freech"); |
4a71df50 FB |
1022 | for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) |
1023 | kfree(channel->iob[cnt].data); | |
1024 | } | |
1025 | ||
1026 | static int qeth_is_1920_device(struct qeth_card *card) | |
1027 | { | |
1028 | int single_queue = 0; | |
1029 | struct ccw_device *ccwdev; | |
1030 | struct channelPath_dsc { | |
1031 | u8 flags; | |
1032 | u8 lsn; | |
1033 | u8 desc; | |
1034 | u8 chpid; | |
1035 | u8 swla; | |
1036 | u8 zeroes; | |
1037 | u8 chla; | |
1038 | u8 chpp; | |
1039 | } *chp_dsc; | |
1040 | ||
d11ba0c4 | 1041 | QETH_DBF_TEXT(SETUP, 2, "chk_1920"); |
4a71df50 FB |
1042 | |
1043 | ccwdev = card->data.ccwdev; | |
1044 | chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); | |
1045 | if (chp_dsc != NULL) { | |
1046 | /* CHPP field bit 6 == 1 -> single queue */ | |
1047 | single_queue = ((chp_dsc->chpp & 0x02) == 0x02); | |
1048 | kfree(chp_dsc); | |
1049 | } | |
d11ba0c4 | 1050 | QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue); |
4a71df50 FB |
1051 | return single_queue; |
1052 | } | |
1053 | ||
1054 | static void qeth_init_qdio_info(struct qeth_card *card) | |
1055 | { | |
d11ba0c4 | 1056 | QETH_DBF_TEXT(SETUP, 4, "intqdinf"); |
4a71df50 FB |
1057 | atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); |
1058 | /* inbound */ | |
1059 | card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; | |
1060 | card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; | |
1061 | card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; | |
1062 | INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); | |
1063 | INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); | |
1064 | } | |
1065 | ||
1066 | static void qeth_set_intial_options(struct qeth_card *card) | |
1067 | { | |
1068 | card->options.route4.type = NO_ROUTER; | |
1069 | card->options.route6.type = NO_ROUTER; | |
1070 | card->options.checksum_type = QETH_CHECKSUM_DEFAULT; | |
1071 | card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; | |
1072 | card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; | |
1073 | card->options.fake_broadcast = 0; | |
1074 | card->options.add_hhlen = DEFAULT_ADD_HHLEN; | |
4a71df50 FB |
1075 | card->options.performance_stats = 0; |
1076 | card->options.rx_sg_cb = QETH_RX_SG_CB; | |
1077 | } | |
1078 | ||
1079 | static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) | |
1080 | { | |
1081 | unsigned long flags; | |
1082 | int rc = 0; | |
1083 | ||
1084 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
d11ba0c4 | 1085 | QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x", |
4a71df50 FB |
1086 | (u8) card->thread_start_mask, |
1087 | (u8) card->thread_allowed_mask, | |
1088 | (u8) card->thread_running_mask); | |
1089 | rc = (card->thread_start_mask & thread); | |
1090 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
1091 | return rc; | |
1092 | } | |
1093 | ||
1094 | static void qeth_start_kernel_thread(struct work_struct *work) | |
1095 | { | |
1096 | struct qeth_card *card = container_of(work, struct qeth_card, | |
1097 | kernel_thread_starter); | |
d11ba0c4 | 1098 | QETH_DBF_TEXT(TRACE , 2, "strthrd"); |
4a71df50 FB |
1099 | |
1100 | if (card->read.state != CH_STATE_UP && | |
1101 | card->write.state != CH_STATE_UP) | |
1102 | return; | |
1103 | if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) | |
1104 | kthread_run(card->discipline.recover, (void *) card, | |
1105 | "qeth_recover"); | |
1106 | } | |
1107 | ||
1108 | static int qeth_setup_card(struct qeth_card *card) | |
1109 | { | |
1110 | ||
d11ba0c4 PT |
1111 | QETH_DBF_TEXT(SETUP, 2, "setupcrd"); |
1112 | QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); | |
4a71df50 FB |
1113 | |
1114 | card->read.state = CH_STATE_DOWN; | |
1115 | card->write.state = CH_STATE_DOWN; | |
1116 | card->data.state = CH_STATE_DOWN; | |
1117 | card->state = CARD_STATE_DOWN; | |
1118 | card->lan_online = 0; | |
1119 | card->use_hard_stop = 0; | |
1120 | card->dev = NULL; | |
1121 | spin_lock_init(&card->vlanlock); | |
1122 | spin_lock_init(&card->mclock); | |
1123 | card->vlangrp = NULL; | |
1124 | spin_lock_init(&card->lock); | |
1125 | spin_lock_init(&card->ip_lock); | |
1126 | spin_lock_init(&card->thread_mask_lock); | |
1127 | card->thread_start_mask = 0; | |
1128 | card->thread_allowed_mask = 0; | |
1129 | card->thread_running_mask = 0; | |
1130 | INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); | |
1131 | INIT_LIST_HEAD(&card->ip_list); | |
1132 | card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL); | |
1133 | if (!card->ip_tbd_list) { | |
d11ba0c4 | 1134 | QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); |
4a71df50 FB |
1135 | return -ENOMEM; |
1136 | } | |
1137 | INIT_LIST_HEAD(card->ip_tbd_list); | |
1138 | INIT_LIST_HEAD(&card->cmd_waiter_list); | |
1139 | init_waitqueue_head(&card->wait_q); | |
1140 | /* intial options */ | |
1141 | qeth_set_intial_options(card); | |
1142 | /* IP address takeover */ | |
1143 | INIT_LIST_HEAD(&card->ipato.entries); | |
1144 | card->ipato.enabled = 0; | |
1145 | card->ipato.invert4 = 0; | |
1146 | card->ipato.invert6 = 0; | |
1147 | /* init QDIO stuff */ | |
1148 | qeth_init_qdio_info(card); | |
1149 | return 0; | |
1150 | } | |
1151 | ||
6bcac508 MS |
1152 | static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) |
1153 | { | |
1154 | struct qeth_card *card = container_of(slr, struct qeth_card, | |
1155 | qeth_service_level); | |
1156 | seq_printf(m, "qeth: %s firmware level %s\n", CARD_BUS_ID(card), | |
1157 | card->info.mcl_level); | |
1158 | } | |
1159 | ||
4a71df50 FB |
1160 | static struct qeth_card *qeth_alloc_card(void) |
1161 | { | |
1162 | struct qeth_card *card; | |
1163 | ||
d11ba0c4 | 1164 | QETH_DBF_TEXT(SETUP, 2, "alloccrd"); |
4a71df50 FB |
1165 | card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); |
1166 | if (!card) | |
1167 | return NULL; | |
d11ba0c4 | 1168 | QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); |
4a71df50 FB |
1169 | if (qeth_setup_channel(&card->read)) { |
1170 | kfree(card); | |
1171 | return NULL; | |
1172 | } | |
1173 | if (qeth_setup_channel(&card->write)) { | |
1174 | qeth_clean_channel(&card->read); | |
1175 | kfree(card); | |
1176 | return NULL; | |
1177 | } | |
1178 | card->options.layer2 = -1; | |
6bcac508 MS |
1179 | card->qeth_service_level.seq_print = qeth_core_sl_print; |
1180 | register_service_level(&card->qeth_service_level); | |
4a71df50 FB |
1181 | return card; |
1182 | } | |
1183 | ||
1184 | static int qeth_determine_card_type(struct qeth_card *card) | |
1185 | { | |
1186 | int i = 0; | |
1187 | ||
d11ba0c4 | 1188 | QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); |
4a71df50 FB |
1189 | |
1190 | card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; | |
1191 | card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; | |
1192 | while (known_devices[i][4]) { | |
1193 | if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) && | |
1194 | (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) { | |
1195 | card->info.type = known_devices[i][4]; | |
1196 | card->qdio.no_out_queues = known_devices[i][8]; | |
1197 | card->info.is_multicast_different = known_devices[i][9]; | |
1198 | if (qeth_is_1920_device(card)) { | |
74eacdb9 FB |
1199 | dev_info(&card->gdev->dev, |
1200 | "Priority Queueing not supported\n"); | |
4a71df50 FB |
1201 | card->qdio.no_out_queues = 1; |
1202 | card->qdio.default_out_queue = 0; | |
1203 | } | |
1204 | return 0; | |
1205 | } | |
1206 | i++; | |
1207 | } | |
1208 | card->info.type = QETH_CARD_TYPE_UNKNOWN; | |
74eacdb9 FB |
1209 | dev_err(&card->gdev->dev, "The adapter hardware is of an " |
1210 | "unknown type\n"); | |
4a71df50 FB |
1211 | return -ENOENT; |
1212 | } | |
1213 | ||
1214 | static int qeth_clear_channel(struct qeth_channel *channel) | |
1215 | { | |
1216 | unsigned long flags; | |
1217 | struct qeth_card *card; | |
1218 | int rc; | |
1219 | ||
d11ba0c4 | 1220 | QETH_DBF_TEXT(TRACE, 3, "clearch"); |
4a71df50 FB |
1221 | card = CARD_FROM_CDEV(channel->ccwdev); |
1222 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); | |
1223 | rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); | |
1224 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1225 | ||
1226 | if (rc) | |
1227 | return rc; | |
1228 | rc = wait_event_interruptible_timeout(card->wait_q, | |
1229 | channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); | |
1230 | if (rc == -ERESTARTSYS) | |
1231 | return rc; | |
1232 | if (channel->state != CH_STATE_STOPPED) | |
1233 | return -ETIME; | |
1234 | channel->state = CH_STATE_DOWN; | |
1235 | return 0; | |
1236 | } | |
1237 | ||
1238 | static int qeth_halt_channel(struct qeth_channel *channel) | |
1239 | { | |
1240 | unsigned long flags; | |
1241 | struct qeth_card *card; | |
1242 | int rc; | |
1243 | ||
d11ba0c4 | 1244 | QETH_DBF_TEXT(TRACE, 3, "haltch"); |
4a71df50 FB |
1245 | card = CARD_FROM_CDEV(channel->ccwdev); |
1246 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); | |
1247 | rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); | |
1248 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1249 | ||
1250 | if (rc) | |
1251 | return rc; | |
1252 | rc = wait_event_interruptible_timeout(card->wait_q, | |
1253 | channel->state == CH_STATE_HALTED, QETH_TIMEOUT); | |
1254 | if (rc == -ERESTARTSYS) | |
1255 | return rc; | |
1256 | if (channel->state != CH_STATE_HALTED) | |
1257 | return -ETIME; | |
1258 | return 0; | |
1259 | } | |
1260 | ||
1261 | static int qeth_halt_channels(struct qeth_card *card) | |
1262 | { | |
1263 | int rc1 = 0, rc2 = 0, rc3 = 0; | |
1264 | ||
d11ba0c4 | 1265 | QETH_DBF_TEXT(TRACE, 3, "haltchs"); |
4a71df50 FB |
1266 | rc1 = qeth_halt_channel(&card->read); |
1267 | rc2 = qeth_halt_channel(&card->write); | |
1268 | rc3 = qeth_halt_channel(&card->data); | |
1269 | if (rc1) | |
1270 | return rc1; | |
1271 | if (rc2) | |
1272 | return rc2; | |
1273 | return rc3; | |
1274 | } | |
1275 | ||
1276 | static int qeth_clear_channels(struct qeth_card *card) | |
1277 | { | |
1278 | int rc1 = 0, rc2 = 0, rc3 = 0; | |
1279 | ||
d11ba0c4 | 1280 | QETH_DBF_TEXT(TRACE, 3, "clearchs"); |
4a71df50 FB |
1281 | rc1 = qeth_clear_channel(&card->read); |
1282 | rc2 = qeth_clear_channel(&card->write); | |
1283 | rc3 = qeth_clear_channel(&card->data); | |
1284 | if (rc1) | |
1285 | return rc1; | |
1286 | if (rc2) | |
1287 | return rc2; | |
1288 | return rc3; | |
1289 | } | |
1290 | ||
1291 | static int qeth_clear_halt_card(struct qeth_card *card, int halt) | |
1292 | { | |
1293 | int rc = 0; | |
1294 | ||
d11ba0c4 PT |
1295 | QETH_DBF_TEXT(TRACE, 3, "clhacrd"); |
1296 | QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *)); | |
4a71df50 FB |
1297 | |
1298 | if (halt) | |
1299 | rc = qeth_halt_channels(card); | |
1300 | if (rc) | |
1301 | return rc; | |
1302 | return qeth_clear_channels(card); | |
1303 | } | |
1304 | ||
1305 | int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) | |
1306 | { | |
1307 | int rc = 0; | |
1308 | ||
d11ba0c4 | 1309 | QETH_DBF_TEXT(TRACE, 3, "qdioclr"); |
4a71df50 FB |
1310 | switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, |
1311 | QETH_QDIO_CLEANING)) { | |
1312 | case QETH_QDIO_ESTABLISHED: | |
1313 | if (card->info.type == QETH_CARD_TYPE_IQD) | |
1314 | rc = qdio_cleanup(CARD_DDEV(card), | |
1315 | QDIO_FLAG_CLEANUP_USING_HALT); | |
1316 | else | |
1317 | rc = qdio_cleanup(CARD_DDEV(card), | |
1318 | QDIO_FLAG_CLEANUP_USING_CLEAR); | |
1319 | if (rc) | |
d11ba0c4 | 1320 | QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc); |
4a71df50 FB |
1321 | atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); |
1322 | break; | |
1323 | case QETH_QDIO_CLEANING: | |
1324 | return rc; | |
1325 | default: | |
1326 | break; | |
1327 | } | |
1328 | rc = qeth_clear_halt_card(card, use_halt); | |
1329 | if (rc) | |
d11ba0c4 | 1330 | QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc); |
4a71df50 FB |
1331 | card->state = CARD_STATE_DOWN; |
1332 | return rc; | |
1333 | } | |
1334 | EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); | |
1335 | ||
1336 | static int qeth_read_conf_data(struct qeth_card *card, void **buffer, | |
1337 | int *length) | |
1338 | { | |
1339 | struct ciw *ciw; | |
1340 | char *rcd_buf; | |
1341 | int ret; | |
1342 | struct qeth_channel *channel = &card->data; | |
1343 | unsigned long flags; | |
1344 | ||
1345 | /* | |
1346 | * scan for RCD command in extended SenseID data | |
1347 | */ | |
1348 | ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); | |
1349 | if (!ciw || ciw->cmd == 0) | |
1350 | return -EOPNOTSUPP; | |
1351 | rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); | |
1352 | if (!rcd_buf) | |
1353 | return -ENOMEM; | |
1354 | ||
1355 | channel->ccw.cmd_code = ciw->cmd; | |
1356 | channel->ccw.cda = (__u32) __pa(rcd_buf); | |
1357 | channel->ccw.count = ciw->count; | |
1358 | channel->ccw.flags = CCW_FLAG_SLI; | |
1359 | channel->state = CH_STATE_RCD; | |
1360 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); | |
1361 | ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, | |
1362 | QETH_RCD_PARM, LPM_ANYPATH, 0, | |
1363 | QETH_RCD_TIMEOUT); | |
1364 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1365 | if (!ret) | |
1366 | wait_event(card->wait_q, | |
1367 | (channel->state == CH_STATE_RCD_DONE || | |
1368 | channel->state == CH_STATE_DOWN)); | |
1369 | if (channel->state == CH_STATE_DOWN) | |
1370 | ret = -EIO; | |
1371 | else | |
1372 | channel->state = CH_STATE_DOWN; | |
1373 | if (ret) { | |
1374 | kfree(rcd_buf); | |
1375 | *buffer = NULL; | |
1376 | *length = 0; | |
1377 | } else { | |
1378 | *length = ciw->count; | |
1379 | *buffer = rcd_buf; | |
1380 | } | |
1381 | return ret; | |
1382 | } | |
1383 | ||
1384 | static int qeth_get_unitaddr(struct qeth_card *card) | |
1385 | { | |
1386 | int length; | |
1387 | char *prcd; | |
1388 | int rc; | |
1389 | ||
d11ba0c4 | 1390 | QETH_DBF_TEXT(SETUP, 2, "getunit"); |
4a71df50 FB |
1391 | rc = qeth_read_conf_data(card, (void **) &prcd, &length); |
1392 | if (rc) { | |
74eacdb9 FB |
1393 | QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", |
1394 | dev_name(&card->gdev->dev), rc); | |
4a71df50 FB |
1395 | return rc; |
1396 | } | |
1397 | card->info.chpid = prcd[30]; | |
1398 | card->info.unit_addr2 = prcd[31]; | |
1399 | card->info.cula = prcd[63]; | |
1400 | card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && | |
1401 | (prcd[0x11] == _ascebc['M'])); | |
1402 | kfree(prcd); | |
1403 | return 0; | |
1404 | } | |
1405 | ||
1406 | static void qeth_init_tokens(struct qeth_card *card) | |
1407 | { | |
1408 | card->token.issuer_rm_w = 0x00010103UL; | |
1409 | card->token.cm_filter_w = 0x00010108UL; | |
1410 | card->token.cm_connection_w = 0x0001010aUL; | |
1411 | card->token.ulp_filter_w = 0x0001010bUL; | |
1412 | card->token.ulp_connection_w = 0x0001010dUL; | |
1413 | } | |
1414 | ||
1415 | static void qeth_init_func_level(struct qeth_card *card) | |
1416 | { | |
1417 | if (card->ipato.enabled) { | |
1418 | if (card->info.type == QETH_CARD_TYPE_IQD) | |
1419 | card->info.func_level = | |
1420 | QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT; | |
1421 | else | |
1422 | card->info.func_level = | |
1423 | QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT; | |
1424 | } else { | |
1425 | if (card->info.type == QETH_CARD_TYPE_IQD) | |
1426 | /*FIXME:why do we have same values for dis and ena for | |
1427 | osae??? */ | |
1428 | card->info.func_level = | |
1429 | QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT; | |
1430 | else | |
1431 | card->info.func_level = | |
1432 | QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT; | |
1433 | } | |
1434 | } | |
1435 | ||
4a71df50 FB |
1436 | static int qeth_idx_activate_get_answer(struct qeth_channel *channel, |
1437 | void (*idx_reply_cb)(struct qeth_channel *, | |
1438 | struct qeth_cmd_buffer *)) | |
1439 | { | |
1440 | struct qeth_cmd_buffer *iob; | |
1441 | unsigned long flags; | |
1442 | int rc; | |
1443 | struct qeth_card *card; | |
1444 | ||
d11ba0c4 | 1445 | QETH_DBF_TEXT(SETUP, 2, "idxanswr"); |
4a71df50 FB |
1446 | card = CARD_FROM_CDEV(channel->ccwdev); |
1447 | iob = qeth_get_buffer(channel); | |
1448 | iob->callback = idx_reply_cb; | |
1449 | memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); | |
1450 | channel->ccw.count = QETH_BUFSIZE; | |
1451 | channel->ccw.cda = (__u32) __pa(iob->data); | |
1452 | ||
1453 | wait_event(card->wait_q, | |
1454 | atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); | |
d11ba0c4 | 1455 | QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); |
4a71df50 FB |
1456 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); |
1457 | rc = ccw_device_start(channel->ccwdev, | |
1458 | &channel->ccw, (addr_t) iob, 0, 0); | |
1459 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1460 | ||
1461 | if (rc) { | |
14cc21b6 | 1462 | QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); |
d11ba0c4 | 1463 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); |
4a71df50 FB |
1464 | atomic_set(&channel->irq_pending, 0); |
1465 | wake_up(&card->wait_q); | |
1466 | return rc; | |
1467 | } | |
1468 | rc = wait_event_interruptible_timeout(card->wait_q, | |
1469 | channel->state == CH_STATE_UP, QETH_TIMEOUT); | |
1470 | if (rc == -ERESTARTSYS) | |
1471 | return rc; | |
1472 | if (channel->state != CH_STATE_UP) { | |
1473 | rc = -ETIME; | |
d11ba0c4 | 1474 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); |
4a71df50 FB |
1475 | qeth_clear_cmd_buffers(channel); |
1476 | } else | |
1477 | rc = 0; | |
1478 | return rc; | |
1479 | } | |
1480 | ||
1481 | static int qeth_idx_activate_channel(struct qeth_channel *channel, | |
1482 | void (*idx_reply_cb)(struct qeth_channel *, | |
1483 | struct qeth_cmd_buffer *)) | |
1484 | { | |
1485 | struct qeth_card *card; | |
1486 | struct qeth_cmd_buffer *iob; | |
1487 | unsigned long flags; | |
1488 | __u16 temp; | |
1489 | __u8 tmp; | |
1490 | int rc; | |
f06f6f32 | 1491 | struct ccw_dev_id temp_devid; |
4a71df50 FB |
1492 | |
1493 | card = CARD_FROM_CDEV(channel->ccwdev); | |
1494 | ||
d11ba0c4 | 1495 | QETH_DBF_TEXT(SETUP, 2, "idxactch"); |
4a71df50 FB |
1496 | |
1497 | iob = qeth_get_buffer(channel); | |
1498 | iob->callback = idx_reply_cb; | |
1499 | memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); | |
1500 | channel->ccw.count = IDX_ACTIVATE_SIZE; | |
1501 | channel->ccw.cda = (__u32) __pa(iob->data); | |
1502 | if (channel == &card->write) { | |
1503 | memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); | |
1504 | memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), | |
1505 | &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); | |
1506 | card->seqno.trans_hdr++; | |
1507 | } else { | |
1508 | memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); | |
1509 | memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), | |
1510 | &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); | |
1511 | } | |
1512 | tmp = ((__u8)card->info.portno) | 0x80; | |
1513 | memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); | |
1514 | memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), | |
1515 | &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); | |
1516 | memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), | |
1517 | &card->info.func_level, sizeof(__u16)); | |
f06f6f32 CH |
1518 | ccw_device_get_id(CARD_DDEV(card), &temp_devid); |
1519 | memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); | |
4a71df50 FB |
1520 | temp = (card->info.cula << 8) + card->info.unit_addr2; |
1521 | memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); | |
1522 | ||
1523 | wait_event(card->wait_q, | |
1524 | atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); | |
d11ba0c4 | 1525 | QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); |
4a71df50 FB |
1526 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); |
1527 | rc = ccw_device_start(channel->ccwdev, | |
1528 | &channel->ccw, (addr_t) iob, 0, 0); | |
1529 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1530 | ||
1531 | if (rc) { | |
14cc21b6 FB |
1532 | QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", |
1533 | rc); | |
d11ba0c4 | 1534 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); |
4a71df50 FB |
1535 | atomic_set(&channel->irq_pending, 0); |
1536 | wake_up(&card->wait_q); | |
1537 | return rc; | |
1538 | } | |
1539 | rc = wait_event_interruptible_timeout(card->wait_q, | |
1540 | channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); | |
1541 | if (rc == -ERESTARTSYS) | |
1542 | return rc; | |
1543 | if (channel->state != CH_STATE_ACTIVATING) { | |
74eacdb9 FB |
1544 | dev_warn(&channel->ccwdev->dev, "The qeth device driver" |
1545 | " failed to recover an error on the device\n"); | |
1546 | QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", | |
1547 | dev_name(&channel->ccwdev->dev)); | |
d11ba0c4 | 1548 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); |
4a71df50 FB |
1549 | qeth_clear_cmd_buffers(channel); |
1550 | return -ETIME; | |
1551 | } | |
1552 | return qeth_idx_activate_get_answer(channel, idx_reply_cb); | |
1553 | } | |
1554 | ||
1555 | static int qeth_peer_func_level(int level) | |
1556 | { | |
1557 | if ((level & 0xff) == 8) | |
1558 | return (level & 0xff) + 0x400; | |
1559 | if (((level >> 8) & 3) == 1) | |
1560 | return (level & 0xff) + 0x200; | |
1561 | return level; | |
1562 | } | |
1563 | ||
1564 | static void qeth_idx_write_cb(struct qeth_channel *channel, | |
1565 | struct qeth_cmd_buffer *iob) | |
1566 | { | |
1567 | struct qeth_card *card; | |
1568 | __u16 temp; | |
1569 | ||
d11ba0c4 | 1570 | QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); |
4a71df50 FB |
1571 | |
1572 | if (channel->state == CH_STATE_DOWN) { | |
1573 | channel->state = CH_STATE_ACTIVATING; | |
1574 | goto out; | |
1575 | } | |
1576 | card = CARD_FROM_CDEV(channel->ccwdev); | |
1577 | ||
1578 | if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { | |
1579 | if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19) | |
74eacdb9 FB |
1580 | dev_err(&card->write.ccwdev->dev, |
1581 | "The adapter is used exclusively by another " | |
1582 | "host\n"); | |
4a71df50 | 1583 | else |
74eacdb9 FB |
1584 | QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" |
1585 | " negative reply\n", | |
1586 | dev_name(&card->write.ccwdev->dev)); | |
4a71df50 FB |
1587 | goto out; |
1588 | } | |
1589 | memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); | |
1590 | if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { | |
74eacdb9 FB |
1591 | QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " |
1592 | "function level mismatch (sent: 0x%x, received: " | |
1593 | "0x%x)\n", dev_name(&card->write.ccwdev->dev), | |
1594 | card->info.func_level, temp); | |
4a71df50 FB |
1595 | goto out; |
1596 | } | |
1597 | channel->state = CH_STATE_UP; | |
1598 | out: | |
1599 | qeth_release_buffer(channel, iob); | |
1600 | } | |
1601 | ||
1602 | static void qeth_idx_read_cb(struct qeth_channel *channel, | |
1603 | struct qeth_cmd_buffer *iob) | |
1604 | { | |
1605 | struct qeth_card *card; | |
1606 | __u16 temp; | |
1607 | ||
d11ba0c4 | 1608 | QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); |
4a71df50 FB |
1609 | if (channel->state == CH_STATE_DOWN) { |
1610 | channel->state = CH_STATE_ACTIVATING; | |
1611 | goto out; | |
1612 | } | |
1613 | ||
1614 | card = CARD_FROM_CDEV(channel->ccwdev); | |
1615 | if (qeth_check_idx_response(iob->data)) | |
1616 | goto out; | |
1617 | ||
1618 | if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { | |
1619 | if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19) | |
74eacdb9 FB |
1620 | dev_err(&card->write.ccwdev->dev, |
1621 | "The adapter is used exclusively by another " | |
1622 | "host\n"); | |
4a71df50 | 1623 | else |
74eacdb9 FB |
1624 | QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" |
1625 | " negative reply\n", | |
1626 | dev_name(&card->read.ccwdev->dev)); | |
4a71df50 FB |
1627 | goto out; |
1628 | } | |
1629 | ||
1630 | /** | |
1631 | * temporary fix for microcode bug | |
1632 | * to revert it,replace OR by AND | |
1633 | */ | |
1634 | if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || | |
1635 | (card->info.type == QETH_CARD_TYPE_OSAE)) | |
1636 | card->info.portname_required = 1; | |
1637 | ||
1638 | memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); | |
1639 | if (temp != qeth_peer_func_level(card->info.func_level)) { | |
74eacdb9 FB |
1640 | QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " |
1641 | "level mismatch (sent: 0x%x, received: 0x%x)\n", | |
1642 | dev_name(&card->read.ccwdev->dev), | |
1643 | card->info.func_level, temp); | |
4a71df50 FB |
1644 | goto out; |
1645 | } | |
1646 | memcpy(&card->token.issuer_rm_r, | |
1647 | QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), | |
1648 | QETH_MPC_TOKEN_LENGTH); | |
1649 | memcpy(&card->info.mcl_level[0], | |
1650 | QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); | |
1651 | channel->state = CH_STATE_UP; | |
1652 | out: | |
1653 | qeth_release_buffer(channel, iob); | |
1654 | } | |
1655 | ||
1656 | void qeth_prepare_control_data(struct qeth_card *card, int len, | |
1657 | struct qeth_cmd_buffer *iob) | |
1658 | { | |
1659 | qeth_setup_ccw(&card->write, iob->data, len); | |
1660 | iob->callback = qeth_release_buffer; | |
1661 | ||
1662 | memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), | |
1663 | &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); | |
1664 | card->seqno.trans_hdr++; | |
1665 | memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), | |
1666 | &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); | |
1667 | card->seqno.pdu_hdr++; | |
1668 | memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), | |
1669 | &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); | |
d11ba0c4 | 1670 | QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); |
4a71df50 FB |
1671 | } |
1672 | EXPORT_SYMBOL_GPL(qeth_prepare_control_data); | |
1673 | ||
1674 | int qeth_send_control_data(struct qeth_card *card, int len, | |
1675 | struct qeth_cmd_buffer *iob, | |
1676 | int (*reply_cb)(struct qeth_card *, struct qeth_reply *, | |
1677 | unsigned long), | |
1678 | void *reply_param) | |
1679 | { | |
1680 | int rc; | |
1681 | unsigned long flags; | |
1682 | struct qeth_reply *reply = NULL; | |
1683 | unsigned long timeout; | |
1684 | ||
d11ba0c4 | 1685 | QETH_DBF_TEXT(TRACE, 2, "sendctl"); |
4a71df50 FB |
1686 | |
1687 | reply = qeth_alloc_reply(card); | |
1688 | if (!reply) { | |
4a71df50 FB |
1689 | return -ENOMEM; |
1690 | } | |
1691 | reply->callback = reply_cb; | |
1692 | reply->param = reply_param; | |
1693 | if (card->state == CARD_STATE_DOWN) | |
1694 | reply->seqno = QETH_IDX_COMMAND_SEQNO; | |
1695 | else | |
1696 | reply->seqno = card->seqno.ipa++; | |
1697 | init_waitqueue_head(&reply->wait_q); | |
1698 | spin_lock_irqsave(&card->lock, flags); | |
1699 | list_add_tail(&reply->list, &card->cmd_waiter_list); | |
1700 | spin_unlock_irqrestore(&card->lock, flags); | |
d11ba0c4 | 1701 | QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); |
4a71df50 FB |
1702 | |
1703 | while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; | |
1704 | qeth_prepare_control_data(card, len, iob); | |
1705 | ||
1706 | if (IS_IPA(iob->data)) | |
1707 | timeout = jiffies + QETH_IPA_TIMEOUT; | |
1708 | else | |
1709 | timeout = jiffies + QETH_TIMEOUT; | |
1710 | ||
d11ba0c4 | 1711 | QETH_DBF_TEXT(TRACE, 6, "noirqpnd"); |
4a71df50 FB |
1712 | spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); |
1713 | rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, | |
1714 | (addr_t) iob, 0, 0); | |
1715 | spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); | |
1716 | if (rc) { | |
74eacdb9 FB |
1717 | QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " |
1718 | "ccw_device_start rc = %i\n", | |
1719 | dev_name(&card->write.ccwdev->dev), rc); | |
d11ba0c4 | 1720 | QETH_DBF_TEXT_(TRACE, 2, " err%d", rc); |
4a71df50 FB |
1721 | spin_lock_irqsave(&card->lock, flags); |
1722 | list_del_init(&reply->list); | |
1723 | qeth_put_reply(reply); | |
1724 | spin_unlock_irqrestore(&card->lock, flags); | |
1725 | qeth_release_buffer(iob->channel, iob); | |
1726 | atomic_set(&card->write.irq_pending, 0); | |
1727 | wake_up(&card->wait_q); | |
1728 | return rc; | |
1729 | } | |
1730 | while (!atomic_read(&reply->received)) { | |
1731 | if (time_after(jiffies, timeout)) { | |
1732 | spin_lock_irqsave(&reply->card->lock, flags); | |
1733 | list_del_init(&reply->list); | |
1734 | spin_unlock_irqrestore(&reply->card->lock, flags); | |
1735 | reply->rc = -ETIME; | |
1736 | atomic_inc(&reply->received); | |
1737 | wake_up(&reply->wait_q); | |
1738 | } | |
1739 | cpu_relax(); | |
1740 | }; | |
1741 | rc = reply->rc; | |
1742 | qeth_put_reply(reply); | |
1743 | return rc; | |
1744 | } | |
1745 | EXPORT_SYMBOL_GPL(qeth_send_control_data); | |
1746 | ||
1747 | static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, | |
1748 | unsigned long data) | |
1749 | { | |
1750 | struct qeth_cmd_buffer *iob; | |
1751 | ||
d11ba0c4 | 1752 | QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); |
4a71df50 FB |
1753 | |
1754 | iob = (struct qeth_cmd_buffer *) data; | |
1755 | memcpy(&card->token.cm_filter_r, | |
1756 | QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), | |
1757 | QETH_MPC_TOKEN_LENGTH); | |
d11ba0c4 | 1758 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1759 | return 0; |
1760 | } | |
1761 | ||
1762 | static int qeth_cm_enable(struct qeth_card *card) | |
1763 | { | |
1764 | int rc; | |
1765 | struct qeth_cmd_buffer *iob; | |
1766 | ||
d11ba0c4 | 1767 | QETH_DBF_TEXT(SETUP, 2, "cmenable"); |
4a71df50 FB |
1768 | |
1769 | iob = qeth_wait_for_buffer(&card->write); | |
1770 | memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); | |
1771 | memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), | |
1772 | &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); | |
1773 | memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), | |
1774 | &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); | |
1775 | ||
1776 | rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, | |
1777 | qeth_cm_enable_cb, NULL); | |
1778 | return rc; | |
1779 | } | |
1780 | ||
1781 | static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, | |
1782 | unsigned long data) | |
1783 | { | |
1784 | ||
1785 | struct qeth_cmd_buffer *iob; | |
1786 | ||
d11ba0c4 | 1787 | QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); |
4a71df50 FB |
1788 | |
1789 | iob = (struct qeth_cmd_buffer *) data; | |
1790 | memcpy(&card->token.cm_connection_r, | |
1791 | QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), | |
1792 | QETH_MPC_TOKEN_LENGTH); | |
d11ba0c4 | 1793 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1794 | return 0; |
1795 | } | |
1796 | ||
1797 | static int qeth_cm_setup(struct qeth_card *card) | |
1798 | { | |
1799 | int rc; | |
1800 | struct qeth_cmd_buffer *iob; | |
1801 | ||
d11ba0c4 | 1802 | QETH_DBF_TEXT(SETUP, 2, "cmsetup"); |
4a71df50 FB |
1803 | |
1804 | iob = qeth_wait_for_buffer(&card->write); | |
1805 | memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); | |
1806 | memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), | |
1807 | &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); | |
1808 | memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), | |
1809 | &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); | |
1810 | memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), | |
1811 | &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); | |
1812 | rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, | |
1813 | qeth_cm_setup_cb, NULL); | |
1814 | return rc; | |
1815 | ||
1816 | } | |
1817 | ||
1818 | static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) | |
1819 | { | |
1820 | switch (card->info.type) { | |
1821 | case QETH_CARD_TYPE_UNKNOWN: | |
1822 | return 1500; | |
1823 | case QETH_CARD_TYPE_IQD: | |
1824 | return card->info.max_mtu; | |
1825 | case QETH_CARD_TYPE_OSAE: | |
1826 | switch (card->info.link_type) { | |
1827 | case QETH_LINK_TYPE_HSTR: | |
1828 | case QETH_LINK_TYPE_LANE_TR: | |
1829 | return 2000; | |
1830 | default: | |
1831 | return 1492; | |
1832 | } | |
1833 | default: | |
1834 | return 1500; | |
1835 | } | |
1836 | } | |
1837 | ||
1838 | static inline int qeth_get_max_mtu_for_card(int cardtype) | |
1839 | { | |
1840 | switch (cardtype) { | |
1841 | ||
1842 | case QETH_CARD_TYPE_UNKNOWN: | |
1843 | case QETH_CARD_TYPE_OSAE: | |
1844 | case QETH_CARD_TYPE_OSN: | |
1845 | return 61440; | |
1846 | case QETH_CARD_TYPE_IQD: | |
1847 | return 57344; | |
1848 | default: | |
1849 | return 1500; | |
1850 | } | |
1851 | } | |
1852 | ||
1853 | static inline int qeth_get_mtu_out_of_mpc(int cardtype) | |
1854 | { | |
1855 | switch (cardtype) { | |
1856 | case QETH_CARD_TYPE_IQD: | |
1857 | return 1; | |
1858 | default: | |
1859 | return 0; | |
1860 | } | |
1861 | } | |
1862 | ||
1863 | static inline int qeth_get_mtu_outof_framesize(int framesize) | |
1864 | { | |
1865 | switch (framesize) { | |
1866 | case 0x4000: | |
1867 | return 8192; | |
1868 | case 0x6000: | |
1869 | return 16384; | |
1870 | case 0xa000: | |
1871 | return 32768; | |
1872 | case 0xffff: | |
1873 | return 57344; | |
1874 | default: | |
1875 | return 0; | |
1876 | } | |
1877 | } | |
1878 | ||
1879 | static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) | |
1880 | { | |
1881 | switch (card->info.type) { | |
1882 | case QETH_CARD_TYPE_OSAE: | |
1883 | return ((mtu >= 576) && (mtu <= 61440)); | |
1884 | case QETH_CARD_TYPE_IQD: | |
1885 | return ((mtu >= 576) && | |
1886 | (mtu <= card->info.max_mtu + 4096 - 32)); | |
1887 | case QETH_CARD_TYPE_OSN: | |
1888 | case QETH_CARD_TYPE_UNKNOWN: | |
1889 | default: | |
1890 | return 1; | |
1891 | } | |
1892 | } | |
1893 | ||
1894 | static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, | |
1895 | unsigned long data) | |
1896 | { | |
1897 | ||
1898 | __u16 mtu, framesize; | |
1899 | __u16 len; | |
1900 | __u8 link_type; | |
1901 | struct qeth_cmd_buffer *iob; | |
1902 | ||
d11ba0c4 | 1903 | QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); |
4a71df50 FB |
1904 | |
1905 | iob = (struct qeth_cmd_buffer *) data; | |
1906 | memcpy(&card->token.ulp_filter_r, | |
1907 | QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), | |
1908 | QETH_MPC_TOKEN_LENGTH); | |
1909 | if (qeth_get_mtu_out_of_mpc(card->info.type)) { | |
1910 | memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); | |
1911 | mtu = qeth_get_mtu_outof_framesize(framesize); | |
1912 | if (!mtu) { | |
1913 | iob->rc = -EINVAL; | |
d11ba0c4 | 1914 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1915 | return 0; |
1916 | } | |
1917 | card->info.max_mtu = mtu; | |
1918 | card->info.initial_mtu = mtu; | |
1919 | card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; | |
1920 | } else { | |
1921 | card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); | |
1922 | card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type); | |
1923 | card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; | |
1924 | } | |
1925 | ||
1926 | memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); | |
1927 | if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { | |
1928 | memcpy(&link_type, | |
1929 | QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); | |
1930 | card->info.link_type = link_type; | |
1931 | } else | |
1932 | card->info.link_type = 0; | |
d11ba0c4 | 1933 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1934 | return 0; |
1935 | } | |
1936 | ||
1937 | static int qeth_ulp_enable(struct qeth_card *card) | |
1938 | { | |
1939 | int rc; | |
1940 | char prot_type; | |
1941 | struct qeth_cmd_buffer *iob; | |
1942 | ||
1943 | /*FIXME: trace view callbacks*/ | |
d11ba0c4 | 1944 | QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); |
4a71df50 FB |
1945 | |
1946 | iob = qeth_wait_for_buffer(&card->write); | |
1947 | memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); | |
1948 | ||
1949 | *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = | |
1950 | (__u8) card->info.portno; | |
1951 | if (card->options.layer2) | |
1952 | if (card->info.type == QETH_CARD_TYPE_OSN) | |
1953 | prot_type = QETH_PROT_OSN2; | |
1954 | else | |
1955 | prot_type = QETH_PROT_LAYER2; | |
1956 | else | |
1957 | prot_type = QETH_PROT_TCPIP; | |
1958 | ||
1959 | memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); | |
1960 | memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), | |
1961 | &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); | |
1962 | memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), | |
1963 | &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); | |
1964 | memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), | |
1965 | card->info.portname, 9); | |
1966 | rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, | |
1967 | qeth_ulp_enable_cb, NULL); | |
1968 | return rc; | |
1969 | ||
1970 | } | |
1971 | ||
1972 | static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, | |
1973 | unsigned long data) | |
1974 | { | |
1975 | struct qeth_cmd_buffer *iob; | |
1976 | ||
d11ba0c4 | 1977 | QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); |
4a71df50 FB |
1978 | |
1979 | iob = (struct qeth_cmd_buffer *) data; | |
1980 | memcpy(&card->token.ulp_connection_r, | |
1981 | QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), | |
1982 | QETH_MPC_TOKEN_LENGTH); | |
d11ba0c4 | 1983 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1984 | return 0; |
1985 | } | |
1986 | ||
1987 | static int qeth_ulp_setup(struct qeth_card *card) | |
1988 | { | |
1989 | int rc; | |
1990 | __u16 temp; | |
1991 | struct qeth_cmd_buffer *iob; | |
1992 | struct ccw_dev_id dev_id; | |
1993 | ||
d11ba0c4 | 1994 | QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); |
4a71df50 FB |
1995 | |
1996 | iob = qeth_wait_for_buffer(&card->write); | |
1997 | memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); | |
1998 | ||
1999 | memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), | |
2000 | &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); | |
2001 | memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), | |
2002 | &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); | |
2003 | memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), | |
2004 | &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); | |
2005 | ||
2006 | ccw_device_get_id(CARD_DDEV(card), &dev_id); | |
2007 | memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); | |
2008 | temp = (card->info.cula << 8) + card->info.unit_addr2; | |
2009 | memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); | |
2010 | rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, | |
2011 | qeth_ulp_setup_cb, NULL); | |
2012 | return rc; | |
2013 | } | |
2014 | ||
2015 | static int qeth_alloc_qdio_buffers(struct qeth_card *card) | |
2016 | { | |
2017 | int i, j; | |
2018 | ||
d11ba0c4 | 2019 | QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); |
4a71df50 FB |
2020 | |
2021 | if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, | |
2022 | QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) | |
2023 | return 0; | |
2024 | ||
2025 | card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q), | |
508b3c4f | 2026 | GFP_KERNEL); |
4a71df50 FB |
2027 | if (!card->qdio.in_q) |
2028 | goto out_nomem; | |
d11ba0c4 PT |
2029 | QETH_DBF_TEXT(SETUP, 2, "inq"); |
2030 | QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); | |
4a71df50 FB |
2031 | memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); |
2032 | /* give inbound qeth_qdio_buffers their qdio_buffers */ | |
2033 | for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) | |
2034 | card->qdio.in_q->bufs[i].buffer = | |
2035 | &card->qdio.in_q->qdio_bufs[i]; | |
2036 | /* inbound buffer pool */ | |
2037 | if (qeth_alloc_buffer_pool(card)) | |
2038 | goto out_freeinq; | |
2039 | /* outbound */ | |
2040 | card->qdio.out_qs = | |
2041 | kmalloc(card->qdio.no_out_queues * | |
2042 | sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); | |
2043 | if (!card->qdio.out_qs) | |
2044 | goto out_freepool; | |
2045 | for (i = 0; i < card->qdio.no_out_queues; ++i) { | |
2046 | card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q), | |
508b3c4f | 2047 | GFP_KERNEL); |
4a71df50 FB |
2048 | if (!card->qdio.out_qs[i]) |
2049 | goto out_freeoutq; | |
d11ba0c4 PT |
2050 | QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); |
2051 | QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); | |
4a71df50 FB |
2052 | memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q)); |
2053 | card->qdio.out_qs[i]->queue_no = i; | |
2054 | /* give outbound qeth_qdio_buffers their qdio_buffers */ | |
2055 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { | |
2056 | card->qdio.out_qs[i]->bufs[j].buffer = | |
2057 | &card->qdio.out_qs[i]->qdio_bufs[j]; | |
2058 | skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j]. | |
2059 | skb_list); | |
2060 | lockdep_set_class( | |
2061 | &card->qdio.out_qs[i]->bufs[j].skb_list.lock, | |
2062 | &qdio_out_skb_queue_key); | |
2063 | INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list); | |
2064 | } | |
2065 | } | |
2066 | return 0; | |
2067 | ||
2068 | out_freeoutq: | |
2069 | while (i > 0) | |
2070 | kfree(card->qdio.out_qs[--i]); | |
2071 | kfree(card->qdio.out_qs); | |
2072 | card->qdio.out_qs = NULL; | |
2073 | out_freepool: | |
2074 | qeth_free_buffer_pool(card); | |
2075 | out_freeinq: | |
2076 | kfree(card->qdio.in_q); | |
2077 | card->qdio.in_q = NULL; | |
2078 | out_nomem: | |
2079 | atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); | |
2080 | return -ENOMEM; | |
2081 | } | |
2082 | ||
2083 | static void qeth_create_qib_param_field(struct qeth_card *card, | |
2084 | char *param_field) | |
2085 | { | |
2086 | ||
2087 | param_field[0] = _ascebc['P']; | |
2088 | param_field[1] = _ascebc['C']; | |
2089 | param_field[2] = _ascebc['I']; | |
2090 | param_field[3] = _ascebc['T']; | |
2091 | *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); | |
2092 | *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); | |
2093 | *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); | |
2094 | } | |
2095 | ||
2096 | static void qeth_create_qib_param_field_blkt(struct qeth_card *card, | |
2097 | char *param_field) | |
2098 | { | |
2099 | param_field[16] = _ascebc['B']; | |
2100 | param_field[17] = _ascebc['L']; | |
2101 | param_field[18] = _ascebc['K']; | |
2102 | param_field[19] = _ascebc['T']; | |
2103 | *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; | |
2104 | *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; | |
2105 | *((unsigned int *) (¶m_field[28])) = | |
2106 | card->info.blkt.inter_packet_jumbo; | |
2107 | } | |
2108 | ||
2109 | static int qeth_qdio_activate(struct qeth_card *card) | |
2110 | { | |
d11ba0c4 | 2111 | QETH_DBF_TEXT(SETUP, 3, "qdioact"); |
779e6e1c | 2112 | return qdio_activate(CARD_DDEV(card)); |
4a71df50 FB |
2113 | } |
2114 | ||
2115 | static int qeth_dm_act(struct qeth_card *card) | |
2116 | { | |
2117 | int rc; | |
2118 | struct qeth_cmd_buffer *iob; | |
2119 | ||
d11ba0c4 | 2120 | QETH_DBF_TEXT(SETUP, 2, "dmact"); |
4a71df50 FB |
2121 | |
2122 | iob = qeth_wait_for_buffer(&card->write); | |
2123 | memcpy(iob->data, DM_ACT, DM_ACT_SIZE); | |
2124 | ||
2125 | memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), | |
2126 | &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); | |
2127 | memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), | |
2128 | &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); | |
2129 | rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); | |
2130 | return rc; | |
2131 | } | |
2132 | ||
2133 | static int qeth_mpc_initialize(struct qeth_card *card) | |
2134 | { | |
2135 | int rc; | |
2136 | ||
d11ba0c4 | 2137 | QETH_DBF_TEXT(SETUP, 2, "mpcinit"); |
4a71df50 FB |
2138 | |
2139 | rc = qeth_issue_next_read(card); | |
2140 | if (rc) { | |
d11ba0c4 | 2141 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); |
4a71df50 FB |
2142 | return rc; |
2143 | } | |
2144 | rc = qeth_cm_enable(card); | |
2145 | if (rc) { | |
d11ba0c4 | 2146 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); |
4a71df50 FB |
2147 | goto out_qdio; |
2148 | } | |
2149 | rc = qeth_cm_setup(card); | |
2150 | if (rc) { | |
d11ba0c4 | 2151 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); |
4a71df50 FB |
2152 | goto out_qdio; |
2153 | } | |
2154 | rc = qeth_ulp_enable(card); | |
2155 | if (rc) { | |
d11ba0c4 | 2156 | QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); |
4a71df50 FB |
2157 | goto out_qdio; |
2158 | } | |
2159 | rc = qeth_ulp_setup(card); | |
2160 | if (rc) { | |
d11ba0c4 | 2161 | QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); |
4a71df50 FB |
2162 | goto out_qdio; |
2163 | } | |
2164 | rc = qeth_alloc_qdio_buffers(card); | |
2165 | if (rc) { | |
d11ba0c4 | 2166 | QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); |
4a71df50 FB |
2167 | goto out_qdio; |
2168 | } | |
2169 | rc = qeth_qdio_establish(card); | |
2170 | if (rc) { | |
d11ba0c4 | 2171 | QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); |
4a71df50 FB |
2172 | qeth_free_qdio_buffers(card); |
2173 | goto out_qdio; | |
2174 | } | |
2175 | rc = qeth_qdio_activate(card); | |
2176 | if (rc) { | |
d11ba0c4 | 2177 | QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); |
4a71df50 FB |
2178 | goto out_qdio; |
2179 | } | |
2180 | rc = qeth_dm_act(card); | |
2181 | if (rc) { | |
d11ba0c4 | 2182 | QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); |
4a71df50 FB |
2183 | goto out_qdio; |
2184 | } | |
2185 | ||
2186 | return 0; | |
2187 | out_qdio: | |
2188 | qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); | |
2189 | return rc; | |
2190 | } | |
2191 | ||
2192 | static void qeth_print_status_with_portname(struct qeth_card *card) | |
2193 | { | |
2194 | char dbf_text[15]; | |
2195 | int i; | |
2196 | ||
2197 | sprintf(dbf_text, "%s", card->info.portname + 1); | |
2198 | for (i = 0; i < 8; i++) | |
2199 | dbf_text[i] = | |
2200 | (char) _ebcasc[(__u8) dbf_text[i]]; | |
2201 | dbf_text[8] = 0; | |
74eacdb9 | 2202 | dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" |
4a71df50 | 2203 | "with link type %s (portname: %s)\n", |
4a71df50 FB |
2204 | qeth_get_cardname(card), |
2205 | (card->info.mcl_level[0]) ? " (level: " : "", | |
2206 | (card->info.mcl_level[0]) ? card->info.mcl_level : "", | |
2207 | (card->info.mcl_level[0]) ? ")" : "", | |
2208 | qeth_get_cardname_short(card), | |
2209 | dbf_text); | |
2210 | ||
2211 | } | |
2212 | ||
2213 | static void qeth_print_status_no_portname(struct qeth_card *card) | |
2214 | { | |
2215 | if (card->info.portname[0]) | |
74eacdb9 | 2216 | dev_info(&card->gdev->dev, "Device is a%s " |
4a71df50 FB |
2217 | "card%s%s%s\nwith link type %s " |
2218 | "(no portname needed by interface).\n", | |
4a71df50 FB |
2219 | qeth_get_cardname(card), |
2220 | (card->info.mcl_level[0]) ? " (level: " : "", | |
2221 | (card->info.mcl_level[0]) ? card->info.mcl_level : "", | |
2222 | (card->info.mcl_level[0]) ? ")" : "", | |
2223 | qeth_get_cardname_short(card)); | |
2224 | else | |
74eacdb9 | 2225 | dev_info(&card->gdev->dev, "Device is a%s " |
4a71df50 | 2226 | "card%s%s%s\nwith link type %s.\n", |
4a71df50 FB |
2227 | qeth_get_cardname(card), |
2228 | (card->info.mcl_level[0]) ? " (level: " : "", | |
2229 | (card->info.mcl_level[0]) ? card->info.mcl_level : "", | |
2230 | (card->info.mcl_level[0]) ? ")" : "", | |
2231 | qeth_get_cardname_short(card)); | |
2232 | } | |
2233 | ||
2234 | void qeth_print_status_message(struct qeth_card *card) | |
2235 | { | |
2236 | switch (card->info.type) { | |
2237 | case QETH_CARD_TYPE_OSAE: | |
2238 | /* VM will use a non-zero first character | |
2239 | * to indicate a HiperSockets like reporting | |
2240 | * of the level OSA sets the first character to zero | |
2241 | * */ | |
2242 | if (!card->info.mcl_level[0]) { | |
2243 | sprintf(card->info.mcl_level, "%02x%02x", | |
2244 | card->info.mcl_level[2], | |
2245 | card->info.mcl_level[3]); | |
2246 | ||
2247 | card->info.mcl_level[QETH_MCL_LENGTH] = 0; | |
2248 | break; | |
2249 | } | |
2250 | /* fallthrough */ | |
2251 | case QETH_CARD_TYPE_IQD: | |
906f1f07 KDW |
2252 | if ((card->info.guestlan) || |
2253 | (card->info.mcl_level[0] & 0x80)) { | |
4a71df50 FB |
2254 | card->info.mcl_level[0] = (char) _ebcasc[(__u8) |
2255 | card->info.mcl_level[0]]; | |
2256 | card->info.mcl_level[1] = (char) _ebcasc[(__u8) | |
2257 | card->info.mcl_level[1]]; | |
2258 | card->info.mcl_level[2] = (char) _ebcasc[(__u8) | |
2259 | card->info.mcl_level[2]]; | |
2260 | card->info.mcl_level[3] = (char) _ebcasc[(__u8) | |
2261 | card->info.mcl_level[3]]; | |
2262 | card->info.mcl_level[QETH_MCL_LENGTH] = 0; | |
2263 | } | |
2264 | break; | |
2265 | default: | |
2266 | memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); | |
2267 | } | |
2268 | if (card->info.portname_required) | |
2269 | qeth_print_status_with_portname(card); | |
2270 | else | |
2271 | qeth_print_status_no_portname(card); | |
2272 | } | |
2273 | EXPORT_SYMBOL_GPL(qeth_print_status_message); | |
2274 | ||
4a71df50 FB |
2275 | static void qeth_initialize_working_pool_list(struct qeth_card *card) |
2276 | { | |
2277 | struct qeth_buffer_pool_entry *entry; | |
2278 | ||
d11ba0c4 | 2279 | QETH_DBF_TEXT(TRACE, 5, "inwrklst"); |
4a71df50 FB |
2280 | |
2281 | list_for_each_entry(entry, | |
2282 | &card->qdio.init_pool.entry_list, init_list) { | |
2283 | qeth_put_buffer_pool_entry(card, entry); | |
2284 | } | |
2285 | } | |
2286 | ||
2287 | static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( | |
2288 | struct qeth_card *card) | |
2289 | { | |
2290 | struct list_head *plh; | |
2291 | struct qeth_buffer_pool_entry *entry; | |
2292 | int i, free; | |
2293 | struct page *page; | |
2294 | ||
2295 | if (list_empty(&card->qdio.in_buf_pool.entry_list)) | |
2296 | return NULL; | |
2297 | ||
2298 | list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { | |
2299 | entry = list_entry(plh, struct qeth_buffer_pool_entry, list); | |
2300 | free = 1; | |
2301 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { | |
2302 | if (page_count(virt_to_page(entry->elements[i])) > 1) { | |
2303 | free = 0; | |
2304 | break; | |
2305 | } | |
2306 | } | |
2307 | if (free) { | |
2308 | list_del_init(&entry->list); | |
2309 | return entry; | |
2310 | } | |
2311 | } | |
2312 | ||
2313 | /* no free buffer in pool so take first one and swap pages */ | |
2314 | entry = list_entry(card->qdio.in_buf_pool.entry_list.next, | |
2315 | struct qeth_buffer_pool_entry, list); | |
2316 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { | |
2317 | if (page_count(virt_to_page(entry->elements[i])) > 1) { | |
508b3c4f | 2318 | page = alloc_page(GFP_ATOMIC); |
4a71df50 FB |
2319 | if (!page) { |
2320 | return NULL; | |
2321 | } else { | |
2322 | free_page((unsigned long)entry->elements[i]); | |
2323 | entry->elements[i] = page_address(page); | |
2324 | if (card->options.performance_stats) | |
2325 | card->perf_stats.sg_alloc_page_rx++; | |
2326 | } | |
2327 | } | |
2328 | } | |
2329 | list_del_init(&entry->list); | |
2330 | return entry; | |
2331 | } | |
2332 | ||
2333 | static int qeth_init_input_buffer(struct qeth_card *card, | |
2334 | struct qeth_qdio_buffer *buf) | |
2335 | { | |
2336 | struct qeth_buffer_pool_entry *pool_entry; | |
2337 | int i; | |
2338 | ||
2339 | pool_entry = qeth_find_free_buffer_pool_entry(card); | |
2340 | if (!pool_entry) | |
2341 | return 1; | |
2342 | ||
2343 | /* | |
2344 | * since the buffer is accessed only from the input_tasklet | |
2345 | * there shouldn't be a need to synchronize; also, since we use | |
2346 | * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off | |
2347 | * buffers | |
2348 | */ | |
4a71df50 FB |
2349 | |
2350 | buf->pool_entry = pool_entry; | |
2351 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { | |
2352 | buf->buffer->element[i].length = PAGE_SIZE; | |
2353 | buf->buffer->element[i].addr = pool_entry->elements[i]; | |
2354 | if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) | |
2355 | buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY; | |
2356 | else | |
2357 | buf->buffer->element[i].flags = 0; | |
2358 | } | |
2359 | return 0; | |
2360 | } | |
2361 | ||
2362 | int qeth_init_qdio_queues(struct qeth_card *card) | |
2363 | { | |
2364 | int i, j; | |
2365 | int rc; | |
2366 | ||
d11ba0c4 | 2367 | QETH_DBF_TEXT(SETUP, 2, "initqdqs"); |
4a71df50 FB |
2368 | |
2369 | /* inbound queue */ | |
2370 | memset(card->qdio.in_q->qdio_bufs, 0, | |
2371 | QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); | |
2372 | qeth_initialize_working_pool_list(card); | |
2373 | /*give only as many buffers to hardware as we have buffer pool entries*/ | |
2374 | for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) | |
2375 | qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); | |
2376 | card->qdio.in_q->next_buf_to_init = | |
2377 | card->qdio.in_buf_pool.buf_count - 1; | |
2378 | rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, | |
779e6e1c | 2379 | card->qdio.in_buf_pool.buf_count - 1); |
4a71df50 | 2380 | if (rc) { |
d11ba0c4 | 2381 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); |
4a71df50 FB |
2382 | return rc; |
2383 | } | |
4a71df50 FB |
2384 | /* outbound queue */ |
2385 | for (i = 0; i < card->qdio.no_out_queues; ++i) { | |
2386 | memset(card->qdio.out_qs[i]->qdio_bufs, 0, | |
2387 | QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); | |
2388 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { | |
2389 | qeth_clear_output_buffer(card->qdio.out_qs[i], | |
2390 | &card->qdio.out_qs[i]->bufs[j]); | |
2391 | } | |
2392 | card->qdio.out_qs[i]->card = card; | |
2393 | card->qdio.out_qs[i]->next_buf_to_fill = 0; | |
2394 | card->qdio.out_qs[i]->do_pack = 0; | |
2395 | atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); | |
2396 | atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); | |
2397 | atomic_set(&card->qdio.out_qs[i]->state, | |
2398 | QETH_OUT_Q_UNLOCKED); | |
2399 | } | |
2400 | return 0; | |
2401 | } | |
2402 | EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); | |
2403 | ||
2404 | static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) | |
2405 | { | |
2406 | switch (link_type) { | |
2407 | case QETH_LINK_TYPE_HSTR: | |
2408 | return 2; | |
2409 | default: | |
2410 | return 1; | |
2411 | } | |
2412 | } | |
2413 | ||
2414 | static void qeth_fill_ipacmd_header(struct qeth_card *card, | |
2415 | struct qeth_ipa_cmd *cmd, __u8 command, | |
2416 | enum qeth_prot_versions prot) | |
2417 | { | |
2418 | memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); | |
2419 | cmd->hdr.command = command; | |
2420 | cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; | |
2421 | cmd->hdr.seqno = card->seqno.ipa; | |
2422 | cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); | |
2423 | cmd->hdr.rel_adapter_no = (__u8) card->info.portno; | |
2424 | if (card->options.layer2) | |
2425 | cmd->hdr.prim_version_no = 2; | |
2426 | else | |
2427 | cmd->hdr.prim_version_no = 1; | |
2428 | cmd->hdr.param_count = 1; | |
2429 | cmd->hdr.prot_version = prot; | |
2430 | cmd->hdr.ipa_supported = 0; | |
2431 | cmd->hdr.ipa_enabled = 0; | |
2432 | } | |
2433 | ||
2434 | struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, | |
2435 | enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) | |
2436 | { | |
2437 | struct qeth_cmd_buffer *iob; | |
2438 | struct qeth_ipa_cmd *cmd; | |
2439 | ||
2440 | iob = qeth_wait_for_buffer(&card->write); | |
2441 | cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); | |
2442 | qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); | |
2443 | ||
2444 | return iob; | |
2445 | } | |
2446 | EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); | |
2447 | ||
2448 | void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, | |
2449 | char prot_type) | |
2450 | { | |
2451 | memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); | |
2452 | memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); | |
2453 | memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), | |
2454 | &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); | |
2455 | } | |
2456 | EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); | |
2457 | ||
2458 | int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, | |
2459 | int (*reply_cb)(struct qeth_card *, struct qeth_reply*, | |
2460 | unsigned long), | |
2461 | void *reply_param) | |
2462 | { | |
2463 | int rc; | |
2464 | char prot_type; | |
4a71df50 | 2465 | |
d11ba0c4 | 2466 | QETH_DBF_TEXT(TRACE, 4, "sendipa"); |
4a71df50 FB |
2467 | |
2468 | if (card->options.layer2) | |
2469 | if (card->info.type == QETH_CARD_TYPE_OSN) | |
2470 | prot_type = QETH_PROT_OSN2; | |
2471 | else | |
2472 | prot_type = QETH_PROT_LAYER2; | |
2473 | else | |
2474 | prot_type = QETH_PROT_TCPIP; | |
2475 | qeth_prepare_ipa_cmd(card, iob, prot_type); | |
d11ba0c4 PT |
2476 | rc = qeth_send_control_data(card, IPA_CMD_LENGTH, |
2477 | iob, reply_cb, reply_param); | |
4a71df50 FB |
2478 | return rc; |
2479 | } | |
2480 | EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); | |
2481 | ||
2482 | static int qeth_send_startstoplan(struct qeth_card *card, | |
2483 | enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) | |
2484 | { | |
2485 | int rc; | |
2486 | struct qeth_cmd_buffer *iob; | |
2487 | ||
2488 | iob = qeth_get_ipacmd_buffer(card, ipacmd, prot); | |
2489 | rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); | |
2490 | ||
2491 | return rc; | |
2492 | } | |
2493 | ||
2494 | int qeth_send_startlan(struct qeth_card *card) | |
2495 | { | |
2496 | int rc; | |
2497 | ||
d11ba0c4 | 2498 | QETH_DBF_TEXT(SETUP, 2, "strtlan"); |
4a71df50 FB |
2499 | |
2500 | rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0); | |
2501 | return rc; | |
2502 | } | |
2503 | EXPORT_SYMBOL_GPL(qeth_send_startlan); | |
2504 | ||
2505 | int qeth_send_stoplan(struct qeth_card *card) | |
2506 | { | |
2507 | int rc = 0; | |
2508 | ||
2509 | /* | |
2510 | * TODO: according to the IPA format document page 14, | |
2511 | * TCP/IP (we!) never issue a STOPLAN | |
2512 | * is this right ?!? | |
2513 | */ | |
d11ba0c4 | 2514 | QETH_DBF_TEXT(SETUP, 2, "stoplan"); |
4a71df50 FB |
2515 | |
2516 | rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0); | |
2517 | return rc; | |
2518 | } | |
2519 | EXPORT_SYMBOL_GPL(qeth_send_stoplan); | |
2520 | ||
2521 | int qeth_default_setadapterparms_cb(struct qeth_card *card, | |
2522 | struct qeth_reply *reply, unsigned long data) | |
2523 | { | |
2524 | struct qeth_ipa_cmd *cmd; | |
2525 | ||
d11ba0c4 | 2526 | QETH_DBF_TEXT(TRACE, 4, "defadpcb"); |
4a71df50 FB |
2527 | |
2528 | cmd = (struct qeth_ipa_cmd *) data; | |
2529 | if (cmd->hdr.return_code == 0) | |
2530 | cmd->hdr.return_code = | |
2531 | cmd->data.setadapterparms.hdr.return_code; | |
2532 | return 0; | |
2533 | } | |
2534 | EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); | |
2535 | ||
2536 | static int qeth_query_setadapterparms_cb(struct qeth_card *card, | |
2537 | struct qeth_reply *reply, unsigned long data) | |
2538 | { | |
2539 | struct qeth_ipa_cmd *cmd; | |
2540 | ||
d11ba0c4 | 2541 | QETH_DBF_TEXT(TRACE, 3, "quyadpcb"); |
4a71df50 FB |
2542 | |
2543 | cmd = (struct qeth_ipa_cmd *) data; | |
2544 | if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) | |
2545 | card->info.link_type = | |
2546 | cmd->data.setadapterparms.data.query_cmds_supp.lan_type; | |
2547 | card->options.adp.supported_funcs = | |
2548 | cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; | |
2549 | return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); | |
2550 | } | |
2551 | ||
2552 | struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, | |
2553 | __u32 command, __u32 cmdlen) | |
2554 | { | |
2555 | struct qeth_cmd_buffer *iob; | |
2556 | struct qeth_ipa_cmd *cmd; | |
2557 | ||
2558 | iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, | |
2559 | QETH_PROT_IPV4); | |
2560 | cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); | |
2561 | cmd->data.setadapterparms.hdr.cmdlength = cmdlen; | |
2562 | cmd->data.setadapterparms.hdr.command_code = command; | |
2563 | cmd->data.setadapterparms.hdr.used_total = 1; | |
2564 | cmd->data.setadapterparms.hdr.seq_no = 1; | |
2565 | ||
2566 | return iob; | |
2567 | } | |
2568 | EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); | |
2569 | ||
2570 | int qeth_query_setadapterparms(struct qeth_card *card) | |
2571 | { | |
2572 | int rc; | |
2573 | struct qeth_cmd_buffer *iob; | |
2574 | ||
d11ba0c4 | 2575 | QETH_DBF_TEXT(TRACE, 3, "queryadp"); |
4a71df50 FB |
2576 | iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, |
2577 | sizeof(struct qeth_ipacmd_setadpparms)); | |
2578 | rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); | |
2579 | return rc; | |
2580 | } | |
2581 | EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); | |
2582 | ||
2583 | int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error, | |
779e6e1c | 2584 | const char *dbftext) |
4a71df50 | 2585 | { |
779e6e1c | 2586 | if (qdio_error) { |
d11ba0c4 PT |
2587 | QETH_DBF_TEXT(TRACE, 2, dbftext); |
2588 | QETH_DBF_TEXT(QERR, 2, dbftext); | |
2589 | QETH_DBF_TEXT_(QERR, 2, " F15=%02X", | |
4a71df50 | 2590 | buf->element[15].flags & 0xff); |
d11ba0c4 | 2591 | QETH_DBF_TEXT_(QERR, 2, " F14=%02X", |
4a71df50 | 2592 | buf->element[14].flags & 0xff); |
d11ba0c4 | 2593 | QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error); |
4a71df50 FB |
2594 | return 1; |
2595 | } | |
2596 | return 0; | |
2597 | } | |
2598 | EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); | |
2599 | ||
2600 | void qeth_queue_input_buffer(struct qeth_card *card, int index) | |
2601 | { | |
2602 | struct qeth_qdio_q *queue = card->qdio.in_q; | |
2603 | int count; | |
2604 | int i; | |
2605 | int rc; | |
2606 | int newcount = 0; | |
2607 | ||
4a71df50 FB |
2608 | count = (index < queue->next_buf_to_init)? |
2609 | card->qdio.in_buf_pool.buf_count - | |
2610 | (queue->next_buf_to_init - index) : | |
2611 | card->qdio.in_buf_pool.buf_count - | |
2612 | (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); | |
2613 | /* only requeue at a certain threshold to avoid SIGAs */ | |
2614 | if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { | |
2615 | for (i = queue->next_buf_to_init; | |
2616 | i < queue->next_buf_to_init + count; ++i) { | |
2617 | if (qeth_init_input_buffer(card, | |
2618 | &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { | |
2619 | break; | |
2620 | } else { | |
2621 | newcount++; | |
2622 | } | |
2623 | } | |
2624 | ||
2625 | if (newcount < count) { | |
2626 | /* we are in memory shortage so we switch back to | |
2627 | traditional skb allocation and drop packages */ | |
4a71df50 FB |
2628 | atomic_set(&card->force_alloc_skb, 3); |
2629 | count = newcount; | |
2630 | } else { | |
4a71df50 FB |
2631 | atomic_add_unless(&card->force_alloc_skb, -1, 0); |
2632 | } | |
2633 | ||
2634 | /* | |
2635 | * according to old code it should be avoided to requeue all | |
2636 | * 128 buffers in order to benefit from PCI avoidance. | |
2637 | * this function keeps at least one buffer (the buffer at | |
2638 | * 'index') un-requeued -> this buffer is the first buffer that | |
2639 | * will be requeued the next time | |
2640 | */ | |
2641 | if (card->options.performance_stats) { | |
2642 | card->perf_stats.inbound_do_qdio_cnt++; | |
2643 | card->perf_stats.inbound_do_qdio_start_time = | |
2644 | qeth_get_micros(); | |
2645 | } | |
779e6e1c JG |
2646 | rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, |
2647 | queue->next_buf_to_init, count); | |
4a71df50 FB |
2648 | if (card->options.performance_stats) |
2649 | card->perf_stats.inbound_do_qdio_time += | |
2650 | qeth_get_micros() - | |
2651 | card->perf_stats.inbound_do_qdio_start_time; | |
2652 | if (rc) { | |
74eacdb9 FB |
2653 | dev_warn(&card->gdev->dev, |
2654 | "QDIO reported an error, rc=%i\n", rc); | |
d11ba0c4 PT |
2655 | QETH_DBF_TEXT(TRACE, 2, "qinberr"); |
2656 | QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
2657 | } |
2658 | queue->next_buf_to_init = (queue->next_buf_to_init + count) % | |
2659 | QDIO_MAX_BUFFERS_PER_Q; | |
2660 | } | |
2661 | } | |
2662 | EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); | |
2663 | ||
2664 | static int qeth_handle_send_error(struct qeth_card *card, | |
779e6e1c | 2665 | struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) |
4a71df50 FB |
2666 | { |
2667 | int sbalf15 = buffer->buffer->element[15].flags & 0xff; | |
779e6e1c | 2668 | int cc = qdio_err & 3; |
4a71df50 | 2669 | |
d11ba0c4 | 2670 | QETH_DBF_TEXT(TRACE, 6, "hdsnderr"); |
779e6e1c | 2671 | qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr"); |
4a71df50 FB |
2672 | switch (cc) { |
2673 | case 0: | |
2674 | if (qdio_err) { | |
d11ba0c4 PT |
2675 | QETH_DBF_TEXT(TRACE, 1, "lnkfail"); |
2676 | QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); | |
2677 | QETH_DBF_TEXT_(TRACE, 1, "%04x %02x", | |
4a71df50 FB |
2678 | (u16)qdio_err, (u8)sbalf15); |
2679 | return QETH_SEND_ERROR_LINK_FAILURE; | |
2680 | } | |
2681 | return QETH_SEND_ERROR_NONE; | |
2682 | case 2: | |
779e6e1c | 2683 | if (qdio_err & QDIO_ERROR_SIGA_BUSY) { |
d11ba0c4 PT |
2684 | QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B"); |
2685 | QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
2686 | return QETH_SEND_ERROR_KICK_IT; |
2687 | } | |
2688 | if ((sbalf15 >= 15) && (sbalf15 <= 31)) | |
2689 | return QETH_SEND_ERROR_RETRY; | |
2690 | return QETH_SEND_ERROR_LINK_FAILURE; | |
2691 | /* look at qdio_error and sbalf 15 */ | |
2692 | case 1: | |
d11ba0c4 PT |
2693 | QETH_DBF_TEXT(TRACE, 1, "SIGAcc1"); |
2694 | QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
2695 | return QETH_SEND_ERROR_LINK_FAILURE; |
2696 | case 3: | |
2697 | default: | |
d11ba0c4 PT |
2698 | QETH_DBF_TEXT(TRACE, 1, "SIGAcc3"); |
2699 | QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
2700 | return QETH_SEND_ERROR_KICK_IT; |
2701 | } | |
2702 | } | |
2703 | ||
2704 | /* | |
2705 | * Switched to packing state if the number of used buffers on a queue | |
2706 | * reaches a certain limit. | |
2707 | */ | |
2708 | static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) | |
2709 | { | |
2710 | if (!queue->do_pack) { | |
2711 | if (atomic_read(&queue->used_buffers) | |
2712 | >= QETH_HIGH_WATERMARK_PACK){ | |
2713 | /* switch non-PACKING -> PACKING */ | |
d11ba0c4 | 2714 | QETH_DBF_TEXT(TRACE, 6, "np->pack"); |
4a71df50 FB |
2715 | if (queue->card->options.performance_stats) |
2716 | queue->card->perf_stats.sc_dp_p++; | |
2717 | queue->do_pack = 1; | |
2718 | } | |
2719 | } | |
2720 | } | |
2721 | ||
2722 | /* | |
2723 | * Switches from packing to non-packing mode. If there is a packing | |
2724 | * buffer on the queue this buffer will be prepared to be flushed. | |
2725 | * In that case 1 is returned to inform the caller. If no buffer | |
2726 | * has to be flushed, zero is returned. | |
2727 | */ | |
2728 | static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) | |
2729 | { | |
2730 | struct qeth_qdio_out_buffer *buffer; | |
2731 | int flush_count = 0; | |
2732 | ||
2733 | if (queue->do_pack) { | |
2734 | if (atomic_read(&queue->used_buffers) | |
2735 | <= QETH_LOW_WATERMARK_PACK) { | |
2736 | /* switch PACKING -> non-PACKING */ | |
d11ba0c4 | 2737 | QETH_DBF_TEXT(TRACE, 6, "pack->np"); |
4a71df50 FB |
2738 | if (queue->card->options.performance_stats) |
2739 | queue->card->perf_stats.sc_p_dp++; | |
2740 | queue->do_pack = 0; | |
2741 | /* flush packing buffers */ | |
2742 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
2743 | if ((atomic_read(&buffer->state) == | |
2744 | QETH_QDIO_BUF_EMPTY) && | |
2745 | (buffer->next_element_to_fill > 0)) { | |
2746 | atomic_set(&buffer->state, | |
2747 | QETH_QDIO_BUF_PRIMED); | |
2748 | flush_count++; | |
2749 | queue->next_buf_to_fill = | |
2750 | (queue->next_buf_to_fill + 1) % | |
2751 | QDIO_MAX_BUFFERS_PER_Q; | |
2752 | } | |
2753 | } | |
2754 | } | |
2755 | return flush_count; | |
2756 | } | |
2757 | ||
2758 | /* | |
2759 | * Called to flush a packing buffer if no more pci flags are on the queue. | |
2760 | * Checks if there is a packing buffer and prepares it to be flushed. | |
2761 | * In that case returns 1, otherwise zero. | |
2762 | */ | |
2763 | static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) | |
2764 | { | |
2765 | struct qeth_qdio_out_buffer *buffer; | |
2766 | ||
2767 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
2768 | if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && | |
2769 | (buffer->next_element_to_fill > 0)) { | |
2770 | /* it's a packing buffer */ | |
2771 | atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); | |
2772 | queue->next_buf_to_fill = | |
2773 | (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; | |
2774 | return 1; | |
2775 | } | |
2776 | return 0; | |
2777 | } | |
2778 | ||
779e6e1c JG |
2779 | static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, |
2780 | int count) | |
4a71df50 FB |
2781 | { |
2782 | struct qeth_qdio_out_buffer *buf; | |
2783 | int rc; | |
2784 | int i; | |
2785 | unsigned int qdio_flags; | |
2786 | ||
4a71df50 FB |
2787 | for (i = index; i < index + count; ++i) { |
2788 | buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; | |
2789 | buf->buffer->element[buf->next_element_to_fill - 1].flags |= | |
2790 | SBAL_FLAGS_LAST_ENTRY; | |
2791 | ||
2792 | if (queue->card->info.type == QETH_CARD_TYPE_IQD) | |
2793 | continue; | |
2794 | ||
2795 | if (!queue->do_pack) { | |
2796 | if ((atomic_read(&queue->used_buffers) >= | |
2797 | (QETH_HIGH_WATERMARK_PACK - | |
2798 | QETH_WATERMARK_PACK_FUZZ)) && | |
2799 | !atomic_read(&queue->set_pci_flags_count)) { | |
2800 | /* it's likely that we'll go to packing | |
2801 | * mode soon */ | |
2802 | atomic_inc(&queue->set_pci_flags_count); | |
2803 | buf->buffer->element[0].flags |= 0x40; | |
2804 | } | |
2805 | } else { | |
2806 | if (!atomic_read(&queue->set_pci_flags_count)) { | |
2807 | /* | |
2808 | * there's no outstanding PCI any more, so we | |
2809 | * have to request a PCI to be sure the the PCI | |
2810 | * will wake at some time in the future then we | |
2811 | * can flush packed buffers that might still be | |
2812 | * hanging around, which can happen if no | |
2813 | * further send was requested by the stack | |
2814 | */ | |
2815 | atomic_inc(&queue->set_pci_flags_count); | |
2816 | buf->buffer->element[0].flags |= 0x40; | |
2817 | } | |
2818 | } | |
2819 | } | |
2820 | ||
2821 | queue->card->dev->trans_start = jiffies; | |
2822 | if (queue->card->options.performance_stats) { | |
2823 | queue->card->perf_stats.outbound_do_qdio_cnt++; | |
2824 | queue->card->perf_stats.outbound_do_qdio_start_time = | |
2825 | qeth_get_micros(); | |
2826 | } | |
2827 | qdio_flags = QDIO_FLAG_SYNC_OUTPUT; | |
4a71df50 FB |
2828 | if (atomic_read(&queue->set_pci_flags_count)) |
2829 | qdio_flags |= QDIO_FLAG_PCI_OUT; | |
2830 | rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, | |
779e6e1c | 2831 | queue->queue_no, index, count); |
4a71df50 FB |
2832 | if (queue->card->options.performance_stats) |
2833 | queue->card->perf_stats.outbound_do_qdio_time += | |
2834 | qeth_get_micros() - | |
2835 | queue->card->perf_stats.outbound_do_qdio_start_time; | |
2836 | if (rc) { | |
d11ba0c4 PT |
2837 | QETH_DBF_TEXT(TRACE, 2, "flushbuf"); |
2838 | QETH_DBF_TEXT_(TRACE, 2, " err%d", rc); | |
2839 | QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card)); | |
4a71df50 FB |
2840 | queue->card->stats.tx_errors += count; |
2841 | /* this must not happen under normal circumstances. if it | |
2842 | * happens something is really wrong -> recover */ | |
2843 | qeth_schedule_recovery(queue->card); | |
2844 | return; | |
2845 | } | |
2846 | atomic_add(count, &queue->used_buffers); | |
2847 | if (queue->card->options.performance_stats) | |
2848 | queue->card->perf_stats.bufs_sent += count; | |
2849 | } | |
2850 | ||
2851 | static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) | |
2852 | { | |
2853 | int index; | |
2854 | int flush_cnt = 0; | |
2855 | int q_was_packing = 0; | |
2856 | ||
2857 | /* | |
2858 | * check if weed have to switch to non-packing mode or if | |
2859 | * we have to get a pci flag out on the queue | |
2860 | */ | |
2861 | if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || | |
2862 | !atomic_read(&queue->set_pci_flags_count)) { | |
2863 | if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == | |
2864 | QETH_OUT_Q_UNLOCKED) { | |
2865 | /* | |
2866 | * If we get in here, there was no action in | |
2867 | * do_send_packet. So, we check if there is a | |
2868 | * packing buffer to be flushed here. | |
2869 | */ | |
2870 | netif_stop_queue(queue->card->dev); | |
2871 | index = queue->next_buf_to_fill; | |
2872 | q_was_packing = queue->do_pack; | |
2873 | /* queue->do_pack may change */ | |
2874 | barrier(); | |
2875 | flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); | |
2876 | if (!flush_cnt && | |
2877 | !atomic_read(&queue->set_pci_flags_count)) | |
2878 | flush_cnt += | |
2879 | qeth_flush_buffers_on_no_pci(queue); | |
2880 | if (queue->card->options.performance_stats && | |
2881 | q_was_packing) | |
2882 | queue->card->perf_stats.bufs_sent_pack += | |
2883 | flush_cnt; | |
2884 | if (flush_cnt) | |
779e6e1c | 2885 | qeth_flush_buffers(queue, index, flush_cnt); |
4a71df50 FB |
2886 | atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); |
2887 | } | |
2888 | } | |
2889 | } | |
2890 | ||
779e6e1c JG |
2891 | void qeth_qdio_output_handler(struct ccw_device *ccwdev, |
2892 | unsigned int qdio_error, int __queue, int first_element, | |
2893 | int count, unsigned long card_ptr) | |
4a71df50 FB |
2894 | { |
2895 | struct qeth_card *card = (struct qeth_card *) card_ptr; | |
2896 | struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; | |
2897 | struct qeth_qdio_out_buffer *buffer; | |
2898 | int i; | |
2899 | ||
d11ba0c4 | 2900 | QETH_DBF_TEXT(TRACE, 6, "qdouhdl"); |
779e6e1c JG |
2901 | if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { |
2902 | QETH_DBF_TEXT(TRACE, 2, "achkcond"); | |
2903 | QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); | |
2904 | netif_stop_queue(card->dev); | |
2905 | qeth_schedule_recovery(card); | |
2906 | return; | |
4a71df50 FB |
2907 | } |
2908 | if (card->options.performance_stats) { | |
2909 | card->perf_stats.outbound_handler_cnt++; | |
2910 | card->perf_stats.outbound_handler_start_time = | |
2911 | qeth_get_micros(); | |
2912 | } | |
2913 | for (i = first_element; i < (first_element + count); ++i) { | |
2914 | buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; | |
2915 | /*we only handle the KICK_IT error by doing a recovery */ | |
779e6e1c | 2916 | if (qeth_handle_send_error(card, buffer, qdio_error) |
4a71df50 FB |
2917 | == QETH_SEND_ERROR_KICK_IT){ |
2918 | netif_stop_queue(card->dev); | |
2919 | qeth_schedule_recovery(card); | |
2920 | return; | |
2921 | } | |
2922 | qeth_clear_output_buffer(queue, buffer); | |
2923 | } | |
2924 | atomic_sub(count, &queue->used_buffers); | |
2925 | /* check if we need to do something on this outbound queue */ | |
2926 | if (card->info.type != QETH_CARD_TYPE_IQD) | |
2927 | qeth_check_outbound_queue(queue); | |
2928 | ||
2929 | netif_wake_queue(queue->card->dev); | |
2930 | if (card->options.performance_stats) | |
2931 | card->perf_stats.outbound_handler_time += qeth_get_micros() - | |
2932 | card->perf_stats.outbound_handler_start_time; | |
2933 | } | |
2934 | EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); | |
2935 | ||
2936 | int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb) | |
2937 | { | |
2938 | int cast_type = RTN_UNSPEC; | |
2939 | ||
2940 | if (card->info.type == QETH_CARD_TYPE_OSN) | |
2941 | return cast_type; | |
2942 | ||
2943 | if (skb->dst && skb->dst->neighbour) { | |
2944 | cast_type = skb->dst->neighbour->type; | |
2945 | if ((cast_type == RTN_BROADCAST) || | |
2946 | (cast_type == RTN_MULTICAST) || | |
2947 | (cast_type == RTN_ANYCAST)) | |
2948 | return cast_type; | |
2949 | else | |
2950 | return RTN_UNSPEC; | |
2951 | } | |
2952 | /* try something else */ | |
2953 | if (skb->protocol == ETH_P_IPV6) | |
2954 | return (skb_network_header(skb)[24] == 0xff) ? | |
2955 | RTN_MULTICAST : 0; | |
2956 | else if (skb->protocol == ETH_P_IP) | |
2957 | return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ? | |
2958 | RTN_MULTICAST : 0; | |
2959 | /* ... */ | |
2960 | if (!memcmp(skb->data, skb->dev->broadcast, 6)) | |
2961 | return RTN_BROADCAST; | |
2962 | else { | |
2963 | u16 hdr_mac; | |
2964 | ||
2965 | hdr_mac = *((u16 *)skb->data); | |
2966 | /* tr multicast? */ | |
2967 | switch (card->info.link_type) { | |
2968 | case QETH_LINK_TYPE_HSTR: | |
2969 | case QETH_LINK_TYPE_LANE_TR: | |
2970 | if ((hdr_mac == QETH_TR_MAC_NC) || | |
2971 | (hdr_mac == QETH_TR_MAC_C)) | |
2972 | return RTN_MULTICAST; | |
2973 | break; | |
2974 | /* eth or so multicast? */ | |
2975 | default: | |
2976 | if ((hdr_mac == QETH_ETH_MAC_V4) || | |
2977 | (hdr_mac == QETH_ETH_MAC_V6)) | |
2978 | return RTN_MULTICAST; | |
2979 | } | |
2980 | } | |
2981 | return cast_type; | |
2982 | } | |
2983 | EXPORT_SYMBOL_GPL(qeth_get_cast_type); | |
2984 | ||
2985 | int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, | |
2986 | int ipv, int cast_type) | |
2987 | { | |
2988 | if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE)) | |
2989 | return card->qdio.default_out_queue; | |
2990 | switch (card->qdio.no_out_queues) { | |
2991 | case 4: | |
2992 | if (cast_type && card->info.is_multicast_different) | |
2993 | return card->info.is_multicast_different & | |
2994 | (card->qdio.no_out_queues - 1); | |
2995 | if (card->qdio.do_prio_queueing && (ipv == 4)) { | |
2996 | const u8 tos = ip_hdr(skb)->tos; | |
2997 | ||
2998 | if (card->qdio.do_prio_queueing == | |
2999 | QETH_PRIO_Q_ING_TOS) { | |
3000 | if (tos & IP_TOS_NOTIMPORTANT) | |
3001 | return 3; | |
3002 | if (tos & IP_TOS_HIGHRELIABILITY) | |
3003 | return 2; | |
3004 | if (tos & IP_TOS_HIGHTHROUGHPUT) | |
3005 | return 1; | |
3006 | if (tos & IP_TOS_LOWDELAY) | |
3007 | return 0; | |
3008 | } | |
3009 | if (card->qdio.do_prio_queueing == | |
3010 | QETH_PRIO_Q_ING_PREC) | |
3011 | return 3 - (tos >> 6); | |
3012 | } else if (card->qdio.do_prio_queueing && (ipv == 6)) { | |
3013 | /* TODO: IPv6!!! */ | |
3014 | } | |
3015 | return card->qdio.default_out_queue; | |
3016 | case 1: /* fallthrough for single-out-queue 1920-device */ | |
3017 | default: | |
3018 | return card->qdio.default_out_queue; | |
3019 | } | |
3020 | } | |
3021 | EXPORT_SYMBOL_GPL(qeth_get_priority_queue); | |
3022 | ||
4a71df50 FB |
3023 | int qeth_get_elements_no(struct qeth_card *card, void *hdr, |
3024 | struct sk_buff *skb, int elems) | |
3025 | { | |
3026 | int elements_needed = 0; | |
3027 | ||
3028 | if (skb_shinfo(skb)->nr_frags > 0) | |
3029 | elements_needed = (skb_shinfo(skb)->nr_frags + 1); | |
3030 | if (elements_needed == 0) | |
683d718a FB |
3031 | elements_needed = 1 + (((((unsigned long) skb->data) % |
3032 | PAGE_SIZE) + skb->len) >> PAGE_SHIFT); | |
4a71df50 | 3033 | if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { |
14cc21b6 | 3034 | QETH_DBF_MESSAGE(2, "Invalid size of IP packet " |
4a71df50 FB |
3035 | "(Number=%d / Length=%d). Discarded.\n", |
3036 | (elements_needed+elems), skb->len); | |
3037 | return 0; | |
3038 | } | |
3039 | return elements_needed; | |
3040 | } | |
3041 | EXPORT_SYMBOL_GPL(qeth_get_elements_no); | |
3042 | ||
f90b744e | 3043 | static inline void __qeth_fill_buffer(struct sk_buff *skb, |
683d718a FB |
3044 | struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, |
3045 | int offset) | |
4a71df50 | 3046 | { |
e1f03ae8 | 3047 | int length = skb->len; |
4a71df50 FB |
3048 | int length_here; |
3049 | int element; | |
3050 | char *data; | |
3051 | int first_lap ; | |
3052 | ||
3053 | element = *next_element_to_fill; | |
3054 | data = skb->data; | |
3055 | first_lap = (is_tso == 0 ? 1 : 0); | |
3056 | ||
683d718a FB |
3057 | if (offset >= 0) { |
3058 | data = skb->data + offset; | |
e1f03ae8 | 3059 | length -= offset; |
683d718a FB |
3060 | first_lap = 0; |
3061 | } | |
3062 | ||
4a71df50 FB |
3063 | while (length > 0) { |
3064 | /* length_here is the remaining amount of data in this page */ | |
3065 | length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); | |
3066 | if (length < length_here) | |
3067 | length_here = length; | |
3068 | ||
3069 | buffer->element[element].addr = data; | |
3070 | buffer->element[element].length = length_here; | |
3071 | length -= length_here; | |
3072 | if (!length) { | |
3073 | if (first_lap) | |
3074 | buffer->element[element].flags = 0; | |
3075 | else | |
3076 | buffer->element[element].flags = | |
3077 | SBAL_FLAGS_LAST_FRAG; | |
3078 | } else { | |
3079 | if (first_lap) | |
3080 | buffer->element[element].flags = | |
3081 | SBAL_FLAGS_FIRST_FRAG; | |
3082 | else | |
3083 | buffer->element[element].flags = | |
3084 | SBAL_FLAGS_MIDDLE_FRAG; | |
3085 | } | |
3086 | data += length_here; | |
3087 | element++; | |
3088 | first_lap = 0; | |
3089 | } | |
3090 | *next_element_to_fill = element; | |
3091 | } | |
3092 | ||
f90b744e | 3093 | static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, |
683d718a FB |
3094 | struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, |
3095 | struct qeth_hdr *hdr, int offset, int hd_len) | |
4a71df50 FB |
3096 | { |
3097 | struct qdio_buffer *buffer; | |
4a71df50 FB |
3098 | int flush_cnt = 0, hdr_len, large_send = 0; |
3099 | ||
4a71df50 FB |
3100 | buffer = buf->buffer; |
3101 | atomic_inc(&skb->users); | |
3102 | skb_queue_tail(&buf->skb_list, skb); | |
3103 | ||
4a71df50 | 3104 | /*check first on TSO ....*/ |
683d718a | 3105 | if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { |
4a71df50 FB |
3106 | int element = buf->next_element_to_fill; |
3107 | ||
683d718a FB |
3108 | hdr_len = sizeof(struct qeth_hdr_tso) + |
3109 | ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; | |
4a71df50 FB |
3110 | /*fill first buffer entry only with header information */ |
3111 | buffer->element[element].addr = skb->data; | |
3112 | buffer->element[element].length = hdr_len; | |
3113 | buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; | |
3114 | buf->next_element_to_fill++; | |
3115 | skb->data += hdr_len; | |
3116 | skb->len -= hdr_len; | |
3117 | large_send = 1; | |
3118 | } | |
683d718a FB |
3119 | |
3120 | if (offset >= 0) { | |
3121 | int element = buf->next_element_to_fill; | |
3122 | buffer->element[element].addr = hdr; | |
3123 | buffer->element[element].length = sizeof(struct qeth_hdr) + | |
3124 | hd_len; | |
3125 | buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; | |
3126 | buf->is_header[element] = 1; | |
3127 | buf->next_element_to_fill++; | |
3128 | } | |
3129 | ||
4a71df50 FB |
3130 | if (skb_shinfo(skb)->nr_frags == 0) |
3131 | __qeth_fill_buffer(skb, buffer, large_send, | |
683d718a | 3132 | (int *)&buf->next_element_to_fill, offset); |
4a71df50 FB |
3133 | else |
3134 | __qeth_fill_buffer_frag(skb, buffer, large_send, | |
3135 | (int *)&buf->next_element_to_fill); | |
3136 | ||
3137 | if (!queue->do_pack) { | |
d11ba0c4 | 3138 | QETH_DBF_TEXT(TRACE, 6, "fillbfnp"); |
4a71df50 FB |
3139 | /* set state to PRIMED -> will be flushed */ |
3140 | atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); | |
3141 | flush_cnt = 1; | |
3142 | } else { | |
d11ba0c4 | 3143 | QETH_DBF_TEXT(TRACE, 6, "fillbfpa"); |
4a71df50 FB |
3144 | if (queue->card->options.performance_stats) |
3145 | queue->card->perf_stats.skbs_sent_pack++; | |
3146 | if (buf->next_element_to_fill >= | |
3147 | QETH_MAX_BUFFER_ELEMENTS(queue->card)) { | |
3148 | /* | |
3149 | * packed buffer if full -> set state PRIMED | |
3150 | * -> will be flushed | |
3151 | */ | |
3152 | atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); | |
3153 | flush_cnt = 1; | |
3154 | } | |
3155 | } | |
3156 | return flush_cnt; | |
3157 | } | |
3158 | ||
3159 | int qeth_do_send_packet_fast(struct qeth_card *card, | |
3160 | struct qeth_qdio_out_q *queue, struct sk_buff *skb, | |
3161 | struct qeth_hdr *hdr, int elements_needed, | |
683d718a | 3162 | struct qeth_eddp_context *ctx, int offset, int hd_len) |
4a71df50 FB |
3163 | { |
3164 | struct qeth_qdio_out_buffer *buffer; | |
3165 | int buffers_needed = 0; | |
3166 | int flush_cnt = 0; | |
3167 | int index; | |
3168 | ||
4a71df50 FB |
3169 | /* spin until we get the queue ... */ |
3170 | while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, | |
3171 | QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); | |
3172 | /* ... now we've got the queue */ | |
3173 | index = queue->next_buf_to_fill; | |
3174 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
3175 | /* | |
3176 | * check if buffer is empty to make sure that we do not 'overtake' | |
3177 | * ourselves and try to fill a buffer that is already primed | |
3178 | */ | |
3179 | if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) | |
3180 | goto out; | |
3181 | if (ctx == NULL) | |
3182 | queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % | |
3183 | QDIO_MAX_BUFFERS_PER_Q; | |
3184 | else { | |
3185 | buffers_needed = qeth_eddp_check_buffers_for_context(queue, | |
3186 | ctx); | |
3187 | if (buffers_needed < 0) | |
3188 | goto out; | |
3189 | queue->next_buf_to_fill = | |
3190 | (queue->next_buf_to_fill + buffers_needed) % | |
3191 | QDIO_MAX_BUFFERS_PER_Q; | |
3192 | } | |
3193 | atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); | |
3194 | if (ctx == NULL) { | |
683d718a | 3195 | qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); |
779e6e1c | 3196 | qeth_flush_buffers(queue, index, 1); |
4a71df50 FB |
3197 | } else { |
3198 | flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index); | |
3199 | WARN_ON(buffers_needed != flush_cnt); | |
779e6e1c | 3200 | qeth_flush_buffers(queue, index, flush_cnt); |
4a71df50 FB |
3201 | } |
3202 | return 0; | |
3203 | out: | |
3204 | atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); | |
3205 | return -EBUSY; | |
3206 | } | |
3207 | EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); | |
3208 | ||
3209 | int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, | |
3210 | struct sk_buff *skb, struct qeth_hdr *hdr, | |
3211 | int elements_needed, struct qeth_eddp_context *ctx) | |
3212 | { | |
3213 | struct qeth_qdio_out_buffer *buffer; | |
3214 | int start_index; | |
3215 | int flush_count = 0; | |
3216 | int do_pack = 0; | |
3217 | int tmp; | |
3218 | int rc = 0; | |
3219 | ||
4a71df50 FB |
3220 | /* spin until we get the queue ... */ |
3221 | while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, | |
3222 | QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); | |
3223 | start_index = queue->next_buf_to_fill; | |
3224 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
3225 | /* | |
3226 | * check if buffer is empty to make sure that we do not 'overtake' | |
3227 | * ourselves and try to fill a buffer that is already primed | |
3228 | */ | |
3229 | if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { | |
3230 | atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); | |
3231 | return -EBUSY; | |
3232 | } | |
3233 | /* check if we need to switch packing state of this queue */ | |
3234 | qeth_switch_to_packing_if_needed(queue); | |
3235 | if (queue->do_pack) { | |
3236 | do_pack = 1; | |
3237 | if (ctx == NULL) { | |
3238 | /* does packet fit in current buffer? */ | |
3239 | if ((QETH_MAX_BUFFER_ELEMENTS(card) - | |
3240 | buffer->next_element_to_fill) < elements_needed) { | |
3241 | /* ... no -> set state PRIMED */ | |
3242 | atomic_set(&buffer->state, | |
3243 | QETH_QDIO_BUF_PRIMED); | |
3244 | flush_count++; | |
3245 | queue->next_buf_to_fill = | |
3246 | (queue->next_buf_to_fill + 1) % | |
3247 | QDIO_MAX_BUFFERS_PER_Q; | |
3248 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
3249 | /* we did a step forward, so check buffer state | |
3250 | * again */ | |
3251 | if (atomic_read(&buffer->state) != | |
3252 | QETH_QDIO_BUF_EMPTY){ | |
779e6e1c JG |
3253 | qeth_flush_buffers(queue, start_index, |
3254 | flush_count); | |
4a71df50 FB |
3255 | atomic_set(&queue->state, |
3256 | QETH_OUT_Q_UNLOCKED); | |
3257 | return -EBUSY; | |
3258 | } | |
3259 | } | |
3260 | } else { | |
3261 | /* check if we have enough elements (including following | |
3262 | * free buffers) to handle eddp context */ | |
3263 | if (qeth_eddp_check_buffers_for_context(queue, ctx) | |
3264 | < 0) { | |
4a71df50 FB |
3265 | rc = -EBUSY; |
3266 | goto out; | |
3267 | } | |
3268 | } | |
3269 | } | |
3270 | if (ctx == NULL) | |
683d718a | 3271 | tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); |
4a71df50 FB |
3272 | else { |
3273 | tmp = qeth_eddp_fill_buffer(queue, ctx, | |
3274 | queue->next_buf_to_fill); | |
3275 | if (tmp < 0) { | |
4a71df50 FB |
3276 | rc = -EBUSY; |
3277 | goto out; | |
3278 | } | |
3279 | } | |
3280 | queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % | |
3281 | QDIO_MAX_BUFFERS_PER_Q; | |
3282 | flush_count += tmp; | |
3283 | out: | |
3284 | if (flush_count) | |
779e6e1c | 3285 | qeth_flush_buffers(queue, start_index, flush_count); |
4a71df50 FB |
3286 | else if (!atomic_read(&queue->set_pci_flags_count)) |
3287 | atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); | |
3288 | /* | |
3289 | * queue->state will go from LOCKED -> UNLOCKED or from | |
3290 | * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us | |
3291 | * (switch packing state or flush buffer to get another pci flag out). | |
3292 | * In that case we will enter this loop | |
3293 | */ | |
3294 | while (atomic_dec_return(&queue->state)) { | |
3295 | flush_count = 0; | |
3296 | start_index = queue->next_buf_to_fill; | |
3297 | /* check if we can go back to non-packing state */ | |
3298 | flush_count += qeth_switch_to_nonpacking_if_needed(queue); | |
3299 | /* | |
3300 | * check if we need to flush a packing buffer to get a pci | |
3301 | * flag out on the queue | |
3302 | */ | |
3303 | if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) | |
3304 | flush_count += qeth_flush_buffers_on_no_pci(queue); | |
3305 | if (flush_count) | |
779e6e1c | 3306 | qeth_flush_buffers(queue, start_index, flush_count); |
4a71df50 FB |
3307 | } |
3308 | /* at this point the queue is UNLOCKED again */ | |
3309 | if (queue->card->options.performance_stats && do_pack) | |
3310 | queue->card->perf_stats.bufs_sent_pack += flush_count; | |
3311 | ||
3312 | return rc; | |
3313 | } | |
3314 | EXPORT_SYMBOL_GPL(qeth_do_send_packet); | |
3315 | ||
3316 | static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, | |
3317 | struct qeth_reply *reply, unsigned long data) | |
3318 | { | |
3319 | struct qeth_ipa_cmd *cmd; | |
3320 | struct qeth_ipacmd_setadpparms *setparms; | |
3321 | ||
d11ba0c4 | 3322 | QETH_DBF_TEXT(TRACE, 4, "prmadpcb"); |
4a71df50 FB |
3323 | |
3324 | cmd = (struct qeth_ipa_cmd *) data; | |
3325 | setparms = &(cmd->data.setadapterparms); | |
3326 | ||
3327 | qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); | |
3328 | if (cmd->hdr.return_code) { | |
d11ba0c4 | 3329 | QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code); |
4a71df50 FB |
3330 | setparms->data.mode = SET_PROMISC_MODE_OFF; |
3331 | } | |
3332 | card->info.promisc_mode = setparms->data.mode; | |
3333 | return 0; | |
3334 | } | |
3335 | ||
3336 | void qeth_setadp_promisc_mode(struct qeth_card *card) | |
3337 | { | |
3338 | enum qeth_ipa_promisc_modes mode; | |
3339 | struct net_device *dev = card->dev; | |
3340 | struct qeth_cmd_buffer *iob; | |
3341 | struct qeth_ipa_cmd *cmd; | |
3342 | ||
d11ba0c4 | 3343 | QETH_DBF_TEXT(TRACE, 4, "setprom"); |
4a71df50 FB |
3344 | |
3345 | if (((dev->flags & IFF_PROMISC) && | |
3346 | (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || | |
3347 | (!(dev->flags & IFF_PROMISC) && | |
3348 | (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) | |
3349 | return; | |
3350 | mode = SET_PROMISC_MODE_OFF; | |
3351 | if (dev->flags & IFF_PROMISC) | |
3352 | mode = SET_PROMISC_MODE_ON; | |
d11ba0c4 | 3353 | QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode); |
4a71df50 FB |
3354 | |
3355 | iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, | |
3356 | sizeof(struct qeth_ipacmd_setadpparms)); | |
3357 | cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); | |
3358 | cmd->data.setadapterparms.data.mode = mode; | |
3359 | qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); | |
3360 | } | |
3361 | EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); | |
3362 | ||
3363 | int qeth_change_mtu(struct net_device *dev, int new_mtu) | |
3364 | { | |
3365 | struct qeth_card *card; | |
3366 | char dbf_text[15]; | |
3367 | ||
509e2562 | 3368 | card = dev->ml_priv; |
4a71df50 | 3369 | |
d11ba0c4 | 3370 | QETH_DBF_TEXT(TRACE, 4, "chgmtu"); |
4a71df50 | 3371 | sprintf(dbf_text, "%8x", new_mtu); |
d11ba0c4 | 3372 | QETH_DBF_TEXT(TRACE, 4, dbf_text); |
4a71df50 FB |
3373 | |
3374 | if (new_mtu < 64) | |
3375 | return -EINVAL; | |
3376 | if (new_mtu > 65535) | |
3377 | return -EINVAL; | |
3378 | if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && | |
3379 | (!qeth_mtu_is_valid(card, new_mtu))) | |
3380 | return -EINVAL; | |
3381 | dev->mtu = new_mtu; | |
3382 | return 0; | |
3383 | } | |
3384 | EXPORT_SYMBOL_GPL(qeth_change_mtu); | |
3385 | ||
3386 | struct net_device_stats *qeth_get_stats(struct net_device *dev) | |
3387 | { | |
3388 | struct qeth_card *card; | |
3389 | ||
509e2562 | 3390 | card = dev->ml_priv; |
4a71df50 | 3391 | |
d11ba0c4 | 3392 | QETH_DBF_TEXT(TRACE, 5, "getstat"); |
4a71df50 FB |
3393 | |
3394 | return &card->stats; | |
3395 | } | |
3396 | EXPORT_SYMBOL_GPL(qeth_get_stats); | |
3397 | ||
3398 | static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, | |
3399 | struct qeth_reply *reply, unsigned long data) | |
3400 | { | |
3401 | struct qeth_ipa_cmd *cmd; | |
3402 | ||
d11ba0c4 | 3403 | QETH_DBF_TEXT(TRACE, 4, "chgmaccb"); |
4a71df50 FB |
3404 | |
3405 | cmd = (struct qeth_ipa_cmd *) data; | |
3406 | if (!card->options.layer2 || | |
3407 | !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { | |
3408 | memcpy(card->dev->dev_addr, | |
3409 | &cmd->data.setadapterparms.data.change_addr.addr, | |
3410 | OSA_ADDR_LEN); | |
3411 | card->info.mac_bits |= QETH_LAYER2_MAC_READ; | |
3412 | } | |
3413 | qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); | |
3414 | return 0; | |
3415 | } | |
3416 | ||
3417 | int qeth_setadpparms_change_macaddr(struct qeth_card *card) | |
3418 | { | |
3419 | int rc; | |
3420 | struct qeth_cmd_buffer *iob; | |
3421 | struct qeth_ipa_cmd *cmd; | |
3422 | ||
d11ba0c4 | 3423 | QETH_DBF_TEXT(TRACE, 4, "chgmac"); |
4a71df50 FB |
3424 | |
3425 | iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, | |
3426 | sizeof(struct qeth_ipacmd_setadpparms)); | |
3427 | cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); | |
3428 | cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; | |
3429 | cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; | |
3430 | memcpy(&cmd->data.setadapterparms.data.change_addr.addr, | |
3431 | card->dev->dev_addr, OSA_ADDR_LEN); | |
3432 | rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, | |
3433 | NULL); | |
3434 | return rc; | |
3435 | } | |
3436 | EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); | |
3437 | ||
3438 | void qeth_tx_timeout(struct net_device *dev) | |
3439 | { | |
3440 | struct qeth_card *card; | |
3441 | ||
509e2562 | 3442 | card = dev->ml_priv; |
4a71df50 FB |
3443 | card->stats.tx_errors++; |
3444 | qeth_schedule_recovery(card); | |
3445 | } | |
3446 | EXPORT_SYMBOL_GPL(qeth_tx_timeout); | |
3447 | ||
3448 | int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) | |
3449 | { | |
509e2562 | 3450 | struct qeth_card *card = dev->ml_priv; |
4a71df50 FB |
3451 | int rc = 0; |
3452 | ||
3453 | switch (regnum) { | |
3454 | case MII_BMCR: /* Basic mode control register */ | |
3455 | rc = BMCR_FULLDPLX; | |
3456 | if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && | |
3457 | (card->info.link_type != QETH_LINK_TYPE_OSN) && | |
3458 | (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) | |
3459 | rc |= BMCR_SPEED100; | |
3460 | break; | |
3461 | case MII_BMSR: /* Basic mode status register */ | |
3462 | rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | | |
3463 | BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | | |
3464 | BMSR_100BASE4; | |
3465 | break; | |
3466 | case MII_PHYSID1: /* PHYS ID 1 */ | |
3467 | rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | | |
3468 | dev->dev_addr[2]; | |
3469 | rc = (rc >> 5) & 0xFFFF; | |
3470 | break; | |
3471 | case MII_PHYSID2: /* PHYS ID 2 */ | |
3472 | rc = (dev->dev_addr[2] << 10) & 0xFFFF; | |
3473 | break; | |
3474 | case MII_ADVERTISE: /* Advertisement control reg */ | |
3475 | rc = ADVERTISE_ALL; | |
3476 | break; | |
3477 | case MII_LPA: /* Link partner ability reg */ | |
3478 | rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | | |
3479 | LPA_100BASE4 | LPA_LPACK; | |
3480 | break; | |
3481 | case MII_EXPANSION: /* Expansion register */ | |
3482 | break; | |
3483 | case MII_DCOUNTER: /* disconnect counter */ | |
3484 | break; | |
3485 | case MII_FCSCOUNTER: /* false carrier counter */ | |
3486 | break; | |
3487 | case MII_NWAYTEST: /* N-way auto-neg test register */ | |
3488 | break; | |
3489 | case MII_RERRCOUNTER: /* rx error counter */ | |
3490 | rc = card->stats.rx_errors; | |
3491 | break; | |
3492 | case MII_SREVISION: /* silicon revision */ | |
3493 | break; | |
3494 | case MII_RESV1: /* reserved 1 */ | |
3495 | break; | |
3496 | case MII_LBRERROR: /* loopback, rx, bypass error */ | |
3497 | break; | |
3498 | case MII_PHYADDR: /* physical address */ | |
3499 | break; | |
3500 | case MII_RESV2: /* reserved 2 */ | |
3501 | break; | |
3502 | case MII_TPISTATUS: /* TPI status for 10mbps */ | |
3503 | break; | |
3504 | case MII_NCONFIG: /* network interface config */ | |
3505 | break; | |
3506 | default: | |
3507 | break; | |
3508 | } | |
3509 | return rc; | |
3510 | } | |
3511 | EXPORT_SYMBOL_GPL(qeth_mdio_read); | |
3512 | ||
3513 | static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, | |
3514 | struct qeth_cmd_buffer *iob, int len, | |
3515 | int (*reply_cb)(struct qeth_card *, struct qeth_reply *, | |
3516 | unsigned long), | |
3517 | void *reply_param) | |
3518 | { | |
3519 | u16 s1, s2; | |
3520 | ||
d11ba0c4 | 3521 | QETH_DBF_TEXT(TRACE, 4, "sendsnmp"); |
4a71df50 FB |
3522 | |
3523 | memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); | |
3524 | memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), | |
3525 | &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); | |
3526 | /* adjust PDU length fields in IPA_PDU_HEADER */ | |
3527 | s1 = (u32) IPA_PDU_HEADER_SIZE + len; | |
3528 | s2 = (u32) len; | |
3529 | memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); | |
3530 | memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); | |
3531 | memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); | |
3532 | memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); | |
3533 | return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, | |
3534 | reply_cb, reply_param); | |
3535 | } | |
3536 | ||
3537 | static int qeth_snmp_command_cb(struct qeth_card *card, | |
3538 | struct qeth_reply *reply, unsigned long sdata) | |
3539 | { | |
3540 | struct qeth_ipa_cmd *cmd; | |
3541 | struct qeth_arp_query_info *qinfo; | |
3542 | struct qeth_snmp_cmd *snmp; | |
3543 | unsigned char *data; | |
3544 | __u16 data_len; | |
3545 | ||
d11ba0c4 | 3546 | QETH_DBF_TEXT(TRACE, 3, "snpcmdcb"); |
4a71df50 FB |
3547 | |
3548 | cmd = (struct qeth_ipa_cmd *) sdata; | |
3549 | data = (unsigned char *)((char *)cmd - reply->offset); | |
3550 | qinfo = (struct qeth_arp_query_info *) reply->param; | |
3551 | snmp = &cmd->data.setadapterparms.data.snmp; | |
3552 | ||
3553 | if (cmd->hdr.return_code) { | |
d11ba0c4 | 3554 | QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code); |
4a71df50 FB |
3555 | return 0; |
3556 | } | |
3557 | if (cmd->data.setadapterparms.hdr.return_code) { | |
3558 | cmd->hdr.return_code = | |
3559 | cmd->data.setadapterparms.hdr.return_code; | |
d11ba0c4 | 3560 | QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code); |
4a71df50 FB |
3561 | return 0; |
3562 | } | |
3563 | data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); | |
3564 | if (cmd->data.setadapterparms.hdr.seq_no == 1) | |
3565 | data_len -= (__u16)((char *)&snmp->data - (char *)cmd); | |
3566 | else | |
3567 | data_len -= (__u16)((char *)&snmp->request - (char *)cmd); | |
3568 | ||
3569 | /* check if there is enough room in userspace */ | |
3570 | if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { | |
d11ba0c4 | 3571 | QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM); |
4a71df50 FB |
3572 | cmd->hdr.return_code = -ENOMEM; |
3573 | return 0; | |
3574 | } | |
d11ba0c4 | 3575 | QETH_DBF_TEXT_(TRACE, 4, "snore%i", |
4a71df50 | 3576 | cmd->data.setadapterparms.hdr.used_total); |
d11ba0c4 | 3577 | QETH_DBF_TEXT_(TRACE, 4, "sseqn%i", |
4a71df50 FB |
3578 | cmd->data.setadapterparms.hdr.seq_no); |
3579 | /*copy entries to user buffer*/ | |
3580 | if (cmd->data.setadapterparms.hdr.seq_no == 1) { | |
3581 | memcpy(qinfo->udata + qinfo->udata_offset, | |
3582 | (char *)snmp, | |
3583 | data_len + offsetof(struct qeth_snmp_cmd, data)); | |
3584 | qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); | |
3585 | } else { | |
3586 | memcpy(qinfo->udata + qinfo->udata_offset, | |
3587 | (char *)&snmp->request, data_len); | |
3588 | } | |
3589 | qinfo->udata_offset += data_len; | |
3590 | /* check if all replies received ... */ | |
d11ba0c4 | 3591 | QETH_DBF_TEXT_(TRACE, 4, "srtot%i", |
4a71df50 | 3592 | cmd->data.setadapterparms.hdr.used_total); |
d11ba0c4 | 3593 | QETH_DBF_TEXT_(TRACE, 4, "srseq%i", |
4a71df50 FB |
3594 | cmd->data.setadapterparms.hdr.seq_no); |
3595 | if (cmd->data.setadapterparms.hdr.seq_no < | |
3596 | cmd->data.setadapterparms.hdr.used_total) | |
3597 | return 1; | |
3598 | return 0; | |
3599 | } | |
3600 | ||
3601 | int qeth_snmp_command(struct qeth_card *card, char __user *udata) | |
3602 | { | |
3603 | struct qeth_cmd_buffer *iob; | |
3604 | struct qeth_ipa_cmd *cmd; | |
3605 | struct qeth_snmp_ureq *ureq; | |
3606 | int req_len; | |
3607 | struct qeth_arp_query_info qinfo = {0, }; | |
3608 | int rc = 0; | |
3609 | ||
d11ba0c4 | 3610 | QETH_DBF_TEXT(TRACE, 3, "snmpcmd"); |
4a71df50 FB |
3611 | |
3612 | if (card->info.guestlan) | |
3613 | return -EOPNOTSUPP; | |
3614 | ||
3615 | if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && | |
3616 | (!card->options.layer2)) { | |
4a71df50 FB |
3617 | return -EOPNOTSUPP; |
3618 | } | |
3619 | /* skip 4 bytes (data_len struct member) to get req_len */ | |
3620 | if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) | |
3621 | return -EFAULT; | |
3622 | ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL); | |
3623 | if (!ureq) { | |
d11ba0c4 | 3624 | QETH_DBF_TEXT(TRACE, 2, "snmpnome"); |
4a71df50 FB |
3625 | return -ENOMEM; |
3626 | } | |
3627 | if (copy_from_user(ureq, udata, | |
3628 | req_len + sizeof(struct qeth_snmp_ureq_hdr))) { | |
3629 | kfree(ureq); | |
3630 | return -EFAULT; | |
3631 | } | |
3632 | qinfo.udata_len = ureq->hdr.data_len; | |
3633 | qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); | |
3634 | if (!qinfo.udata) { | |
3635 | kfree(ureq); | |
3636 | return -ENOMEM; | |
3637 | } | |
3638 | qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); | |
3639 | ||
3640 | iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, | |
3641 | QETH_SNMP_SETADP_CMDLENGTH + req_len); | |
3642 | cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); | |
3643 | memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); | |
3644 | rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, | |
3645 | qeth_snmp_command_cb, (void *)&qinfo); | |
3646 | if (rc) | |
14cc21b6 | 3647 | QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", |
4a71df50 FB |
3648 | QETH_CARD_IFNAME(card), rc); |
3649 | else { | |
3650 | if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) | |
3651 | rc = -EFAULT; | |
3652 | } | |
3653 | ||
3654 | kfree(ureq); | |
3655 | kfree(qinfo.udata); | |
3656 | return rc; | |
3657 | } | |
3658 | EXPORT_SYMBOL_GPL(qeth_snmp_command); | |
3659 | ||
3660 | static inline int qeth_get_qdio_q_format(struct qeth_card *card) | |
3661 | { | |
3662 | switch (card->info.type) { | |
3663 | case QETH_CARD_TYPE_IQD: | |
3664 | return 2; | |
3665 | default: | |
3666 | return 0; | |
3667 | } | |
3668 | } | |
3669 | ||
3670 | static int qeth_qdio_establish(struct qeth_card *card) | |
3671 | { | |
3672 | struct qdio_initialize init_data; | |
3673 | char *qib_param_field; | |
3674 | struct qdio_buffer **in_sbal_ptrs; | |
3675 | struct qdio_buffer **out_sbal_ptrs; | |
3676 | int i, j, k; | |
3677 | int rc = 0; | |
3678 | ||
d11ba0c4 | 3679 | QETH_DBF_TEXT(SETUP, 2, "qdioest"); |
4a71df50 FB |
3680 | |
3681 | qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), | |
3682 | GFP_KERNEL); | |
3683 | if (!qib_param_field) | |
3684 | return -ENOMEM; | |
3685 | ||
3686 | qeth_create_qib_param_field(card, qib_param_field); | |
3687 | qeth_create_qib_param_field_blkt(card, qib_param_field); | |
3688 | ||
3689 | in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), | |
3690 | GFP_KERNEL); | |
3691 | if (!in_sbal_ptrs) { | |
3692 | kfree(qib_param_field); | |
3693 | return -ENOMEM; | |
3694 | } | |
3695 | for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) | |
3696 | in_sbal_ptrs[i] = (struct qdio_buffer *) | |
3697 | virt_to_phys(card->qdio.in_q->bufs[i].buffer); | |
3698 | ||
3699 | out_sbal_ptrs = | |
3700 | kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * | |
3701 | sizeof(void *), GFP_KERNEL); | |
3702 | if (!out_sbal_ptrs) { | |
3703 | kfree(in_sbal_ptrs); | |
3704 | kfree(qib_param_field); | |
3705 | return -ENOMEM; | |
3706 | } | |
3707 | for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) | |
3708 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { | |
3709 | out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( | |
3710 | card->qdio.out_qs[i]->bufs[j].buffer); | |
3711 | } | |
3712 | ||
3713 | memset(&init_data, 0, sizeof(struct qdio_initialize)); | |
3714 | init_data.cdev = CARD_DDEV(card); | |
3715 | init_data.q_format = qeth_get_qdio_q_format(card); | |
3716 | init_data.qib_param_field_format = 0; | |
3717 | init_data.qib_param_field = qib_param_field; | |
4a71df50 FB |
3718 | init_data.no_input_qs = 1; |
3719 | init_data.no_output_qs = card->qdio.no_out_queues; | |
3720 | init_data.input_handler = card->discipline.input_handler; | |
3721 | init_data.output_handler = card->discipline.output_handler; | |
3722 | init_data.int_parm = (unsigned long) card; | |
3723 | init_data.flags = QDIO_INBOUND_0COPY_SBALS | | |
3724 | QDIO_OUTBOUND_0COPY_SBALS | | |
3725 | QDIO_USE_OUTBOUND_PCIS; | |
3726 | init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; | |
3727 | init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; | |
3728 | ||
3729 | if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, | |
3730 | QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { | |
3731 | rc = qdio_initialize(&init_data); | |
3732 | if (rc) | |
3733 | atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); | |
3734 | } | |
3735 | kfree(out_sbal_ptrs); | |
3736 | kfree(in_sbal_ptrs); | |
3737 | kfree(qib_param_field); | |
3738 | return rc; | |
3739 | } | |
3740 | ||
3741 | static void qeth_core_free_card(struct qeth_card *card) | |
3742 | { | |
3743 | ||
d11ba0c4 PT |
3744 | QETH_DBF_TEXT(SETUP, 2, "freecrd"); |
3745 | QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); | |
4a71df50 FB |
3746 | qeth_clean_channel(&card->read); |
3747 | qeth_clean_channel(&card->write); | |
3748 | if (card->dev) | |
3749 | free_netdev(card->dev); | |
3750 | kfree(card->ip_tbd_list); | |
3751 | qeth_free_qdio_buffers(card); | |
6bcac508 | 3752 | unregister_service_level(&card->qeth_service_level); |
4a71df50 FB |
3753 | kfree(card); |
3754 | } | |
3755 | ||
3756 | static struct ccw_device_id qeth_ids[] = { | |
3757 | {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE}, | |
3758 | {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD}, | |
3759 | {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN}, | |
3760 | {}, | |
3761 | }; | |
3762 | MODULE_DEVICE_TABLE(ccw, qeth_ids); | |
3763 | ||
3764 | static struct ccw_driver qeth_ccw_driver = { | |
3765 | .name = "qeth", | |
3766 | .ids = qeth_ids, | |
3767 | .probe = ccwgroup_probe_ccwdev, | |
3768 | .remove = ccwgroup_remove_ccwdev, | |
3769 | }; | |
3770 | ||
3771 | static int qeth_core_driver_group(const char *buf, struct device *root_dev, | |
3772 | unsigned long driver_id) | |
3773 | { | |
022b660a UB |
3774 | return ccwgroup_create_from_string(root_dev, driver_id, |
3775 | &qeth_ccw_driver, 3, buf); | |
4a71df50 FB |
3776 | } |
3777 | ||
3778 | int qeth_core_hardsetup_card(struct qeth_card *card) | |
3779 | { | |
bbd50e17 | 3780 | struct qdio_ssqd_desc *ssqd; |
4a71df50 | 3781 | int retries = 3; |
779e6e1c | 3782 | int mpno = 0; |
4a71df50 FB |
3783 | int rc; |
3784 | ||
d11ba0c4 | 3785 | QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); |
4a71df50 FB |
3786 | atomic_set(&card->force_alloc_skb, 0); |
3787 | retry: | |
3788 | if (retries < 3) { | |
74eacdb9 FB |
3789 | QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", |
3790 | dev_name(&card->gdev->dev)); | |
4a71df50 FB |
3791 | ccw_device_set_offline(CARD_DDEV(card)); |
3792 | ccw_device_set_offline(CARD_WDEV(card)); | |
3793 | ccw_device_set_offline(CARD_RDEV(card)); | |
3794 | ccw_device_set_online(CARD_RDEV(card)); | |
3795 | ccw_device_set_online(CARD_WDEV(card)); | |
3796 | ccw_device_set_online(CARD_DDEV(card)); | |
3797 | } | |
3798 | rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); | |
3799 | if (rc == -ERESTARTSYS) { | |
d11ba0c4 | 3800 | QETH_DBF_TEXT(SETUP, 2, "break1"); |
4a71df50 FB |
3801 | return rc; |
3802 | } else if (rc) { | |
d11ba0c4 | 3803 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); |
4a71df50 FB |
3804 | if (--retries < 0) |
3805 | goto out; | |
3806 | else | |
3807 | goto retry; | |
3808 | } | |
3809 | ||
3810 | rc = qeth_get_unitaddr(card); | |
3811 | if (rc) { | |
d11ba0c4 | 3812 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); |
4a71df50 FB |
3813 | return rc; |
3814 | } | |
779e6e1c | 3815 | |
bbd50e17 JG |
3816 | ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL); |
3817 | if (!ssqd) { | |
3818 | rc = -ENOMEM; | |
3819 | goto out; | |
3820 | } | |
3821 | rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd); | |
3822 | if (rc == 0) | |
3823 | mpno = ssqd->pcnt; | |
3824 | kfree(ssqd); | |
3825 | ||
a74b08c7 UB |
3826 | if (mpno) |
3827 | mpno = min(mpno - 1, QETH_MAX_PORTNO); | |
4a71df50 | 3828 | if (card->info.portno > mpno) { |
14cc21b6 FB |
3829 | QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d" |
3830 | "\n.", CARD_BUS_ID(card), card->info.portno); | |
4a71df50 FB |
3831 | rc = -ENODEV; |
3832 | goto out; | |
3833 | } | |
3834 | qeth_init_tokens(card); | |
3835 | qeth_init_func_level(card); | |
3836 | rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); | |
3837 | if (rc == -ERESTARTSYS) { | |
d11ba0c4 | 3838 | QETH_DBF_TEXT(SETUP, 2, "break2"); |
4a71df50 FB |
3839 | return rc; |
3840 | } else if (rc) { | |
d11ba0c4 | 3841 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); |
4a71df50 FB |
3842 | if (--retries < 0) |
3843 | goto out; | |
3844 | else | |
3845 | goto retry; | |
3846 | } | |
3847 | rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); | |
3848 | if (rc == -ERESTARTSYS) { | |
d11ba0c4 | 3849 | QETH_DBF_TEXT(SETUP, 2, "break3"); |
4a71df50 FB |
3850 | return rc; |
3851 | } else if (rc) { | |
d11ba0c4 | 3852 | QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); |
4a71df50 FB |
3853 | if (--retries < 0) |
3854 | goto out; | |
3855 | else | |
3856 | goto retry; | |
3857 | } | |
3858 | rc = qeth_mpc_initialize(card); | |
3859 | if (rc) { | |
d11ba0c4 | 3860 | QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); |
4a71df50 FB |
3861 | goto out; |
3862 | } | |
3863 | return 0; | |
3864 | out: | |
74eacdb9 FB |
3865 | dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " |
3866 | "an error on the device\n"); | |
3867 | QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", | |
3868 | dev_name(&card->gdev->dev), rc); | |
4a71df50 FB |
3869 | return rc; |
3870 | } | |
3871 | EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); | |
3872 | ||
3873 | static inline int qeth_create_skb_frag(struct qdio_buffer_element *element, | |
3874 | struct sk_buff **pskb, int offset, int *pfrag, int data_len) | |
3875 | { | |
3876 | struct page *page = virt_to_page(element->addr); | |
3877 | if (*pskb == NULL) { | |
3878 | /* the upper protocol layers assume that there is data in the | |
3879 | * skb itself. Copy a small amount (64 bytes) to make them | |
3880 | * happy. */ | |
3881 | *pskb = dev_alloc_skb(64 + ETH_HLEN); | |
3882 | if (!(*pskb)) | |
3883 | return -ENOMEM; | |
3884 | skb_reserve(*pskb, ETH_HLEN); | |
3885 | if (data_len <= 64) { | |
3886 | memcpy(skb_put(*pskb, data_len), element->addr + offset, | |
3887 | data_len); | |
3888 | } else { | |
3889 | get_page(page); | |
3890 | memcpy(skb_put(*pskb, 64), element->addr + offset, 64); | |
3891 | skb_fill_page_desc(*pskb, *pfrag, page, offset + 64, | |
3892 | data_len - 64); | |
3893 | (*pskb)->data_len += data_len - 64; | |
3894 | (*pskb)->len += data_len - 64; | |
3895 | (*pskb)->truesize += data_len - 64; | |
3896 | (*pfrag)++; | |
3897 | } | |
3898 | } else { | |
3899 | get_page(page); | |
3900 | skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); | |
3901 | (*pskb)->data_len += data_len; | |
3902 | (*pskb)->len += data_len; | |
3903 | (*pskb)->truesize += data_len; | |
3904 | (*pfrag)++; | |
3905 | } | |
3906 | return 0; | |
3907 | } | |
3908 | ||
3909 | struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, | |
3910 | struct qdio_buffer *buffer, | |
3911 | struct qdio_buffer_element **__element, int *__offset, | |
3912 | struct qeth_hdr **hdr) | |
3913 | { | |
3914 | struct qdio_buffer_element *element = *__element; | |
3915 | int offset = *__offset; | |
3916 | struct sk_buff *skb = NULL; | |
3917 | int skb_len; | |
3918 | void *data_ptr; | |
3919 | int data_len; | |
3920 | int headroom = 0; | |
3921 | int use_rx_sg = 0; | |
3922 | int frag = 0; | |
3923 | ||
4a71df50 FB |
3924 | /* qeth_hdr must not cross element boundaries */ |
3925 | if (element->length < offset + sizeof(struct qeth_hdr)) { | |
3926 | if (qeth_is_last_sbale(element)) | |
3927 | return NULL; | |
3928 | element++; | |
3929 | offset = 0; | |
3930 | if (element->length < sizeof(struct qeth_hdr)) | |
3931 | return NULL; | |
3932 | } | |
3933 | *hdr = element->addr + offset; | |
3934 | ||
3935 | offset += sizeof(struct qeth_hdr); | |
3936 | if (card->options.layer2) { | |
3937 | if (card->info.type == QETH_CARD_TYPE_OSN) { | |
3938 | skb_len = (*hdr)->hdr.osn.pdu_length; | |
3939 | headroom = sizeof(struct qeth_hdr); | |
3940 | } else { | |
3941 | skb_len = (*hdr)->hdr.l2.pkt_length; | |
3942 | } | |
3943 | } else { | |
3944 | skb_len = (*hdr)->hdr.l3.length; | |
b403e685 FB |
3945 | if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || |
3946 | (card->info.link_type == QETH_LINK_TYPE_HSTR)) | |
3947 | headroom = TR_HLEN; | |
3948 | else | |
3949 | headroom = ETH_HLEN; | |
4a71df50 FB |
3950 | } |
3951 | ||
3952 | if (!skb_len) | |
3953 | return NULL; | |
3954 | ||
3955 | if ((skb_len >= card->options.rx_sg_cb) && | |
3956 | (!(card->info.type == QETH_CARD_TYPE_OSN)) && | |
3957 | (!atomic_read(&card->force_alloc_skb))) { | |
3958 | use_rx_sg = 1; | |
3959 | } else { | |
3960 | skb = dev_alloc_skb(skb_len + headroom); | |
3961 | if (!skb) | |
3962 | goto no_mem; | |
3963 | if (headroom) | |
3964 | skb_reserve(skb, headroom); | |
3965 | } | |
3966 | ||
3967 | data_ptr = element->addr + offset; | |
3968 | while (skb_len) { | |
3969 | data_len = min(skb_len, (int)(element->length - offset)); | |
3970 | if (data_len) { | |
3971 | if (use_rx_sg) { | |
3972 | if (qeth_create_skb_frag(element, &skb, offset, | |
3973 | &frag, data_len)) | |
3974 | goto no_mem; | |
3975 | } else { | |
3976 | memcpy(skb_put(skb, data_len), data_ptr, | |
3977 | data_len); | |
3978 | } | |
3979 | } | |
3980 | skb_len -= data_len; | |
3981 | if (skb_len) { | |
3982 | if (qeth_is_last_sbale(element)) { | |
d11ba0c4 PT |
3983 | QETH_DBF_TEXT(TRACE, 4, "unexeob"); |
3984 | QETH_DBF_TEXT_(TRACE, 4, "%s", | |
4a71df50 | 3985 | CARD_BUS_ID(card)); |
d11ba0c4 PT |
3986 | QETH_DBF_TEXT(QERR, 2, "unexeob"); |
3987 | QETH_DBF_TEXT_(QERR, 2, "%s", | |
4a71df50 | 3988 | CARD_BUS_ID(card)); |
d11ba0c4 | 3989 | QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer)); |
4a71df50 FB |
3990 | dev_kfree_skb_any(skb); |
3991 | card->stats.rx_errors++; | |
3992 | return NULL; | |
3993 | } | |
3994 | element++; | |
3995 | offset = 0; | |
3996 | data_ptr = element->addr; | |
3997 | } else { | |
3998 | offset += data_len; | |
3999 | } | |
4000 | } | |
4001 | *__element = element; | |
4002 | *__offset = offset; | |
4003 | if (use_rx_sg && card->options.performance_stats) { | |
4004 | card->perf_stats.sg_skbs_rx++; | |
4005 | card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; | |
4006 | } | |
4007 | return skb; | |
4008 | no_mem: | |
4009 | if (net_ratelimit()) { | |
d11ba0c4 PT |
4010 | QETH_DBF_TEXT(TRACE, 2, "noskbmem"); |
4011 | QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
4012 | } |
4013 | card->stats.rx_dropped++; | |
4014 | return NULL; | |
4015 | } | |
4016 | EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); | |
4017 | ||
4018 | static void qeth_unregister_dbf_views(void) | |
4019 | { | |
d11ba0c4 PT |
4020 | int x; |
4021 | for (x = 0; x < QETH_DBF_INFOS; x++) { | |
4022 | debug_unregister(qeth_dbf[x].id); | |
4023 | qeth_dbf[x].id = NULL; | |
4024 | } | |
4a71df50 FB |
4025 | } |
4026 | ||
345aa66e | 4027 | void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...) |
cd023216 PT |
4028 | { |
4029 | char dbf_txt_buf[32]; | |
345aa66e | 4030 | va_list args; |
cd023216 PT |
4031 | |
4032 | if (level > (qeth_dbf[dbf_nix].id)->level) | |
4033 | return; | |
345aa66e PT |
4034 | va_start(args, fmt); |
4035 | vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); | |
4036 | va_end(args); | |
cd023216 | 4037 | debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf); |
cd023216 PT |
4038 | } |
4039 | EXPORT_SYMBOL_GPL(qeth_dbf_longtext); | |
4040 | ||
4a71df50 FB |
4041 | static int qeth_register_dbf_views(void) |
4042 | { | |
d11ba0c4 PT |
4043 | int ret; |
4044 | int x; | |
4045 | ||
4046 | for (x = 0; x < QETH_DBF_INFOS; x++) { | |
4047 | /* register the areas */ | |
4048 | qeth_dbf[x].id = debug_register(qeth_dbf[x].name, | |
4049 | qeth_dbf[x].pages, | |
4050 | qeth_dbf[x].areas, | |
4051 | qeth_dbf[x].len); | |
4052 | if (qeth_dbf[x].id == NULL) { | |
4053 | qeth_unregister_dbf_views(); | |
4054 | return -ENOMEM; | |
4055 | } | |
4a71df50 | 4056 | |
d11ba0c4 PT |
4057 | /* register a view */ |
4058 | ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); | |
4059 | if (ret) { | |
4060 | qeth_unregister_dbf_views(); | |
4061 | return ret; | |
4062 | } | |
4a71df50 | 4063 | |
d11ba0c4 PT |
4064 | /* set a passing level */ |
4065 | debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); | |
4066 | } | |
4a71df50 FB |
4067 | |
4068 | return 0; | |
4069 | } | |
4070 | ||
4071 | int qeth_core_load_discipline(struct qeth_card *card, | |
4072 | enum qeth_discipline_id discipline) | |
4073 | { | |
4074 | int rc = 0; | |
4075 | switch (discipline) { | |
4076 | case QETH_DISCIPLINE_LAYER3: | |
4077 | card->discipline.ccwgdriver = try_then_request_module( | |
4078 | symbol_get(qeth_l3_ccwgroup_driver), | |
4079 | "qeth_l3"); | |
4080 | break; | |
4081 | case QETH_DISCIPLINE_LAYER2: | |
4082 | card->discipline.ccwgdriver = try_then_request_module( | |
4083 | symbol_get(qeth_l2_ccwgroup_driver), | |
4084 | "qeth_l2"); | |
4085 | break; | |
4086 | } | |
4087 | if (!card->discipline.ccwgdriver) { | |
74eacdb9 FB |
4088 | dev_err(&card->gdev->dev, "There is no kernel module to " |
4089 | "support discipline %d\n", discipline); | |
4a71df50 FB |
4090 | rc = -EINVAL; |
4091 | } | |
4092 | return rc; | |
4093 | } | |
4094 | ||
4095 | void qeth_core_free_discipline(struct qeth_card *card) | |
4096 | { | |
4097 | if (card->options.layer2) | |
4098 | symbol_put(qeth_l2_ccwgroup_driver); | |
4099 | else | |
4100 | symbol_put(qeth_l3_ccwgroup_driver); | |
4101 | card->discipline.ccwgdriver = NULL; | |
4102 | } | |
4103 | ||
4104 | static int qeth_core_probe_device(struct ccwgroup_device *gdev) | |
4105 | { | |
4106 | struct qeth_card *card; | |
4107 | struct device *dev; | |
4108 | int rc; | |
4109 | unsigned long flags; | |
4110 | ||
d11ba0c4 | 4111 | QETH_DBF_TEXT(SETUP, 2, "probedev"); |
4a71df50 FB |
4112 | |
4113 | dev = &gdev->dev; | |
4114 | if (!get_device(dev)) | |
4115 | return -ENODEV; | |
4116 | ||
2a0217d5 | 4117 | QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); |
4a71df50 FB |
4118 | |
4119 | card = qeth_alloc_card(); | |
4120 | if (!card) { | |
d11ba0c4 | 4121 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); |
4a71df50 FB |
4122 | rc = -ENOMEM; |
4123 | goto err_dev; | |
4124 | } | |
4125 | card->read.ccwdev = gdev->cdev[0]; | |
4126 | card->write.ccwdev = gdev->cdev[1]; | |
4127 | card->data.ccwdev = gdev->cdev[2]; | |
4128 | dev_set_drvdata(&gdev->dev, card); | |
4129 | card->gdev = gdev; | |
4130 | gdev->cdev[0]->handler = qeth_irq; | |
4131 | gdev->cdev[1]->handler = qeth_irq; | |
4132 | gdev->cdev[2]->handler = qeth_irq; | |
4133 | ||
4134 | rc = qeth_determine_card_type(card); | |
4135 | if (rc) { | |
d11ba0c4 | 4136 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); |
4a71df50 FB |
4137 | goto err_card; |
4138 | } | |
4139 | rc = qeth_setup_card(card); | |
4140 | if (rc) { | |
d11ba0c4 | 4141 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); |
4a71df50 FB |
4142 | goto err_card; |
4143 | } | |
4144 | ||
4145 | if (card->info.type == QETH_CARD_TYPE_OSN) { | |
4146 | rc = qeth_core_create_osn_attributes(dev); | |
4147 | if (rc) | |
4148 | goto err_card; | |
4149 | rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); | |
4150 | if (rc) { | |
4151 | qeth_core_remove_osn_attributes(dev); | |
4152 | goto err_card; | |
4153 | } | |
4154 | rc = card->discipline.ccwgdriver->probe(card->gdev); | |
4155 | if (rc) { | |
4156 | qeth_core_free_discipline(card); | |
4157 | qeth_core_remove_osn_attributes(dev); | |
4158 | goto err_card; | |
4159 | } | |
4160 | } else { | |
4161 | rc = qeth_core_create_device_attributes(dev); | |
4162 | if (rc) | |
4163 | goto err_card; | |
4164 | } | |
4165 | ||
4166 | write_lock_irqsave(&qeth_core_card_list.rwlock, flags); | |
4167 | list_add_tail(&card->list, &qeth_core_card_list.list); | |
4168 | write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); | |
4169 | return 0; | |
4170 | ||
4171 | err_card: | |
4172 | qeth_core_free_card(card); | |
4173 | err_dev: | |
4174 | put_device(dev); | |
4175 | return rc; | |
4176 | } | |
4177 | ||
4178 | static void qeth_core_remove_device(struct ccwgroup_device *gdev) | |
4179 | { | |
4180 | unsigned long flags; | |
4181 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | |
4182 | ||
28a7e4c9 | 4183 | QETH_DBF_TEXT(SETUP, 2, "removedv"); |
4a71df50 FB |
4184 | if (card->discipline.ccwgdriver) { |
4185 | card->discipline.ccwgdriver->remove(gdev); | |
4186 | qeth_core_free_discipline(card); | |
4187 | } | |
4188 | ||
4189 | if (card->info.type == QETH_CARD_TYPE_OSN) { | |
4190 | qeth_core_remove_osn_attributes(&gdev->dev); | |
4191 | } else { | |
4192 | qeth_core_remove_device_attributes(&gdev->dev); | |
4193 | } | |
4194 | write_lock_irqsave(&qeth_core_card_list.rwlock, flags); | |
4195 | list_del(&card->list); | |
4196 | write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); | |
4197 | qeth_core_free_card(card); | |
4198 | dev_set_drvdata(&gdev->dev, NULL); | |
4199 | put_device(&gdev->dev); | |
4200 | return; | |
4201 | } | |
4202 | ||
4203 | static int qeth_core_set_online(struct ccwgroup_device *gdev) | |
4204 | { | |
4205 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | |
4206 | int rc = 0; | |
4207 | int def_discipline; | |
4208 | ||
4209 | if (!card->discipline.ccwgdriver) { | |
4210 | if (card->info.type == QETH_CARD_TYPE_IQD) | |
4211 | def_discipline = QETH_DISCIPLINE_LAYER3; | |
4212 | else | |
4213 | def_discipline = QETH_DISCIPLINE_LAYER2; | |
4214 | rc = qeth_core_load_discipline(card, def_discipline); | |
4215 | if (rc) | |
4216 | goto err; | |
4217 | rc = card->discipline.ccwgdriver->probe(card->gdev); | |
4218 | if (rc) | |
4219 | goto err; | |
4220 | } | |
4221 | rc = card->discipline.ccwgdriver->set_online(gdev); | |
4222 | err: | |
4223 | return rc; | |
4224 | } | |
4225 | ||
4226 | static int qeth_core_set_offline(struct ccwgroup_device *gdev) | |
4227 | { | |
4228 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | |
4229 | return card->discipline.ccwgdriver->set_offline(gdev); | |
4230 | } | |
4231 | ||
4232 | static void qeth_core_shutdown(struct ccwgroup_device *gdev) | |
4233 | { | |
4234 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | |
4235 | if (card->discipline.ccwgdriver && | |
4236 | card->discipline.ccwgdriver->shutdown) | |
4237 | card->discipline.ccwgdriver->shutdown(gdev); | |
4238 | } | |
4239 | ||
4240 | static struct ccwgroup_driver qeth_core_ccwgroup_driver = { | |
4241 | .owner = THIS_MODULE, | |
4242 | .name = "qeth", | |
4243 | .driver_id = 0xD8C5E3C8, | |
4244 | .probe = qeth_core_probe_device, | |
4245 | .remove = qeth_core_remove_device, | |
4246 | .set_online = qeth_core_set_online, | |
4247 | .set_offline = qeth_core_set_offline, | |
4248 | .shutdown = qeth_core_shutdown, | |
4249 | }; | |
4250 | ||
4251 | static ssize_t | |
4252 | qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, | |
4253 | size_t count) | |
4254 | { | |
4255 | int err; | |
4256 | err = qeth_core_driver_group(buf, qeth_core_root_dev, | |
4257 | qeth_core_ccwgroup_driver.driver_id); | |
4258 | if (err) | |
4259 | return err; | |
4260 | else | |
4261 | return count; | |
4262 | } | |
4263 | ||
4264 | static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); | |
4265 | ||
4266 | static struct { | |
4267 | const char str[ETH_GSTRING_LEN]; | |
4268 | } qeth_ethtool_stats_keys[] = { | |
4269 | /* 0 */{"rx skbs"}, | |
4270 | {"rx buffers"}, | |
4271 | {"tx skbs"}, | |
4272 | {"tx buffers"}, | |
4273 | {"tx skbs no packing"}, | |
4274 | {"tx buffers no packing"}, | |
4275 | {"tx skbs packing"}, | |
4276 | {"tx buffers packing"}, | |
4277 | {"tx sg skbs"}, | |
4278 | {"tx sg frags"}, | |
4279 | /* 10 */{"rx sg skbs"}, | |
4280 | {"rx sg frags"}, | |
4281 | {"rx sg page allocs"}, | |
4282 | {"tx large kbytes"}, | |
4283 | {"tx large count"}, | |
4284 | {"tx pk state ch n->p"}, | |
4285 | {"tx pk state ch p->n"}, | |
4286 | {"tx pk watermark low"}, | |
4287 | {"tx pk watermark high"}, | |
4288 | {"queue 0 buffer usage"}, | |
4289 | /* 20 */{"queue 1 buffer usage"}, | |
4290 | {"queue 2 buffer usage"}, | |
4291 | {"queue 3 buffer usage"}, | |
4292 | {"rx handler time"}, | |
4293 | {"rx handler count"}, | |
4294 | {"rx do_QDIO time"}, | |
4295 | {"rx do_QDIO count"}, | |
4296 | {"tx handler time"}, | |
4297 | {"tx handler count"}, | |
4298 | {"tx time"}, | |
4299 | /* 30 */{"tx count"}, | |
4300 | {"tx do_QDIO time"}, | |
4301 | {"tx do_QDIO count"}, | |
4302 | }; | |
4303 | ||
4304 | int qeth_core_get_stats_count(struct net_device *dev) | |
4305 | { | |
4306 | return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); | |
4307 | } | |
4308 | EXPORT_SYMBOL_GPL(qeth_core_get_stats_count); | |
4309 | ||
4310 | void qeth_core_get_ethtool_stats(struct net_device *dev, | |
4311 | struct ethtool_stats *stats, u64 *data) | |
4312 | { | |
509e2562 | 4313 | struct qeth_card *card = dev->ml_priv; |
4a71df50 FB |
4314 | data[0] = card->stats.rx_packets - |
4315 | card->perf_stats.initial_rx_packets; | |
4316 | data[1] = card->perf_stats.bufs_rec; | |
4317 | data[2] = card->stats.tx_packets - | |
4318 | card->perf_stats.initial_tx_packets; | |
4319 | data[3] = card->perf_stats.bufs_sent; | |
4320 | data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets | |
4321 | - card->perf_stats.skbs_sent_pack; | |
4322 | data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; | |
4323 | data[6] = card->perf_stats.skbs_sent_pack; | |
4324 | data[7] = card->perf_stats.bufs_sent_pack; | |
4325 | data[8] = card->perf_stats.sg_skbs_sent; | |
4326 | data[9] = card->perf_stats.sg_frags_sent; | |
4327 | data[10] = card->perf_stats.sg_skbs_rx; | |
4328 | data[11] = card->perf_stats.sg_frags_rx; | |
4329 | data[12] = card->perf_stats.sg_alloc_page_rx; | |
4330 | data[13] = (card->perf_stats.large_send_bytes >> 10); | |
4331 | data[14] = card->perf_stats.large_send_cnt; | |
4332 | data[15] = card->perf_stats.sc_dp_p; | |
4333 | data[16] = card->perf_stats.sc_p_dp; | |
4334 | data[17] = QETH_LOW_WATERMARK_PACK; | |
4335 | data[18] = QETH_HIGH_WATERMARK_PACK; | |
4336 | data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); | |
4337 | data[20] = (card->qdio.no_out_queues > 1) ? | |
4338 | atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; | |
4339 | data[21] = (card->qdio.no_out_queues > 2) ? | |
4340 | atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; | |
4341 | data[22] = (card->qdio.no_out_queues > 3) ? | |
4342 | atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; | |
4343 | data[23] = card->perf_stats.inbound_time; | |
4344 | data[24] = card->perf_stats.inbound_cnt; | |
4345 | data[25] = card->perf_stats.inbound_do_qdio_time; | |
4346 | data[26] = card->perf_stats.inbound_do_qdio_cnt; | |
4347 | data[27] = card->perf_stats.outbound_handler_time; | |
4348 | data[28] = card->perf_stats.outbound_handler_cnt; | |
4349 | data[29] = card->perf_stats.outbound_time; | |
4350 | data[30] = card->perf_stats.outbound_cnt; | |
4351 | data[31] = card->perf_stats.outbound_do_qdio_time; | |
4352 | data[32] = card->perf_stats.outbound_do_qdio_cnt; | |
4353 | } | |
4354 | EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); | |
4355 | ||
4356 | void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) | |
4357 | { | |
4358 | switch (stringset) { | |
4359 | case ETH_SS_STATS: | |
4360 | memcpy(data, &qeth_ethtool_stats_keys, | |
4361 | sizeof(qeth_ethtool_stats_keys)); | |
4362 | break; | |
4363 | default: | |
4364 | WARN_ON(1); | |
4365 | break; | |
4366 | } | |
4367 | } | |
4368 | EXPORT_SYMBOL_GPL(qeth_core_get_strings); | |
4369 | ||
4370 | void qeth_core_get_drvinfo(struct net_device *dev, | |
4371 | struct ethtool_drvinfo *info) | |
4372 | { | |
509e2562 | 4373 | struct qeth_card *card = dev->ml_priv; |
4a71df50 FB |
4374 | if (card->options.layer2) |
4375 | strcpy(info->driver, "qeth_l2"); | |
4376 | else | |
4377 | strcpy(info->driver, "qeth_l3"); | |
4378 | ||
4379 | strcpy(info->version, "1.0"); | |
4380 | strcpy(info->fw_version, card->info.mcl_level); | |
4381 | sprintf(info->bus_info, "%s/%s/%s", | |
4382 | CARD_RDEV_ID(card), | |
4383 | CARD_WDEV_ID(card), | |
4384 | CARD_DDEV_ID(card)); | |
4385 | } | |
4386 | EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); | |
4387 | ||
3f9975aa FB |
4388 | int qeth_core_ethtool_get_settings(struct net_device *netdev, |
4389 | struct ethtool_cmd *ecmd) | |
4390 | { | |
509e2562 | 4391 | struct qeth_card *card = netdev->ml_priv; |
3f9975aa FB |
4392 | enum qeth_link_types link_type; |
4393 | ||
4394 | if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) | |
4395 | link_type = QETH_LINK_TYPE_10GBIT_ETH; | |
4396 | else | |
4397 | link_type = card->info.link_type; | |
4398 | ||
4399 | ecmd->transceiver = XCVR_INTERNAL; | |
4400 | ecmd->supported = SUPPORTED_Autoneg; | |
4401 | ecmd->advertising = ADVERTISED_Autoneg; | |
4402 | ecmd->duplex = DUPLEX_FULL; | |
4403 | ecmd->autoneg = AUTONEG_ENABLE; | |
4404 | ||
4405 | switch (link_type) { | |
4406 | case QETH_LINK_TYPE_FAST_ETH: | |
4407 | case QETH_LINK_TYPE_LANE_ETH100: | |
4408 | ecmd->supported |= SUPPORTED_10baseT_Half | | |
4409 | SUPPORTED_10baseT_Full | | |
4410 | SUPPORTED_100baseT_Half | | |
4411 | SUPPORTED_100baseT_Full | | |
4412 | SUPPORTED_TP; | |
4413 | ecmd->advertising |= ADVERTISED_10baseT_Half | | |
4414 | ADVERTISED_10baseT_Full | | |
4415 | ADVERTISED_100baseT_Half | | |
4416 | ADVERTISED_100baseT_Full | | |
4417 | ADVERTISED_TP; | |
4418 | ecmd->speed = SPEED_100; | |
4419 | ecmd->port = PORT_TP; | |
4420 | break; | |
4421 | ||
4422 | case QETH_LINK_TYPE_GBIT_ETH: | |
4423 | case QETH_LINK_TYPE_LANE_ETH1000: | |
4424 | ecmd->supported |= SUPPORTED_10baseT_Half | | |
4425 | SUPPORTED_10baseT_Full | | |
4426 | SUPPORTED_100baseT_Half | | |
4427 | SUPPORTED_100baseT_Full | | |
4428 | SUPPORTED_1000baseT_Half | | |
4429 | SUPPORTED_1000baseT_Full | | |
4430 | SUPPORTED_FIBRE; | |
4431 | ecmd->advertising |= ADVERTISED_10baseT_Half | | |
4432 | ADVERTISED_10baseT_Full | | |
4433 | ADVERTISED_100baseT_Half | | |
4434 | ADVERTISED_100baseT_Full | | |
4435 | ADVERTISED_1000baseT_Half | | |
4436 | ADVERTISED_1000baseT_Full | | |
4437 | ADVERTISED_FIBRE; | |
4438 | ecmd->speed = SPEED_1000; | |
4439 | ecmd->port = PORT_FIBRE; | |
4440 | break; | |
4441 | ||
4442 | case QETH_LINK_TYPE_10GBIT_ETH: | |
4443 | ecmd->supported |= SUPPORTED_10baseT_Half | | |
4444 | SUPPORTED_10baseT_Full | | |
4445 | SUPPORTED_100baseT_Half | | |
4446 | SUPPORTED_100baseT_Full | | |
4447 | SUPPORTED_1000baseT_Half | | |
4448 | SUPPORTED_1000baseT_Full | | |
4449 | SUPPORTED_10000baseT_Full | | |
4450 | SUPPORTED_FIBRE; | |
4451 | ecmd->advertising |= ADVERTISED_10baseT_Half | | |
4452 | ADVERTISED_10baseT_Full | | |
4453 | ADVERTISED_100baseT_Half | | |
4454 | ADVERTISED_100baseT_Full | | |
4455 | ADVERTISED_1000baseT_Half | | |
4456 | ADVERTISED_1000baseT_Full | | |
4457 | ADVERTISED_10000baseT_Full | | |
4458 | ADVERTISED_FIBRE; | |
4459 | ecmd->speed = SPEED_10000; | |
4460 | ecmd->port = PORT_FIBRE; | |
4461 | break; | |
4462 | ||
4463 | default: | |
4464 | ecmd->supported |= SUPPORTED_10baseT_Half | | |
4465 | SUPPORTED_10baseT_Full | | |
4466 | SUPPORTED_TP; | |
4467 | ecmd->advertising |= ADVERTISED_10baseT_Half | | |
4468 | ADVERTISED_10baseT_Full | | |
4469 | ADVERTISED_TP; | |
4470 | ecmd->speed = SPEED_10; | |
4471 | ecmd->port = PORT_TP; | |
4472 | } | |
4473 | ||
4474 | return 0; | |
4475 | } | |
4476 | EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); | |
4477 | ||
4a71df50 FB |
4478 | static int __init qeth_core_init(void) |
4479 | { | |
4480 | int rc; | |
4481 | ||
74eacdb9 | 4482 | pr_info("loading core functions\n"); |
4a71df50 FB |
4483 | INIT_LIST_HEAD(&qeth_core_card_list.list); |
4484 | rwlock_init(&qeth_core_card_list.rwlock); | |
4485 | ||
4486 | rc = qeth_register_dbf_views(); | |
4487 | if (rc) | |
4488 | goto out_err; | |
4489 | rc = ccw_driver_register(&qeth_ccw_driver); | |
4490 | if (rc) | |
4491 | goto ccw_err; | |
4492 | rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); | |
4493 | if (rc) | |
4494 | goto ccwgroup_err; | |
4495 | rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, | |
4496 | &driver_attr_group); | |
4497 | if (rc) | |
4498 | goto driver_err; | |
4499 | qeth_core_root_dev = s390_root_dev_register("qeth"); | |
4500 | rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; | |
4501 | if (rc) | |
4502 | goto register_err; | |
4a71df50 | 4503 | |
683d718a FB |
4504 | qeth_core_header_cache = kmem_cache_create("qeth_hdr", |
4505 | sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); | |
4506 | if (!qeth_core_header_cache) { | |
4507 | rc = -ENOMEM; | |
4508 | goto slab_err; | |
4509 | } | |
4510 | ||
4511 | return 0; | |
4512 | slab_err: | |
4513 | s390_root_dev_unregister(qeth_core_root_dev); | |
4a71df50 FB |
4514 | register_err: |
4515 | driver_remove_file(&qeth_core_ccwgroup_driver.driver, | |
4516 | &driver_attr_group); | |
4517 | driver_err: | |
4518 | ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); | |
4519 | ccwgroup_err: | |
4520 | ccw_driver_unregister(&qeth_ccw_driver); | |
4521 | ccw_err: | |
74eacdb9 | 4522 | QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc); |
4a71df50 FB |
4523 | qeth_unregister_dbf_views(); |
4524 | out_err: | |
74eacdb9 | 4525 | pr_err("Initializing the qeth device driver failed\n"); |
4a71df50 FB |
4526 | return rc; |
4527 | } | |
4528 | ||
4529 | static void __exit qeth_core_exit(void) | |
4530 | { | |
4531 | s390_root_dev_unregister(qeth_core_root_dev); | |
4532 | driver_remove_file(&qeth_core_ccwgroup_driver.driver, | |
4533 | &driver_attr_group); | |
4534 | ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); | |
4535 | ccw_driver_unregister(&qeth_ccw_driver); | |
683d718a | 4536 | kmem_cache_destroy(qeth_core_header_cache); |
4a71df50 | 4537 | qeth_unregister_dbf_views(); |
74eacdb9 | 4538 | pr_info("core functions removed\n"); |
4a71df50 FB |
4539 | } |
4540 | ||
4541 | module_init(qeth_core_init); | |
4542 | module_exit(qeth_core_exit); | |
4543 | MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); | |
4544 | MODULE_DESCRIPTION("qeth core functions"); | |
4545 | MODULE_LICENSE("GPL"); |