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s390/qeth: delay netdevice registration
[linux-block.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
ab9953ff 1// SPDX-License-Identifier: GPL-2.0
4a71df50 2/*
bbcfcdc8 3 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
74eacdb9
FB		 10#define KMSG_COMPONENT "qeth"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
0d55303c 13#include <linux/compat.h>
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
55494264 19#include <linux/log2.h>
4a71df50 20#include <linux/ip.h>
4a71df50
FB		 21#include <linux/tcp.h>
22#include <linux/mii.h>
23#include <linux/kthread.h>
5a0e3ad6 24#include <linux/slab.h>
6d69b1f1
JW		 25#include <linux/if_vlan.h>
26#include <linux/netdevice.h>
27#include <linux/netdev_features.h>
28#include <linux/skbuff.h>
aec45e85 29#include <linux/vmalloc.h>
6d69b1f1 30
b3332930 31#include <net/iucv/af_iucv.h>
290b8348 32#include <net/dsfield.h>
4a71df50 33
ab4227cb 34#include <asm/ebcdic.h>
2bf29df7 35#include <asm/chpid.h>
ab4227cb 36#include <asm/io.h>
1da74b1c 37#include <asm/sysinfo.h>
ec61bd2f
JW		 38#include <asm/diag.h>
39#include <asm/cio.h>
40#include <asm/ccwdev.h>
615dff22 41#include <asm/cpcmd.h>
4a71df50
FB		 42
43#include "qeth_core.h"
4a71df50 44
d11ba0c4
PT		 45struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
46 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
47 /* N P A M L V H */
48 [QETH_DBF_SETUP] = {"qeth_setup",
49 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 50 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
51 &debug_sprintf_view, NULL},
d11ba0c4
PT		 52 [QETH_DBF_CTRL] = {"qeth_control",
53 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
54};
55EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50 56
683d718a
FB		 57struct kmem_cache *qeth_core_header_cache;
58EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 59static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 60
61static struct device *qeth_core_root_dev;
4a71df50 62static struct lock_class_key qdio_out_skb_queue_key;
4a71df50 63
8f6637b8
JW		 64static void qeth_send_control_data_cb(struct qeth_card *card,
65 struct qeth_channel *channel,
66 struct qeth_cmd_buffer *iob);
4a71df50 67static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
4a71df50
FB		 68static void qeth_free_buffer_pool(struct qeth_card *);
69static int qeth_qdio_establish(struct qeth_card *);
0da9581d 70static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 71static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
72 struct qeth_qdio_out_buffer *buf,
73 enum iucv_tx_notify notification);
74static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
72861ae7 75static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 76
b4d72c08 77struct workqueue_struct *qeth_wq;
c044dc21 78EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 79
511c2445
EC		 80int qeth_card_hw_is_reachable(struct qeth_card *card)
81{
82 return (card->state == CARD_STATE_SOFTSETUP) ||
83 (card->state == CARD_STATE_UP);
84}
85EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
86
0f54761d
SR		 87static void qeth_close_dev_handler(struct work_struct *work)
88{
89 struct qeth_card *card;
90
91 card = container_of(work, struct qeth_card, close_dev_work);
92 QETH_CARD_TEXT(card, 2, "cldevhdl");
93 rtnl_lock();
94 dev_close(card->dev);
95 rtnl_unlock();
96 ccwgroup_set_offline(card->gdev);
97}
98
99void qeth_close_dev(struct qeth_card *card)
100{
101 QETH_CARD_TEXT(card, 2, "cldevsubm");
102 queue_work(qeth_wq, &card->close_dev_work);
103}
104EXPORT_SYMBOL_GPL(qeth_close_dev);
105
cef6ff22 106static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 107{
108 if (card->info.guestlan) {
109 switch (card->info.type) {
5113fec0 110 case QETH_CARD_TYPE_OSD:
7096b187 111 return " Virtual NIC QDIO";
4a71df50 112 case QETH_CARD_TYPE_IQD:
7096b187 113 return " Virtual NIC Hiper";
5113fec0 114 case QETH_CARD_TYPE_OSM:
7096b187 115 return " Virtual NIC QDIO - OSM";
5113fec0 116 case QETH_CARD_TYPE_OSX:
7096b187 117 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 118 default:
119 return " unknown";
120 }
121 } else {
122 switch (card->info.type) {
5113fec0 123 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 124 return " OSD Express";
125 case QETH_CARD_TYPE_IQD:
126 return " HiperSockets";
127 case QETH_CARD_TYPE_OSN:
128 return " OSN QDIO";
5113fec0
UB		 129 case QETH_CARD_TYPE_OSM:
130 return " OSM QDIO";
131 case QETH_CARD_TYPE_OSX:
132 return " OSX QDIO";
4a71df50
FB		 133 default:
134 return " unknown";
135 }
136 }
137 return " n/a";
138}
139
140/* max length to be returned: 14 */
141const char *qeth_get_cardname_short(struct qeth_card *card)
142{
143 if (card->info.guestlan) {
144 switch (card->info.type) {
5113fec0 145 case QETH_CARD_TYPE_OSD:
7096b187 146 return "Virt.NIC QDIO";
4a71df50 147 case QETH_CARD_TYPE_IQD:
7096b187 148 return "Virt.NIC Hiper";
5113fec0 149 case QETH_CARD_TYPE_OSM:
7096b187 150 return "Virt.NIC OSM";
5113fec0 151 case QETH_CARD_TYPE_OSX:
7096b187 152 return "Virt.NIC OSX";
4a71df50
FB		 153 default:
154 return "unknown";
155 }
156 } else {
157 switch (card->info.type) {
5113fec0 158 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 159 switch (card->info.link_type) {
160 case QETH_LINK_TYPE_FAST_ETH:
161 return "OSD_100";
162 case QETH_LINK_TYPE_HSTR:
163 return "HSTR";
164 case QETH_LINK_TYPE_GBIT_ETH:
165 return "OSD_1000";
166 case QETH_LINK_TYPE_10GBIT_ETH:
167 return "OSD_10GIG";
54e049c2
JW		 168 case QETH_LINK_TYPE_25GBIT_ETH:
169 return "OSD_25GIG";
4a71df50
FB		 170 case QETH_LINK_TYPE_LANE_ETH100:
171 return "OSD_FE_LANE";
172 case QETH_LINK_TYPE_LANE_TR:
173 return "OSD_TR_LANE";
174 case QETH_LINK_TYPE_LANE_ETH1000:
175 return "OSD_GbE_LANE";
176 case QETH_LINK_TYPE_LANE:
177 return "OSD_ATM_LANE";
178 default:
179 return "OSD_Express";
180 }
181 case QETH_CARD_TYPE_IQD:
182 return "HiperSockets";
183 case QETH_CARD_TYPE_OSN:
184 return "OSN";
5113fec0
UB		 185 case QETH_CARD_TYPE_OSM:
186 return "OSM_1000";
187 case QETH_CARD_TYPE_OSX:
188 return "OSX_10GIG";
4a71df50
FB		 189 default:
190 return "unknown";
191 }
192 }
193 return "n/a";
194}
195
65d8013c
SR		 196void qeth_set_recovery_task(struct qeth_card *card)
197{
198 card->recovery_task = current;
199}
200EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
201
202void qeth_clear_recovery_task(struct qeth_card *card)
203{
204 card->recovery_task = NULL;
205}
206EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
207
208static bool qeth_is_recovery_task(const struct qeth_card *card)
209{
210 return card->recovery_task == current;
211}
212
4a71df50
FB		 213void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
214 int clear_start_mask)
215{
216 unsigned long flags;
217
218 spin_lock_irqsave(&card->thread_mask_lock, flags);
219 card->thread_allowed_mask = threads;
220 if (clear_start_mask)
221 card->thread_start_mask &= threads;
222 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
223 wake_up(&card->wait_q);
224}
225EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
226
227int qeth_threads_running(struct qeth_card *card, unsigned long threads)
228{
229 unsigned long flags;
230 int rc = 0;
231
232 spin_lock_irqsave(&card->thread_mask_lock, flags);
233 rc = (card->thread_running_mask & threads);
234 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
235 return rc;
236}
237EXPORT_SYMBOL_GPL(qeth_threads_running);
238
239int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
240{
65d8013c
SR		 241 if (qeth_is_recovery_task(card))
242 return 0;
4a71df50
FB		 243 return wait_event_interruptible(card->wait_q,
244 qeth_threads_running(card, threads) == 0);
245}
246EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
247
248void qeth_clear_working_pool_list(struct qeth_card *card)
249{
250 struct qeth_buffer_pool_entry *pool_entry, *tmp;
251
847a50fd 252 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 253 list_for_each_entry_safe(pool_entry, tmp,
254 &card->qdio.in_buf_pool.entry_list, list){
255 list_del(&pool_entry->list);
256 }
257}
258EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
259
260static int qeth_alloc_buffer_pool(struct qeth_card *card)
261{
262 struct qeth_buffer_pool_entry *pool_entry;
263 void *ptr;
264 int i, j;
265
847a50fd 266 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 267 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 268 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 269 if (!pool_entry) {
270 qeth_free_buffer_pool(card);
271 return -ENOMEM;
272 }
273 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 274 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 275 if (!ptr) {
276 while (j > 0)
277 free_page((unsigned long)
278 pool_entry->elements[--j]);
279 kfree(pool_entry);
280 qeth_free_buffer_pool(card);
281 return -ENOMEM;
282 }
283 pool_entry->elements[j] = ptr;
284 }
285 list_add(&pool_entry->init_list,
286 &card->qdio.init_pool.entry_list);
287 }
288 return 0;
289}
290
291int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
292{
847a50fd 293 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 294
295 if ((card->state != CARD_STATE_DOWN) &&
296 (card->state != CARD_STATE_RECOVER))
297 return -EPERM;
298
299 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
300 qeth_clear_working_pool_list(card);
301 qeth_free_buffer_pool(card);
302 card->qdio.in_buf_pool.buf_count = bufcnt;
303 card->qdio.init_pool.buf_count = bufcnt;
304 return qeth_alloc_buffer_pool(card);
305}
76b11f8e 306EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 307
4601ba6c
SO		 308static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
309{
6d284bde
SO		 310 if (!q)
311 return;
312
313 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 314 kfree(q);
315}
316
317static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
318{
319 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
320 int i;
321
322 if (!q)
323 return NULL;
324
6d284bde
SO		 325 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
326 kfree(q);
327 return NULL;
328 }
329
4601ba6c 330 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 331 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 332
333 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
334 return q;
335}
336
cef6ff22 337static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 338{
339 int rc;
340
341 if (card->options.cq == QETH_CQ_ENABLED) {
342 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 343 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
344 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 345 card->qdio.c_q->next_buf_to_init = 127;
346 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
347 card->qdio.no_in_queues - 1, 0,
348 127);
349 if (rc) {
350 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
351 goto out;
352 }
353 }
354 rc = 0;
355out:
356 return rc;
357}
358
cef6ff22 359static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 360{
361 int rc;
362
363 if (card->options.cq == QETH_CQ_ENABLED) {
364 int i;
365 struct qdio_outbuf_state *outbuf_states;
366
367 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 368 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 369 if (!card->qdio.c_q) {
370 rc = -1;
371 goto kmsg_out;
372 }
0da9581d 373 card->qdio.no_in_queues = 2;
4a912f98 374 card->qdio.out_bufstates =
6396bb22
KC		 375 kcalloc(card->qdio.no_out_queues *
376 QDIO_MAX_BUFFERS_PER_Q,
377 sizeof(struct qdio_outbuf_state),
378 GFP_KERNEL);
0da9581d
EL		 379 outbuf_states = card->qdio.out_bufstates;
380 if (outbuf_states == NULL) {
381 rc = -1;
382 goto free_cq_out;
383 }
384 for (i = 0; i < card->qdio.no_out_queues; ++i) {
385 card->qdio.out_qs[i]->bufstates = outbuf_states;
386 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
387 }
388 } else {
389 QETH_DBF_TEXT(SETUP, 2, "nocq");
390 card->qdio.c_q = NULL;
391 card->qdio.no_in_queues = 1;
392 }
393 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
394 rc = 0;
395out:
396 return rc;
397free_cq_out:
4601ba6c 398 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 399 card->qdio.c_q = NULL;
400kmsg_out:
401 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
402 goto out;
403}
404
cef6ff22 405static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 406{
407 if (card->qdio.c_q) {
408 --card->qdio.no_in_queues;
4601ba6c 409 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 410 card->qdio.c_q = NULL;
411 }
412 kfree(card->qdio.out_bufstates);
413 card->qdio.out_bufstates = NULL;
414}
415
cef6ff22
JW		 416static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
417 int delayed)
418{
b3332930
FB		 419 enum iucv_tx_notify n;
420
421 switch (sbalf15) {
422 case 0:
423 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
424 break;
425 case 4:
426 case 16:
427 case 17:
428 case 18:
429 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
430 TX_NOTIFY_UNREACHABLE;
431 break;
432 default:
433 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
434 TX_NOTIFY_GENERALERROR;
435 break;
436 }
437
438 return n;
439}
440
cef6ff22
JW		 441static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
442 int forced_cleanup)
0da9581d 443{
72861ae7
EL		 444 if (q->card->options.cq != QETH_CQ_ENABLED)
445 return;
446
0da9581d
EL		 447 if (q->bufs[bidx]->next_pending != NULL) {
448 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
449 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
450
451 while (c) {
452 if (forced_cleanup ||
453 atomic_read(&c->state) ==
454 QETH_QDIO_BUF_HANDLED_DELAYED) {
455 struct qeth_qdio_out_buffer *f = c;
456 QETH_CARD_TEXT(f->q->card, 5, "fp");
457 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 458 /* release here to avoid interleaving between
459 outbound tasklet and inbound tasklet
460 regarding notifications and lifecycle */
461 qeth_release_skbs(c);
462
0da9581d 463 c = f->next_pending;
18af5c17 464 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 465 head->next_pending = c;
466 kmem_cache_free(qeth_qdio_outbuf_cache, f);
467 } else {
468 head = c;
469 c = c->next_pending;
470 }
471
472 }
473 }
72861ae7
EL		 474 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
475 QETH_QDIO_BUF_HANDLED_DELAYED)) {
476 /* for recovery situations */
72861ae7
EL		 477 qeth_init_qdio_out_buf(q, bidx);
478 QETH_CARD_TEXT(q->card, 2, "clprecov");
479 }
0da9581d
EL		 480}
481
482
cef6ff22
JW		 483static void qeth_qdio_handle_aob(struct qeth_card *card,
484 unsigned long phys_aob_addr)
485{
0da9581d
EL		 486 struct qaob *aob;
487 struct qeth_qdio_out_buffer *buffer;
b3332930 488 enum iucv_tx_notify notification;
ce28867f 489 unsigned int i;
0da9581d
EL		 490
491 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
492 QETH_CARD_TEXT(card, 5, "haob");
493 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
494 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
495 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
496
b3332930
FB		 497 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
498 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
499 notification = TX_NOTIFY_OK;
500 } else {
18af5c17
SR		 501 WARN_ON_ONCE(atomic_read(&buffer->state) !=
502 QETH_QDIO_BUF_PENDING);
b3332930
FB		 503 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
504 notification = TX_NOTIFY_DELAYED_OK;
505 }
506
507 if (aob->aorc != 0) {
508 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
509 notification = qeth_compute_cq_notification(aob->aorc, 1);
510 }
511 qeth_notify_skbs(buffer->q, buffer, notification);
512
ce28867f
JW		 513 /* Free dangling allocations. The attached skbs are handled by
514 * qeth_cleanup_handled_pending().
515 */
516 for (i = 0;
517 i < aob->sb_count && i < QETH_MAX_BUFFER_ELEMENTS(card);
518 i++) {
519 if (aob->sba[i] && buffer->is_header[i])
520 kmem_cache_free(qeth_core_header_cache,
521 (void *) aob->sba[i]);
522 }
523 atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
72861ae7 524
0da9581d
EL		 525 qdio_release_aob(aob);
526}
527
528static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
529{
530 return card->options.cq == QETH_CQ_ENABLED &&
531 card->qdio.c_q != NULL &&
532 queue != 0 &&
533 queue == card->qdio.no_in_queues - 1;
534}
535
45ca2fd6
JW		 536static void qeth_setup_ccw(struct ccw1 *ccw, u8 cmd_code, u32 len, void *data)
537{
538 ccw->cmd_code = cmd_code;
539 ccw->flags = CCW_FLAG_SLI;
540 ccw->count = len;
541 ccw->cda = (__u32) __pa(data);
542}
543
17bf8c9b 544static int __qeth_issue_next_read(struct qeth_card *card)
4a71df50 545{
750b1625 546 struct qeth_channel *channel = &card->read;
4a71df50 547 struct qeth_cmd_buffer *iob;
750b1625 548 int rc;
4a71df50 549
847a50fd 550 QETH_CARD_TEXT(card, 5, "issnxrd");
750b1625 551 if (channel->state != CH_STATE_UP)
4a71df50 552 return -EIO;
750b1625 553 iob = qeth_get_buffer(channel);
4a71df50 554 if (!iob) {
74eacdb9
FB		 555 dev_warn(&card->gdev->dev, "The qeth device driver "
556 "failed to recover an error on the device\n");
e19e5be8
JW		 557 QETH_DBF_MESSAGE(2, "issue_next_read on device %x failed: no iob available\n",
558 CARD_DEVID(card));
4a71df50
FB		 559 return -ENOMEM;
560 }
f15cdaf2 561 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
847a50fd 562 QETH_CARD_TEXT(card, 6, "noirqpnd");
f15cdaf2 563 rc = ccw_device_start(channel->ccwdev, channel->ccw,
4a71df50
FB		 564 (addr_t) iob, 0, 0);
565 if (rc) {
e19e5be8
JW		 566 QETH_DBF_MESSAGE(2, "error %i on device %x when starting next read ccw!\n",
567 rc, CARD_DEVID(card));
750b1625 568 atomic_set(&channel->irq_pending, 0);
908abbb5 569 card->read_or_write_problem = 1;
4a71df50
FB		 570 qeth_schedule_recovery(card);
571 wake_up(&card->wait_q);
572 }
573 return rc;
574}
575
17bf8c9b
JW		 576static int qeth_issue_next_read(struct qeth_card *card)
577{
578 int ret;
579
580 spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
581 ret = __qeth_issue_next_read(card);
582 spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
583
584 return ret;
585}
586
4a71df50
FB		 587static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
588{
589 struct qeth_reply *reply;
590
591 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
592 if (reply) {
ae695927 593 refcount_set(&reply->refcnt, 1);
4a71df50 594 atomic_set(&reply->received, 0);
6531084c 595 }
4a71df50
FB		 596 return reply;
597}
598
599static void qeth_get_reply(struct qeth_reply *reply)
600{
ae695927 601 refcount_inc(&reply->refcnt);
4a71df50
FB		 602}
603
604static void qeth_put_reply(struct qeth_reply *reply)
605{
ae695927 606 if (refcount_dec_and_test(&reply->refcnt))
4a71df50
FB		 607 kfree(reply);
608}
609
d11ba0c4 610static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 611 struct qeth_card *card)
612{
048a7f8b 613 const char *ipa_name;
d11ba0c4 614 int com = cmd->hdr.command;
4a71df50 615 ipa_name = qeth_get_ipa_cmd_name(com);
e19e5be8 616
d11ba0c4 617 if (rc)
e19e5be8
JW		 618 QETH_DBF_MESSAGE(2, "IPA: %s(%#x) for device %x returned %#x \"%s\"\n",
619 ipa_name, com, CARD_DEVID(card), rc,
620 qeth_get_ipa_msg(rc));
d11ba0c4 621 else
e19e5be8
JW		 622 QETH_DBF_MESSAGE(5, "IPA: %s(%#x) for device %x succeeded\n",
623 ipa_name, com, CARD_DEVID(card));
4a71df50
FB		 624}
625
626static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
d19b93f4 627 struct qeth_ipa_cmd *cmd)
4a71df50 628{
847a50fd 629 QETH_CARD_TEXT(card, 5, "chkipad");
d19b93f4
JW		 630
631 if (IS_IPA_REPLY(cmd)) {
632 if (cmd->hdr.command != IPA_CMD_SETCCID &&
633 cmd->hdr.command != IPA_CMD_DELCCID &&
634 cmd->hdr.command != IPA_CMD_MODCCID &&
635 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
636 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
637 return cmd;
638 }
639
640 /* handle unsolicited event: */
641 switch (cmd->hdr.command) {
642 case IPA_CMD_STOPLAN:
643 if (cmd->hdr.return_code == IPA_RC_VEPA_TO_VEB_TRANSITION) {
644 dev_err(&card->gdev->dev,
645 "Interface %s is down because the adjacent port is no longer in reflective relay mode\n",
646 QETH_CARD_IFNAME(card));
647 qeth_close_dev(card);
4a71df50 648 } else {
d19b93f4
JW		 649 dev_warn(&card->gdev->dev,
650 "The link for interface %s on CHPID 0x%X failed\n",
651 QETH_CARD_IFNAME(card), card->info.chpid);
652 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
91cc98f5 653 netif_carrier_off(card->dev);
4a71df50 654 }
d19b93f4
JW		 655 return NULL;
656 case IPA_CMD_STARTLAN:
657 dev_info(&card->gdev->dev,
658 "The link for %s on CHPID 0x%X has been restored\n",
659 QETH_CARD_IFNAME(card), card->info.chpid);
d19b93f4
JW		 660 if (card->info.hwtrap)
661 card->info.hwtrap = 2;
662 qeth_schedule_recovery(card);
663 return NULL;
664 case IPA_CMD_SETBRIDGEPORT_IQD:
665 case IPA_CMD_SETBRIDGEPORT_OSA:
666 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
667 if (card->discipline->control_event_handler(card, cmd))
668 return cmd;
669 return NULL;
670 case IPA_CMD_MODCCID:
671 return cmd;
672 case IPA_CMD_REGISTER_LOCAL_ADDR:
673 QETH_CARD_TEXT(card, 3, "irla");
674 return NULL;
675 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
676 QETH_CARD_TEXT(card, 3, "urla");
677 return NULL;
678 default:
679 QETH_DBF_MESSAGE(2, "Received data is IPA but not a reply!\n");
680 return cmd;
4a71df50 681 }
4a71df50
FB		 682}
683
684void qeth_clear_ipacmd_list(struct qeth_card *card)
685{
686 struct qeth_reply *reply, *r;
687 unsigned long flags;
688
847a50fd 689 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 690
691 spin_lock_irqsave(&card->lock, flags);
692 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
693 qeth_get_reply(reply);
694 reply->rc = -EIO;
695 atomic_inc(&reply->received);
696 list_del_init(&reply->list);
697 wake_up(&reply->wait_q);
698 qeth_put_reply(reply);
699 }
700 spin_unlock_irqrestore(&card->lock, flags);
701}
702EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
703
5113fec0
UB		 704static int qeth_check_idx_response(struct qeth_card *card,
705 unsigned char *buffer)
4a71df50
FB		 706{
707 if (!buffer)
708 return 0;
709
d11ba0c4 710 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 711 if ((buffer[2] & 0xc0) == 0xc0) {
e19e5be8 712 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#04x\n",
d857e111 713 buffer[4]);
847a50fd
CO		 714 QETH_CARD_TEXT(card, 2, "ckidxres");
715 QETH_CARD_TEXT(card, 2, " idxterm");
716 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 717 if (buffer[4] == 0xf6) {
718 dev_err(&card->gdev->dev,
719 "The qeth device is not configured "
720 "for the OSI layer required by z/VM\n");
721 return -EPERM;
722 }
4a71df50
FB		 723 return -EIO;
724 }
725 return 0;
726}
727
4a71df50
FB		 728static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
729{
730 __u8 index;
731
4a71df50
FB		 732 index = channel->io_buf_no;
733 do {
734 if (channel->iob[index].state == BUF_STATE_FREE) {
735 channel->iob[index].state = BUF_STATE_LOCKED;
736 channel->io_buf_no = (channel->io_buf_no + 1) %
737 QETH_CMD_BUFFER_NO;
738 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
739 return channel->iob + index;
740 }
741 index = (index + 1) % QETH_CMD_BUFFER_NO;
742 } while (index != channel->io_buf_no);
743
744 return NULL;
745}
746
747void qeth_release_buffer(struct qeth_channel *channel,
748 struct qeth_cmd_buffer *iob)
749{
750 unsigned long flags;
751
4a71df50 752 spin_lock_irqsave(&channel->iob_lock, flags);
4a71df50
FB		 753 iob->state = BUF_STATE_FREE;
754 iob->callback = qeth_send_control_data_cb;
755 iob->rc = 0;
756 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 757 wake_up(&channel->wait_q);
4a71df50
FB		 758}
759EXPORT_SYMBOL_GPL(qeth_release_buffer);
760
8f6637b8
JW		 761static void qeth_release_buffer_cb(struct qeth_card *card,
762 struct qeth_channel *channel,
763 struct qeth_cmd_buffer *iob)
764{
765 qeth_release_buffer(channel, iob);
766}
767
4a71df50
FB		 768static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
769{
770 struct qeth_cmd_buffer *buffer = NULL;
771 unsigned long flags;
772
773 spin_lock_irqsave(&channel->iob_lock, flags);
774 buffer = __qeth_get_buffer(channel);
775 spin_unlock_irqrestore(&channel->iob_lock, flags);
776 return buffer;
777}
778
779struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
780{
781 struct qeth_cmd_buffer *buffer;
782 wait_event(channel->wait_q,
783 ((buffer = qeth_get_buffer(channel)) != NULL));
784 return buffer;
785}
786EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
787
788void qeth_clear_cmd_buffers(struct qeth_channel *channel)
789{
790 int cnt;
791
792 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
793 qeth_release_buffer(channel, &channel->iob[cnt]);
4a71df50
FB		 794 channel->io_buf_no = 0;
795}
796EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
797
8f6637b8
JW		 798static void qeth_send_control_data_cb(struct qeth_card *card,
799 struct qeth_channel *channel,
800 struct qeth_cmd_buffer *iob)
4a71df50 801{
d19b93f4 802 struct qeth_ipa_cmd *cmd = NULL;
4a71df50 803 struct qeth_reply *reply, *r;
4a71df50
FB		 804 unsigned long flags;
805 int keep_reply;
5113fec0 806 int rc = 0;
4a71df50 807
847a50fd 808 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 809 rc = qeth_check_idx_response(card, iob->data);
810 switch (rc) {
811 case 0:
812 break;
813 case -EIO:
4a71df50 814 qeth_clear_ipacmd_list(card);
5113fec0 815 qeth_schedule_recovery(card);
01fc3e86 816 /* fall through */
5113fec0 817 default:
4a71df50
FB		 818 goto out;
819 }
820
d19b93f4
JW		 821 if (IS_IPA(iob->data)) {
822 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
823 cmd = qeth_check_ipa_data(card, cmd);
d782d80f
JW		 824 if (!cmd)
825 goto out;
826 if (IS_OSN(card) && card->osn_info.assist_cb &&
827 cmd->hdr.command != IPA_CMD_STARTLAN) {
828 card->osn_info.assist_cb(card->dev, cmd);
829 goto out;
830 }
831 } else {
832 /* non-IPA commands should only flow during initialization */
833 if (card->state != CARD_STATE_DOWN)
834 goto out;
4a71df50
FB		 835 }
836
837 spin_lock_irqsave(&card->lock, flags);
838 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
839 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
840 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
841 qeth_get_reply(reply);
842 list_del_init(&reply->list);
843 spin_unlock_irqrestore(&card->lock, flags);
844 keep_reply = 0;
845 if (reply->callback != NULL) {
846 if (cmd) {
847 reply->offset = (__u16)((char *)cmd -
848 (char *)iob->data);
849 keep_reply = reply->callback(card,
850 reply,
851 (unsigned long)cmd);
852 } else
853 keep_reply = reply->callback(card,
854 reply,
855 (unsigned long)iob);
856 }
857 if (cmd)
858 reply->rc = (u16) cmd->hdr.return_code;
859 else if (iob->rc)
860 reply->rc = iob->rc;
861 if (keep_reply) {
862 spin_lock_irqsave(&card->lock, flags);
863 list_add_tail(&reply->list,
864 &card->cmd_waiter_list);
865 spin_unlock_irqrestore(&card->lock, flags);
866 } else {
867 atomic_inc(&reply->received);
868 wake_up(&reply->wait_q);
869 }
870 qeth_put_reply(reply);
871 goto out;
872 }
873 }
874 spin_unlock_irqrestore(&card->lock, flags);
875out:
876 memcpy(&card->seqno.pdu_hdr_ack,
877 QETH_PDU_HEADER_SEQ_NO(iob->data),
878 QETH_SEQ_NO_LENGTH);
879 qeth_release_buffer(channel, iob);
880}
881
4a71df50
FB		 882static int qeth_set_thread_start_bit(struct qeth_card *card,
883 unsigned long thread)
884{
885 unsigned long flags;
886
887 spin_lock_irqsave(&card->thread_mask_lock, flags);
888 if (!(card->thread_allowed_mask & thread) ||
889 (card->thread_start_mask & thread)) {
890 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
891 return -EPERM;
892 }
893 card->thread_start_mask |= thread;
894 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
895 return 0;
896}
897
898void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
899{
900 unsigned long flags;
901
902 spin_lock_irqsave(&card->thread_mask_lock, flags);
903 card->thread_start_mask &= ~thread;
904 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
905 wake_up(&card->wait_q);
906}
907EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
908
909void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
910{
911 unsigned long flags;
912
913 spin_lock_irqsave(&card->thread_mask_lock, flags);
914 card->thread_running_mask &= ~thread;
915 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1063e432 916 wake_up_all(&card->wait_q);
4a71df50
FB		 917}
918EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
919
920static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
921{
922 unsigned long flags;
923 int rc = 0;
924
925 spin_lock_irqsave(&card->thread_mask_lock, flags);
926 if (card->thread_start_mask & thread) {
927 if ((card->thread_allowed_mask & thread) &&
928 !(card->thread_running_mask & thread)) {
929 rc = 1;
930 card->thread_start_mask &= ~thread;
931 card->thread_running_mask |= thread;
932 } else
933 rc = -EPERM;
934 }
935 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
936 return rc;
937}
938
939int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
940{
941 int rc = 0;
942
943 wait_event(card->wait_q,
944 (rc = __qeth_do_run_thread(card, thread)) >= 0);
945 return rc;
946}
947EXPORT_SYMBOL_GPL(qeth_do_run_thread);
948
949void qeth_schedule_recovery(struct qeth_card *card)
950{
847a50fd 951 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 952 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
953 schedule_work(&card->kernel_thread_starter);
954}
955EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
956
8d908eb0
JW		 957static int qeth_get_problem(struct qeth_card *card, struct ccw_device *cdev,
958 struct irb *irb)
4a71df50
FB		 959{
960 int dstat, cstat;
961 char *sense;
962
963 sense = (char *) irb->ecw;
23d805b6
PO		 964 cstat = irb->scsw.cmd.cstat;
965 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 966
967 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
968 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
969 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 970 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 971 dev_warn(&cdev->dev, "The qeth device driver "
972 "failed to recover an error on the device\n");
e19e5be8
JW		 973 QETH_DBF_MESSAGE(2, "check on channel %x with dstat=%#x, cstat=%#x\n",
974 CCW_DEVID(cdev), dstat, cstat);
4a71df50
FB		 975 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
976 16, 1, irb, 64, 1);
977 return 1;
978 }
979
980 if (dstat & DEV_STAT_UNIT_CHECK) {
981 if (sense[SENSE_RESETTING_EVENT_BYTE] &
982 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 983 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 984 return 1;
985 }
986 if (sense[SENSE_COMMAND_REJECT_BYTE] &
987 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 988 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 989 return 1;
4a71df50
FB		 990 }
991 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 992 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 993 return 1;
994 }
995 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 996 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 997 return 0;
998 }
847a50fd 999 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1000 return 1;
1001 }
1002 return 0;
1003}
1004
8d908eb0
JW		 1005static long qeth_check_irb_error(struct qeth_card *card,
1006 struct ccw_device *cdev, unsigned long intparm,
1007 struct irb *irb)
4a71df50 1008{
8d908eb0 1009 if (!IS_ERR(irb))
4a71df50
FB		 1010 return 0;
1011
1012 switch (PTR_ERR(irb)) {
1013 case -EIO:
e19e5be8
JW		 1014 QETH_DBF_MESSAGE(2, "i/o-error on channel %x\n",
1015 CCW_DEVID(cdev));
847a50fd
CO		 1016 QETH_CARD_TEXT(card, 2, "ckirberr");
1017 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1018 break;
1019 case -ETIMEDOUT:
74eacdb9
FB		 1020 dev_warn(&cdev->dev, "A hardware operation timed out"
1021 " on the device\n");
847a50fd
CO		 1022 QETH_CARD_TEXT(card, 2, "ckirberr");
1023 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1024 if (intparm == QETH_RCD_PARM) {
e95051ff 1025 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1026 card->data.state = CH_STATE_DOWN;
1027 wake_up(&card->wait_q);
1028 }
1029 }
1030 break;
1031 default:
e19e5be8
JW		 1032 QETH_DBF_MESSAGE(2, "unknown error %ld on channel %x\n",
1033 PTR_ERR(irb), CCW_DEVID(cdev));
847a50fd
CO		 1034 QETH_CARD_TEXT(card, 2, "ckirberr");
1035 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1036 }
1037 return PTR_ERR(irb);
1038}
1039
1040static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1041 struct irb *irb)
1042{
1043 int rc;
1044 int cstat, dstat;
db71bbbd 1045 struct qeth_cmd_buffer *iob = NULL;
8d908eb0 1046 struct ccwgroup_device *gdev;
4a71df50
FB		 1047 struct qeth_channel *channel;
1048 struct qeth_card *card;
4a71df50 1049
8d908eb0
JW		 1050 /* while we hold the ccwdev lock, this stays valid: */
1051 gdev = dev_get_drvdata(&cdev->dev);
1052 card = dev_get_drvdata(&gdev->dev);
4a71df50
FB		 1053 if (!card)
1054 return;
1055
847a50fd
CO		 1056 QETH_CARD_TEXT(card, 5, "irq");
1057
4a71df50
FB		 1058 if (card->read.ccwdev == cdev) {
1059 channel = &card->read;
847a50fd 1060 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1061 } else if (card->write.ccwdev == cdev) {
1062 channel = &card->write;
847a50fd 1063 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1064 } else {
1065 channel = &card->data;
847a50fd 1066 QETH_CARD_TEXT(card, 5, "data");
4a71df50 1067 }
db71bbbd
JW		 1068
1069 if (qeth_intparm_is_iob(intparm))
1070 iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1071
8d908eb0 1072 if (qeth_check_irb_error(card, cdev, intparm, irb)) {
db71bbbd
JW		 1073 /* IO was terminated, free its resources. */
1074 if (iob)
1075 qeth_release_buffer(iob->channel, iob);
1076 atomic_set(&channel->irq_pending, 0);
1077 wake_up(&card->wait_q);
1078 return;
1079 }
1080
4a71df50
FB		 1081 atomic_set(&channel->irq_pending, 0);
1082
23d805b6 1083 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1084 channel->state = CH_STATE_STOPPED;
1085
23d805b6 1086 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1087 channel->state = CH_STATE_HALTED;
1088
1089 /*let's wake up immediately on data channel*/
1090 if ((channel == &card->data) && (intparm != 0) &&
1091 (intparm != QETH_RCD_PARM))
1092 goto out;
1093
1094 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1095 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1096 /* we don't have to handle this further */
1097 intparm = 0;
1098 }
1099 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1100 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1101 /* we don't have to handle this further */
1102 intparm = 0;
1103 }
db71bbbd
JW		 1104
1105 cstat = irb->scsw.cmd.cstat;
1106 dstat = irb->scsw.cmd.dstat;
1107
4a71df50
FB		 1108 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1109 (dstat & DEV_STAT_UNIT_CHECK) ||
1110 (cstat)) {
1111 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1112 dev_warn(&channel->ccwdev->dev,
1113 "The qeth device driver failed to recover "
1114 "an error on the device\n");
e19e5be8
JW		 1115 QETH_DBF_MESSAGE(2, "sense data available on channel %x: cstat %#X dstat %#X\n",
1116 CCW_DEVID(channel->ccwdev), cstat,
1117 dstat);
4a71df50
FB		 1118 print_hex_dump(KERN_WARNING, "qeth: irb ",
1119 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1120 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1121 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1122 }
1123 if (intparm == QETH_RCD_PARM) {
1124 channel->state = CH_STATE_DOWN;
1125 goto out;
1126 }
8d908eb0 1127 rc = qeth_get_problem(card, cdev, irb);
4a71df50 1128 if (rc) {
a6c3d939 1129 card->read_or_write_problem = 1;
28a7e4c9 1130 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1131 qeth_schedule_recovery(card);
1132 goto out;
1133 }
1134 }
1135
1136 if (intparm == QETH_RCD_PARM) {
1137 channel->state = CH_STATE_RCD_DONE;
1138 goto out;
1139 }
4a71df50
FB		 1140 if (channel == &card->data)
1141 return;
1142 if (channel == &card->read &&
1143 channel->state == CH_STATE_UP)
17bf8c9b 1144 __qeth_issue_next_read(card);
4a71df50 1145
db71bbbd 1146 if (iob && iob->callback)
8f6637b8 1147 iob->callback(card, iob->channel, iob);
4a71df50 1148
4a71df50
FB		 1149out:
1150 wake_up(&card->wait_q);
1151 return;
1152}
1153
b3332930 1154static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1155 struct qeth_qdio_out_buffer *buf,
b3332930 1156 enum iucv_tx_notify notification)
4a71df50 1157{
4a71df50
FB		 1158 struct sk_buff *skb;
1159
dc149e37 1160 skb_queue_walk(&buf->skb_list, skb) {
b3332930
FB		 1161 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1162 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6a3123d0
JW		 1163 if (skb->protocol == htons(ETH_P_AF_IUCV) && skb->sk)
1164 iucv_sk(skb->sk)->sk_txnotify(skb, notification);
b3332930 1165 }
b3332930
FB		 1166}
1167
1168static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1169{
72861ae7 1170 /* release may never happen from within CQ tasklet scope */
18af5c17 1171 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1172
6a3123d0
JW		 1173 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1174 qeth_notify_skbs(buf->q, buf, TX_NOTIFY_GENERALERROR);
1175
dc149e37 1176 __skb_queue_purge(&buf->skb_list);
b3332930
FB		 1177}
1178
1179static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
3b346c18 1180 struct qeth_qdio_out_buffer *buf)
b3332930
FB		 1181{
1182 int i;
1183
1184 /* is PCI flag set on buffer? */
1185 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1186 atomic_dec(&queue->set_pci_flags_count);
1187
3b346c18
JW		 1188 qeth_release_skbs(buf);
1189
4a71df50 1190 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1191 if (buf->buffer->element[i].addr && buf->is_header[i])
1192 kmem_cache_free(qeth_core_header_cache,
1193 buf->buffer->element[i].addr);
1194 buf->is_header[i] = 0;
4a71df50 1195 }
3b346c18
JW		 1196
1197 qeth_scrub_qdio_buffer(buf->buffer,
1198 QETH_MAX_BUFFER_ELEMENTS(queue->card));
4a71df50 1199 buf->next_element_to_fill = 0;
3b346c18 1200 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
0da9581d
EL		 1201}
1202
1203static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1204{
1205 int j;
1206
1207 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1208 if (!q->bufs[j])
1209 continue;
72861ae7 1210 qeth_cleanup_handled_pending(q, j, 1);
3b346c18 1211 qeth_clear_output_buffer(q, q->bufs[j]);
0da9581d
EL		 1212 if (free) {
1213 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1214 q->bufs[j] = NULL;
1215 }
1216 }
4a71df50
FB		 1217}
1218
1219void qeth_clear_qdio_buffers(struct qeth_card *card)
1220{
0da9581d 1221 int i;
4a71df50 1222
847a50fd 1223 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1224 /* clear outbound buffers to free skbs */
0da9581d 1225 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1226 if (card->qdio.out_qs[i]) {
0da9581d 1227 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1228 }
0da9581d 1229 }
4a71df50
FB		 1230}
1231EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1232
1233static void qeth_free_buffer_pool(struct qeth_card *card)
1234{
1235 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1236 int i = 0;
4a71df50
FB		 1237 list_for_each_entry_safe(pool_entry, tmp,
1238 &card->qdio.init_pool.entry_list, init_list){
1239 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1240 free_page((unsigned long)pool_entry->elements[i]);
1241 list_del(&pool_entry->init_list);
1242 kfree(pool_entry);
1243 }
1244}
1245
4a71df50
FB		 1246static void qeth_clean_channel(struct qeth_channel *channel)
1247{
121ca39a 1248 struct ccw_device *cdev = channel->ccwdev;
4a71df50
FB		 1249 int cnt;
1250
d11ba0c4 1251 QETH_DBF_TEXT(SETUP, 2, "freech");
121ca39a
JW		 1252
1253 spin_lock_irq(get_ccwdev_lock(cdev));
1254 cdev->handler = NULL;
1255 spin_unlock_irq(get_ccwdev_lock(cdev));
1256
4a71df50
FB		 1257 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1258 kfree(channel->iob[cnt].data);
f15cdaf2 1259 kfree(channel->ccw);
4a71df50
FB		 1260}
1261
121ca39a
JW		 1262static int qeth_setup_channel(struct qeth_channel *channel, bool alloc_buffers)
1263{
1264 struct ccw_device *cdev = channel->ccwdev;
1265 int cnt;
1266
1267 QETH_DBF_TEXT(SETUP, 2, "setupch");
1268
1269 channel->ccw = kmalloc(sizeof(struct ccw1), GFP_KERNEL | GFP_DMA);
1270 if (!channel->ccw)
1271 return -ENOMEM;
1272 channel->state = CH_STATE_DOWN;
1273 atomic_set(&channel->irq_pending, 0);
1274 init_waitqueue_head(&channel->wait_q);
1275
1276 spin_lock_irq(get_ccwdev_lock(cdev));
1277 cdev->handler = qeth_irq;
1278 spin_unlock_irq(get_ccwdev_lock(cdev));
1279
1280 if (!alloc_buffers)
1281 return 0;
1282
1283 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
500abbf0
JW		 1284 channel->iob[cnt].data = kmalloc(QETH_BUFSIZE,
1285 GFP_KERNEL | GFP_DMA);
121ca39a
JW		 1286 if (channel->iob[cnt].data == NULL)
1287 break;
1288 channel->iob[cnt].state = BUF_STATE_FREE;
1289 channel->iob[cnt].channel = channel;
1290 channel->iob[cnt].callback = qeth_send_control_data_cb;
1291 channel->iob[cnt].rc = 0;
1292 }
1293 if (cnt < QETH_CMD_BUFFER_NO) {
1294 qeth_clean_channel(channel);
1295 return -ENOMEM;
1296 }
1297 channel->io_buf_no = 0;
1298 spin_lock_init(&channel->iob_lock);
1299
1300 return 0;
1301}
1302
725b9c04
SO		 1303static void qeth_set_single_write_queues(struct qeth_card *card)
1304{
1305 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1306 (card->qdio.no_out_queues == 4))
1307 qeth_free_qdio_buffers(card);
1308
1309 card->qdio.no_out_queues = 1;
1310 if (card->qdio.default_out_queue != 0)
1311 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1312
1313 card->qdio.default_out_queue = 0;
1314}
1315
1316static void qeth_set_multiple_write_queues(struct qeth_card *card)
1317{
1318 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1319 (card->qdio.no_out_queues == 1)) {
1320 qeth_free_qdio_buffers(card);
1321 card->qdio.default_out_queue = 2;
1322 }
1323 card->qdio.no_out_queues = 4;
1324}
1325
1326static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1327{
4a71df50 1328 struct ccw_device *ccwdev;
ded27d8d 1329 struct channel_path_desc_fmt0 *chp_dsc;
4a71df50 1330
5113fec0 1331 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1332
1333 ccwdev = card->data.ccwdev;
725b9c04
SO		 1334 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1335 if (!chp_dsc)
1336 goto out;
1337
1338 card->info.func_level = 0x4100 + chp_dsc->desc;
1339 if (card->info.type == QETH_CARD_TYPE_IQD)
1340 goto out;
1341
1342 /* CHPP field bit 6 == 1 -> single queue */
1343 if ((chp_dsc->chpp & 0x02) == 0x02)
1344 qeth_set_single_write_queues(card);
1345 else
1346 qeth_set_multiple_write_queues(card);
1347out:
1348 kfree(chp_dsc);
5113fec0
UB		 1349 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1350 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1351}
1352
1353static void qeth_init_qdio_info(struct qeth_card *card)
1354{
d11ba0c4 1355 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50 1356 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
95f4d8b7
JW		 1357 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1358 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1359 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1360
4a71df50 1361 /* inbound */
ed2e93ef 1362 card->qdio.no_in_queues = 1;
4a71df50 1363 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1364 if (card->info.type == QETH_CARD_TYPE_IQD)
1365 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1366 else
1367 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1368 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1369 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1370 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1371}
1372
95f4d8b7 1373static void qeth_set_initial_options(struct qeth_card *card)
4a71df50
FB		 1374{
1375 card->options.route4.type = NO_ROUTER;
1376 card->options.route6.type = NO_ROUTER;
4a71df50 1377 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1378 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1379 card->options.cq = QETH_CQ_DISABLED;
4fda3354 1380 card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
4a71df50
FB		 1381}
1382
1383static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1384{
1385 unsigned long flags;
1386 int rc = 0;
1387
1388 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1389 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1390 (u8) card->thread_start_mask,
1391 (u8) card->thread_allowed_mask,
1392 (u8) card->thread_running_mask);
1393 rc = (card->thread_start_mask & thread);
1394 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1395 return rc;
1396}
1397
1398static void qeth_start_kernel_thread(struct work_struct *work)
1399{
3f36b890 1400 struct task_struct *ts;
4a71df50
FB		 1401 struct qeth_card *card = container_of(work, struct qeth_card,
1402 kernel_thread_starter);
847a50fd 1403 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1404
1405 if (card->read.state != CH_STATE_UP &&
1406 card->write.state != CH_STATE_UP)
1407 return;
3f36b890 1408 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1409 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1410 "qeth_recover");
3f36b890
FB		 1411 if (IS_ERR(ts)) {
1412 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1413 qeth_clear_thread_running_bit(card,
1414 QETH_RECOVER_THREAD);
1415 }
1416 }
4a71df50
FB		 1417}
1418
bca51650 1419static void qeth_buffer_reclaim_work(struct work_struct *);
95f4d8b7 1420static void qeth_setup_card(struct qeth_card *card)
4a71df50 1421{
d11ba0c4
PT		 1422 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1423 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50 1424
95f4d8b7 1425 card->info.type = CARD_RDEV(card)->id.driver_info;
4a71df50 1426 card->state = CARD_STATE_DOWN;
4a71df50 1427 spin_lock_init(&card->mclock);
4a71df50
FB		 1428 spin_lock_init(&card->lock);
1429 spin_lock_init(&card->ip_lock);
1430 spin_lock_init(&card->thread_mask_lock);
c4949f07 1431 mutex_init(&card->conf_mutex);
9dc48ccc 1432 mutex_init(&card->discipline_mutex);
d4ac0246 1433 mutex_init(&card->vid_list_mutex);
4a71df50 1434 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1435 INIT_LIST_HEAD(&card->cmd_waiter_list);
1436 init_waitqueue_head(&card->wait_q);
95f4d8b7 1437 qeth_set_initial_options(card);
4a71df50
FB		 1438 /* IP address takeover */
1439 INIT_LIST_HEAD(&card->ipato.entries);
4a71df50 1440 qeth_init_qdio_info(card);
b3332930 1441 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1442 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1443}
1444
6bcac508
MS		 1445static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1446{
1447 struct qeth_card *card = container_of(slr, struct qeth_card,
1448 qeth_service_level);
0d788c7d
KDW		 1449 if (card->info.mcl_level[0])
1450 seq_printf(m, "qeth: %s firmware level %s\n",
1451 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1452}
1453
121ca39a 1454static struct qeth_card *qeth_alloc_card(struct ccwgroup_device *gdev)
4a71df50
FB		 1455{
1456 struct qeth_card *card;
1457
d11ba0c4 1458 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
f15cdaf2 1459 card = kzalloc(sizeof(*card), GFP_KERNEL);
4a71df50 1460 if (!card)
76b11f8e 1461 goto out;
d11ba0c4 1462 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
121ca39a
JW		 1463
1464 card->gdev = gdev;
a2eb0ad5 1465 dev_set_drvdata(&gdev->dev, card);
121ca39a
JW		 1466 CARD_RDEV(card) = gdev->cdev[0];
1467 CARD_WDEV(card) = gdev->cdev[1];
1468 CARD_DDEV(card) = gdev->cdev[2];
24142fd8 1469 if (qeth_setup_channel(&card->read, true))
76b11f8e 1470 goto out_ip;
24142fd8 1471 if (qeth_setup_channel(&card->write, true))
76b11f8e 1472 goto out_channel;
24142fd8
JW		 1473 if (qeth_setup_channel(&card->data, false))
1474 goto out_data;
6bcac508
MS		 1475 card->qeth_service_level.seq_print = qeth_core_sl_print;
1476 register_service_level(&card->qeth_service_level);
4a71df50 1477 return card;
76b11f8e 1478
24142fd8
JW		 1479out_data:
1480 qeth_clean_channel(&card->write);
76b11f8e
UB		 1481out_channel:
1482 qeth_clean_channel(&card->read);
1483out_ip:
a2eb0ad5 1484 dev_set_drvdata(&gdev->dev, NULL);
76b11f8e
UB		 1485 kfree(card);
1486out:
1487 return NULL;
4a71df50
FB		 1488}
1489
8d908eb0
JW		 1490static int qeth_clear_channel(struct qeth_card *card,
1491 struct qeth_channel *channel)
4a71df50 1492{
4a71df50
FB		 1493 int rc;
1494
847a50fd 1495 QETH_CARD_TEXT(card, 3, "clearch");
ed47155b 1496 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 1497 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
ed47155b 1498 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1499
1500 if (rc)
1501 return rc;
1502 rc = wait_event_interruptible_timeout(card->wait_q,
1503 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1504 if (rc == -ERESTARTSYS)
1505 return rc;
1506 if (channel->state != CH_STATE_STOPPED)
1507 return -ETIME;
1508 channel->state = CH_STATE_DOWN;
1509 return 0;
1510}
1511
8d908eb0
JW		 1512static int qeth_halt_channel(struct qeth_card *card,
1513 struct qeth_channel *channel)
4a71df50 1514{
4a71df50
FB		 1515 int rc;
1516
847a50fd 1517 QETH_CARD_TEXT(card, 3, "haltch");
ed47155b 1518 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 1519 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
ed47155b 1520 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1521
1522 if (rc)
1523 return rc;
1524 rc = wait_event_interruptible_timeout(card->wait_q,
1525 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1526 if (rc == -ERESTARTSYS)
1527 return rc;
1528 if (channel->state != CH_STATE_HALTED)
1529 return -ETIME;
1530 return 0;
1531}
1532
1533static int qeth_halt_channels(struct qeth_card *card)
1534{
1535 int rc1 = 0, rc2 = 0, rc3 = 0;
1536
847a50fd 1537 QETH_CARD_TEXT(card, 3, "haltchs");
8d908eb0
JW		 1538 rc1 = qeth_halt_channel(card, &card->read);
1539 rc2 = qeth_halt_channel(card, &card->write);
1540 rc3 = qeth_halt_channel(card, &card->data);
4a71df50
FB		 1541 if (rc1)
1542 return rc1;
1543 if (rc2)
1544 return rc2;
1545 return rc3;
1546}
1547
1548static int qeth_clear_channels(struct qeth_card *card)
1549{
1550 int rc1 = 0, rc2 = 0, rc3 = 0;
1551
847a50fd 1552 QETH_CARD_TEXT(card, 3, "clearchs");
8d908eb0
JW		 1553 rc1 = qeth_clear_channel(card, &card->read);
1554 rc2 = qeth_clear_channel(card, &card->write);
1555 rc3 = qeth_clear_channel(card, &card->data);
4a71df50
FB		 1556 if (rc1)
1557 return rc1;
1558 if (rc2)
1559 return rc2;
1560 return rc3;
1561}
1562
1563static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1564{
1565 int rc = 0;
1566
847a50fd 1567 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1568
1569 if (halt)
1570 rc = qeth_halt_channels(card);
1571 if (rc)
1572 return rc;
1573 return qeth_clear_channels(card);
1574}
1575
1576int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1577{
1578 int rc = 0;
1579
847a50fd 1580 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1581 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1582 QETH_QDIO_CLEANING)) {
1583 case QETH_QDIO_ESTABLISHED:
1584 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1585 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1586 QDIO_FLAG_CLEANUP_USING_HALT);
1587 else
cc961d40 1588 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1589 QDIO_FLAG_CLEANUP_USING_CLEAR);
1590 if (rc)
847a50fd 1591 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1592 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1593 break;
1594 case QETH_QDIO_CLEANING:
1595 return rc;
1596 default:
1597 break;
1598 }
1599 rc = qeth_clear_halt_card(card, use_halt);
1600 if (rc)
847a50fd 1601 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1602 card->state = CARD_STATE_DOWN;
1603 return rc;
1604}
1605EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1606
1607static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1608 int *length)
1609{
1610 struct ciw *ciw;
1611 char *rcd_buf;
1612 int ret;
1613 struct qeth_channel *channel = &card->data;
4a71df50
FB		 1614
1615 /*
1616 * scan for RCD command in extended SenseID data
1617 */
1618 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1619 if (!ciw || ciw->cmd == 0)
1620 return -EOPNOTSUPP;
1621 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1622 if (!rcd_buf)
1623 return -ENOMEM;
1624
f15cdaf2 1625 qeth_setup_ccw(channel->ccw, ciw->cmd, ciw->count, rcd_buf);
4a71df50 1626 channel->state = CH_STATE_RCD;
ed47155b 1627 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1628 ret = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
4a71df50
FB		 1629 QETH_RCD_PARM, LPM_ANYPATH, 0,
1630 QETH_RCD_TIMEOUT);
ed47155b 1631 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1632 if (!ret)
1633 wait_event(card->wait_q,
1634 (channel->state == CH_STATE_RCD_DONE ||
1635 channel->state == CH_STATE_DOWN));
1636 if (channel->state == CH_STATE_DOWN)
1637 ret = -EIO;
1638 else
1639 channel->state = CH_STATE_DOWN;
1640 if (ret) {
1641 kfree(rcd_buf);
1642 *buffer = NULL;
1643 *length = 0;
1644 } else {
1645 *length = ciw->count;
1646 *buffer = rcd_buf;
1647 }
1648 return ret;
1649}
1650
a60389ab 1651static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1652{
a60389ab 1653 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1654 card->info.chpid = prcd[30];
1655 card->info.unit_addr2 = prcd[31];
1656 card->info.cula = prcd[63];
1657 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1658 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1659}
1660
615dff22
JW		 1661static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
1662{
1663 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1664 struct diag26c_vnic_resp *response = NULL;
1665 struct diag26c_vnic_req *request = NULL;
1666 struct ccw_dev_id id;
1667 char userid[80];
1668 int rc = 0;
1669
1670 QETH_DBF_TEXT(SETUP, 2, "vmlayer");
1671
1672 cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
1673 if (rc)
1674 goto out;
1675
1676 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
1677 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
1678 if (!request || !response) {
1679 rc = -ENOMEM;
1680 goto out;
1681 }
1682
1683 ccw_device_get_id(CARD_RDEV(card), &id);
1684 request->resp_buf_len = sizeof(*response);
1685 request->resp_version = DIAG26C_VERSION6_VM65918;
1686 request->req_format = DIAG26C_VNIC_INFO;
1687 ASCEBC(userid, 8);
1688 memcpy(&request->sys_name, userid, 8);
1689 request->devno = id.devno;
1690
1691 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1692 rc = diag26c(request, response, DIAG26C_PORT_VNIC);
1693 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1694 if (rc)
1695 goto out;
1696 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
1697
1698 if (request->resp_buf_len < sizeof(*response) ||
1699 response->version != request->resp_version) {
1700 rc = -EIO;
1701 goto out;
1702 }
1703
1704 if (response->protocol == VNIC_INFO_PROT_L2)
1705 disc = QETH_DISCIPLINE_LAYER2;
1706 else if (response->protocol == VNIC_INFO_PROT_L3)
1707 disc = QETH_DISCIPLINE_LAYER3;
1708
1709out:
1710 kfree(response);
1711 kfree(request);
1712 if (rc)
1713 QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
1714 return disc;
1715}
1716
c70eb09d
JW		 1717/* Determine whether the device requires a specific layer discipline */
1718static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1719{
615dff22
JW		 1720 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1721
c70eb09d 1722 if (card->info.type == QETH_CARD_TYPE_OSM ||
615dff22
JW		 1723 card->info.type == QETH_CARD_TYPE_OSN)
1724 disc = QETH_DISCIPLINE_LAYER2;
1725 else if (card->info.guestlan)
1726 disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
1727 QETH_DISCIPLINE_LAYER3 :
1728 qeth_vm_detect_layer(card);
1729
1730 switch (disc) {
1731 case QETH_DISCIPLINE_LAYER2:
c70eb09d 1732 QETH_DBF_TEXT(SETUP, 3, "force l2");
615dff22
JW		 1733 break;
1734 case QETH_DISCIPLINE_LAYER3:
c70eb09d 1735 QETH_DBF_TEXT(SETUP, 3, "force l3");
615dff22
JW		 1736 break;
1737 default:
1738 QETH_DBF_TEXT(SETUP, 3, "force no");
c70eb09d
JW		 1739 }
1740
615dff22 1741 return disc;
c70eb09d
JW		 1742}
1743
a60389ab
EL		 1744static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1745{
1746 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1747
e6e056ba 1748 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1749 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1750 card->info.blkt.time_total = 0;
1751 card->info.blkt.inter_packet = 0;
1752 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1753 } else {
1754 card->info.blkt.time_total = 250;
1755 card->info.blkt.inter_packet = 5;
1756 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1757 }
4a71df50
FB		 1758}
1759
1760static void qeth_init_tokens(struct qeth_card *card)
1761{
1762 card->token.issuer_rm_w = 0x00010103UL;
1763 card->token.cm_filter_w = 0x00010108UL;
1764 card->token.cm_connection_w = 0x0001010aUL;
1765 card->token.ulp_filter_w = 0x0001010bUL;
1766 card->token.ulp_connection_w = 0x0001010dUL;
1767}
1768
1769static void qeth_init_func_level(struct qeth_card *card)
1770{
5113fec0
UB		 1771 switch (card->info.type) {
1772 case QETH_CARD_TYPE_IQD:
6298263a 1773 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1774 break;
1775 case QETH_CARD_TYPE_OSD:
0132951e 1776 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1777 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1778 break;
1779 default:
1780 break;
4a71df50
FB		 1781 }
1782}
1783
8d908eb0
JW		 1784static int qeth_idx_activate_get_answer(struct qeth_card *card,
1785 struct qeth_channel *channel,
8f6637b8
JW		 1786 void (*reply_cb)(struct qeth_card *,
1787 struct qeth_channel *,
1788 struct qeth_cmd_buffer *))
4a71df50
FB		 1789{
1790 struct qeth_cmd_buffer *iob;
4a71df50 1791 int rc;
4a71df50 1792
d11ba0c4 1793 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50 1794 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1795 if (!iob)
1796 return -ENOMEM;
8f6637b8 1797 iob->callback = reply_cb;
f15cdaf2 1798 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
4a71df50
FB		 1799
1800 wait_event(card->wait_q,
1801 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1802 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
ed47155b 1803 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1804 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 1805 (addr_t) iob, 0, 0, QETH_TIMEOUT);
ed47155b 1806 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1807
1808 if (rc) {
14cc21b6 1809 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1810 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1811 atomic_set(&channel->irq_pending, 0);
1812 wake_up(&card->wait_q);
1813 return rc;
1814 }
1815 rc = wait_event_interruptible_timeout(card->wait_q,
1816 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1817 if (rc == -ERESTARTSYS)
1818 return rc;
1819 if (channel->state != CH_STATE_UP) {
1820 rc = -ETIME;
d11ba0c4 1821 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1822 } else
1823 rc = 0;
1824 return rc;
1825}
1826
8d908eb0
JW		 1827static int qeth_idx_activate_channel(struct qeth_card *card,
1828 struct qeth_channel *channel,
8f6637b8
JW		 1829 void (*reply_cb)(struct qeth_card *,
1830 struct qeth_channel *,
1831 struct qeth_cmd_buffer *))
4a71df50 1832{
4a71df50 1833 struct qeth_cmd_buffer *iob;
4a71df50
FB		 1834 __u16 temp;
1835 __u8 tmp;
1836 int rc;
f06f6f32 1837 struct ccw_dev_id temp_devid;
4a71df50 1838
d11ba0c4 1839 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1840
1841 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1842 if (!iob)
1843 return -ENOMEM;
8f6637b8 1844 iob->callback = reply_cb;
f15cdaf2 1845 qeth_setup_ccw(channel->ccw, CCW_CMD_WRITE, IDX_ACTIVATE_SIZE,
45ca2fd6 1846 iob->data);
4a71df50
FB		 1847 if (channel == &card->write) {
1848 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1849 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1850 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1851 card->seqno.trans_hdr++;
1852 } else {
1853 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1854 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1855 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1856 }
92d27209 1857 tmp = ((u8)card->dev->dev_port) | 0x80;
4a71df50
FB		 1858 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1859 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1860 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1861 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1862 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1863 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1864 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1865 temp = (card->info.cula << 8) + card->info.unit_addr2;
1866 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1867
1868 wait_event(card->wait_q,
1869 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1870 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
ed47155b 1871 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1872 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 1873 (addr_t) iob, 0, 0, QETH_TIMEOUT);
ed47155b 1874 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1875
1876 if (rc) {
14cc21b6
FB		 1877 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1878 rc);
d11ba0c4 1879 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1880 atomic_set(&channel->irq_pending, 0);
1881 wake_up(&card->wait_q);
1882 return rc;
1883 }
1884 rc = wait_event_interruptible_timeout(card->wait_q,
1885 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1886 if (rc == -ERESTARTSYS)
1887 return rc;
1888 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1889 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1890 " failed to recover an error on the device\n");
e19e5be8
JW		 1891 QETH_DBF_MESSAGE(2, "IDX activate timed out on channel %x\n",
1892 CCW_DEVID(channel->ccwdev));
d11ba0c4 1893 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1894 return -ETIME;
1895 }
8d908eb0 1896 return qeth_idx_activate_get_answer(card, channel, reply_cb);
4a71df50
FB		 1897}
1898
1899static int qeth_peer_func_level(int level)
1900{
1901 if ((level & 0xff) == 8)
1902 return (level & 0xff) + 0x400;
1903 if (((level >> 8) & 3) == 1)
1904 return (level & 0xff) + 0x200;
1905 return level;
1906}
1907
8f6637b8
JW		 1908static void qeth_idx_write_cb(struct qeth_card *card,
1909 struct qeth_channel *channel,
1910 struct qeth_cmd_buffer *iob)
4a71df50 1911{
4a71df50
FB		 1912 __u16 temp;
1913
d11ba0c4 1914 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1915
1916 if (channel->state == CH_STATE_DOWN) {
1917 channel->state = CH_STATE_ACTIVATING;
1918 goto out;
1919 }
4a71df50
FB		 1920
1921 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1922 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
750b1625 1923 dev_err(&channel->ccwdev->dev,
74eacdb9
FB		 1924 "The adapter is used exclusively by another "
1925 "host\n");
4a71df50 1926 else
e19e5be8
JW		 1927 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: negative reply\n",
1928 CCW_DEVID(channel->ccwdev));
4a71df50
FB		 1929 goto out;
1930 }
1931 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1932 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
e19e5be8
JW		 1933 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: function level mismatch (sent: %#x, received: %#x)\n",
1934 CCW_DEVID(channel->ccwdev),
1935 card->info.func_level, temp);
4a71df50
FB		 1936 goto out;
1937 }
1938 channel->state = CH_STATE_UP;
1939out:
1940 qeth_release_buffer(channel, iob);
1941}
1942
8f6637b8
JW		 1943static void qeth_idx_read_cb(struct qeth_card *card,
1944 struct qeth_channel *channel,
1945 struct qeth_cmd_buffer *iob)
4a71df50 1946{
4a71df50
FB		 1947 __u16 temp;
1948
d11ba0c4 1949 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1950 if (channel->state == CH_STATE_DOWN) {
1951 channel->state = CH_STATE_ACTIVATING;
1952 goto out;
1953 }
1954
5113fec0 1955 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1956 goto out;
1957
1958 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1959 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1960 case QETH_IDX_ACT_ERR_EXCL:
750b1625 1961 dev_err(&channel->ccwdev->dev,
74eacdb9
FB		 1962 "The adapter is used exclusively by another "
1963 "host\n");
5113fec0
UB		 1964 break;
1965 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1966 case QETH_IDX_ACT_ERR_AUTH_USER:
750b1625 1967 dev_err(&channel->ccwdev->dev,
5113fec0 1968 "Setting the device online failed because of "
01fc3e86 1969 "insufficient authorization\n");
5113fec0
UB		 1970 break;
1971 default:
e19e5be8
JW		 1972 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: negative reply\n",
1973 CCW_DEVID(channel->ccwdev));
5113fec0 1974 }
01fc3e86
UB		 1975 QETH_CARD_TEXT_(card, 2, "idxread%c",
1976 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1977 goto out;
1978 }
1979
4a71df50
FB		 1980 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1981 if (temp != qeth_peer_func_level(card->info.func_level)) {
e19e5be8
JW		 1982 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: function level mismatch (sent: %#x, received: %#x)\n",
1983 CCW_DEVID(channel->ccwdev),
1984 card->info.func_level, temp);
4a71df50
FB		 1985 goto out;
1986 }
1987 memcpy(&card->token.issuer_rm_r,
1988 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1989 QETH_MPC_TOKEN_LENGTH);
1990 memcpy(&card->info.mcl_level[0],
1991 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1992 channel->state = CH_STATE_UP;
1993out:
1994 qeth_release_buffer(channel, iob);
1995}
1996
1997void qeth_prepare_control_data(struct qeth_card *card, int len,
1998 struct qeth_cmd_buffer *iob)
1999{
f15cdaf2 2000 qeth_setup_ccw(iob->channel->ccw, CCW_CMD_WRITE, len, iob->data);
8f6637b8 2001 iob->callback = qeth_release_buffer_cb;
4a71df50
FB		 2002
2003 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2004 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2005 card->seqno.trans_hdr++;
2006 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2007 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2008 card->seqno.pdu_hdr++;
2009 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2010 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2011 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2012}
2013EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2014
efbbc1d5
EC		 2015/**
2016 * qeth_send_control_data() - send control command to the card
2017 * @card: qeth_card structure pointer
2018 * @len: size of the command buffer
2019 * @iob: qeth_cmd_buffer pointer
2020 * @reply_cb: callback function pointer
2021 * @cb_card: pointer to the qeth_card structure
2022 * @cb_reply: pointer to the qeth_reply structure
2023 * @cb_cmd: pointer to the original iob for non-IPA
2024 * commands, or to the qeth_ipa_cmd structure
2025 * for the IPA commands.
2026 * @reply_param: private pointer passed to the callback
2027 *
2028 * Returns the value of the `return_code' field of the response
2029 * block returned from the hardware, or other error indication.
2030 * Value of zero indicates successful execution of the command.
2031 *
2032 * Callback function gets called one or more times, with cb_cmd
2033 * pointing to the response returned by the hardware. Callback
2034 * function must return non-zero if more reply blocks are expected,
2035 * and zero if the last or only reply block is received. Callback
2036 * function can get the value of the reply_param pointer from the
2037 * field 'param' of the structure qeth_reply.
2038 */
2039
4a71df50
FB		 2040int qeth_send_control_data(struct qeth_card *card, int len,
2041 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2042 int (*reply_cb)(struct qeth_card *cb_card,
2043 struct qeth_reply *cb_reply,
2044 unsigned long cb_cmd),
4a71df50
FB		 2045 void *reply_param)
2046{
750b1625 2047 struct qeth_channel *channel = iob->channel;
4a71df50 2048 int rc;
4a71df50 2049 struct qeth_reply *reply = NULL;
7834cd5a 2050 unsigned long timeout, event_timeout;
1c5b2216 2051 struct qeth_ipa_cmd *cmd = NULL;
4a71df50 2052
847a50fd 2053 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2054
908abbb5 2055 if (card->read_or_write_problem) {
750b1625 2056 qeth_release_buffer(channel, iob);
908abbb5
UB		 2057 return -EIO;
2058 }
4a71df50
FB		 2059 reply = qeth_alloc_reply(card);
2060 if (!reply) {
4a71df50
FB		 2061 return -ENOMEM;
2062 }
2063 reply->callback = reply_cb;
2064 reply->param = reply_param;
d22ffb5a 2065
4a71df50 2066 init_waitqueue_head(&reply->wait_q);
4a71df50 2067
750b1625 2068 while (atomic_cmpxchg(&channel->irq_pending, 0, 1)) ;
4a71df50 2069
1c5b2216
JW		 2070 if (IS_IPA(iob->data)) {
2071 cmd = __ipa_cmd(iob);
d22ffb5a
JW		 2072 cmd->hdr.seqno = card->seqno.ipa++;
2073 reply->seqno = cmd->hdr.seqno;
7834cd5a 2074 event_timeout = QETH_IPA_TIMEOUT;
1c5b2216 2075 } else {
d22ffb5a 2076 reply->seqno = QETH_IDX_COMMAND_SEQNO;
7834cd5a 2077 event_timeout = QETH_TIMEOUT;
1c5b2216 2078 }
d22ffb5a
JW		 2079 qeth_prepare_control_data(card, len, iob);
2080
ed47155b 2081 spin_lock_irq(&card->lock);
d22ffb5a 2082 list_add_tail(&reply->list, &card->cmd_waiter_list);
ed47155b 2083 spin_unlock_irq(&card->lock);
1c5b2216 2084
7834cd5a 2085 timeout = jiffies + event_timeout;
4a71df50 2086
847a50fd 2087 QETH_CARD_TEXT(card, 6, "noirqpnd");
ed47155b 2088 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 2089 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 2090 (addr_t) iob, 0, 0, event_timeout);
ed47155b 2091 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 2092 if (rc) {
e19e5be8
JW		 2093 QETH_DBF_MESSAGE(2, "qeth_send_control_data on device %x: ccw_device_start rc = %i\n",
2094 CARD_DEVID(card), rc);
847a50fd 2095 QETH_CARD_TEXT_(card, 2, " err%d", rc);
ed47155b 2096 spin_lock_irq(&card->lock);
4a71df50
FB		 2097 list_del_init(&reply->list);
2098 qeth_put_reply(reply);
ed47155b 2099 spin_unlock_irq(&card->lock);
750b1625
JW		 2100 qeth_release_buffer(channel, iob);
2101 atomic_set(&channel->irq_pending, 0);
4a71df50
FB		 2102 wake_up(&card->wait_q);
2103 return rc;
2104 }
5b54e16f
FB		 2105
2106 /* we have only one long running ipassist, since we can ensure
2107 process context of this command we can sleep */
1c5b2216
JW		 2108 if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
2109 cmd->hdr.prot_version == QETH_PROT_IPV4) {
5b54e16f 2110 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2111 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2112 goto time_err;
2113 } else {
2114 while (!atomic_read(&reply->received)) {
2115 if (time_after(jiffies, timeout))
2116 goto time_err;
2117 cpu_relax();
6531084c 2118 }
5b54e16f
FB		 2119 }
2120
2121 rc = reply->rc;
2122 qeth_put_reply(reply);
2123 return rc;
2124
2125time_err:
70919e23 2126 reply->rc = -ETIME;
ed47155b 2127 spin_lock_irq(&card->lock);
5b54e16f 2128 list_del_init(&reply->list);
ed47155b 2129 spin_unlock_irq(&card->lock);
5b54e16f 2130 atomic_inc(&reply->received);
4a71df50
FB		 2131 rc = reply->rc;
2132 qeth_put_reply(reply);
2133 return rc;
2134}
2135EXPORT_SYMBOL_GPL(qeth_send_control_data);
2136
2137static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2138 unsigned long data)
2139{
2140 struct qeth_cmd_buffer *iob;
2141
d11ba0c4 2142 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2143
2144 iob = (struct qeth_cmd_buffer *) data;
2145 memcpy(&card->token.cm_filter_r,
2146 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2147 QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2148 return 0;
2149}
2150
2151static int qeth_cm_enable(struct qeth_card *card)
2152{
2153 int rc;
2154 struct qeth_cmd_buffer *iob;
2155
d11ba0c4 2156 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2157
2158 iob = qeth_wait_for_buffer(&card->write);
2159 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2160 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2161 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2162 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2163 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2164
2165 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2166 qeth_cm_enable_cb, NULL);
2167 return rc;
2168}
2169
2170static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2171 unsigned long data)
2172{
4a71df50
FB		 2173 struct qeth_cmd_buffer *iob;
2174
d11ba0c4 2175 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2176
2177 iob = (struct qeth_cmd_buffer *) data;
2178 memcpy(&card->token.cm_connection_r,
2179 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2180 QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2181 return 0;
2182}
2183
2184static int qeth_cm_setup(struct qeth_card *card)
2185{
2186 int rc;
2187 struct qeth_cmd_buffer *iob;
2188
d11ba0c4 2189 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2190
2191 iob = qeth_wait_for_buffer(&card->write);
2192 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2193 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2194 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2195 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2196 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2197 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2198 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2199 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2200 qeth_cm_setup_cb, NULL);
2201 return rc;
4a71df50
FB		 2202}
2203
8ce7a9e0 2204static int qeth_update_max_mtu(struct qeth_card *card, unsigned int max_mtu)
4a71df50 2205{
8ce7a9e0
JW		 2206 struct net_device *dev = card->dev;
2207 unsigned int new_mtu;
2208
2209 if (!max_mtu) {
2210 /* IQD needs accurate max MTU to set up its RX buffers: */
2211 if (IS_IQD(card))
2212 return -EINVAL;
2213 /* tolerate quirky HW: */
2214 max_mtu = ETH_MAX_MTU;
2215 }
2216
2217 rtnl_lock();
2218 if (IS_IQD(card)) {
2219 /* move any device with default MTU to new max MTU: */
2220 new_mtu = (dev->mtu == dev->max_mtu) ? max_mtu : dev->mtu;
2221
2222 /* adjust RX buffer size to new max MTU: */
2223 card->qdio.in_buf_size = max_mtu + 2 * PAGE_SIZE;
2224 if (dev->max_mtu && dev->max_mtu != max_mtu)
2225 qeth_free_qdio_buffers(card);
2226 } else {
2227 if (dev->mtu)
2228 new_mtu = dev->mtu;
2229 /* default MTUs for first setup: */
4fda3354 2230 else if (IS_LAYER2(card))
8ce7a9e0
JW		 2231 new_mtu = ETH_DATA_LEN;
2232 else
2233 new_mtu = ETH_DATA_LEN - 8; /* allow for LLC + SNAP */
4a71df50 2234 }
8ce7a9e0
JW		 2235
2236 dev->max_mtu = max_mtu;
2237 dev->mtu = min(new_mtu, max_mtu);
2238 rtnl_unlock();
2239 return 0;
4a71df50
FB		 2240}
2241
cef6ff22 2242static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2243{
2244 switch (framesize) {
2245 case 0x4000:
2246 return 8192;
2247 case 0x6000:
2248 return 16384;
2249 case 0xa000:
2250 return 32768;
2251 case 0xffff:
2252 return 57344;
2253 default:
2254 return 0;
2255 }
2256}
2257
4a71df50
FB		 2258static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2259 unsigned long data)
2260{
4a71df50
FB		 2261 __u16 mtu, framesize;
2262 __u16 len;
2263 __u8 link_type;
2264 struct qeth_cmd_buffer *iob;
2265
d11ba0c4 2266 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2267
2268 iob = (struct qeth_cmd_buffer *) data;
2269 memcpy(&card->token.ulp_filter_r,
2270 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2271 QETH_MPC_TOKEN_LENGTH);
9853b97b 2272 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2273 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2274 mtu = qeth_get_mtu_outof_framesize(framesize);
4a71df50 2275 } else {
8ce7a9e0 2276 mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data);
4a71df50 2277 }
8ce7a9e0 2278 *(u16 *)reply->param = mtu;
4a71df50
FB		 2279
2280 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2281 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2282 memcpy(&link_type,
2283 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2284 card->info.link_type = link_type;
2285 } else
2286 card->info.link_type = 0;
01fc3e86 2287 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
4a71df50
FB		 2288 return 0;
2289}
2290
73657a3e
JW		 2291static u8 qeth_mpc_select_prot_type(struct qeth_card *card)
2292{
2293 if (IS_OSN(card))
2294 return QETH_PROT_OSN2;
4fda3354 2295 return IS_LAYER2(card) ? QETH_PROT_LAYER2 : QETH_PROT_TCPIP;
73657a3e
JW		 2296}
2297
4a71df50
FB		 2298static int qeth_ulp_enable(struct qeth_card *card)
2299{
73657a3e 2300 u8 prot_type = qeth_mpc_select_prot_type(card);
4a71df50 2301 struct qeth_cmd_buffer *iob;
8ce7a9e0 2302 u16 max_mtu;
73657a3e 2303 int rc;
4a71df50
FB		 2304
2305 /*FIXME: trace view callbacks*/
d11ba0c4 2306 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2307
2308 iob = qeth_wait_for_buffer(&card->write);
2309 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2310
92d27209 2311 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = (u8) card->dev->dev_port;
4a71df50
FB		 2312 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2313 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2314 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2315 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2316 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50 2317 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
8ce7a9e0
JW		 2318 qeth_ulp_enable_cb, &max_mtu);
2319 if (rc)
2320 return rc;
2321 return qeth_update_max_mtu(card, max_mtu);
4a71df50
FB		 2322}
2323
2324static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2325 unsigned long data)
2326{
2327 struct qeth_cmd_buffer *iob;
2328
d11ba0c4 2329 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2330
2331 iob = (struct qeth_cmd_buffer *) data;
2332 memcpy(&card->token.ulp_connection_r,
2333 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2334 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2335 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2336 3)) {
2337 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2338 dev_err(&card->gdev->dev, "A connection could not be "
2339 "established because of an OLM limit\n");
bbb822a8 2340 iob->rc = -EMLINK;
65a1f898 2341 }
d11ba0c4 2342 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2343 return 0;
4a71df50
FB		 2344}
2345
2346static int qeth_ulp_setup(struct qeth_card *card)
2347{
2348 int rc;
2349 __u16 temp;
2350 struct qeth_cmd_buffer *iob;
2351 struct ccw_dev_id dev_id;
2352
d11ba0c4 2353 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2354
2355 iob = qeth_wait_for_buffer(&card->write);
2356 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2357
2358 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2359 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2360 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2361 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2362 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2363 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2364
2365 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2366 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2367 temp = (card->info.cula << 8) + card->info.unit_addr2;
2368 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2369 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2370 qeth_ulp_setup_cb, NULL);
2371 return rc;
2372}
2373
0da9581d
EL		 2374static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2375{
0da9581d
EL		 2376 struct qeth_qdio_out_buffer *newbuf;
2377
0da9581d 2378 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
3b346c18
JW		 2379 if (!newbuf)
2380 return -ENOMEM;
2381
d445a4e2 2382 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2383 skb_queue_head_init(&newbuf->skb_list);
2384 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2385 newbuf->q = q;
0da9581d
EL		 2386 newbuf->next_pending = q->bufs[bidx];
2387 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2388 q->bufs[bidx] = newbuf;
3b346c18 2389 return 0;
0da9581d
EL		 2390}
2391
d445a4e2
SO		 2392static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2393{
2394 if (!q)
2395 return;
2396
2397 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2398 kfree(q);
2399}
2400
2401static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2402{
2403 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2404
2405 if (!q)
2406 return NULL;
2407
2408 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2409 kfree(q);
2410 return NULL;
2411 }
2412 return q;
2413}
0da9581d 2414
4a71df50
FB		 2415static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2416{
2417 int i, j;
2418
d11ba0c4 2419 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2420
2421 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2422 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2423 return 0;
2424
4601ba6c
SO		 2425 QETH_DBF_TEXT(SETUP, 2, "inq");
2426 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2427 if (!card->qdio.in_q)
2428 goto out_nomem;
4601ba6c 2429
4a71df50
FB		 2430 /* inbound buffer pool */
2431 if (qeth_alloc_buffer_pool(card))
2432 goto out_freeinq;
0da9581d 2433
4a71df50
FB		 2434 /* outbound */
2435 card->qdio.out_qs =
6396bb22
KC		 2436 kcalloc(card->qdio.no_out_queues,
2437 sizeof(struct qeth_qdio_out_q *),
2438 GFP_KERNEL);
4a71df50
FB		 2439 if (!card->qdio.out_qs)
2440 goto out_freepool;
2441 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2442 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2443 if (!card->qdio.out_qs[i])
2444 goto out_freeoutq;
d11ba0c4
PT		 2445 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2446 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2447 card->qdio.out_qs[i]->queue_no = i;
2448 /* give outbound qeth_qdio_buffers their qdio_buffers */
2449 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2450 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2451 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2452 goto out_freeoutqbufs;
4a71df50
FB		 2453 }
2454 }
0da9581d
EL		 2455
2456 /* completion */
2457 if (qeth_alloc_cq(card))
2458 goto out_freeoutq;
2459
4a71df50
FB		 2460 return 0;
2461
0da9581d
EL		 2462out_freeoutqbufs:
2463 while (j > 0) {
2464 --j;
2465 kmem_cache_free(qeth_qdio_outbuf_cache,
2466 card->qdio.out_qs[i]->bufs[j]);
2467 card->qdio.out_qs[i]->bufs[j] = NULL;
2468 }
4a71df50 2469out_freeoutq:
0da9581d 2470 while (i > 0) {
d445a4e2 2471 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2472 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2473 }
4a71df50
FB		 2474 kfree(card->qdio.out_qs);
2475 card->qdio.out_qs = NULL;
2476out_freepool:
2477 qeth_free_buffer_pool(card);
2478out_freeinq:
4601ba6c 2479 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2480 card->qdio.in_q = NULL;
2481out_nomem:
2482 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2483 return -ENOMEM;
2484}
2485
d445a4e2
SO		 2486static void qeth_free_qdio_buffers(struct qeth_card *card)
2487{
2488 int i, j;
2489
2490 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2491 QETH_QDIO_UNINITIALIZED)
2492 return;
2493
2494 qeth_free_cq(card);
2495 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2496 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2497 if (card->qdio.in_q->bufs[j].rx_skb)
2498 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2499 }
2500 qeth_free_qdio_queue(card->qdio.in_q);
2501 card->qdio.in_q = NULL;
2502 /* inbound buffer pool */
2503 qeth_free_buffer_pool(card);
2504 /* free outbound qdio_qs */
2505 if (card->qdio.out_qs) {
2506 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2507 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2508 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2509 }
2510 kfree(card->qdio.out_qs);
2511 card->qdio.out_qs = NULL;
2512 }
2513}
2514
4a71df50
FB		 2515static void qeth_create_qib_param_field(struct qeth_card *card,
2516 char *param_field)
2517{
2518
2519 param_field[0] = _ascebc['P'];
2520 param_field[1] = _ascebc['C'];
2521 param_field[2] = _ascebc['I'];
2522 param_field[3] = _ascebc['T'];
2523 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2524 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2525 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2526}
2527
2528static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2529 char *param_field)
2530{
2531 param_field[16] = _ascebc['B'];
2532 param_field[17] = _ascebc['L'];
2533 param_field[18] = _ascebc['K'];
2534 param_field[19] = _ascebc['T'];
2535 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2536 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2537 *((unsigned int *) (&param_field[28])) =
2538 card->info.blkt.inter_packet_jumbo;
2539}
2540
2541static int qeth_qdio_activate(struct qeth_card *card)
2542{
d11ba0c4 2543 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2544 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2545}
2546
2547static int qeth_dm_act(struct qeth_card *card)
2548{
2549 int rc;
2550 struct qeth_cmd_buffer *iob;
2551
d11ba0c4 2552 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2553
2554 iob = qeth_wait_for_buffer(&card->write);
2555 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2556
2557 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2558 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2559 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2560 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2561 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2562 return rc;
2563}
2564
2565static int qeth_mpc_initialize(struct qeth_card *card)
2566{
2567 int rc;
2568
d11ba0c4 2569 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2570
2571 rc = qeth_issue_next_read(card);
2572 if (rc) {
d11ba0c4 2573 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2574 return rc;
2575 }
2576 rc = qeth_cm_enable(card);
2577 if (rc) {
d11ba0c4 2578 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2579 goto out_qdio;
2580 }
2581 rc = qeth_cm_setup(card);
2582 if (rc) {
d11ba0c4 2583 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2584 goto out_qdio;
2585 }
2586 rc = qeth_ulp_enable(card);
2587 if (rc) {
d11ba0c4 2588 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2589 goto out_qdio;
2590 }
2591 rc = qeth_ulp_setup(card);
2592 if (rc) {
d11ba0c4 2593 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2594 goto out_qdio;
2595 }
2596 rc = qeth_alloc_qdio_buffers(card);
2597 if (rc) {
d11ba0c4 2598 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2599 goto out_qdio;
2600 }
2601 rc = qeth_qdio_establish(card);
2602 if (rc) {
d11ba0c4 2603 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2604 qeth_free_qdio_buffers(card);
2605 goto out_qdio;
2606 }
2607 rc = qeth_qdio_activate(card);
2608 if (rc) {
d11ba0c4 2609 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2610 goto out_qdio;
2611 }
2612 rc = qeth_dm_act(card);
2613 if (rc) {
d11ba0c4 2614 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2615 goto out_qdio;
2616 }
2617
2618 return 0;
2619out_qdio:
2620 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2621 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2622 return rc;
2623}
2624
4a71df50
FB		 2625void qeth_print_status_message(struct qeth_card *card)
2626{
2627 switch (card->info.type) {
5113fec0
UB		 2628 case QETH_CARD_TYPE_OSD:
2629 case QETH_CARD_TYPE_OSM:
2630 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2631 /* VM will use a non-zero first character
2632 * to indicate a HiperSockets like reporting
2633 * of the level OSA sets the first character to zero
2634 * */
2635 if (!card->info.mcl_level[0]) {
2636 sprintf(card->info.mcl_level, "%02x%02x",
2637 card->info.mcl_level[2],
2638 card->info.mcl_level[3]);
4a71df50
FB		 2639 break;
2640 }
2641 /* fallthrough */
2642 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2643 if ((card->info.guestlan) ||
2644 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2645 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2646 card->info.mcl_level[0]];
2647 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2648 card->info.mcl_level[1]];
2649 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2650 card->info.mcl_level[2]];
2651 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2652 card->info.mcl_level[3]];
2653 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2654 }
2655 break;
2656 default:
2657 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2658 }
239ff408
UB		 2659 dev_info(&card->gdev->dev,
2660 "Device is a%s card%s%s%s\nwith link type %s.\n",
2661 qeth_get_cardname(card),
2662 (card->info.mcl_level[0]) ? " (level: " : "",
2663 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2664 (card->info.mcl_level[0]) ? ")" : "",
2665 qeth_get_cardname_short(card));
4a71df50
FB		 2666}
2667EXPORT_SYMBOL_GPL(qeth_print_status_message);
2668
4a71df50
FB		 2669static void qeth_initialize_working_pool_list(struct qeth_card *card)
2670{
2671 struct qeth_buffer_pool_entry *entry;
2672
847a50fd 2673 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2674
2675 list_for_each_entry(entry,
2676 &card->qdio.init_pool.entry_list, init_list) {
2677 qeth_put_buffer_pool_entry(card, entry);
2678 }
2679}
2680
cef6ff22
JW		 2681static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2682 struct qeth_card *card)
4a71df50
FB		 2683{
2684 struct list_head *plh;
2685 struct qeth_buffer_pool_entry *entry;
2686 int i, free;
2687 struct page *page;
2688
2689 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2690 return NULL;
2691
2692 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2693 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2694 free = 1;
2695 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2696 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2697 free = 0;
2698 break;
2699 }
2700 }
2701 if (free) {
2702 list_del_init(&entry->list);
2703 return entry;
2704 }
2705 }
2706
2707 /* no free buffer in pool so take first one and swap pages */
2708 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2709 struct qeth_buffer_pool_entry, list);
2710 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2711 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2712 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2713 if (!page) {
2714 return NULL;
2715 } else {
2716 free_page((unsigned long)entry->elements[i]);
2717 entry->elements[i] = page_address(page);
2718 if (card->options.performance_stats)
2719 card->perf_stats.sg_alloc_page_rx++;
2720 }
2721 }
2722 }
2723 list_del_init(&entry->list);
2724 return entry;
2725}
2726
2727static int qeth_init_input_buffer(struct qeth_card *card,
2728 struct qeth_qdio_buffer *buf)
2729{
2730 struct qeth_buffer_pool_entry *pool_entry;
2731 int i;
2732
b3332930 2733 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
37cf05d2
JW		 2734 buf->rx_skb = netdev_alloc_skb(card->dev,
2735 QETH_RX_PULL_LEN + ETH_HLEN);
b3332930
FB		 2736 if (!buf->rx_skb)
2737 return 1;
2738 }
2739
4a71df50
FB		 2740 pool_entry = qeth_find_free_buffer_pool_entry(card);
2741 if (!pool_entry)
2742 return 1;
2743
2744 /*
2745 * since the buffer is accessed only from the input_tasklet
2746 * there shouldn't be a need to synchronize; also, since we use
2747 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2748 * buffers
2749 */
4a71df50
FB		 2750
2751 buf->pool_entry = pool_entry;
2752 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2753 buf->buffer->element[i].length = PAGE_SIZE;
2754 buf->buffer->element[i].addr = pool_entry->elements[i];
2755 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2756 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2757 else
3ec90878
JG		 2758 buf->buffer->element[i].eflags = 0;
2759 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2760 }
2761 return 0;
2762}
2763
2764int qeth_init_qdio_queues(struct qeth_card *card)
2765{
2766 int i, j;
2767 int rc;
2768
d11ba0c4 2769 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2770
2771 /* inbound queue */
1b45c80b
JW		 2772 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2773 memset(&card->rx, 0, sizeof(struct qeth_rx));
4a71df50
FB		 2774 qeth_initialize_working_pool_list(card);
2775 /*give only as many buffers to hardware as we have buffer pool entries*/
2776 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2777 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2778 card->qdio.in_q->next_buf_to_init =
2779 card->qdio.in_buf_pool.buf_count - 1;
2780 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2781 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2782 if (rc) {
d11ba0c4 2783 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2784 return rc;
2785 }
0da9581d
EL		 2786
2787 /* completion */
2788 rc = qeth_cq_init(card);
2789 if (rc) {
2790 return rc;
2791 }
2792
4a71df50
FB		 2793 /* outbound queue */
2794 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2795 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2796 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2797 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2798 qeth_clear_output_buffer(card->qdio.out_qs[i],
3b346c18 2799 card->qdio.out_qs[i]->bufs[j]);
4a71df50
FB		 2800 }
2801 card->qdio.out_qs[i]->card = card;
2802 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2803 card->qdio.out_qs[i]->do_pack = 0;
2804 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2805 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2806 atomic_set(&card->qdio.out_qs[i]->state,
2807 QETH_OUT_Q_UNLOCKED);
2808 }
2809 return 0;
2810}
2811EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2812
cef6ff22 2813static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2814{
2815 switch (link_type) {
2816 case QETH_LINK_TYPE_HSTR:
2817 return 2;
2818 default:
2819 return 1;
2820 }
2821}
2822
2823static void qeth_fill_ipacmd_header(struct qeth_card *card,
500abbf0
JW		 2824 struct qeth_ipa_cmd *cmd,
2825 enum qeth_ipa_cmds command,
2826 enum qeth_prot_versions prot)
4a71df50 2827{
4a71df50
FB		 2828 cmd->hdr.command = command;
2829 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
d22ffb5a 2830 /* cmd->hdr.seqno is set by qeth_send_control_data() */
4a71df50 2831 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
92d27209 2832 cmd->hdr.rel_adapter_no = (u8) card->dev->dev_port;
4fda3354 2833 cmd->hdr.prim_version_no = IS_LAYER2(card) ? 2 : 1;
4a71df50
FB		 2834 cmd->hdr.param_count = 1;
2835 cmd->hdr.prot_version = prot;
4a71df50
FB		 2836}
2837
605c9d5f
JW		 2838void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob)
2839{
2840 u8 prot_type = qeth_mpc_select_prot_type(card);
2841
2842 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2843 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2844 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2845 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2846}
2847EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2848
4a71df50
FB		 2849struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2850 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2851{
2852 struct qeth_cmd_buffer *iob;
4a71df50 2853
1aec42bc
TR		 2854 iob = qeth_get_buffer(&card->write);
2855 if (iob) {
605c9d5f 2856 qeth_prepare_ipa_cmd(card, iob);
ff5caa7a 2857 qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
1aec42bc
TR		 2858 } else {
2859 dev_warn(&card->gdev->dev,
2860 "The qeth driver ran out of channel command buffers\n");
e19e5be8
JW		 2861 QETH_DBF_MESSAGE(1, "device %x ran out of channel command buffers",
2862 CARD_DEVID(card));
1aec42bc 2863 }
4a71df50
FB		 2864
2865 return iob;
2866}
2867EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2868
efbbc1d5
EC		 2869/**
2870 * qeth_send_ipa_cmd() - send an IPA command
2871 *
2872 * See qeth_send_control_data() for explanation of the arguments.
2873 */
2874
4a71df50
FB		 2875int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2876 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2877 unsigned long),
2878 void *reply_param)
2879{
2880 int rc;
4a71df50 2881
847a50fd 2882 QETH_CARD_TEXT(card, 4, "sendipa");
d11ba0c4
PT		 2883 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2884 iob, reply_cb, reply_param);
908abbb5
UB		 2885 if (rc == -ETIME) {
2886 qeth_clear_ipacmd_list(card);
2887 qeth_schedule_recovery(card);
2888 }
4a71df50
FB		 2889 return rc;
2890}
2891EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2892
10340510 2893static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 2894{
2895 int rc;
70919e23 2896 struct qeth_cmd_buffer *iob;
4a71df50 2897
d11ba0c4 2898 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2899
70919e23 2900 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2901 if (!iob)
2902 return -ENOMEM;
70919e23 2903 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2904 return rc;
2905}
4a71df50 2906
686c97ee 2907static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
4a71df50 2908{
686c97ee 2909 if (!cmd->hdr.return_code)
4a71df50
FB		 2910 cmd->hdr.return_code =
2911 cmd->data.setadapterparms.hdr.return_code;
686c97ee 2912 return cmd->hdr.return_code;
4a71df50 2913}
4a71df50
FB		 2914
2915static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2916 struct qeth_reply *reply, unsigned long data)
2917{
686c97ee 2918 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50 2919
847a50fd 2920 QETH_CARD_TEXT(card, 3, "quyadpcb");
686c97ee
JW		 2921 if (qeth_setadpparms_inspect_rc(cmd))
2922 return 0;
4a71df50 2923
5113fec0 2924 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2925 card->info.link_type =
2926 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2927 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2928 }
4a71df50
FB		 2929 card->options.adp.supported_funcs =
2930 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
686c97ee 2931 return 0;
4a71df50
FB		 2932}
2933
eb3fb0ba 2934static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2935 __u32 command, __u32 cmdlen)
2936{
2937 struct qeth_cmd_buffer *iob;
2938 struct qeth_ipa_cmd *cmd;
2939
2940 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2941 QETH_PROT_IPV4);
1aec42bc 2942 if (iob) {
ff5caa7a 2943 cmd = __ipa_cmd(iob);
1aec42bc
TR		 2944 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2945 cmd->data.setadapterparms.hdr.command_code = command;
2946 cmd->data.setadapterparms.hdr.used_total = 1;
2947 cmd->data.setadapterparms.hdr.seq_no = 1;
2948 }
4a71df50
FB		 2949
2950 return iob;
2951}
4a71df50 2952
09960b3a 2953static int qeth_query_setadapterparms(struct qeth_card *card)
4a71df50
FB		 2954{
2955 int rc;
2956 struct qeth_cmd_buffer *iob;
2957
847a50fd 2958 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2959 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2960 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 2961 if (!iob)
2962 return -ENOMEM;
4a71df50
FB		 2963 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2964 return rc;
2965}
4a71df50 2966
1da74b1c
FB		 2967static int qeth_query_ipassists_cb(struct qeth_card *card,
2968 struct qeth_reply *reply, unsigned long data)
2969{
2970 struct qeth_ipa_cmd *cmd;
2971
2972 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2973
2974 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 2975
2976 switch (cmd->hdr.return_code) {
2977 case IPA_RC_NOTSUPP:
2978 case IPA_RC_L2_UNSUPPORTED_CMD:
2979 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2980 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2981 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
31c92732 2982 return 0;
a134884a
SR		 2983 default:
2984 if (cmd->hdr.return_code) {
e19e5be8
JW		 2985 QETH_DBF_MESSAGE(1, "IPA_CMD_QIPASSIST on device %x: Unhandled rc=%#x\n",
2986 CARD_DEVID(card),
2987 cmd->hdr.return_code);
a134884a
SR		 2988 return 0;
2989 }
2990 }
2991
1da74b1c
FB		 2992 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2993 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2994 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 2995 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 2996 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2997 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 2998 } else
e19e5be8
JW		 2999 QETH_DBF_MESSAGE(1, "IPA_CMD_QIPASSIST on device %x: Flawed LIC detected\n",
3000 CARD_DEVID(card));
1da74b1c
FB		 3001 return 0;
3002}
3003
09960b3a
JW		 3004static int qeth_query_ipassists(struct qeth_card *card,
3005 enum qeth_prot_versions prot)
1da74b1c
FB		 3006{
3007 int rc;
3008 struct qeth_cmd_buffer *iob;
3009
3010 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3011 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3012 if (!iob)
3013 return -ENOMEM;
1da74b1c
FB		 3014 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3015 return rc;
3016}
1da74b1c 3017
45cbb2e4
SR		 3018static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3019 struct qeth_reply *reply, unsigned long data)
3020{
686c97ee 3021 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
45cbb2e4 3022 struct qeth_query_switch_attributes *attrs;
686c97ee 3023 struct qeth_switch_info *sw_info;
45cbb2e4
SR		 3024
3025 QETH_CARD_TEXT(card, 2, "qswiatcb");
686c97ee
JW		 3026 if (qeth_setadpparms_inspect_rc(cmd))
3027 return 0;
45cbb2e4 3028
686c97ee
JW		 3029 sw_info = (struct qeth_switch_info *)reply->param;
3030 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3031 sw_info->capabilities = attrs->capabilities;
3032 sw_info->settings = attrs->settings;
3033 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3034 sw_info->settings);
45cbb2e4
SR		 3035 return 0;
3036}
3037
3038int qeth_query_switch_attributes(struct qeth_card *card,
3039 struct qeth_switch_info *sw_info)
3040{
3041 struct qeth_cmd_buffer *iob;
3042
3043 QETH_CARD_TEXT(card, 2, "qswiattr");
3044 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3045 return -EOPNOTSUPP;
3046 if (!netif_carrier_ok(card->dev))
3047 return -ENOMEDIUM;
3048 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3049 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3050 if (!iob)
3051 return -ENOMEM;
45cbb2e4
SR		 3052 return qeth_send_ipa_cmd(card, iob,
3053 qeth_query_switch_attributes_cb, sw_info);
3054}
45cbb2e4 3055
1da74b1c
FB		 3056static int qeth_query_setdiagass_cb(struct qeth_card *card,
3057 struct qeth_reply *reply, unsigned long data)
3058{
3059 struct qeth_ipa_cmd *cmd;
3060 __u16 rc;
3061
3062 cmd = (struct qeth_ipa_cmd *)data;
3063 rc = cmd->hdr.return_code;
3064 if (rc)
3065 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3066 else
3067 card->info.diagass_support = cmd->data.diagass.ext;
3068 return 0;
3069}
3070
3071static int qeth_query_setdiagass(struct qeth_card *card)
3072{
3073 struct qeth_cmd_buffer *iob;
3074 struct qeth_ipa_cmd *cmd;
3075
3076 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3077 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3078 if (!iob)
3079 return -ENOMEM;
ff5caa7a 3080 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3081 cmd->data.diagass.subcmd_len = 16;
3082 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3083 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3084}
3085
3086static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3087{
3088 unsigned long info = get_zeroed_page(GFP_KERNEL);
3089 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3090 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3091 struct ccw_dev_id ccwid;
caf757c6 3092 int level;
1da74b1c
FB		 3093
3094 tid->chpid = card->info.chpid;
3095 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3096 tid->ssid = ccwid.ssid;
3097 tid->devno = ccwid.devno;
3098 if (!info)
3099 return;
caf757c6
HC		 3100 level = stsi(NULL, 0, 0, 0);
3101 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3102 tid->lparnr = info222->lpar_number;
caf757c6 3103 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3104 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3105 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3106 }
3107 free_page(info);
3108 return;
3109}
3110
3111static int qeth_hw_trap_cb(struct qeth_card *card,
3112 struct qeth_reply *reply, unsigned long data)
3113{
3114 struct qeth_ipa_cmd *cmd;
3115 __u16 rc;
3116
3117 cmd = (struct qeth_ipa_cmd *)data;
3118 rc = cmd->hdr.return_code;
3119 if (rc)
3120 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3121 return 0;
3122}
3123
3124int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3125{
3126 struct qeth_cmd_buffer *iob;
3127 struct qeth_ipa_cmd *cmd;
3128
3129 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3130 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3131 if (!iob)
3132 return -ENOMEM;
ff5caa7a 3133 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3134 cmd->data.diagass.subcmd_len = 80;
3135 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3136 cmd->data.diagass.type = 1;
3137 cmd->data.diagass.action = action;
3138 switch (action) {
3139 case QETH_DIAGS_TRAP_ARM:
3140 cmd->data.diagass.options = 0x0003;
3141 cmd->data.diagass.ext = 0x00010000 +
3142 sizeof(struct qeth_trap_id);
3143 qeth_get_trap_id(card,
3144 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3145 break;
3146 case QETH_DIAGS_TRAP_DISARM:
3147 cmd->data.diagass.options = 0x0001;
3148 break;
3149 case QETH_DIAGS_TRAP_CAPTURE:
3150 break;
3151 }
3152 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3153}
3154EXPORT_SYMBOL_GPL(qeth_hw_trap);
3155
d73ef324
JW		 3156static int qeth_check_qdio_errors(struct qeth_card *card,
3157 struct qdio_buffer *buf,
3158 unsigned int qdio_error,
3159 const char *dbftext)
4a71df50 3160{
779e6e1c 3161 if (qdio_error) {
847a50fd 3162 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3163 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3164 buf->element[15].sflags);
38593d01 3165 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3166 buf->element[14].sflags);
38593d01 3167 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3168 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3169 card->stats.rx_dropped++;
3170 return 0;
3171 } else
3172 return 1;
4a71df50
FB		 3173 }
3174 return 0;
3175}
4a71df50 3176
d73ef324 3177static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3178{
3179 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3180 struct list_head *lh;
4a71df50
FB		 3181 int count;
3182 int i;
3183 int rc;
3184 int newcount = 0;
3185
4a71df50
FB		 3186 count = (index < queue->next_buf_to_init)?
3187 card->qdio.in_buf_pool.buf_count -
3188 (queue->next_buf_to_init - index) :
3189 card->qdio.in_buf_pool.buf_count -
3190 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3191 /* only requeue at a certain threshold to avoid SIGAs */
3192 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3193 for (i = queue->next_buf_to_init;
3194 i < queue->next_buf_to_init + count; ++i) {
3195 if (qeth_init_input_buffer(card,
3196 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3197 break;
3198 } else {
3199 newcount++;
3200 }
3201 }
3202
3203 if (newcount < count) {
3204 /* we are in memory shortage so we switch back to
3205 traditional skb allocation and drop packages */
4a71df50
FB		 3206 atomic_set(&card->force_alloc_skb, 3);
3207 count = newcount;
3208 } else {
4a71df50
FB		 3209 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3210 }
3211
b3332930
FB		 3212 if (!count) {
3213 i = 0;
3214 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3215 i++;
3216 if (i == card->qdio.in_buf_pool.buf_count) {
3217 QETH_CARD_TEXT(card, 2, "qsarbw");
3218 card->reclaim_index = index;
3219 schedule_delayed_work(
3220 &card->buffer_reclaim_work,
3221 QETH_RECLAIM_WORK_TIME);
3222 }
3223 return;
3224 }
3225
4a71df50
FB		 3226 /*
3227 * according to old code it should be avoided to requeue all
3228 * 128 buffers in order to benefit from PCI avoidance.
3229 * this function keeps at least one buffer (the buffer at
3230 * 'index') un-requeued -> this buffer is the first buffer that
3231 * will be requeued the next time
3232 */
3233 if (card->options.performance_stats) {
3234 card->perf_stats.inbound_do_qdio_cnt++;
3235 card->perf_stats.inbound_do_qdio_start_time =
3236 qeth_get_micros();
3237 }
779e6e1c
JG		 3238 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3239 queue->next_buf_to_init, count);
4a71df50
FB		 3240 if (card->options.performance_stats)
3241 card->perf_stats.inbound_do_qdio_time +=
3242 qeth_get_micros() -
3243 card->perf_stats.inbound_do_qdio_start_time;
3244 if (rc) {
847a50fd 3245 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3246 }
3247 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3248 QDIO_MAX_BUFFERS_PER_Q;
3249 }
3250}
d73ef324
JW		 3251
3252static void qeth_buffer_reclaim_work(struct work_struct *work)
3253{
3254 struct qeth_card *card = container_of(work, struct qeth_card,
3255 buffer_reclaim_work.work);
3256
3257 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3258 qeth_queue_input_buffer(card, card->reclaim_index);
3259}
4a71df50 3260
d7a39937 3261static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3262 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3263{
3ec90878 3264 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3265
847a50fd 3266 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3267 if (card->info.type == QETH_CARD_TYPE_IQD) {
3268 if (sbalf15 == 0) {
3269 qdio_err = 0;
3270 } else {
3271 qdio_err = 1;
3272 }
3273 }
76b11f8e 3274 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3275
3276 if (!qdio_err)
d7a39937 3277 return;
d303b6fd
JG		 3278
3279 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3280 return;
d303b6fd 3281
847a50fd
CO		 3282 QETH_CARD_TEXT(card, 1, "lnkfail");
3283 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3284 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3285}
3286
664e42ac
JW		 3287/**
3288 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3289 * @queue: queue to check for packing buffer
3290 *
3291 * Returns number of buffers that were prepared for flush.
3292 */
3293static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3294{
3295 struct qeth_qdio_out_buffer *buffer;
3296
3297 buffer = queue->bufs[queue->next_buf_to_fill];
3298 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3299 (buffer->next_element_to_fill > 0)) {
3300 /* it's a packing buffer */
3301 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3302 queue->next_buf_to_fill =
3303 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3304 return 1;
3305 }
3306 return 0;
3307}
3308
4a71df50
FB		 3309/*
3310 * Switched to packing state if the number of used buffers on a queue
3311 * reaches a certain limit.
3312 */
3313static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3314{
3315 if (!queue->do_pack) {
3316 if (atomic_read(&queue->used_buffers)
3317 >= QETH_HIGH_WATERMARK_PACK){
3318 /* switch non-PACKING -> PACKING */
847a50fd 3319 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3320 if (queue->card->options.performance_stats)
3321 queue->card->perf_stats.sc_dp_p++;
3322 queue->do_pack = 1;
3323 }
3324 }
3325}
3326
3327/*
3328 * Switches from packing to non-packing mode. If there is a packing
3329 * buffer on the queue this buffer will be prepared to be flushed.
3330 * In that case 1 is returned to inform the caller. If no buffer
3331 * has to be flushed, zero is returned.
3332 */
3333static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3334{
4a71df50
FB		 3335 if (queue->do_pack) {
3336 if (atomic_read(&queue->used_buffers)
3337 <= QETH_LOW_WATERMARK_PACK) {
3338 /* switch PACKING -> non-PACKING */
847a50fd 3339 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3340 if (queue->card->options.performance_stats)
3341 queue->card->perf_stats.sc_p_dp++;
3342 queue->do_pack = 0;
664e42ac 3343 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3344 }
3345 }
4a71df50
FB		 3346 return 0;
3347}
3348
779e6e1c
JG		 3349static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3350 int count)
4a71df50
FB		 3351{
3352 struct qeth_qdio_out_buffer *buf;
3353 int rc;
3354 int i;
3355 unsigned int qdio_flags;
3356
4a71df50 3357 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3358 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3359 buf = queue->bufs[bidx];
3ec90878
JG		 3360 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3361 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3362
0da9581d
EL		 3363 if (queue->bufstates)
3364 queue->bufstates[bidx].user = buf;
3365
4a71df50
FB		 3366 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3367 continue;
3368
3369 if (!queue->do_pack) {
3370 if ((atomic_read(&queue->used_buffers) >=
3371 (QETH_HIGH_WATERMARK_PACK -
3372 QETH_WATERMARK_PACK_FUZZ)) &&
3373 !atomic_read(&queue->set_pci_flags_count)) {
3374 /* it's likely that we'll go to packing
3375 * mode soon */
3376 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3377 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3378 }
3379 } else {
3380 if (!atomic_read(&queue->set_pci_flags_count)) {
3381 /*
3382 * there's no outstanding PCI any more, so we
3383 * have to request a PCI to be sure the the PCI
3384 * will wake at some time in the future then we
3385 * can flush packed buffers that might still be
3386 * hanging around, which can happen if no
3387 * further send was requested by the stack
3388 */
3389 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3390 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3391 }
3392 }
3393 }
3394
3e66bab3 3395 netif_trans_update(queue->card->dev);
4a71df50
FB		 3396 if (queue->card->options.performance_stats) {
3397 queue->card->perf_stats.outbound_do_qdio_cnt++;
3398 queue->card->perf_stats.outbound_do_qdio_start_time =
3399 qeth_get_micros();
3400 }
3401 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3402 if (atomic_read(&queue->set_pci_flags_count))
3403 qdio_flags |= QDIO_FLAG_PCI_OUT;
a702349a
JW		 3404 atomic_add(count, &queue->used_buffers);
3405
4a71df50 3406 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3407 queue->queue_no, index, count);
4a71df50
FB		 3408 if (queue->card->options.performance_stats)
3409 queue->card->perf_stats.outbound_do_qdio_time +=
3410 qeth_get_micros() -
3411 queue->card->perf_stats.outbound_do_qdio_start_time;
3412 if (rc) {
d303b6fd
JG		 3413 queue->card->stats.tx_errors += count;
3414 /* ignore temporary SIGA errors without busy condition */
1549d13f 3415 if (rc == -ENOBUFS)
d303b6fd 3416 return;
847a50fd 3417 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3418 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3419 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3420 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3421 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3422
4a71df50
FB		 3423 /* this must not happen under normal circumstances. if it
3424 * happens something is really wrong -> recover */
3425 qeth_schedule_recovery(queue->card);
3426 return;
3427 }
4a71df50
FB		 3428 if (queue->card->options.performance_stats)
3429 queue->card->perf_stats.bufs_sent += count;
3430}
3431
3432static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3433{
3434 int index;
3435 int flush_cnt = 0;
3436 int q_was_packing = 0;
3437
3438 /*
3439 * check if weed have to switch to non-packing mode or if
3440 * we have to get a pci flag out on the queue
3441 */
3442 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3443 !atomic_read(&queue->set_pci_flags_count)) {
3444 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3445 QETH_OUT_Q_UNLOCKED) {
3446 /*
3447 * If we get in here, there was no action in
3448 * do_send_packet. So, we check if there is a
3449 * packing buffer to be flushed here.
3450 */
3451 netif_stop_queue(queue->card->dev);
3452 index = queue->next_buf_to_fill;
3453 q_was_packing = queue->do_pack;
3454 /* queue->do_pack may change */
3455 barrier();
3456 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3457 if (!flush_cnt &&
3458 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3459 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3460 if (queue->card->options.performance_stats &&
3461 q_was_packing)
3462 queue->card->perf_stats.bufs_sent_pack +=
3463 flush_cnt;
3464 if (flush_cnt)
779e6e1c 3465 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3466 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3467 }
3468 }
3469}
3470
7bcd64eb
JW		 3471static void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3472 unsigned long card_ptr)
a1c3ed4c
FB		 3473{
3474 struct qeth_card *card = (struct qeth_card *)card_ptr;
3475
d3d1b205 3476 if (card->dev->flags & IFF_UP)
a1c3ed4c
FB		 3477 napi_schedule(&card->napi);
3478}
a1c3ed4c 3479
0da9581d
EL		 3480int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3481{
3482 int rc;
3483
3484 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3485 rc = -1;
3486 goto out;
3487 } else {
3488 if (card->options.cq == cq) {
3489 rc = 0;
3490 goto out;
3491 }
3492
3493 if (card->state != CARD_STATE_DOWN &&
3494 card->state != CARD_STATE_RECOVER) {
3495 rc = -1;
3496 goto out;
3497 }
3498
3499 qeth_free_qdio_buffers(card);
3500 card->options.cq = cq;
3501 rc = 0;
3502 }
3503out:
3504 return rc;
3505
3506}
3507EXPORT_SYMBOL_GPL(qeth_configure_cq);
3508
3b346c18
JW		 3509static void qeth_qdio_cq_handler(struct qeth_card *card, unsigned int qdio_err,
3510 unsigned int queue, int first_element,
3511 int count)
3512{
0da9581d
EL		 3513 struct qeth_qdio_q *cq = card->qdio.c_q;
3514 int i;
3515 int rc;
3516
3517 if (!qeth_is_cq(card, queue))
3518 goto out;
3519
3520 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3521 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3522 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3523
3524 if (qdio_err) {
3525 netif_stop_queue(card->dev);
3526 qeth_schedule_recovery(card);
3527 goto out;
3528 }
3529
3530 if (card->options.performance_stats) {
3531 card->perf_stats.cq_cnt++;
3532 card->perf_stats.cq_start_time = qeth_get_micros();
3533 }
3534
3535 for (i = first_element; i < first_element + count; ++i) {
3536 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3537 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
3b346c18 3538 int e = 0;
0da9581d 3539
903e4853
UB		 3540 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3541 buffer->element[e].addr) {
0da9581d
EL		 3542 unsigned long phys_aob_addr;
3543
3544 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3545 qeth_qdio_handle_aob(card, phys_aob_addr);
0da9581d
EL		 3546 ++e;
3547 }
3b346c18 3548 qeth_scrub_qdio_buffer(buffer, QDIO_MAX_ELEMENTS_PER_BUFFER);
0da9581d
EL		 3549 }
3550 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3551 card->qdio.c_q->next_buf_to_init,
3552 count);
3553 if (rc) {
3554 dev_warn(&card->gdev->dev,
3555 "QDIO reported an error, rc=%i\n", rc);
3556 QETH_CARD_TEXT(card, 2, "qcqherr");
3557 }
3558 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3559 + count) % QDIO_MAX_BUFFERS_PER_Q;
3560
0da9581d
EL		 3561 if (card->options.performance_stats) {
3562 int delta_t = qeth_get_micros();
3563 delta_t -= card->perf_stats.cq_start_time;
3564 card->perf_stats.cq_time += delta_t;
3565 }
3566out:
3567 return;
3568}
3569
7bcd64eb
JW		 3570static void qeth_qdio_input_handler(struct ccw_device *ccwdev,
3571 unsigned int qdio_err, int queue,
3572 int first_elem, int count,
3573 unsigned long card_ptr)
a1c3ed4c
FB		 3574{
3575 struct qeth_card *card = (struct qeth_card *)card_ptr;
3576
0da9581d
EL		 3577 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3578 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3579
3580 if (qeth_is_cq(card, queue))
3581 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3582 else if (qdio_err)
a1c3ed4c
FB		 3583 qeth_schedule_recovery(card);
3584}
a1c3ed4c 3585
7bcd64eb
JW		 3586static void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3587 unsigned int qdio_error, int __queue,
3588 int first_element, int count,
3589 unsigned long card_ptr)
4a71df50
FB		 3590{
3591 struct qeth_card *card = (struct qeth_card *) card_ptr;
3592 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3593 struct qeth_qdio_out_buffer *buffer;
3594 int i;
3595
847a50fd 3596 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3597 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3598 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3599 netif_stop_queue(card->dev);
3600 qeth_schedule_recovery(card);
3601 return;
4a71df50
FB		 3602 }
3603 if (card->options.performance_stats) {
3604 card->perf_stats.outbound_handler_cnt++;
3605 card->perf_stats.outbound_handler_start_time =
3606 qeth_get_micros();
3607 }
3608 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3609 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3610 buffer = queue->bufs[bidx];
b67d801f 3611 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3612
3613 if (queue->bufstates &&
3614 (queue->bufstates[bidx].flags &
3615 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3616 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3617
3618 if (atomic_cmpxchg(&buffer->state,
3619 QETH_QDIO_BUF_PRIMED,
3620 QETH_QDIO_BUF_PENDING) ==
3621 QETH_QDIO_BUF_PRIMED) {
3622 qeth_notify_skbs(queue, buffer,
3623 TX_NOTIFY_PENDING);
3624 }
0da9581d 3625 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
ce28867f
JW		 3626
3627 /* prepare the queue slot for re-use: */
3628 qeth_scrub_qdio_buffer(buffer->buffer,
3629 QETH_MAX_BUFFER_ELEMENTS(card));
b3332930
FB		 3630 if (qeth_init_qdio_out_buf(queue, bidx)) {
3631 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3632 qeth_schedule_recovery(card);
b3332930 3633 }
0da9581d 3634 } else {
b3332930
FB		 3635 if (card->options.cq == QETH_CQ_ENABLED) {
3636 enum iucv_tx_notify n;
3637
3638 n = qeth_compute_cq_notification(
3639 buffer->buffer->element[15].sflags, 0);
3640 qeth_notify_skbs(queue, buffer, n);
3641 }
3642
3b346c18 3643 qeth_clear_output_buffer(queue, buffer);
0da9581d
EL		 3644 }
3645 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3646 }
3647 atomic_sub(count, &queue->used_buffers);
3648 /* check if we need to do something on this outbound queue */
3649 if (card->info.type != QETH_CARD_TYPE_IQD)
3650 qeth_check_outbound_queue(queue);
3651
3652 netif_wake_queue(queue->card->dev);
3653 if (card->options.performance_stats)
3654 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3655 card->perf_stats.outbound_handler_start_time;
3656}
4a71df50 3657
70deb016
HW		 3658/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3659static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3660{
3661 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3662 return 2;
3663 return queue_num;
3664}
3665
290b8348
SR		 3666/**
3667 * Note: Function assumes that we have 4 outbound queues.
3668 */
4a71df50 3669int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
86c0cdb9 3670 int ipv)
4a71df50 3671{
d66cb37e 3672 __be16 *tci;
290b8348
SR		 3673 u8 tos;
3674
290b8348
SR		 3675 switch (card->qdio.do_prio_queueing) {
3676 case QETH_PRIO_Q_ING_TOS:
3677 case QETH_PRIO_Q_ING_PREC:
3678 switch (ipv) {
3679 case 4:
3680 tos = ipv4_get_dsfield(ip_hdr(skb));
3681 break;
3682 case 6:
3683 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3684 break;
3685 default:
3686 return card->qdio.default_out_queue;
4a71df50 3687 }
290b8348 3688 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3689 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3690 if (tos & IPTOS_MINCOST)
70deb016 3691 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3692 if (tos & IPTOS_RELIABILITY)
3693 return 2;
3694 if (tos & IPTOS_THROUGHPUT)
3695 return 1;
3696 if (tos & IPTOS_LOWDELAY)
3697 return 0;
d66cb37e
SR		 3698 break;
3699 case QETH_PRIO_Q_ING_SKB:
3700 if (skb->priority > 5)
3701 return 0;
70deb016 3702 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3703 case QETH_PRIO_Q_ING_VLAN:
3704 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3705 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3706 return qeth_cut_iqd_prio(card,
3707 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3708 break;
4a71df50 3709 default:
290b8348 3710 break;
4a71df50 3711 }
290b8348 3712 return card->qdio.default_out_queue;
4a71df50
FB		 3713}
3714EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3715
2863c613
EC		 3716/**
3717 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3718 * @skb: SKB address
3719 *
3720 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3721 * fragmented part of the SKB. Returns zero for linear SKB.
3722 */
356156b6 3723static int qeth_get_elements_for_frags(struct sk_buff *skb)
271648b4 3724{
2863c613 3725 int cnt, elements = 0;
271648b4
FB		 3726
3727 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3728 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3729
3730 elements += qeth_get_elements_for_range(
3731 (addr_t)skb_frag_address(frag),
3732 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3733 }
3734 return elements;
3735}
271648b4 3736
40e6a225
JW		 3737/**
3738 * qeth_count_elements() - Counts the number of QDIO buffer elements needed
3739 * to transmit an skb.
3740 * @skb: the skb to operate on.
3741 * @data_offset: skip this part of the skb's linear data
3742 *
3743 * Returns the number of pages, and thus QDIO buffer elements, needed to map the
3744 * skb's data (both its linear part and paged fragments).
3745 */
3746unsigned int qeth_count_elements(struct sk_buff *skb, unsigned int data_offset)
ba86ceee
JW		 3747{
3748 unsigned int elements = qeth_get_elements_for_frags(skb);
3749 addr_t end = (addr_t)skb->data + skb_headlen(skb);
3750 addr_t start = (addr_t)skb->data + data_offset;
3751
3752 if (start != end)
3753 elements += qeth_get_elements_for_range(start, end);
3754 return elements;
3755}
40e6a225 3756EXPORT_SYMBOL_GPL(qeth_count_elements);
4a71df50 3757
e517b649
JW		 3758#define QETH_HDR_CACHE_OBJ_SIZE (sizeof(struct qeth_hdr_tso) + \
3759 MAX_TCP_HEADER)
55494264 3760
0d6f02d3 3761/**
ba86ceee
JW		 3762 * qeth_add_hw_header() - add a HW header to an skb.
3763 * @skb: skb that the HW header should be added to.
0d6f02d3
JW		 3764 * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
3765 * it contains a valid pointer to a qeth_hdr.
a7c2f4a3
JW		 3766 * @hdr_len: length of the HW header.
3767 * @proto_len: length of protocol headers that need to be in same page as the
3768 * HW header.
0d6f02d3
JW		 3769 *
3770 * Returns the pushed length. If the header can't be pushed on
3771 * (eg. because it would cross a page boundary), it is allocated from
3772 * the cache instead and 0 is returned.
ba86ceee 3773 * The number of needed buffer elements is returned in @elements.
0d6f02d3
JW		 3774 * Error to create the hdr is indicated by returning with < 0.
3775 */
81ec5439
JW		 3776static int qeth_add_hw_header(struct qeth_card *card, struct sk_buff *skb,
3777 struct qeth_hdr **hdr, unsigned int hdr_len,
3778 unsigned int proto_len, unsigned int *elements)
ba86ceee
JW		 3779{
3780 const unsigned int max_elements = QETH_MAX_BUFFER_ELEMENTS(card);
a7c2f4a3 3781 const unsigned int contiguous = proto_len ? proto_len : 1;
ba86ceee
JW		 3782 unsigned int __elements;
3783 addr_t start, end;
3784 bool push_ok;
3785 int rc;
3786
3787check_layout:
a7c2f4a3 3788 start = (addr_t)skb->data - hdr_len;
ba86ceee
JW		 3789 end = (addr_t)skb->data;
3790
a7c2f4a3 3791 if (qeth_get_elements_for_range(start, end + contiguous) == 1) {
ba86ceee
JW		 3792 /* Push HW header into same page as first protocol header. */
3793 push_ok = true;
e517b649
JW		 3794 /* ... but TSO always needs a separate element for headers: */
3795 if (skb_is_gso(skb))
3796 __elements = 1 + qeth_count_elements(skb, proto_len);
3797 else
3798 __elements = qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3799 } else if (!proto_len && qeth_get_elements_for_range(start, end) == 1) {
3800 /* Push HW header into a new page. */
3801 push_ok = true;
ba86ceee 3802 __elements = 1 + qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3803 } else {
3804 /* Use header cache, copy protocol headers up. */
3805 push_ok = false;
3806 __elements = 1 + qeth_count_elements(skb, proto_len);
ba86ceee
JW		 3807 }
3808
3809 /* Compress skb to fit into one IO buffer: */
3810 if (__elements > max_elements) {
3811 if (!skb_is_nonlinear(skb)) {
3812 /* Drop it, no easy way of shrinking it further. */
3813 QETH_DBF_MESSAGE(2, "Dropped an oversized skb (Max Elements=%u / Actual=%u / Length=%u).\n",
3814 max_elements, __elements, skb->len);
3815 return -E2BIG;
3816 }
3817
3818 rc = skb_linearize(skb);
3819 if (card->options.performance_stats) {
3820 if (rc)
3821 card->perf_stats.tx_linfail++;
3822 else
3823 card->perf_stats.tx_lin++;
3824 }
3825 if (rc)
3826 return rc;
3827
3828 /* Linearization changed the layout, re-evaluate: */
3829 goto check_layout;
3830 }
3831
3832 *elements = __elements;
3833 /* Add the header: */
3834 if (push_ok) {
a7c2f4a3
JW		 3835 *hdr = skb_push(skb, hdr_len);
3836 return hdr_len;
0d6f02d3
JW		 3837 }
3838 /* fall back */
55494264
JW		 3839 if (hdr_len + proto_len > QETH_HDR_CACHE_OBJ_SIZE)
3840 return -E2BIG;
0d6f02d3
JW		 3841 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3842 if (!*hdr)
3843 return -ENOMEM;
a7c2f4a3
JW		 3844 /* Copy protocol headers behind HW header: */
3845 skb_copy_from_linear_data(skb, ((char *)*hdr) + hdr_len, proto_len);
0d6f02d3
JW		 3846 return 0;
3847}
0d6f02d3 3848
cef6ff22
JW		 3849static void __qeth_fill_buffer(struct sk_buff *skb,
3850 struct qeth_qdio_out_buffer *buf,
3851 bool is_first_elem, unsigned int offset)
4a71df50 3852{
384d2ef1
JW		 3853 struct qdio_buffer *buffer = buf->buffer;
3854 int element = buf->next_element_to_fill;
cc309f83
JW		 3855 int length = skb_headlen(skb) - offset;
3856 char *data = skb->data + offset;
384d2ef1 3857 int length_here, cnt;
4a71df50 3858
cc309f83 3859 /* map linear part into buffer element(s) */
4a71df50
FB		 3860 while (length > 0) {
3861 /* length_here is the remaining amount of data in this page */
3862 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3863 if (length < length_here)
3864 length_here = length;
3865
3866 buffer->element[element].addr = data;
3867 buffer->element[element].length = length_here;
3868 length -= length_here;
384d2ef1
JW		 3869 if (is_first_elem) {
3870 is_first_elem = false;
5258830b
JW		 3871 if (length || skb_is_nonlinear(skb))
3872 /* skb needs additional elements */
3ec90878 3873 buffer->element[element].eflags =
5258830b 3874 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3875 else
5258830b
JW		 3876 buffer->element[element].eflags = 0;
3877 } else {
3878 buffer->element[element].eflags =
3879 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3880 }
3881 data += length_here;
3882 element++;
4a71df50 3883 }
51aa165c 3884
cc309f83 3885 /* map page frags into buffer element(s) */
51aa165c 3886 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3887 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3888
3889 data = skb_frag_address(frag);
3890 length = skb_frag_size(frag);
271648b4
FB		 3891 while (length > 0) {
3892 length_here = PAGE_SIZE -
3893 ((unsigned long) data % PAGE_SIZE);
3894 if (length < length_here)
3895 length_here = length;
3896
3897 buffer->element[element].addr = data;
3898 buffer->element[element].length = length_here;
3899 buffer->element[element].eflags =
3900 SBAL_EFLAGS_MIDDLE_FRAG;
3901 length -= length_here;
3902 data += length_here;
3903 element++;
3904 }
51aa165c
FB		 3905 }
3906
3ec90878
JG		 3907 if (buffer->element[element - 1].eflags)
3908 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 3909 buf->next_element_to_fill = element;
4a71df50
FB		 3910}
3911
eaf3cc08
JW		 3912/**
3913 * qeth_fill_buffer() - map skb into an output buffer
3914 * @queue: QDIO queue to submit the buffer on
3915 * @buf: buffer to transport the skb
3916 * @skb: skb to map into the buffer
3917 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
3918 * from qeth_core_header_cache.
3919 * @offset: when mapping the skb, start at skb->data + offset
3920 * @hd_len: if > 0, build a dedicated header element of this size
3921 */
cef6ff22
JW		 3922static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3923 struct qeth_qdio_out_buffer *buf,
3924 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 3925 unsigned int offset, unsigned int hd_len)
4a71df50 3926{
eaf3cc08 3927 struct qdio_buffer *buffer = buf->buffer;
384d2ef1 3928 bool is_first_elem = true;
4a71df50 3929
dc149e37 3930 __skb_queue_tail(&buf->skb_list, skb);
4a71df50 3931
eaf3cc08
JW		 3932 /* build dedicated header element */
3933 if (hd_len) {
683d718a 3934 int element = buf->next_element_to_fill;
384d2ef1
JW		 3935 is_first_elem = false;
3936
683d718a 3937 buffer->element[element].addr = hdr;
f1588177 3938 buffer->element[element].length = hd_len;
3ec90878 3939 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
eaf3cc08
JW		 3940 /* remember to free cache-allocated qeth_hdr: */
3941 buf->is_header[element] = ((void *)hdr != skb->data);
683d718a
FB		 3942 buf->next_element_to_fill++;
3943 }
3944
384d2ef1 3945 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 3946
3947 if (!queue->do_pack) {
847a50fd 3948 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50 3949 } else {
847a50fd 3950 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3951 if (queue->card->options.performance_stats)
3952 queue->card->perf_stats.skbs_sent_pack++;
f72b4644
JW		 3953
3954 /* If the buffer still has free elements, keep using it. */
3955 if (buf->next_element_to_fill <
3956 QETH_MAX_BUFFER_ELEMENTS(queue->card))
3957 return 0;
4a71df50 3958 }
f72b4644
JW		 3959
3960 /* flush out the buffer */
3961 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3962 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3963 QDIO_MAX_BUFFERS_PER_Q;
3964 return 1;
4a71df50
FB		 3965}
3966
81ec5439
JW		 3967static int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue,
3968 struct sk_buff *skb, struct qeth_hdr *hdr,
3969 unsigned int offset, unsigned int hd_len)
4a71df50 3970{
7c2e9ba3
JW		 3971 int index = queue->next_buf_to_fill;
3972 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4a71df50 3973
4a71df50
FB		 3974 /*
3975 * check if buffer is empty to make sure that we do not 'overtake'
3976 * ourselves and try to fill a buffer that is already primed
3977 */
3978 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
7c2e9ba3 3979 return -EBUSY;
64ef8957
FB		 3980 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3981 qeth_flush_buffers(queue, index, 1);
4a71df50 3982 return 0;
4a71df50 3983}
4a71df50
FB		 3984
3985int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 3986 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 3987 unsigned int offset, unsigned int hd_len,
3988 int elements_needed)
4a71df50
FB		 3989{
3990 struct qeth_qdio_out_buffer *buffer;
3991 int start_index;
3992 int flush_count = 0;
3993 int do_pack = 0;
3994 int tmp;
3995 int rc = 0;
3996
4a71df50
FB		 3997 /* spin until we get the queue ... */
3998 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3999 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4000 start_index = queue->next_buf_to_fill;
0da9581d 4001 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4002 /*
4003 * check if buffer is empty to make sure that we do not 'overtake'
4004 * ourselves and try to fill a buffer that is already primed
4005 */
4006 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4007 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4008 return -EBUSY;
4009 }
4010 /* check if we need to switch packing state of this queue */
4011 qeth_switch_to_packing_if_needed(queue);
4012 if (queue->do_pack) {
4013 do_pack = 1;
64ef8957
FB		 4014 /* does packet fit in current buffer? */
4015 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4016 buffer->next_element_to_fill) < elements_needed) {
4017 /* ... no -> set state PRIMED */
4018 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4019 flush_count++;
4020 queue->next_buf_to_fill =
4021 (queue->next_buf_to_fill + 1) %
4022 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4023 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4024 /* we did a step forward, so check buffer state
4025 * again */
4026 if (atomic_read(&buffer->state) !=
4027 QETH_QDIO_BUF_EMPTY) {
4028 qeth_flush_buffers(queue, start_index,
779e6e1c 4029 flush_count);
64ef8957 4030 atomic_set(&queue->state,
4a71df50 4031 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4032 rc = -EBUSY;
4033 goto out;
4a71df50
FB		 4034 }
4035 }
4036 }
f72b4644
JW		 4037
4038 flush_count += qeth_fill_buffer(queue, buffer, skb, hdr, offset,
4039 hd_len);
4a71df50 4040 if (flush_count)
779e6e1c 4041 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4042 else if (!atomic_read(&queue->set_pci_flags_count))
4043 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4044 /*
4045 * queue->state will go from LOCKED -> UNLOCKED or from
4046 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4047 * (switch packing state or flush buffer to get another pci flag out).
4048 * In that case we will enter this loop
4049 */
4050 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4051 start_index = queue->next_buf_to_fill;
4052 /* check if we can go back to non-packing state */
3cdc8a25 4053 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4054 /*
4055 * check if we need to flush a packing buffer to get a pci
4056 * flag out on the queue
4057 */
3cdc8a25
JW		 4058 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4059 tmp = qeth_prep_flush_pack_buffer(queue);
4060 if (tmp) {
4061 qeth_flush_buffers(queue, start_index, tmp);
4062 flush_count += tmp;
4063 }
4a71df50 4064 }
3cdc8a25 4065out:
4a71df50
FB		 4066 /* at this point the queue is UNLOCKED again */
4067 if (queue->card->options.performance_stats && do_pack)
4068 queue->card->perf_stats.bufs_sent_pack += flush_count;
4069
4070 return rc;
4071}
4072EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4073
81ec5439
JW		 4074static void qeth_fill_tso_ext(struct qeth_hdr_tso *hdr,
4075 unsigned int payload_len, struct sk_buff *skb,
4076 unsigned int proto_len)
82bf5c08
JW		 4077{
4078 struct qeth_hdr_ext_tso *ext = &hdr->ext;
4079
4080 ext->hdr_tot_len = sizeof(*ext);
4081 ext->imb_hdr_no = 1;
4082 ext->hdr_type = 1;
4083 ext->hdr_version = 1;
4084 ext->hdr_len = 28;
4085 ext->payload_len = payload_len;
4086 ext->mss = skb_shinfo(skb)->gso_size;
4087 ext->dg_hdr_len = proto_len;
4088}
82bf5c08 4089
fc69660b
JW		 4090int qeth_xmit(struct qeth_card *card, struct sk_buff *skb,
4091 struct qeth_qdio_out_q *queue, int ipv, int cast_type,
4092 void (*fill_header)(struct qeth_card *card, struct qeth_hdr *hdr,
4093 struct sk_buff *skb, int ipv, int cast_type,
4094 unsigned int data_len))
4095{
82bf5c08 4096 unsigned int proto_len, hw_hdr_len;
fc69660b 4097 unsigned int frame_len = skb->len;
82bf5c08 4098 bool is_tso = skb_is_gso(skb);
fc69660b
JW		 4099 unsigned int data_offset = 0;
4100 struct qeth_hdr *hdr = NULL;
4101 unsigned int hd_len = 0;
4102 unsigned int elements;
4103 int push_len, rc;
4104 bool is_sg;
4105
82bf5c08
JW		 4106 if (is_tso) {
4107 hw_hdr_len = sizeof(struct qeth_hdr_tso);
4108 proto_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4109 } else {
4110 hw_hdr_len = sizeof(struct qeth_hdr);
81ec5439 4111 proto_len = (IS_IQD(card) && IS_LAYER2(card)) ? ETH_HLEN : 0;
82bf5c08
JW		 4112 }
4113
fc69660b
JW		 4114 rc = skb_cow_head(skb, hw_hdr_len);
4115 if (rc)
4116 return rc;
4117
4118 push_len = qeth_add_hw_header(card, skb, &hdr, hw_hdr_len, proto_len,
4119 &elements);
4120 if (push_len < 0)
4121 return push_len;
82bf5c08 4122 if (is_tso || !push_len) {
fc69660b
JW		 4123 /* HW header needs its own buffer element. */
4124 hd_len = hw_hdr_len + proto_len;
82bf5c08 4125 data_offset = push_len + proto_len;
fc69660b 4126 }
e517b649 4127 memset(hdr, 0, hw_hdr_len);
fc69660b 4128 fill_header(card, hdr, skb, ipv, cast_type, frame_len);
82bf5c08
JW		 4129 if (is_tso)
4130 qeth_fill_tso_ext((struct qeth_hdr_tso *) hdr,
4131 frame_len - proto_len, skb, proto_len);
fc69660b
JW		 4132
4133 is_sg = skb_is_nonlinear(skb);
4134 if (IS_IQD(card)) {
4135 rc = qeth_do_send_packet_fast(queue, skb, hdr, data_offset,
4136 hd_len);
4137 } else {
4138 /* TODO: drop skb_orphan() once TX completion is fast enough */
4139 skb_orphan(skb);
4140 rc = qeth_do_send_packet(card, queue, skb, hdr, data_offset,
4141 hd_len, elements);
4142 }
4143
4144 if (!rc) {
4145 if (card->options.performance_stats) {
4146 card->perf_stats.buf_elements_sent += elements;
4147 if (is_sg)
4148 card->perf_stats.sg_skbs_sent++;
82bf5c08
JW		 4149 if (is_tso) {
4150 card->perf_stats.large_send_bytes += frame_len;
4151 card->perf_stats.large_send_cnt++;
4152 }
fc69660b
JW		 4153 }
4154 } else {
4155 if (!push_len)
4156 kmem_cache_free(qeth_core_header_cache, hdr);
4157 if (rc == -EBUSY)
4158 /* roll back to ETH header */
4159 skb_pull(skb, push_len);
4160 }
4161 return rc;
4162}
4163EXPORT_SYMBOL_GPL(qeth_xmit);
4164
4a71df50
FB		 4165static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4166 struct qeth_reply *reply, unsigned long data)
4167{
686c97ee 4168 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50
FB		 4169 struct qeth_ipacmd_setadpparms *setparms;
4170
847a50fd 4171 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50 4172
4a71df50 4173 setparms = &(cmd->data.setadapterparms);
686c97ee 4174 if (qeth_setadpparms_inspect_rc(cmd)) {
8a593148 4175 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4176 setparms->data.mode = SET_PROMISC_MODE_OFF;
4177 }
4178 card->info.promisc_mode = setparms->data.mode;
4179 return 0;
4180}
4181
4182void qeth_setadp_promisc_mode(struct qeth_card *card)
4183{
4184 enum qeth_ipa_promisc_modes mode;
4185 struct net_device *dev = card->dev;
4186 struct qeth_cmd_buffer *iob;
4187 struct qeth_ipa_cmd *cmd;
4188
847a50fd 4189 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4190
4191 if (((dev->flags & IFF_PROMISC) &&
4192 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4193 (!(dev->flags & IFF_PROMISC) &&
4194 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4195 return;
4196 mode = SET_PROMISC_MODE_OFF;
4197 if (dev->flags & IFF_PROMISC)
4198 mode = SET_PROMISC_MODE_ON;
847a50fd 4199 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4200
4201 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4202 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4203 if (!iob)
4204 return;
ff5caa7a 4205 cmd = __ipa_cmd(iob);
4a71df50
FB		 4206 cmd->data.setadapterparms.data.mode = mode;
4207 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4208}
4209EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4210
4a71df50
FB		 4211struct net_device_stats *qeth_get_stats(struct net_device *dev)
4212{
4213 struct qeth_card *card;
4214
509e2562 4215 card = dev->ml_priv;
4a71df50 4216
847a50fd 4217 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4218
4219 return &card->stats;
4220}
4221EXPORT_SYMBOL_GPL(qeth_get_stats);
4222
4223static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4224 struct qeth_reply *reply, unsigned long data)
4225{
686c97ee 4226 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
b144b99f 4227 struct qeth_ipacmd_setadpparms *adp_cmd;
4a71df50 4228
847a50fd 4229 QETH_CARD_TEXT(card, 4, "chgmaccb");
686c97ee
JW		 4230 if (qeth_setadpparms_inspect_rc(cmd))
4231 return 0;
4a71df50 4232
b144b99f
JW		 4233 adp_cmd = &cmd->data.setadapterparms;
4234 if (IS_LAYER2(card) && IS_OSD(card) && !IS_VM_NIC(card) &&
4235 !(adp_cmd->hdr.flags & QETH_SETADP_FLAGS_VIRTUAL_MAC))
4236 return 0;
4237
4238 ether_addr_copy(card->dev->dev_addr, adp_cmd->data.change_addr.addr);
4a71df50
FB		 4239 return 0;
4240}
4241
4242int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4243{
4244 int rc;
4245 struct qeth_cmd_buffer *iob;
4246 struct qeth_ipa_cmd *cmd;
4247
847a50fd 4248 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4249
4250 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4251 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4252 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4253 if (!iob)
4254 return -ENOMEM;
ff5caa7a 4255 cmd = __ipa_cmd(iob);
4a71df50 4256 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
99f0b85d
JW		 4257 cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
4258 ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
4259 card->dev->dev_addr);
4a71df50
FB		 4260 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4261 NULL);
4262 return rc;
4263}
4264EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4265
d64ecc22
EL		 4266static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4267 struct qeth_reply *reply, unsigned long data)
4268{
686c97ee 4269 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
d64ecc22 4270 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4271 int fallback = *(int *)reply->param;
d64ecc22 4272
847a50fd 4273 QETH_CARD_TEXT(card, 4, "setaccb");
686c97ee
JW		 4274 if (cmd->hdr.return_code)
4275 return 0;
4276 qeth_setadpparms_inspect_rc(cmd);
d64ecc22 4277
d64ecc22
EL		 4278 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4279 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4280 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4281 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4282 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4283 if (cmd->data.setadapterparms.hdr.return_code !=
4284 SET_ACCESS_CTRL_RC_SUCCESS)
e19e5be8
JW		 4285 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%#x) on device %x: %#x\n",
4286 access_ctrl_req->subcmd_code, CARD_DEVID(card),
4287 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4288 switch (cmd->data.setadapterparms.hdr.return_code) {
4289 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4290 if (card->options.isolation == ISOLATION_MODE_NONE) {
4291 dev_info(&card->gdev->dev,
4292 "QDIO data connection isolation is deactivated\n");
4293 } else {
4294 dev_info(&card->gdev->dev,
4295 "QDIO data connection isolation is activated\n");
4296 }
d64ecc22 4297 break;
0f54761d 4298 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
e19e5be8
JW		 4299 QETH_DBF_MESSAGE(2, "QDIO data connection isolation on device %x already deactivated\n",
4300 CARD_DEVID(card));
0f54761d
SR		 4301 if (fallback)
4302 card->options.isolation = card->options.prev_isolation;
4303 break;
4304 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
e19e5be8
JW		 4305 QETH_DBF_MESSAGE(2, "QDIO data connection isolation on device %x already activated\n",
4306 CARD_DEVID(card));
0f54761d
SR		 4307 if (fallback)
4308 card->options.isolation = card->options.prev_isolation;
4309 break;
d64ecc22 4310 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4311 dev_err(&card->gdev->dev, "Adapter does not "
4312 "support QDIO data connection isolation\n");
d64ecc22 4313 break;
d64ecc22 4314 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4315 dev_err(&card->gdev->dev,
4316 "Adapter is dedicated. "
4317 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4318 if (fallback)
4319 card->options.isolation = card->options.prev_isolation;
d64ecc22 4320 break;
d64ecc22 4321 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4322 dev_err(&card->gdev->dev,
4323 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4324 if (fallback)
4325 card->options.isolation = card->options.prev_isolation;
4326 break;
4327 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4328 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4329 "support reflective relay mode\n");
4330 if (fallback)
4331 card->options.isolation = card->options.prev_isolation;
4332 break;
4333 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4334 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4335 "enabled at the adjacent switch port");
4336 if (fallback)
4337 card->options.isolation = card->options.prev_isolation;
4338 break;
4339 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4340 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4341 "at the adjacent switch failed\n");
d64ecc22 4342 break;
d64ecc22 4343 default:
d64ecc22 4344 /* this should never happen */
0f54761d
SR		 4345 if (fallback)
4346 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4347 break;
4348 }
bbb822a8 4349 return 0;
d64ecc22
EL		 4350}
4351
4352static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4353 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4354{
4355 int rc;
4356 struct qeth_cmd_buffer *iob;
4357 struct qeth_ipa_cmd *cmd;
4358 struct qeth_set_access_ctrl *access_ctrl_req;
4359
847a50fd 4360 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4361
4362 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4363 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4364
4365 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4366 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4367 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4368 if (!iob)
4369 return -ENOMEM;
ff5caa7a 4370 cmd = __ipa_cmd(iob);
d64ecc22
EL		 4371 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4372 access_ctrl_req->subcmd_code = isolation;
4373
4374 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4375 &fallback);
d64ecc22
EL		 4376 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4377 return rc;
4378}
4379
0f54761d 4380int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4381{
4382 int rc = 0;
4383
847a50fd 4384 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4385
5113fec0
UB		 4386 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4387 card->info.type == QETH_CARD_TYPE_OSX) &&
4388 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4389 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4390 card->options.isolation, fallback);
d64ecc22 4391 if (rc) {
e19e5be8
JW		 4392 QETH_DBF_MESSAGE(3, "IPA(SET_ACCESS_CTRL(%d) on device %x: sent failed\n",
4393 rc, CARD_DEVID(card));
0f54761d 4394 rc = -EOPNOTSUPP;
d64ecc22
EL		 4395 }
4396 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4397 card->options.isolation = ISOLATION_MODE_NONE;
4398
4399 dev_err(&card->gdev->dev, "Adapter does not "
4400 "support QDIO data connection isolation\n");
4401 rc = -EOPNOTSUPP;
4402 }
4403 return rc;
4404}
4405EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4406
4a71df50
FB		 4407void qeth_tx_timeout(struct net_device *dev)
4408{
4409 struct qeth_card *card;
4410
509e2562 4411 card = dev->ml_priv;
847a50fd 4412 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4413 card->stats.tx_errors++;
4414 qeth_schedule_recovery(card);
4415}
4416EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4417
942d6984 4418static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4419{
509e2562 4420 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4421 int rc = 0;
4422
4423 switch (regnum) {
4424 case MII_BMCR: /* Basic mode control register */
4425 rc = BMCR_FULLDPLX;
4426 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4427 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
54e049c2
JW		 4428 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH) &&
4429 (card->info.link_type != QETH_LINK_TYPE_25GBIT_ETH))
4a71df50
FB		 4430 rc |= BMCR_SPEED100;
4431 break;
4432 case MII_BMSR: /* Basic mode status register */
4433 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4434 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4435 BMSR_100BASE4;
4436 break;
4437 case MII_PHYSID1: /* PHYS ID 1 */
4438 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4439 dev->dev_addr[2];
4440 rc = (rc >> 5) & 0xFFFF;
4441 break;
4442 case MII_PHYSID2: /* PHYS ID 2 */
4443 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4444 break;
4445 case MII_ADVERTISE: /* Advertisement control reg */
4446 rc = ADVERTISE_ALL;
4447 break;
4448 case MII_LPA: /* Link partner ability reg */
4449 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4450 LPA_100BASE4 | LPA_LPACK;
4451 break;
4452 case MII_EXPANSION: /* Expansion register */
4453 break;
4454 case MII_DCOUNTER: /* disconnect counter */
4455 break;
4456 case MII_FCSCOUNTER: /* false carrier counter */
4457 break;
4458 case MII_NWAYTEST: /* N-way auto-neg test register */
4459 break;
4460 case MII_RERRCOUNTER: /* rx error counter */
4461 rc = card->stats.rx_errors;
4462 break;
4463 case MII_SREVISION: /* silicon revision */
4464 break;
4465 case MII_RESV1: /* reserved 1 */
4466 break;
4467 case MII_LBRERROR: /* loopback, rx, bypass error */
4468 break;
4469 case MII_PHYADDR: /* physical address */
4470 break;
4471 case MII_RESV2: /* reserved 2 */
4472 break;
4473 case MII_TPISTATUS: /* TPI status for 10mbps */
4474 break;
4475 case MII_NCONFIG: /* network interface config */
4476 break;
4477 default:
4478 break;
4479 }
4480 return rc;
4481}
4a71df50
FB		 4482
4483static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4484 struct qeth_cmd_buffer *iob, int len,
4485 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4486 unsigned long),
4487 void *reply_param)
4488{
4489 u16 s1, s2;
4490
847a50fd 4491 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50 4492
4a71df50
FB		 4493 /* adjust PDU length fields in IPA_PDU_HEADER */
4494 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4495 s2 = (u32) len;
4496 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4497 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4498 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4499 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4500 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4501 reply_cb, reply_param);
4502}
4503
4504static int qeth_snmp_command_cb(struct qeth_card *card,
4505 struct qeth_reply *reply, unsigned long sdata)
4506{
4507 struct qeth_ipa_cmd *cmd;
4508 struct qeth_arp_query_info *qinfo;
4a71df50 4509 unsigned char *data;
9a764c1e 4510 void *snmp_data;
4a71df50
FB		 4511 __u16 data_len;
4512
847a50fd 4513 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4514
4515 cmd = (struct qeth_ipa_cmd *) sdata;
4516 data = (unsigned char *)((char *)cmd - reply->offset);
4517 qinfo = (struct qeth_arp_query_info *) reply->param;
4a71df50
FB		 4518
4519 if (cmd->hdr.return_code) {
8a593148 4520 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4521 return 0;
4522 }
4523 if (cmd->data.setadapterparms.hdr.return_code) {
4524 cmd->hdr.return_code =
4525 cmd->data.setadapterparms.hdr.return_code;
8a593148 4526 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4527 return 0;
4528 }
4529 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
9a764c1e
JW		 4530 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4531 snmp_data = &cmd->data.setadapterparms.data.snmp;
4532 data_len -= offsetof(struct qeth_ipa_cmd,
4533 data.setadapterparms.data.snmp);
4534 } else {
4535 snmp_data = &cmd->data.setadapterparms.data.snmp.request;
4536 data_len -= offsetof(struct qeth_ipa_cmd,
4537 data.setadapterparms.data.snmp.request);
4538 }
4a71df50
FB		 4539
4540 /* check if there is enough room in userspace */
4541 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4542 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4543 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4544 return 0;
4545 }
847a50fd 4546 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4547 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4548 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4549 cmd->data.setadapterparms.hdr.seq_no);
4550 /*copy entries to user buffer*/
9a764c1e 4551 memcpy(qinfo->udata + qinfo->udata_offset, snmp_data, data_len);
4a71df50 4552 qinfo->udata_offset += data_len;
9a764c1e 4553
4a71df50 4554 /* check if all replies received ... */
847a50fd 4555 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4556 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4557 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4558 cmd->data.setadapterparms.hdr.seq_no);
4559 if (cmd->data.setadapterparms.hdr.seq_no <
4560 cmd->data.setadapterparms.hdr.used_total)
4561 return 1;
4562 return 0;
4563}
4564
942d6984 4565static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4566{
4567 struct qeth_cmd_buffer *iob;
4568 struct qeth_ipa_cmd *cmd;
4569 struct qeth_snmp_ureq *ureq;
6fb392b1 4570 unsigned int req_len;
4a71df50
FB		 4571 struct qeth_arp_query_info qinfo = {0, };
4572 int rc = 0;
4573
847a50fd 4574 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4575
4576 if (card->info.guestlan)
4577 return -EOPNOTSUPP;
4578
4579 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4fda3354 4580 IS_LAYER3(card))
4a71df50 4581 return -EOPNOTSUPP;
4fda3354 4582
4a71df50
FB		 4583 /* skip 4 bytes (data_len struct member) to get req_len */
4584 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4585 return -EFAULT;
6fb392b1
UB		 4586 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4587 sizeof(struct qeth_ipacmd_hdr) -
4588 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4589 return -EINVAL;
4986f3f0
JL		 4590 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4591 if (IS_ERR(ureq)) {
847a50fd 4592 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4593 return PTR_ERR(ureq);
4a71df50
FB		 4594 }
4595 qinfo.udata_len = ureq->hdr.data_len;
4596 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4597 if (!qinfo.udata) {
4598 kfree(ureq);
4599 return -ENOMEM;
4600 }
4601 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4602
4603 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4604 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4605 if (!iob) {
4606 rc = -ENOMEM;
4607 goto out;
4608 }
ff5caa7a 4609 cmd = __ipa_cmd(iob);
4a71df50
FB		 4610 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4611 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4612 qeth_snmp_command_cb, (void *)&qinfo);
4613 if (rc)
e19e5be8
JW		 4614 QETH_DBF_MESSAGE(2, "SNMP command failed on device %x: (%#x)\n",
4615 CARD_DEVID(card), rc);
4a71df50
FB		 4616 else {
4617 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4618 rc = -EFAULT;
4619 }
1aec42bc 4620out:
4a71df50
FB		 4621 kfree(ureq);
4622 kfree(qinfo.udata);
4623 return rc;
4624}
4a71df50 4625
c3ab96f3
FB		 4626static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4627 struct qeth_reply *reply, unsigned long data)
4628{
686c97ee 4629 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
c3ab96f3
FB		 4630 struct qeth_qoat_priv *priv;
4631 char *resdata;
4632 int resdatalen;
4633
4634 QETH_CARD_TEXT(card, 3, "qoatcb");
686c97ee
JW		 4635 if (qeth_setadpparms_inspect_rc(cmd))
4636 return 0;
c3ab96f3 4637
c3ab96f3
FB		 4638 priv = (struct qeth_qoat_priv *)reply->param;
4639 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4640 resdata = (char *)data + 28;
4641
4642 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4643 cmd->hdr.return_code = IPA_RC_FFFF;
4644 return 0;
4645 }
4646
4647 memcpy((priv->buffer + priv->response_len), resdata,
4648 resdatalen);
4649 priv->response_len += resdatalen;
4650
4651 if (cmd->data.setadapterparms.hdr.seq_no <
4652 cmd->data.setadapterparms.hdr.used_total)
4653 return 1;
4654 return 0;
4655}
4656
942d6984 4657static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4658{
4659 int rc = 0;
4660 struct qeth_cmd_buffer *iob;
4661 struct qeth_ipa_cmd *cmd;
4662 struct qeth_query_oat *oat_req;
4663 struct qeth_query_oat_data oat_data;
4664 struct qeth_qoat_priv priv;
4665 void __user *tmp;
4666
4667 QETH_CARD_TEXT(card, 3, "qoatcmd");
4668
4669 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4670 rc = -EOPNOTSUPP;
4671 goto out;
4672 }
4673
4674 if (copy_from_user(&oat_data, udata,
4675 sizeof(struct qeth_query_oat_data))) {
4676 rc = -EFAULT;
4677 goto out;
4678 }
4679
4680 priv.buffer_len = oat_data.buffer_len;
4681 priv.response_len = 0;
aec45e85 4682 priv.buffer = vzalloc(oat_data.buffer_len);
c3ab96f3
FB		 4683 if (!priv.buffer) {
4684 rc = -ENOMEM;
4685 goto out;
4686 }
4687
4688 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4689 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4690 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4691 if (!iob) {
4692 rc = -ENOMEM;
4693 goto out_free;
4694 }
ff5caa7a 4695 cmd = __ipa_cmd(iob);
c3ab96f3
FB		 4696 oat_req = &cmd->data.setadapterparms.data.query_oat;
4697 oat_req->subcmd_code = oat_data.command;
4698
4699 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4700 &priv);
4701 if (!rc) {
4702 if (is_compat_task())
4703 tmp = compat_ptr(oat_data.ptr);
4704 else
4705 tmp = (void __user *)(unsigned long)oat_data.ptr;
4706
4707 if (copy_to_user(tmp, priv.buffer,
4708 priv.response_len)) {
4709 rc = -EFAULT;
4710 goto out_free;
4711 }
4712
4713 oat_data.response_len = priv.response_len;
4714
4715 if (copy_to_user(udata, &oat_data,
4716 sizeof(struct qeth_query_oat_data)))
4717 rc = -EFAULT;
4718 } else
4719 if (rc == IPA_RC_FFFF)
4720 rc = -EFAULT;
4721
4722out_free:
aec45e85 4723 vfree(priv.buffer);
c3ab96f3
FB		 4724out:
4725 return rc;
4726}
c3ab96f3 4727
e71e4072
HC		 4728static int qeth_query_card_info_cb(struct qeth_card *card,
4729 struct qeth_reply *reply, unsigned long data)
02d5cb5b 4730{
686c97ee
JW		 4731 struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
4732 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
02d5cb5b 4733 struct qeth_query_card_info *card_info;
02d5cb5b
EC		 4734
4735 QETH_CARD_TEXT(card, 2, "qcrdincb");
686c97ee
JW		 4736 if (qeth_setadpparms_inspect_rc(cmd))
4737 return 0;
02d5cb5b 4738
686c97ee
JW		 4739 card_info = &cmd->data.setadapterparms.data.card_info;
4740 carrier_info->card_type = card_info->card_type;
4741 carrier_info->port_mode = card_info->port_mode;
4742 carrier_info->port_speed = card_info->port_speed;
02d5cb5b
EC		 4743 return 0;
4744}
4745
bca51650 4746static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4747 struct carrier_info *carrier_info)
4748{
4749 struct qeth_cmd_buffer *iob;
4750
4751 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4752 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4753 return -EOPNOTSUPP;
4754 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4755 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4756 if (!iob)
4757 return -ENOMEM;
02d5cb5b
EC		 4758 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4759 (void *)carrier_info);
4760}
02d5cb5b 4761
ec61bd2f
JW		 4762/**
4763 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4764 * @card: pointer to a qeth_card
4765 *
4766 * Returns
4767 * 0, if a MAC address has been set for the card's netdevice
4768 * a return code, for various error conditions
4769 */
4770int qeth_vm_request_mac(struct qeth_card *card)
4771{
4772 struct diag26c_mac_resp *response;
4773 struct diag26c_mac_req *request;
4774 struct ccw_dev_id id;
4775 int rc;
4776
4777 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4778
ec61bd2f
JW		 4779 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4780 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4781 if (!request || !response) {
4782 rc = -ENOMEM;
4783 goto out;
4784 }
4785
46646105 4786 ccw_device_get_id(CARD_DDEV(card), &id);
ec61bd2f
JW		 4787 request->resp_buf_len = sizeof(*response);
4788 request->resp_version = DIAG26C_VERSION2;
4789 request->op_code = DIAG26C_GET_MAC;
4790 request->devno = id.devno;
4791
615dff22 4792 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f 4793 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
615dff22 4794 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f
JW		 4795 if (rc)
4796 goto out;
615dff22 4797 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
ec61bd2f
JW		 4798
4799 if (request->resp_buf_len < sizeof(*response) ||
4800 response->version != request->resp_version) {
4801 rc = -EIO;
4802 QETH_DBF_TEXT(SETUP, 2, "badresp");
4803 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4804 sizeof(request->resp_buf_len));
4805 } else if (!is_valid_ether_addr(response->mac)) {
4806 rc = -EINVAL;
4807 QETH_DBF_TEXT(SETUP, 2, "badmac");
4808 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4809 } else {
4810 ether_addr_copy(card->dev->dev_addr, response->mac);
4811 }
4812
4813out:
4814 kfree(response);
4815 kfree(request);
4816 return rc;
4817}
4818EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4819
cef6ff22 4820static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4821{
aa59004b
JW		 4822 if (card->info.type == QETH_CARD_TYPE_IQD)
4823 return QDIO_IQDIO_QFMT;
4824 else
4825 return QDIO_QETH_QFMT;
4a71df50
FB		 4826}
4827
d0ff1f52
UB		 4828static void qeth_determine_capabilities(struct qeth_card *card)
4829{
4830 int rc;
4831 int length;
4832 char *prcd;
4833 struct ccw_device *ddev;
4834 int ddev_offline = 0;
4835
4836 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4837 ddev = CARD_DDEV(card);
4838 if (!ddev->online) {
4839 ddev_offline = 1;
4840 rc = ccw_device_set_online(ddev);
4841 if (rc) {
4842 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4843 goto out;
4844 }
4845 }
4846
4847 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4848 if (rc) {
e19e5be8
JW		 4849 QETH_DBF_MESSAGE(2, "qeth_read_conf_data on device %x returned %i\n",
4850 CARD_DEVID(card), rc);
d0ff1f52
UB		 4851 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4852 goto out_offline;
4853 }
4854 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4855 if (ddev_offline)
4856 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4857 kfree(prcd);
4858
4859 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4860 if (rc)
4861 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4862
0da9581d 4863 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4864 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4865 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4866 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4867 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4868 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4869 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4870 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4871 dev_info(&card->gdev->dev,
4872 "Completion Queueing supported\n");
4873 } else {
4874 card->options.cq = QETH_CQ_NOTAVAILABLE;
4875 }
4876
4877
d0ff1f52
UB		 4878out_offline:
4879 if (ddev_offline == 1)
4880 ccw_device_set_offline(ddev);
4881out:
4882 return;
4883}
4884
cef6ff22
JW		 4885static void qeth_qdio_establish_cq(struct qeth_card *card,
4886 struct qdio_buffer **in_sbal_ptrs,
4887 void (**queue_start_poll)
4888 (struct ccw_device *, int,
4889 unsigned long))
4890{
0da9581d
EL		 4891 int i;
4892
4893 if (card->options.cq == QETH_CQ_ENABLED) {
4894 int offset = QDIO_MAX_BUFFERS_PER_Q *
4895 (card->qdio.no_in_queues - 1);
0da9581d
EL		 4896 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4897 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4898 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4899 }
4900
4901 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4902 }
4903}
4904
4a71df50
FB		 4905static int qeth_qdio_establish(struct qeth_card *card)
4906{
4907 struct qdio_initialize init_data;
4908 char *qib_param_field;
4909 struct qdio_buffer **in_sbal_ptrs;
104ea556 4910 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4911 struct qdio_buffer **out_sbal_ptrs;
4912 int i, j, k;
4913 int rc = 0;
4914
d11ba0c4 4915 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50 4916
6396bb22
KC		 4917 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q,
4918 GFP_KERNEL);
104ea556 4919 if (!qib_param_field) {
4920 rc = -ENOMEM;
4921 goto out_free_nothing;
4922 }
4a71df50
FB		 4923
4924 qeth_create_qib_param_field(card, qib_param_field);
4925 qeth_create_qib_param_field_blkt(card, qib_param_field);
4926
6396bb22
KC		 4927 in_sbal_ptrs = kcalloc(card->qdio.no_in_queues * QDIO_MAX_BUFFERS_PER_Q,
4928 sizeof(void *),
4a71df50
FB		 4929 GFP_KERNEL);
4930 if (!in_sbal_ptrs) {
104ea556 4931 rc = -ENOMEM;
4932 goto out_free_qib_param;
4a71df50 4933 }
0da9581d 4934 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4935 in_sbal_ptrs[i] = (struct qdio_buffer *)
4936 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4937 }
4a71df50 4938
6396bb22 4939 queue_start_poll = kcalloc(card->qdio.no_in_queues, sizeof(void *),
0da9581d 4940 GFP_KERNEL);
104ea556 4941 if (!queue_start_poll) {
4942 rc = -ENOMEM;
4943 goto out_free_in_sbals;
4944 }
0da9581d 4945 for (i = 0; i < card->qdio.no_in_queues; ++i)
7bcd64eb 4946 queue_start_poll[i] = qeth_qdio_start_poll;
0da9581d
EL		 4947
4948 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4949
4a71df50 4950 out_sbal_ptrs =
6396bb22
KC		 4951 kcalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q,
4952 sizeof(void *),
4953 GFP_KERNEL);
4a71df50 4954 if (!out_sbal_ptrs) {
104ea556 4955 rc = -ENOMEM;
4956 goto out_free_queue_start_poll;
4a71df50
FB		 4957 }
4958 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4959 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4960 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4961 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4962 }
4963
4964 memset(&init_data, 0, sizeof(struct qdio_initialize));
4965 init_data.cdev = CARD_DDEV(card);
4966 init_data.q_format = qeth_get_qdio_q_format(card);
4967 init_data.qib_param_field_format = 0;
4968 init_data.qib_param_field = qib_param_field;
0da9581d 4969 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4970 init_data.no_output_qs = card->qdio.no_out_queues;
7bcd64eb
JW		 4971 init_data.input_handler = qeth_qdio_input_handler;
4972 init_data.output_handler = qeth_qdio_output_handler;
e58b0d90 4973 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4974 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4975 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4976 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4977 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4978 init_data.scan_threshold =
0fa81cd4 4979 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4980
4981 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4982 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4983 rc = qdio_allocate(&init_data);
4984 if (rc) {
4985 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4986 goto out;
4987 }
4988 rc = qdio_establish(&init_data);
4989 if (rc) {
4a71df50 4990 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4991 qdio_free(CARD_DDEV(card));
4992 }
4a71df50 4993 }
0da9581d
EL		 4994
4995 switch (card->options.cq) {
4996 case QETH_CQ_ENABLED:
4997 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4998 break;
4999 case QETH_CQ_DISABLED:
5000 dev_info(&card->gdev->dev, "Completion Queue support disabled");
5001 break;
5002 default:
5003 break;
5004 }
cc961d40 5005out:
4a71df50 5006 kfree(out_sbal_ptrs);
104ea556 5007out_free_queue_start_poll:
5008 kfree(queue_start_poll);
5009out_free_in_sbals:
4a71df50 5010 kfree(in_sbal_ptrs);
104ea556 5011out_free_qib_param:
4a71df50 5012 kfree(qib_param_field);
104ea556 5013out_free_nothing:
4a71df50
FB		 5014 return rc;
5015}
5016
5017static void qeth_core_free_card(struct qeth_card *card)
5018{
d11ba0c4
PT		 5019 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5020 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 5021 qeth_clean_channel(&card->read);
5022 qeth_clean_channel(&card->write);
f15cdaf2 5023 qeth_clean_channel(&card->data);
4a71df50 5024 qeth_free_qdio_buffers(card);
6bcac508 5025 unregister_service_level(&card->qeth_service_level);
a2eb0ad5 5026 dev_set_drvdata(&card->gdev->dev, NULL);
4a71df50
FB		 5027 kfree(card);
5028}
5029
395672e0
SR		 5030void qeth_trace_features(struct qeth_card *card)
5031{
5032 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 5033 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
5034 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
5035 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
5036 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
5037 sizeof(card->info.diagass_support));
395672e0
SR		 5038}
5039EXPORT_SYMBOL_GPL(qeth_trace_features);
5040
4a71df50 5041static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 5042 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5043 .driver_info = QETH_CARD_TYPE_OSD},
5044 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5045 .driver_info = QETH_CARD_TYPE_IQD},
5046 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5047 .driver_info = QETH_CARD_TYPE_OSN},
5048 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5049 .driver_info = QETH_CARD_TYPE_OSM},
5050 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5051 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5052 {},
5053};
5054MODULE_DEVICE_TABLE(ccw, qeth_ids);
5055
5056static struct ccw_driver qeth_ccw_driver = {
3bda058b 5057 .driver = {
3e70b3b8 5058 .owner = THIS_MODULE,
3bda058b
SO		 5059 .name = "qeth",
5060 },
4a71df50
FB		 5061 .ids = qeth_ids,
5062 .probe = ccwgroup_probe_ccwdev,
5063 .remove = ccwgroup_remove_ccwdev,
5064};
5065
9fae5c3b 5066int qeth_core_hardsetup_card(struct qeth_card *card, bool *carrier_ok)
4a71df50 5067{
6ebb7f8d 5068 int retries = 3;
4a71df50
FB		 5069 int rc;
5070
d11ba0c4 5071 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5072 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5073 qeth_update_from_chp_desc(card);
4a71df50 5074retry:
6ebb7f8d 5075 if (retries < 3)
e19e5be8
JW		 5076 QETH_DBF_MESSAGE(2, "Retrying to do IDX activates on device %x.\n",
5077 CARD_DEVID(card));
22ae2790 5078 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5079 ccw_device_set_offline(CARD_DDEV(card));
5080 ccw_device_set_offline(CARD_WDEV(card));
5081 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5082 qdio_free(CARD_DDEV(card));
aa909224
UB		 5083 rc = ccw_device_set_online(CARD_RDEV(card));
5084 if (rc)
5085 goto retriable;
5086 rc = ccw_device_set_online(CARD_WDEV(card));
5087 if (rc)
5088 goto retriable;
5089 rc = ccw_device_set_online(CARD_DDEV(card));
5090 if (rc)
5091 goto retriable;
aa909224 5092retriable:
4a71df50 5093 if (rc == -ERESTARTSYS) {
d11ba0c4 5094 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5095 return rc;
5096 } else if (rc) {
d11ba0c4 5097 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5098 if (--retries < 0)
4a71df50
FB		 5099 goto out;
5100 else
5101 goto retry;
5102 }
d0ff1f52 5103 qeth_determine_capabilities(card);
4a71df50
FB		 5104 qeth_init_tokens(card);
5105 qeth_init_func_level(card);
8d908eb0 5106 rc = qeth_idx_activate_channel(card, &card->read, qeth_idx_read_cb);
4a71df50 5107 if (rc == -ERESTARTSYS) {
d11ba0c4 5108 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5109 return rc;
5110 } else if (rc) {
d11ba0c4 5111 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5112 if (--retries < 0)
5113 goto out;
5114 else
5115 goto retry;
5116 }
8d908eb0 5117 rc = qeth_idx_activate_channel(card, &card->write, qeth_idx_write_cb);
4a71df50 5118 if (rc == -ERESTARTSYS) {
d11ba0c4 5119 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5120 return rc;
5121 } else if (rc) {
d11ba0c4 5122 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5123 if (--retries < 0)
5124 goto out;
5125 else
5126 goto retry;
5127 }
908abbb5 5128 card->read_or_write_problem = 0;
4a71df50
FB		 5129 rc = qeth_mpc_initialize(card);
5130 if (rc) {
d11ba0c4 5131 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5132 goto out;
5133 }
1da74b1c 5134
10340510
JW		 5135 rc = qeth_send_startlan(card);
5136 if (rc) {
5137 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5138 if (rc == IPA_RC_LAN_OFFLINE) {
5139 dev_warn(&card->gdev->dev,
5140 "The LAN is offline\n");
9fae5c3b 5141 *carrier_ok = false;
10340510
JW		 5142 } else {
5143 rc = -ENODEV;
5144 goto out;
5145 }
91cc98f5 5146 } else {
9fae5c3b
JW		 5147 *carrier_ok = true;
5148 }
5149
1da74b1c 5150 card->options.ipa4.supported_funcs = 0;
4d7def2a 5151 card->options.ipa6.supported_funcs = 0;
1da74b1c 5152 card->options.adp.supported_funcs = 0;
b4d72c08 5153 card->options.sbp.supported_funcs = 0;
1da74b1c 5154 card->info.diagass_support = 0;
1aec42bc
TR		 5155 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5156 if (rc == -ENOMEM)
5157 goto out;
ee75fb86
KM		 5158 if (qeth_is_supported(card, IPA_IPV6)) {
5159 rc = qeth_query_ipassists(card, QETH_PROT_IPV6);
5160 if (rc == -ENOMEM)
5161 goto out;
5162 }
1aec42bc
TR		 5163 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5164 rc = qeth_query_setadapterparms(card);
5165 if (rc < 0) {
10340510 5166 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5167 goto out;
5168 }
5169 }
5170 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5171 rc = qeth_query_setdiagass(card);
5172 if (rc < 0) {
10340510 5173 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5174 goto out;
5175 }
5176 }
4a71df50
FB		 5177 return 0;
5178out:
74eacdb9
FB		 5179 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5180 "an error on the device\n");
e19e5be8
JW		 5181 QETH_DBF_MESSAGE(2, "Initialization for device %x failed in hardsetup! rc=%d\n",
5182 CARD_DEVID(card), rc);
4a71df50
FB		 5183 return rc;
5184}
5185EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5186
8d68af6a
JW		 5187static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5188 struct sk_buff *skb, int offset, int data_len)
4a71df50
FB		 5189{
5190 struct page *page = virt_to_page(element->addr);
b6f72f96 5191 unsigned int next_frag;
b3332930 5192
8d68af6a
JW		 5193 /* first fill the linear space */
5194 if (!skb->len) {
5195 unsigned int linear = min(data_len, skb_tailroom(skb));
0da9581d 5196
8d68af6a
JW		 5197 skb_put_data(skb, element->addr + offset, linear);
5198 data_len -= linear;
5199 if (!data_len)
5200 return;
5201 offset += linear;
5202 /* fall through to add page frag for remaining data */
4a71df50 5203 }
0da9581d 5204
8d68af6a 5205 next_frag = skb_shinfo(skb)->nr_frags;
b6f72f96 5206 get_page(page);
8d68af6a 5207 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
4a71df50
FB		 5208}
5209
bca51650
TR		 5210static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5211{
5212 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5213}
5214
4a71df50 5215struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5216 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5217 struct qdio_buffer_element **__element, int *__offset,
5218 struct qeth_hdr **hdr)
5219{
5220 struct qdio_buffer_element *element = *__element;
b3332930 5221 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50 5222 int offset = *__offset;
8d68af6a 5223 struct sk_buff *skb;
76b11f8e 5224 int skb_len = 0;
4a71df50
FB		 5225 void *data_ptr;
5226 int data_len;
5227 int headroom = 0;
5228 int use_rx_sg = 0;
4a71df50 5229
4a71df50 5230 /* qeth_hdr must not cross element boundaries */
864c17c3 5231 while (element->length < offset + sizeof(struct qeth_hdr)) {
4a71df50
FB		 5232 if (qeth_is_last_sbale(element))
5233 return NULL;
5234 element++;
5235 offset = 0;
4a71df50
FB		 5236 }
5237 *hdr = element->addr + offset;
5238
5239 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5240 switch ((*hdr)->hdr.l2.id) {
5241 case QETH_HEADER_TYPE_LAYER2:
5242 skb_len = (*hdr)->hdr.l2.pkt_length;
5243 break;
5244 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5245 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5246 headroom = ETH_HLEN;
76b11f8e
UB		 5247 break;
5248 case QETH_HEADER_TYPE_OSN:
5249 skb_len = (*hdr)->hdr.osn.pdu_length;
5250 headroom = sizeof(struct qeth_hdr);
5251 break;
5252 default:
5253 break;
4a71df50
FB		 5254 }
5255
5256 if (!skb_len)
5257 return NULL;
5258
b3332930
FB		 5259 if (((skb_len >= card->options.rx_sg_cb) &&
5260 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5261 (!atomic_read(&card->force_alloc_skb))) ||
8d68af6a 5262 (card->options.cq == QETH_CQ_ENABLED))
4a71df50 5263 use_rx_sg = 1;
8d68af6a
JW		 5264
5265 if (use_rx_sg && qethbuffer->rx_skb) {
5266 /* QETH_CQ_ENABLED only: */
5267 skb = qethbuffer->rx_skb;
5268 qethbuffer->rx_skb = NULL;
4a71df50 5269 } else {
8d68af6a
JW		 5270 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5271
37cf05d2 5272 skb = napi_alloc_skb(&card->napi, linear + headroom);
4a71df50 5273 }
8d68af6a
JW		 5274 if (!skb)
5275 goto no_mem;
5276 if (headroom)
5277 skb_reserve(skb, headroom);
4a71df50
FB		 5278
5279 data_ptr = element->addr + offset;
5280 while (skb_len) {
5281 data_len = min(skb_len, (int)(element->length - offset));
5282 if (data_len) {
8d68af6a
JW		 5283 if (use_rx_sg)
5284 qeth_create_skb_frag(element, skb, offset,
5285 data_len);
5286 else
59ae1d12 5287 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5288 }
5289 skb_len -= data_len;
5290 if (skb_len) {
5291 if (qeth_is_last_sbale(element)) {
847a50fd 5292 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5293 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5294 dev_kfree_skb_any(skb);
5295 card->stats.rx_errors++;
5296 return NULL;
5297 }
5298 element++;
5299 offset = 0;
5300 data_ptr = element->addr;
5301 } else {
5302 offset += data_len;
5303 }
5304 }
5305 *__element = element;
5306 *__offset = offset;
5307 if (use_rx_sg && card->options.performance_stats) {
5308 card->perf_stats.sg_skbs_rx++;
5309 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5310 }
5311 return skb;
5312no_mem:
5313 if (net_ratelimit()) {
847a50fd 5314 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5315 }
5316 card->stats.rx_dropped++;
5317 return NULL;
5318}
5319EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5320
d73ef324
JW		 5321int qeth_poll(struct napi_struct *napi, int budget)
5322{
5323 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5324 int work_done = 0;
5325 struct qeth_qdio_buffer *buffer;
5326 int done;
5327 int new_budget = budget;
5328
5329 if (card->options.performance_stats) {
5330 card->perf_stats.inbound_cnt++;
5331 card->perf_stats.inbound_start_time = qeth_get_micros();
5332 }
5333
5334 while (1) {
5335 if (!card->rx.b_count) {
5336 card->rx.qdio_err = 0;
5337 card->rx.b_count = qdio_get_next_buffers(
5338 card->data.ccwdev, 0, &card->rx.b_index,
5339 &card->rx.qdio_err);
5340 if (card->rx.b_count <= 0) {
5341 card->rx.b_count = 0;
5342 break;
5343 }
5344 card->rx.b_element =
5345 &card->qdio.in_q->bufs[card->rx.b_index]
5346 .buffer->element[0];
5347 card->rx.e_offset = 0;
5348 }
5349
5350 while (card->rx.b_count) {
5351 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5352 if (!(card->rx.qdio_err &&
5353 qeth_check_qdio_errors(card, buffer->buffer,
5354 card->rx.qdio_err, "qinerr")))
5355 work_done +=
5356 card->discipline->process_rx_buffer(
5357 card, new_budget, &done);
5358 else
5359 done = 1;
5360
5361 if (done) {
5362 if (card->options.performance_stats)
5363 card->perf_stats.bufs_rec++;
5364 qeth_put_buffer_pool_entry(card,
5365 buffer->pool_entry);
5366 qeth_queue_input_buffer(card, card->rx.b_index);
5367 card->rx.b_count--;
5368 if (card->rx.b_count) {
5369 card->rx.b_index =
5370 (card->rx.b_index + 1) %
5371 QDIO_MAX_BUFFERS_PER_Q;
5372 card->rx.b_element =
5373 &card->qdio.in_q
5374 ->bufs[card->rx.b_index]
5375 .buffer->element[0];
5376 card->rx.e_offset = 0;
5377 }
5378 }
5379
5380 if (work_done >= budget)
5381 goto out;
5382 else
5383 new_budget = budget - work_done;
5384 }
5385 }
5386
978759e8 5387 napi_complete_done(napi, work_done);
d73ef324
JW		 5388 if (qdio_start_irq(card->data.ccwdev, 0))
5389 napi_schedule(&card->napi);
5390out:
5391 if (card->options.performance_stats)
5392 card->perf_stats.inbound_time += qeth_get_micros() -
5393 card->perf_stats.inbound_start_time;
5394 return work_done;
5395}
5396EXPORT_SYMBOL_GPL(qeth_poll);
5397
ad3cbf61
JW		 5398static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
5399{
5400 if (!cmd->hdr.return_code)
5401 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5402 return cmd->hdr.return_code;
5403}
5404
4666d7fb
JW		 5405static int qeth_setassparms_get_caps_cb(struct qeth_card *card,
5406 struct qeth_reply *reply,
5407 unsigned long data)
5408{
5409 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
5410 struct qeth_ipa_caps *caps = reply->param;
5411
5412 if (qeth_setassparms_inspect_rc(cmd))
5413 return 0;
5414
5415 caps->supported = cmd->data.setassparms.data.caps.supported;
5416 caps->enabled = cmd->data.setassparms.data.caps.enabled;
5417 return 0;
5418}
5419
8f43fb00
TR		 5420int qeth_setassparms_cb(struct qeth_card *card,
5421 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5422{
5423 struct qeth_ipa_cmd *cmd;
5424
5425 QETH_CARD_TEXT(card, 4, "defadpcb");
5426
5427 cmd = (struct qeth_ipa_cmd *) data;
5428 if (cmd->hdr.return_code == 0) {
5429 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5430 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5431 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5432 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5433 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5434 }
4d7def2a
TR		 5435 return 0;
5436}
8f43fb00 5437EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5438
b475e316
TR		 5439struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5440 enum qeth_ipa_funcs ipa_func,
5441 __u16 cmd_code, __u16 len,
5442 enum qeth_prot_versions prot)
4d7def2a
TR		 5443{
5444 struct qeth_cmd_buffer *iob;
5445 struct qeth_ipa_cmd *cmd;
5446
5447 QETH_CARD_TEXT(card, 4, "getasscm");
5448 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5449
5450 if (iob) {
ff5caa7a 5451 cmd = __ipa_cmd(iob);
4d7def2a
TR		 5452 cmd->data.setassparms.hdr.assist_no = ipa_func;
5453 cmd->data.setassparms.hdr.length = 8 + len;
5454 cmd->data.setassparms.hdr.command_code = cmd_code;
4d7def2a
TR		 5455 }
5456
5457 return iob;
5458}
b475e316 5459EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a 5460
a8155b00
KM		 5461int qeth_send_simple_setassparms_prot(struct qeth_card *card,
5462 enum qeth_ipa_funcs ipa_func,
5463 u16 cmd_code, long data,
5464 enum qeth_prot_versions prot)
4d7def2a 5465{
4d7def2a
TR		 5466 int length = 0;
5467 struct qeth_cmd_buffer *iob;
5468
a8155b00 5469 QETH_CARD_TEXT_(card, 4, "simassp%i", prot);
4d7def2a
TR		 5470 if (data)
5471 length = sizeof(__u32);
a8155b00 5472 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, length, prot);
4d7def2a
TR		 5473 if (!iob)
5474 return -ENOMEM;
4fa55fa9
JW		 5475
5476 __ipa_cmd(iob)->data.setassparms.data.flags_32bit = (__u32) data;
5477 return qeth_send_ipa_cmd(card, iob, qeth_setassparms_cb, NULL);
4d7def2a 5478}
a8155b00 5479EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms_prot);
4d7def2a 5480
4a71df50
FB		 5481static void qeth_unregister_dbf_views(void)
5482{
d11ba0c4
PT		 5483 int x;
5484 for (x = 0; x < QETH_DBF_INFOS; x++) {
5485 debug_unregister(qeth_dbf[x].id);
5486 qeth_dbf[x].id = NULL;
5487 }
4a71df50
FB		 5488}
5489
8e96c51c 5490void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5491{
5492 char dbf_txt_buf[32];
345aa66e 5493 va_list args;
cd023216 5494
8e6a8285 5495 if (!debug_level_enabled(id, level))
cd023216 5496 return;
345aa66e
PT		 5497 va_start(args, fmt);
5498 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5499 va_end(args);
8e96c51c 5500 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5501}
5502EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5503
4a71df50
FB		 5504static int qeth_register_dbf_views(void)
5505{
d11ba0c4
PT		 5506 int ret;
5507 int x;
5508
5509 for (x = 0; x < QETH_DBF_INFOS; x++) {
5510 /* register the areas */
5511 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5512 qeth_dbf[x].pages,
5513 qeth_dbf[x].areas,
5514 qeth_dbf[x].len);
5515 if (qeth_dbf[x].id == NULL) {
5516 qeth_unregister_dbf_views();
5517 return -ENOMEM;
5518 }
4a71df50 5519
d11ba0c4
PT		 5520 /* register a view */
5521 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5522 if (ret) {
5523 qeth_unregister_dbf_views();
5524 return ret;
5525 }
4a71df50 5526
d11ba0c4
PT		 5527 /* set a passing level */
5528 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5529 }
4a71df50
FB		 5530
5531 return 0;
5532}
5533
a70fee3b
JW		 5534static DEFINE_MUTEX(qeth_mod_mutex); /* for synchronized module loading */
5535
4a71df50
FB		 5536int qeth_core_load_discipline(struct qeth_card *card,
5537 enum qeth_discipline_id discipline)
5538{
2022e00c 5539 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5540 switch (discipline) {
5541 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5542 card->discipline = try_then_request_module(
5543 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5544 break;
5545 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5546 card->discipline = try_then_request_module(
5547 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5548 break;
c70eb09d
JW		 5549 default:
5550 break;
4a71df50 5551 }
a70fee3b 5552 mutex_unlock(&qeth_mod_mutex);
c70eb09d 5553
c041f2d4 5554 if (!card->discipline) {
74eacdb9
FB		 5555 dev_err(&card->gdev->dev, "There is no kernel module to "
5556 "support discipline %d\n", discipline);
a70fee3b 5557 return -EINVAL;
4a71df50 5558 }
a70fee3b 5559
c1a935f6 5560 card->options.layer = discipline;
a70fee3b 5561 return 0;
4a71df50
FB		 5562}
5563
5564void qeth_core_free_discipline(struct qeth_card *card)
5565{
4fda3354 5566 if (IS_LAYER2(card))
c041f2d4 5567 symbol_put(qeth_l2_discipline);
4a71df50 5568 else
c041f2d4 5569 symbol_put(qeth_l3_discipline);
c1a935f6 5570 card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
c041f2d4 5571 card->discipline = NULL;
4a71df50
FB		 5572}
5573
2d2ebb3e 5574const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5575 .name = "qeth_generic",
5576 .groups = qeth_generic_attr_groups,
5577};
2d2ebb3e
JW		 5578EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5579
b7169c51
SO		 5580static const struct device_type qeth_osn_devtype = {
5581 .name = "qeth_osn",
5582 .groups = qeth_osn_attr_groups,
5583};
5584
819dc537
SR		 5585#define DBF_NAME_LEN 20
5586
5587struct qeth_dbf_entry {
5588 char dbf_name[DBF_NAME_LEN];
5589 debug_info_t *dbf_info;
5590 struct list_head dbf_list;
5591};
5592
5593static LIST_HEAD(qeth_dbf_list);
5594static DEFINE_MUTEX(qeth_dbf_list_mutex);
5595
5596static debug_info_t *qeth_get_dbf_entry(char *name)
5597{
5598 struct qeth_dbf_entry *entry;
5599 debug_info_t *rc = NULL;
5600
5601 mutex_lock(&qeth_dbf_list_mutex);
5602 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5603 if (strcmp(entry->dbf_name, name) == 0) {
5604 rc = entry->dbf_info;
5605 break;
5606 }
5607 }
5608 mutex_unlock(&qeth_dbf_list_mutex);
5609 return rc;
5610}
5611
5612static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5613{
5614 struct qeth_dbf_entry *new_entry;
5615
5616 card->debug = debug_register(name, 2, 1, 8);
5617 if (!card->debug) {
5618 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5619 goto err;
5620 }
5621 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5622 goto err_dbg;
5623 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5624 if (!new_entry)
5625 goto err_dbg;
5626 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5627 new_entry->dbf_info = card->debug;
5628 mutex_lock(&qeth_dbf_list_mutex);
5629 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5630 mutex_unlock(&qeth_dbf_list_mutex);
5631
5632 return 0;
5633
5634err_dbg:
5635 debug_unregister(card->debug);
5636err:
5637 return -ENOMEM;
5638}
5639
5640static void qeth_clear_dbf_list(void)
5641{
5642 struct qeth_dbf_entry *entry, *tmp;
5643
5644 mutex_lock(&qeth_dbf_list_mutex);
5645 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5646 list_del(&entry->dbf_list);
5647 debug_unregister(entry->dbf_info);
5648 kfree(entry);
5649 }
5650 mutex_unlock(&qeth_dbf_list_mutex);
5651}
5652
d3d1b205
JW		 5653static struct net_device *qeth_alloc_netdev(struct qeth_card *card)
5654{
5655 struct net_device *dev;
5656
5657 switch (card->info.type) {
5658 case QETH_CARD_TYPE_IQD:
5659 dev = alloc_netdev(0, "hsi%d", NET_NAME_UNKNOWN, ether_setup);
5660 break;
5661 case QETH_CARD_TYPE_OSN:
5662 dev = alloc_netdev(0, "osn%d", NET_NAME_UNKNOWN, ether_setup);
5663 break;
5664 default:
5665 dev = alloc_etherdev(0);
5666 }
5667
5668 if (!dev)
5669 return NULL;
5670
5671 dev->ml_priv = card;
5672 dev->watchdog_timeo = QETH_TX_TIMEOUT;
72f219da 5673 dev->min_mtu = IS_OSN(card) ? 64 : 576;
8ce7a9e0
JW		 5674 /* initialized when device first goes online: */
5675 dev->max_mtu = 0;
5676 dev->mtu = 0;
d3d1b205
JW		 5677 SET_NETDEV_DEV(dev, &card->gdev->dev);
5678 netif_carrier_off(dev);
5f89eca5
JW		 5679
5680 if (!IS_OSN(card)) {
5681 dev->priv_flags &= ~IFF_TX_SKB_SHARING;
5682 dev->hw_features |= NETIF_F_SG;
5683 dev->vlan_features |= NETIF_F_SG;
04db741d
JW		 5684 if (IS_IQD(card))
5685 dev->features |= NETIF_F_SG;
5f89eca5
JW		 5686 }
5687
d3d1b205
JW		 5688 return dev;
5689}
5690
5691struct net_device *qeth_clone_netdev(struct net_device *orig)
5692{
5693 struct net_device *clone = qeth_alloc_netdev(orig->ml_priv);
5694
5695 if (!clone)
5696 return NULL;
5697
5698 clone->dev_port = orig->dev_port;
5699 return clone;
5700}
5701
4a71df50
FB		 5702static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5703{
5704 struct qeth_card *card;
5705 struct device *dev;
5706 int rc;
c70eb09d 5707 enum qeth_discipline_id enforced_disc;
819dc537 5708 char dbf_name[DBF_NAME_LEN];
4a71df50 5709
d11ba0c4 5710 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5711
5712 dev = &gdev->dev;
5713 if (!get_device(dev))
5714 return -ENODEV;
5715
2a0217d5 5716 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50 5717
121ca39a 5718 card = qeth_alloc_card(gdev);
4a71df50 5719 if (!card) {
d11ba0c4 5720 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5721 rc = -ENOMEM;
5722 goto err_dev;
5723 }
af039068
CO		 5724
5725 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5726 dev_name(&gdev->dev));
819dc537 5727 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5728 if (!card->debug) {
819dc537
SR		 5729 rc = qeth_add_dbf_entry(card, dbf_name);
5730 if (rc)
5731 goto err_card;
af039068 5732 }
af039068 5733
95f4d8b7
JW		 5734 qeth_setup_card(card);
5735 qeth_update_from_chp_desc(card);
4a71df50 5736
d3d1b205 5737 card->dev = qeth_alloc_netdev(card);
778b1ac7
JW		 5738 if (!card->dev) {
5739 rc = -ENOMEM;
d3d1b205 5740 goto err_card;
778b1ac7 5741 }
d3d1b205 5742
c70eb09d
JW		 5743 qeth_determine_capabilities(card);
5744 enforced_disc = qeth_enforce_discipline(card);
5745 switch (enforced_disc) {
5746 case QETH_DISCIPLINE_UNDETERMINED:
5747 gdev->dev.type = &qeth_generic_devtype;
5748 break;
5749 default:
5750 card->info.layer_enforced = true;
5751 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5752 if (rc)
d3d1b205 5753 goto err_load;
2d2ebb3e
JW		 5754
5755 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5756 ? card->discipline->devtype
5757 : &qeth_osn_devtype;
c041f2d4 5758 rc = card->discipline->setup(card->gdev);
4a71df50 5759 if (rc)
5113fec0 5760 goto err_disc;
2d2ebb3e 5761 break;
4a71df50
FB		 5762 }
5763
4a71df50
FB		 5764 return 0;
5765
5113fec0
UB		 5766err_disc:
5767 qeth_core_free_discipline(card);
d3d1b205
JW		 5768err_load:
5769 free_netdev(card->dev);
4a71df50
FB		 5770err_card:
5771 qeth_core_free_card(card);
5772err_dev:
5773 put_device(dev);
5774 return rc;
5775}
5776
5777static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5778{
4a71df50
FB		 5779 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5780
28a7e4c9 5781 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5782
c041f2d4
SO		 5783 if (card->discipline) {
5784 card->discipline->remove(gdev);
9dc48ccc
UB		 5785 qeth_core_free_discipline(card);
5786 }
5787
d3d1b205 5788 free_netdev(card->dev);
4a71df50 5789 qeth_core_free_card(card);
4a71df50 5790 put_device(&gdev->dev);
4a71df50
FB		 5791}
5792
5793static int qeth_core_set_online(struct ccwgroup_device *gdev)
5794{
5795 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5796 int rc = 0;
c70eb09d 5797 enum qeth_discipline_id def_discipline;
4a71df50 5798
c041f2d4 5799 if (!card->discipline) {
4a71df50
FB		 5800 if (card->info.type == QETH_CARD_TYPE_IQD)
5801 def_discipline = QETH_DISCIPLINE_LAYER3;
5802 else
5803 def_discipline = QETH_DISCIPLINE_LAYER2;
5804 rc = qeth_core_load_discipline(card, def_discipline);
5805 if (rc)
5806 goto err;
c041f2d4 5807 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5808 if (rc) {
5809 qeth_core_free_discipline(card);
4a71df50 5810 goto err;
9111e788 5811 }
4a71df50 5812 }
c041f2d4 5813 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5814err:
5815 return rc;
5816}
5817
5818static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5819{
5820 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5821 return card->discipline->set_offline(gdev);
4a71df50
FB		 5822}
5823
5824static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5825{
5826 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5827 qeth_set_allowed_threads(card, 0, 1);
5828 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5829 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5830 qeth_qdio_clear_card(card, 0);
5831 qeth_clear_qdio_buffers(card);
5832 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5833}
5834
bbcfcdc8
FB		 5835static int qeth_core_freeze(struct ccwgroup_device *gdev)
5836{
5837 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5838 if (card->discipline && card->discipline->freeze)
5839 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5840 return 0;
5841}
5842
5843static int qeth_core_thaw(struct ccwgroup_device *gdev)
5844{
5845 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5846 if (card->discipline && card->discipline->thaw)
5847 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5848 return 0;
5849}
5850
5851static int qeth_core_restore(struct ccwgroup_device *gdev)
5852{
5853 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5854 if (card->discipline && card->discipline->restore)
5855 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5856 return 0;
5857}
5858
36369569
GKH		 5859static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5860 size_t count)
4a71df50
FB		 5861{
5862 int err;
4a71df50 5863
6d8769ab
JW		 5864 err = ccwgroup_create_dev(qeth_core_root_dev, to_ccwgroupdrv(ddrv), 3,
5865 buf);
b7169c51
SO		 5866
5867 return err ? err : count;
5868}
36369569 5869static DRIVER_ATTR_WO(group);
4a71df50 5870
f47e2256
SO		 5871static struct attribute *qeth_drv_attrs[] = {
5872 &driver_attr_group.attr,
5873 NULL,
5874};
5875static struct attribute_group qeth_drv_attr_group = {
5876 .attrs = qeth_drv_attrs,
5877};
5878static const struct attribute_group *qeth_drv_attr_groups[] = {
5879 &qeth_drv_attr_group,
5880 NULL,
5881};
5882
6d8769ab
JW		 5883static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5884 .driver = {
5885 .groups = qeth_drv_attr_groups,
5886 .owner = THIS_MODULE,
5887 .name = "qeth",
5888 },
5889 .ccw_driver = &qeth_ccw_driver,
5890 .setup = qeth_core_probe_device,
5891 .remove = qeth_core_remove_device,
5892 .set_online = qeth_core_set_online,
5893 .set_offline = qeth_core_set_offline,
5894 .shutdown = qeth_core_shutdown,
5895 .prepare = NULL,
5896 .complete = NULL,
5897 .freeze = qeth_core_freeze,
5898 .thaw = qeth_core_thaw,
5899 .restore = qeth_core_restore,
5900};
5901
d7d18da1
JW		 5902struct qeth_card *qeth_get_card_by_busid(char *bus_id)
5903{
5904 struct ccwgroup_device *gdev;
5905 struct qeth_card *card;
5906
5907 gdev = get_ccwgroupdev_by_busid(&qeth_core_ccwgroup_driver, bus_id);
5908 if (!gdev)
5909 return NULL;
5910
5911 card = dev_get_drvdata(&gdev->dev);
5912 put_device(&gdev->dev);
5913 return card;
5914}
5915EXPORT_SYMBOL_GPL(qeth_get_card_by_busid);
5916
942d6984
JW		 5917int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5918{
5919 struct qeth_card *card = dev->ml_priv;
5920 struct mii_ioctl_data *mii_data;
5921 int rc = 0;
5922
5923 if (!card)
5924 return -ENODEV;
5925
5926 if (!qeth_card_hw_is_reachable(card))
5927 return -ENODEV;
5928
5929 if (card->info.type == QETH_CARD_TYPE_OSN)
5930 return -EPERM;
5931
5932 switch (cmd) {
5933 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5934 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5935 break;
5936 case SIOC_QETH_GET_CARD_TYPE:
5937 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5938 card->info.type == QETH_CARD_TYPE_OSM ||
5939 card->info.type == QETH_CARD_TYPE_OSX) &&
5940 !card->info.guestlan)
5941 return 1;
5942 else
5943 return 0;
5944 case SIOCGMIIPHY:
5945 mii_data = if_mii(rq);
5946 mii_data->phy_id = 0;
5947 break;
5948 case SIOCGMIIREG:
5949 mii_data = if_mii(rq);
5950 if (mii_data->phy_id != 0)
5951 rc = -EINVAL;
5952 else
5953 mii_data->val_out = qeth_mdio_read(dev,
5954 mii_data->phy_id, mii_data->reg_num);
5955 break;
5956 case SIOC_QETH_QUERY_OAT:
5957 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5958 break;
5959 default:
5960 if (card->discipline->do_ioctl)
5961 rc = card->discipline->do_ioctl(dev, rq, cmd);
5962 else
5963 rc = -EOPNOTSUPP;
5964 }
5965 if (rc)
5966 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5967 return rc;
5968}
5969EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5970
4a71df50
FB		 5971static struct {
5972 const char str[ETH_GSTRING_LEN];
5973} qeth_ethtool_stats_keys[] = {
5974/* 0 */{"rx skbs"},
5975 {"rx buffers"},
5976 {"tx skbs"},
5977 {"tx buffers"},
5978 {"tx skbs no packing"},
5979 {"tx buffers no packing"},
5980 {"tx skbs packing"},
5981 {"tx buffers packing"},
5982 {"tx sg skbs"},
d2a274b2 5983 {"tx buffer elements"},
4a71df50
FB		 5984/* 10 */{"rx sg skbs"},
5985 {"rx sg frags"},
5986 {"rx sg page allocs"},
5987 {"tx large kbytes"},
5988 {"tx large count"},
5989 {"tx pk state ch n->p"},
5990 {"tx pk state ch p->n"},
5991 {"tx pk watermark low"},
5992 {"tx pk watermark high"},
5993 {"queue 0 buffer usage"},
5994/* 20 */{"queue 1 buffer usage"},
5995 {"queue 2 buffer usage"},
5996 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5997 {"rx poll time"},
5998 {"rx poll count"},
4a71df50
FB		 5999 {"rx do_QDIO time"},
6000 {"rx do_QDIO count"},
6001 {"tx handler time"},
6002 {"tx handler count"},
6003 {"tx time"},
6004/* 30 */{"tx count"},
6005 {"tx do_QDIO time"},
6006 {"tx do_QDIO count"},
f61a0d05 6007 {"tx csum"},
c3b4a740 6008 {"tx lin"},
6059c905 6009 {"tx linfail"},
0da9581d 6010 {"cq handler count"},
3aade31b
KM		 6011 {"cq handler time"},
6012 {"rx csum"}
4a71df50
FB		 6013};
6014
df8b4ec8 6015int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 6016{
df8b4ec8
BH		 6017 switch (stringset) {
6018 case ETH_SS_STATS:
6019 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
6020 default:
6021 return -EINVAL;
6022 }
4a71df50 6023}
df8b4ec8 6024EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 6025
6026void qeth_core_get_ethtool_stats(struct net_device *dev,
6027 struct ethtool_stats *stats, u64 *data)
6028{
509e2562 6029 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 6030 data[0] = card->stats.rx_packets -
6031 card->perf_stats.initial_rx_packets;
6032 data[1] = card->perf_stats.bufs_rec;
6033 data[2] = card->stats.tx_packets -
6034 card->perf_stats.initial_tx_packets;
6035 data[3] = card->perf_stats.bufs_sent;
6036 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
6037 - card->perf_stats.skbs_sent_pack;
6038 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
6039 data[6] = card->perf_stats.skbs_sent_pack;
6040 data[7] = card->perf_stats.bufs_sent_pack;
6041 data[8] = card->perf_stats.sg_skbs_sent;
d2a274b2 6042 data[9] = card->perf_stats.buf_elements_sent;
4a71df50
FB		 6043 data[10] = card->perf_stats.sg_skbs_rx;
6044 data[11] = card->perf_stats.sg_frags_rx;
6045 data[12] = card->perf_stats.sg_alloc_page_rx;
6046 data[13] = (card->perf_stats.large_send_bytes >> 10);
6047 data[14] = card->perf_stats.large_send_cnt;
6048 data[15] = card->perf_stats.sc_dp_p;
6049 data[16] = card->perf_stats.sc_p_dp;
6050 data[17] = QETH_LOW_WATERMARK_PACK;
6051 data[18] = QETH_HIGH_WATERMARK_PACK;
6052 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
6053 data[20] = (card->qdio.no_out_queues > 1) ?
6054 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
6055 data[21] = (card->qdio.no_out_queues > 2) ?
6056 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
6057 data[22] = (card->qdio.no_out_queues > 3) ?
6058 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
6059 data[23] = card->perf_stats.inbound_time;
6060 data[24] = card->perf_stats.inbound_cnt;
6061 data[25] = card->perf_stats.inbound_do_qdio_time;
6062 data[26] = card->perf_stats.inbound_do_qdio_cnt;
6063 data[27] = card->perf_stats.outbound_handler_time;
6064 data[28] = card->perf_stats.outbound_handler_cnt;
6065 data[29] = card->perf_stats.outbound_time;
6066 data[30] = card->perf_stats.outbound_cnt;
6067 data[31] = card->perf_stats.outbound_do_qdio_time;
6068 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 6069 data[33] = card->perf_stats.tx_csum;
c3b4a740 6070 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 6071 data[35] = card->perf_stats.tx_linfail;
6072 data[36] = card->perf_stats.cq_cnt;
6073 data[37] = card->perf_stats.cq_time;
3aade31b 6074 data[38] = card->perf_stats.rx_csum;
4a71df50
FB		 6075}
6076EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
6077
6078void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
6079{
6080 switch (stringset) {
6081 case ETH_SS_STATS:
6082 memcpy(data, &qeth_ethtool_stats_keys,
6083 sizeof(qeth_ethtool_stats_keys));
6084 break;
6085 default:
6086 WARN_ON(1);
6087 break;
6088 }
6089}
6090EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6091
6092void qeth_core_get_drvinfo(struct net_device *dev,
6093 struct ethtool_drvinfo *info)
6094{
509e2562 6095 struct qeth_card *card = dev->ml_priv;
7826d43f 6096
4fda3354 6097 strlcpy(info->driver, IS_LAYER2(card) ? "qeth_l2" : "qeth_l3",
7826d43f
JP		 6098 sizeof(info->driver));
6099 strlcpy(info->version, "1.0", sizeof(info->version));
6100 strlcpy(info->fw_version, card->info.mcl_level,
6101 sizeof(info->fw_version));
6102 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6103 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6104}
6105EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6106
774afb8e
JW		 6107/* Helper function to fill 'advertising' and 'supported' which are the same. */
6108/* Autoneg and full-duplex are supported and advertised unconditionally. */
6109/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6110/* specified port type. */
993e19c0 6111static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6112 int maxspeed, int porttype)
6113{
41fc3b65
JW		 6114 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6115 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6116 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6117
41fc3b65
JW		 6118 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6119 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6120
6121 switch (porttype) {
6122 case PORT_TP:
41fc3b65
JW		 6123 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6124 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6125 break;
6126 case PORT_FIBRE:
41fc3b65
JW		 6127 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6128 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6129 break;
6130 default:
41fc3b65
JW		 6131 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6132 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6133 WARN_ON_ONCE(1);
6134 }
6135
54e049c2 6136 /* partially does fall through, to also select lower speeds */
02d5cb5b 6137 switch (maxspeed) {
54e049c2
JW		 6138 case SPEED_25000:
6139 ethtool_link_ksettings_add_link_mode(cmd, supported,
6140 25000baseSR_Full);
6141 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6142 25000baseSR_Full);
6143 break;
02d5cb5b 6144 case SPEED_10000:
41fc3b65
JW		 6145 ethtool_link_ksettings_add_link_mode(cmd, supported,
6146 10000baseT_Full);
6147 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6148 10000baseT_Full);
02d5cb5b 6149 case SPEED_1000:
41fc3b65
JW		 6150 ethtool_link_ksettings_add_link_mode(cmd, supported,
6151 1000baseT_Full);
6152 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6153 1000baseT_Full);
6154 ethtool_link_ksettings_add_link_mode(cmd, supported,
6155 1000baseT_Half);
6156 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6157 1000baseT_Half);
02d5cb5b 6158 case SPEED_100:
41fc3b65
JW		 6159 ethtool_link_ksettings_add_link_mode(cmd, supported,
6160 100baseT_Full);
6161 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6162 100baseT_Full);
6163 ethtool_link_ksettings_add_link_mode(cmd, supported,
6164 100baseT_Half);
6165 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6166 100baseT_Half);
02d5cb5b 6167 case SPEED_10:
41fc3b65
JW		 6168 ethtool_link_ksettings_add_link_mode(cmd, supported,
6169 10baseT_Full);
6170 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6171 10baseT_Full);
6172 ethtool_link_ksettings_add_link_mode(cmd, supported,
6173 10baseT_Half);
6174 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6175 10baseT_Half);
774afb8e
JW		 6176 /* end fallthrough */
6177 break;
02d5cb5b 6178 default:
41fc3b65
JW		 6179 ethtool_link_ksettings_add_link_mode(cmd, supported,
6180 10baseT_Full);
6181 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6182 10baseT_Full);
6183 ethtool_link_ksettings_add_link_mode(cmd, supported,
6184 10baseT_Half);
6185 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6186 10baseT_Half);
02d5cb5b
EC		 6187 WARN_ON_ONCE(1);
6188 }
02d5cb5b
EC		 6189}
6190
993e19c0
JW		 6191int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6192 struct ethtool_link_ksettings *cmd)
3f9975aa 6193{
509e2562 6194 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6195 enum qeth_link_types link_type;
02d5cb5b 6196 struct carrier_info carrier_info;
511c2445 6197 int rc;
3f9975aa
FB		 6198
6199 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6200 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6201 else
6202 link_type = card->info.link_type;
6203
993e19c0
JW		 6204 cmd->base.duplex = DUPLEX_FULL;
6205 cmd->base.autoneg = AUTONEG_ENABLE;
6206 cmd->base.phy_address = 0;
6207 cmd->base.mdio_support = 0;
6208 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6209 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6210
6211 switch (link_type) {
6212 case QETH_LINK_TYPE_FAST_ETH:
6213 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6214 cmd->base.speed = SPEED_100;
6215 cmd->base.port = PORT_TP;
3f9975aa 6216 break;
3f9975aa
FB		 6217 case QETH_LINK_TYPE_GBIT_ETH:
6218 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6219 cmd->base.speed = SPEED_1000;
6220 cmd->base.port = PORT_FIBRE;
3f9975aa 6221 break;
3f9975aa 6222 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6223 cmd->base.speed = SPEED_10000;
6224 cmd->base.port = PORT_FIBRE;
3f9975aa 6225 break;
54e049c2
JW		 6226 case QETH_LINK_TYPE_25GBIT_ETH:
6227 cmd->base.speed = SPEED_25000;
6228 cmd->base.port = PORT_FIBRE;
6229 break;
3f9975aa 6230 default:
993e19c0
JW		 6231 cmd->base.speed = SPEED_10;
6232 cmd->base.port = PORT_TP;
3f9975aa 6233 }
993e19c0 6234 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6235
02d5cb5b
EC		 6236 /* Check if we can obtain more accurate information. */
6237 /* If QUERY_CARD_INFO command is not supported or fails, */
6238 /* just return the heuristics that was filled above. */
511c2445
EC		 6239 if (!qeth_card_hw_is_reachable(card))
6240 return -ENODEV;
6241 rc = qeth_query_card_info(card, &carrier_info);
6242 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6243 return 0;
511c2445
EC		 6244 if (rc) /* report error from the hardware operation */
6245 return rc;
6246 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6247
6248 netdev_dbg(netdev,
6249 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6250 carrier_info.card_type,
6251 carrier_info.port_mode,
6252 carrier_info.port_speed);
6253
6254 /* Update attributes for which we've obtained more authoritative */
6255 /* information, leave the rest the way they where filled above. */
6256 switch (carrier_info.card_type) {
6257 case CARD_INFO_TYPE_1G_COPPER_A:
6258 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6259 cmd->base.port = PORT_TP;
6260 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6261 break;
6262 case CARD_INFO_TYPE_1G_FIBRE_A:
6263 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6264 cmd->base.port = PORT_FIBRE;
6265 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6266 break;
6267 case CARD_INFO_TYPE_10G_FIBRE_A:
6268 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6269 cmd->base.port = PORT_FIBRE;
6270 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6271 break;
6272 }
6273
6274 switch (carrier_info.port_mode) {
6275 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6276 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6277 break;
6278 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6279 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6280 break;
6281 }
6282
6283 switch (carrier_info.port_speed) {
6284 case CARD_INFO_PORTS_10M:
993e19c0 6285 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6286 break;
6287 case CARD_INFO_PORTS_100M:
993e19c0 6288 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6289 break;
6290 case CARD_INFO_PORTS_1G:
993e19c0 6291 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6292 break;
6293 case CARD_INFO_PORTS_10G:
993e19c0 6294 cmd->base.speed = SPEED_10000;
02d5cb5b 6295 break;
54e049c2
JW		 6296 case CARD_INFO_PORTS_25G:
6297 cmd->base.speed = SPEED_25000;
6298 break;
02d5cb5b
EC		 6299 }
6300
3f9975aa
FB		 6301 return 0;
6302}
993e19c0 6303EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6304
c9475369
TR		 6305/* Callback to handle checksum offload command reply from OSA card.
6306 * Verify that required features have been enabled on the card.
6307 * Return error in hdr->return_code as this value is checked by caller.
6308 *
6309 * Always returns zero to indicate no further messages from the OSA card.
6310 */
6311static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6312 struct qeth_reply *reply,
6313 unsigned long data)
6314{
6315 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6316 struct qeth_checksum_cmd *chksum_cb =
6317 (struct qeth_checksum_cmd *)reply->param;
6318
6319 QETH_CARD_TEXT(card, 4, "chkdoccb");
ad3cbf61 6320 if (qeth_setassparms_inspect_rc(cmd))
c9475369
TR		 6321 return 0;
6322
6323 memset(chksum_cb, 0, sizeof(*chksum_cb));
6324 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6325 chksum_cb->supported =
6326 cmd->data.setassparms.data.chksum.supported;
6327 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6328 }
6329 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6330 chksum_cb->supported =
6331 cmd->data.setassparms.data.chksum.supported;
6332 chksum_cb->enabled =
6333 cmd->data.setassparms.data.chksum.enabled;
6334 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6335 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6336 }
6337 return 0;
6338}
6339
6340/* Send command to OSA card and check results. */
6341static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6342 enum qeth_ipa_funcs ipa_func,
6343 __u16 cmd_code, long data,
a8155b00
KM		 6344 struct qeth_checksum_cmd *chksum_cb,
6345 enum qeth_prot_versions prot)
c9475369
TR		 6346{
6347 struct qeth_cmd_buffer *iob;
c9475369
TR		 6348
6349 QETH_CARD_TEXT(card, 4, "chkdocmd");
6350 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
a8155b00 6351 sizeof(__u32), prot);
4fa55fa9
JW		 6352 if (!iob)
6353 return -ENOMEM;
6354
6355 __ipa_cmd(iob)->data.setassparms.data.flags_32bit = (__u32) data;
6356 return qeth_send_ipa_cmd(card, iob, qeth_ipa_checksum_run_cmd_cb,
6357 chksum_cb);
c9475369
TR		 6358}
6359
a8155b00
KM		 6360static int qeth_send_checksum_on(struct qeth_card *card, int cstype,
6361 enum qeth_prot_versions prot)
4d7def2a 6362{
571f9dd8 6363 u32 required_features = QETH_IPA_CHECKSUM_UDP | QETH_IPA_CHECKSUM_TCP;
c9475369 6364 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6365 int rc;
6366
571f9dd8
KM		 6367 if (prot == QETH_PROT_IPV4)
6368 required_features |= QETH_IPA_CHECKSUM_IP_HDR;
c9475369 6369 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
a8155b00 6370 &chksum_cb, prot);
f9d8e6dc
TR		 6371 if (!rc) {
6372 if ((required_features & chksum_cb.supported) !=
6373 required_features)
6374 rc = -EIO;
dae84c8e
TR		 6375 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6376 cstype == IPA_INBOUND_CHECKSUM)
6377 dev_warn(&card->gdev->dev,
6378 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6379 QETH_CARD_IFNAME(card));
f9d8e6dc 6380 }
4d7def2a 6381 if (rc) {
a8155b00
KM		 6382 qeth_send_simple_setassparms_prot(card, cstype,
6383 IPA_CMD_ASS_STOP, 0, prot);
8f43fb00 6384 dev_warn(&card->gdev->dev,
a8155b00
KM		 6385 "Starting HW IPv%d checksumming for %s failed, using SW checksumming\n",
6386 prot, QETH_CARD_IFNAME(card));
4d7def2a
TR		 6387 return rc;
6388 }
c9475369 6389 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
a8155b00
KM		 6390 chksum_cb.supported, &chksum_cb,
6391 prot);
f9d8e6dc
TR		 6392 if (!rc) {
6393 if ((required_features & chksum_cb.enabled) !=
6394 required_features)
6395 rc = -EIO;
6396 }
4d7def2a 6397 if (rc) {
a8155b00
KM		 6398 qeth_send_simple_setassparms_prot(card, cstype,
6399 IPA_CMD_ASS_STOP, 0, prot);
8f43fb00 6400 dev_warn(&card->gdev->dev,
a8155b00
KM		 6401 "Enabling HW IPv%d checksumming for %s failed, using SW checksumming\n",
6402 prot, QETH_CARD_IFNAME(card));
4d7def2a
TR		 6403 return rc;
6404 }
8f43fb00 6405
a8155b00
KM		 6406 dev_info(&card->gdev->dev, "HW Checksumming (%sbound IPv%d) enabled\n",
6407 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out", prot);
4d7def2a
TR		 6408 return 0;
6409}
6410
a8155b00
KM		 6411static int qeth_set_ipa_csum(struct qeth_card *card, bool on, int cstype,
6412 enum qeth_prot_versions prot)
4d7def2a 6413{
a8155b00
KM		 6414 int rc = (on) ? qeth_send_checksum_on(card, cstype, prot)
6415 : qeth_send_simple_setassparms_prot(card, cstype,
6416 IPA_CMD_ASS_STOP, 0,
6417 prot);
c9475369 6418 return rc ? -EIO : 0;
4d7def2a 6419}
4d7def2a 6420
4666d7fb
JW		 6421static int qeth_start_tso_cb(struct qeth_card *card, struct qeth_reply *reply,
6422 unsigned long data)
6423{
6424 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6425 struct qeth_tso_start_data *tso_data = reply->param;
6426
6427 if (qeth_setassparms_inspect_rc(cmd))
6428 return 0;
6429
6430 tso_data->mss = cmd->data.setassparms.data.tso.mss;
6431 tso_data->supported = cmd->data.setassparms.data.tso.supported;
6432 return 0;
6433}
6434
1f83b817
JW		 6435static int qeth_set_tso_off(struct qeth_card *card,
6436 enum qeth_prot_versions prot)
4d7def2a 6437{
1f83b817
JW		 6438 return qeth_send_simple_setassparms_prot(card, IPA_OUTBOUND_TSO,
6439 IPA_CMD_ASS_STOP, 0, prot);
6440}
4d7def2a 6441
1f83b817
JW		 6442static int qeth_set_tso_on(struct qeth_card *card,
6443 enum qeth_prot_versions prot)
6444{
4666d7fb
JW		 6445 struct qeth_tso_start_data tso_data;
6446 struct qeth_cmd_buffer *iob;
6447 struct qeth_ipa_caps caps;
6448 int rc;
6449
6450 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
6451 IPA_CMD_ASS_START, 0, prot);
6452 if (!iob)
6453 return -ENOMEM;
6454
4fa55fa9 6455 rc = qeth_send_ipa_cmd(card, iob, qeth_start_tso_cb, &tso_data);
4666d7fb
JW		 6456 if (rc)
6457 return rc;
6458
6459 if (!tso_data.mss || !(tso_data.supported & QETH_IPA_LARGE_SEND_TCP)) {
6460 qeth_set_tso_off(card, prot);
6461 return -EOPNOTSUPP;
6462 }
6463
6464 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
6465 IPA_CMD_ASS_ENABLE, sizeof(caps), prot);
6466 if (!iob) {
6467 qeth_set_tso_off(card, prot);
6468 return -ENOMEM;
6469 }
6470
6471 /* enable TSO capability */
4fa55fa9
JW		 6472 __ipa_cmd(iob)->data.setassparms.data.caps.enabled =
6473 QETH_IPA_LARGE_SEND_TCP;
6474 rc = qeth_send_ipa_cmd(card, iob, qeth_setassparms_get_caps_cb, &caps);
4666d7fb
JW		 6475 if (rc) {
6476 qeth_set_tso_off(card, prot);
6477 return rc;
6478 }
6479
6480 if (!qeth_ipa_caps_supported(&caps, QETH_IPA_LARGE_SEND_TCP) ||
6481 !qeth_ipa_caps_enabled(&caps, QETH_IPA_LARGE_SEND_TCP)) {
6482 qeth_set_tso_off(card, prot);
6483 return -EOPNOTSUPP;
6484 }
6485
6486 dev_info(&card->gdev->dev, "TSOv%u enabled (MSS: %u)\n", prot,
6487 tso_data.mss);
6488 return 0;
1f83b817 6489}
4d7def2a 6490
1f83b817
JW		 6491static int qeth_set_ipa_tso(struct qeth_card *card, bool on,
6492 enum qeth_prot_versions prot)
6493{
6494 int rc = on ? qeth_set_tso_on(card, prot) :
6495 qeth_set_tso_off(card, prot);
6496
6497 return rc ? -EIO : 0;
4d7def2a 6498}
8f43fb00 6499
d7e6ed97
KM		 6500static int qeth_set_ipa_rx_csum(struct qeth_card *card, bool on)
6501{
6502 int rc_ipv4 = (on) ? -EOPNOTSUPP : 0;
6503 int rc_ipv6;
6504
6505 if (qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6506 rc_ipv4 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6507 QETH_PROT_IPV4);
6508 if (!qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
6509 /* no/one Offload Assist available, so the rc is trivial */
6510 return rc_ipv4;
ce344356 6511
d7e6ed97
KM		 6512 rc_ipv6 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6513 QETH_PROT_IPV6);
6514
6515 if (on)
6516 /* enable: success if any Assist is active */
6517 return (rc_ipv6) ? rc_ipv4 : 0;
6518
6519 /* disable: failure if any Assist is still active */
6520 return (rc_ipv6) ? rc_ipv6 : rc_ipv4;
6521}
6522
571f9dd8 6523#define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO | \
82bf5c08 6524 NETIF_F_IPV6_CSUM | NETIF_F_TSO6)
ce344356 6525/**
d025da9e
JW		 6526 * qeth_enable_hw_features() - (Re-)Enable HW functions for device features
6527 * @dev: a net_device
ce344356 6528 */
d025da9e 6529void qeth_enable_hw_features(struct net_device *dev)
e830baa9
HW		 6530{
6531 struct qeth_card *card = dev->ml_priv;
d025da9e 6532 netdev_features_t features;
e830baa9 6533
d025da9e 6534 features = dev->features;
ce344356
JW		 6535 /* force-off any feature that needs an IPA sequence.
6536 * netdev_update_features() will restart them.
6537 */
6538 dev->features &= ~QETH_HW_FEATURES;
6539 netdev_update_features(dev);
d025da9e
JW		 6540 if (features != dev->features)
6541 dev_warn(&card->gdev->dev,
6542 "Device recovery failed to restore all offload features\n");
e830baa9 6543}
d025da9e 6544EXPORT_SYMBOL_GPL(qeth_enable_hw_features);
e830baa9 6545
8f43fb00
TR		 6546int qeth_set_features(struct net_device *dev, netdev_features_t features)
6547{
6548 struct qeth_card *card = dev->ml_priv;
6c7cd712 6549 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6550 int rc = 0;
6551
6552 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6553 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6554
6c7cd712 6555 if ((changed & NETIF_F_IP_CSUM)) {
a8155b00
KM		 6556 rc = qeth_set_ipa_csum(card, features & NETIF_F_IP_CSUM,
6557 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV4);
6c7cd712
HW		 6558 if (rc)
6559 changed ^= NETIF_F_IP_CSUM;
6560 }
571f9dd8
KM		 6561 if (changed & NETIF_F_IPV6_CSUM) {
6562 rc = qeth_set_ipa_csum(card, features & NETIF_F_IPV6_CSUM,
6563 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV6);
6564 if (rc)
6565 changed ^= NETIF_F_IPV6_CSUM;
6566 }
d7e6ed97
KM		 6567 if (changed & NETIF_F_RXCSUM) {
6568 rc = qeth_set_ipa_rx_csum(card, features & NETIF_F_RXCSUM);
6c7cd712
HW		 6569 if (rc)
6570 changed ^= NETIF_F_RXCSUM;
6571 }
1f83b817
JW		 6572 if (changed & NETIF_F_TSO) {
6573 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO,
6574 QETH_PROT_IPV4);
6c7cd712
HW		 6575 if (rc)
6576 changed ^= NETIF_F_TSO;
6577 }
82bf5c08
JW		 6578 if (changed & NETIF_F_TSO6) {
6579 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO6,
6580 QETH_PROT_IPV6);
6581 if (rc)
6582 changed ^= NETIF_F_TSO6;
6583 }
6c7cd712
HW		 6584
6585 /* everything changed successfully? */
6586 if ((dev->features ^ features) == changed)
6587 return 0;
6588 /* something went wrong. save changed features and return error */
6589 dev->features ^= changed;
6590 return -EIO;
8f43fb00
TR		 6591}
6592EXPORT_SYMBOL_GPL(qeth_set_features);
6593
6594netdev_features_t qeth_fix_features(struct net_device *dev,
6595 netdev_features_t features)
6596{
6597 struct qeth_card *card = dev->ml_priv;
6598
6599 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6600 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6601 features &= ~NETIF_F_IP_CSUM;
571f9dd8
KM		 6602 if (!qeth_is_supported6(card, IPA_OUTBOUND_CHECKSUM_V6))
6603 features &= ~NETIF_F_IPV6_CSUM;
d7e6ed97
KM		 6604 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM) &&
6605 !qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
8f43fb00 6606 features &= ~NETIF_F_RXCSUM;
cf536ffe 6607 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6608 features &= ~NETIF_F_TSO;
82bf5c08
JW		 6609 if (!qeth_is_supported6(card, IPA_OUTBOUND_TSO))
6610 features &= ~NETIF_F_TSO6;
6c7cd712
HW		 6611 /* if the card isn't up, remove features that require hw changes */
6612 if (card->state == CARD_STATE_DOWN ||
6613 card->state == CARD_STATE_RECOVER)
ce344356 6614 features &= ~QETH_HW_FEATURES;
8f43fb00
TR		 6615 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6616 return features;
6617}
6618EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6619
6d69b1f1
JW		 6620netdev_features_t qeth_features_check(struct sk_buff *skb,
6621 struct net_device *dev,
6622 netdev_features_t features)
6623{
6624 /* GSO segmentation builds skbs with
6625 * a (small) linear part for the headers, and
6626 * page frags for the data.
6627 * Compared to a linear skb, the header-only part consumes an
6628 * additional buffer element. This reduces buffer utilization, and
6629 * hurts throughput. So compress small segments into one element.
6630 */
6631 if (netif_needs_gso(skb, features)) {
6632 /* match skb_segment(): */
6633 unsigned int doffset = skb->data - skb_mac_header(skb);
6634 unsigned int hsize = skb_shinfo(skb)->gso_size;
6635 unsigned int hroom = skb_headroom(skb);
6636
6637 /* linearize only if resulting skb allocations are order-0: */
6638 if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
6639 features &= ~NETIF_F_SG;
6640 }
6641
6642 return vlan_features_check(skb, features);
6643}
6644EXPORT_SYMBOL_GPL(qeth_features_check);
6645
e22355ea
JW		 6646int qeth_open_internal(struct net_device *dev)
6647{
6648 struct qeth_card *card = dev->ml_priv;
6649
6650 QETH_CARD_TEXT(card, 4, "qethopen");
6651 if (card->state == CARD_STATE_UP)
6652 return 0;
6653 if (card->state != CARD_STATE_SOFTSETUP)
6654 return -ENODEV;
6655
6656 if (qdio_stop_irq(CARD_DDEV(card), 0) < 0)
6657 return -EIO;
6658
6659 card->data.state = CH_STATE_UP;
6660 card->state = CARD_STATE_UP;
6661 netif_start_queue(dev);
6662
6663 napi_enable(&card->napi);
6664 local_bh_disable();
6665 napi_schedule(&card->napi);
6666 /* kick-start the NAPI softirq: */
6667 local_bh_enable();
6668 return 0;
6669}
6670EXPORT_SYMBOL_GPL(qeth_open_internal);
6671
6672int qeth_open(struct net_device *dev)
6673{
6674 struct qeth_card *card = dev->ml_priv;
6675
6676 QETH_CARD_TEXT(card, 5, "qethope_");
6677 if (qeth_wait_for_threads(card, QETH_RECOVER_THREAD)) {
6678 QETH_CARD_TEXT(card, 3, "openREC");
6679 return -ERESTARTSYS;
6680 }
6681 return qeth_open_internal(dev);
6682}
6683EXPORT_SYMBOL_GPL(qeth_open);
6684
6685int qeth_stop(struct net_device *dev)
6686{
6687 struct qeth_card *card = dev->ml_priv;
6688
6689 QETH_CARD_TEXT(card, 4, "qethstop");
6690 netif_tx_disable(dev);
6691 if (card->state == CARD_STATE_UP) {
6692 card->state = CARD_STATE_SOFTSETUP;
6693 napi_disable(&card->napi);
6694 }
6695 return 0;
6696}
6697EXPORT_SYMBOL_GPL(qeth_stop);
6698
4a71df50
FB		 6699static int __init qeth_core_init(void)
6700{
6701 int rc;
6702
74eacdb9 6703 pr_info("loading core functions\n");
4a71df50 6704
0f54761d 6705 qeth_wq = create_singlethread_workqueue("qeth_wq");
a936b1ef
JW		 6706 if (!qeth_wq) {
6707 rc = -ENOMEM;
6708 goto out_err;
6709 }
0f54761d 6710
4a71df50
FB		 6711 rc = qeth_register_dbf_views();
6712 if (rc)
a936b1ef 6713 goto dbf_err;
035da16f 6714 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6715 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6716 if (rc)
6717 goto register_err;
55494264
JW		 6718 qeth_core_header_cache =
6719 kmem_cache_create("qeth_hdr", QETH_HDR_CACHE_OBJ_SIZE,
6720 roundup_pow_of_two(QETH_HDR_CACHE_OBJ_SIZE),
6721 0, NULL);
683d718a
FB		 6722 if (!qeth_core_header_cache) {
6723 rc = -ENOMEM;
6724 goto slab_err;
6725 }
0da9581d
EL		 6726 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6727 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6728 if (!qeth_qdio_outbuf_cache) {
6729 rc = -ENOMEM;
6730 goto cqslab_err;
6731 }
afb6ac59
SO		 6732 rc = ccw_driver_register(&qeth_ccw_driver);
6733 if (rc)
6734 goto ccw_err;
afb6ac59
SO		 6735 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6736 if (rc)
6737 goto ccwgroup_err;
0da9581d 6738
683d718a 6739 return 0;
afb6ac59
SO		 6740
6741ccwgroup_err:
6742 ccw_driver_unregister(&qeth_ccw_driver);
6743ccw_err:
6744 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6745cqslab_err:
6746 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6747slab_err:
035da16f 6748 root_device_unregister(qeth_core_root_dev);
4a71df50 6749register_err:
4a71df50 6750 qeth_unregister_dbf_views();
a936b1ef
JW		 6751dbf_err:
6752 destroy_workqueue(qeth_wq);
4a71df50 6753out_err:
74eacdb9 6754 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6755 return rc;
6756}
6757
6758static void __exit qeth_core_exit(void)
6759{
819dc537 6760 qeth_clear_dbf_list();
0f54761d 6761 destroy_workqueue(qeth_wq);
4a71df50
FB		 6762 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6763 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6764 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6765 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6766 root_device_unregister(qeth_core_root_dev);
4a71df50 6767 qeth_unregister_dbf_views();
74eacdb9 6768 pr_info("core functions removed\n");
4a71df50
FB		 6769}
6770
6771module_init(qeth_core_init);
6772module_exit(qeth_core_exit);
6773MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6774MODULE_DESCRIPTION("qeth core functions");
6775MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)