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net: calxedaxgmac: fix driver dependencies
[linux-block.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
290b8348 23#include <net/dsfield.h>
4a71df50 24
ab4227cb 25#include <asm/ebcdic.h>
2bf29df7 26#include <asm/chpid.h>
ab4227cb 27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
c3ab96f3 29#include <asm/compat.h>
4a71df50
FB		 30
31#include "qeth_core.h"
4a71df50 32
d11ba0c4
PT		 33struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
35 /* N P A M L V H */
36 [QETH_DBF_SETUP] = {"qeth_setup",
37 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 38 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
39 &debug_sprintf_view, NULL},
d11ba0c4
PT		 40 [QETH_DBF_CTRL] = {"qeth_control",
41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
42};
43EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 44
45struct qeth_card_list_struct qeth_core_card_list;
46EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 47struct kmem_cache *qeth_core_header_cache;
48EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 49static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 50
51static struct device *qeth_core_root_dev;
5113fec0 52static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 53static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 54static struct mutex qeth_mod_mutex;
4a71df50
FB		 55
56static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
58static int qeth_issue_next_read(struct qeth_card *);
59static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
60static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
61static void qeth_free_buffer_pool(struct qeth_card *);
62static int qeth_qdio_establish(struct qeth_card *);
0da9581d 63static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 64static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
65 struct qeth_qdio_out_buffer *buf,
66 enum iucv_tx_notify notification);
67static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 68static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
69 struct qeth_qdio_out_buffer *buf,
70 enum qeth_qdio_buffer_states newbufstate);
72861ae7 71static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 72
b4d72c08 73struct workqueue_struct *qeth_wq;
c044dc21 74EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d
SR		 75
76static void qeth_close_dev_handler(struct work_struct *work)
77{
78 struct qeth_card *card;
79
80 card = container_of(work, struct qeth_card, close_dev_work);
81 QETH_CARD_TEXT(card, 2, "cldevhdl");
82 rtnl_lock();
83 dev_close(card->dev);
84 rtnl_unlock();
85 ccwgroup_set_offline(card->gdev);
86}
87
88void qeth_close_dev(struct qeth_card *card)
89{
90 QETH_CARD_TEXT(card, 2, "cldevsubm");
91 queue_work(qeth_wq, &card->close_dev_work);
92}
93EXPORT_SYMBOL_GPL(qeth_close_dev);
94
4a71df50
FB		 95static inline const char *qeth_get_cardname(struct qeth_card *card)
96{
97 if (card->info.guestlan) {
98 switch (card->info.type) {
5113fec0 99 case QETH_CARD_TYPE_OSD:
7096b187 100 return " Virtual NIC QDIO";
4a71df50 101 case QETH_CARD_TYPE_IQD:
7096b187 102 return " Virtual NIC Hiper";
5113fec0 103 case QETH_CARD_TYPE_OSM:
7096b187 104 return " Virtual NIC QDIO - OSM";
5113fec0 105 case QETH_CARD_TYPE_OSX:
7096b187 106 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 107 default:
108 return " unknown";
109 }
110 } else {
111 switch (card->info.type) {
5113fec0 112 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 113 return " OSD Express";
114 case QETH_CARD_TYPE_IQD:
115 return " HiperSockets";
116 case QETH_CARD_TYPE_OSN:
117 return " OSN QDIO";
5113fec0
UB		 118 case QETH_CARD_TYPE_OSM:
119 return " OSM QDIO";
120 case QETH_CARD_TYPE_OSX:
121 return " OSX QDIO";
4a71df50
FB		 122 default:
123 return " unknown";
124 }
125 }
126 return " n/a";
127}
128
129/* max length to be returned: 14 */
130const char *qeth_get_cardname_short(struct qeth_card *card)
131{
132 if (card->info.guestlan) {
133 switch (card->info.type) {
5113fec0 134 case QETH_CARD_TYPE_OSD:
7096b187 135 return "Virt.NIC QDIO";
4a71df50 136 case QETH_CARD_TYPE_IQD:
7096b187 137 return "Virt.NIC Hiper";
5113fec0 138 case QETH_CARD_TYPE_OSM:
7096b187 139 return "Virt.NIC OSM";
5113fec0 140 case QETH_CARD_TYPE_OSX:
7096b187 141 return "Virt.NIC OSX";
4a71df50
FB		 142 default:
143 return "unknown";
144 }
145 } else {
146 switch (card->info.type) {
5113fec0 147 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 148 switch (card->info.link_type) {
149 case QETH_LINK_TYPE_FAST_ETH:
150 return "OSD_100";
151 case QETH_LINK_TYPE_HSTR:
152 return "HSTR";
153 case QETH_LINK_TYPE_GBIT_ETH:
154 return "OSD_1000";
155 case QETH_LINK_TYPE_10GBIT_ETH:
156 return "OSD_10GIG";
157 case QETH_LINK_TYPE_LANE_ETH100:
158 return "OSD_FE_LANE";
159 case QETH_LINK_TYPE_LANE_TR:
160 return "OSD_TR_LANE";
161 case QETH_LINK_TYPE_LANE_ETH1000:
162 return "OSD_GbE_LANE";
163 case QETH_LINK_TYPE_LANE:
164 return "OSD_ATM_LANE";
165 default:
166 return "OSD_Express";
167 }
168 case QETH_CARD_TYPE_IQD:
169 return "HiperSockets";
170 case QETH_CARD_TYPE_OSN:
171 return "OSN";
5113fec0
UB		 172 case QETH_CARD_TYPE_OSM:
173 return "OSM_1000";
174 case QETH_CARD_TYPE_OSX:
175 return "OSX_10GIG";
4a71df50
FB		 176 default:
177 return "unknown";
178 }
179 }
180 return "n/a";
181}
182
65d8013c
SR		 183void qeth_set_recovery_task(struct qeth_card *card)
184{
185 card->recovery_task = current;
186}
187EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
188
189void qeth_clear_recovery_task(struct qeth_card *card)
190{
191 card->recovery_task = NULL;
192}
193EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
194
195static bool qeth_is_recovery_task(const struct qeth_card *card)
196{
197 return card->recovery_task == current;
198}
199
4a71df50
FB		 200void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
201 int clear_start_mask)
202{
203 unsigned long flags;
204
205 spin_lock_irqsave(&card->thread_mask_lock, flags);
206 card->thread_allowed_mask = threads;
207 if (clear_start_mask)
208 card->thread_start_mask &= threads;
209 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
210 wake_up(&card->wait_q);
211}
212EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
213
214int qeth_threads_running(struct qeth_card *card, unsigned long threads)
215{
216 unsigned long flags;
217 int rc = 0;
218
219 spin_lock_irqsave(&card->thread_mask_lock, flags);
220 rc = (card->thread_running_mask & threads);
221 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
222 return rc;
223}
224EXPORT_SYMBOL_GPL(qeth_threads_running);
225
226int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
227{
65d8013c
SR		 228 if (qeth_is_recovery_task(card))
229 return 0;
4a71df50
FB		 230 return wait_event_interruptible(card->wait_q,
231 qeth_threads_running(card, threads) == 0);
232}
233EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
234
235void qeth_clear_working_pool_list(struct qeth_card *card)
236{
237 struct qeth_buffer_pool_entry *pool_entry, *tmp;
238
847a50fd 239 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 240 list_for_each_entry_safe(pool_entry, tmp,
241 &card->qdio.in_buf_pool.entry_list, list){
242 list_del(&pool_entry->list);
243 }
244}
245EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
246
247static int qeth_alloc_buffer_pool(struct qeth_card *card)
248{
249 struct qeth_buffer_pool_entry *pool_entry;
250 void *ptr;
251 int i, j;
252
847a50fd 253 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 254 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 255 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 256 if (!pool_entry) {
257 qeth_free_buffer_pool(card);
258 return -ENOMEM;
259 }
260 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 261 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 262 if (!ptr) {
263 while (j > 0)
264 free_page((unsigned long)
265 pool_entry->elements[--j]);
266 kfree(pool_entry);
267 qeth_free_buffer_pool(card);
268 return -ENOMEM;
269 }
270 pool_entry->elements[j] = ptr;
271 }
272 list_add(&pool_entry->init_list,
273 &card->qdio.init_pool.entry_list);
274 }
275 return 0;
276}
277
278int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
279{
847a50fd 280 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 281
282 if ((card->state != CARD_STATE_DOWN) &&
283 (card->state != CARD_STATE_RECOVER))
284 return -EPERM;
285
286 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
287 qeth_clear_working_pool_list(card);
288 qeth_free_buffer_pool(card);
289 card->qdio.in_buf_pool.buf_count = bufcnt;
290 card->qdio.init_pool.buf_count = bufcnt;
291 return qeth_alloc_buffer_pool(card);
292}
76b11f8e 293EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 294
4601ba6c
SO		 295static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
296{
6d284bde
SO		 297 if (!q)
298 return;
299
300 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 301 kfree(q);
302}
303
304static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
305{
306 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
307 int i;
308
309 if (!q)
310 return NULL;
311
6d284bde
SO		 312 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
313 kfree(q);
314 return NULL;
315 }
316
4601ba6c 317 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 318 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 319
320 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
321 return q;
322}
323
0da9581d
EL		 324static inline int qeth_cq_init(struct qeth_card *card)
325{
326 int rc;
327
328 if (card->options.cq == QETH_CQ_ENABLED) {
329 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 330 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
331 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 332 card->qdio.c_q->next_buf_to_init = 127;
333 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
334 card->qdio.no_in_queues - 1, 0,
335 127);
336 if (rc) {
337 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
338 goto out;
339 }
340 }
341 rc = 0;
342out:
343 return rc;
344}
345
346static inline int qeth_alloc_cq(struct qeth_card *card)
347{
348 int rc;
349
350 if (card->options.cq == QETH_CQ_ENABLED) {
351 int i;
352 struct qdio_outbuf_state *outbuf_states;
353
354 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 355 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 356 if (!card->qdio.c_q) {
357 rc = -1;
358 goto kmsg_out;
359 }
0da9581d 360 card->qdio.no_in_queues = 2;
4a912f98 361 card->qdio.out_bufstates =
0da9581d
EL		 362 kzalloc(card->qdio.no_out_queues *
363 QDIO_MAX_BUFFERS_PER_Q *
364 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
365 outbuf_states = card->qdio.out_bufstates;
366 if (outbuf_states == NULL) {
367 rc = -1;
368 goto free_cq_out;
369 }
370 for (i = 0; i < card->qdio.no_out_queues; ++i) {
371 card->qdio.out_qs[i]->bufstates = outbuf_states;
372 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
373 }
374 } else {
375 QETH_DBF_TEXT(SETUP, 2, "nocq");
376 card->qdio.c_q = NULL;
377 card->qdio.no_in_queues = 1;
378 }
379 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
380 rc = 0;
381out:
382 return rc;
383free_cq_out:
4601ba6c 384 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 385 card->qdio.c_q = NULL;
386kmsg_out:
387 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
388 goto out;
389}
390
391static inline void qeth_free_cq(struct qeth_card *card)
392{
393 if (card->qdio.c_q) {
394 --card->qdio.no_in_queues;
4601ba6c 395 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 396 card->qdio.c_q = NULL;
397 }
398 kfree(card->qdio.out_bufstates);
399 card->qdio.out_bufstates = NULL;
400}
401
b3332930
FB		 402static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
403 int delayed) {
404 enum iucv_tx_notify n;
405
406 switch (sbalf15) {
407 case 0:
408 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
409 break;
410 case 4:
411 case 16:
412 case 17:
413 case 18:
414 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
415 TX_NOTIFY_UNREACHABLE;
416 break;
417 default:
418 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
419 TX_NOTIFY_GENERALERROR;
420 break;
421 }
422
423 return n;
424}
425
0da9581d
EL		 426static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
427 int bidx, int forced_cleanup)
428{
72861ae7
EL		 429 if (q->card->options.cq != QETH_CQ_ENABLED)
430 return;
431
0da9581d
EL		 432 if (q->bufs[bidx]->next_pending != NULL) {
433 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
434 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
435
436 while (c) {
437 if (forced_cleanup ||
438 atomic_read(&c->state) ==
439 QETH_QDIO_BUF_HANDLED_DELAYED) {
440 struct qeth_qdio_out_buffer *f = c;
441 QETH_CARD_TEXT(f->q->card, 5, "fp");
442 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 443 /* release here to avoid interleaving between
444 outbound tasklet and inbound tasklet
445 regarding notifications and lifecycle */
446 qeth_release_skbs(c);
447
0da9581d 448 c = f->next_pending;
18af5c17 449 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 450 head->next_pending = c;
451 kmem_cache_free(qeth_qdio_outbuf_cache, f);
452 } else {
453 head = c;
454 c = c->next_pending;
455 }
456
457 }
458 }
72861ae7
EL		 459 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
460 QETH_QDIO_BUF_HANDLED_DELAYED)) {
461 /* for recovery situations */
462 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
463 qeth_init_qdio_out_buf(q, bidx);
464 QETH_CARD_TEXT(q->card, 2, "clprecov");
465 }
0da9581d
EL		 466}
467
468
469static inline void qeth_qdio_handle_aob(struct qeth_card *card,
470 unsigned long phys_aob_addr) {
471 struct qaob *aob;
472 struct qeth_qdio_out_buffer *buffer;
b3332930 473 enum iucv_tx_notify notification;
0da9581d
EL		 474
475 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
476 QETH_CARD_TEXT(card, 5, "haob");
477 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
478 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
479 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
480
b3332930
FB		 481 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
482 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
483 notification = TX_NOTIFY_OK;
484 } else {
18af5c17
SR		 485 WARN_ON_ONCE(atomic_read(&buffer->state) !=
486 QETH_QDIO_BUF_PENDING);
b3332930
FB		 487 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
488 notification = TX_NOTIFY_DELAYED_OK;
489 }
490
491 if (aob->aorc != 0) {
492 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
493 notification = qeth_compute_cq_notification(aob->aorc, 1);
494 }
495 qeth_notify_skbs(buffer->q, buffer, notification);
496
0da9581d
EL		 497 buffer->aob = NULL;
498 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 499 QETH_QDIO_BUF_HANDLED_DELAYED);
500
0da9581d
EL		 501 /* from here on: do not touch buffer anymore */
502 qdio_release_aob(aob);
503}
504
505static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
506{
507 return card->options.cq == QETH_CQ_ENABLED &&
508 card->qdio.c_q != NULL &&
509 queue != 0 &&
510 queue == card->qdio.no_in_queues - 1;
511}
512
513
4a71df50
FB		 514static int qeth_issue_next_read(struct qeth_card *card)
515{
516 int rc;
517 struct qeth_cmd_buffer *iob;
518
847a50fd 519 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 520 if (card->read.state != CH_STATE_UP)
521 return -EIO;
522 iob = qeth_get_buffer(&card->read);
523 if (!iob) {
74eacdb9
FB		 524 dev_warn(&card->gdev->dev, "The qeth device driver "
525 "failed to recover an error on the device\n");
526 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
527 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 528 return -ENOMEM;
529 }
530 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 531 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 532 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
533 (addr_t) iob, 0, 0);
534 if (rc) {
74eacdb9
FB		 535 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
536 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 537 atomic_set(&card->read.irq_pending, 0);
908abbb5 538 card->read_or_write_problem = 1;
4a71df50
FB		 539 qeth_schedule_recovery(card);
540 wake_up(&card->wait_q);
541 }
542 return rc;
543}
544
545static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
546{
547 struct qeth_reply *reply;
548
549 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
550 if (reply) {
551 atomic_set(&reply->refcnt, 1);
552 atomic_set(&reply->received, 0);
553 reply->card = card;
6531084c 554 }
4a71df50
FB		 555 return reply;
556}
557
558static void qeth_get_reply(struct qeth_reply *reply)
559{
560 WARN_ON(atomic_read(&reply->refcnt) <= 0);
561 atomic_inc(&reply->refcnt);
562}
563
564static void qeth_put_reply(struct qeth_reply *reply)
565{
566 WARN_ON(atomic_read(&reply->refcnt) <= 0);
567 if (atomic_dec_and_test(&reply->refcnt))
568 kfree(reply);
569}
570
d11ba0c4 571static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 572 struct qeth_card *card)
573{
4a71df50 574 char *ipa_name;
d11ba0c4 575 int com = cmd->hdr.command;
4a71df50 576 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 577 if (rc)
70919e23
UB		 578 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
579 "x%X \"%s\"\n",
580 ipa_name, com, dev_name(&card->gdev->dev),
581 QETH_CARD_IFNAME(card), rc,
582 qeth_get_ipa_msg(rc));
d11ba0c4 583 else
70919e23
UB		 584 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
585 ipa_name, com, dev_name(&card->gdev->dev),
586 QETH_CARD_IFNAME(card));
4a71df50
FB		 587}
588
589static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
590 struct qeth_cmd_buffer *iob)
591{
592 struct qeth_ipa_cmd *cmd = NULL;
593
847a50fd 594 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 595 if (IS_IPA(iob->data)) {
596 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
597 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 598 if (cmd->hdr.command != IPA_CMD_SETCCID &&
599 cmd->hdr.command != IPA_CMD_DELCCID &&
600 cmd->hdr.command != IPA_CMD_MODCCID &&
601 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 602 qeth_issue_ipa_msg(cmd,
603 cmd->hdr.return_code, card);
4a71df50
FB		 604 return cmd;
605 } else {
606 switch (cmd->hdr.command) {
607 case IPA_CMD_STOPLAN:
0f54761d
SR		 608 if (cmd->hdr.return_code ==
609 IPA_RC_VEPA_TO_VEB_TRANSITION) {
610 dev_err(&card->gdev->dev,
611 "Interface %s is down because the "
612 "adjacent port is no longer in "
613 "reflective relay mode\n",
614 QETH_CARD_IFNAME(card));
615 qeth_close_dev(card);
616 } else {
617 dev_warn(&card->gdev->dev,
74eacdb9
FB		 618 "The link for interface %s on CHPID"
619 " 0x%X failed\n",
4a71df50
FB		 620 QETH_CARD_IFNAME(card),
621 card->info.chpid);
0f54761d
SR		 622 qeth_issue_ipa_msg(cmd,
623 cmd->hdr.return_code, card);
624 }
4a71df50
FB		 625 card->lan_online = 0;
626 if (card->dev && netif_carrier_ok(card->dev))
627 netif_carrier_off(card->dev);
628 return NULL;
629 case IPA_CMD_STARTLAN:
74eacdb9
FB		 630 dev_info(&card->gdev->dev,
631 "The link for %s on CHPID 0x%X has"
632 " been restored\n",
4a71df50
FB		 633 QETH_CARD_IFNAME(card),
634 card->info.chpid);
635 netif_carrier_on(card->dev);
922dc062 636 card->lan_online = 1;
1da74b1c
FB		 637 if (card->info.hwtrap)
638 card->info.hwtrap = 2;
4a71df50
FB		 639 qeth_schedule_recovery(card);
640 return NULL;
b4d72c08 641 case IPA_CMD_SETBRIDGEPORT:
9f48b9db 642 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 643 if (card->discipline->control_event_handler
644 (card, cmd))
645 return cmd;
646 else
647 return NULL;
4a71df50
FB		 648 case IPA_CMD_MODCCID:
649 return cmd;
650 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 651 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 652 break;
653 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 654 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 655 break;
656 default:
c4cef07c 657 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 658 "but not a reply!\n");
659 break;
660 }
661 }
662 }
663 return cmd;
664}
665
666void qeth_clear_ipacmd_list(struct qeth_card *card)
667{
668 struct qeth_reply *reply, *r;
669 unsigned long flags;
670
847a50fd 671 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 672
673 spin_lock_irqsave(&card->lock, flags);
674 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
675 qeth_get_reply(reply);
676 reply->rc = -EIO;
677 atomic_inc(&reply->received);
678 list_del_init(&reply->list);
679 wake_up(&reply->wait_q);
680 qeth_put_reply(reply);
681 }
682 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 683 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 684}
685EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
686
5113fec0
UB		 687static int qeth_check_idx_response(struct qeth_card *card,
688 unsigned char *buffer)
4a71df50
FB		 689{
690 if (!buffer)
691 return 0;
692
d11ba0c4 693 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 694 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 695 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 696 "with cause code 0x%02x%s\n",
697 buffer[4],
698 ((buffer[4] == 0x22) ?
699 " -- try another portname" : ""));
847a50fd
CO		 700 QETH_CARD_TEXT(card, 2, "ckidxres");
701 QETH_CARD_TEXT(card, 2, " idxterm");
702 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 703 if (buffer[4] == 0xf6) {
704 dev_err(&card->gdev->dev,
705 "The qeth device is not configured "
706 "for the OSI layer required by z/VM\n");
707 return -EPERM;
708 }
4a71df50
FB		 709 return -EIO;
710 }
711 return 0;
712}
713
714static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
715 __u32 len)
716{
717 struct qeth_card *card;
718
4a71df50 719 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 720 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 721 if (channel == &card->read)
722 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
723 else
724 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
725 channel->ccw.count = len;
726 channel->ccw.cda = (__u32) __pa(iob);
727}
728
729static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
730{
731 __u8 index;
732
847a50fd 733 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 734 index = channel->io_buf_no;
735 do {
736 if (channel->iob[index].state == BUF_STATE_FREE) {
737 channel->iob[index].state = BUF_STATE_LOCKED;
738 channel->io_buf_no = (channel->io_buf_no + 1) %
739 QETH_CMD_BUFFER_NO;
740 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
741 return channel->iob + index;
742 }
743 index = (index + 1) % QETH_CMD_BUFFER_NO;
744 } while (index != channel->io_buf_no);
745
746 return NULL;
747}
748
749void qeth_release_buffer(struct qeth_channel *channel,
750 struct qeth_cmd_buffer *iob)
751{
752 unsigned long flags;
753
847a50fd 754 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 755 spin_lock_irqsave(&channel->iob_lock, flags);
756 memset(iob->data, 0, QETH_BUFSIZE);
757 iob->state = BUF_STATE_FREE;
758 iob->callback = qeth_send_control_data_cb;
759 iob->rc = 0;
760 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 761 wake_up(&channel->wait_q);
4a71df50
FB		 762}
763EXPORT_SYMBOL_GPL(qeth_release_buffer);
764
765static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
766{
767 struct qeth_cmd_buffer *buffer = NULL;
768 unsigned long flags;
769
770 spin_lock_irqsave(&channel->iob_lock, flags);
771 buffer = __qeth_get_buffer(channel);
772 spin_unlock_irqrestore(&channel->iob_lock, flags);
773 return buffer;
774}
775
776struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
777{
778 struct qeth_cmd_buffer *buffer;
779 wait_event(channel->wait_q,
780 ((buffer = qeth_get_buffer(channel)) != NULL));
781 return buffer;
782}
783EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
784
785void qeth_clear_cmd_buffers(struct qeth_channel *channel)
786{
787 int cnt;
788
789 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
790 qeth_release_buffer(channel, &channel->iob[cnt]);
791 channel->buf_no = 0;
792 channel->io_buf_no = 0;
793}
794EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
795
796static void qeth_send_control_data_cb(struct qeth_channel *channel,
797 struct qeth_cmd_buffer *iob)
798{
799 struct qeth_card *card;
800 struct qeth_reply *reply, *r;
801 struct qeth_ipa_cmd *cmd;
802 unsigned long flags;
803 int keep_reply;
5113fec0 804 int rc = 0;
4a71df50 805
4a71df50 806 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 807 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 808 rc = qeth_check_idx_response(card, iob->data);
809 switch (rc) {
810 case 0:
811 break;
812 case -EIO:
4a71df50 813 qeth_clear_ipacmd_list(card);
5113fec0 814 qeth_schedule_recovery(card);
01fc3e86 815 /* fall through */
5113fec0 816 default:
4a71df50
FB		 817 goto out;
818 }
819
820 cmd = qeth_check_ipa_data(card, iob);
821 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
822 goto out;
823 /*in case of OSN : check if cmd is set */
824 if (card->info.type == QETH_CARD_TYPE_OSN &&
825 cmd &&
826 cmd->hdr.command != IPA_CMD_STARTLAN &&
827 card->osn_info.assist_cb != NULL) {
828 card->osn_info.assist_cb(card->dev, cmd);
829 goto out;
830 }
831
832 spin_lock_irqsave(&card->lock, flags);
833 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
834 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
835 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
836 qeth_get_reply(reply);
837 list_del_init(&reply->list);
838 spin_unlock_irqrestore(&card->lock, flags);
839 keep_reply = 0;
840 if (reply->callback != NULL) {
841 if (cmd) {
842 reply->offset = (__u16)((char *)cmd -
843 (char *)iob->data);
844 keep_reply = reply->callback(card,
845 reply,
846 (unsigned long)cmd);
847 } else
848 keep_reply = reply->callback(card,
849 reply,
850 (unsigned long)iob);
851 }
852 if (cmd)
853 reply->rc = (u16) cmd->hdr.return_code;
854 else if (iob->rc)
855 reply->rc = iob->rc;
856 if (keep_reply) {
857 spin_lock_irqsave(&card->lock, flags);
858 list_add_tail(&reply->list,
859 &card->cmd_waiter_list);
860 spin_unlock_irqrestore(&card->lock, flags);
861 } else {
862 atomic_inc(&reply->received);
863 wake_up(&reply->wait_q);
864 }
865 qeth_put_reply(reply);
866 goto out;
867 }
868 }
869 spin_unlock_irqrestore(&card->lock, flags);
870out:
871 memcpy(&card->seqno.pdu_hdr_ack,
872 QETH_PDU_HEADER_SEQ_NO(iob->data),
873 QETH_SEQ_NO_LENGTH);
874 qeth_release_buffer(channel, iob);
875}
876
877static int qeth_setup_channel(struct qeth_channel *channel)
878{
879 int cnt;
880
d11ba0c4 881 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 882 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 883 channel->iob[cnt].data =
b3332930 884 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 885 if (channel->iob[cnt].data == NULL)
886 break;
887 channel->iob[cnt].state = BUF_STATE_FREE;
888 channel->iob[cnt].channel = channel;
889 channel->iob[cnt].callback = qeth_send_control_data_cb;
890 channel->iob[cnt].rc = 0;
891 }
892 if (cnt < QETH_CMD_BUFFER_NO) {
893 while (cnt-- > 0)
894 kfree(channel->iob[cnt].data);
895 return -ENOMEM;
896 }
897 channel->buf_no = 0;
898 channel->io_buf_no = 0;
899 atomic_set(&channel->irq_pending, 0);
900 spin_lock_init(&channel->iob_lock);
901
902 init_waitqueue_head(&channel->wait_q);
903 return 0;
904}
905
906static int qeth_set_thread_start_bit(struct qeth_card *card,
907 unsigned long thread)
908{
909 unsigned long flags;
910
911 spin_lock_irqsave(&card->thread_mask_lock, flags);
912 if (!(card->thread_allowed_mask & thread) ||
913 (card->thread_start_mask & thread)) {
914 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
915 return -EPERM;
916 }
917 card->thread_start_mask |= thread;
918 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
919 return 0;
920}
921
922void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
923{
924 unsigned long flags;
925
926 spin_lock_irqsave(&card->thread_mask_lock, flags);
927 card->thread_start_mask &= ~thread;
928 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
929 wake_up(&card->wait_q);
930}
931EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
932
933void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
934{
935 unsigned long flags;
936
937 spin_lock_irqsave(&card->thread_mask_lock, flags);
938 card->thread_running_mask &= ~thread;
939 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
940 wake_up(&card->wait_q);
941}
942EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
943
944static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
945{
946 unsigned long flags;
947 int rc = 0;
948
949 spin_lock_irqsave(&card->thread_mask_lock, flags);
950 if (card->thread_start_mask & thread) {
951 if ((card->thread_allowed_mask & thread) &&
952 !(card->thread_running_mask & thread)) {
953 rc = 1;
954 card->thread_start_mask &= ~thread;
955 card->thread_running_mask |= thread;
956 } else
957 rc = -EPERM;
958 }
959 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
960 return rc;
961}
962
963int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
964{
965 int rc = 0;
966
967 wait_event(card->wait_q,
968 (rc = __qeth_do_run_thread(card, thread)) >= 0);
969 return rc;
970}
971EXPORT_SYMBOL_GPL(qeth_do_run_thread);
972
973void qeth_schedule_recovery(struct qeth_card *card)
974{
847a50fd 975 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 976 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
977 schedule_work(&card->kernel_thread_starter);
978}
979EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
980
981static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
982{
983 int dstat, cstat;
984 char *sense;
847a50fd 985 struct qeth_card *card;
4a71df50
FB		 986
987 sense = (char *) irb->ecw;
23d805b6
PO		 988 cstat = irb->scsw.cmd.cstat;
989 dstat = irb->scsw.cmd.dstat;
847a50fd 990 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 991
992 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
993 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
994 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 995 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 996 dev_warn(&cdev->dev, "The qeth device driver "
997 "failed to recover an error on the device\n");
5113fec0 998 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 999 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1000 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1001 16, 1, irb, 64, 1);
1002 return 1;
1003 }
1004
1005 if (dstat & DEV_STAT_UNIT_CHECK) {
1006 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1007 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1008 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1009 return 1;
1010 }
1011 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1012 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1013 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1014 return 1;
4a71df50
FB		 1015 }
1016 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1017 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1018 return 1;
1019 }
1020 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1021 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1022 return 0;
1023 }
847a50fd 1024 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1025 return 1;
1026 }
1027 return 0;
1028}
1029
1030static long __qeth_check_irb_error(struct ccw_device *cdev,
1031 unsigned long intparm, struct irb *irb)
1032{
847a50fd
CO		 1033 struct qeth_card *card;
1034
1035 card = CARD_FROM_CDEV(cdev);
1036
e95051ff 1037 if (!card || !IS_ERR(irb))
4a71df50
FB		 1038 return 0;
1039
1040 switch (PTR_ERR(irb)) {
1041 case -EIO:
74eacdb9
FB		 1042 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1043 dev_name(&cdev->dev));
847a50fd
CO		 1044 QETH_CARD_TEXT(card, 2, "ckirberr");
1045 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1046 break;
1047 case -ETIMEDOUT:
74eacdb9
FB		 1048 dev_warn(&cdev->dev, "A hardware operation timed out"
1049 " on the device\n");
847a50fd
CO		 1050 QETH_CARD_TEXT(card, 2, "ckirberr");
1051 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1052 if (intparm == QETH_RCD_PARM) {
e95051ff 1053 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1054 card->data.state = CH_STATE_DOWN;
1055 wake_up(&card->wait_q);
1056 }
1057 }
1058 break;
1059 default:
74eacdb9
FB		 1060 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1061 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1062 QETH_CARD_TEXT(card, 2, "ckirberr");
1063 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1064 }
1065 return PTR_ERR(irb);
1066}
1067
1068static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1069 struct irb *irb)
1070{
1071 int rc;
1072 int cstat, dstat;
1073 struct qeth_cmd_buffer *buffer;
1074 struct qeth_channel *channel;
1075 struct qeth_card *card;
1076 struct qeth_cmd_buffer *iob;
1077 __u8 index;
1078
4a71df50
FB		 1079 if (__qeth_check_irb_error(cdev, intparm, irb))
1080 return;
23d805b6
PO		 1081 cstat = irb->scsw.cmd.cstat;
1082 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1083
1084 card = CARD_FROM_CDEV(cdev);
1085 if (!card)
1086 return;
1087
847a50fd
CO		 1088 QETH_CARD_TEXT(card, 5, "irq");
1089
4a71df50
FB		 1090 if (card->read.ccwdev == cdev) {
1091 channel = &card->read;
847a50fd 1092 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1093 } else if (card->write.ccwdev == cdev) {
1094 channel = &card->write;
847a50fd 1095 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1096 } else {
1097 channel = &card->data;
847a50fd 1098 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1099 }
1100 atomic_set(&channel->irq_pending, 0);
1101
23d805b6 1102 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1103 channel->state = CH_STATE_STOPPED;
1104
23d805b6 1105 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1106 channel->state = CH_STATE_HALTED;
1107
1108 /*let's wake up immediately on data channel*/
1109 if ((channel == &card->data) && (intparm != 0) &&
1110 (intparm != QETH_RCD_PARM))
1111 goto out;
1112
1113 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1114 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1115 /* we don't have to handle this further */
1116 intparm = 0;
1117 }
1118 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1119 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1120 /* we don't have to handle this further */
1121 intparm = 0;
1122 }
1123 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1124 (dstat & DEV_STAT_UNIT_CHECK) ||
1125 (cstat)) {
1126 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1127 dev_warn(&channel->ccwdev->dev,
1128 "The qeth device driver failed to recover "
1129 "an error on the device\n");
1130 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1131 "0x%X dstat 0x%X\n",
1132 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1133 print_hex_dump(KERN_WARNING, "qeth: irb ",
1134 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1135 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1136 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1137 }
1138 if (intparm == QETH_RCD_PARM) {
1139 channel->state = CH_STATE_DOWN;
1140 goto out;
1141 }
1142 rc = qeth_get_problem(cdev, irb);
1143 if (rc) {
28a7e4c9 1144 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1145 qeth_schedule_recovery(card);
1146 goto out;
1147 }
1148 }
1149
1150 if (intparm == QETH_RCD_PARM) {
1151 channel->state = CH_STATE_RCD_DONE;
1152 goto out;
1153 }
1154 if (intparm) {
1155 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1156 buffer->state = BUF_STATE_PROCESSED;
1157 }
1158 if (channel == &card->data)
1159 return;
1160 if (channel == &card->read &&
1161 channel->state == CH_STATE_UP)
1162 qeth_issue_next_read(card);
1163
1164 iob = channel->iob;
1165 index = channel->buf_no;
1166 while (iob[index].state == BUF_STATE_PROCESSED) {
1167 if (iob[index].callback != NULL)
1168 iob[index].callback(channel, iob + index);
1169
1170 index = (index + 1) % QETH_CMD_BUFFER_NO;
1171 }
1172 channel->buf_no = index;
1173out:
1174 wake_up(&card->wait_q);
1175 return;
1176}
1177
b3332930 1178static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1179 struct qeth_qdio_out_buffer *buf,
b3332930 1180 enum iucv_tx_notify notification)
4a71df50 1181{
4a71df50
FB		 1182 struct sk_buff *skb;
1183
b3332930
FB		 1184 if (skb_queue_empty(&buf->skb_list))
1185 goto out;
1186 skb = skb_peek(&buf->skb_list);
1187 while (skb) {
1188 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1189 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1190 if (skb->protocol == ETH_P_AF_IUCV) {
1191 if (skb->sk) {
1192 struct iucv_sock *iucv = iucv_sk(skb->sk);
1193 iucv->sk_txnotify(skb, notification);
1194 }
1195 }
1196 if (skb_queue_is_last(&buf->skb_list, skb))
1197 skb = NULL;
1198 else
1199 skb = skb_queue_next(&buf->skb_list, skb);
1200 }
1201out:
1202 return;
1203}
1204
1205static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1206{
1207 struct sk_buff *skb;
72861ae7
EL		 1208 struct iucv_sock *iucv;
1209 int notify_general_error = 0;
1210
1211 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1212 notify_general_error = 1;
1213
1214 /* release may never happen from within CQ tasklet scope */
18af5c17 1215 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1216
b67d801f
UB		 1217 skb = skb_dequeue(&buf->skb_list);
1218 while (skb) {
b3332930
FB		 1219 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1220 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1221 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1222 if (skb->sk) {
1223 iucv = iucv_sk(skb->sk);
1224 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1225 }
1226 }
b67d801f
UB		 1227 atomic_dec(&skb->users);
1228 dev_kfree_skb_any(skb);
4a71df50
FB		 1229 skb = skb_dequeue(&buf->skb_list);
1230 }
b3332930
FB		 1231}
1232
1233static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1234 struct qeth_qdio_out_buffer *buf,
1235 enum qeth_qdio_buffer_states newbufstate)
1236{
1237 int i;
1238
1239 /* is PCI flag set on buffer? */
1240 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1241 atomic_dec(&queue->set_pci_flags_count);
1242
1243 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1244 qeth_release_skbs(buf);
1245 }
4a71df50 1246 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1247 if (buf->buffer->element[i].addr && buf->is_header[i])
1248 kmem_cache_free(qeth_core_header_cache,
1249 buf->buffer->element[i].addr);
1250 buf->is_header[i] = 0;
4a71df50
FB		 1251 buf->buffer->element[i].length = 0;
1252 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1253 buf->buffer->element[i].eflags = 0;
1254 buf->buffer->element[i].sflags = 0;
4a71df50 1255 }
3ec90878
JG		 1256 buf->buffer->element[15].eflags = 0;
1257 buf->buffer->element[15].sflags = 0;
4a71df50 1258 buf->next_element_to_fill = 0;
0da9581d
EL		 1259 atomic_set(&buf->state, newbufstate);
1260}
1261
1262static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1263{
1264 int j;
1265
1266 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1267 if (!q->bufs[j])
1268 continue;
72861ae7 1269 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1270 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1271 if (free) {
1272 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1273 q->bufs[j] = NULL;
1274 }
1275 }
4a71df50
FB		 1276}
1277
1278void qeth_clear_qdio_buffers(struct qeth_card *card)
1279{
0da9581d 1280 int i;
4a71df50 1281
847a50fd 1282 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1283 /* clear outbound buffers to free skbs */
0da9581d 1284 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1285 if (card->qdio.out_qs[i]) {
0da9581d 1286 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1287 }
0da9581d 1288 }
4a71df50
FB		 1289}
1290EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1291
1292static void qeth_free_buffer_pool(struct qeth_card *card)
1293{
1294 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1295 int i = 0;
4a71df50
FB		 1296 list_for_each_entry_safe(pool_entry, tmp,
1297 &card->qdio.init_pool.entry_list, init_list){
1298 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1299 free_page((unsigned long)pool_entry->elements[i]);
1300 list_del(&pool_entry->init_list);
1301 kfree(pool_entry);
1302 }
1303}
1304
4a71df50
FB		 1305static void qeth_clean_channel(struct qeth_channel *channel)
1306{
1307 int cnt;
1308
d11ba0c4 1309 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1310 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1311 kfree(channel->iob[cnt].data);
1312}
1313
725b9c04
SO		 1314static void qeth_set_single_write_queues(struct qeth_card *card)
1315{
1316 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1317 (card->qdio.no_out_queues == 4))
1318 qeth_free_qdio_buffers(card);
1319
1320 card->qdio.no_out_queues = 1;
1321 if (card->qdio.default_out_queue != 0)
1322 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1323
1324 card->qdio.default_out_queue = 0;
1325}
1326
1327static void qeth_set_multiple_write_queues(struct qeth_card *card)
1328{
1329 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1330 (card->qdio.no_out_queues == 1)) {
1331 qeth_free_qdio_buffers(card);
1332 card->qdio.default_out_queue = 2;
1333 }
1334 card->qdio.no_out_queues = 4;
1335}
1336
1337static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1338{
4a71df50 1339 struct ccw_device *ccwdev;
2bf29df7 1340 struct channel_path_desc *chp_dsc;
4a71df50 1341
5113fec0 1342 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1343
1344 ccwdev = card->data.ccwdev;
725b9c04
SO		 1345 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1346 if (!chp_dsc)
1347 goto out;
1348
1349 card->info.func_level = 0x4100 + chp_dsc->desc;
1350 if (card->info.type == QETH_CARD_TYPE_IQD)
1351 goto out;
1352
1353 /* CHPP field bit 6 == 1 -> single queue */
1354 if ((chp_dsc->chpp & 0x02) == 0x02)
1355 qeth_set_single_write_queues(card);
1356 else
1357 qeth_set_multiple_write_queues(card);
1358out:
1359 kfree(chp_dsc);
5113fec0
UB		 1360 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1361 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1362}
1363
1364static void qeth_init_qdio_info(struct qeth_card *card)
1365{
d11ba0c4 1366 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1367 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1368 /* inbound */
1369 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1370 if (card->info.type == QETH_CARD_TYPE_IQD)
1371 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1372 else
1373 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1374 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1375 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1376 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1377}
1378
1379static void qeth_set_intial_options(struct qeth_card *card)
1380{
1381 card->options.route4.type = NO_ROUTER;
1382 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1383 card->options.fake_broadcast = 0;
1384 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1385 card->options.performance_stats = 0;
1386 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1387 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1388 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1389}
1390
1391static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1392{
1393 unsigned long flags;
1394 int rc = 0;
1395
1396 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1397 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1398 (u8) card->thread_start_mask,
1399 (u8) card->thread_allowed_mask,
1400 (u8) card->thread_running_mask);
1401 rc = (card->thread_start_mask & thread);
1402 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1403 return rc;
1404}
1405
1406static void qeth_start_kernel_thread(struct work_struct *work)
1407{
3f36b890 1408 struct task_struct *ts;
4a71df50
FB		 1409 struct qeth_card *card = container_of(work, struct qeth_card,
1410 kernel_thread_starter);
847a50fd 1411 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1412
1413 if (card->read.state != CH_STATE_UP &&
1414 card->write.state != CH_STATE_UP)
1415 return;
3f36b890 1416 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1417 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1418 "qeth_recover");
3f36b890
FB		 1419 if (IS_ERR(ts)) {
1420 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1421 qeth_clear_thread_running_bit(card,
1422 QETH_RECOVER_THREAD);
1423 }
1424 }
4a71df50
FB		 1425}
1426
1427static int qeth_setup_card(struct qeth_card *card)
1428{
1429
d11ba0c4
PT		 1430 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1431 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1432
1433 card->read.state = CH_STATE_DOWN;
1434 card->write.state = CH_STATE_DOWN;
1435 card->data.state = CH_STATE_DOWN;
1436 card->state = CARD_STATE_DOWN;
1437 card->lan_online = 0;
908abbb5 1438 card->read_or_write_problem = 0;
4a71df50
FB		 1439 card->dev = NULL;
1440 spin_lock_init(&card->vlanlock);
1441 spin_lock_init(&card->mclock);
4a71df50
FB		 1442 spin_lock_init(&card->lock);
1443 spin_lock_init(&card->ip_lock);
1444 spin_lock_init(&card->thread_mask_lock);
c4949f07 1445 mutex_init(&card->conf_mutex);
9dc48ccc 1446 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1447 card->thread_start_mask = 0;
1448 card->thread_allowed_mask = 0;
1449 card->thread_running_mask = 0;
1450 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1451 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1452 INIT_LIST_HEAD(card->ip_tbd_list);
1453 INIT_LIST_HEAD(&card->cmd_waiter_list);
1454 init_waitqueue_head(&card->wait_q);
25985edc 1455 /* initial options */
4a71df50
FB		 1456 qeth_set_intial_options(card);
1457 /* IP address takeover */
1458 INIT_LIST_HEAD(&card->ipato.entries);
1459 card->ipato.enabled = 0;
1460 card->ipato.invert4 = 0;
1461 card->ipato.invert6 = 0;
1462 /* init QDIO stuff */
1463 qeth_init_qdio_info(card);
b3332930 1464 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1465 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1466 return 0;
1467}
1468
6bcac508
MS		 1469static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1470{
1471 struct qeth_card *card = container_of(slr, struct qeth_card,
1472 qeth_service_level);
0d788c7d
KDW		 1473 if (card->info.mcl_level[0])
1474 seq_printf(m, "qeth: %s firmware level %s\n",
1475 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1476}
1477
4a71df50
FB		 1478static struct qeth_card *qeth_alloc_card(void)
1479{
1480 struct qeth_card *card;
1481
d11ba0c4 1482 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1483 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1484 if (!card)
76b11f8e 1485 goto out;
d11ba0c4 1486 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1487 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1488 if (!card->ip_tbd_list) {
1489 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1490 goto out_card;
4a71df50 1491 }
76b11f8e
UB		 1492 if (qeth_setup_channel(&card->read))
1493 goto out_ip;
1494 if (qeth_setup_channel(&card->write))
1495 goto out_channel;
4a71df50 1496 card->options.layer2 = -1;
6bcac508
MS		 1497 card->qeth_service_level.seq_print = qeth_core_sl_print;
1498 register_service_level(&card->qeth_service_level);
4a71df50 1499 return card;
76b11f8e
UB		 1500
1501out_channel:
1502 qeth_clean_channel(&card->read);
1503out_ip:
1504 kfree(card->ip_tbd_list);
1505out_card:
1506 kfree(card);
1507out:
1508 return NULL;
4a71df50
FB		 1509}
1510
1511static int qeth_determine_card_type(struct qeth_card *card)
1512{
1513 int i = 0;
1514
d11ba0c4 1515 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1516
1517 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1518 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1519 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1520 if ((CARD_RDEV(card)->id.dev_type ==
1521 known_devices[i][QETH_DEV_TYPE_IND]) &&
1522 (CARD_RDEV(card)->id.dev_model ==
1523 known_devices[i][QETH_DEV_MODEL_IND])) {
1524 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1525 card->qdio.no_out_queues =
1526 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1527 card->qdio.no_in_queues = 1;
5113fec0
UB		 1528 card->info.is_multicast_different =
1529 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1530 qeth_update_from_chp_desc(card);
4a71df50
FB		 1531 return 0;
1532 }
1533 i++;
1534 }
1535 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1536 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1537 "unknown type\n");
4a71df50
FB		 1538 return -ENOENT;
1539}
1540
1541static int qeth_clear_channel(struct qeth_channel *channel)
1542{
1543 unsigned long flags;
1544 struct qeth_card *card;
1545 int rc;
1546
4a71df50 1547 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1548 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1549 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1550 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1551 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1552
1553 if (rc)
1554 return rc;
1555 rc = wait_event_interruptible_timeout(card->wait_q,
1556 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1557 if (rc == -ERESTARTSYS)
1558 return rc;
1559 if (channel->state != CH_STATE_STOPPED)
1560 return -ETIME;
1561 channel->state = CH_STATE_DOWN;
1562 return 0;
1563}
1564
1565static int qeth_halt_channel(struct qeth_channel *channel)
1566{
1567 unsigned long flags;
1568 struct qeth_card *card;
1569 int rc;
1570
4a71df50 1571 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1572 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1573 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1574 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1575 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1576
1577 if (rc)
1578 return rc;
1579 rc = wait_event_interruptible_timeout(card->wait_q,
1580 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1581 if (rc == -ERESTARTSYS)
1582 return rc;
1583 if (channel->state != CH_STATE_HALTED)
1584 return -ETIME;
1585 return 0;
1586}
1587
1588static int qeth_halt_channels(struct qeth_card *card)
1589{
1590 int rc1 = 0, rc2 = 0, rc3 = 0;
1591
847a50fd 1592 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1593 rc1 = qeth_halt_channel(&card->read);
1594 rc2 = qeth_halt_channel(&card->write);
1595 rc3 = qeth_halt_channel(&card->data);
1596 if (rc1)
1597 return rc1;
1598 if (rc2)
1599 return rc2;
1600 return rc3;
1601}
1602
1603static int qeth_clear_channels(struct qeth_card *card)
1604{
1605 int rc1 = 0, rc2 = 0, rc3 = 0;
1606
847a50fd 1607 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1608 rc1 = qeth_clear_channel(&card->read);
1609 rc2 = qeth_clear_channel(&card->write);
1610 rc3 = qeth_clear_channel(&card->data);
1611 if (rc1)
1612 return rc1;
1613 if (rc2)
1614 return rc2;
1615 return rc3;
1616}
1617
1618static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1619{
1620 int rc = 0;
1621
847a50fd 1622 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1623
1624 if (halt)
1625 rc = qeth_halt_channels(card);
1626 if (rc)
1627 return rc;
1628 return qeth_clear_channels(card);
1629}
1630
1631int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1632{
1633 int rc = 0;
1634
847a50fd 1635 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1636 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1637 QETH_QDIO_CLEANING)) {
1638 case QETH_QDIO_ESTABLISHED:
1639 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1640 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1641 QDIO_FLAG_CLEANUP_USING_HALT);
1642 else
cc961d40 1643 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1644 QDIO_FLAG_CLEANUP_USING_CLEAR);
1645 if (rc)
847a50fd 1646 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1647 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1648 break;
1649 case QETH_QDIO_CLEANING:
1650 return rc;
1651 default:
1652 break;
1653 }
1654 rc = qeth_clear_halt_card(card, use_halt);
1655 if (rc)
847a50fd 1656 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1657 card->state = CARD_STATE_DOWN;
1658 return rc;
1659}
1660EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1661
1662static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1663 int *length)
1664{
1665 struct ciw *ciw;
1666 char *rcd_buf;
1667 int ret;
1668 struct qeth_channel *channel = &card->data;
1669 unsigned long flags;
1670
1671 /*
1672 * scan for RCD command in extended SenseID data
1673 */
1674 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1675 if (!ciw || ciw->cmd == 0)
1676 return -EOPNOTSUPP;
1677 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1678 if (!rcd_buf)
1679 return -ENOMEM;
1680
1681 channel->ccw.cmd_code = ciw->cmd;
1682 channel->ccw.cda = (__u32) __pa(rcd_buf);
1683 channel->ccw.count = ciw->count;
1684 channel->ccw.flags = CCW_FLAG_SLI;
1685 channel->state = CH_STATE_RCD;
1686 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1687 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1688 QETH_RCD_PARM, LPM_ANYPATH, 0,
1689 QETH_RCD_TIMEOUT);
1690 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1691 if (!ret)
1692 wait_event(card->wait_q,
1693 (channel->state == CH_STATE_RCD_DONE ||
1694 channel->state == CH_STATE_DOWN));
1695 if (channel->state == CH_STATE_DOWN)
1696 ret = -EIO;
1697 else
1698 channel->state = CH_STATE_DOWN;
1699 if (ret) {
1700 kfree(rcd_buf);
1701 *buffer = NULL;
1702 *length = 0;
1703 } else {
1704 *length = ciw->count;
1705 *buffer = rcd_buf;
1706 }
1707 return ret;
1708}
1709
a60389ab 1710static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1711{
a60389ab 1712 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1713 card->info.chpid = prcd[30];
1714 card->info.unit_addr2 = prcd[31];
1715 card->info.cula = prcd[63];
1716 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1717 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1718}
1719
1720static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1721{
1722 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1723
e6e056ba 1724 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1725 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1726 card->info.blkt.time_total = 0;
1727 card->info.blkt.inter_packet = 0;
1728 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1729 } else {
1730 card->info.blkt.time_total = 250;
1731 card->info.blkt.inter_packet = 5;
1732 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1733 }
4a71df50
FB		 1734}
1735
1736static void qeth_init_tokens(struct qeth_card *card)
1737{
1738 card->token.issuer_rm_w = 0x00010103UL;
1739 card->token.cm_filter_w = 0x00010108UL;
1740 card->token.cm_connection_w = 0x0001010aUL;
1741 card->token.ulp_filter_w = 0x0001010bUL;
1742 card->token.ulp_connection_w = 0x0001010dUL;
1743}
1744
1745static void qeth_init_func_level(struct qeth_card *card)
1746{
5113fec0
UB		 1747 switch (card->info.type) {
1748 case QETH_CARD_TYPE_IQD:
6298263a 1749 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1750 break;
1751 case QETH_CARD_TYPE_OSD:
0132951e 1752 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1753 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1754 break;
1755 default:
1756 break;
4a71df50
FB		 1757 }
1758}
1759
4a71df50
FB		 1760static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1761 void (*idx_reply_cb)(struct qeth_channel *,
1762 struct qeth_cmd_buffer *))
1763{
1764 struct qeth_cmd_buffer *iob;
1765 unsigned long flags;
1766 int rc;
1767 struct qeth_card *card;
1768
d11ba0c4 1769 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1770 card = CARD_FROM_CDEV(channel->ccwdev);
1771 iob = qeth_get_buffer(channel);
1772 iob->callback = idx_reply_cb;
1773 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1774 channel->ccw.count = QETH_BUFSIZE;
1775 channel->ccw.cda = (__u32) __pa(iob->data);
1776
1777 wait_event(card->wait_q,
1778 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1779 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1780 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1781 rc = ccw_device_start(channel->ccwdev,
1782 &channel->ccw, (addr_t) iob, 0, 0);
1783 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1784
1785 if (rc) {
14cc21b6 1786 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1787 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1788 atomic_set(&channel->irq_pending, 0);
1789 wake_up(&card->wait_q);
1790 return rc;
1791 }
1792 rc = wait_event_interruptible_timeout(card->wait_q,
1793 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1794 if (rc == -ERESTARTSYS)
1795 return rc;
1796 if (channel->state != CH_STATE_UP) {
1797 rc = -ETIME;
d11ba0c4 1798 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1799 qeth_clear_cmd_buffers(channel);
1800 } else
1801 rc = 0;
1802 return rc;
1803}
1804
1805static int qeth_idx_activate_channel(struct qeth_channel *channel,
1806 void (*idx_reply_cb)(struct qeth_channel *,
1807 struct qeth_cmd_buffer *))
1808{
1809 struct qeth_card *card;
1810 struct qeth_cmd_buffer *iob;
1811 unsigned long flags;
1812 __u16 temp;
1813 __u8 tmp;
1814 int rc;
f06f6f32 1815 struct ccw_dev_id temp_devid;
4a71df50
FB		 1816
1817 card = CARD_FROM_CDEV(channel->ccwdev);
1818
d11ba0c4 1819 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1820
1821 iob = qeth_get_buffer(channel);
1822 iob->callback = idx_reply_cb;
1823 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1824 channel->ccw.count = IDX_ACTIVATE_SIZE;
1825 channel->ccw.cda = (__u32) __pa(iob->data);
1826 if (channel == &card->write) {
1827 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1828 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1829 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1830 card->seqno.trans_hdr++;
1831 } else {
1832 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1833 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1834 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1835 }
1836 tmp = ((__u8)card->info.portno) | 0x80;
1837 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1838 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1839 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1840 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1841 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1842 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1843 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1844 temp = (card->info.cula << 8) + card->info.unit_addr2;
1845 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1846
1847 wait_event(card->wait_q,
1848 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1849 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1850 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1851 rc = ccw_device_start(channel->ccwdev,
1852 &channel->ccw, (addr_t) iob, 0, 0);
1853 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1854
1855 if (rc) {
14cc21b6
FB		 1856 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1857 rc);
d11ba0c4 1858 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1859 atomic_set(&channel->irq_pending, 0);
1860 wake_up(&card->wait_q);
1861 return rc;
1862 }
1863 rc = wait_event_interruptible_timeout(card->wait_q,
1864 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1865 if (rc == -ERESTARTSYS)
1866 return rc;
1867 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1868 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1869 " failed to recover an error on the device\n");
1870 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1871 dev_name(&channel->ccwdev->dev));
d11ba0c4 1872 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1873 qeth_clear_cmd_buffers(channel);
1874 return -ETIME;
1875 }
1876 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1877}
1878
1879static int qeth_peer_func_level(int level)
1880{
1881 if ((level & 0xff) == 8)
1882 return (level & 0xff) + 0x400;
1883 if (((level >> 8) & 3) == 1)
1884 return (level & 0xff) + 0x200;
1885 return level;
1886}
1887
1888static void qeth_idx_write_cb(struct qeth_channel *channel,
1889 struct qeth_cmd_buffer *iob)
1890{
1891 struct qeth_card *card;
1892 __u16 temp;
1893
d11ba0c4 1894 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1895
1896 if (channel->state == CH_STATE_DOWN) {
1897 channel->state = CH_STATE_ACTIVATING;
1898 goto out;
1899 }
1900 card = CARD_FROM_CDEV(channel->ccwdev);
1901
1902 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1903 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1904 dev_err(&card->write.ccwdev->dev,
1905 "The adapter is used exclusively by another "
1906 "host\n");
4a71df50 1907 else
74eacdb9
FB		 1908 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1909 " negative reply\n",
1910 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1911 goto out;
1912 }
1913 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1914 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1915 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1916 "function level mismatch (sent: 0x%x, received: "
1917 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1918 card->info.func_level, temp);
4a71df50
FB		 1919 goto out;
1920 }
1921 channel->state = CH_STATE_UP;
1922out:
1923 qeth_release_buffer(channel, iob);
1924}
1925
1926static void qeth_idx_read_cb(struct qeth_channel *channel,
1927 struct qeth_cmd_buffer *iob)
1928{
1929 struct qeth_card *card;
1930 __u16 temp;
1931
d11ba0c4 1932 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1933 if (channel->state == CH_STATE_DOWN) {
1934 channel->state = CH_STATE_ACTIVATING;
1935 goto out;
1936 }
1937
1938 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1939 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1940 goto out;
1941
1942 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1943 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1944 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1945 dev_err(&card->write.ccwdev->dev,
1946 "The adapter is used exclusively by another "
1947 "host\n");
5113fec0
UB		 1948 break;
1949 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1950 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1951 dev_err(&card->read.ccwdev->dev,
1952 "Setting the device online failed because of "
01fc3e86 1953 "insufficient authorization\n");
5113fec0
UB		 1954 break;
1955 default:
74eacdb9
FB		 1956 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1957 " negative reply\n",
1958 dev_name(&card->read.ccwdev->dev));
5113fec0 1959 }
01fc3e86
UB		 1960 QETH_CARD_TEXT_(card, 2, "idxread%c",
1961 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1962 goto out;
1963 }
1964
1965/**
5113fec0
UB		 1966 * * temporary fix for microcode bug
1967 * * to revert it,replace OR by AND
1968 * */
4a71df50 1969 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1970 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1971 card->info.portname_required = 1;
1972
1973 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1974 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1975 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1976 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1977 dev_name(&card->read.ccwdev->dev),
1978 card->info.func_level, temp);
4a71df50
FB		 1979 goto out;
1980 }
1981 memcpy(&card->token.issuer_rm_r,
1982 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1983 QETH_MPC_TOKEN_LENGTH);
1984 memcpy(&card->info.mcl_level[0],
1985 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1986 channel->state = CH_STATE_UP;
1987out:
1988 qeth_release_buffer(channel, iob);
1989}
1990
1991void qeth_prepare_control_data(struct qeth_card *card, int len,
1992 struct qeth_cmd_buffer *iob)
1993{
1994 qeth_setup_ccw(&card->write, iob->data, len);
1995 iob->callback = qeth_release_buffer;
1996
1997 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1998 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1999 card->seqno.trans_hdr++;
2000 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2001 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2002 card->seqno.pdu_hdr++;
2003 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2004 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2005 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2006}
2007EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2008
2009int qeth_send_control_data(struct qeth_card *card, int len,
2010 struct qeth_cmd_buffer *iob,
2011 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
2012 unsigned long),
2013 void *reply_param)
2014{
2015 int rc;
2016 unsigned long flags;
2017 struct qeth_reply *reply = NULL;
7834cd5a 2018 unsigned long timeout, event_timeout;
5b54e16f 2019 struct qeth_ipa_cmd *cmd;
4a71df50 2020
847a50fd 2021 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2022
908abbb5
UB		 2023 if (card->read_or_write_problem) {
2024 qeth_release_buffer(iob->channel, iob);
2025 return -EIO;
2026 }
4a71df50
FB		 2027 reply = qeth_alloc_reply(card);
2028 if (!reply) {
4a71df50
FB		 2029 return -ENOMEM;
2030 }
2031 reply->callback = reply_cb;
2032 reply->param = reply_param;
2033 if (card->state == CARD_STATE_DOWN)
2034 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2035 else
2036 reply->seqno = card->seqno.ipa++;
2037 init_waitqueue_head(&reply->wait_q);
2038 spin_lock_irqsave(&card->lock, flags);
2039 list_add_tail(&reply->list, &card->cmd_waiter_list);
2040 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 2041 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2042
2043 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2044 qeth_prepare_control_data(card, len, iob);
2045
2046 if (IS_IPA(iob->data))
7834cd5a 2047 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2048 else
7834cd5a
HC		 2049 event_timeout = QETH_TIMEOUT;
2050 timeout = jiffies + event_timeout;
4a71df50 2051
847a50fd 2052 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2053 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2054 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2055 (addr_t) iob, 0, 0);
2056 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2057 if (rc) {
74eacdb9
FB		 2058 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2059 "ccw_device_start rc = %i\n",
2060 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2061 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2062 spin_lock_irqsave(&card->lock, flags);
2063 list_del_init(&reply->list);
2064 qeth_put_reply(reply);
2065 spin_unlock_irqrestore(&card->lock, flags);
2066 qeth_release_buffer(iob->channel, iob);
2067 atomic_set(&card->write.irq_pending, 0);
2068 wake_up(&card->wait_q);
2069 return rc;
2070 }
5b54e16f
FB		 2071
2072 /* we have only one long running ipassist, since we can ensure
2073 process context of this command we can sleep */
2074 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2075 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2076 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2077 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2078 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2079 goto time_err;
2080 } else {
2081 while (!atomic_read(&reply->received)) {
2082 if (time_after(jiffies, timeout))
2083 goto time_err;
2084 cpu_relax();
6531084c 2085 }
5b54e16f
FB		 2086 }
2087
70919e23
UB		 2088 if (reply->rc == -EIO)
2089 goto error;
5b54e16f
FB		 2090 rc = reply->rc;
2091 qeth_put_reply(reply);
2092 return rc;
2093
2094time_err:
70919e23 2095 reply->rc = -ETIME;
5b54e16f
FB		 2096 spin_lock_irqsave(&reply->card->lock, flags);
2097 list_del_init(&reply->list);
2098 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2099 atomic_inc(&reply->received);
70919e23 2100error:
908abbb5
UB		 2101 atomic_set(&card->write.irq_pending, 0);
2102 qeth_release_buffer(iob->channel, iob);
2103 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2104 rc = reply->rc;
2105 qeth_put_reply(reply);
2106 return rc;
2107}
2108EXPORT_SYMBOL_GPL(qeth_send_control_data);
2109
2110static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2111 unsigned long data)
2112{
2113 struct qeth_cmd_buffer *iob;
2114
d11ba0c4 2115 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2116
2117 iob = (struct qeth_cmd_buffer *) data;
2118 memcpy(&card->token.cm_filter_r,
2119 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2120 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2121 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2122 return 0;
2123}
2124
2125static int qeth_cm_enable(struct qeth_card *card)
2126{
2127 int rc;
2128 struct qeth_cmd_buffer *iob;
2129
d11ba0c4 2130 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2131
2132 iob = qeth_wait_for_buffer(&card->write);
2133 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2134 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2135 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2136 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2137 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2138
2139 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2140 qeth_cm_enable_cb, NULL);
2141 return rc;
2142}
2143
2144static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2145 unsigned long data)
2146{
2147
2148 struct qeth_cmd_buffer *iob;
2149
d11ba0c4 2150 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2151
2152 iob = (struct qeth_cmd_buffer *) data;
2153 memcpy(&card->token.cm_connection_r,
2154 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2155 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2156 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2157 return 0;
2158}
2159
2160static int qeth_cm_setup(struct qeth_card *card)
2161{
2162 int rc;
2163 struct qeth_cmd_buffer *iob;
2164
d11ba0c4 2165 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2166
2167 iob = qeth_wait_for_buffer(&card->write);
2168 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2169 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2170 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2171 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2172 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2173 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2174 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2175 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2176 qeth_cm_setup_cb, NULL);
2177 return rc;
2178
2179}
2180
2181static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2182{
2183 switch (card->info.type) {
2184 case QETH_CARD_TYPE_UNKNOWN:
2185 return 1500;
2186 case QETH_CARD_TYPE_IQD:
2187 return card->info.max_mtu;
5113fec0 2188 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2189 switch (card->info.link_type) {
2190 case QETH_LINK_TYPE_HSTR:
2191 case QETH_LINK_TYPE_LANE_TR:
2192 return 2000;
2193 default:
fe44014a 2194 return card->options.layer2 ? 1500 : 1492;
4a71df50 2195 }
5113fec0
UB		 2196 case QETH_CARD_TYPE_OSM:
2197 case QETH_CARD_TYPE_OSX:
fe44014a 2198 return card->options.layer2 ? 1500 : 1492;
4a71df50
FB		 2199 default:
2200 return 1500;
2201 }
2202}
2203
4a71df50
FB		 2204static inline int qeth_get_mtu_outof_framesize(int framesize)
2205{
2206 switch (framesize) {
2207 case 0x4000:
2208 return 8192;
2209 case 0x6000:
2210 return 16384;
2211 case 0xa000:
2212 return 32768;
2213 case 0xffff:
2214 return 57344;
2215 default:
2216 return 0;
2217 }
2218}
2219
2220static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2221{
2222 switch (card->info.type) {
5113fec0
UB		 2223 case QETH_CARD_TYPE_OSD:
2224 case QETH_CARD_TYPE_OSM:
2225 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2226 case QETH_CARD_TYPE_IQD:
2227 return ((mtu >= 576) &&
9853b97b 2228 (mtu <= card->info.max_mtu));
4a71df50
FB		 2229 case QETH_CARD_TYPE_OSN:
2230 case QETH_CARD_TYPE_UNKNOWN:
2231 default:
2232 return 1;
2233 }
2234}
2235
2236static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2237 unsigned long data)
2238{
2239
2240 __u16 mtu, framesize;
2241 __u16 len;
2242 __u8 link_type;
2243 struct qeth_cmd_buffer *iob;
2244
d11ba0c4 2245 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2246
2247 iob = (struct qeth_cmd_buffer *) data;
2248 memcpy(&card->token.ulp_filter_r,
2249 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2250 QETH_MPC_TOKEN_LENGTH);
9853b97b 2251 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2252 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2253 mtu = qeth_get_mtu_outof_framesize(framesize);
2254 if (!mtu) {
2255 iob->rc = -EINVAL;
d11ba0c4 2256 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2257 return 0;
2258 }
8b2e18f6
UB		 2259 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2260 /* frame size has changed */
2261 if (card->dev &&
2262 ((card->dev->mtu == card->info.initial_mtu) ||
2263 (card->dev->mtu > mtu)))
2264 card->dev->mtu = mtu;
2265 qeth_free_qdio_buffers(card);
2266 }
4a71df50 2267 card->info.initial_mtu = mtu;
8b2e18f6 2268 card->info.max_mtu = mtu;
4a71df50
FB		 2269 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2270 } else {
9853b97b
FB		 2271 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2272 iob->data);
fe44014a
SR		 2273 card->info.initial_mtu = min(card->info.max_mtu,
2274 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2275 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2276 }
2277
2278 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2279 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2280 memcpy(&link_type,
2281 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2282 card->info.link_type = link_type;
2283 } else
2284 card->info.link_type = 0;
01fc3e86 2285 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2286 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2287 return 0;
2288}
2289
2290static int qeth_ulp_enable(struct qeth_card *card)
2291{
2292 int rc;
2293 char prot_type;
2294 struct qeth_cmd_buffer *iob;
2295
2296 /*FIXME: trace view callbacks*/
d11ba0c4 2297 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2298
2299 iob = qeth_wait_for_buffer(&card->write);
2300 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2301
2302 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2303 (__u8) card->info.portno;
2304 if (card->options.layer2)
2305 if (card->info.type == QETH_CARD_TYPE_OSN)
2306 prot_type = QETH_PROT_OSN2;
2307 else
2308 prot_type = QETH_PROT_LAYER2;
2309 else
2310 prot_type = QETH_PROT_TCPIP;
2311
2312 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2313 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2314 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2315 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2316 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2317 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2318 card->info.portname, 9);
2319 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2320 qeth_ulp_enable_cb, NULL);
2321 return rc;
2322
2323}
2324
2325static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2326 unsigned long data)
2327{
2328 struct qeth_cmd_buffer *iob;
2329
d11ba0c4 2330 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2331
2332 iob = (struct qeth_cmd_buffer *) data;
2333 memcpy(&card->token.ulp_connection_r,
2334 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2335 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2336 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2337 3)) {
2338 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2339 dev_err(&card->gdev->dev, "A connection could not be "
2340 "established because of an OLM limit\n");
bbb822a8 2341 iob->rc = -EMLINK;
65a1f898 2342 }
d11ba0c4 2343 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2344 return 0;
4a71df50
FB		 2345}
2346
2347static int qeth_ulp_setup(struct qeth_card *card)
2348{
2349 int rc;
2350 __u16 temp;
2351 struct qeth_cmd_buffer *iob;
2352 struct ccw_dev_id dev_id;
2353
d11ba0c4 2354 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2355
2356 iob = qeth_wait_for_buffer(&card->write);
2357 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2358
2359 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2360 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2361 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2362 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2363 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2364 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2365
2366 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2367 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2368 temp = (card->info.cula << 8) + card->info.unit_addr2;
2369 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2370 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2371 qeth_ulp_setup_cb, NULL);
2372 return rc;
2373}
2374
0da9581d
EL		 2375static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2376{
2377 int rc;
2378 struct qeth_qdio_out_buffer *newbuf;
2379
2380 rc = 0;
2381 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2382 if (!newbuf) {
2383 rc = -ENOMEM;
2384 goto out;
2385 }
d445a4e2 2386 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2387 skb_queue_head_init(&newbuf->skb_list);
2388 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2389 newbuf->q = q;
2390 newbuf->aob = NULL;
2391 newbuf->next_pending = q->bufs[bidx];
2392 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2393 q->bufs[bidx] = newbuf;
2394 if (q->bufstates) {
2395 q->bufstates[bidx].user = newbuf;
2396 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2397 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2398 QETH_CARD_TEXT_(q->card, 2, "%lx",
2399 (long) newbuf->next_pending);
2400 }
2401out:
2402 return rc;
2403}
2404
d445a4e2
SO		 2405static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2406{
2407 if (!q)
2408 return;
2409
2410 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2411 kfree(q);
2412}
2413
2414static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2415{
2416 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2417
2418 if (!q)
2419 return NULL;
2420
2421 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2422 kfree(q);
2423 return NULL;
2424 }
2425 return q;
2426}
0da9581d 2427
4a71df50
FB		 2428static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2429{
2430 int i, j;
2431
d11ba0c4 2432 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2433
2434 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2435 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2436 return 0;
2437
4601ba6c
SO		 2438 QETH_DBF_TEXT(SETUP, 2, "inq");
2439 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2440 if (!card->qdio.in_q)
2441 goto out_nomem;
4601ba6c 2442
4a71df50
FB		 2443 /* inbound buffer pool */
2444 if (qeth_alloc_buffer_pool(card))
2445 goto out_freeinq;
0da9581d 2446
4a71df50
FB		 2447 /* outbound */
2448 card->qdio.out_qs =
b3332930 2449 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2450 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2451 if (!card->qdio.out_qs)
2452 goto out_freepool;
2453 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2454 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2455 if (!card->qdio.out_qs[i])
2456 goto out_freeoutq;
d11ba0c4
PT		 2457 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2458 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2459 card->qdio.out_qs[i]->queue_no = i;
2460 /* give outbound qeth_qdio_buffers their qdio_buffers */
2461 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2462 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2463 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2464 goto out_freeoutqbufs;
4a71df50
FB		 2465 }
2466 }
0da9581d
EL		 2467
2468 /* completion */
2469 if (qeth_alloc_cq(card))
2470 goto out_freeoutq;
2471
4a71df50
FB		 2472 return 0;
2473
0da9581d
EL		 2474out_freeoutqbufs:
2475 while (j > 0) {
2476 --j;
2477 kmem_cache_free(qeth_qdio_outbuf_cache,
2478 card->qdio.out_qs[i]->bufs[j]);
2479 card->qdio.out_qs[i]->bufs[j] = NULL;
2480 }
4a71df50 2481out_freeoutq:
0da9581d 2482 while (i > 0) {
d445a4e2 2483 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2484 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2485 }
4a71df50
FB		 2486 kfree(card->qdio.out_qs);
2487 card->qdio.out_qs = NULL;
2488out_freepool:
2489 qeth_free_buffer_pool(card);
2490out_freeinq:
4601ba6c 2491 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2492 card->qdio.in_q = NULL;
2493out_nomem:
2494 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2495 return -ENOMEM;
2496}
2497
d445a4e2
SO		 2498static void qeth_free_qdio_buffers(struct qeth_card *card)
2499{
2500 int i, j;
2501
2502 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2503 QETH_QDIO_UNINITIALIZED)
2504 return;
2505
2506 qeth_free_cq(card);
2507 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2508 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2509 if (card->qdio.in_q->bufs[j].rx_skb)
2510 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2511 }
2512 qeth_free_qdio_queue(card->qdio.in_q);
2513 card->qdio.in_q = NULL;
2514 /* inbound buffer pool */
2515 qeth_free_buffer_pool(card);
2516 /* free outbound qdio_qs */
2517 if (card->qdio.out_qs) {
2518 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2519 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2520 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2521 }
2522 kfree(card->qdio.out_qs);
2523 card->qdio.out_qs = NULL;
2524 }
2525}
2526
4a71df50
FB		 2527static void qeth_create_qib_param_field(struct qeth_card *card,
2528 char *param_field)
2529{
2530
2531 param_field[0] = _ascebc['P'];
2532 param_field[1] = _ascebc['C'];
2533 param_field[2] = _ascebc['I'];
2534 param_field[3] = _ascebc['T'];
2535 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2536 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2537 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2538}
2539
2540static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2541 char *param_field)
2542{
2543 param_field[16] = _ascebc['B'];
2544 param_field[17] = _ascebc['L'];
2545 param_field[18] = _ascebc['K'];
2546 param_field[19] = _ascebc['T'];
2547 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2548 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2549 *((unsigned int *) (&param_field[28])) =
2550 card->info.blkt.inter_packet_jumbo;
2551}
2552
2553static int qeth_qdio_activate(struct qeth_card *card)
2554{
d11ba0c4 2555 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2556 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2557}
2558
2559static int qeth_dm_act(struct qeth_card *card)
2560{
2561 int rc;
2562 struct qeth_cmd_buffer *iob;
2563
d11ba0c4 2564 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2565
2566 iob = qeth_wait_for_buffer(&card->write);
2567 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2568
2569 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2570 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2571 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2572 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2573 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2574 return rc;
2575}
2576
2577static int qeth_mpc_initialize(struct qeth_card *card)
2578{
2579 int rc;
2580
d11ba0c4 2581 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2582
2583 rc = qeth_issue_next_read(card);
2584 if (rc) {
d11ba0c4 2585 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2586 return rc;
2587 }
2588 rc = qeth_cm_enable(card);
2589 if (rc) {
d11ba0c4 2590 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2591 goto out_qdio;
2592 }
2593 rc = qeth_cm_setup(card);
2594 if (rc) {
d11ba0c4 2595 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2596 goto out_qdio;
2597 }
2598 rc = qeth_ulp_enable(card);
2599 if (rc) {
d11ba0c4 2600 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2601 goto out_qdio;
2602 }
2603 rc = qeth_ulp_setup(card);
2604 if (rc) {
d11ba0c4 2605 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2606 goto out_qdio;
2607 }
2608 rc = qeth_alloc_qdio_buffers(card);
2609 if (rc) {
d11ba0c4 2610 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2611 goto out_qdio;
2612 }
2613 rc = qeth_qdio_establish(card);
2614 if (rc) {
d11ba0c4 2615 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2616 qeth_free_qdio_buffers(card);
2617 goto out_qdio;
2618 }
2619 rc = qeth_qdio_activate(card);
2620 if (rc) {
d11ba0c4 2621 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2622 goto out_qdio;
2623 }
2624 rc = qeth_dm_act(card);
2625 if (rc) {
d11ba0c4 2626 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2627 goto out_qdio;
2628 }
2629
2630 return 0;
2631out_qdio:
2632 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2633 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2634 return rc;
2635}
2636
2637static void qeth_print_status_with_portname(struct qeth_card *card)
2638{
2639 char dbf_text[15];
2640 int i;
2641
2642 sprintf(dbf_text, "%s", card->info.portname + 1);
2643 for (i = 0; i < 8; i++)
2644 dbf_text[i] =
2645 (char) _ebcasc[(__u8) dbf_text[i]];
2646 dbf_text[8] = 0;
74eacdb9 2647 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2648 "with link type %s (portname: %s)\n",
4a71df50
FB		 2649 qeth_get_cardname(card),
2650 (card->info.mcl_level[0]) ? " (level: " : "",
2651 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2652 (card->info.mcl_level[0]) ? ")" : "",
2653 qeth_get_cardname_short(card),
2654 dbf_text);
2655
2656}
2657
2658static void qeth_print_status_no_portname(struct qeth_card *card)
2659{
2660 if (card->info.portname[0])
74eacdb9 2661 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2662 "card%s%s%s\nwith link type %s "
2663 "(no portname needed by interface).\n",
4a71df50
FB		 2664 qeth_get_cardname(card),
2665 (card->info.mcl_level[0]) ? " (level: " : "",
2666 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2667 (card->info.mcl_level[0]) ? ")" : "",
2668 qeth_get_cardname_short(card));
2669 else
74eacdb9 2670 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2671 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2672 qeth_get_cardname(card),
2673 (card->info.mcl_level[0]) ? " (level: " : "",
2674 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2675 (card->info.mcl_level[0]) ? ")" : "",
2676 qeth_get_cardname_short(card));
2677}
2678
2679void qeth_print_status_message(struct qeth_card *card)
2680{
2681 switch (card->info.type) {
5113fec0
UB		 2682 case QETH_CARD_TYPE_OSD:
2683 case QETH_CARD_TYPE_OSM:
2684 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2685 /* VM will use a non-zero first character
2686 * to indicate a HiperSockets like reporting
2687 * of the level OSA sets the first character to zero
2688 * */
2689 if (!card->info.mcl_level[0]) {
2690 sprintf(card->info.mcl_level, "%02x%02x",
2691 card->info.mcl_level[2],
2692 card->info.mcl_level[3]);
2693
2694 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2695 break;
2696 }
2697 /* fallthrough */
2698 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2699 if ((card->info.guestlan) ||
2700 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2701 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2702 card->info.mcl_level[0]];
2703 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2704 card->info.mcl_level[1]];
2705 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2706 card->info.mcl_level[2]];
2707 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2708 card->info.mcl_level[3]];
2709 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2710 }
2711 break;
2712 default:
2713 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2714 }
2715 if (card->info.portname_required)
2716 qeth_print_status_with_portname(card);
2717 else
2718 qeth_print_status_no_portname(card);
2719}
2720EXPORT_SYMBOL_GPL(qeth_print_status_message);
2721
4a71df50
FB		 2722static void qeth_initialize_working_pool_list(struct qeth_card *card)
2723{
2724 struct qeth_buffer_pool_entry *entry;
2725
847a50fd 2726 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2727
2728 list_for_each_entry(entry,
2729 &card->qdio.init_pool.entry_list, init_list) {
2730 qeth_put_buffer_pool_entry(card, entry);
2731 }
2732}
2733
2734static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2735 struct qeth_card *card)
2736{
2737 struct list_head *plh;
2738 struct qeth_buffer_pool_entry *entry;
2739 int i, free;
2740 struct page *page;
2741
2742 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2743 return NULL;
2744
2745 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2746 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2747 free = 1;
2748 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2749 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2750 free = 0;
2751 break;
2752 }
2753 }
2754 if (free) {
2755 list_del_init(&entry->list);
2756 return entry;
2757 }
2758 }
2759
2760 /* no free buffer in pool so take first one and swap pages */
2761 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2762 struct qeth_buffer_pool_entry, list);
2763 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2764 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2765 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2766 if (!page) {
2767 return NULL;
2768 } else {
2769 free_page((unsigned long)entry->elements[i]);
2770 entry->elements[i] = page_address(page);
2771 if (card->options.performance_stats)
2772 card->perf_stats.sg_alloc_page_rx++;
2773 }
2774 }
2775 }
2776 list_del_init(&entry->list);
2777 return entry;
2778}
2779
2780static int qeth_init_input_buffer(struct qeth_card *card,
2781 struct qeth_qdio_buffer *buf)
2782{
2783 struct qeth_buffer_pool_entry *pool_entry;
2784 int i;
2785
b3332930
FB		 2786 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2787 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2788 if (!buf->rx_skb)
2789 return 1;
2790 }
2791
4a71df50
FB		 2792 pool_entry = qeth_find_free_buffer_pool_entry(card);
2793 if (!pool_entry)
2794 return 1;
2795
2796 /*
2797 * since the buffer is accessed only from the input_tasklet
2798 * there shouldn't be a need to synchronize; also, since we use
2799 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2800 * buffers
2801 */
4a71df50
FB		 2802
2803 buf->pool_entry = pool_entry;
2804 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2805 buf->buffer->element[i].length = PAGE_SIZE;
2806 buf->buffer->element[i].addr = pool_entry->elements[i];
2807 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2808 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2809 else
3ec90878
JG		 2810 buf->buffer->element[i].eflags = 0;
2811 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2812 }
2813 return 0;
2814}
2815
2816int qeth_init_qdio_queues(struct qeth_card *card)
2817{
2818 int i, j;
2819 int rc;
2820
d11ba0c4 2821 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2822
2823 /* inbound queue */
6d284bde
SO		 2824 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2825 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2826 qeth_initialize_working_pool_list(card);
2827 /*give only as many buffers to hardware as we have buffer pool entries*/
2828 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2829 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2830 card->qdio.in_q->next_buf_to_init =
2831 card->qdio.in_buf_pool.buf_count - 1;
2832 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2833 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2834 if (rc) {
d11ba0c4 2835 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2836 return rc;
2837 }
0da9581d
EL		 2838
2839 /* completion */
2840 rc = qeth_cq_init(card);
2841 if (rc) {
2842 return rc;
2843 }
2844
4a71df50
FB		 2845 /* outbound queue */
2846 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2847 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2848 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2849 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2850 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2851 card->qdio.out_qs[i]->bufs[j],
2852 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2853 }
2854 card->qdio.out_qs[i]->card = card;
2855 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2856 card->qdio.out_qs[i]->do_pack = 0;
2857 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2858 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2859 atomic_set(&card->qdio.out_qs[i]->state,
2860 QETH_OUT_Q_UNLOCKED);
2861 }
2862 return 0;
2863}
2864EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2865
2866static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2867{
2868 switch (link_type) {
2869 case QETH_LINK_TYPE_HSTR:
2870 return 2;
2871 default:
2872 return 1;
2873 }
2874}
2875
2876static void qeth_fill_ipacmd_header(struct qeth_card *card,
2877 struct qeth_ipa_cmd *cmd, __u8 command,
2878 enum qeth_prot_versions prot)
2879{
2880 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2881 cmd->hdr.command = command;
2882 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2883 cmd->hdr.seqno = card->seqno.ipa;
2884 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2885 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2886 if (card->options.layer2)
2887 cmd->hdr.prim_version_no = 2;
2888 else
2889 cmd->hdr.prim_version_no = 1;
2890 cmd->hdr.param_count = 1;
2891 cmd->hdr.prot_version = prot;
2892 cmd->hdr.ipa_supported = 0;
2893 cmd->hdr.ipa_enabled = 0;
2894}
2895
2896struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2897 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2898{
2899 struct qeth_cmd_buffer *iob;
2900 struct qeth_ipa_cmd *cmd;
2901
2902 iob = qeth_wait_for_buffer(&card->write);
2903 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2904 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2905
2906 return iob;
2907}
2908EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2909
2910void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2911 char prot_type)
2912{
2913 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2914 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2915 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2916 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2917}
2918EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2919
2920int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2921 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2922 unsigned long),
2923 void *reply_param)
2924{
2925 int rc;
2926 char prot_type;
4a71df50 2927
847a50fd 2928 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2929
2930 if (card->options.layer2)
2931 if (card->info.type == QETH_CARD_TYPE_OSN)
2932 prot_type = QETH_PROT_OSN2;
2933 else
2934 prot_type = QETH_PROT_LAYER2;
2935 else
2936 prot_type = QETH_PROT_TCPIP;
2937 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2938 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2939 iob, reply_cb, reply_param);
908abbb5
UB		 2940 if (rc == -ETIME) {
2941 qeth_clear_ipacmd_list(card);
2942 qeth_schedule_recovery(card);
2943 }
4a71df50
FB		 2944 return rc;
2945}
2946EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2947
4a71df50
FB		 2948int qeth_send_startlan(struct qeth_card *card)
2949{
2950 int rc;
70919e23 2951 struct qeth_cmd_buffer *iob;
4a71df50 2952
d11ba0c4 2953 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2954
70919e23
UB		 2955 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2956 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2957 return rc;
2958}
2959EXPORT_SYMBOL_GPL(qeth_send_startlan);
2960
eb3fb0ba 2961static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2962 struct qeth_reply *reply, unsigned long data)
2963{
2964 struct qeth_ipa_cmd *cmd;
2965
847a50fd 2966 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2967
2968 cmd = (struct qeth_ipa_cmd *) data;
2969 if (cmd->hdr.return_code == 0)
2970 cmd->hdr.return_code =
2971 cmd->data.setadapterparms.hdr.return_code;
2972 return 0;
2973}
4a71df50
FB		 2974
2975static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2976 struct qeth_reply *reply, unsigned long data)
2977{
2978 struct qeth_ipa_cmd *cmd;
2979
847a50fd 2980 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2981
2982 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2983 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2984 card->info.link_type =
2985 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2986 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2987 }
4a71df50
FB		 2988 card->options.adp.supported_funcs =
2989 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2990 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2991}
2992
eb3fb0ba 2993static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2994 __u32 command, __u32 cmdlen)
2995{
2996 struct qeth_cmd_buffer *iob;
2997 struct qeth_ipa_cmd *cmd;
2998
2999 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3000 QETH_PROT_IPV4);
3001 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3002 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3003 cmd->data.setadapterparms.hdr.command_code = command;
3004 cmd->data.setadapterparms.hdr.used_total = 1;
3005 cmd->data.setadapterparms.hdr.seq_no = 1;
3006
3007 return iob;
3008}
4a71df50
FB		 3009
3010int qeth_query_setadapterparms(struct qeth_card *card)
3011{
3012 int rc;
3013 struct qeth_cmd_buffer *iob;
3014
847a50fd 3015 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3016 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3017 sizeof(struct qeth_ipacmd_setadpparms));
3018 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3019 return rc;
3020}
3021EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3022
1da74b1c
FB		 3023static int qeth_query_ipassists_cb(struct qeth_card *card,
3024 struct qeth_reply *reply, unsigned long data)
3025{
3026 struct qeth_ipa_cmd *cmd;
3027
3028 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3029
3030 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3031
3032 switch (cmd->hdr.return_code) {
3033 case IPA_RC_NOTSUPP:
3034 case IPA_RC_L2_UNSUPPORTED_CMD:
3035 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3036 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3037 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3038 return -0;
3039 default:
3040 if (cmd->hdr.return_code) {
3041 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3042 "rc=%d\n",
3043 dev_name(&card->gdev->dev),
3044 cmd->hdr.return_code);
3045 return 0;
3046 }
3047 }
3048
1da74b1c
FB		 3049 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3050 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3051 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3052 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3053 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3054 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3055 } else
3056 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3057 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3058 return 0;
3059}
3060
3061int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3062{
3063 int rc;
3064 struct qeth_cmd_buffer *iob;
3065
3066 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3067 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
3068 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3069 return rc;
3070}
3071EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3072
45cbb2e4
SR		 3073static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3074 struct qeth_reply *reply, unsigned long data)
3075{
3076 struct qeth_ipa_cmd *cmd;
3077 struct qeth_switch_info *sw_info;
3078 struct qeth_query_switch_attributes *attrs;
3079
3080 QETH_CARD_TEXT(card, 2, "qswiatcb");
3081 cmd = (struct qeth_ipa_cmd *) data;
3082 sw_info = (struct qeth_switch_info *)reply->param;
3083 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3084 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3085 sw_info->capabilities = attrs->capabilities;
3086 sw_info->settings = attrs->settings;
3087 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3088 sw_info->settings);
3089 }
3090 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3091
3092 return 0;
3093}
3094
3095int qeth_query_switch_attributes(struct qeth_card *card,
3096 struct qeth_switch_info *sw_info)
3097{
3098 struct qeth_cmd_buffer *iob;
3099
3100 QETH_CARD_TEXT(card, 2, "qswiattr");
3101 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3102 return -EOPNOTSUPP;
3103 if (!netif_carrier_ok(card->dev))
3104 return -ENOMEDIUM;
3105 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3106 sizeof(struct qeth_ipacmd_setadpparms_hdr));
3107 return qeth_send_ipa_cmd(card, iob,
3108 qeth_query_switch_attributes_cb, sw_info);
3109}
3110EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3111
1da74b1c
FB		 3112static int qeth_query_setdiagass_cb(struct qeth_card *card,
3113 struct qeth_reply *reply, unsigned long data)
3114{
3115 struct qeth_ipa_cmd *cmd;
3116 __u16 rc;
3117
3118 cmd = (struct qeth_ipa_cmd *)data;
3119 rc = cmd->hdr.return_code;
3120 if (rc)
3121 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3122 else
3123 card->info.diagass_support = cmd->data.diagass.ext;
3124 return 0;
3125}
3126
3127static int qeth_query_setdiagass(struct qeth_card *card)
3128{
3129 struct qeth_cmd_buffer *iob;
3130 struct qeth_ipa_cmd *cmd;
3131
3132 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3133 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3134 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3135 cmd->data.diagass.subcmd_len = 16;
3136 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3137 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3138}
3139
3140static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3141{
3142 unsigned long info = get_zeroed_page(GFP_KERNEL);
3143 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3144 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3145 struct ccw_dev_id ccwid;
caf757c6 3146 int level;
1da74b1c
FB		 3147
3148 tid->chpid = card->info.chpid;
3149 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3150 tid->ssid = ccwid.ssid;
3151 tid->devno = ccwid.devno;
3152 if (!info)
3153 return;
caf757c6
HC		 3154 level = stsi(NULL, 0, 0, 0);
3155 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3156 tid->lparnr = info222->lpar_number;
caf757c6 3157 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3158 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3159 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3160 }
3161 free_page(info);
3162 return;
3163}
3164
3165static int qeth_hw_trap_cb(struct qeth_card *card,
3166 struct qeth_reply *reply, unsigned long data)
3167{
3168 struct qeth_ipa_cmd *cmd;
3169 __u16 rc;
3170
3171 cmd = (struct qeth_ipa_cmd *)data;
3172 rc = cmd->hdr.return_code;
3173 if (rc)
3174 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3175 return 0;
3176}
3177
3178int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3179{
3180 struct qeth_cmd_buffer *iob;
3181 struct qeth_ipa_cmd *cmd;
3182
3183 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3184 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3185 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3186 cmd->data.diagass.subcmd_len = 80;
3187 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3188 cmd->data.diagass.type = 1;
3189 cmd->data.diagass.action = action;
3190 switch (action) {
3191 case QETH_DIAGS_TRAP_ARM:
3192 cmd->data.diagass.options = 0x0003;
3193 cmd->data.diagass.ext = 0x00010000 +
3194 sizeof(struct qeth_trap_id);
3195 qeth_get_trap_id(card,
3196 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3197 break;
3198 case QETH_DIAGS_TRAP_DISARM:
3199 cmd->data.diagass.options = 0x0001;
3200 break;
3201 case QETH_DIAGS_TRAP_CAPTURE:
3202 break;
3203 }
3204 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3205}
3206EXPORT_SYMBOL_GPL(qeth_hw_trap);
3207
76b11f8e
UB		 3208int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3209 unsigned int qdio_error, const char *dbftext)
4a71df50 3210{
779e6e1c 3211 if (qdio_error) {
847a50fd 3212 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3213 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3214 buf->element[15].sflags);
38593d01 3215 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3216 buf->element[14].sflags);
38593d01 3217 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3218 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3219 card->stats.rx_dropped++;
3220 return 0;
3221 } else
3222 return 1;
4a71df50
FB		 3223 }
3224 return 0;
3225}
3226EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3227
b3332930
FB		 3228void qeth_buffer_reclaim_work(struct work_struct *work)
3229{
3230 struct qeth_card *card = container_of(work, struct qeth_card,
3231 buffer_reclaim_work.work);
3232
3233 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3234 qeth_queue_input_buffer(card, card->reclaim_index);
3235}
3236
4a71df50
FB		 3237void qeth_queue_input_buffer(struct qeth_card *card, int index)
3238{
3239 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3240 struct list_head *lh;
4a71df50
FB		 3241 int count;
3242 int i;
3243 int rc;
3244 int newcount = 0;
3245
4a71df50
FB		 3246 count = (index < queue->next_buf_to_init)?
3247 card->qdio.in_buf_pool.buf_count -
3248 (queue->next_buf_to_init - index) :
3249 card->qdio.in_buf_pool.buf_count -
3250 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3251 /* only requeue at a certain threshold to avoid SIGAs */
3252 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3253 for (i = queue->next_buf_to_init;
3254 i < queue->next_buf_to_init + count; ++i) {
3255 if (qeth_init_input_buffer(card,
3256 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3257 break;
3258 } else {
3259 newcount++;
3260 }
3261 }
3262
3263 if (newcount < count) {
3264 /* we are in memory shortage so we switch back to
3265 traditional skb allocation and drop packages */
4a71df50
FB		 3266 atomic_set(&card->force_alloc_skb, 3);
3267 count = newcount;
3268 } else {
4a71df50
FB		 3269 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3270 }
3271
b3332930
FB		 3272 if (!count) {
3273 i = 0;
3274 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3275 i++;
3276 if (i == card->qdio.in_buf_pool.buf_count) {
3277 QETH_CARD_TEXT(card, 2, "qsarbw");
3278 card->reclaim_index = index;
3279 schedule_delayed_work(
3280 &card->buffer_reclaim_work,
3281 QETH_RECLAIM_WORK_TIME);
3282 }
3283 return;
3284 }
3285
4a71df50
FB		 3286 /*
3287 * according to old code it should be avoided to requeue all
3288 * 128 buffers in order to benefit from PCI avoidance.
3289 * this function keeps at least one buffer (the buffer at
3290 * 'index') un-requeued -> this buffer is the first buffer that
3291 * will be requeued the next time
3292 */
3293 if (card->options.performance_stats) {
3294 card->perf_stats.inbound_do_qdio_cnt++;
3295 card->perf_stats.inbound_do_qdio_start_time =
3296 qeth_get_micros();
3297 }
779e6e1c
JG		 3298 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3299 queue->next_buf_to_init, count);
4a71df50
FB		 3300 if (card->options.performance_stats)
3301 card->perf_stats.inbound_do_qdio_time +=
3302 qeth_get_micros() -
3303 card->perf_stats.inbound_do_qdio_start_time;
3304 if (rc) {
847a50fd 3305 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3306 }
3307 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3308 QDIO_MAX_BUFFERS_PER_Q;
3309 }
3310}
3311EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3312
3313static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3314 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3315{
3ec90878 3316 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3317
847a50fd 3318 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3319 if (card->info.type == QETH_CARD_TYPE_IQD) {
3320 if (sbalf15 == 0) {
3321 qdio_err = 0;
3322 } else {
3323 qdio_err = 1;
3324 }
3325 }
76b11f8e 3326 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3327
3328 if (!qdio_err)
4a71df50 3329 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3330
3331 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3332 return QETH_SEND_ERROR_RETRY;
3333
847a50fd
CO		 3334 QETH_CARD_TEXT(card, 1, "lnkfail");
3335 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3336 (u16)qdio_err, (u8)sbalf15);
3337 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3338}
3339
3340/*
3341 * Switched to packing state if the number of used buffers on a queue
3342 * reaches a certain limit.
3343 */
3344static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3345{
3346 if (!queue->do_pack) {
3347 if (atomic_read(&queue->used_buffers)
3348 >= QETH_HIGH_WATERMARK_PACK){
3349 /* switch non-PACKING -> PACKING */
847a50fd 3350 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3351 if (queue->card->options.performance_stats)
3352 queue->card->perf_stats.sc_dp_p++;
3353 queue->do_pack = 1;
3354 }
3355 }
3356}
3357
3358/*
3359 * Switches from packing to non-packing mode. If there is a packing
3360 * buffer on the queue this buffer will be prepared to be flushed.
3361 * In that case 1 is returned to inform the caller. If no buffer
3362 * has to be flushed, zero is returned.
3363 */
3364static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3365{
3366 struct qeth_qdio_out_buffer *buffer;
3367 int flush_count = 0;
3368
3369 if (queue->do_pack) {
3370 if (atomic_read(&queue->used_buffers)
3371 <= QETH_LOW_WATERMARK_PACK) {
3372 /* switch PACKING -> non-PACKING */
847a50fd 3373 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3374 if (queue->card->options.performance_stats)
3375 queue->card->perf_stats.sc_p_dp++;
3376 queue->do_pack = 0;
3377 /* flush packing buffers */
0da9581d 3378 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3379 if ((atomic_read(&buffer->state) ==
3380 QETH_QDIO_BUF_EMPTY) &&
3381 (buffer->next_element_to_fill > 0)) {
3382 atomic_set(&buffer->state,
0da9581d 3383 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3384 flush_count++;
3385 queue->next_buf_to_fill =
3386 (queue->next_buf_to_fill + 1) %
3387 QDIO_MAX_BUFFERS_PER_Q;
3388 }
3389 }
3390 }
3391 return flush_count;
3392}
3393
0da9581d 3394
4a71df50
FB		 3395/*
3396 * Called to flush a packing buffer if no more pci flags are on the queue.
3397 * Checks if there is a packing buffer and prepares it to be flushed.
3398 * In that case returns 1, otherwise zero.
3399 */
3400static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3401{
3402 struct qeth_qdio_out_buffer *buffer;
3403
0da9581d 3404 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3405 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3406 (buffer->next_element_to_fill > 0)) {
3407 /* it's a packing buffer */
3408 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3409 queue->next_buf_to_fill =
3410 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3411 return 1;
3412 }
3413 return 0;
3414}
3415
779e6e1c
JG		 3416static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3417 int count)
4a71df50
FB		 3418{
3419 struct qeth_qdio_out_buffer *buf;
3420 int rc;
3421 int i;
3422 unsigned int qdio_flags;
3423
4a71df50 3424 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3425 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3426 buf = queue->bufs[bidx];
3ec90878
JG		 3427 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3428 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3429
0da9581d
EL		 3430 if (queue->bufstates)
3431 queue->bufstates[bidx].user = buf;
3432
4a71df50
FB		 3433 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3434 continue;
3435
3436 if (!queue->do_pack) {
3437 if ((atomic_read(&queue->used_buffers) >=
3438 (QETH_HIGH_WATERMARK_PACK -
3439 QETH_WATERMARK_PACK_FUZZ)) &&
3440 !atomic_read(&queue->set_pci_flags_count)) {
3441 /* it's likely that we'll go to packing
3442 * mode soon */
3443 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3444 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3445 }
3446 } else {
3447 if (!atomic_read(&queue->set_pci_flags_count)) {
3448 /*
3449 * there's no outstanding PCI any more, so we
3450 * have to request a PCI to be sure the the PCI
3451 * will wake at some time in the future then we
3452 * can flush packed buffers that might still be
3453 * hanging around, which can happen if no
3454 * further send was requested by the stack
3455 */
3456 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3457 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3458 }
3459 }
3460 }
3461
3462 queue->card->dev->trans_start = jiffies;
3463 if (queue->card->options.performance_stats) {
3464 queue->card->perf_stats.outbound_do_qdio_cnt++;
3465 queue->card->perf_stats.outbound_do_qdio_start_time =
3466 qeth_get_micros();
3467 }
3468 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3469 if (atomic_read(&queue->set_pci_flags_count))
3470 qdio_flags |= QDIO_FLAG_PCI_OUT;
3471 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3472 queue->queue_no, index, count);
4a71df50
FB		 3473 if (queue->card->options.performance_stats)
3474 queue->card->perf_stats.outbound_do_qdio_time +=
3475 qeth_get_micros() -
3476 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3477 atomic_add(count, &queue->used_buffers);
4a71df50 3478 if (rc) {
d303b6fd
JG		 3479 queue->card->stats.tx_errors += count;
3480 /* ignore temporary SIGA errors without busy condition */
1549d13f 3481 if (rc == -ENOBUFS)
d303b6fd 3482 return;
847a50fd 3483 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3484 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3485 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3486 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3487 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3488
4a71df50
FB		 3489 /* this must not happen under normal circumstances. if it
3490 * happens something is really wrong -> recover */
3491 qeth_schedule_recovery(queue->card);
3492 return;
3493 }
4a71df50
FB		 3494 if (queue->card->options.performance_stats)
3495 queue->card->perf_stats.bufs_sent += count;
3496}
3497
3498static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3499{
3500 int index;
3501 int flush_cnt = 0;
3502 int q_was_packing = 0;
3503
3504 /*
3505 * check if weed have to switch to non-packing mode or if
3506 * we have to get a pci flag out on the queue
3507 */
3508 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3509 !atomic_read(&queue->set_pci_flags_count)) {
3510 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3511 QETH_OUT_Q_UNLOCKED) {
3512 /*
3513 * If we get in here, there was no action in
3514 * do_send_packet. So, we check if there is a
3515 * packing buffer to be flushed here.
3516 */
3517 netif_stop_queue(queue->card->dev);
3518 index = queue->next_buf_to_fill;
3519 q_was_packing = queue->do_pack;
3520 /* queue->do_pack may change */
3521 barrier();
3522 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3523 if (!flush_cnt &&
3524 !atomic_read(&queue->set_pci_flags_count))
3525 flush_cnt +=
3526 qeth_flush_buffers_on_no_pci(queue);
3527 if (queue->card->options.performance_stats &&
3528 q_was_packing)
3529 queue->card->perf_stats.bufs_sent_pack +=
3530 flush_cnt;
3531 if (flush_cnt)
779e6e1c 3532 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3533 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3534 }
3535 }
3536}
3537
a1c3ed4c
FB		 3538void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3539 unsigned long card_ptr)
3540{
3541 struct qeth_card *card = (struct qeth_card *)card_ptr;
3542
0cffef48 3543 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3544 napi_schedule(&card->napi);
3545}
3546EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3547
0da9581d
EL		 3548int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3549{
3550 int rc;
3551
3552 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3553 rc = -1;
3554 goto out;
3555 } else {
3556 if (card->options.cq == cq) {
3557 rc = 0;
3558 goto out;
3559 }
3560
3561 if (card->state != CARD_STATE_DOWN &&
3562 card->state != CARD_STATE_RECOVER) {
3563 rc = -1;
3564 goto out;
3565 }
3566
3567 qeth_free_qdio_buffers(card);
3568 card->options.cq = cq;
3569 rc = 0;
3570 }
3571out:
3572 return rc;
3573
3574}
3575EXPORT_SYMBOL_GPL(qeth_configure_cq);
3576
3577
3578static void qeth_qdio_cq_handler(struct qeth_card *card,
3579 unsigned int qdio_err,
3580 unsigned int queue, int first_element, int count) {
3581 struct qeth_qdio_q *cq = card->qdio.c_q;
3582 int i;
3583 int rc;
3584
3585 if (!qeth_is_cq(card, queue))
3586 goto out;
3587
3588 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3589 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3590 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3591
3592 if (qdio_err) {
3593 netif_stop_queue(card->dev);
3594 qeth_schedule_recovery(card);
3595 goto out;
3596 }
3597
3598 if (card->options.performance_stats) {
3599 card->perf_stats.cq_cnt++;
3600 card->perf_stats.cq_start_time = qeth_get_micros();
3601 }
3602
3603 for (i = first_element; i < first_element + count; ++i) {
3604 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3605 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3606 int e;
3607
3608 e = 0;
3609 while (buffer->element[e].addr) {
3610 unsigned long phys_aob_addr;
3611
3612 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3613 qeth_qdio_handle_aob(card, phys_aob_addr);
3614 buffer->element[e].addr = NULL;
3615 buffer->element[e].eflags = 0;
3616 buffer->element[e].sflags = 0;
3617 buffer->element[e].length = 0;
3618
3619 ++e;
3620 }
3621
3622 buffer->element[15].eflags = 0;
3623 buffer->element[15].sflags = 0;
3624 }
3625 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3626 card->qdio.c_q->next_buf_to_init,
3627 count);
3628 if (rc) {
3629 dev_warn(&card->gdev->dev,
3630 "QDIO reported an error, rc=%i\n", rc);
3631 QETH_CARD_TEXT(card, 2, "qcqherr");
3632 }
3633 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3634 + count) % QDIO_MAX_BUFFERS_PER_Q;
3635
3636 netif_wake_queue(card->dev);
3637
3638 if (card->options.performance_stats) {
3639 int delta_t = qeth_get_micros();
3640 delta_t -= card->perf_stats.cq_start_time;
3641 card->perf_stats.cq_time += delta_t;
3642 }
3643out:
3644 return;
3645}
3646
a1c3ed4c 3647void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3648 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3649 unsigned long card_ptr)
3650{
3651 struct qeth_card *card = (struct qeth_card *)card_ptr;
3652
0da9581d
EL		 3653 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3654 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3655
3656 if (qeth_is_cq(card, queue))
3657 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3658 else if (qdio_err)
a1c3ed4c 3659 qeth_schedule_recovery(card);
0da9581d
EL		 3660
3661
a1c3ed4c
FB		 3662}
3663EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3664
779e6e1c
JG		 3665void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3666 unsigned int qdio_error, int __queue, int first_element,
3667 int count, unsigned long card_ptr)
4a71df50
FB		 3668{
3669 struct qeth_card *card = (struct qeth_card *) card_ptr;
3670 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3671 struct qeth_qdio_out_buffer *buffer;
3672 int i;
3673
847a50fd 3674 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3675 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3676 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3677 netif_stop_queue(card->dev);
3678 qeth_schedule_recovery(card);
3679 return;
4a71df50
FB		 3680 }
3681 if (card->options.performance_stats) {
3682 card->perf_stats.outbound_handler_cnt++;
3683 card->perf_stats.outbound_handler_start_time =
3684 qeth_get_micros();
3685 }
3686 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3687 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3688 buffer = queue->bufs[bidx];
b67d801f 3689 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3690
3691 if (queue->bufstates &&
3692 (queue->bufstates[bidx].flags &
3693 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3694 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3695
3696 if (atomic_cmpxchg(&buffer->state,
3697 QETH_QDIO_BUF_PRIMED,
3698 QETH_QDIO_BUF_PENDING) ==
3699 QETH_QDIO_BUF_PRIMED) {
3700 qeth_notify_skbs(queue, buffer,
3701 TX_NOTIFY_PENDING);
3702 }
0da9581d
EL		 3703 buffer->aob = queue->bufstates[bidx].aob;
3704 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3705 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3706 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3707 virt_to_phys(buffer->aob));
b3332930
FB		 3708 if (qeth_init_qdio_out_buf(queue, bidx)) {
3709 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3710 qeth_schedule_recovery(card);
b3332930 3711 }
0da9581d 3712 } else {
b3332930
FB		 3713 if (card->options.cq == QETH_CQ_ENABLED) {
3714 enum iucv_tx_notify n;
3715
3716 n = qeth_compute_cq_notification(
3717 buffer->buffer->element[15].sflags, 0);
3718 qeth_notify_skbs(queue, buffer, n);
3719 }
3720
0da9581d
EL		 3721 qeth_clear_output_buffer(queue, buffer,
3722 QETH_QDIO_BUF_EMPTY);
3723 }
3724 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3725 }
3726 atomic_sub(count, &queue->used_buffers);
3727 /* check if we need to do something on this outbound queue */
3728 if (card->info.type != QETH_CARD_TYPE_IQD)
3729 qeth_check_outbound_queue(queue);
3730
3731 netif_wake_queue(queue->card->dev);
3732 if (card->options.performance_stats)
3733 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3734 card->perf_stats.outbound_handler_start_time;
3735}
3736EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3737
290b8348
SR		 3738/**
3739 * Note: Function assumes that we have 4 outbound queues.
3740 */
4a71df50
FB		 3741int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3742 int ipv, int cast_type)
3743{
d66cb37e 3744 __be16 *tci;
290b8348
SR		 3745 u8 tos;
3746
290b8348
SR		 3747 if (cast_type && card->info.is_multicast_different)
3748 return card->info.is_multicast_different &
3749 (card->qdio.no_out_queues - 1);
3750
3751 switch (card->qdio.do_prio_queueing) {
3752 case QETH_PRIO_Q_ING_TOS:
3753 case QETH_PRIO_Q_ING_PREC:
3754 switch (ipv) {
3755 case 4:
3756 tos = ipv4_get_dsfield(ip_hdr(skb));
3757 break;
3758 case 6:
3759 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3760 break;
3761 default:
3762 return card->qdio.default_out_queue;
4a71df50 3763 }
290b8348
SR		 3764 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
3765 return ~tos >> 6 & 3;
3766 if (tos & IPTOS_MINCOST)
3767 return 3;
3768 if (tos & IPTOS_RELIABILITY)
3769 return 2;
3770 if (tos & IPTOS_THROUGHPUT)
3771 return 1;
3772 if (tos & IPTOS_LOWDELAY)
3773 return 0;
d66cb37e
SR		 3774 break;
3775 case QETH_PRIO_Q_ING_SKB:
3776 if (skb->priority > 5)
3777 return 0;
3778 return ~skb->priority >> 1 & 3;
3779 case QETH_PRIO_Q_ING_VLAN:
3780 tci = &((struct ethhdr *)skb->data)->h_proto;
3781 if (*tci == ETH_P_8021Q)
3782 return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3;
3783 break;
4a71df50 3784 default:
290b8348 3785 break;
4a71df50 3786 }
290b8348 3787 return card->qdio.default_out_queue;
4a71df50
FB		 3788}
3789EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3790
271648b4
FB		 3791int qeth_get_elements_for_frags(struct sk_buff *skb)
3792{
3793 int cnt, length, e, elements = 0;
3794 struct skb_frag_struct *frag;
3795 char *data;
3796
3797 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3798 frag = &skb_shinfo(skb)->frags[cnt];
3799 data = (char *)page_to_phys(skb_frag_page(frag)) +
3800 frag->page_offset;
3801 length = frag->size;
3802 e = PFN_UP((unsigned long)data + length - 1) -
3803 PFN_DOWN((unsigned long)data);
3804 elements += e;
3805 }
3806 return elements;
3807}
3808EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3809
065cc782 3810int qeth_get_elements_no(struct qeth_card *card,
4a71df50
FB		 3811 struct sk_buff *skb, int elems)
3812{
51aa165c
FB		 3813 int dlen = skb->len - skb->data_len;
3814 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3815 PFN_DOWN((unsigned long)skb->data);
4a71df50 3816
271648b4
FB		 3817 elements_needed += qeth_get_elements_for_frags(skb);
3818
4a71df50 3819 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3820 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3821 "(Number=%d / Length=%d). Discarded.\n",
3822 (elements_needed+elems), skb->len);
3823 return 0;
3824 }
3825 return elements_needed;
3826}
3827EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3828
d4ae1f5e 3829int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3830{
3831 int hroom, inpage, rest;
3832
3833 if (((unsigned long)skb->data & PAGE_MASK) !=
3834 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3835 hroom = skb_headroom(skb);
3836 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3837 rest = len - inpage;
3838 if (rest > hroom)
3839 return 1;
3840 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3841 skb->data -= rest;
d4ae1f5e
SR		 3842 skb->tail -= rest;
3843 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3844 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3845 }
3846 return 0;
3847}
3848EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3849
f90b744e 3850static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3851 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3852 int offset)
4a71df50 3853{
51aa165c 3854 int length = skb->len - skb->data_len;
4a71df50
FB		 3855 int length_here;
3856 int element;
3857 char *data;
51aa165c
FB		 3858 int first_lap, cnt;
3859 struct skb_frag_struct *frag;
4a71df50
FB		 3860
3861 element = *next_element_to_fill;
3862 data = skb->data;
3863 first_lap = (is_tso == 0 ? 1 : 0);
3864
683d718a
FB		 3865 if (offset >= 0) {
3866 data = skb->data + offset;
e1f03ae8 3867 length -= offset;
683d718a
FB		 3868 first_lap = 0;
3869 }
3870
4a71df50
FB		 3871 while (length > 0) {
3872 /* length_here is the remaining amount of data in this page */
3873 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3874 if (length < length_here)
3875 length_here = length;
3876
3877 buffer->element[element].addr = data;
3878 buffer->element[element].length = length_here;
3879 length -= length_here;
3880 if (!length) {
3881 if (first_lap)
51aa165c 3882 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3883 buffer->element[element].eflags =
3884 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3885 else
3ec90878 3886 buffer->element[element].eflags = 0;
4a71df50 3887 else
3ec90878
JG		 3888 buffer->element[element].eflags =
3889 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3890 } else {
3891 if (first_lap)
3ec90878
JG		 3892 buffer->element[element].eflags =
3893 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3894 else
3ec90878
JG		 3895 buffer->element[element].eflags =
3896 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3897 }
3898 data += length_here;
3899 element++;
3900 first_lap = 0;
3901 }
51aa165c
FB		 3902
3903 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3904 frag = &skb_shinfo(skb)->frags[cnt];
271648b4
FB		 3905 data = (char *)page_to_phys(skb_frag_page(frag)) +
3906 frag->page_offset;
3907 length = frag->size;
3908 while (length > 0) {
3909 length_here = PAGE_SIZE -
3910 ((unsigned long) data % PAGE_SIZE);
3911 if (length < length_here)
3912 length_here = length;
3913
3914 buffer->element[element].addr = data;
3915 buffer->element[element].length = length_here;
3916 buffer->element[element].eflags =
3917 SBAL_EFLAGS_MIDDLE_FRAG;
3918 length -= length_here;
3919 data += length_here;
3920 element++;
3921 }
51aa165c
FB		 3922 }
3923
3ec90878
JG		 3924 if (buffer->element[element - 1].eflags)
3925 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3926 *next_element_to_fill = element;
3927}
3928
f90b744e 3929static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3930 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3931 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3932{
3933 struct qdio_buffer *buffer;
4a71df50
FB		 3934 int flush_cnt = 0, hdr_len, large_send = 0;
3935
4a71df50
FB		 3936 buffer = buf->buffer;
3937 atomic_inc(&skb->users);
3938 skb_queue_tail(&buf->skb_list, skb);
3939
4a71df50 3940 /*check first on TSO ....*/
683d718a 3941 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3942 int element = buf->next_element_to_fill;
3943
683d718a
FB		 3944 hdr_len = sizeof(struct qeth_hdr_tso) +
3945 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3946 /*fill first buffer entry only with header information */
3947 buffer->element[element].addr = skb->data;
3948 buffer->element[element].length = hdr_len;
3ec90878 3949 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3950 buf->next_element_to_fill++;
3951 skb->data += hdr_len;
3952 skb->len -= hdr_len;
3953 large_send = 1;
3954 }
683d718a
FB		 3955
3956 if (offset >= 0) {
3957 int element = buf->next_element_to_fill;
3958 buffer->element[element].addr = hdr;
3959 buffer->element[element].length = sizeof(struct qeth_hdr) +
3960 hd_len;
3ec90878 3961 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3962 buf->is_header[element] = 1;
3963 buf->next_element_to_fill++;
3964 }
3965
51aa165c
FB		 3966 __qeth_fill_buffer(skb, buffer, large_send,
3967 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3968
3969 if (!queue->do_pack) {
847a50fd 3970 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3971 /* set state to PRIMED -> will be flushed */
3972 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3973 flush_cnt = 1;
3974 } else {
847a50fd 3975 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3976 if (queue->card->options.performance_stats)
3977 queue->card->perf_stats.skbs_sent_pack++;
3978 if (buf->next_element_to_fill >=
3979 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3980 /*
3981 * packed buffer if full -> set state PRIMED
3982 * -> will be flushed
3983 */
3984 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3985 flush_cnt = 1;
3986 }
3987 }
3988 return flush_cnt;
3989}
3990
3991int qeth_do_send_packet_fast(struct qeth_card *card,
3992 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3993 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3994 int offset, int hd_len)
4a71df50
FB		 3995{
3996 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3997 int index;
3998
4a71df50
FB		 3999 /* spin until we get the queue ... */
4000 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4001 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4002 /* ... now we've got the queue */
4003 index = queue->next_buf_to_fill;
0da9581d 4004 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4005 /*
4006 * check if buffer is empty to make sure that we do not 'overtake'
4007 * ourselves and try to fill a buffer that is already primed
4008 */
4009 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
4010 goto out;
64ef8957 4011 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 4012 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 4013 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 4014 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4015 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 4016 return 0;
4017out:
4018 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4019 return -EBUSY;
4020}
4021EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4022
4023int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
4024 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 4025 int elements_needed)
4a71df50
FB		 4026{
4027 struct qeth_qdio_out_buffer *buffer;
4028 int start_index;
4029 int flush_count = 0;
4030 int do_pack = 0;
4031 int tmp;
4032 int rc = 0;
4033
4a71df50
FB		 4034 /* spin until we get the queue ... */
4035 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4036 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4037 start_index = queue->next_buf_to_fill;
0da9581d 4038 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4039 /*
4040 * check if buffer is empty to make sure that we do not 'overtake'
4041 * ourselves and try to fill a buffer that is already primed
4042 */
4043 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4044 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4045 return -EBUSY;
4046 }
4047 /* check if we need to switch packing state of this queue */
4048 qeth_switch_to_packing_if_needed(queue);
4049 if (queue->do_pack) {
4050 do_pack = 1;
64ef8957
FB		 4051 /* does packet fit in current buffer? */
4052 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4053 buffer->next_element_to_fill) < elements_needed) {
4054 /* ... no -> set state PRIMED */
4055 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4056 flush_count++;
4057 queue->next_buf_to_fill =
4058 (queue->next_buf_to_fill + 1) %
4059 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4060 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4061 /* we did a step forward, so check buffer state
4062 * again */
4063 if (atomic_read(&buffer->state) !=
4064 QETH_QDIO_BUF_EMPTY) {
4065 qeth_flush_buffers(queue, start_index,
779e6e1c 4066 flush_count);
64ef8957 4067 atomic_set(&queue->state,
4a71df50 4068 QETH_OUT_Q_UNLOCKED);
64ef8957 4069 return -EBUSY;
4a71df50
FB		 4070 }
4071 }
4072 }
64ef8957 4073 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 4074 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4075 QDIO_MAX_BUFFERS_PER_Q;
4076 flush_count += tmp;
4a71df50 4077 if (flush_count)
779e6e1c 4078 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4079 else if (!atomic_read(&queue->set_pci_flags_count))
4080 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4081 /*
4082 * queue->state will go from LOCKED -> UNLOCKED or from
4083 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4084 * (switch packing state or flush buffer to get another pci flag out).
4085 * In that case we will enter this loop
4086 */
4087 while (atomic_dec_return(&queue->state)) {
4088 flush_count = 0;
4089 start_index = queue->next_buf_to_fill;
4090 /* check if we can go back to non-packing state */
4091 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4092 /*
4093 * check if we need to flush a packing buffer to get a pci
4094 * flag out on the queue
4095 */
4096 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4097 flush_count += qeth_flush_buffers_on_no_pci(queue);
4098 if (flush_count)
779e6e1c 4099 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4100 }
4101 /* at this point the queue is UNLOCKED again */
4102 if (queue->card->options.performance_stats && do_pack)
4103 queue->card->perf_stats.bufs_sent_pack += flush_count;
4104
4105 return rc;
4106}
4107EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4108
4109static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4110 struct qeth_reply *reply, unsigned long data)
4111{
4112 struct qeth_ipa_cmd *cmd;
4113 struct qeth_ipacmd_setadpparms *setparms;
4114
847a50fd 4115 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4116
4117 cmd = (struct qeth_ipa_cmd *) data;
4118 setparms = &(cmd->data.setadapterparms);
4119
4120 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4121 if (cmd->hdr.return_code) {
847a50fd 4122 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 4123 setparms->data.mode = SET_PROMISC_MODE_OFF;
4124 }
4125 card->info.promisc_mode = setparms->data.mode;
4126 return 0;
4127}
4128
4129void qeth_setadp_promisc_mode(struct qeth_card *card)
4130{
4131 enum qeth_ipa_promisc_modes mode;
4132 struct net_device *dev = card->dev;
4133 struct qeth_cmd_buffer *iob;
4134 struct qeth_ipa_cmd *cmd;
4135
847a50fd 4136 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4137
4138 if (((dev->flags & IFF_PROMISC) &&
4139 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4140 (!(dev->flags & IFF_PROMISC) &&
4141 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4142 return;
4143 mode = SET_PROMISC_MODE_OFF;
4144 if (dev->flags & IFF_PROMISC)
4145 mode = SET_PROMISC_MODE_ON;
847a50fd 4146 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4147
4148 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
4149 sizeof(struct qeth_ipacmd_setadpparms));
4150 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4151 cmd->data.setadapterparms.data.mode = mode;
4152 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4153}
4154EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4155
4156int qeth_change_mtu(struct net_device *dev, int new_mtu)
4157{
4158 struct qeth_card *card;
4159 char dbf_text[15];
4160
509e2562 4161 card = dev->ml_priv;
4a71df50 4162
847a50fd 4163 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4164 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4165 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 4166
4167 if (new_mtu < 64)
4168 return -EINVAL;
4169 if (new_mtu > 65535)
4170 return -EINVAL;
4171 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4172 (!qeth_mtu_is_valid(card, new_mtu)))
4173 return -EINVAL;
4174 dev->mtu = new_mtu;
4175 return 0;
4176}
4177EXPORT_SYMBOL_GPL(qeth_change_mtu);
4178
4179struct net_device_stats *qeth_get_stats(struct net_device *dev)
4180{
4181 struct qeth_card *card;
4182
509e2562 4183 card = dev->ml_priv;
4a71df50 4184
847a50fd 4185 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4186
4187 return &card->stats;
4188}
4189EXPORT_SYMBOL_GPL(qeth_get_stats);
4190
4191static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4192 struct qeth_reply *reply, unsigned long data)
4193{
4194 struct qeth_ipa_cmd *cmd;
4195
847a50fd 4196 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4197
4198 cmd = (struct qeth_ipa_cmd *) data;
4199 if (!card->options.layer2 ||
4200 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4201 memcpy(card->dev->dev_addr,
4202 &cmd->data.setadapterparms.data.change_addr.addr,
4203 OSA_ADDR_LEN);
4204 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4205 }
4206 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4207 return 0;
4208}
4209
4210int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4211{
4212 int rc;
4213 struct qeth_cmd_buffer *iob;
4214 struct qeth_ipa_cmd *cmd;
4215
847a50fd 4216 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4217
4218 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4219 sizeof(struct qeth_ipacmd_setadpparms));
4220 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4221 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4222 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4223 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4224 card->dev->dev_addr, OSA_ADDR_LEN);
4225 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4226 NULL);
4227 return rc;
4228}
4229EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4230
d64ecc22
EL		 4231static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4232 struct qeth_reply *reply, unsigned long data)
4233{
4234 struct qeth_ipa_cmd *cmd;
4235 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4236 int fallback = *(int *)reply->param;
d64ecc22 4237
847a50fd 4238 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4239
4240 cmd = (struct qeth_ipa_cmd *) data;
4241 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4242 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4243 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4244 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4245 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4246 if (cmd->data.setadapterparms.hdr.return_code !=
4247 SET_ACCESS_CTRL_RC_SUCCESS)
4248 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4249 card->gdev->dev.kobj.name,
4250 access_ctrl_req->subcmd_code,
4251 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4252 switch (cmd->data.setadapterparms.hdr.return_code) {
4253 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4254 if (card->options.isolation == ISOLATION_MODE_NONE) {
4255 dev_info(&card->gdev->dev,
4256 "QDIO data connection isolation is deactivated\n");
4257 } else {
4258 dev_info(&card->gdev->dev,
4259 "QDIO data connection isolation is activated\n");
4260 }
d64ecc22 4261 break;
0f54761d
SR		 4262 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4263 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4264 "deactivated\n", dev_name(&card->gdev->dev));
4265 if (fallback)
4266 card->options.isolation = card->options.prev_isolation;
4267 break;
4268 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4269 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4270 " activated\n", dev_name(&card->gdev->dev));
4271 if (fallback)
4272 card->options.isolation = card->options.prev_isolation;
4273 break;
d64ecc22 4274 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4275 dev_err(&card->gdev->dev, "Adapter does not "
4276 "support QDIO data connection isolation\n");
d64ecc22 4277 break;
d64ecc22 4278 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4279 dev_err(&card->gdev->dev,
4280 "Adapter is dedicated. "
4281 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4282 if (fallback)
4283 card->options.isolation = card->options.prev_isolation;
d64ecc22 4284 break;
d64ecc22 4285 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4286 dev_err(&card->gdev->dev,
4287 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4288 if (fallback)
4289 card->options.isolation = card->options.prev_isolation;
4290 break;
4291 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4292 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4293 "support reflective relay mode\n");
4294 if (fallback)
4295 card->options.isolation = card->options.prev_isolation;
4296 break;
4297 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4298 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4299 "enabled at the adjacent switch port");
4300 if (fallback)
4301 card->options.isolation = card->options.prev_isolation;
4302 break;
4303 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4304 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4305 "at the adjacent switch failed\n");
d64ecc22 4306 break;
d64ecc22 4307 default:
d64ecc22 4308 /* this should never happen */
0f54761d
SR		 4309 if (fallback)
4310 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4311 break;
4312 }
d64ecc22 4313 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4314 return 0;
d64ecc22
EL		 4315}
4316
4317static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4318 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4319{
4320 int rc;
4321 struct qeth_cmd_buffer *iob;
4322 struct qeth_ipa_cmd *cmd;
4323 struct qeth_set_access_ctrl *access_ctrl_req;
4324
847a50fd 4325 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4326
4327 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4328 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4329
4330 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4331 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4332 sizeof(struct qeth_set_access_ctrl));
4333 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4334 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4335 access_ctrl_req->subcmd_code = isolation;
4336
4337 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4338 &fallback);
d64ecc22
EL		 4339 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4340 return rc;
4341}
4342
0f54761d 4343int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4344{
4345 int rc = 0;
4346
847a50fd 4347 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4348
5113fec0
UB		 4349 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4350 card->info.type == QETH_CARD_TYPE_OSX) &&
4351 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4352 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4353 card->options.isolation, fallback);
d64ecc22
EL		 4354 if (rc) {
4355 QETH_DBF_MESSAGE(3,
5113fec0 4356 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4357 card->gdev->dev.kobj.name,
4358 rc);
0f54761d 4359 rc = -EOPNOTSUPP;
d64ecc22
EL		 4360 }
4361 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4362 card->options.isolation = ISOLATION_MODE_NONE;
4363
4364 dev_err(&card->gdev->dev, "Adapter does not "
4365 "support QDIO data connection isolation\n");
4366 rc = -EOPNOTSUPP;
4367 }
4368 return rc;
4369}
4370EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4371
4a71df50
FB		 4372void qeth_tx_timeout(struct net_device *dev)
4373{
4374 struct qeth_card *card;
4375
509e2562 4376 card = dev->ml_priv;
847a50fd 4377 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4378 card->stats.tx_errors++;
4379 qeth_schedule_recovery(card);
4380}
4381EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4382
4383int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4384{
509e2562 4385 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4386 int rc = 0;
4387
4388 switch (regnum) {
4389 case MII_BMCR: /* Basic mode control register */
4390 rc = BMCR_FULLDPLX;
4391 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4392 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4393 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4394 rc |= BMCR_SPEED100;
4395 break;
4396 case MII_BMSR: /* Basic mode status register */
4397 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4398 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4399 BMSR_100BASE4;
4400 break;
4401 case MII_PHYSID1: /* PHYS ID 1 */
4402 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4403 dev->dev_addr[2];
4404 rc = (rc >> 5) & 0xFFFF;
4405 break;
4406 case MII_PHYSID2: /* PHYS ID 2 */
4407 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4408 break;
4409 case MII_ADVERTISE: /* Advertisement control reg */
4410 rc = ADVERTISE_ALL;
4411 break;
4412 case MII_LPA: /* Link partner ability reg */
4413 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4414 LPA_100BASE4 | LPA_LPACK;
4415 break;
4416 case MII_EXPANSION: /* Expansion register */
4417 break;
4418 case MII_DCOUNTER: /* disconnect counter */
4419 break;
4420 case MII_FCSCOUNTER: /* false carrier counter */
4421 break;
4422 case MII_NWAYTEST: /* N-way auto-neg test register */
4423 break;
4424 case MII_RERRCOUNTER: /* rx error counter */
4425 rc = card->stats.rx_errors;
4426 break;
4427 case MII_SREVISION: /* silicon revision */
4428 break;
4429 case MII_RESV1: /* reserved 1 */
4430 break;
4431 case MII_LBRERROR: /* loopback, rx, bypass error */
4432 break;
4433 case MII_PHYADDR: /* physical address */
4434 break;
4435 case MII_RESV2: /* reserved 2 */
4436 break;
4437 case MII_TPISTATUS: /* TPI status for 10mbps */
4438 break;
4439 case MII_NCONFIG: /* network interface config */
4440 break;
4441 default:
4442 break;
4443 }
4444 return rc;
4445}
4446EXPORT_SYMBOL_GPL(qeth_mdio_read);
4447
4448static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4449 struct qeth_cmd_buffer *iob, int len,
4450 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4451 unsigned long),
4452 void *reply_param)
4453{
4454 u16 s1, s2;
4455
847a50fd 4456 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4457
4458 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4459 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4460 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4461 /* adjust PDU length fields in IPA_PDU_HEADER */
4462 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4463 s2 = (u32) len;
4464 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4465 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4466 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4467 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4468 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4469 reply_cb, reply_param);
4470}
4471
4472static int qeth_snmp_command_cb(struct qeth_card *card,
4473 struct qeth_reply *reply, unsigned long sdata)
4474{
4475 struct qeth_ipa_cmd *cmd;
4476 struct qeth_arp_query_info *qinfo;
4477 struct qeth_snmp_cmd *snmp;
4478 unsigned char *data;
4479 __u16 data_len;
4480
847a50fd 4481 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4482
4483 cmd = (struct qeth_ipa_cmd *) sdata;
4484 data = (unsigned char *)((char *)cmd - reply->offset);
4485 qinfo = (struct qeth_arp_query_info *) reply->param;
4486 snmp = &cmd->data.setadapterparms.data.snmp;
4487
4488 if (cmd->hdr.return_code) {
847a50fd 4489 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4490 return 0;
4491 }
4492 if (cmd->data.setadapterparms.hdr.return_code) {
4493 cmd->hdr.return_code =
4494 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4495 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4496 return 0;
4497 }
4498 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4499 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4500 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4501 else
4502 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4503
4504 /* check if there is enough room in userspace */
4505 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4506 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4507 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4508 return 0;
4509 }
847a50fd 4510 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4511 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4512 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4513 cmd->data.setadapterparms.hdr.seq_no);
4514 /*copy entries to user buffer*/
4515 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4516 memcpy(qinfo->udata + qinfo->udata_offset,
4517 (char *)snmp,
4518 data_len + offsetof(struct qeth_snmp_cmd, data));
4519 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4520 } else {
4521 memcpy(qinfo->udata + qinfo->udata_offset,
4522 (char *)&snmp->request, data_len);
4523 }
4524 qinfo->udata_offset += data_len;
4525 /* check if all replies received ... */
847a50fd 4526 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4527 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4528 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4529 cmd->data.setadapterparms.hdr.seq_no);
4530 if (cmd->data.setadapterparms.hdr.seq_no <
4531 cmd->data.setadapterparms.hdr.used_total)
4532 return 1;
4533 return 0;
4534}
4535
4536int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4537{
4538 struct qeth_cmd_buffer *iob;
4539 struct qeth_ipa_cmd *cmd;
4540 struct qeth_snmp_ureq *ureq;
6fb392b1 4541 unsigned int req_len;
4a71df50
FB		 4542 struct qeth_arp_query_info qinfo = {0, };
4543 int rc = 0;
4544
847a50fd 4545 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4546
4547 if (card->info.guestlan)
4548 return -EOPNOTSUPP;
4549
4550 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4551 (!card->options.layer2)) {
4a71df50
FB		 4552 return -EOPNOTSUPP;
4553 }
4554 /* skip 4 bytes (data_len struct member) to get req_len */
4555 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4556 return -EFAULT;
6fb392b1
UB		 4557 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4558 sizeof(struct qeth_ipacmd_hdr) -
4559 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4560 return -EINVAL;
4986f3f0
JL		 4561 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4562 if (IS_ERR(ureq)) {
847a50fd 4563 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4564 return PTR_ERR(ureq);
4a71df50
FB		 4565 }
4566 qinfo.udata_len = ureq->hdr.data_len;
4567 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4568 if (!qinfo.udata) {
4569 kfree(ureq);
4570 return -ENOMEM;
4571 }
4572 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4573
4574 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4575 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4576 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4577 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4578 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4579 qeth_snmp_command_cb, (void *)&qinfo);
4580 if (rc)
14cc21b6 4581 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4582 QETH_CARD_IFNAME(card), rc);
4583 else {
4584 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4585 rc = -EFAULT;
4586 }
4587
4588 kfree(ureq);
4589 kfree(qinfo.udata);
4590 return rc;
4591}
4592EXPORT_SYMBOL_GPL(qeth_snmp_command);
4593
c3ab96f3
FB		 4594static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4595 struct qeth_reply *reply, unsigned long data)
4596{
4597 struct qeth_ipa_cmd *cmd;
4598 struct qeth_qoat_priv *priv;
4599 char *resdata;
4600 int resdatalen;
4601
4602 QETH_CARD_TEXT(card, 3, "qoatcb");
4603
4604 cmd = (struct qeth_ipa_cmd *)data;
4605 priv = (struct qeth_qoat_priv *)reply->param;
4606 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4607 resdata = (char *)data + 28;
4608
4609 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4610 cmd->hdr.return_code = IPA_RC_FFFF;
4611 return 0;
4612 }
4613
4614 memcpy((priv->buffer + priv->response_len), resdata,
4615 resdatalen);
4616 priv->response_len += resdatalen;
4617
4618 if (cmd->data.setadapterparms.hdr.seq_no <
4619 cmd->data.setadapterparms.hdr.used_total)
4620 return 1;
4621 return 0;
4622}
4623
4624int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4625{
4626 int rc = 0;
4627 struct qeth_cmd_buffer *iob;
4628 struct qeth_ipa_cmd *cmd;
4629 struct qeth_query_oat *oat_req;
4630 struct qeth_query_oat_data oat_data;
4631 struct qeth_qoat_priv priv;
4632 void __user *tmp;
4633
4634 QETH_CARD_TEXT(card, 3, "qoatcmd");
4635
4636 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4637 rc = -EOPNOTSUPP;
4638 goto out;
4639 }
4640
4641 if (copy_from_user(&oat_data, udata,
4642 sizeof(struct qeth_query_oat_data))) {
4643 rc = -EFAULT;
4644 goto out;
4645 }
4646
4647 priv.buffer_len = oat_data.buffer_len;
4648 priv.response_len = 0;
4649 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4650 if (!priv.buffer) {
4651 rc = -ENOMEM;
4652 goto out;
4653 }
4654
4655 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4656 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4657 sizeof(struct qeth_query_oat));
4658 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4659 oat_req = &cmd->data.setadapterparms.data.query_oat;
4660 oat_req->subcmd_code = oat_data.command;
4661
4662 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4663 &priv);
4664 if (!rc) {
4665 if (is_compat_task())
4666 tmp = compat_ptr(oat_data.ptr);
4667 else
4668 tmp = (void __user *)(unsigned long)oat_data.ptr;
4669
4670 if (copy_to_user(tmp, priv.buffer,
4671 priv.response_len)) {
4672 rc = -EFAULT;
4673 goto out_free;
4674 }
4675
4676 oat_data.response_len = priv.response_len;
4677
4678 if (copy_to_user(udata, &oat_data,
4679 sizeof(struct qeth_query_oat_data)))
4680 rc = -EFAULT;
4681 } else
4682 if (rc == IPA_RC_FFFF)
4683 rc = -EFAULT;
4684
4685out_free:
4686 kfree(priv.buffer);
4687out:
4688 return rc;
4689}
4690EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4691
e71e4072
HC		 4692static int qeth_query_card_info_cb(struct qeth_card *card,
4693 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4694{
4695 struct qeth_ipa_cmd *cmd;
4696 struct qeth_query_card_info *card_info;
4697 struct carrier_info *carrier_info;
4698
4699 QETH_CARD_TEXT(card, 2, "qcrdincb");
4700 carrier_info = (struct carrier_info *)reply->param;
4701 cmd = (struct qeth_ipa_cmd *)data;
4702 card_info = &cmd->data.setadapterparms.data.card_info;
4703 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4704 carrier_info->card_type = card_info->card_type;
4705 carrier_info->port_mode = card_info->port_mode;
4706 carrier_info->port_speed = card_info->port_speed;
4707 }
4708
4709 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4710 return 0;
4711}
4712
4713int qeth_query_card_info(struct qeth_card *card,
4714 struct carrier_info *carrier_info)
4715{
4716 struct qeth_cmd_buffer *iob;
4717
4718 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4719 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4720 return -EOPNOTSUPP;
4721 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4722 sizeof(struct qeth_ipacmd_setadpparms_hdr));
4723 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4724 (void *)carrier_info);
4725}
4726EXPORT_SYMBOL_GPL(qeth_query_card_info);
4727
4a71df50
FB		 4728static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4729{
4730 switch (card->info.type) {
4731 case QETH_CARD_TYPE_IQD:
4732 return 2;
4733 default:
4734 return 0;
4735 }
4736}
4737
d0ff1f52
UB		 4738static void qeth_determine_capabilities(struct qeth_card *card)
4739{
4740 int rc;
4741 int length;
4742 char *prcd;
4743 struct ccw_device *ddev;
4744 int ddev_offline = 0;
4745
4746 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4747 ddev = CARD_DDEV(card);
4748 if (!ddev->online) {
4749 ddev_offline = 1;
4750 rc = ccw_device_set_online(ddev);
4751 if (rc) {
4752 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4753 goto out;
4754 }
4755 }
4756
4757 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4758 if (rc) {
4759 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4760 dev_name(&card->gdev->dev), rc);
4761 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4762 goto out_offline;
4763 }
4764 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4765 if (ddev_offline)
4766 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4767 kfree(prcd);
4768
4769 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4770 if (rc)
4771 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4772
0da9581d
EL		 4773 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4774 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4775 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4776 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4777 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4778 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4779 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4780 dev_info(&card->gdev->dev,
4781 "Completion Queueing supported\n");
4782 } else {
4783 card->options.cq = QETH_CQ_NOTAVAILABLE;
4784 }
4785
4786
d0ff1f52
UB		 4787out_offline:
4788 if (ddev_offline == 1)
4789 ccw_device_set_offline(ddev);
4790out:
4791 return;
4792}
4793
0da9581d
EL		 4794static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4795 struct qdio_buffer **in_sbal_ptrs,
4796 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4797 int i;
4798
4799 if (card->options.cq == QETH_CQ_ENABLED) {
4800 int offset = QDIO_MAX_BUFFERS_PER_Q *
4801 (card->qdio.no_in_queues - 1);
4802 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4803 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4804 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4805 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4806 }
4807
4808 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4809 }
4810}
4811
4a71df50
FB		 4812static int qeth_qdio_establish(struct qeth_card *card)
4813{
4814 struct qdio_initialize init_data;
4815 char *qib_param_field;
4816 struct qdio_buffer **in_sbal_ptrs;
104ea556 4817 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4818 struct qdio_buffer **out_sbal_ptrs;
4819 int i, j, k;
4820 int rc = 0;
4821
d11ba0c4 4822 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4823
4824 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4825 GFP_KERNEL);
104ea556 4826 if (!qib_param_field) {
4827 rc = -ENOMEM;
4828 goto out_free_nothing;
4829 }
4a71df50
FB		 4830
4831 qeth_create_qib_param_field(card, qib_param_field);
4832 qeth_create_qib_param_field_blkt(card, qib_param_field);
4833
b3332930 4834 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4835 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4836 GFP_KERNEL);
4837 if (!in_sbal_ptrs) {
104ea556 4838 rc = -ENOMEM;
4839 goto out_free_qib_param;
4a71df50 4840 }
0da9581d 4841 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4842 in_sbal_ptrs[i] = (struct qdio_buffer *)
4843 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4844 }
4a71df50 4845
0da9581d
EL		 4846 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4847 GFP_KERNEL);
104ea556 4848 if (!queue_start_poll) {
4849 rc = -ENOMEM;
4850 goto out_free_in_sbals;
4851 }
0da9581d 4852 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4853 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4854
4855 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4856
4a71df50 4857 out_sbal_ptrs =
b3332930 4858 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4859 sizeof(void *), GFP_KERNEL);
4860 if (!out_sbal_ptrs) {
104ea556 4861 rc = -ENOMEM;
4862 goto out_free_queue_start_poll;
4a71df50
FB		 4863 }
4864 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4865 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4866 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4867 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4868 }
4869
4870 memset(&init_data, 0, sizeof(struct qdio_initialize));
4871 init_data.cdev = CARD_DDEV(card);
4872 init_data.q_format = qeth_get_qdio_q_format(card);
4873 init_data.qib_param_field_format = 0;
4874 init_data.qib_param_field = qib_param_field;
0da9581d 4875 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4876 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4877 init_data.input_handler = card->discipline->input_handler;
4878 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4879 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4880 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4881 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4882 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4883 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4884 init_data.scan_threshold =
0fa81cd4 4885 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4886
4887 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4888 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4889 rc = qdio_allocate(&init_data);
4890 if (rc) {
4891 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4892 goto out;
4893 }
4894 rc = qdio_establish(&init_data);
4895 if (rc) {
4a71df50 4896 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4897 qdio_free(CARD_DDEV(card));
4898 }
4a71df50 4899 }
0da9581d
EL		 4900
4901 switch (card->options.cq) {
4902 case QETH_CQ_ENABLED:
4903 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4904 break;
4905 case QETH_CQ_DISABLED:
4906 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4907 break;
4908 default:
4909 break;
4910 }
cc961d40 4911out:
4a71df50 4912 kfree(out_sbal_ptrs);
104ea556 4913out_free_queue_start_poll:
4914 kfree(queue_start_poll);
4915out_free_in_sbals:
4a71df50 4916 kfree(in_sbal_ptrs);
104ea556 4917out_free_qib_param:
4a71df50 4918 kfree(qib_param_field);
104ea556 4919out_free_nothing:
4a71df50
FB		 4920 return rc;
4921}
4922
4923static void qeth_core_free_card(struct qeth_card *card)
4924{
4925
d11ba0c4
PT		 4926 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4927 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4928 qeth_clean_channel(&card->read);
4929 qeth_clean_channel(&card->write);
4930 if (card->dev)
4931 free_netdev(card->dev);
4932 kfree(card->ip_tbd_list);
4933 qeth_free_qdio_buffers(card);
6bcac508 4934 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4935 kfree(card);
4936}
4937
395672e0
SR		 4938void qeth_trace_features(struct qeth_card *card)
4939{
4940 QETH_CARD_TEXT(card, 2, "features");
4941 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
4942 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
4943 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
4944 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
4945 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
4946 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
4947 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
4948}
4949EXPORT_SYMBOL_GPL(qeth_trace_features);
4950
4a71df50 4951static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4952 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4953 .driver_info = QETH_CARD_TYPE_OSD},
4954 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4955 .driver_info = QETH_CARD_TYPE_IQD},
4956 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4957 .driver_info = QETH_CARD_TYPE_OSN},
4958 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4959 .driver_info = QETH_CARD_TYPE_OSM},
4960 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4961 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4962 {},
4963};
4964MODULE_DEVICE_TABLE(ccw, qeth_ids);
4965
4966static struct ccw_driver qeth_ccw_driver = {
3bda058b 4967 .driver = {
3e70b3b8 4968 .owner = THIS_MODULE,
3bda058b
SO		 4969 .name = "qeth",
4970 },
4a71df50
FB		 4971 .ids = qeth_ids,
4972 .probe = ccwgroup_probe_ccwdev,
4973 .remove = ccwgroup_remove_ccwdev,
4974};
4975
4a71df50
FB		 4976int qeth_core_hardsetup_card(struct qeth_card *card)
4977{
6ebb7f8d 4978 int retries = 3;
4a71df50
FB		 4979 int rc;
4980
d11ba0c4 4981 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4982 atomic_set(&card->force_alloc_skb, 0);
725b9c04 4983 qeth_update_from_chp_desc(card);
4a71df50 4984retry:
6ebb7f8d 4985 if (retries < 3)
74eacdb9
FB		 4986 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4987 dev_name(&card->gdev->dev));
22ae2790 4988 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 4989 ccw_device_set_offline(CARD_DDEV(card));
4990 ccw_device_set_offline(CARD_WDEV(card));
4991 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 4992 qdio_free(CARD_DDEV(card));
aa909224
UB		 4993 rc = ccw_device_set_online(CARD_RDEV(card));
4994 if (rc)
4995 goto retriable;
4996 rc = ccw_device_set_online(CARD_WDEV(card));
4997 if (rc)
4998 goto retriable;
4999 rc = ccw_device_set_online(CARD_DDEV(card));
5000 if (rc)
5001 goto retriable;
aa909224 5002retriable:
4a71df50 5003 if (rc == -ERESTARTSYS) {
d11ba0c4 5004 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5005 return rc;
5006 } else if (rc) {
d11ba0c4 5007 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5008 if (--retries < 0)
4a71df50
FB		 5009 goto out;
5010 else
5011 goto retry;
5012 }
d0ff1f52 5013 qeth_determine_capabilities(card);
4a71df50
FB		 5014 qeth_init_tokens(card);
5015 qeth_init_func_level(card);
5016 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5017 if (rc == -ERESTARTSYS) {
d11ba0c4 5018 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5019 return rc;
5020 } else if (rc) {
d11ba0c4 5021 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5022 if (--retries < 0)
5023 goto out;
5024 else
5025 goto retry;
5026 }
5027 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5028 if (rc == -ERESTARTSYS) {
d11ba0c4 5029 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5030 return rc;
5031 } else if (rc) {
d11ba0c4 5032 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5033 if (--retries < 0)
5034 goto out;
5035 else
5036 goto retry;
5037 }
908abbb5 5038 card->read_or_write_problem = 0;
4a71df50
FB		 5039 rc = qeth_mpc_initialize(card);
5040 if (rc) {
d11ba0c4 5041 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5042 goto out;
5043 }
1da74b1c
FB		 5044
5045 card->options.ipa4.supported_funcs = 0;
5046 card->options.adp.supported_funcs = 0;
b4d72c08 5047 card->options.sbp.supported_funcs = 0;
1da74b1c
FB		 5048 card->info.diagass_support = 0;
5049 qeth_query_ipassists(card, QETH_PROT_IPV4);
5050 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
5051 qeth_query_setadapterparms(card);
5052 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
5053 qeth_query_setdiagass(card);
4a71df50
FB		 5054 return 0;
5055out:
74eacdb9
FB		 5056 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5057 "an error on the device\n");
5058 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5059 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5060 return rc;
5061}
5062EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5063
b3332930
FB		 5064static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
5065 struct qdio_buffer_element *element,
4a71df50
FB		 5066 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
5067{
5068 struct page *page = virt_to_page(element->addr);
5069 if (*pskb == NULL) {
b3332930
FB		 5070 if (qethbuffer->rx_skb) {
5071 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
5072 *pskb = qethbuffer->rx_skb;
5073 qethbuffer->rx_skb = NULL;
5074 } else {
5075 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
5076 if (!(*pskb))
5077 return -ENOMEM;
5078 }
5079
4a71df50 5080 skb_reserve(*pskb, ETH_HLEN);
b3332930 5081 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 5082 memcpy(skb_put(*pskb, data_len), element->addr + offset,
5083 data_len);
5084 } else {
5085 get_page(page);
b3332930
FB		 5086 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
5087 element->addr + offset, QETH_RX_PULL_LEN);
5088 skb_fill_page_desc(*pskb, *pfrag, page,
5089 offset + QETH_RX_PULL_LEN,
5090 data_len - QETH_RX_PULL_LEN);
5091 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
5092 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
5093 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 5094 (*pfrag)++;
5095 }
5096 } else {
5097 get_page(page);
5098 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
5099 (*pskb)->data_len += data_len;
5100 (*pskb)->len += data_len;
5101 (*pskb)->truesize += data_len;
5102 (*pfrag)++;
5103 }
0da9581d
EL		 5104
5105
4a71df50
FB		 5106 return 0;
5107}
5108
5109struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5110 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5111 struct qdio_buffer_element **__element, int *__offset,
5112 struct qeth_hdr **hdr)
5113{
5114 struct qdio_buffer_element *element = *__element;
b3332930 5115 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 5116 int offset = *__offset;
5117 struct sk_buff *skb = NULL;
76b11f8e 5118 int skb_len = 0;
4a71df50
FB		 5119 void *data_ptr;
5120 int data_len;
5121 int headroom = 0;
5122 int use_rx_sg = 0;
5123 int frag = 0;
5124
4a71df50
FB		 5125 /* qeth_hdr must not cross element boundaries */
5126 if (element->length < offset + sizeof(struct qeth_hdr)) {
5127 if (qeth_is_last_sbale(element))
5128 return NULL;
5129 element++;
5130 offset = 0;
5131 if (element->length < sizeof(struct qeth_hdr))
5132 return NULL;
5133 }
5134 *hdr = element->addr + offset;
5135
5136 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5137 switch ((*hdr)->hdr.l2.id) {
5138 case QETH_HEADER_TYPE_LAYER2:
5139 skb_len = (*hdr)->hdr.l2.pkt_length;
5140 break;
5141 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5142 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5143 headroom = ETH_HLEN;
76b11f8e
UB		 5144 break;
5145 case QETH_HEADER_TYPE_OSN:
5146 skb_len = (*hdr)->hdr.osn.pdu_length;
5147 headroom = sizeof(struct qeth_hdr);
5148 break;
5149 default:
5150 break;
4a71df50
FB		 5151 }
5152
5153 if (!skb_len)
5154 return NULL;
5155
b3332930
FB		 5156 if (((skb_len >= card->options.rx_sg_cb) &&
5157 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5158 (!atomic_read(&card->force_alloc_skb))) ||
5159 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 5160 use_rx_sg = 1;
5161 } else {
5162 skb = dev_alloc_skb(skb_len + headroom);
5163 if (!skb)
5164 goto no_mem;
5165 if (headroom)
5166 skb_reserve(skb, headroom);
5167 }
5168
5169 data_ptr = element->addr + offset;
5170 while (skb_len) {
5171 data_len = min(skb_len, (int)(element->length - offset));
5172 if (data_len) {
5173 if (use_rx_sg) {
b3332930
FB		 5174 if (qeth_create_skb_frag(qethbuffer, element,
5175 &skb, offset, &frag, data_len))
4a71df50
FB		 5176 goto no_mem;
5177 } else {
5178 memcpy(skb_put(skb, data_len), data_ptr,
5179 data_len);
5180 }
5181 }
5182 skb_len -= data_len;
5183 if (skb_len) {
5184 if (qeth_is_last_sbale(element)) {
847a50fd 5185 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5186 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5187 dev_kfree_skb_any(skb);
5188 card->stats.rx_errors++;
5189 return NULL;
5190 }
5191 element++;
5192 offset = 0;
5193 data_ptr = element->addr;
5194 } else {
5195 offset += data_len;
5196 }
5197 }
5198 *__element = element;
5199 *__offset = offset;
5200 if (use_rx_sg && card->options.performance_stats) {
5201 card->perf_stats.sg_skbs_rx++;
5202 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5203 }
5204 return skb;
5205no_mem:
5206 if (net_ratelimit()) {
847a50fd 5207 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5208 }
5209 card->stats.rx_dropped++;
5210 return NULL;
5211}
5212EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5213
5214static void qeth_unregister_dbf_views(void)
5215{
d11ba0c4
PT		 5216 int x;
5217 for (x = 0; x < QETH_DBF_INFOS; x++) {
5218 debug_unregister(qeth_dbf[x].id);
5219 qeth_dbf[x].id = NULL;
5220 }
4a71df50
FB		 5221}
5222
8e96c51c 5223void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5224{
5225 char dbf_txt_buf[32];
345aa66e 5226 va_list args;
cd023216 5227
8e6a8285 5228 if (!debug_level_enabled(id, level))
cd023216 5229 return;
345aa66e
PT		 5230 va_start(args, fmt);
5231 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5232 va_end(args);
8e96c51c 5233 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5234}
5235EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5236
4a71df50
FB		 5237static int qeth_register_dbf_views(void)
5238{
d11ba0c4
PT		 5239 int ret;
5240 int x;
5241
5242 for (x = 0; x < QETH_DBF_INFOS; x++) {
5243 /* register the areas */
5244 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5245 qeth_dbf[x].pages,
5246 qeth_dbf[x].areas,
5247 qeth_dbf[x].len);
5248 if (qeth_dbf[x].id == NULL) {
5249 qeth_unregister_dbf_views();
5250 return -ENOMEM;
5251 }
4a71df50 5252
d11ba0c4
PT		 5253 /* register a view */
5254 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5255 if (ret) {
5256 qeth_unregister_dbf_views();
5257 return ret;
5258 }
4a71df50 5259
d11ba0c4
PT		 5260 /* set a passing level */
5261 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5262 }
4a71df50
FB		 5263
5264 return 0;
5265}
5266
5267int qeth_core_load_discipline(struct qeth_card *card,
5268 enum qeth_discipline_id discipline)
5269{
5270 int rc = 0;
2022e00c 5271 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5272 switch (discipline) {
5273 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5274 card->discipline = try_then_request_module(
5275 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5276 break;
5277 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5278 card->discipline = try_then_request_module(
5279 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50
FB		 5280 break;
5281 }
c041f2d4 5282 if (!card->discipline) {
74eacdb9
FB		 5283 dev_err(&card->gdev->dev, "There is no kernel module to "
5284 "support discipline %d\n", discipline);
4a71df50
FB		 5285 rc = -EINVAL;
5286 }
2022e00c 5287 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5288 return rc;
5289}
5290
5291void qeth_core_free_discipline(struct qeth_card *card)
5292{
5293 if (card->options.layer2)
c041f2d4 5294 symbol_put(qeth_l2_discipline);
4a71df50 5295 else
c041f2d4
SO		 5296 symbol_put(qeth_l3_discipline);
5297 card->discipline = NULL;
4a71df50
FB		 5298}
5299
b7169c51
SO		 5300static const struct device_type qeth_generic_devtype = {
5301 .name = "qeth_generic",
5302 .groups = qeth_generic_attr_groups,
5303};
5304static const struct device_type qeth_osn_devtype = {
5305 .name = "qeth_osn",
5306 .groups = qeth_osn_attr_groups,
5307};
5308
819dc537
SR		 5309#define DBF_NAME_LEN 20
5310
5311struct qeth_dbf_entry {
5312 char dbf_name[DBF_NAME_LEN];
5313 debug_info_t *dbf_info;
5314 struct list_head dbf_list;
5315};
5316
5317static LIST_HEAD(qeth_dbf_list);
5318static DEFINE_MUTEX(qeth_dbf_list_mutex);
5319
5320static debug_info_t *qeth_get_dbf_entry(char *name)
5321{
5322 struct qeth_dbf_entry *entry;
5323 debug_info_t *rc = NULL;
5324
5325 mutex_lock(&qeth_dbf_list_mutex);
5326 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5327 if (strcmp(entry->dbf_name, name) == 0) {
5328 rc = entry->dbf_info;
5329 break;
5330 }
5331 }
5332 mutex_unlock(&qeth_dbf_list_mutex);
5333 return rc;
5334}
5335
5336static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5337{
5338 struct qeth_dbf_entry *new_entry;
5339
5340 card->debug = debug_register(name, 2, 1, 8);
5341 if (!card->debug) {
5342 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5343 goto err;
5344 }
5345 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5346 goto err_dbg;
5347 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5348 if (!new_entry)
5349 goto err_dbg;
5350 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5351 new_entry->dbf_info = card->debug;
5352 mutex_lock(&qeth_dbf_list_mutex);
5353 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5354 mutex_unlock(&qeth_dbf_list_mutex);
5355
5356 return 0;
5357
5358err_dbg:
5359 debug_unregister(card->debug);
5360err:
5361 return -ENOMEM;
5362}
5363
5364static void qeth_clear_dbf_list(void)
5365{
5366 struct qeth_dbf_entry *entry, *tmp;
5367
5368 mutex_lock(&qeth_dbf_list_mutex);
5369 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5370 list_del(&entry->dbf_list);
5371 debug_unregister(entry->dbf_info);
5372 kfree(entry);
5373 }
5374 mutex_unlock(&qeth_dbf_list_mutex);
5375}
5376
4a71df50
FB		 5377static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5378{
5379 struct qeth_card *card;
5380 struct device *dev;
5381 int rc;
5382 unsigned long flags;
819dc537 5383 char dbf_name[DBF_NAME_LEN];
4a71df50 5384
d11ba0c4 5385 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5386
5387 dev = &gdev->dev;
5388 if (!get_device(dev))
5389 return -ENODEV;
5390
2a0217d5 5391 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5392
5393 card = qeth_alloc_card();
5394 if (!card) {
d11ba0c4 5395 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5396 rc = -ENOMEM;
5397 goto err_dev;
5398 }
af039068
CO		 5399
5400 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5401 dev_name(&gdev->dev));
819dc537 5402 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5403 if (!card->debug) {
819dc537
SR		 5404 rc = qeth_add_dbf_entry(card, dbf_name);
5405 if (rc)
5406 goto err_card;
af039068 5407 }
af039068 5408
4a71df50
FB		 5409 card->read.ccwdev = gdev->cdev[0];
5410 card->write.ccwdev = gdev->cdev[1];
5411 card->data.ccwdev = gdev->cdev[2];
5412 dev_set_drvdata(&gdev->dev, card);
5413 card->gdev = gdev;
5414 gdev->cdev[0]->handler = qeth_irq;
5415 gdev->cdev[1]->handler = qeth_irq;
5416 gdev->cdev[2]->handler = qeth_irq;
5417
5418 rc = qeth_determine_card_type(card);
5419 if (rc) {
d11ba0c4 5420 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
819dc537 5421 goto err_card;
4a71df50
FB		 5422 }
5423 rc = qeth_setup_card(card);
5424 if (rc) {
d11ba0c4 5425 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5426 goto err_card;
4a71df50
FB		 5427 }
5428
5113fec0 5429 if (card->info.type == QETH_CARD_TYPE_OSN)
b7169c51 5430 gdev->dev.type = &qeth_osn_devtype;
5113fec0 5431 else
b7169c51
SO		 5432 gdev->dev.type = &qeth_generic_devtype;
5433
5113fec0
UB		 5434 switch (card->info.type) {
5435 case QETH_CARD_TYPE_OSN:
5436 case QETH_CARD_TYPE_OSM:
4a71df50 5437 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0 5438 if (rc)
819dc537 5439 goto err_card;
c041f2d4 5440 rc = card->discipline->setup(card->gdev);
4a71df50 5441 if (rc)
5113fec0
UB		 5442 goto err_disc;
5443 case QETH_CARD_TYPE_OSD:
5444 case QETH_CARD_TYPE_OSX:
5445 default:
5446 break;
4a71df50
FB		 5447 }
5448
5449 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5450 list_add_tail(&card->list, &qeth_core_card_list.list);
5451 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5452
5453 qeth_determine_capabilities(card);
4a71df50
FB		 5454 return 0;
5455
5113fec0
UB		 5456err_disc:
5457 qeth_core_free_discipline(card);
4a71df50
FB		 5458err_card:
5459 qeth_core_free_card(card);
5460err_dev:
5461 put_device(dev);
5462 return rc;
5463}
5464
5465static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5466{
5467 unsigned long flags;
5468 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5469
28a7e4c9 5470 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5471
c041f2d4
SO		 5472 if (card->discipline) {
5473 card->discipline->remove(gdev);
9dc48ccc
UB		 5474 qeth_core_free_discipline(card);
5475 }
5476
4a71df50
FB		 5477 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5478 list_del(&card->list);
5479 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5480 qeth_core_free_card(card);
5481 dev_set_drvdata(&gdev->dev, NULL);
5482 put_device(&gdev->dev);
5483 return;
5484}
5485
5486static int qeth_core_set_online(struct ccwgroup_device *gdev)
5487{
5488 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5489 int rc = 0;
5490 int def_discipline;
5491
c041f2d4 5492 if (!card->discipline) {
4a71df50
FB		 5493 if (card->info.type == QETH_CARD_TYPE_IQD)
5494 def_discipline = QETH_DISCIPLINE_LAYER3;
5495 else
5496 def_discipline = QETH_DISCIPLINE_LAYER2;
5497 rc = qeth_core_load_discipline(card, def_discipline);
5498 if (rc)
5499 goto err;
c041f2d4 5500 rc = card->discipline->setup(card->gdev);
4a71df50
FB		 5501 if (rc)
5502 goto err;
5503 }
c041f2d4 5504 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5505err:
5506 return rc;
5507}
5508
5509static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5510{
5511 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5512 return card->discipline->set_offline(gdev);
4a71df50
FB		 5513}
5514
5515static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5516{
5517 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5518 if (card->discipline && card->discipline->shutdown)
5519 card->discipline->shutdown(gdev);
4a71df50
FB		 5520}
5521
bbcfcdc8
FB		 5522static int qeth_core_prepare(struct ccwgroup_device *gdev)
5523{
5524 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5525 if (card->discipline && card->discipline->prepare)
5526 return card->discipline->prepare(gdev);
bbcfcdc8
FB		 5527 return 0;
5528}
5529
5530static void qeth_core_complete(struct ccwgroup_device *gdev)
5531{
5532 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5533 if (card->discipline && card->discipline->complete)
5534 card->discipline->complete(gdev);
bbcfcdc8
FB		 5535}
5536
5537static int qeth_core_freeze(struct ccwgroup_device *gdev)
5538{
5539 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5540 if (card->discipline && card->discipline->freeze)
5541 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5542 return 0;
5543}
5544
5545static int qeth_core_thaw(struct ccwgroup_device *gdev)
5546{
5547 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5548 if (card->discipline && card->discipline->thaw)
5549 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5550 return 0;
5551}
5552
5553static int qeth_core_restore(struct ccwgroup_device *gdev)
5554{
5555 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5556 if (card->discipline && card->discipline->restore)
5557 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5558 return 0;
5559}
5560
4a71df50 5561static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5562 .driver = {
5563 .owner = THIS_MODULE,
5564 .name = "qeth",
5565 },
b7169c51 5566 .setup = qeth_core_probe_device,
4a71df50
FB		 5567 .remove = qeth_core_remove_device,
5568 .set_online = qeth_core_set_online,
5569 .set_offline = qeth_core_set_offline,
5570 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5571 .prepare = qeth_core_prepare,
5572 .complete = qeth_core_complete,
5573 .freeze = qeth_core_freeze,
5574 .thaw = qeth_core_thaw,
5575 .restore = qeth_core_restore,
4a71df50
FB		 5576};
5577
b7169c51
SO		 5578static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5579 const char *buf, size_t count)
4a71df50
FB		 5580{
5581 int err;
4a71df50 5582
b7169c51 5583 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5584 &qeth_core_ccwgroup_driver, 3, buf);
5585
5586 return err ? err : count;
5587}
4a71df50
FB		 5588static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5589
f47e2256
SO		 5590static struct attribute *qeth_drv_attrs[] = {
5591 &driver_attr_group.attr,
5592 NULL,
5593};
5594static struct attribute_group qeth_drv_attr_group = {
5595 .attrs = qeth_drv_attrs,
5596};
5597static const struct attribute_group *qeth_drv_attr_groups[] = {
5598 &qeth_drv_attr_group,
5599 NULL,
5600};
5601
4a71df50
FB		 5602static struct {
5603 const char str[ETH_GSTRING_LEN];
5604} qeth_ethtool_stats_keys[] = {
5605/* 0 */{"rx skbs"},
5606 {"rx buffers"},
5607 {"tx skbs"},
5608 {"tx buffers"},
5609 {"tx skbs no packing"},
5610 {"tx buffers no packing"},
5611 {"tx skbs packing"},
5612 {"tx buffers packing"},
5613 {"tx sg skbs"},
5614 {"tx sg frags"},
5615/* 10 */{"rx sg skbs"},
5616 {"rx sg frags"},
5617 {"rx sg page allocs"},
5618 {"tx large kbytes"},
5619 {"tx large count"},
5620 {"tx pk state ch n->p"},
5621 {"tx pk state ch p->n"},
5622 {"tx pk watermark low"},
5623 {"tx pk watermark high"},
5624 {"queue 0 buffer usage"},
5625/* 20 */{"queue 1 buffer usage"},
5626 {"queue 2 buffer usage"},
5627 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5628 {"rx poll time"},
5629 {"rx poll count"},
4a71df50
FB		 5630 {"rx do_QDIO time"},
5631 {"rx do_QDIO count"},
5632 {"tx handler time"},
5633 {"tx handler count"},
5634 {"tx time"},
5635/* 30 */{"tx count"},
5636 {"tx do_QDIO time"},
5637 {"tx do_QDIO count"},
f61a0d05 5638 {"tx csum"},
c3b4a740 5639 {"tx lin"},
0da9581d
EL		 5640 {"cq handler count"},
5641 {"cq handler time"}
4a71df50
FB		 5642};
5643
df8b4ec8 5644int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5645{
df8b4ec8
BH		 5646 switch (stringset) {
5647 case ETH_SS_STATS:
5648 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5649 default:
5650 return -EINVAL;
5651 }
4a71df50 5652}
df8b4ec8 5653EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5654
5655void qeth_core_get_ethtool_stats(struct net_device *dev,
5656 struct ethtool_stats *stats, u64 *data)
5657{
509e2562 5658 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5659 data[0] = card->stats.rx_packets -
5660 card->perf_stats.initial_rx_packets;
5661 data[1] = card->perf_stats.bufs_rec;
5662 data[2] = card->stats.tx_packets -
5663 card->perf_stats.initial_tx_packets;
5664 data[3] = card->perf_stats.bufs_sent;
5665 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5666 - card->perf_stats.skbs_sent_pack;
5667 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5668 data[6] = card->perf_stats.skbs_sent_pack;
5669 data[7] = card->perf_stats.bufs_sent_pack;
5670 data[8] = card->perf_stats.sg_skbs_sent;
5671 data[9] = card->perf_stats.sg_frags_sent;
5672 data[10] = card->perf_stats.sg_skbs_rx;
5673 data[11] = card->perf_stats.sg_frags_rx;
5674 data[12] = card->perf_stats.sg_alloc_page_rx;
5675 data[13] = (card->perf_stats.large_send_bytes >> 10);
5676 data[14] = card->perf_stats.large_send_cnt;
5677 data[15] = card->perf_stats.sc_dp_p;
5678 data[16] = card->perf_stats.sc_p_dp;
5679 data[17] = QETH_LOW_WATERMARK_PACK;
5680 data[18] = QETH_HIGH_WATERMARK_PACK;
5681 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5682 data[20] = (card->qdio.no_out_queues > 1) ?
5683 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5684 data[21] = (card->qdio.no_out_queues > 2) ?
5685 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5686 data[22] = (card->qdio.no_out_queues > 3) ?
5687 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5688 data[23] = card->perf_stats.inbound_time;
5689 data[24] = card->perf_stats.inbound_cnt;
5690 data[25] = card->perf_stats.inbound_do_qdio_time;
5691 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5692 data[27] = card->perf_stats.outbound_handler_time;
5693 data[28] = card->perf_stats.outbound_handler_cnt;
5694 data[29] = card->perf_stats.outbound_time;
5695 data[30] = card->perf_stats.outbound_cnt;
5696 data[31] = card->perf_stats.outbound_do_qdio_time;
5697 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5698 data[33] = card->perf_stats.tx_csum;
c3b4a740 5699 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5700 data[35] = card->perf_stats.cq_cnt;
5701 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5702}
5703EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5704
5705void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5706{
5707 switch (stringset) {
5708 case ETH_SS_STATS:
5709 memcpy(data, &qeth_ethtool_stats_keys,
5710 sizeof(qeth_ethtool_stats_keys));
5711 break;
5712 default:
5713 WARN_ON(1);
5714 break;
5715 }
5716}
5717EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5718
5719void qeth_core_get_drvinfo(struct net_device *dev,
5720 struct ethtool_drvinfo *info)
5721{
509e2562 5722 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 5723
5724 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5725 sizeof(info->driver));
5726 strlcpy(info->version, "1.0", sizeof(info->version));
5727 strlcpy(info->fw_version, card->info.mcl_level,
5728 sizeof(info->fw_version));
5729 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5730 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 5731}
5732EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5733
02d5cb5b
EC		 5734/* Helper function to fill 'advertizing' and 'supported' which are the same. */
5735/* Autoneg and full-duplex are supported and advertized uncondionally. */
5736/* Always advertize and support all speeds up to specified, and only one */
5737/* specified port type. */
5738static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
5739 int maxspeed, int porttype)
5740{
5741 int port_sup, port_adv, spd_sup, spd_adv;
5742
5743 switch (porttype) {
5744 case PORT_TP:
5745 port_sup = SUPPORTED_TP;
5746 port_adv = ADVERTISED_TP;
5747 break;
5748 case PORT_FIBRE:
5749 port_sup = SUPPORTED_FIBRE;
5750 port_adv = ADVERTISED_FIBRE;
5751 break;
5752 default:
5753 port_sup = SUPPORTED_TP;
5754 port_adv = ADVERTISED_TP;
5755 WARN_ON_ONCE(1);
5756 }
5757
5758 /* "Fallthrough" case'es ordered from high to low result in setting */
5759 /* flags cumulatively, starting from the specified speed and down to */
5760 /* the lowest possible. */
5761 spd_sup = 0;
5762 spd_adv = 0;
5763 switch (maxspeed) {
5764 case SPEED_10000:
5765 spd_sup |= SUPPORTED_10000baseT_Full;
5766 spd_adv |= ADVERTISED_10000baseT_Full;
5767 case SPEED_1000:
5768 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
5769 spd_adv |= ADVERTISED_1000baseT_Half |
5770 ADVERTISED_1000baseT_Full;
5771 case SPEED_100:
5772 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
5773 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
5774 case SPEED_10:
5775 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5776 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5777 break;
5778 default:
5779 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5780 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5781 WARN_ON_ONCE(1);
5782 }
5783 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
5784 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
5785}
5786
3f9975aa
FB		 5787int qeth_core_ethtool_get_settings(struct net_device *netdev,
5788 struct ethtool_cmd *ecmd)
5789{
509e2562 5790 struct qeth_card *card = netdev->ml_priv;
3f9975aa 5791 enum qeth_link_types link_type;
02d5cb5b 5792 struct carrier_info carrier_info;
d4f3cd49 5793 u32 speed;
3f9975aa
FB		 5794
5795 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5796 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5797 else
5798 link_type = card->info.link_type;
5799
5800 ecmd->transceiver = XCVR_INTERNAL;
3f9975aa
FB		 5801 ecmd->duplex = DUPLEX_FULL;
5802 ecmd->autoneg = AUTONEG_ENABLE;
5803
5804 switch (link_type) {
5805 case QETH_LINK_TYPE_FAST_ETH:
5806 case QETH_LINK_TYPE_LANE_ETH100:
02d5cb5b 5807 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
d4f3cd49 5808 speed = SPEED_100;
3f9975aa
FB		 5809 ecmd->port = PORT_TP;
5810 break;
5811
5812 case QETH_LINK_TYPE_GBIT_ETH:
5813 case QETH_LINK_TYPE_LANE_ETH1000:
02d5cb5b 5814 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
d4f3cd49 5815 speed = SPEED_1000;
3f9975aa
FB		 5816 ecmd->port = PORT_FIBRE;
5817 break;
5818
5819 case QETH_LINK_TYPE_10GBIT_ETH:
02d5cb5b 5820 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
d4f3cd49 5821 speed = SPEED_10000;
3f9975aa
FB		 5822 ecmd->port = PORT_FIBRE;
5823 break;
5824
5825 default:
02d5cb5b 5826 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
d4f3cd49 5827 speed = SPEED_10;
3f9975aa
FB		 5828 ecmd->port = PORT_TP;
5829 }
d4f3cd49 5830 ethtool_cmd_speed_set(ecmd, speed);
3f9975aa 5831
02d5cb5b
EC		 5832 /* Check if we can obtain more accurate information. */
5833 /* If QUERY_CARD_INFO command is not supported or fails, */
5834 /* just return the heuristics that was filled above. */
5835 if (qeth_query_card_info(card, &carrier_info) != 0)
5836 return 0;
5837
5838 netdev_dbg(netdev,
5839 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
5840 carrier_info.card_type,
5841 carrier_info.port_mode,
5842 carrier_info.port_speed);
5843
5844 /* Update attributes for which we've obtained more authoritative */
5845 /* information, leave the rest the way they where filled above. */
5846 switch (carrier_info.card_type) {
5847 case CARD_INFO_TYPE_1G_COPPER_A:
5848 case CARD_INFO_TYPE_1G_COPPER_B:
5849 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
5850 ecmd->port = PORT_TP;
5851 break;
5852 case CARD_INFO_TYPE_1G_FIBRE_A:
5853 case CARD_INFO_TYPE_1G_FIBRE_B:
5854 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
5855 ecmd->port = PORT_FIBRE;
5856 break;
5857 case CARD_INFO_TYPE_10G_FIBRE_A:
5858 case CARD_INFO_TYPE_10G_FIBRE_B:
5859 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
5860 ecmd->port = PORT_FIBRE;
5861 break;
5862 }
5863
5864 switch (carrier_info.port_mode) {
5865 case CARD_INFO_PORTM_FULLDUPLEX:
5866 ecmd->duplex = DUPLEX_FULL;
5867 break;
5868 case CARD_INFO_PORTM_HALFDUPLEX:
5869 ecmd->duplex = DUPLEX_HALF;
5870 break;
5871 }
5872
5873 switch (carrier_info.port_speed) {
5874 case CARD_INFO_PORTS_10M:
d4f3cd49 5875 speed = SPEED_10;
02d5cb5b
EC		 5876 break;
5877 case CARD_INFO_PORTS_100M:
d4f3cd49 5878 speed = SPEED_100;
02d5cb5b
EC		 5879 break;
5880 case CARD_INFO_PORTS_1G:
d4f3cd49 5881 speed = SPEED_1000;
02d5cb5b
EC		 5882 break;
5883 case CARD_INFO_PORTS_10G:
d4f3cd49 5884 speed = SPEED_10000;
02d5cb5b
EC		 5885 break;
5886 }
d4f3cd49 5887 ethtool_cmd_speed_set(ecmd, speed);
02d5cb5b 5888
3f9975aa
FB		 5889 return 0;
5890}
5891EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5892
4a71df50
FB		 5893static int __init qeth_core_init(void)
5894{
5895 int rc;
5896
74eacdb9 5897 pr_info("loading core functions\n");
4a71df50 5898 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 5899 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 5900 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 5901 mutex_init(&qeth_mod_mutex);
4a71df50 5902
0f54761d
SR		 5903 qeth_wq = create_singlethread_workqueue("qeth_wq");
5904
4a71df50
FB		 5905 rc = qeth_register_dbf_views();
5906 if (rc)
5907 goto out_err;
035da16f 5908 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 5909 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 5910 if (rc)
5911 goto register_err;
683d718a
FB		 5912 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5913 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5914 if (!qeth_core_header_cache) {
5915 rc = -ENOMEM;
5916 goto slab_err;
5917 }
0da9581d
EL		 5918 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5919 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5920 if (!qeth_qdio_outbuf_cache) {
5921 rc = -ENOMEM;
5922 goto cqslab_err;
5923 }
afb6ac59
SO		 5924 rc = ccw_driver_register(&qeth_ccw_driver);
5925 if (rc)
5926 goto ccw_err;
5927 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5928 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5929 if (rc)
5930 goto ccwgroup_err;
0da9581d 5931
683d718a 5932 return 0;
afb6ac59
SO		 5933
5934ccwgroup_err:
5935 ccw_driver_unregister(&qeth_ccw_driver);
5936ccw_err:
5937 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 5938cqslab_err:
5939 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5940slab_err:
035da16f 5941 root_device_unregister(qeth_core_root_dev);
4a71df50 5942register_err:
4a71df50
FB		 5943 qeth_unregister_dbf_views();
5944out_err:
74eacdb9 5945 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5946 return rc;
5947}
5948
5949static void __exit qeth_core_exit(void)
5950{
819dc537 5951 qeth_clear_dbf_list();
0f54761d 5952 destroy_workqueue(qeth_wq);
4a71df50
FB		 5953 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5954 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5955 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5956 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 5957 root_device_unregister(qeth_core_root_dev);
4a71df50 5958 qeth_unregister_dbf_views();
74eacdb9 5959 pr_info("core functions removed\n");
4a71df50
FB		 5960}
5961
5962module_init(qeth_core_init);
5963module_exit(qeth_core_exit);
5964MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5965MODULE_DESCRIPTION("qeth core functions");
5966MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)