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s390/qeth: skip QDIO queue handler indirection
[linux-block.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
ab9953ff 1// SPDX-License-Identifier: GPL-2.0
4a71df50 2/*
bbcfcdc8 3 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
74eacdb9
FB		 10#define KMSG_COMPONENT "qeth"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
4a71df50
FB		 13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/string.h>
16#include <linux/errno.h>
17#include <linux/kernel.h>
18#include <linux/ip.h>
4a71df50
FB		 19#include <linux/tcp.h>
20#include <linux/mii.h>
21#include <linux/kthread.h>
5a0e3ad6 22#include <linux/slab.h>
6d69b1f1
JW		 23#include <linux/if_vlan.h>
24#include <linux/netdevice.h>
25#include <linux/netdev_features.h>
26#include <linux/skbuff.h>
27
b3332930 28#include <net/iucv/af_iucv.h>
290b8348 29#include <net/dsfield.h>
4a71df50 30
ab4227cb 31#include <asm/ebcdic.h>
2bf29df7 32#include <asm/chpid.h>
ab4227cb 33#include <asm/io.h>
1da74b1c 34#include <asm/sysinfo.h>
c3ab96f3 35#include <asm/compat.h>
ec61bd2f
JW		 36#include <asm/diag.h>
37#include <asm/cio.h>
38#include <asm/ccwdev.h>
615dff22 39#include <asm/cpcmd.h>
4a71df50
FB		 40
41#include "qeth_core.h"
4a71df50 42
d11ba0c4
PT		 43struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
44 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
45 /* N P A M L V H */
46 [QETH_DBF_SETUP] = {"qeth_setup",
47 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 48 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
49 &debug_sprintf_view, NULL},
d11ba0c4
PT		 50 [QETH_DBF_CTRL] = {"qeth_control",
51 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
52};
53EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 54
55struct qeth_card_list_struct qeth_core_card_list;
56EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 57struct kmem_cache *qeth_core_header_cache;
58EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 59static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 60
61static struct device *qeth_core_root_dev;
4a71df50 62static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 63static struct mutex qeth_mod_mutex;
4a71df50
FB		 64
65static void qeth_send_control_data_cb(struct qeth_channel *,
66 struct qeth_cmd_buffer *);
4a71df50
FB		 67static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
68static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
69static void qeth_free_buffer_pool(struct qeth_card *);
70static int qeth_qdio_establish(struct qeth_card *);
0da9581d 71static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 72static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
73 struct qeth_qdio_out_buffer *buf,
74 enum iucv_tx_notify notification);
75static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 76static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
77 struct qeth_qdio_out_buffer *buf,
78 enum qeth_qdio_buffer_states newbufstate);
72861ae7 79static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 80
b4d72c08 81struct workqueue_struct *qeth_wq;
c044dc21 82EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 83
511c2445
EC		 84int qeth_card_hw_is_reachable(struct qeth_card *card)
85{
86 return (card->state == CARD_STATE_SOFTSETUP) ||
87 (card->state == CARD_STATE_UP);
88}
89EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
90
0f54761d
SR		 91static void qeth_close_dev_handler(struct work_struct *work)
92{
93 struct qeth_card *card;
94
95 card = container_of(work, struct qeth_card, close_dev_work);
96 QETH_CARD_TEXT(card, 2, "cldevhdl");
97 rtnl_lock();
98 dev_close(card->dev);
99 rtnl_unlock();
100 ccwgroup_set_offline(card->gdev);
101}
102
103void qeth_close_dev(struct qeth_card *card)
104{
105 QETH_CARD_TEXT(card, 2, "cldevsubm");
106 queue_work(qeth_wq, &card->close_dev_work);
107}
108EXPORT_SYMBOL_GPL(qeth_close_dev);
109
cef6ff22 110static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 111{
112 if (card->info.guestlan) {
113 switch (card->info.type) {
5113fec0 114 case QETH_CARD_TYPE_OSD:
7096b187 115 return " Virtual NIC QDIO";
4a71df50 116 case QETH_CARD_TYPE_IQD:
7096b187 117 return " Virtual NIC Hiper";
5113fec0 118 case QETH_CARD_TYPE_OSM:
7096b187 119 return " Virtual NIC QDIO - OSM";
5113fec0 120 case QETH_CARD_TYPE_OSX:
7096b187 121 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 122 default:
123 return " unknown";
124 }
125 } else {
126 switch (card->info.type) {
5113fec0 127 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 128 return " OSD Express";
129 case QETH_CARD_TYPE_IQD:
130 return " HiperSockets";
131 case QETH_CARD_TYPE_OSN:
132 return " OSN QDIO";
5113fec0
UB		 133 case QETH_CARD_TYPE_OSM:
134 return " OSM QDIO";
135 case QETH_CARD_TYPE_OSX:
136 return " OSX QDIO";
4a71df50
FB		 137 default:
138 return " unknown";
139 }
140 }
141 return " n/a";
142}
143
144/* max length to be returned: 14 */
145const char *qeth_get_cardname_short(struct qeth_card *card)
146{
147 if (card->info.guestlan) {
148 switch (card->info.type) {
5113fec0 149 case QETH_CARD_TYPE_OSD:
7096b187 150 return "Virt.NIC QDIO";
4a71df50 151 case QETH_CARD_TYPE_IQD:
7096b187 152 return "Virt.NIC Hiper";
5113fec0 153 case QETH_CARD_TYPE_OSM:
7096b187 154 return "Virt.NIC OSM";
5113fec0 155 case QETH_CARD_TYPE_OSX:
7096b187 156 return "Virt.NIC OSX";
4a71df50
FB		 157 default:
158 return "unknown";
159 }
160 } else {
161 switch (card->info.type) {
5113fec0 162 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 163 switch (card->info.link_type) {
164 case QETH_LINK_TYPE_FAST_ETH:
165 return "OSD_100";
166 case QETH_LINK_TYPE_HSTR:
167 return "HSTR";
168 case QETH_LINK_TYPE_GBIT_ETH:
169 return "OSD_1000";
170 case QETH_LINK_TYPE_10GBIT_ETH:
171 return "OSD_10GIG";
172 case QETH_LINK_TYPE_LANE_ETH100:
173 return "OSD_FE_LANE";
174 case QETH_LINK_TYPE_LANE_TR:
175 return "OSD_TR_LANE";
176 case QETH_LINK_TYPE_LANE_ETH1000:
177 return "OSD_GbE_LANE";
178 case QETH_LINK_TYPE_LANE:
179 return "OSD_ATM_LANE";
180 default:
181 return "OSD_Express";
182 }
183 case QETH_CARD_TYPE_IQD:
184 return "HiperSockets";
185 case QETH_CARD_TYPE_OSN:
186 return "OSN";
5113fec0
UB		 187 case QETH_CARD_TYPE_OSM:
188 return "OSM_1000";
189 case QETH_CARD_TYPE_OSX:
190 return "OSX_10GIG";
4a71df50
FB		 191 default:
192 return "unknown";
193 }
194 }
195 return "n/a";
196}
197
65d8013c
SR		 198void qeth_set_recovery_task(struct qeth_card *card)
199{
200 card->recovery_task = current;
201}
202EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
203
204void qeth_clear_recovery_task(struct qeth_card *card)
205{
206 card->recovery_task = NULL;
207}
208EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
209
210static bool qeth_is_recovery_task(const struct qeth_card *card)
211{
212 return card->recovery_task == current;
213}
214
4a71df50
FB		 215void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
216 int clear_start_mask)
217{
218 unsigned long flags;
219
220 spin_lock_irqsave(&card->thread_mask_lock, flags);
221 card->thread_allowed_mask = threads;
222 if (clear_start_mask)
223 card->thread_start_mask &= threads;
224 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
225 wake_up(&card->wait_q);
226}
227EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
228
229int qeth_threads_running(struct qeth_card *card, unsigned long threads)
230{
231 unsigned long flags;
232 int rc = 0;
233
234 spin_lock_irqsave(&card->thread_mask_lock, flags);
235 rc = (card->thread_running_mask & threads);
236 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
237 return rc;
238}
239EXPORT_SYMBOL_GPL(qeth_threads_running);
240
241int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
242{
65d8013c
SR		 243 if (qeth_is_recovery_task(card))
244 return 0;
4a71df50
FB		 245 return wait_event_interruptible(card->wait_q,
246 qeth_threads_running(card, threads) == 0);
247}
248EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
249
250void qeth_clear_working_pool_list(struct qeth_card *card)
251{
252 struct qeth_buffer_pool_entry *pool_entry, *tmp;
253
847a50fd 254 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 255 list_for_each_entry_safe(pool_entry, tmp,
256 &card->qdio.in_buf_pool.entry_list, list){
257 list_del(&pool_entry->list);
258 }
259}
260EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
261
262static int qeth_alloc_buffer_pool(struct qeth_card *card)
263{
264 struct qeth_buffer_pool_entry *pool_entry;
265 void *ptr;
266 int i, j;
267
847a50fd 268 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 269 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 270 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 271 if (!pool_entry) {
272 qeth_free_buffer_pool(card);
273 return -ENOMEM;
274 }
275 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 276 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 277 if (!ptr) {
278 while (j > 0)
279 free_page((unsigned long)
280 pool_entry->elements[--j]);
281 kfree(pool_entry);
282 qeth_free_buffer_pool(card);
283 return -ENOMEM;
284 }
285 pool_entry->elements[j] = ptr;
286 }
287 list_add(&pool_entry->init_list,
288 &card->qdio.init_pool.entry_list);
289 }
290 return 0;
291}
292
293int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
294{
847a50fd 295 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 296
297 if ((card->state != CARD_STATE_DOWN) &&
298 (card->state != CARD_STATE_RECOVER))
299 return -EPERM;
300
301 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
302 qeth_clear_working_pool_list(card);
303 qeth_free_buffer_pool(card);
304 card->qdio.in_buf_pool.buf_count = bufcnt;
305 card->qdio.init_pool.buf_count = bufcnt;
306 return qeth_alloc_buffer_pool(card);
307}
76b11f8e 308EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 309
4601ba6c
SO		 310static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
311{
6d284bde
SO		 312 if (!q)
313 return;
314
315 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 316 kfree(q);
317}
318
319static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
320{
321 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
322 int i;
323
324 if (!q)
325 return NULL;
326
6d284bde
SO		 327 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
328 kfree(q);
329 return NULL;
330 }
331
4601ba6c 332 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 333 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 334
335 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
336 return q;
337}
338
cef6ff22 339static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 340{
341 int rc;
342
343 if (card->options.cq == QETH_CQ_ENABLED) {
344 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 345 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
346 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 347 card->qdio.c_q->next_buf_to_init = 127;
348 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
349 card->qdio.no_in_queues - 1, 0,
350 127);
351 if (rc) {
352 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
353 goto out;
354 }
355 }
356 rc = 0;
357out:
358 return rc;
359}
360
cef6ff22 361static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 362{
363 int rc;
364
365 if (card->options.cq == QETH_CQ_ENABLED) {
366 int i;
367 struct qdio_outbuf_state *outbuf_states;
368
369 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 370 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 371 if (!card->qdio.c_q) {
372 rc = -1;
373 goto kmsg_out;
374 }
0da9581d 375 card->qdio.no_in_queues = 2;
4a912f98 376 card->qdio.out_bufstates =
0da9581d
EL		 377 kzalloc(card->qdio.no_out_queues *
378 QDIO_MAX_BUFFERS_PER_Q *
379 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
380 outbuf_states = card->qdio.out_bufstates;
381 if (outbuf_states == NULL) {
382 rc = -1;
383 goto free_cq_out;
384 }
385 for (i = 0; i < card->qdio.no_out_queues; ++i) {
386 card->qdio.out_qs[i]->bufstates = outbuf_states;
387 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
388 }
389 } else {
390 QETH_DBF_TEXT(SETUP, 2, "nocq");
391 card->qdio.c_q = NULL;
392 card->qdio.no_in_queues = 1;
393 }
394 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
395 rc = 0;
396out:
397 return rc;
398free_cq_out:
4601ba6c 399 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 400 card->qdio.c_q = NULL;
401kmsg_out:
402 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
403 goto out;
404}
405
cef6ff22 406static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 407{
408 if (card->qdio.c_q) {
409 --card->qdio.no_in_queues;
4601ba6c 410 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 411 card->qdio.c_q = NULL;
412 }
413 kfree(card->qdio.out_bufstates);
414 card->qdio.out_bufstates = NULL;
415}
416
cef6ff22
JW		 417static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
418 int delayed)
419{
b3332930
FB		 420 enum iucv_tx_notify n;
421
422 switch (sbalf15) {
423 case 0:
424 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
425 break;
426 case 4:
427 case 16:
428 case 17:
429 case 18:
430 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
431 TX_NOTIFY_UNREACHABLE;
432 break;
433 default:
434 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
435 TX_NOTIFY_GENERALERROR;
436 break;
437 }
438
439 return n;
440}
441
cef6ff22
JW		 442static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
443 int forced_cleanup)
0da9581d 444{
72861ae7
EL		 445 if (q->card->options.cq != QETH_CQ_ENABLED)
446 return;
447
0da9581d
EL		 448 if (q->bufs[bidx]->next_pending != NULL) {
449 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
450 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
451
452 while (c) {
453 if (forced_cleanup ||
454 atomic_read(&c->state) ==
455 QETH_QDIO_BUF_HANDLED_DELAYED) {
456 struct qeth_qdio_out_buffer *f = c;
457 QETH_CARD_TEXT(f->q->card, 5, "fp");
458 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 459 /* release here to avoid interleaving between
460 outbound tasklet and inbound tasklet
461 regarding notifications and lifecycle */
462 qeth_release_skbs(c);
463
0da9581d 464 c = f->next_pending;
18af5c17 465 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 466 head->next_pending = c;
467 kmem_cache_free(qeth_qdio_outbuf_cache, f);
468 } else {
469 head = c;
470 c = c->next_pending;
471 }
472
473 }
474 }
72861ae7
EL		 475 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
476 QETH_QDIO_BUF_HANDLED_DELAYED)) {
477 /* for recovery situations */
478 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
479 qeth_init_qdio_out_buf(q, bidx);
480 QETH_CARD_TEXT(q->card, 2, "clprecov");
481 }
0da9581d
EL		 482}
483
484
cef6ff22
JW		 485static void qeth_qdio_handle_aob(struct qeth_card *card,
486 unsigned long phys_aob_addr)
487{
0da9581d
EL		 488 struct qaob *aob;
489 struct qeth_qdio_out_buffer *buffer;
b3332930 490 enum iucv_tx_notify notification;
0da9581d
EL		 491
492 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
493 QETH_CARD_TEXT(card, 5, "haob");
494 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
495 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
496 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
497
b3332930
FB		 498 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
499 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
500 notification = TX_NOTIFY_OK;
501 } else {
18af5c17
SR		 502 WARN_ON_ONCE(atomic_read(&buffer->state) !=
503 QETH_QDIO_BUF_PENDING);
b3332930
FB		 504 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
505 notification = TX_NOTIFY_DELAYED_OK;
506 }
507
508 if (aob->aorc != 0) {
509 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
510 notification = qeth_compute_cq_notification(aob->aorc, 1);
511 }
512 qeth_notify_skbs(buffer->q, buffer, notification);
513
0da9581d
EL		 514 buffer->aob = NULL;
515 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 516 QETH_QDIO_BUF_HANDLED_DELAYED);
517
0da9581d
EL		 518 /* from here on: do not touch buffer anymore */
519 qdio_release_aob(aob);
520}
521
522static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
523{
524 return card->options.cq == QETH_CQ_ENABLED &&
525 card->qdio.c_q != NULL &&
526 queue != 0 &&
527 queue == card->qdio.no_in_queues - 1;
528}
529
17bf8c9b 530static int __qeth_issue_next_read(struct qeth_card *card)
4a71df50
FB		 531{
532 int rc;
533 struct qeth_cmd_buffer *iob;
534
847a50fd 535 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 536 if (card->read.state != CH_STATE_UP)
537 return -EIO;
538 iob = qeth_get_buffer(&card->read);
539 if (!iob) {
74eacdb9
FB		 540 dev_warn(&card->gdev->dev, "The qeth device driver "
541 "failed to recover an error on the device\n");
542 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
543 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 544 return -ENOMEM;
545 }
546 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 547 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 548 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
549 (addr_t) iob, 0, 0);
550 if (rc) {
74eacdb9
FB		 551 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
552 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 553 atomic_set(&card->read.irq_pending, 0);
908abbb5 554 card->read_or_write_problem = 1;
4a71df50
FB		 555 qeth_schedule_recovery(card);
556 wake_up(&card->wait_q);
557 }
558 return rc;
559}
560
17bf8c9b
JW		 561static int qeth_issue_next_read(struct qeth_card *card)
562{
563 int ret;
564
565 spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
566 ret = __qeth_issue_next_read(card);
567 spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
568
569 return ret;
570}
571
4a71df50
FB		 572static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
573{
574 struct qeth_reply *reply;
575
576 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
577 if (reply) {
ae695927 578 refcount_set(&reply->refcnt, 1);
4a71df50
FB		 579 atomic_set(&reply->received, 0);
580 reply->card = card;
6531084c 581 }
4a71df50
FB		 582 return reply;
583}
584
585static void qeth_get_reply(struct qeth_reply *reply)
586{
ae695927 587 refcount_inc(&reply->refcnt);
4a71df50
FB		 588}
589
590static void qeth_put_reply(struct qeth_reply *reply)
591{
ae695927 592 if (refcount_dec_and_test(&reply->refcnt))
4a71df50
FB		 593 kfree(reply);
594}
595
d11ba0c4 596static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 597 struct qeth_card *card)
598{
4a71df50 599 char *ipa_name;
d11ba0c4 600 int com = cmd->hdr.command;
4a71df50 601 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 602 if (rc)
70919e23
UB		 603 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
604 "x%X \"%s\"\n",
605 ipa_name, com, dev_name(&card->gdev->dev),
606 QETH_CARD_IFNAME(card), rc,
607 qeth_get_ipa_msg(rc));
d11ba0c4 608 else
70919e23
UB		 609 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
610 ipa_name, com, dev_name(&card->gdev->dev),
611 QETH_CARD_IFNAME(card));
4a71df50
FB		 612}
613
614static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
615 struct qeth_cmd_buffer *iob)
616{
617 struct qeth_ipa_cmd *cmd = NULL;
618
847a50fd 619 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 620 if (IS_IPA(iob->data)) {
621 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
622 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 623 if (cmd->hdr.command != IPA_CMD_SETCCID &&
624 cmd->hdr.command != IPA_CMD_DELCCID &&
625 cmd->hdr.command != IPA_CMD_MODCCID &&
626 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 627 qeth_issue_ipa_msg(cmd,
628 cmd->hdr.return_code, card);
4a71df50
FB		 629 return cmd;
630 } else {
631 switch (cmd->hdr.command) {
632 case IPA_CMD_STOPLAN:
0f54761d
SR		 633 if (cmd->hdr.return_code ==
634 IPA_RC_VEPA_TO_VEB_TRANSITION) {
635 dev_err(&card->gdev->dev,
636 "Interface %s is down because the "
637 "adjacent port is no longer in "
638 "reflective relay mode\n",
639 QETH_CARD_IFNAME(card));
640 qeth_close_dev(card);
641 } else {
642 dev_warn(&card->gdev->dev,
74eacdb9
FB		 643 "The link for interface %s on CHPID"
644 " 0x%X failed\n",
4a71df50
FB		 645 QETH_CARD_IFNAME(card),
646 card->info.chpid);
0f54761d
SR		 647 qeth_issue_ipa_msg(cmd,
648 cmd->hdr.return_code, card);
649 }
4a71df50
FB		 650 card->lan_online = 0;
651 if (card->dev && netif_carrier_ok(card->dev))
652 netif_carrier_off(card->dev);
653 return NULL;
654 case IPA_CMD_STARTLAN:
74eacdb9
FB		 655 dev_info(&card->gdev->dev,
656 "The link for %s on CHPID 0x%X has"
657 " been restored\n",
4a71df50
FB		 658 QETH_CARD_IFNAME(card),
659 card->info.chpid);
660 netif_carrier_on(card->dev);
922dc062 661 card->lan_online = 1;
1da74b1c
FB		 662 if (card->info.hwtrap)
663 card->info.hwtrap = 2;
4a71df50
FB		 664 qeth_schedule_recovery(card);
665 return NULL;
9c23f4da
EC		 666 case IPA_CMD_SETBRIDGEPORT_IQD:
667 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 668 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 669 if (card->discipline->control_event_handler
670 (card, cmd))
671 return cmd;
672 else
673 return NULL;
4a71df50
FB		 674 case IPA_CMD_MODCCID:
675 return cmd;
676 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 677 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 678 break;
679 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 680 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 681 break;
682 default:
c4cef07c 683 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 684 "but not a reply!\n");
685 break;
686 }
687 }
688 }
689 return cmd;
690}
691
692void qeth_clear_ipacmd_list(struct qeth_card *card)
693{
694 struct qeth_reply *reply, *r;
695 unsigned long flags;
696
847a50fd 697 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 698
699 spin_lock_irqsave(&card->lock, flags);
700 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
701 qeth_get_reply(reply);
702 reply->rc = -EIO;
703 atomic_inc(&reply->received);
704 list_del_init(&reply->list);
705 wake_up(&reply->wait_q);
706 qeth_put_reply(reply);
707 }
708 spin_unlock_irqrestore(&card->lock, flags);
709}
710EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
711
5113fec0
UB		 712static int qeth_check_idx_response(struct qeth_card *card,
713 unsigned char *buffer)
4a71df50
FB		 714{
715 if (!buffer)
716 return 0;
717
d11ba0c4 718 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 719 if ((buffer[2] & 0xc0) == 0xc0) {
d857e111
JW		 720 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#02x\n",
721 buffer[4]);
847a50fd
CO		 722 QETH_CARD_TEXT(card, 2, "ckidxres");
723 QETH_CARD_TEXT(card, 2, " idxterm");
724 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 725 if (buffer[4] == 0xf6) {
726 dev_err(&card->gdev->dev,
727 "The qeth device is not configured "
728 "for the OSI layer required by z/VM\n");
729 return -EPERM;
730 }
4a71df50
FB		 731 return -EIO;
732 }
733 return 0;
734}
735
bca51650
TR		 736static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
737{
738 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
739 dev_get_drvdata(&cdev->dev))->dev);
740 return card;
741}
742
4a71df50
FB		 743static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
744 __u32 len)
745{
746 struct qeth_card *card;
747
4a71df50 748 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 749 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 750 if (channel == &card->read)
751 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
752 else
753 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
754 channel->ccw.count = len;
755 channel->ccw.cda = (__u32) __pa(iob);
756}
757
758static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
759{
760 __u8 index;
761
847a50fd 762 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 763 index = channel->io_buf_no;
764 do {
765 if (channel->iob[index].state == BUF_STATE_FREE) {
766 channel->iob[index].state = BUF_STATE_LOCKED;
767 channel->io_buf_no = (channel->io_buf_no + 1) %
768 QETH_CMD_BUFFER_NO;
769 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
770 return channel->iob + index;
771 }
772 index = (index + 1) % QETH_CMD_BUFFER_NO;
773 } while (index != channel->io_buf_no);
774
775 return NULL;
776}
777
778void qeth_release_buffer(struct qeth_channel *channel,
779 struct qeth_cmd_buffer *iob)
780{
781 unsigned long flags;
782
847a50fd 783 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 784 spin_lock_irqsave(&channel->iob_lock, flags);
785 memset(iob->data, 0, QETH_BUFSIZE);
786 iob->state = BUF_STATE_FREE;
787 iob->callback = qeth_send_control_data_cb;
788 iob->rc = 0;
789 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 790 wake_up(&channel->wait_q);
4a71df50
FB		 791}
792EXPORT_SYMBOL_GPL(qeth_release_buffer);
793
794static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
795{
796 struct qeth_cmd_buffer *buffer = NULL;
797 unsigned long flags;
798
799 spin_lock_irqsave(&channel->iob_lock, flags);
800 buffer = __qeth_get_buffer(channel);
801 spin_unlock_irqrestore(&channel->iob_lock, flags);
802 return buffer;
803}
804
805struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
806{
807 struct qeth_cmd_buffer *buffer;
808 wait_event(channel->wait_q,
809 ((buffer = qeth_get_buffer(channel)) != NULL));
810 return buffer;
811}
812EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
813
814void qeth_clear_cmd_buffers(struct qeth_channel *channel)
815{
816 int cnt;
817
818 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
819 qeth_release_buffer(channel, &channel->iob[cnt]);
4a71df50
FB		 820 channel->io_buf_no = 0;
821}
822EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
823
824static void qeth_send_control_data_cb(struct qeth_channel *channel,
825 struct qeth_cmd_buffer *iob)
826{
827 struct qeth_card *card;
828 struct qeth_reply *reply, *r;
829 struct qeth_ipa_cmd *cmd;
830 unsigned long flags;
831 int keep_reply;
5113fec0 832 int rc = 0;
4a71df50 833
4a71df50 834 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 835 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 836 rc = qeth_check_idx_response(card, iob->data);
837 switch (rc) {
838 case 0:
839 break;
840 case -EIO:
4a71df50 841 qeth_clear_ipacmd_list(card);
5113fec0 842 qeth_schedule_recovery(card);
01fc3e86 843 /* fall through */
5113fec0 844 default:
4a71df50
FB		 845 goto out;
846 }
847
848 cmd = qeth_check_ipa_data(card, iob);
849 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
850 goto out;
851 /*in case of OSN : check if cmd is set */
852 if (card->info.type == QETH_CARD_TYPE_OSN &&
853 cmd &&
854 cmd->hdr.command != IPA_CMD_STARTLAN &&
855 card->osn_info.assist_cb != NULL) {
856 card->osn_info.assist_cb(card->dev, cmd);
857 goto out;
858 }
859
860 spin_lock_irqsave(&card->lock, flags);
861 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
862 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
863 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
864 qeth_get_reply(reply);
865 list_del_init(&reply->list);
866 spin_unlock_irqrestore(&card->lock, flags);
867 keep_reply = 0;
868 if (reply->callback != NULL) {
869 if (cmd) {
870 reply->offset = (__u16)((char *)cmd -
871 (char *)iob->data);
872 keep_reply = reply->callback(card,
873 reply,
874 (unsigned long)cmd);
875 } else
876 keep_reply = reply->callback(card,
877 reply,
878 (unsigned long)iob);
879 }
880 if (cmd)
881 reply->rc = (u16) cmd->hdr.return_code;
882 else if (iob->rc)
883 reply->rc = iob->rc;
884 if (keep_reply) {
885 spin_lock_irqsave(&card->lock, flags);
886 list_add_tail(&reply->list,
887 &card->cmd_waiter_list);
888 spin_unlock_irqrestore(&card->lock, flags);
889 } else {
890 atomic_inc(&reply->received);
891 wake_up(&reply->wait_q);
892 }
893 qeth_put_reply(reply);
894 goto out;
895 }
896 }
897 spin_unlock_irqrestore(&card->lock, flags);
898out:
899 memcpy(&card->seqno.pdu_hdr_ack,
900 QETH_PDU_HEADER_SEQ_NO(iob->data),
901 QETH_SEQ_NO_LENGTH);
902 qeth_release_buffer(channel, iob);
903}
904
905static int qeth_setup_channel(struct qeth_channel *channel)
906{
907 int cnt;
908
d11ba0c4 909 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 910 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 911 channel->iob[cnt].data =
b3332930 912 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 913 if (channel->iob[cnt].data == NULL)
914 break;
915 channel->iob[cnt].state = BUF_STATE_FREE;
916 channel->iob[cnt].channel = channel;
917 channel->iob[cnt].callback = qeth_send_control_data_cb;
918 channel->iob[cnt].rc = 0;
919 }
920 if (cnt < QETH_CMD_BUFFER_NO) {
921 while (cnt-- > 0)
922 kfree(channel->iob[cnt].data);
923 return -ENOMEM;
924 }
4a71df50
FB		 925 channel->io_buf_no = 0;
926 atomic_set(&channel->irq_pending, 0);
927 spin_lock_init(&channel->iob_lock);
928
929 init_waitqueue_head(&channel->wait_q);
930 return 0;
931}
932
933static int qeth_set_thread_start_bit(struct qeth_card *card,
934 unsigned long thread)
935{
936 unsigned long flags;
937
938 spin_lock_irqsave(&card->thread_mask_lock, flags);
939 if (!(card->thread_allowed_mask & thread) ||
940 (card->thread_start_mask & thread)) {
941 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
942 return -EPERM;
943 }
944 card->thread_start_mask |= thread;
945 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
946 return 0;
947}
948
949void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
950{
951 unsigned long flags;
952
953 spin_lock_irqsave(&card->thread_mask_lock, flags);
954 card->thread_start_mask &= ~thread;
955 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
956 wake_up(&card->wait_q);
957}
958EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
959
960void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
961{
962 unsigned long flags;
963
964 spin_lock_irqsave(&card->thread_mask_lock, flags);
965 card->thread_running_mask &= ~thread;
966 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1063e432 967 wake_up_all(&card->wait_q);
4a71df50
FB		 968}
969EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
970
971static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
972{
973 unsigned long flags;
974 int rc = 0;
975
976 spin_lock_irqsave(&card->thread_mask_lock, flags);
977 if (card->thread_start_mask & thread) {
978 if ((card->thread_allowed_mask & thread) &&
979 !(card->thread_running_mask & thread)) {
980 rc = 1;
981 card->thread_start_mask &= ~thread;
982 card->thread_running_mask |= thread;
983 } else
984 rc = -EPERM;
985 }
986 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
987 return rc;
988}
989
990int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
991{
992 int rc = 0;
993
994 wait_event(card->wait_q,
995 (rc = __qeth_do_run_thread(card, thread)) >= 0);
996 return rc;
997}
998EXPORT_SYMBOL_GPL(qeth_do_run_thread);
999
1000void qeth_schedule_recovery(struct qeth_card *card)
1001{
847a50fd 1002 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 1003 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
1004 schedule_work(&card->kernel_thread_starter);
1005}
1006EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
1007
1008static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
1009{
1010 int dstat, cstat;
1011 char *sense;
847a50fd 1012 struct qeth_card *card;
4a71df50
FB		 1013
1014 sense = (char *) irb->ecw;
23d805b6
PO		 1015 cstat = irb->scsw.cmd.cstat;
1016 dstat = irb->scsw.cmd.dstat;
847a50fd 1017 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1018
1019 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1020 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1021 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1022 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1023 dev_warn(&cdev->dev, "The qeth device driver "
1024 "failed to recover an error on the device\n");
5113fec0 1025 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1026 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1027 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1028 16, 1, irb, 64, 1);
1029 return 1;
1030 }
1031
1032 if (dstat & DEV_STAT_UNIT_CHECK) {
1033 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1034 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1035 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1036 return 1;
1037 }
1038 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1039 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1040 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1041 return 1;
4a71df50
FB		 1042 }
1043 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1044 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1045 return 1;
1046 }
1047 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1048 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1049 return 0;
1050 }
847a50fd 1051 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1052 return 1;
1053 }
1054 return 0;
1055}
1056
1057static long __qeth_check_irb_error(struct ccw_device *cdev,
1058 unsigned long intparm, struct irb *irb)
1059{
847a50fd
CO		 1060 struct qeth_card *card;
1061
1062 card = CARD_FROM_CDEV(cdev);
1063
e95051ff 1064 if (!card || !IS_ERR(irb))
4a71df50
FB		 1065 return 0;
1066
1067 switch (PTR_ERR(irb)) {
1068 case -EIO:
74eacdb9
FB		 1069 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1070 dev_name(&cdev->dev));
847a50fd
CO		 1071 QETH_CARD_TEXT(card, 2, "ckirberr");
1072 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1073 break;
1074 case -ETIMEDOUT:
74eacdb9
FB		 1075 dev_warn(&cdev->dev, "A hardware operation timed out"
1076 " on the device\n");
847a50fd
CO		 1077 QETH_CARD_TEXT(card, 2, "ckirberr");
1078 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1079 if (intparm == QETH_RCD_PARM) {
e95051ff 1080 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1081 card->data.state = CH_STATE_DOWN;
1082 wake_up(&card->wait_q);
1083 }
1084 }
1085 break;
1086 default:
74eacdb9
FB		 1087 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1088 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1089 QETH_CARD_TEXT(card, 2, "ckirberr");
1090 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1091 }
1092 return PTR_ERR(irb);
1093}
1094
1095static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1096 struct irb *irb)
1097{
1098 int rc;
1099 int cstat, dstat;
db71bbbd 1100 struct qeth_cmd_buffer *iob = NULL;
4a71df50
FB		 1101 struct qeth_channel *channel;
1102 struct qeth_card *card;
4a71df50
FB		 1103
1104 card = CARD_FROM_CDEV(cdev);
1105 if (!card)
1106 return;
1107
847a50fd
CO		 1108 QETH_CARD_TEXT(card, 5, "irq");
1109
4a71df50
FB		 1110 if (card->read.ccwdev == cdev) {
1111 channel = &card->read;
847a50fd 1112 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1113 } else if (card->write.ccwdev == cdev) {
1114 channel = &card->write;
847a50fd 1115 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1116 } else {
1117 channel = &card->data;
847a50fd 1118 QETH_CARD_TEXT(card, 5, "data");
4a71df50 1119 }
db71bbbd
JW		 1120
1121 if (qeth_intparm_is_iob(intparm))
1122 iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1123
1124 if (__qeth_check_irb_error(cdev, intparm, irb)) {
1125 /* IO was terminated, free its resources. */
1126 if (iob)
1127 qeth_release_buffer(iob->channel, iob);
1128 atomic_set(&channel->irq_pending, 0);
1129 wake_up(&card->wait_q);
1130 return;
1131 }
1132
4a71df50
FB		 1133 atomic_set(&channel->irq_pending, 0);
1134
23d805b6 1135 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1136 channel->state = CH_STATE_STOPPED;
1137
23d805b6 1138 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1139 channel->state = CH_STATE_HALTED;
1140
1141 /*let's wake up immediately on data channel*/
1142 if ((channel == &card->data) && (intparm != 0) &&
1143 (intparm != QETH_RCD_PARM))
1144 goto out;
1145
1146 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1147 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1148 /* we don't have to handle this further */
1149 intparm = 0;
1150 }
1151 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1152 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1153 /* we don't have to handle this further */
1154 intparm = 0;
1155 }
db71bbbd
JW		 1156
1157 cstat = irb->scsw.cmd.cstat;
1158 dstat = irb->scsw.cmd.dstat;
1159
4a71df50
FB		 1160 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1161 (dstat & DEV_STAT_UNIT_CHECK) ||
1162 (cstat)) {
1163 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1164 dev_warn(&channel->ccwdev->dev,
1165 "The qeth device driver failed to recover "
1166 "an error on the device\n");
1167 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1168 "0x%X dstat 0x%X\n",
1169 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1170 print_hex_dump(KERN_WARNING, "qeth: irb ",
1171 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1172 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1173 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1174 }
1175 if (intparm == QETH_RCD_PARM) {
1176 channel->state = CH_STATE_DOWN;
1177 goto out;
1178 }
1179 rc = qeth_get_problem(cdev, irb);
1180 if (rc) {
a6c3d939 1181 card->read_or_write_problem = 1;
28a7e4c9 1182 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1183 qeth_schedule_recovery(card);
1184 goto out;
1185 }
1186 }
1187
1188 if (intparm == QETH_RCD_PARM) {
1189 channel->state = CH_STATE_RCD_DONE;
1190 goto out;
1191 }
4a71df50
FB		 1192 if (channel == &card->data)
1193 return;
1194 if (channel == &card->read &&
1195 channel->state == CH_STATE_UP)
17bf8c9b 1196 __qeth_issue_next_read(card);
4a71df50 1197
db71bbbd
JW		 1198 if (iob && iob->callback)
1199 iob->callback(iob->channel, iob);
901e3f49 1200
4a71df50
FB		 1201out:
1202 wake_up(&card->wait_q);
1203 return;
1204}
1205
b3332930 1206static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1207 struct qeth_qdio_out_buffer *buf,
b3332930 1208 enum iucv_tx_notify notification)
4a71df50 1209{
4a71df50
FB		 1210 struct sk_buff *skb;
1211
b3332930
FB		 1212 if (skb_queue_empty(&buf->skb_list))
1213 goto out;
1214 skb = skb_peek(&buf->skb_list);
1215 while (skb) {
1216 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1217 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6bee4e26 1218 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
b3332930
FB		 1219 if (skb->sk) {
1220 struct iucv_sock *iucv = iucv_sk(skb->sk);
1221 iucv->sk_txnotify(skb, notification);
1222 }
1223 }
1224 if (skb_queue_is_last(&buf->skb_list, skb))
1225 skb = NULL;
1226 else
1227 skb = skb_queue_next(&buf->skb_list, skb);
1228 }
1229out:
1230 return;
1231}
1232
1233static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1234{
1235 struct sk_buff *skb;
72861ae7
EL		 1236 struct iucv_sock *iucv;
1237 int notify_general_error = 0;
1238
1239 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1240 notify_general_error = 1;
1241
1242 /* release may never happen from within CQ tasklet scope */
18af5c17 1243 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1244
b67d801f
UB		 1245 skb = skb_dequeue(&buf->skb_list);
1246 while (skb) {
b3332930
FB		 1247 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1248 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
6bee4e26
HW		 1249 if (notify_general_error &&
1250 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
72861ae7
EL		 1251 if (skb->sk) {
1252 iucv = iucv_sk(skb->sk);
1253 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1254 }
1255 }
63354797 1256 refcount_dec(&skb->users);
b67d801f 1257 dev_kfree_skb_any(skb);
4a71df50
FB		 1258 skb = skb_dequeue(&buf->skb_list);
1259 }
b3332930
FB		 1260}
1261
1262static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1263 struct qeth_qdio_out_buffer *buf,
1264 enum qeth_qdio_buffer_states newbufstate)
1265{
1266 int i;
1267
1268 /* is PCI flag set on buffer? */
1269 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1270 atomic_dec(&queue->set_pci_flags_count);
1271
1272 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1273 qeth_release_skbs(buf);
1274 }
4a71df50 1275 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1276 if (buf->buffer->element[i].addr && buf->is_header[i])
1277 kmem_cache_free(qeth_core_header_cache,
1278 buf->buffer->element[i].addr);
1279 buf->is_header[i] = 0;
4a71df50
FB		 1280 buf->buffer->element[i].length = 0;
1281 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1282 buf->buffer->element[i].eflags = 0;
1283 buf->buffer->element[i].sflags = 0;
4a71df50 1284 }
3ec90878
JG		 1285 buf->buffer->element[15].eflags = 0;
1286 buf->buffer->element[15].sflags = 0;
4a71df50 1287 buf->next_element_to_fill = 0;
0da9581d
EL		 1288 atomic_set(&buf->state, newbufstate);
1289}
1290
1291static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1292{
1293 int j;
1294
1295 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1296 if (!q->bufs[j])
1297 continue;
72861ae7 1298 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1299 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1300 if (free) {
1301 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1302 q->bufs[j] = NULL;
1303 }
1304 }
4a71df50
FB		 1305}
1306
1307void qeth_clear_qdio_buffers(struct qeth_card *card)
1308{
0da9581d 1309 int i;
4a71df50 1310
847a50fd 1311 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1312 /* clear outbound buffers to free skbs */
0da9581d 1313 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1314 if (card->qdio.out_qs[i]) {
0da9581d 1315 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1316 }
0da9581d 1317 }
4a71df50
FB		 1318}
1319EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1320
1321static void qeth_free_buffer_pool(struct qeth_card *card)
1322{
1323 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1324 int i = 0;
4a71df50
FB		 1325 list_for_each_entry_safe(pool_entry, tmp,
1326 &card->qdio.init_pool.entry_list, init_list){
1327 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1328 free_page((unsigned long)pool_entry->elements[i]);
1329 list_del(&pool_entry->init_list);
1330 kfree(pool_entry);
1331 }
1332}
1333
4a71df50
FB		 1334static void qeth_clean_channel(struct qeth_channel *channel)
1335{
1336 int cnt;
1337
d11ba0c4 1338 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1339 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1340 kfree(channel->iob[cnt].data);
1341}
1342
725b9c04
SO		 1343static void qeth_set_single_write_queues(struct qeth_card *card)
1344{
1345 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1346 (card->qdio.no_out_queues == 4))
1347 qeth_free_qdio_buffers(card);
1348
1349 card->qdio.no_out_queues = 1;
1350 if (card->qdio.default_out_queue != 0)
1351 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1352
1353 card->qdio.default_out_queue = 0;
1354}
1355
1356static void qeth_set_multiple_write_queues(struct qeth_card *card)
1357{
1358 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1359 (card->qdio.no_out_queues == 1)) {
1360 qeth_free_qdio_buffers(card);
1361 card->qdio.default_out_queue = 2;
1362 }
1363 card->qdio.no_out_queues = 4;
1364}
1365
1366static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1367{
4a71df50 1368 struct ccw_device *ccwdev;
ded27d8d 1369 struct channel_path_desc_fmt0 *chp_dsc;
4a71df50 1370
5113fec0 1371 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1372
1373 ccwdev = card->data.ccwdev;
725b9c04
SO		 1374 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1375 if (!chp_dsc)
1376 goto out;
1377
1378 card->info.func_level = 0x4100 + chp_dsc->desc;
1379 if (card->info.type == QETH_CARD_TYPE_IQD)
1380 goto out;
1381
1382 /* CHPP field bit 6 == 1 -> single queue */
1383 if ((chp_dsc->chpp & 0x02) == 0x02)
1384 qeth_set_single_write_queues(card);
1385 else
1386 qeth_set_multiple_write_queues(card);
1387out:
1388 kfree(chp_dsc);
5113fec0
UB		 1389 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1390 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1391}
1392
1393static void qeth_init_qdio_info(struct qeth_card *card)
1394{
d11ba0c4 1395 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1396 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1397 /* inbound */
ed2e93ef 1398 card->qdio.no_in_queues = 1;
4a71df50 1399 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1400 if (card->info.type == QETH_CARD_TYPE_IQD)
1401 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1402 else
1403 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1404 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1405 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1406 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1407}
1408
1409static void qeth_set_intial_options(struct qeth_card *card)
1410{
1411 card->options.route4.type = NO_ROUTER;
1412 card->options.route6.type = NO_ROUTER;
4a71df50 1413 card->options.fake_broadcast = 0;
4a71df50
FB		 1414 card->options.performance_stats = 0;
1415 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1416 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1417 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1418}
1419
1420static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1421{
1422 unsigned long flags;
1423 int rc = 0;
1424
1425 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1426 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1427 (u8) card->thread_start_mask,
1428 (u8) card->thread_allowed_mask,
1429 (u8) card->thread_running_mask);
1430 rc = (card->thread_start_mask & thread);
1431 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1432 return rc;
1433}
1434
1435static void qeth_start_kernel_thread(struct work_struct *work)
1436{
3f36b890 1437 struct task_struct *ts;
4a71df50
FB		 1438 struct qeth_card *card = container_of(work, struct qeth_card,
1439 kernel_thread_starter);
847a50fd 1440 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1441
1442 if (card->read.state != CH_STATE_UP &&
1443 card->write.state != CH_STATE_UP)
1444 return;
3f36b890 1445 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1446 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1447 "qeth_recover");
3f36b890
FB		 1448 if (IS_ERR(ts)) {
1449 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1450 qeth_clear_thread_running_bit(card,
1451 QETH_RECOVER_THREAD);
1452 }
1453 }
4a71df50
FB		 1454}
1455
bca51650 1456static void qeth_buffer_reclaim_work(struct work_struct *);
4a71df50
FB		 1457static int qeth_setup_card(struct qeth_card *card)
1458{
1459
d11ba0c4
PT		 1460 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1461 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1462
1463 card->read.state = CH_STATE_DOWN;
1464 card->write.state = CH_STATE_DOWN;
1465 card->data.state = CH_STATE_DOWN;
1466 card->state = CARD_STATE_DOWN;
1467 card->lan_online = 0;
908abbb5 1468 card->read_or_write_problem = 0;
4a71df50
FB		 1469 card->dev = NULL;
1470 spin_lock_init(&card->vlanlock);
1471 spin_lock_init(&card->mclock);
4a71df50
FB		 1472 spin_lock_init(&card->lock);
1473 spin_lock_init(&card->ip_lock);
1474 spin_lock_init(&card->thread_mask_lock);
c4949f07 1475 mutex_init(&card->conf_mutex);
9dc48ccc 1476 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1477 card->thread_start_mask = 0;
1478 card->thread_allowed_mask = 0;
1479 card->thread_running_mask = 0;
1480 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1481 INIT_LIST_HEAD(&card->cmd_waiter_list);
1482 init_waitqueue_head(&card->wait_q);
25985edc 1483 /* initial options */
4a71df50
FB		 1484 qeth_set_intial_options(card);
1485 /* IP address takeover */
1486 INIT_LIST_HEAD(&card->ipato.entries);
7fbd9493 1487 card->ipato.enabled = false;
02f510f3
JW		 1488 card->ipato.invert4 = false;
1489 card->ipato.invert6 = false;
4a71df50
FB		 1490 /* init QDIO stuff */
1491 qeth_init_qdio_info(card);
b3332930 1492 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1493 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1494 return 0;
1495}
1496
6bcac508
MS		 1497static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1498{
1499 struct qeth_card *card = container_of(slr, struct qeth_card,
1500 qeth_service_level);
0d788c7d
KDW		 1501 if (card->info.mcl_level[0])
1502 seq_printf(m, "qeth: %s firmware level %s\n",
1503 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1504}
1505
4a71df50
FB		 1506static struct qeth_card *qeth_alloc_card(void)
1507{
1508 struct qeth_card *card;
1509
d11ba0c4 1510 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1511 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1512 if (!card)
76b11f8e 1513 goto out;
d11ba0c4 1514 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1515 if (qeth_setup_channel(&card->read))
1516 goto out_ip;
1517 if (qeth_setup_channel(&card->write))
1518 goto out_channel;
4a71df50 1519 card->options.layer2 = -1;
6bcac508
MS		 1520 card->qeth_service_level.seq_print = qeth_core_sl_print;
1521 register_service_level(&card->qeth_service_level);
4a71df50 1522 return card;
76b11f8e
UB		 1523
1524out_channel:
1525 qeth_clean_channel(&card->read);
1526out_ip:
76b11f8e
UB		 1527 kfree(card);
1528out:
1529 return NULL;
4a71df50
FB		 1530}
1531
ed2e93ef 1532static void qeth_determine_card_type(struct qeth_card *card)
4a71df50 1533{
d11ba0c4 1534 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1535
1536 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1537 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
ed2e93ef
JW		 1538 card->info.type = CARD_RDEV(card)->id.driver_info;
1539 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1540 if (card->info.type == QETH_CARD_TYPE_IQD)
1541 card->info.is_multicast_different = 0x0103;
1542 qeth_update_from_chp_desc(card);
4a71df50
FB		 1543}
1544
1545static int qeth_clear_channel(struct qeth_channel *channel)
1546{
1547 unsigned long flags;
1548 struct qeth_card *card;
1549 int rc;
1550
4a71df50 1551 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1552 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1553 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1554 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1555 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1556
1557 if (rc)
1558 return rc;
1559 rc = wait_event_interruptible_timeout(card->wait_q,
1560 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1561 if (rc == -ERESTARTSYS)
1562 return rc;
1563 if (channel->state != CH_STATE_STOPPED)
1564 return -ETIME;
1565 channel->state = CH_STATE_DOWN;
1566 return 0;
1567}
1568
1569static int qeth_halt_channel(struct qeth_channel *channel)
1570{
1571 unsigned long flags;
1572 struct qeth_card *card;
1573 int rc;
1574
4a71df50 1575 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1576 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1577 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1578 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1579 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1580
1581 if (rc)
1582 return rc;
1583 rc = wait_event_interruptible_timeout(card->wait_q,
1584 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1585 if (rc == -ERESTARTSYS)
1586 return rc;
1587 if (channel->state != CH_STATE_HALTED)
1588 return -ETIME;
1589 return 0;
1590}
1591
1592static int qeth_halt_channels(struct qeth_card *card)
1593{
1594 int rc1 = 0, rc2 = 0, rc3 = 0;
1595
847a50fd 1596 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1597 rc1 = qeth_halt_channel(&card->read);
1598 rc2 = qeth_halt_channel(&card->write);
1599 rc3 = qeth_halt_channel(&card->data);
1600 if (rc1)
1601 return rc1;
1602 if (rc2)
1603 return rc2;
1604 return rc3;
1605}
1606
1607static int qeth_clear_channels(struct qeth_card *card)
1608{
1609 int rc1 = 0, rc2 = 0, rc3 = 0;
1610
847a50fd 1611 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1612 rc1 = qeth_clear_channel(&card->read);
1613 rc2 = qeth_clear_channel(&card->write);
1614 rc3 = qeth_clear_channel(&card->data);
1615 if (rc1)
1616 return rc1;
1617 if (rc2)
1618 return rc2;
1619 return rc3;
1620}
1621
1622static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1623{
1624 int rc = 0;
1625
847a50fd 1626 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1627
1628 if (halt)
1629 rc = qeth_halt_channels(card);
1630 if (rc)
1631 return rc;
1632 return qeth_clear_channels(card);
1633}
1634
1635int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1636{
1637 int rc = 0;
1638
847a50fd 1639 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1640 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1641 QETH_QDIO_CLEANING)) {
1642 case QETH_QDIO_ESTABLISHED:
1643 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1644 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1645 QDIO_FLAG_CLEANUP_USING_HALT);
1646 else
cc961d40 1647 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1648 QDIO_FLAG_CLEANUP_USING_CLEAR);
1649 if (rc)
847a50fd 1650 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1651 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1652 break;
1653 case QETH_QDIO_CLEANING:
1654 return rc;
1655 default:
1656 break;
1657 }
1658 rc = qeth_clear_halt_card(card, use_halt);
1659 if (rc)
847a50fd 1660 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1661 card->state = CARD_STATE_DOWN;
1662 return rc;
1663}
1664EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1665
1666static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1667 int *length)
1668{
1669 struct ciw *ciw;
1670 char *rcd_buf;
1671 int ret;
1672 struct qeth_channel *channel = &card->data;
1673 unsigned long flags;
1674
1675 /*
1676 * scan for RCD command in extended SenseID data
1677 */
1678 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1679 if (!ciw || ciw->cmd == 0)
1680 return -EOPNOTSUPP;
1681 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1682 if (!rcd_buf)
1683 return -ENOMEM;
1684
1685 channel->ccw.cmd_code = ciw->cmd;
1686 channel->ccw.cda = (__u32) __pa(rcd_buf);
1687 channel->ccw.count = ciw->count;
1688 channel->ccw.flags = CCW_FLAG_SLI;
1689 channel->state = CH_STATE_RCD;
1690 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1691 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1692 QETH_RCD_PARM, LPM_ANYPATH, 0,
1693 QETH_RCD_TIMEOUT);
1694 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1695 if (!ret)
1696 wait_event(card->wait_q,
1697 (channel->state == CH_STATE_RCD_DONE ||
1698 channel->state == CH_STATE_DOWN));
1699 if (channel->state == CH_STATE_DOWN)
1700 ret = -EIO;
1701 else
1702 channel->state = CH_STATE_DOWN;
1703 if (ret) {
1704 kfree(rcd_buf);
1705 *buffer = NULL;
1706 *length = 0;
1707 } else {
1708 *length = ciw->count;
1709 *buffer = rcd_buf;
1710 }
1711 return ret;
1712}
1713
a60389ab 1714static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1715{
a60389ab 1716 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1717 card->info.chpid = prcd[30];
1718 card->info.unit_addr2 = prcd[31];
1719 card->info.cula = prcd[63];
1720 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1721 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1722}
1723
615dff22
JW		 1724static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
1725{
1726 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1727 struct diag26c_vnic_resp *response = NULL;
1728 struct diag26c_vnic_req *request = NULL;
1729 struct ccw_dev_id id;
1730 char userid[80];
1731 int rc = 0;
1732
1733 QETH_DBF_TEXT(SETUP, 2, "vmlayer");
1734
1735 cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
1736 if (rc)
1737 goto out;
1738
1739 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
1740 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
1741 if (!request || !response) {
1742 rc = -ENOMEM;
1743 goto out;
1744 }
1745
1746 ccw_device_get_id(CARD_RDEV(card), &id);
1747 request->resp_buf_len = sizeof(*response);
1748 request->resp_version = DIAG26C_VERSION6_VM65918;
1749 request->req_format = DIAG26C_VNIC_INFO;
1750 ASCEBC(userid, 8);
1751 memcpy(&request->sys_name, userid, 8);
1752 request->devno = id.devno;
1753
1754 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1755 rc = diag26c(request, response, DIAG26C_PORT_VNIC);
1756 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1757 if (rc)
1758 goto out;
1759 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
1760
1761 if (request->resp_buf_len < sizeof(*response) ||
1762 response->version != request->resp_version) {
1763 rc = -EIO;
1764 goto out;
1765 }
1766
1767 if (response->protocol == VNIC_INFO_PROT_L2)
1768 disc = QETH_DISCIPLINE_LAYER2;
1769 else if (response->protocol == VNIC_INFO_PROT_L3)
1770 disc = QETH_DISCIPLINE_LAYER3;
1771
1772out:
1773 kfree(response);
1774 kfree(request);
1775 if (rc)
1776 QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
1777 return disc;
1778}
1779
c70eb09d
JW		 1780/* Determine whether the device requires a specific layer discipline */
1781static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1782{
615dff22
JW		 1783 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1784
c70eb09d 1785 if (card->info.type == QETH_CARD_TYPE_OSM ||
615dff22
JW		 1786 card->info.type == QETH_CARD_TYPE_OSN)
1787 disc = QETH_DISCIPLINE_LAYER2;
1788 else if (card->info.guestlan)
1789 disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
1790 QETH_DISCIPLINE_LAYER3 :
1791 qeth_vm_detect_layer(card);
1792
1793 switch (disc) {
1794 case QETH_DISCIPLINE_LAYER2:
c70eb09d 1795 QETH_DBF_TEXT(SETUP, 3, "force l2");
615dff22
JW		 1796 break;
1797 case QETH_DISCIPLINE_LAYER3:
c70eb09d 1798 QETH_DBF_TEXT(SETUP, 3, "force l3");
615dff22
JW		 1799 break;
1800 default:
1801 QETH_DBF_TEXT(SETUP, 3, "force no");
c70eb09d
JW		 1802 }
1803
615dff22 1804 return disc;
c70eb09d
JW		 1805}
1806
a60389ab
EL		 1807static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1808{
1809 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1810
e6e056ba 1811 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1812 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1813 card->info.blkt.time_total = 0;
1814 card->info.blkt.inter_packet = 0;
1815 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1816 } else {
1817 card->info.blkt.time_total = 250;
1818 card->info.blkt.inter_packet = 5;
1819 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1820 }
4a71df50
FB		 1821}
1822
1823static void qeth_init_tokens(struct qeth_card *card)
1824{
1825 card->token.issuer_rm_w = 0x00010103UL;
1826 card->token.cm_filter_w = 0x00010108UL;
1827 card->token.cm_connection_w = 0x0001010aUL;
1828 card->token.ulp_filter_w = 0x0001010bUL;
1829 card->token.ulp_connection_w = 0x0001010dUL;
1830}
1831
1832static void qeth_init_func_level(struct qeth_card *card)
1833{
5113fec0
UB		 1834 switch (card->info.type) {
1835 case QETH_CARD_TYPE_IQD:
6298263a 1836 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1837 break;
1838 case QETH_CARD_TYPE_OSD:
0132951e 1839 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1840 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1841 break;
1842 default:
1843 break;
4a71df50
FB		 1844 }
1845}
1846
4a71df50
FB		 1847static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1848 void (*idx_reply_cb)(struct qeth_channel *,
1849 struct qeth_cmd_buffer *))
1850{
1851 struct qeth_cmd_buffer *iob;
1852 unsigned long flags;
1853 int rc;
1854 struct qeth_card *card;
1855
d11ba0c4 1856 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1857 card = CARD_FROM_CDEV(channel->ccwdev);
1858 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1859 if (!iob)
1860 return -ENOMEM;
4a71df50
FB		 1861 iob->callback = idx_reply_cb;
1862 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1863 channel->ccw.count = QETH_BUFSIZE;
1864 channel->ccw.cda = (__u32) __pa(iob->data);
1865
1866 wait_event(card->wait_q,
1867 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1868 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50 1869 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
db71bbbd
JW		 1870 rc = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1871 (addr_t) iob, 0, 0, QETH_TIMEOUT);
4a71df50
FB		 1872 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1873
1874 if (rc) {
14cc21b6 1875 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1876 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1877 atomic_set(&channel->irq_pending, 0);
1878 wake_up(&card->wait_q);
1879 return rc;
1880 }
1881 rc = wait_event_interruptible_timeout(card->wait_q,
1882 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1883 if (rc == -ERESTARTSYS)
1884 return rc;
1885 if (channel->state != CH_STATE_UP) {
1886 rc = -ETIME;
d11ba0c4 1887 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1888 } else
1889 rc = 0;
1890 return rc;
1891}
1892
1893static int qeth_idx_activate_channel(struct qeth_channel *channel,
1894 void (*idx_reply_cb)(struct qeth_channel *,
1895 struct qeth_cmd_buffer *))
1896{
1897 struct qeth_card *card;
1898 struct qeth_cmd_buffer *iob;
1899 unsigned long flags;
1900 __u16 temp;
1901 __u8 tmp;
1902 int rc;
f06f6f32 1903 struct ccw_dev_id temp_devid;
4a71df50
FB		 1904
1905 card = CARD_FROM_CDEV(channel->ccwdev);
1906
d11ba0c4 1907 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1908
1909 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1910 if (!iob)
1911 return -ENOMEM;
4a71df50
FB		 1912 iob->callback = idx_reply_cb;
1913 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1914 channel->ccw.count = IDX_ACTIVATE_SIZE;
1915 channel->ccw.cda = (__u32) __pa(iob->data);
1916 if (channel == &card->write) {
1917 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1918 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1919 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1920 card->seqno.trans_hdr++;
1921 } else {
1922 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1923 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1924 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1925 }
1926 tmp = ((__u8)card->info.portno) | 0x80;
1927 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1928 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1929 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1930 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1931 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1932 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1933 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1934 temp = (card->info.cula << 8) + card->info.unit_addr2;
1935 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1936
1937 wait_event(card->wait_q,
1938 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1939 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50 1940 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
db71bbbd
JW		 1941 rc = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1942 (addr_t) iob, 0, 0, QETH_TIMEOUT);
4a71df50
FB		 1943 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1944
1945 if (rc) {
14cc21b6
FB		 1946 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1947 rc);
d11ba0c4 1948 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1949 atomic_set(&channel->irq_pending, 0);
1950 wake_up(&card->wait_q);
1951 return rc;
1952 }
1953 rc = wait_event_interruptible_timeout(card->wait_q,
1954 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1955 if (rc == -ERESTARTSYS)
1956 return rc;
1957 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1958 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1959 " failed to recover an error on the device\n");
1960 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1961 dev_name(&channel->ccwdev->dev));
d11ba0c4 1962 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1963 return -ETIME;
1964 }
1965 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1966}
1967
1968static int qeth_peer_func_level(int level)
1969{
1970 if ((level & 0xff) == 8)
1971 return (level & 0xff) + 0x400;
1972 if (((level >> 8) & 3) == 1)
1973 return (level & 0xff) + 0x200;
1974 return level;
1975}
1976
1977static void qeth_idx_write_cb(struct qeth_channel *channel,
1978 struct qeth_cmd_buffer *iob)
1979{
1980 struct qeth_card *card;
1981 __u16 temp;
1982
d11ba0c4 1983 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1984
1985 if (channel->state == CH_STATE_DOWN) {
1986 channel->state = CH_STATE_ACTIVATING;
1987 goto out;
1988 }
1989 card = CARD_FROM_CDEV(channel->ccwdev);
1990
1991 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1992 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1993 dev_err(&card->write.ccwdev->dev,
1994 "The adapter is used exclusively by another "
1995 "host\n");
4a71df50 1996 else
74eacdb9
FB		 1997 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1998 " negative reply\n",
1999 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 2000 goto out;
2001 }
2002 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
2003 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 2004 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
2005 "function level mismatch (sent: 0x%x, received: "
2006 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
2007 card->info.func_level, temp);
4a71df50
FB		 2008 goto out;
2009 }
2010 channel->state = CH_STATE_UP;
2011out:
2012 qeth_release_buffer(channel, iob);
2013}
2014
2015static void qeth_idx_read_cb(struct qeth_channel *channel,
2016 struct qeth_cmd_buffer *iob)
2017{
2018 struct qeth_card *card;
2019 __u16 temp;
2020
d11ba0c4 2021 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 2022 if (channel->state == CH_STATE_DOWN) {
2023 channel->state = CH_STATE_ACTIVATING;
2024 goto out;
2025 }
2026
2027 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 2028 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 2029 goto out;
2030
2031 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 2032 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
2033 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 2034 dev_err(&card->write.ccwdev->dev,
2035 "The adapter is used exclusively by another "
2036 "host\n");
5113fec0
UB		 2037 break;
2038 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 2039 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 2040 dev_err(&card->read.ccwdev->dev,
2041 "Setting the device online failed because of "
01fc3e86 2042 "insufficient authorization\n");
5113fec0
UB		 2043 break;
2044 default:
74eacdb9
FB		 2045 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
2046 " negative reply\n",
2047 dev_name(&card->read.ccwdev->dev));
5113fec0 2048 }
01fc3e86
UB		 2049 QETH_CARD_TEXT_(card, 2, "idxread%c",
2050 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 2051 goto out;
2052 }
2053
4a71df50
FB		 2054 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
2055 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 2056 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
2057 "level mismatch (sent: 0x%x, received: 0x%x)\n",
2058 dev_name(&card->read.ccwdev->dev),
2059 card->info.func_level, temp);
4a71df50
FB		 2060 goto out;
2061 }
2062 memcpy(&card->token.issuer_rm_r,
2063 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2064 QETH_MPC_TOKEN_LENGTH);
2065 memcpy(&card->info.mcl_level[0],
2066 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2067 channel->state = CH_STATE_UP;
2068out:
2069 qeth_release_buffer(channel, iob);
2070}
2071
2072void qeth_prepare_control_data(struct qeth_card *card, int len,
2073 struct qeth_cmd_buffer *iob)
2074{
2075 qeth_setup_ccw(&card->write, iob->data, len);
2076 iob->callback = qeth_release_buffer;
2077
2078 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2079 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2080 card->seqno.trans_hdr++;
2081 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2082 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2083 card->seqno.pdu_hdr++;
2084 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2085 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2086 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2087}
2088EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2089
efbbc1d5
EC		 2090/**
2091 * qeth_send_control_data() - send control command to the card
2092 * @card: qeth_card structure pointer
2093 * @len: size of the command buffer
2094 * @iob: qeth_cmd_buffer pointer
2095 * @reply_cb: callback function pointer
2096 * @cb_card: pointer to the qeth_card structure
2097 * @cb_reply: pointer to the qeth_reply structure
2098 * @cb_cmd: pointer to the original iob for non-IPA
2099 * commands, or to the qeth_ipa_cmd structure
2100 * for the IPA commands.
2101 * @reply_param: private pointer passed to the callback
2102 *
2103 * Returns the value of the `return_code' field of the response
2104 * block returned from the hardware, or other error indication.
2105 * Value of zero indicates successful execution of the command.
2106 *
2107 * Callback function gets called one or more times, with cb_cmd
2108 * pointing to the response returned by the hardware. Callback
2109 * function must return non-zero if more reply blocks are expected,
2110 * and zero if the last or only reply block is received. Callback
2111 * function can get the value of the reply_param pointer from the
2112 * field 'param' of the structure qeth_reply.
2113 */
2114
4a71df50
FB		 2115int qeth_send_control_data(struct qeth_card *card, int len,
2116 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2117 int (*reply_cb)(struct qeth_card *cb_card,
2118 struct qeth_reply *cb_reply,
2119 unsigned long cb_cmd),
4a71df50
FB		 2120 void *reply_param)
2121{
2122 int rc;
2123 unsigned long flags;
2124 struct qeth_reply *reply = NULL;
7834cd5a 2125 unsigned long timeout, event_timeout;
1c5b2216 2126 struct qeth_ipa_cmd *cmd = NULL;
4a71df50 2127
847a50fd 2128 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2129
908abbb5
UB		 2130 if (card->read_or_write_problem) {
2131 qeth_release_buffer(iob->channel, iob);
2132 return -EIO;
2133 }
4a71df50
FB		 2134 reply = qeth_alloc_reply(card);
2135 if (!reply) {
4a71df50
FB		 2136 return -ENOMEM;
2137 }
2138 reply->callback = reply_cb;
2139 reply->param = reply_param;
d22ffb5a 2140
4a71df50 2141 init_waitqueue_head(&reply->wait_q);
4a71df50
FB		 2142
2143 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
4a71df50 2144
1c5b2216
JW		 2145 if (IS_IPA(iob->data)) {
2146 cmd = __ipa_cmd(iob);
d22ffb5a
JW		 2147 cmd->hdr.seqno = card->seqno.ipa++;
2148 reply->seqno = cmd->hdr.seqno;
7834cd5a 2149 event_timeout = QETH_IPA_TIMEOUT;
1c5b2216 2150 } else {
d22ffb5a 2151 reply->seqno = QETH_IDX_COMMAND_SEQNO;
7834cd5a 2152 event_timeout = QETH_TIMEOUT;
1c5b2216 2153 }
d22ffb5a
JW		 2154 qeth_prepare_control_data(card, len, iob);
2155
2156 spin_lock_irqsave(&card->lock, flags);
2157 list_add_tail(&reply->list, &card->cmd_waiter_list);
2158 spin_unlock_irqrestore(&card->lock, flags);
1c5b2216 2159
7834cd5a 2160 timeout = jiffies + event_timeout;
4a71df50 2161
847a50fd 2162 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50 2163 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
db71bbbd
JW		 2164 rc = ccw_device_start_timeout(CARD_WDEV(card), &card->write.ccw,
2165 (addr_t) iob, 0, 0, event_timeout);
4a71df50
FB		 2166 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2167 if (rc) {
74eacdb9
FB		 2168 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2169 "ccw_device_start rc = %i\n",
2170 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2171 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2172 spin_lock_irqsave(&card->lock, flags);
2173 list_del_init(&reply->list);
2174 qeth_put_reply(reply);
2175 spin_unlock_irqrestore(&card->lock, flags);
2176 qeth_release_buffer(iob->channel, iob);
2177 atomic_set(&card->write.irq_pending, 0);
2178 wake_up(&card->wait_q);
2179 return rc;
2180 }
5b54e16f
FB		 2181
2182 /* we have only one long running ipassist, since we can ensure
2183 process context of this command we can sleep */
1c5b2216
JW		 2184 if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
2185 cmd->hdr.prot_version == QETH_PROT_IPV4) {
5b54e16f 2186 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2187 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2188 goto time_err;
2189 } else {
2190 while (!atomic_read(&reply->received)) {
2191 if (time_after(jiffies, timeout))
2192 goto time_err;
2193 cpu_relax();
6531084c 2194 }
5b54e16f
FB		 2195 }
2196
2197 rc = reply->rc;
2198 qeth_put_reply(reply);
2199 return rc;
2200
2201time_err:
70919e23 2202 reply->rc = -ETIME;
5b54e16f
FB		 2203 spin_lock_irqsave(&reply->card->lock, flags);
2204 list_del_init(&reply->list);
2205 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2206 atomic_inc(&reply->received);
4a71df50
FB		 2207 rc = reply->rc;
2208 qeth_put_reply(reply);
2209 return rc;
2210}
2211EXPORT_SYMBOL_GPL(qeth_send_control_data);
2212
2213static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2214 unsigned long data)
2215{
2216 struct qeth_cmd_buffer *iob;
2217
d11ba0c4 2218 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2219
2220 iob = (struct qeth_cmd_buffer *) data;
2221 memcpy(&card->token.cm_filter_r,
2222 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2223 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2224 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2225 return 0;
2226}
2227
2228static int qeth_cm_enable(struct qeth_card *card)
2229{
2230 int rc;
2231 struct qeth_cmd_buffer *iob;
2232
d11ba0c4 2233 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2234
2235 iob = qeth_wait_for_buffer(&card->write);
2236 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2237 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2238 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2239 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2240 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2241
2242 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2243 qeth_cm_enable_cb, NULL);
2244 return rc;
2245}
2246
2247static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2248 unsigned long data)
2249{
2250
2251 struct qeth_cmd_buffer *iob;
2252
d11ba0c4 2253 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2254
2255 iob = (struct qeth_cmd_buffer *) data;
2256 memcpy(&card->token.cm_connection_r,
2257 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2258 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2259 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2260 return 0;
2261}
2262
2263static int qeth_cm_setup(struct qeth_card *card)
2264{
2265 int rc;
2266 struct qeth_cmd_buffer *iob;
2267
d11ba0c4 2268 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2269
2270 iob = qeth_wait_for_buffer(&card->write);
2271 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2272 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2273 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2274 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2275 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2276 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2277 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2278 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2279 qeth_cm_setup_cb, NULL);
2280 return rc;
2281
2282}
2283
cef6ff22 2284static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
4a71df50
FB		 2285{
2286 switch (card->info.type) {
4a71df50
FB		 2287 case QETH_CARD_TYPE_IQD:
2288 return card->info.max_mtu;
5113fec0 2289 case QETH_CARD_TYPE_OSD:
5113fec0 2290 case QETH_CARD_TYPE_OSX:
6e6f472d
JW		 2291 if (!card->options.layer2)
2292 return ETH_DATA_LEN - 8; /* L3: allow for LLC + SNAP */
2293 /* fall through */
4a71df50 2294 default:
6e6f472d 2295 return ETH_DATA_LEN;
4a71df50
FB		 2296 }
2297}
2298
cef6ff22 2299static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2300{
2301 switch (framesize) {
2302 case 0x4000:
2303 return 8192;
2304 case 0x6000:
2305 return 16384;
2306 case 0xa000:
2307 return 32768;
2308 case 0xffff:
2309 return 57344;
2310 default:
2311 return 0;
2312 }
2313}
2314
cef6ff22 2315static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
4a71df50
FB		 2316{
2317 switch (card->info.type) {
5113fec0
UB		 2318 case QETH_CARD_TYPE_OSD:
2319 case QETH_CARD_TYPE_OSM:
2320 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2321 case QETH_CARD_TYPE_IQD:
2322 return ((mtu >= 576) &&
9853b97b 2323 (mtu <= card->info.max_mtu));
4a71df50 2324 case QETH_CARD_TYPE_OSN:
4a71df50
FB		 2325 default:
2326 return 1;
2327 }
2328}
2329
2330static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2331 unsigned long data)
2332{
2333
2334 __u16 mtu, framesize;
2335 __u16 len;
2336 __u8 link_type;
2337 struct qeth_cmd_buffer *iob;
2338
d11ba0c4 2339 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2340
2341 iob = (struct qeth_cmd_buffer *) data;
2342 memcpy(&card->token.ulp_filter_r,
2343 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2344 QETH_MPC_TOKEN_LENGTH);
9853b97b 2345 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2346 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2347 mtu = qeth_get_mtu_outof_framesize(framesize);
2348 if (!mtu) {
2349 iob->rc = -EINVAL;
d11ba0c4 2350 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2351 return 0;
2352 }
8b2e18f6
UB		 2353 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2354 /* frame size has changed */
2355 if (card->dev &&
2356 ((card->dev->mtu == card->info.initial_mtu) ||
2357 (card->dev->mtu > mtu)))
2358 card->dev->mtu = mtu;
2359 qeth_free_qdio_buffers(card);
2360 }
4a71df50 2361 card->info.initial_mtu = mtu;
8b2e18f6 2362 card->info.max_mtu = mtu;
4a71df50
FB		 2363 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2364 } else {
9853b97b
FB		 2365 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2366 iob->data);
fe44014a
SR		 2367 card->info.initial_mtu = min(card->info.max_mtu,
2368 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2369 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2370 }
2371
2372 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2373 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2374 memcpy(&link_type,
2375 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2376 card->info.link_type = link_type;
2377 } else
2378 card->info.link_type = 0;
01fc3e86 2379 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2380 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2381 return 0;
2382}
2383
2384static int qeth_ulp_enable(struct qeth_card *card)
2385{
2386 int rc;
2387 char prot_type;
2388 struct qeth_cmd_buffer *iob;
2389
2390 /*FIXME: trace view callbacks*/
d11ba0c4 2391 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2392
2393 iob = qeth_wait_for_buffer(&card->write);
2394 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2395
2396 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2397 (__u8) card->info.portno;
2398 if (card->options.layer2)
2399 if (card->info.type == QETH_CARD_TYPE_OSN)
2400 prot_type = QETH_PROT_OSN2;
2401 else
2402 prot_type = QETH_PROT_LAYER2;
2403 else
2404 prot_type = QETH_PROT_TCPIP;
2405
2406 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2407 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2408 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2409 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2410 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2411 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2412 qeth_ulp_enable_cb, NULL);
2413 return rc;
2414
2415}
2416
2417static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2418 unsigned long data)
2419{
2420 struct qeth_cmd_buffer *iob;
2421
d11ba0c4 2422 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2423
2424 iob = (struct qeth_cmd_buffer *) data;
2425 memcpy(&card->token.ulp_connection_r,
2426 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2427 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2428 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2429 3)) {
2430 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2431 dev_err(&card->gdev->dev, "A connection could not be "
2432 "established because of an OLM limit\n");
bbb822a8 2433 iob->rc = -EMLINK;
65a1f898 2434 }
d11ba0c4 2435 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2436 return 0;
4a71df50
FB		 2437}
2438
2439static int qeth_ulp_setup(struct qeth_card *card)
2440{
2441 int rc;
2442 __u16 temp;
2443 struct qeth_cmd_buffer *iob;
2444 struct ccw_dev_id dev_id;
2445
d11ba0c4 2446 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2447
2448 iob = qeth_wait_for_buffer(&card->write);
2449 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2450
2451 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2452 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2453 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2454 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2455 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2456 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2457
2458 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2459 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2460 temp = (card->info.cula << 8) + card->info.unit_addr2;
2461 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2462 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2463 qeth_ulp_setup_cb, NULL);
2464 return rc;
2465}
2466
0da9581d
EL		 2467static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2468{
2469 int rc;
2470 struct qeth_qdio_out_buffer *newbuf;
2471
2472 rc = 0;
2473 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2474 if (!newbuf) {
2475 rc = -ENOMEM;
2476 goto out;
2477 }
d445a4e2 2478 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2479 skb_queue_head_init(&newbuf->skb_list);
2480 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2481 newbuf->q = q;
2482 newbuf->aob = NULL;
2483 newbuf->next_pending = q->bufs[bidx];
2484 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2485 q->bufs[bidx] = newbuf;
2486 if (q->bufstates) {
2487 q->bufstates[bidx].user = newbuf;
2488 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2489 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2490 QETH_CARD_TEXT_(q->card, 2, "%lx",
2491 (long) newbuf->next_pending);
2492 }
2493out:
2494 return rc;
2495}
2496
d445a4e2
SO		 2497static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2498{
2499 if (!q)
2500 return;
2501
2502 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2503 kfree(q);
2504}
2505
2506static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2507{
2508 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2509
2510 if (!q)
2511 return NULL;
2512
2513 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2514 kfree(q);
2515 return NULL;
2516 }
2517 return q;
2518}
0da9581d 2519
4a71df50
FB		 2520static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2521{
2522 int i, j;
2523
d11ba0c4 2524 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2525
2526 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2527 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2528 return 0;
2529
4601ba6c
SO		 2530 QETH_DBF_TEXT(SETUP, 2, "inq");
2531 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2532 if (!card->qdio.in_q)
2533 goto out_nomem;
4601ba6c 2534
4a71df50
FB		 2535 /* inbound buffer pool */
2536 if (qeth_alloc_buffer_pool(card))
2537 goto out_freeinq;
0da9581d 2538
4a71df50
FB		 2539 /* outbound */
2540 card->qdio.out_qs =
b3332930 2541 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2542 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2543 if (!card->qdio.out_qs)
2544 goto out_freepool;
2545 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2546 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2547 if (!card->qdio.out_qs[i])
2548 goto out_freeoutq;
d11ba0c4
PT		 2549 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2550 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2551 card->qdio.out_qs[i]->queue_no = i;
2552 /* give outbound qeth_qdio_buffers their qdio_buffers */
2553 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2554 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2555 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2556 goto out_freeoutqbufs;
4a71df50
FB		 2557 }
2558 }
0da9581d
EL		 2559
2560 /* completion */
2561 if (qeth_alloc_cq(card))
2562 goto out_freeoutq;
2563
4a71df50
FB		 2564 return 0;
2565
0da9581d
EL		 2566out_freeoutqbufs:
2567 while (j > 0) {
2568 --j;
2569 kmem_cache_free(qeth_qdio_outbuf_cache,
2570 card->qdio.out_qs[i]->bufs[j]);
2571 card->qdio.out_qs[i]->bufs[j] = NULL;
2572 }
4a71df50 2573out_freeoutq:
0da9581d 2574 while (i > 0) {
d445a4e2 2575 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2576 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2577 }
4a71df50
FB		 2578 kfree(card->qdio.out_qs);
2579 card->qdio.out_qs = NULL;
2580out_freepool:
2581 qeth_free_buffer_pool(card);
2582out_freeinq:
4601ba6c 2583 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2584 card->qdio.in_q = NULL;
2585out_nomem:
2586 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2587 return -ENOMEM;
2588}
2589
d445a4e2
SO		 2590static void qeth_free_qdio_buffers(struct qeth_card *card)
2591{
2592 int i, j;
2593
2594 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2595 QETH_QDIO_UNINITIALIZED)
2596 return;
2597
2598 qeth_free_cq(card);
2599 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2600 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2601 if (card->qdio.in_q->bufs[j].rx_skb)
2602 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2603 }
2604 qeth_free_qdio_queue(card->qdio.in_q);
2605 card->qdio.in_q = NULL;
2606 /* inbound buffer pool */
2607 qeth_free_buffer_pool(card);
2608 /* free outbound qdio_qs */
2609 if (card->qdio.out_qs) {
2610 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2611 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2612 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2613 }
2614 kfree(card->qdio.out_qs);
2615 card->qdio.out_qs = NULL;
2616 }
2617}
2618
4a71df50
FB		 2619static void qeth_create_qib_param_field(struct qeth_card *card,
2620 char *param_field)
2621{
2622
2623 param_field[0] = _ascebc['P'];
2624 param_field[1] = _ascebc['C'];
2625 param_field[2] = _ascebc['I'];
2626 param_field[3] = _ascebc['T'];
2627 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2628 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2629 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2630}
2631
2632static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2633 char *param_field)
2634{
2635 param_field[16] = _ascebc['B'];
2636 param_field[17] = _ascebc['L'];
2637 param_field[18] = _ascebc['K'];
2638 param_field[19] = _ascebc['T'];
2639 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2640 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2641 *((unsigned int *) (&param_field[28])) =
2642 card->info.blkt.inter_packet_jumbo;
2643}
2644
2645static int qeth_qdio_activate(struct qeth_card *card)
2646{
d11ba0c4 2647 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2648 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2649}
2650
2651static int qeth_dm_act(struct qeth_card *card)
2652{
2653 int rc;
2654 struct qeth_cmd_buffer *iob;
2655
d11ba0c4 2656 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2657
2658 iob = qeth_wait_for_buffer(&card->write);
2659 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2660
2661 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2662 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2663 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2664 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2665 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2666 return rc;
2667}
2668
2669static int qeth_mpc_initialize(struct qeth_card *card)
2670{
2671 int rc;
2672
d11ba0c4 2673 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2674
2675 rc = qeth_issue_next_read(card);
2676 if (rc) {
d11ba0c4 2677 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2678 return rc;
2679 }
2680 rc = qeth_cm_enable(card);
2681 if (rc) {
d11ba0c4 2682 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2683 goto out_qdio;
2684 }
2685 rc = qeth_cm_setup(card);
2686 if (rc) {
d11ba0c4 2687 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2688 goto out_qdio;
2689 }
2690 rc = qeth_ulp_enable(card);
2691 if (rc) {
d11ba0c4 2692 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2693 goto out_qdio;
2694 }
2695 rc = qeth_ulp_setup(card);
2696 if (rc) {
d11ba0c4 2697 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2698 goto out_qdio;
2699 }
2700 rc = qeth_alloc_qdio_buffers(card);
2701 if (rc) {
d11ba0c4 2702 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2703 goto out_qdio;
2704 }
2705 rc = qeth_qdio_establish(card);
2706 if (rc) {
d11ba0c4 2707 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2708 qeth_free_qdio_buffers(card);
2709 goto out_qdio;
2710 }
2711 rc = qeth_qdio_activate(card);
2712 if (rc) {
d11ba0c4 2713 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2714 goto out_qdio;
2715 }
2716 rc = qeth_dm_act(card);
2717 if (rc) {
d11ba0c4 2718 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2719 goto out_qdio;
2720 }
2721
2722 return 0;
2723out_qdio:
2724 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2725 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2726 return rc;
2727}
2728
4a71df50
FB		 2729void qeth_print_status_message(struct qeth_card *card)
2730{
2731 switch (card->info.type) {
5113fec0
UB		 2732 case QETH_CARD_TYPE_OSD:
2733 case QETH_CARD_TYPE_OSM:
2734 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2735 /* VM will use a non-zero first character
2736 * to indicate a HiperSockets like reporting
2737 * of the level OSA sets the first character to zero
2738 * */
2739 if (!card->info.mcl_level[0]) {
2740 sprintf(card->info.mcl_level, "%02x%02x",
2741 card->info.mcl_level[2],
2742 card->info.mcl_level[3]);
4a71df50
FB		 2743 break;
2744 }
2745 /* fallthrough */
2746 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2747 if ((card->info.guestlan) ||
2748 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2749 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2750 card->info.mcl_level[0]];
2751 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2752 card->info.mcl_level[1]];
2753 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2754 card->info.mcl_level[2]];
2755 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2756 card->info.mcl_level[3]];
2757 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2758 }
2759 break;
2760 default:
2761 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2762 }
239ff408
UB		 2763 dev_info(&card->gdev->dev,
2764 "Device is a%s card%s%s%s\nwith link type %s.\n",
2765 qeth_get_cardname(card),
2766 (card->info.mcl_level[0]) ? " (level: " : "",
2767 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2768 (card->info.mcl_level[0]) ? ")" : "",
2769 qeth_get_cardname_short(card));
4a71df50
FB		 2770}
2771EXPORT_SYMBOL_GPL(qeth_print_status_message);
2772
4a71df50
FB		 2773static void qeth_initialize_working_pool_list(struct qeth_card *card)
2774{
2775 struct qeth_buffer_pool_entry *entry;
2776
847a50fd 2777 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2778
2779 list_for_each_entry(entry,
2780 &card->qdio.init_pool.entry_list, init_list) {
2781 qeth_put_buffer_pool_entry(card, entry);
2782 }
2783}
2784
cef6ff22
JW		 2785static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2786 struct qeth_card *card)
4a71df50
FB		 2787{
2788 struct list_head *plh;
2789 struct qeth_buffer_pool_entry *entry;
2790 int i, free;
2791 struct page *page;
2792
2793 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2794 return NULL;
2795
2796 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2797 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2798 free = 1;
2799 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2800 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2801 free = 0;
2802 break;
2803 }
2804 }
2805 if (free) {
2806 list_del_init(&entry->list);
2807 return entry;
2808 }
2809 }
2810
2811 /* no free buffer in pool so take first one and swap pages */
2812 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2813 struct qeth_buffer_pool_entry, list);
2814 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2815 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2816 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2817 if (!page) {
2818 return NULL;
2819 } else {
2820 free_page((unsigned long)entry->elements[i]);
2821 entry->elements[i] = page_address(page);
2822 if (card->options.performance_stats)
2823 card->perf_stats.sg_alloc_page_rx++;
2824 }
2825 }
2826 }
2827 list_del_init(&entry->list);
2828 return entry;
2829}
2830
2831static int qeth_init_input_buffer(struct qeth_card *card,
2832 struct qeth_qdio_buffer *buf)
2833{
2834 struct qeth_buffer_pool_entry *pool_entry;
2835 int i;
2836
b3332930 2837 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
37cf05d2
JW		 2838 buf->rx_skb = netdev_alloc_skb(card->dev,
2839 QETH_RX_PULL_LEN + ETH_HLEN);
b3332930
FB		 2840 if (!buf->rx_skb)
2841 return 1;
2842 }
2843
4a71df50
FB		 2844 pool_entry = qeth_find_free_buffer_pool_entry(card);
2845 if (!pool_entry)
2846 return 1;
2847
2848 /*
2849 * since the buffer is accessed only from the input_tasklet
2850 * there shouldn't be a need to synchronize; also, since we use
2851 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2852 * buffers
2853 */
4a71df50
FB		 2854
2855 buf->pool_entry = pool_entry;
2856 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2857 buf->buffer->element[i].length = PAGE_SIZE;
2858 buf->buffer->element[i].addr = pool_entry->elements[i];
2859 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2860 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2861 else
3ec90878
JG		 2862 buf->buffer->element[i].eflags = 0;
2863 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2864 }
2865 return 0;
2866}
2867
2868int qeth_init_qdio_queues(struct qeth_card *card)
2869{
2870 int i, j;
2871 int rc;
2872
d11ba0c4 2873 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2874
2875 /* inbound queue */
1b45c80b
JW		 2876 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2877 memset(&card->rx, 0, sizeof(struct qeth_rx));
4a71df50
FB		 2878 qeth_initialize_working_pool_list(card);
2879 /*give only as many buffers to hardware as we have buffer pool entries*/
2880 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2881 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2882 card->qdio.in_q->next_buf_to_init =
2883 card->qdio.in_buf_pool.buf_count - 1;
2884 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2885 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2886 if (rc) {
d11ba0c4 2887 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2888 return rc;
2889 }
0da9581d
EL		 2890
2891 /* completion */
2892 rc = qeth_cq_init(card);
2893 if (rc) {
2894 return rc;
2895 }
2896
4a71df50
FB		 2897 /* outbound queue */
2898 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2899 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2900 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2901 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2902 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2903 card->qdio.out_qs[i]->bufs[j],
2904 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2905 }
2906 card->qdio.out_qs[i]->card = card;
2907 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2908 card->qdio.out_qs[i]->do_pack = 0;
2909 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2910 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2911 atomic_set(&card->qdio.out_qs[i]->state,
2912 QETH_OUT_Q_UNLOCKED);
2913 }
2914 return 0;
2915}
2916EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2917
cef6ff22 2918static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2919{
2920 switch (link_type) {
2921 case QETH_LINK_TYPE_HSTR:
2922 return 2;
2923 default:
2924 return 1;
2925 }
2926}
2927
2928static void qeth_fill_ipacmd_header(struct qeth_card *card,
2929 struct qeth_ipa_cmd *cmd, __u8 command,
2930 enum qeth_prot_versions prot)
2931{
2932 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2933 cmd->hdr.command = command;
2934 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
d22ffb5a 2935 /* cmd->hdr.seqno is set by qeth_send_control_data() */
4a71df50
FB		 2936 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2937 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2938 if (card->options.layer2)
2939 cmd->hdr.prim_version_no = 2;
2940 else
2941 cmd->hdr.prim_version_no = 1;
2942 cmd->hdr.param_count = 1;
2943 cmd->hdr.prot_version = prot;
2944 cmd->hdr.ipa_supported = 0;
2945 cmd->hdr.ipa_enabled = 0;
2946}
2947
2948struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2949 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2950{
2951 struct qeth_cmd_buffer *iob;
4a71df50 2952
1aec42bc
TR		 2953 iob = qeth_get_buffer(&card->write);
2954 if (iob) {
ff5caa7a 2955 qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
1aec42bc
TR		 2956 } else {
2957 dev_warn(&card->gdev->dev,
2958 "The qeth driver ran out of channel command buffers\n");
2959 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2960 dev_name(&card->gdev->dev));
2961 }
4a71df50
FB		 2962
2963 return iob;
2964}
2965EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2966
2967void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2968 char prot_type)
2969{
2970 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2971 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2972 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2973 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2974}
2975EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2976
efbbc1d5
EC		 2977/**
2978 * qeth_send_ipa_cmd() - send an IPA command
2979 *
2980 * See qeth_send_control_data() for explanation of the arguments.
2981 */
2982
4a71df50
FB		 2983int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2984 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2985 unsigned long),
2986 void *reply_param)
2987{
2988 int rc;
2989 char prot_type;
4a71df50 2990
847a50fd 2991 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2992
2993 if (card->options.layer2)
2994 if (card->info.type == QETH_CARD_TYPE_OSN)
2995 prot_type = QETH_PROT_OSN2;
2996 else
2997 prot_type = QETH_PROT_LAYER2;
2998 else
2999 prot_type = QETH_PROT_TCPIP;
3000 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 3001 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
3002 iob, reply_cb, reply_param);
908abbb5
UB		 3003 if (rc == -ETIME) {
3004 qeth_clear_ipacmd_list(card);
3005 qeth_schedule_recovery(card);
3006 }
4a71df50
FB		 3007 return rc;
3008}
3009EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
3010
10340510 3011static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 3012{
3013 int rc;
70919e23 3014 struct qeth_cmd_buffer *iob;
4a71df50 3015
d11ba0c4 3016 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 3017
70919e23 3018 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 3019 if (!iob)
3020 return -ENOMEM;
70919e23 3021 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 3022 return rc;
3023}
4a71df50 3024
686c97ee 3025static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
4a71df50 3026{
686c97ee 3027 if (!cmd->hdr.return_code)
4a71df50
FB		 3028 cmd->hdr.return_code =
3029 cmd->data.setadapterparms.hdr.return_code;
686c97ee 3030 return cmd->hdr.return_code;
4a71df50 3031}
4a71df50
FB		 3032
3033static int qeth_query_setadapterparms_cb(struct qeth_card *card,
3034 struct qeth_reply *reply, unsigned long data)
3035{
686c97ee 3036 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50 3037
847a50fd 3038 QETH_CARD_TEXT(card, 3, "quyadpcb");
686c97ee
JW		 3039 if (qeth_setadpparms_inspect_rc(cmd))
3040 return 0;
4a71df50 3041
5113fec0 3042 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 3043 card->info.link_type =
3044 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 3045 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
3046 }
4a71df50
FB		 3047 card->options.adp.supported_funcs =
3048 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
686c97ee 3049 return 0;
4a71df50
FB		 3050}
3051
eb3fb0ba 3052static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 3053 __u32 command, __u32 cmdlen)
3054{
3055 struct qeth_cmd_buffer *iob;
3056 struct qeth_ipa_cmd *cmd;
3057
3058 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3059 QETH_PROT_IPV4);
1aec42bc 3060 if (iob) {
ff5caa7a 3061 cmd = __ipa_cmd(iob);
1aec42bc
TR		 3062 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3063 cmd->data.setadapterparms.hdr.command_code = command;
3064 cmd->data.setadapterparms.hdr.used_total = 1;
3065 cmd->data.setadapterparms.hdr.seq_no = 1;
3066 }
4a71df50
FB		 3067
3068 return iob;
3069}
4a71df50
FB		 3070
3071int qeth_query_setadapterparms(struct qeth_card *card)
3072{
3073 int rc;
3074 struct qeth_cmd_buffer *iob;
3075
847a50fd 3076 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3077 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3078 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3079 if (!iob)
3080 return -ENOMEM;
4a71df50
FB		 3081 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3082 return rc;
3083}
3084EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3085
1da74b1c
FB		 3086static int qeth_query_ipassists_cb(struct qeth_card *card,
3087 struct qeth_reply *reply, unsigned long data)
3088{
3089 struct qeth_ipa_cmd *cmd;
3090
3091 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3092
3093 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3094
3095 switch (cmd->hdr.return_code) {
3096 case IPA_RC_NOTSUPP:
3097 case IPA_RC_L2_UNSUPPORTED_CMD:
3098 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3099 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3100 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3101 return -0;
3102 default:
3103 if (cmd->hdr.return_code) {
3104 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3105 "rc=%d\n",
3106 dev_name(&card->gdev->dev),
3107 cmd->hdr.return_code);
3108 return 0;
3109 }
3110 }
3111
1da74b1c
FB		 3112 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3113 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3114 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3115 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3116 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3117 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3118 } else
3119 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3120 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3121 return 0;
3122}
3123
3124int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3125{
3126 int rc;
3127 struct qeth_cmd_buffer *iob;
3128
3129 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3130 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3131 if (!iob)
3132 return -ENOMEM;
1da74b1c
FB		 3133 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3134 return rc;
3135}
3136EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3137
45cbb2e4
SR		 3138static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3139 struct qeth_reply *reply, unsigned long data)
3140{
686c97ee 3141 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
45cbb2e4 3142 struct qeth_query_switch_attributes *attrs;
686c97ee 3143 struct qeth_switch_info *sw_info;
45cbb2e4
SR		 3144
3145 QETH_CARD_TEXT(card, 2, "qswiatcb");
686c97ee
JW		 3146 if (qeth_setadpparms_inspect_rc(cmd))
3147 return 0;
45cbb2e4 3148
686c97ee
JW		 3149 sw_info = (struct qeth_switch_info *)reply->param;
3150 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3151 sw_info->capabilities = attrs->capabilities;
3152 sw_info->settings = attrs->settings;
3153 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3154 sw_info->settings);
45cbb2e4
SR		 3155 return 0;
3156}
3157
3158int qeth_query_switch_attributes(struct qeth_card *card,
3159 struct qeth_switch_info *sw_info)
3160{
3161 struct qeth_cmd_buffer *iob;
3162
3163 QETH_CARD_TEXT(card, 2, "qswiattr");
3164 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3165 return -EOPNOTSUPP;
3166 if (!netif_carrier_ok(card->dev))
3167 return -ENOMEDIUM;
3168 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3169 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3170 if (!iob)
3171 return -ENOMEM;
45cbb2e4
SR		 3172 return qeth_send_ipa_cmd(card, iob,
3173 qeth_query_switch_attributes_cb, sw_info);
3174}
3175EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3176
1da74b1c
FB		 3177static int qeth_query_setdiagass_cb(struct qeth_card *card,
3178 struct qeth_reply *reply, unsigned long data)
3179{
3180 struct qeth_ipa_cmd *cmd;
3181 __u16 rc;
3182
3183 cmd = (struct qeth_ipa_cmd *)data;
3184 rc = cmd->hdr.return_code;
3185 if (rc)
3186 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3187 else
3188 card->info.diagass_support = cmd->data.diagass.ext;
3189 return 0;
3190}
3191
3192static int qeth_query_setdiagass(struct qeth_card *card)
3193{
3194 struct qeth_cmd_buffer *iob;
3195 struct qeth_ipa_cmd *cmd;
3196
3197 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3198 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3199 if (!iob)
3200 return -ENOMEM;
ff5caa7a 3201 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3202 cmd->data.diagass.subcmd_len = 16;
3203 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3204 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3205}
3206
3207static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3208{
3209 unsigned long info = get_zeroed_page(GFP_KERNEL);
3210 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3211 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3212 struct ccw_dev_id ccwid;
caf757c6 3213 int level;
1da74b1c
FB		 3214
3215 tid->chpid = card->info.chpid;
3216 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3217 tid->ssid = ccwid.ssid;
3218 tid->devno = ccwid.devno;
3219 if (!info)
3220 return;
caf757c6
HC		 3221 level = stsi(NULL, 0, 0, 0);
3222 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3223 tid->lparnr = info222->lpar_number;
caf757c6 3224 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3225 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3226 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3227 }
3228 free_page(info);
3229 return;
3230}
3231
3232static int qeth_hw_trap_cb(struct qeth_card *card,
3233 struct qeth_reply *reply, unsigned long data)
3234{
3235 struct qeth_ipa_cmd *cmd;
3236 __u16 rc;
3237
3238 cmd = (struct qeth_ipa_cmd *)data;
3239 rc = cmd->hdr.return_code;
3240 if (rc)
3241 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3242 return 0;
3243}
3244
3245int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3246{
3247 struct qeth_cmd_buffer *iob;
3248 struct qeth_ipa_cmd *cmd;
3249
3250 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3251 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3252 if (!iob)
3253 return -ENOMEM;
ff5caa7a 3254 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3255 cmd->data.diagass.subcmd_len = 80;
3256 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3257 cmd->data.diagass.type = 1;
3258 cmd->data.diagass.action = action;
3259 switch (action) {
3260 case QETH_DIAGS_TRAP_ARM:
3261 cmd->data.diagass.options = 0x0003;
3262 cmd->data.diagass.ext = 0x00010000 +
3263 sizeof(struct qeth_trap_id);
3264 qeth_get_trap_id(card,
3265 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3266 break;
3267 case QETH_DIAGS_TRAP_DISARM:
3268 cmd->data.diagass.options = 0x0001;
3269 break;
3270 case QETH_DIAGS_TRAP_CAPTURE:
3271 break;
3272 }
3273 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3274}
3275EXPORT_SYMBOL_GPL(qeth_hw_trap);
3276
d73ef324
JW		 3277static int qeth_check_qdio_errors(struct qeth_card *card,
3278 struct qdio_buffer *buf,
3279 unsigned int qdio_error,
3280 const char *dbftext)
4a71df50 3281{
779e6e1c 3282 if (qdio_error) {
847a50fd 3283 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3284 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3285 buf->element[15].sflags);
38593d01 3286 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3287 buf->element[14].sflags);
38593d01 3288 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3289 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3290 card->stats.rx_dropped++;
3291 return 0;
3292 } else
3293 return 1;
4a71df50
FB		 3294 }
3295 return 0;
3296}
4a71df50 3297
d73ef324 3298static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3299{
3300 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3301 struct list_head *lh;
4a71df50
FB		 3302 int count;
3303 int i;
3304 int rc;
3305 int newcount = 0;
3306
4a71df50
FB		 3307 count = (index < queue->next_buf_to_init)?
3308 card->qdio.in_buf_pool.buf_count -
3309 (queue->next_buf_to_init - index) :
3310 card->qdio.in_buf_pool.buf_count -
3311 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3312 /* only requeue at a certain threshold to avoid SIGAs */
3313 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3314 for (i = queue->next_buf_to_init;
3315 i < queue->next_buf_to_init + count; ++i) {
3316 if (qeth_init_input_buffer(card,
3317 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3318 break;
3319 } else {
3320 newcount++;
3321 }
3322 }
3323
3324 if (newcount < count) {
3325 /* we are in memory shortage so we switch back to
3326 traditional skb allocation and drop packages */
4a71df50
FB		 3327 atomic_set(&card->force_alloc_skb, 3);
3328 count = newcount;
3329 } else {
4a71df50
FB		 3330 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3331 }
3332
b3332930
FB		 3333 if (!count) {
3334 i = 0;
3335 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3336 i++;
3337 if (i == card->qdio.in_buf_pool.buf_count) {
3338 QETH_CARD_TEXT(card, 2, "qsarbw");
3339 card->reclaim_index = index;
3340 schedule_delayed_work(
3341 &card->buffer_reclaim_work,
3342 QETH_RECLAIM_WORK_TIME);
3343 }
3344 return;
3345 }
3346
4a71df50
FB		 3347 /*
3348 * according to old code it should be avoided to requeue all
3349 * 128 buffers in order to benefit from PCI avoidance.
3350 * this function keeps at least one buffer (the buffer at
3351 * 'index') un-requeued -> this buffer is the first buffer that
3352 * will be requeued the next time
3353 */
3354 if (card->options.performance_stats) {
3355 card->perf_stats.inbound_do_qdio_cnt++;
3356 card->perf_stats.inbound_do_qdio_start_time =
3357 qeth_get_micros();
3358 }
779e6e1c
JG		 3359 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3360 queue->next_buf_to_init, count);
4a71df50
FB		 3361 if (card->options.performance_stats)
3362 card->perf_stats.inbound_do_qdio_time +=
3363 qeth_get_micros() -
3364 card->perf_stats.inbound_do_qdio_start_time;
3365 if (rc) {
847a50fd 3366 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3367 }
3368 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3369 QDIO_MAX_BUFFERS_PER_Q;
3370 }
3371}
d73ef324
JW		 3372
3373static void qeth_buffer_reclaim_work(struct work_struct *work)
3374{
3375 struct qeth_card *card = container_of(work, struct qeth_card,
3376 buffer_reclaim_work.work);
3377
3378 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3379 qeth_queue_input_buffer(card, card->reclaim_index);
3380}
4a71df50 3381
d7a39937 3382static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3383 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3384{
3ec90878 3385 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3386
847a50fd 3387 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3388 if (card->info.type == QETH_CARD_TYPE_IQD) {
3389 if (sbalf15 == 0) {
3390 qdio_err = 0;
3391 } else {
3392 qdio_err = 1;
3393 }
3394 }
76b11f8e 3395 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3396
3397 if (!qdio_err)
d7a39937 3398 return;
d303b6fd
JG		 3399
3400 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3401 return;
d303b6fd 3402
847a50fd
CO		 3403 QETH_CARD_TEXT(card, 1, "lnkfail");
3404 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3405 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3406}
3407
664e42ac
JW		 3408/**
3409 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3410 * @queue: queue to check for packing buffer
3411 *
3412 * Returns number of buffers that were prepared for flush.
3413 */
3414static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3415{
3416 struct qeth_qdio_out_buffer *buffer;
3417
3418 buffer = queue->bufs[queue->next_buf_to_fill];
3419 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3420 (buffer->next_element_to_fill > 0)) {
3421 /* it's a packing buffer */
3422 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3423 queue->next_buf_to_fill =
3424 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3425 return 1;
3426 }
3427 return 0;
3428}
3429
4a71df50
FB		 3430/*
3431 * Switched to packing state if the number of used buffers on a queue
3432 * reaches a certain limit.
3433 */
3434static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3435{
3436 if (!queue->do_pack) {
3437 if (atomic_read(&queue->used_buffers)
3438 >= QETH_HIGH_WATERMARK_PACK){
3439 /* switch non-PACKING -> PACKING */
847a50fd 3440 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3441 if (queue->card->options.performance_stats)
3442 queue->card->perf_stats.sc_dp_p++;
3443 queue->do_pack = 1;
3444 }
3445 }
3446}
3447
3448/*
3449 * Switches from packing to non-packing mode. If there is a packing
3450 * buffer on the queue this buffer will be prepared to be flushed.
3451 * In that case 1 is returned to inform the caller. If no buffer
3452 * has to be flushed, zero is returned.
3453 */
3454static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3455{
4a71df50
FB		 3456 if (queue->do_pack) {
3457 if (atomic_read(&queue->used_buffers)
3458 <= QETH_LOW_WATERMARK_PACK) {
3459 /* switch PACKING -> non-PACKING */
847a50fd 3460 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3461 if (queue->card->options.performance_stats)
3462 queue->card->perf_stats.sc_p_dp++;
3463 queue->do_pack = 0;
664e42ac 3464 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3465 }
3466 }
4a71df50
FB		 3467 return 0;
3468}
3469
779e6e1c
JG		 3470static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3471 int count)
4a71df50
FB		 3472{
3473 struct qeth_qdio_out_buffer *buf;
3474 int rc;
3475 int i;
3476 unsigned int qdio_flags;
3477
4a71df50 3478 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3479 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3480 buf = queue->bufs[bidx];
3ec90878
JG		 3481 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3482 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3483
0da9581d
EL		 3484 if (queue->bufstates)
3485 queue->bufstates[bidx].user = buf;
3486
4a71df50
FB		 3487 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3488 continue;
3489
3490 if (!queue->do_pack) {
3491 if ((atomic_read(&queue->used_buffers) >=
3492 (QETH_HIGH_WATERMARK_PACK -
3493 QETH_WATERMARK_PACK_FUZZ)) &&
3494 !atomic_read(&queue->set_pci_flags_count)) {
3495 /* it's likely that we'll go to packing
3496 * mode soon */
3497 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3498 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3499 }
3500 } else {
3501 if (!atomic_read(&queue->set_pci_flags_count)) {
3502 /*
3503 * there's no outstanding PCI any more, so we
3504 * have to request a PCI to be sure the the PCI
3505 * will wake at some time in the future then we
3506 * can flush packed buffers that might still be
3507 * hanging around, which can happen if no
3508 * further send was requested by the stack
3509 */
3510 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3511 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3512 }
3513 }
3514 }
3515
3e66bab3 3516 netif_trans_update(queue->card->dev);
4a71df50
FB		 3517 if (queue->card->options.performance_stats) {
3518 queue->card->perf_stats.outbound_do_qdio_cnt++;
3519 queue->card->perf_stats.outbound_do_qdio_start_time =
3520 qeth_get_micros();
3521 }
3522 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3523 if (atomic_read(&queue->set_pci_flags_count))
3524 qdio_flags |= QDIO_FLAG_PCI_OUT;
3525 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3526 queue->queue_no, index, count);
4a71df50
FB		 3527 if (queue->card->options.performance_stats)
3528 queue->card->perf_stats.outbound_do_qdio_time +=
3529 qeth_get_micros() -
3530 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3531 atomic_add(count, &queue->used_buffers);
4a71df50 3532 if (rc) {
d303b6fd
JG		 3533 queue->card->stats.tx_errors += count;
3534 /* ignore temporary SIGA errors without busy condition */
1549d13f 3535 if (rc == -ENOBUFS)
d303b6fd 3536 return;
847a50fd 3537 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3538 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3539 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3540 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3541 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3542
4a71df50
FB		 3543 /* this must not happen under normal circumstances. if it
3544 * happens something is really wrong -> recover */
3545 qeth_schedule_recovery(queue->card);
3546 return;
3547 }
4a71df50
FB		 3548 if (queue->card->options.performance_stats)
3549 queue->card->perf_stats.bufs_sent += count;
3550}
3551
3552static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3553{
3554 int index;
3555 int flush_cnt = 0;
3556 int q_was_packing = 0;
3557
3558 /*
3559 * check if weed have to switch to non-packing mode or if
3560 * we have to get a pci flag out on the queue
3561 */
3562 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3563 !atomic_read(&queue->set_pci_flags_count)) {
3564 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3565 QETH_OUT_Q_UNLOCKED) {
3566 /*
3567 * If we get in here, there was no action in
3568 * do_send_packet. So, we check if there is a
3569 * packing buffer to be flushed here.
3570 */
3571 netif_stop_queue(queue->card->dev);
3572 index = queue->next_buf_to_fill;
3573 q_was_packing = queue->do_pack;
3574 /* queue->do_pack may change */
3575 barrier();
3576 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3577 if (!flush_cnt &&
3578 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3579 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3580 if (queue->card->options.performance_stats &&
3581 q_was_packing)
3582 queue->card->perf_stats.bufs_sent_pack +=
3583 flush_cnt;
3584 if (flush_cnt)
779e6e1c 3585 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3586 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3587 }
3588 }
3589}
3590
7bcd64eb
JW		 3591static void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3592 unsigned long card_ptr)
a1c3ed4c
FB		 3593{
3594 struct qeth_card *card = (struct qeth_card *)card_ptr;
3595
0cffef48 3596 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3597 napi_schedule(&card->napi);
3598}
a1c3ed4c 3599
0da9581d
EL		 3600int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3601{
3602 int rc;
3603
3604 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3605 rc = -1;
3606 goto out;
3607 } else {
3608 if (card->options.cq == cq) {
3609 rc = 0;
3610 goto out;
3611 }
3612
3613 if (card->state != CARD_STATE_DOWN &&
3614 card->state != CARD_STATE_RECOVER) {
3615 rc = -1;
3616 goto out;
3617 }
3618
3619 qeth_free_qdio_buffers(card);
3620 card->options.cq = cq;
3621 rc = 0;
3622 }
3623out:
3624 return rc;
3625
3626}
3627EXPORT_SYMBOL_GPL(qeth_configure_cq);
3628
3629
3630static void qeth_qdio_cq_handler(struct qeth_card *card,
3631 unsigned int qdio_err,
3632 unsigned int queue, int first_element, int count) {
3633 struct qeth_qdio_q *cq = card->qdio.c_q;
3634 int i;
3635 int rc;
3636
3637 if (!qeth_is_cq(card, queue))
3638 goto out;
3639
3640 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3641 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3642 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3643
3644 if (qdio_err) {
3645 netif_stop_queue(card->dev);
3646 qeth_schedule_recovery(card);
3647 goto out;
3648 }
3649
3650 if (card->options.performance_stats) {
3651 card->perf_stats.cq_cnt++;
3652 card->perf_stats.cq_start_time = qeth_get_micros();
3653 }
3654
3655 for (i = first_element; i < first_element + count; ++i) {
3656 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3657 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3658 int e;
3659
3660 e = 0;
903e4853
UB		 3661 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3662 buffer->element[e].addr) {
0da9581d
EL		 3663 unsigned long phys_aob_addr;
3664
3665 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3666 qeth_qdio_handle_aob(card, phys_aob_addr);
3667 buffer->element[e].addr = NULL;
3668 buffer->element[e].eflags = 0;
3669 buffer->element[e].sflags = 0;
3670 buffer->element[e].length = 0;
3671
3672 ++e;
3673 }
3674
3675 buffer->element[15].eflags = 0;
3676 buffer->element[15].sflags = 0;
3677 }
3678 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3679 card->qdio.c_q->next_buf_to_init,
3680 count);
3681 if (rc) {
3682 dev_warn(&card->gdev->dev,
3683 "QDIO reported an error, rc=%i\n", rc);
3684 QETH_CARD_TEXT(card, 2, "qcqherr");
3685 }
3686 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3687 + count) % QDIO_MAX_BUFFERS_PER_Q;
3688
3689 netif_wake_queue(card->dev);
3690
3691 if (card->options.performance_stats) {
3692 int delta_t = qeth_get_micros();
3693 delta_t -= card->perf_stats.cq_start_time;
3694 card->perf_stats.cq_time += delta_t;
3695 }
3696out:
3697 return;
3698}
3699
7bcd64eb
JW		 3700static void qeth_qdio_input_handler(struct ccw_device *ccwdev,
3701 unsigned int qdio_err, int queue,
3702 int first_elem, int count,
3703 unsigned long card_ptr)
a1c3ed4c
FB		 3704{
3705 struct qeth_card *card = (struct qeth_card *)card_ptr;
3706
0da9581d
EL		 3707 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3708 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3709
3710 if (qeth_is_cq(card, queue))
3711 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3712 else if (qdio_err)
a1c3ed4c
FB		 3713 qeth_schedule_recovery(card);
3714}
a1c3ed4c 3715
7bcd64eb
JW		 3716static void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3717 unsigned int qdio_error, int __queue,
3718 int first_element, int count,
3719 unsigned long card_ptr)
4a71df50
FB		 3720{
3721 struct qeth_card *card = (struct qeth_card *) card_ptr;
3722 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3723 struct qeth_qdio_out_buffer *buffer;
3724 int i;
3725
847a50fd 3726 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3727 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3728 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3729 netif_stop_queue(card->dev);
3730 qeth_schedule_recovery(card);
3731 return;
4a71df50
FB		 3732 }
3733 if (card->options.performance_stats) {
3734 card->perf_stats.outbound_handler_cnt++;
3735 card->perf_stats.outbound_handler_start_time =
3736 qeth_get_micros();
3737 }
3738 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3739 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3740 buffer = queue->bufs[bidx];
b67d801f 3741 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3742
3743 if (queue->bufstates &&
3744 (queue->bufstates[bidx].flags &
3745 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3746 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3747
3748 if (atomic_cmpxchg(&buffer->state,
3749 QETH_QDIO_BUF_PRIMED,
3750 QETH_QDIO_BUF_PENDING) ==
3751 QETH_QDIO_BUF_PRIMED) {
3752 qeth_notify_skbs(queue, buffer,
3753 TX_NOTIFY_PENDING);
3754 }
0da9581d
EL		 3755 buffer->aob = queue->bufstates[bidx].aob;
3756 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3757 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3758 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3759 virt_to_phys(buffer->aob));
b3332930
FB		 3760 if (qeth_init_qdio_out_buf(queue, bidx)) {
3761 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3762 qeth_schedule_recovery(card);
b3332930 3763 }
0da9581d 3764 } else {
b3332930
FB		 3765 if (card->options.cq == QETH_CQ_ENABLED) {
3766 enum iucv_tx_notify n;
3767
3768 n = qeth_compute_cq_notification(
3769 buffer->buffer->element[15].sflags, 0);
3770 qeth_notify_skbs(queue, buffer, n);
3771 }
3772
0da9581d
EL		 3773 qeth_clear_output_buffer(queue, buffer,
3774 QETH_QDIO_BUF_EMPTY);
3775 }
3776 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3777 }
3778 atomic_sub(count, &queue->used_buffers);
3779 /* check if we need to do something on this outbound queue */
3780 if (card->info.type != QETH_CARD_TYPE_IQD)
3781 qeth_check_outbound_queue(queue);
3782
3783 netif_wake_queue(queue->card->dev);
3784 if (card->options.performance_stats)
3785 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3786 card->perf_stats.outbound_handler_start_time;
3787}
4a71df50 3788
70deb016
HW		 3789/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3790static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3791{
3792 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3793 return 2;
3794 return queue_num;
3795}
3796
290b8348
SR		 3797/**
3798 * Note: Function assumes that we have 4 outbound queues.
3799 */
4a71df50
FB		 3800int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3801 int ipv, int cast_type)
3802{
d66cb37e 3803 __be16 *tci;
290b8348
SR		 3804 u8 tos;
3805
290b8348
SR		 3806 if (cast_type && card->info.is_multicast_different)
3807 return card->info.is_multicast_different &
3808 (card->qdio.no_out_queues - 1);
3809
3810 switch (card->qdio.do_prio_queueing) {
3811 case QETH_PRIO_Q_ING_TOS:
3812 case QETH_PRIO_Q_ING_PREC:
3813 switch (ipv) {
3814 case 4:
3815 tos = ipv4_get_dsfield(ip_hdr(skb));
3816 break;
3817 case 6:
3818 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3819 break;
3820 default:
3821 return card->qdio.default_out_queue;
4a71df50 3822 }
290b8348 3823 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3824 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3825 if (tos & IPTOS_MINCOST)
70deb016 3826 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3827 if (tos & IPTOS_RELIABILITY)
3828 return 2;
3829 if (tos & IPTOS_THROUGHPUT)
3830 return 1;
3831 if (tos & IPTOS_LOWDELAY)
3832 return 0;
d66cb37e
SR		 3833 break;
3834 case QETH_PRIO_Q_ING_SKB:
3835 if (skb->priority > 5)
3836 return 0;
70deb016 3837 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3838 case QETH_PRIO_Q_ING_VLAN:
3839 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3840 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3841 return qeth_cut_iqd_prio(card,
3842 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3843 break;
4a71df50 3844 default:
290b8348 3845 break;
4a71df50 3846 }
290b8348 3847 return card->qdio.default_out_queue;
4a71df50
FB		 3848}
3849EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3850
2863c613
EC		 3851/**
3852 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3853 * @skb: SKB address
3854 *
3855 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3856 * fragmented part of the SKB. Returns zero for linear SKB.
3857 */
271648b4
FB		 3858int qeth_get_elements_for_frags(struct sk_buff *skb)
3859{
2863c613 3860 int cnt, elements = 0;
271648b4
FB		 3861
3862 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3863 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3864
3865 elements += qeth_get_elements_for_range(
3866 (addr_t)skb_frag_address(frag),
3867 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3868 }
3869 return elements;
3870}
3871EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3872
2863c613
EC		 3873/**
3874 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3875 * @card: qeth card structure, to check max. elems.
3876 * @skb: SKB address
3877 * @extra_elems: extra elems needed, to check against max.
7d969d2e 3878 * @data_offset: range starts at skb->data + data_offset
2863c613
EC		 3879 *
3880 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3881 * skb data, including linear part and fragments. Checks if the result plus
3882 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3883 * Note: extra_elems is not included in the returned result.
3884 */
065cc782 3885int qeth_get_elements_no(struct qeth_card *card,
7d969d2e 3886 struct sk_buff *skb, int extra_elems, int data_offset)
4a71df50 3887{
12472af8
JW		 3888 addr_t end = (addr_t)skb->data + skb_headlen(skb);
3889 int elements = qeth_get_elements_for_frags(skb);
3890 addr_t start = (addr_t)skb->data + data_offset;
3891
3892 if (start != end)
3893 elements += qeth_get_elements_for_range(start, end);
4a71df50 3894
2863c613 3895 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3896 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3897 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3898 elements + extra_elems, skb->len);
4a71df50
FB		 3899 return 0;
3900 }
2863c613 3901 return elements;
4a71df50
FB		 3902}
3903EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3904
d4ae1f5e 3905int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3906{
3907 int hroom, inpage, rest;
3908
3909 if (((unsigned long)skb->data & PAGE_MASK) !=
3910 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3911 hroom = skb_headroom(skb);
3912 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3913 rest = len - inpage;
3914 if (rest > hroom)
3915 return 1;
2863c613 3916 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3917 skb->data -= rest;
d4ae1f5e
SR		 3918 skb->tail -= rest;
3919 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3920 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3921 }
3922 return 0;
3923}
3924EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3925
0d6f02d3
JW		 3926/**
3927 * qeth_push_hdr() - push a qeth_hdr onto an skb.
3928 * @skb: skb that the qeth_hdr should be pushed onto.
3929 * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
3930 * it contains a valid pointer to a qeth_hdr.
3931 * @len: length of the hdr that needs to be pushed on.
3932 *
3933 * Returns the pushed length. If the header can't be pushed on
3934 * (eg. because it would cross a page boundary), it is allocated from
3935 * the cache instead and 0 is returned.
3936 * Error to create the hdr is indicated by returning with < 0.
3937 */
3938int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len)
3939{
3940 if (skb_headroom(skb) >= len &&
3941 qeth_get_elements_for_range((addr_t)skb->data - len,
3942 (addr_t)skb->data) == 1) {
3943 *hdr = skb_push(skb, len);
3944 return len;
3945 }
3946 /* fall back */
3947 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3948 if (!*hdr)
3949 return -ENOMEM;
3950 return 0;
3951}
3952EXPORT_SYMBOL_GPL(qeth_push_hdr);
3953
cef6ff22
JW		 3954static void __qeth_fill_buffer(struct sk_buff *skb,
3955 struct qeth_qdio_out_buffer *buf,
3956 bool is_first_elem, unsigned int offset)
4a71df50 3957{
384d2ef1
JW		 3958 struct qdio_buffer *buffer = buf->buffer;
3959 int element = buf->next_element_to_fill;
cc309f83
JW		 3960 int length = skb_headlen(skb) - offset;
3961 char *data = skb->data + offset;
384d2ef1 3962 int length_here, cnt;
4a71df50 3963
cc309f83 3964 /* map linear part into buffer element(s) */
4a71df50
FB		 3965 while (length > 0) {
3966 /* length_here is the remaining amount of data in this page */
3967 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3968 if (length < length_here)
3969 length_here = length;
3970
3971 buffer->element[element].addr = data;
3972 buffer->element[element].length = length_here;
3973 length -= length_here;
384d2ef1
JW		 3974 if (is_first_elem) {
3975 is_first_elem = false;
5258830b
JW		 3976 if (length || skb_is_nonlinear(skb))
3977 /* skb needs additional elements */
3ec90878 3978 buffer->element[element].eflags =
5258830b 3979 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3980 else
5258830b
JW		 3981 buffer->element[element].eflags = 0;
3982 } else {
3983 buffer->element[element].eflags =
3984 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3985 }
3986 data += length_here;
3987 element++;
4a71df50 3988 }
51aa165c 3989
cc309f83 3990 /* map page frags into buffer element(s) */
51aa165c 3991 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3992 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3993
3994 data = skb_frag_address(frag);
3995 length = skb_frag_size(frag);
271648b4
FB		 3996 while (length > 0) {
3997 length_here = PAGE_SIZE -
3998 ((unsigned long) data % PAGE_SIZE);
3999 if (length < length_here)
4000 length_here = length;
4001
4002 buffer->element[element].addr = data;
4003 buffer->element[element].length = length_here;
4004 buffer->element[element].eflags =
4005 SBAL_EFLAGS_MIDDLE_FRAG;
4006 length -= length_here;
4007 data += length_here;
4008 element++;
4009 }
51aa165c
FB		 4010 }
4011
3ec90878
JG		 4012 if (buffer->element[element - 1].eflags)
4013 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 4014 buf->next_element_to_fill = element;
4a71df50
FB		 4015}
4016
eaf3cc08
JW		 4017/**
4018 * qeth_fill_buffer() - map skb into an output buffer
4019 * @queue: QDIO queue to submit the buffer on
4020 * @buf: buffer to transport the skb
4021 * @skb: skb to map into the buffer
4022 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
4023 * from qeth_core_header_cache.
4024 * @offset: when mapping the skb, start at skb->data + offset
4025 * @hd_len: if > 0, build a dedicated header element of this size
4026 */
cef6ff22
JW		 4027static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
4028 struct qeth_qdio_out_buffer *buf,
4029 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 4030 unsigned int offset, unsigned int hd_len)
4a71df50 4031{
eaf3cc08 4032 struct qdio_buffer *buffer = buf->buffer;
384d2ef1 4033 bool is_first_elem = true;
13ddacb5 4034 int flush_cnt = 0;
4a71df50 4035
63354797 4036 refcount_inc(&skb->users);
4a71df50
FB		 4037 skb_queue_tail(&buf->skb_list, skb);
4038
eaf3cc08
JW		 4039 /* build dedicated header element */
4040 if (hd_len) {
683d718a 4041 int element = buf->next_element_to_fill;
384d2ef1
JW		 4042 is_first_elem = false;
4043
683d718a 4044 buffer->element[element].addr = hdr;
f1588177 4045 buffer->element[element].length = hd_len;
3ec90878 4046 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
eaf3cc08
JW		 4047 /* remember to free cache-allocated qeth_hdr: */
4048 buf->is_header[element] = ((void *)hdr != skb->data);
683d718a
FB		 4049 buf->next_element_to_fill++;
4050 }
4051
384d2ef1 4052 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 4053
4054 if (!queue->do_pack) {
847a50fd 4055 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 4056 /* set state to PRIMED -> will be flushed */
4057 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4058 flush_cnt = 1;
4059 } else {
847a50fd 4060 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4061 if (queue->card->options.performance_stats)
4062 queue->card->perf_stats.skbs_sent_pack++;
4063 if (buf->next_element_to_fill >=
4064 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4065 /*
4066 * packed buffer if full -> set state PRIMED
4067 * -> will be flushed
4068 */
4069 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4070 flush_cnt = 1;
4071 }
4072 }
4073 return flush_cnt;
4074}
4075
7c2e9ba3 4076int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
cc309f83 4077 struct qeth_hdr *hdr, unsigned int offset,
13ddacb5 4078 unsigned int hd_len)
4a71df50 4079{
7c2e9ba3
JW		 4080 int index = queue->next_buf_to_fill;
4081 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4a71df50 4082
4a71df50
FB		 4083 /*
4084 * check if buffer is empty to make sure that we do not 'overtake'
4085 * ourselves and try to fill a buffer that is already primed
4086 */
4087 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
7c2e9ba3
JW		 4088 return -EBUSY;
4089 queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
64ef8957
FB		 4090 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4091 qeth_flush_buffers(queue, index, 1);
4a71df50 4092 return 0;
4a71df50
FB		 4093}
4094EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4095
4096int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 4097 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 4098 unsigned int offset, unsigned int hd_len,
4099 int elements_needed)
4a71df50
FB		 4100{
4101 struct qeth_qdio_out_buffer *buffer;
4102 int start_index;
4103 int flush_count = 0;
4104 int do_pack = 0;
4105 int tmp;
4106 int rc = 0;
4107
4a71df50
FB		 4108 /* spin until we get the queue ... */
4109 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4110 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4111 start_index = queue->next_buf_to_fill;
0da9581d 4112 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4113 /*
4114 * check if buffer is empty to make sure that we do not 'overtake'
4115 * ourselves and try to fill a buffer that is already primed
4116 */
4117 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4118 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4119 return -EBUSY;
4120 }
4121 /* check if we need to switch packing state of this queue */
4122 qeth_switch_to_packing_if_needed(queue);
4123 if (queue->do_pack) {
4124 do_pack = 1;
64ef8957
FB		 4125 /* does packet fit in current buffer? */
4126 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4127 buffer->next_element_to_fill) < elements_needed) {
4128 /* ... no -> set state PRIMED */
4129 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4130 flush_count++;
4131 queue->next_buf_to_fill =
4132 (queue->next_buf_to_fill + 1) %
4133 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4134 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4135 /* we did a step forward, so check buffer state
4136 * again */
4137 if (atomic_read(&buffer->state) !=
4138 QETH_QDIO_BUF_EMPTY) {
4139 qeth_flush_buffers(queue, start_index,
779e6e1c 4140 flush_count);
64ef8957 4141 atomic_set(&queue->state,
4a71df50 4142 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4143 rc = -EBUSY;
4144 goto out;
4a71df50
FB		 4145 }
4146 }
4147 }
9c3bfda9 4148 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4a71df50
FB		 4149 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4150 QDIO_MAX_BUFFERS_PER_Q;
4151 flush_count += tmp;
4a71df50 4152 if (flush_count)
779e6e1c 4153 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4154 else if (!atomic_read(&queue->set_pci_flags_count))
4155 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4156 /*
4157 * queue->state will go from LOCKED -> UNLOCKED or from
4158 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4159 * (switch packing state or flush buffer to get another pci flag out).
4160 * In that case we will enter this loop
4161 */
4162 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4163 start_index = queue->next_buf_to_fill;
4164 /* check if we can go back to non-packing state */
3cdc8a25 4165 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4166 /*
4167 * check if we need to flush a packing buffer to get a pci
4168 * flag out on the queue
4169 */
3cdc8a25
JW		 4170 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4171 tmp = qeth_prep_flush_pack_buffer(queue);
4172 if (tmp) {
4173 qeth_flush_buffers(queue, start_index, tmp);
4174 flush_count += tmp;
4175 }
4a71df50 4176 }
3cdc8a25 4177out:
4a71df50
FB		 4178 /* at this point the queue is UNLOCKED again */
4179 if (queue->card->options.performance_stats && do_pack)
4180 queue->card->perf_stats.bufs_sent_pack += flush_count;
4181
4182 return rc;
4183}
4184EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4185
4186static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4187 struct qeth_reply *reply, unsigned long data)
4188{
686c97ee 4189 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50
FB		 4190 struct qeth_ipacmd_setadpparms *setparms;
4191
847a50fd 4192 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50 4193
4a71df50 4194 setparms = &(cmd->data.setadapterparms);
686c97ee 4195 if (qeth_setadpparms_inspect_rc(cmd)) {
8a593148 4196 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4197 setparms->data.mode = SET_PROMISC_MODE_OFF;
4198 }
4199 card->info.promisc_mode = setparms->data.mode;
4200 return 0;
4201}
4202
4203void qeth_setadp_promisc_mode(struct qeth_card *card)
4204{
4205 enum qeth_ipa_promisc_modes mode;
4206 struct net_device *dev = card->dev;
4207 struct qeth_cmd_buffer *iob;
4208 struct qeth_ipa_cmd *cmd;
4209
847a50fd 4210 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4211
4212 if (((dev->flags & IFF_PROMISC) &&
4213 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4214 (!(dev->flags & IFF_PROMISC) &&
4215 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4216 return;
4217 mode = SET_PROMISC_MODE_OFF;
4218 if (dev->flags & IFF_PROMISC)
4219 mode = SET_PROMISC_MODE_ON;
847a50fd 4220 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4221
4222 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4223 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4224 if (!iob)
4225 return;
ff5caa7a 4226 cmd = __ipa_cmd(iob);
4a71df50
FB		 4227 cmd->data.setadapterparms.data.mode = mode;
4228 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4229}
4230EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4231
4232int qeth_change_mtu(struct net_device *dev, int new_mtu)
4233{
4234 struct qeth_card *card;
4235 char dbf_text[15];
4236
509e2562 4237 card = dev->ml_priv;
4a71df50 4238
847a50fd 4239 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4240 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4241 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50 4242
4845b93f 4243 if (!qeth_mtu_is_valid(card, new_mtu))
4a71df50
FB		 4244 return -EINVAL;
4245 dev->mtu = new_mtu;
4246 return 0;
4247}
4248EXPORT_SYMBOL_GPL(qeth_change_mtu);
4249
4250struct net_device_stats *qeth_get_stats(struct net_device *dev)
4251{
4252 struct qeth_card *card;
4253
509e2562 4254 card = dev->ml_priv;
4a71df50 4255
847a50fd 4256 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4257
4258 return &card->stats;
4259}
4260EXPORT_SYMBOL_GPL(qeth_get_stats);
4261
4262static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4263 struct qeth_reply *reply, unsigned long data)
4264{
686c97ee 4265 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50 4266
847a50fd 4267 QETH_CARD_TEXT(card, 4, "chgmaccb");
686c97ee
JW		 4268 if (qeth_setadpparms_inspect_rc(cmd))
4269 return 0;
4a71df50 4270
4a71df50
FB		 4271 if (!card->options.layer2 ||
4272 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
99f0b85d
JW		 4273 ether_addr_copy(card->dev->dev_addr,
4274 cmd->data.setadapterparms.data.change_addr.addr);
4a71df50
FB		 4275 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4276 }
4a71df50
FB		 4277 return 0;
4278}
4279
4280int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4281{
4282 int rc;
4283 struct qeth_cmd_buffer *iob;
4284 struct qeth_ipa_cmd *cmd;
4285
847a50fd 4286 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4287
4288 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4289 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4290 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4291 if (!iob)
4292 return -ENOMEM;
ff5caa7a 4293 cmd = __ipa_cmd(iob);
4a71df50 4294 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
99f0b85d
JW		 4295 cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
4296 ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
4297 card->dev->dev_addr);
4a71df50
FB		 4298 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4299 NULL);
4300 return rc;
4301}
4302EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4303
d64ecc22
EL		 4304static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4305 struct qeth_reply *reply, unsigned long data)
4306{
686c97ee 4307 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
d64ecc22 4308 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4309 int fallback = *(int *)reply->param;
d64ecc22 4310
847a50fd 4311 QETH_CARD_TEXT(card, 4, "setaccb");
686c97ee
JW		 4312 if (cmd->hdr.return_code)
4313 return 0;
4314 qeth_setadpparms_inspect_rc(cmd);
d64ecc22 4315
d64ecc22
EL		 4316 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4317 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4318 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4319 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4320 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4321 if (cmd->data.setadapterparms.hdr.return_code !=
4322 SET_ACCESS_CTRL_RC_SUCCESS)
4323 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4324 card->gdev->dev.kobj.name,
4325 access_ctrl_req->subcmd_code,
4326 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4327 switch (cmd->data.setadapterparms.hdr.return_code) {
4328 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4329 if (card->options.isolation == ISOLATION_MODE_NONE) {
4330 dev_info(&card->gdev->dev,
4331 "QDIO data connection isolation is deactivated\n");
4332 } else {
4333 dev_info(&card->gdev->dev,
4334 "QDIO data connection isolation is activated\n");
4335 }
d64ecc22 4336 break;
0f54761d
SR		 4337 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4338 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4339 "deactivated\n", dev_name(&card->gdev->dev));
4340 if (fallback)
4341 card->options.isolation = card->options.prev_isolation;
4342 break;
4343 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4344 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4345 " activated\n", dev_name(&card->gdev->dev));
4346 if (fallback)
4347 card->options.isolation = card->options.prev_isolation;
4348 break;
d64ecc22 4349 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4350 dev_err(&card->gdev->dev, "Adapter does not "
4351 "support QDIO data connection isolation\n");
d64ecc22 4352 break;
d64ecc22 4353 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4354 dev_err(&card->gdev->dev,
4355 "Adapter is dedicated. "
4356 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4357 if (fallback)
4358 card->options.isolation = card->options.prev_isolation;
d64ecc22 4359 break;
d64ecc22 4360 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4361 dev_err(&card->gdev->dev,
4362 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4363 if (fallback)
4364 card->options.isolation = card->options.prev_isolation;
4365 break;
4366 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4367 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4368 "support reflective relay mode\n");
4369 if (fallback)
4370 card->options.isolation = card->options.prev_isolation;
4371 break;
4372 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4373 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4374 "enabled at the adjacent switch port");
4375 if (fallback)
4376 card->options.isolation = card->options.prev_isolation;
4377 break;
4378 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4379 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4380 "at the adjacent switch failed\n");
d64ecc22 4381 break;
d64ecc22 4382 default:
d64ecc22 4383 /* this should never happen */
0f54761d
SR		 4384 if (fallback)
4385 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4386 break;
4387 }
bbb822a8 4388 return 0;
d64ecc22
EL		 4389}
4390
4391static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4392 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4393{
4394 int rc;
4395 struct qeth_cmd_buffer *iob;
4396 struct qeth_ipa_cmd *cmd;
4397 struct qeth_set_access_ctrl *access_ctrl_req;
4398
847a50fd 4399 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4400
4401 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4402 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4403
4404 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4405 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4406 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4407 if (!iob)
4408 return -ENOMEM;
ff5caa7a 4409 cmd = __ipa_cmd(iob);
d64ecc22
EL		 4410 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4411 access_ctrl_req->subcmd_code = isolation;
4412
4413 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4414 &fallback);
d64ecc22
EL		 4415 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4416 return rc;
4417}
4418
0f54761d 4419int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4420{
4421 int rc = 0;
4422
847a50fd 4423 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4424
5113fec0
UB		 4425 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4426 card->info.type == QETH_CARD_TYPE_OSX) &&
4427 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4428 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4429 card->options.isolation, fallback);
d64ecc22
EL		 4430 if (rc) {
4431 QETH_DBF_MESSAGE(3,
5113fec0 4432 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4433 card->gdev->dev.kobj.name,
4434 rc);
0f54761d 4435 rc = -EOPNOTSUPP;
d64ecc22
EL		 4436 }
4437 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4438 card->options.isolation = ISOLATION_MODE_NONE;
4439
4440 dev_err(&card->gdev->dev, "Adapter does not "
4441 "support QDIO data connection isolation\n");
4442 rc = -EOPNOTSUPP;
4443 }
4444 return rc;
4445}
4446EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4447
4a71df50
FB		 4448void qeth_tx_timeout(struct net_device *dev)
4449{
4450 struct qeth_card *card;
4451
509e2562 4452 card = dev->ml_priv;
847a50fd 4453 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4454 card->stats.tx_errors++;
4455 qeth_schedule_recovery(card);
4456}
4457EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4458
942d6984 4459static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4460{
509e2562 4461 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4462 int rc = 0;
4463
4464 switch (regnum) {
4465 case MII_BMCR: /* Basic mode control register */
4466 rc = BMCR_FULLDPLX;
4467 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4468 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4469 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4470 rc |= BMCR_SPEED100;
4471 break;
4472 case MII_BMSR: /* Basic mode status register */
4473 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4474 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4475 BMSR_100BASE4;
4476 break;
4477 case MII_PHYSID1: /* PHYS ID 1 */
4478 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4479 dev->dev_addr[2];
4480 rc = (rc >> 5) & 0xFFFF;
4481 break;
4482 case MII_PHYSID2: /* PHYS ID 2 */
4483 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4484 break;
4485 case MII_ADVERTISE: /* Advertisement control reg */
4486 rc = ADVERTISE_ALL;
4487 break;
4488 case MII_LPA: /* Link partner ability reg */
4489 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4490 LPA_100BASE4 | LPA_LPACK;
4491 break;
4492 case MII_EXPANSION: /* Expansion register */
4493 break;
4494 case MII_DCOUNTER: /* disconnect counter */
4495 break;
4496 case MII_FCSCOUNTER: /* false carrier counter */
4497 break;
4498 case MII_NWAYTEST: /* N-way auto-neg test register */
4499 break;
4500 case MII_RERRCOUNTER: /* rx error counter */
4501 rc = card->stats.rx_errors;
4502 break;
4503 case MII_SREVISION: /* silicon revision */
4504 break;
4505 case MII_RESV1: /* reserved 1 */
4506 break;
4507 case MII_LBRERROR: /* loopback, rx, bypass error */
4508 break;
4509 case MII_PHYADDR: /* physical address */
4510 break;
4511 case MII_RESV2: /* reserved 2 */
4512 break;
4513 case MII_TPISTATUS: /* TPI status for 10mbps */
4514 break;
4515 case MII_NCONFIG: /* network interface config */
4516 break;
4517 default:
4518 break;
4519 }
4520 return rc;
4521}
4a71df50
FB		 4522
4523static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4524 struct qeth_cmd_buffer *iob, int len,
4525 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4526 unsigned long),
4527 void *reply_param)
4528{
4529 u16 s1, s2;
4530
847a50fd 4531 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4532
4533 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4534 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4535 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4536 /* adjust PDU length fields in IPA_PDU_HEADER */
4537 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4538 s2 = (u32) len;
4539 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4540 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4541 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4542 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4543 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4544 reply_cb, reply_param);
4545}
4546
4547static int qeth_snmp_command_cb(struct qeth_card *card,
4548 struct qeth_reply *reply, unsigned long sdata)
4549{
4550 struct qeth_ipa_cmd *cmd;
4551 struct qeth_arp_query_info *qinfo;
4552 struct qeth_snmp_cmd *snmp;
4553 unsigned char *data;
4554 __u16 data_len;
4555
847a50fd 4556 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4557
4558 cmd = (struct qeth_ipa_cmd *) sdata;
4559 data = (unsigned char *)((char *)cmd - reply->offset);
4560 qinfo = (struct qeth_arp_query_info *) reply->param;
4561 snmp = &cmd->data.setadapterparms.data.snmp;
4562
4563 if (cmd->hdr.return_code) {
8a593148 4564 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4565 return 0;
4566 }
4567 if (cmd->data.setadapterparms.hdr.return_code) {
4568 cmd->hdr.return_code =
4569 cmd->data.setadapterparms.hdr.return_code;
8a593148 4570 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4571 return 0;
4572 }
4573 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4574 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4575 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4576 else
4577 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4578
4579 /* check if there is enough room in userspace */
4580 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4581 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4582 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4583 return 0;
4584 }
847a50fd 4585 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4586 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4587 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4588 cmd->data.setadapterparms.hdr.seq_no);
4589 /*copy entries to user buffer*/
4590 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4591 memcpy(qinfo->udata + qinfo->udata_offset,
4592 (char *)snmp,
4593 data_len + offsetof(struct qeth_snmp_cmd, data));
4594 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4595 } else {
4596 memcpy(qinfo->udata + qinfo->udata_offset,
4597 (char *)&snmp->request, data_len);
4598 }
4599 qinfo->udata_offset += data_len;
4600 /* check if all replies received ... */
847a50fd 4601 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4602 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4603 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4604 cmd->data.setadapterparms.hdr.seq_no);
4605 if (cmd->data.setadapterparms.hdr.seq_no <
4606 cmd->data.setadapterparms.hdr.used_total)
4607 return 1;
4608 return 0;
4609}
4610
942d6984 4611static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4612{
4613 struct qeth_cmd_buffer *iob;
4614 struct qeth_ipa_cmd *cmd;
4615 struct qeth_snmp_ureq *ureq;
6fb392b1 4616 unsigned int req_len;
4a71df50
FB		 4617 struct qeth_arp_query_info qinfo = {0, };
4618 int rc = 0;
4619
847a50fd 4620 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4621
4622 if (card->info.guestlan)
4623 return -EOPNOTSUPP;
4624
4625 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4626 (!card->options.layer2)) {
4a71df50
FB		 4627 return -EOPNOTSUPP;
4628 }
4629 /* skip 4 bytes (data_len struct member) to get req_len */
4630 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4631 return -EFAULT;
6fb392b1
UB		 4632 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4633 sizeof(struct qeth_ipacmd_hdr) -
4634 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4635 return -EINVAL;
4986f3f0
JL		 4636 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4637 if (IS_ERR(ureq)) {
847a50fd 4638 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4639 return PTR_ERR(ureq);
4a71df50
FB		 4640 }
4641 qinfo.udata_len = ureq->hdr.data_len;
4642 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4643 if (!qinfo.udata) {
4644 kfree(ureq);
4645 return -ENOMEM;
4646 }
4647 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4648
4649 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4650 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4651 if (!iob) {
4652 rc = -ENOMEM;
4653 goto out;
4654 }
ff5caa7a 4655 cmd = __ipa_cmd(iob);
4a71df50
FB		 4656 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4657 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4658 qeth_snmp_command_cb, (void *)&qinfo);
4659 if (rc)
14cc21b6 4660 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4661 QETH_CARD_IFNAME(card), rc);
4662 else {
4663 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4664 rc = -EFAULT;
4665 }
1aec42bc 4666out:
4a71df50
FB		 4667 kfree(ureq);
4668 kfree(qinfo.udata);
4669 return rc;
4670}
4a71df50 4671
c3ab96f3
FB		 4672static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4673 struct qeth_reply *reply, unsigned long data)
4674{
686c97ee 4675 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
c3ab96f3
FB		 4676 struct qeth_qoat_priv *priv;
4677 char *resdata;
4678 int resdatalen;
4679
4680 QETH_CARD_TEXT(card, 3, "qoatcb");
686c97ee
JW		 4681 if (qeth_setadpparms_inspect_rc(cmd))
4682 return 0;
c3ab96f3 4683
c3ab96f3
FB		 4684 priv = (struct qeth_qoat_priv *)reply->param;
4685 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4686 resdata = (char *)data + 28;
4687
4688 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4689 cmd->hdr.return_code = IPA_RC_FFFF;
4690 return 0;
4691 }
4692
4693 memcpy((priv->buffer + priv->response_len), resdata,
4694 resdatalen);
4695 priv->response_len += resdatalen;
4696
4697 if (cmd->data.setadapterparms.hdr.seq_no <
4698 cmd->data.setadapterparms.hdr.used_total)
4699 return 1;
4700 return 0;
4701}
4702
942d6984 4703static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4704{
4705 int rc = 0;
4706 struct qeth_cmd_buffer *iob;
4707 struct qeth_ipa_cmd *cmd;
4708 struct qeth_query_oat *oat_req;
4709 struct qeth_query_oat_data oat_data;
4710 struct qeth_qoat_priv priv;
4711 void __user *tmp;
4712
4713 QETH_CARD_TEXT(card, 3, "qoatcmd");
4714
4715 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4716 rc = -EOPNOTSUPP;
4717 goto out;
4718 }
4719
4720 if (copy_from_user(&oat_data, udata,
4721 sizeof(struct qeth_query_oat_data))) {
4722 rc = -EFAULT;
4723 goto out;
4724 }
4725
4726 priv.buffer_len = oat_data.buffer_len;
4727 priv.response_len = 0;
4728 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4729 if (!priv.buffer) {
4730 rc = -ENOMEM;
4731 goto out;
4732 }
4733
4734 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4735 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4736 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4737 if (!iob) {
4738 rc = -ENOMEM;
4739 goto out_free;
4740 }
ff5caa7a 4741 cmd = __ipa_cmd(iob);
c3ab96f3
FB		 4742 oat_req = &cmd->data.setadapterparms.data.query_oat;
4743 oat_req->subcmd_code = oat_data.command;
4744
4745 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4746 &priv);
4747 if (!rc) {
4748 if (is_compat_task())
4749 tmp = compat_ptr(oat_data.ptr);
4750 else
4751 tmp = (void __user *)(unsigned long)oat_data.ptr;
4752
4753 if (copy_to_user(tmp, priv.buffer,
4754 priv.response_len)) {
4755 rc = -EFAULT;
4756 goto out_free;
4757 }
4758
4759 oat_data.response_len = priv.response_len;
4760
4761 if (copy_to_user(udata, &oat_data,
4762 sizeof(struct qeth_query_oat_data)))
4763 rc = -EFAULT;
4764 } else
4765 if (rc == IPA_RC_FFFF)
4766 rc = -EFAULT;
4767
4768out_free:
4769 kfree(priv.buffer);
4770out:
4771 return rc;
4772}
c3ab96f3 4773
e71e4072
HC		 4774static int qeth_query_card_info_cb(struct qeth_card *card,
4775 struct qeth_reply *reply, unsigned long data)
02d5cb5b 4776{
686c97ee
JW		 4777 struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
4778 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
02d5cb5b 4779 struct qeth_query_card_info *card_info;
02d5cb5b
EC		 4780
4781 QETH_CARD_TEXT(card, 2, "qcrdincb");
686c97ee
JW		 4782 if (qeth_setadpparms_inspect_rc(cmd))
4783 return 0;
02d5cb5b 4784
686c97ee
JW		 4785 card_info = &cmd->data.setadapterparms.data.card_info;
4786 carrier_info->card_type = card_info->card_type;
4787 carrier_info->port_mode = card_info->port_mode;
4788 carrier_info->port_speed = card_info->port_speed;
02d5cb5b
EC		 4789 return 0;
4790}
4791
bca51650 4792static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4793 struct carrier_info *carrier_info)
4794{
4795 struct qeth_cmd_buffer *iob;
4796
4797 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4798 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4799 return -EOPNOTSUPP;
4800 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4801 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4802 if (!iob)
4803 return -ENOMEM;
02d5cb5b
EC		 4804 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4805 (void *)carrier_info);
4806}
02d5cb5b 4807
ec61bd2f
JW		 4808/**
4809 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4810 * @card: pointer to a qeth_card
4811 *
4812 * Returns
4813 * 0, if a MAC address has been set for the card's netdevice
4814 * a return code, for various error conditions
4815 */
4816int qeth_vm_request_mac(struct qeth_card *card)
4817{
4818 struct diag26c_mac_resp *response;
4819 struct diag26c_mac_req *request;
4820 struct ccw_dev_id id;
4821 int rc;
4822
4823 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4824
4825 if (!card->dev)
4826 return -ENODEV;
4827
4828 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4829 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4830 if (!request || !response) {
4831 rc = -ENOMEM;
4832 goto out;
4833 }
4834
b7493e91 4835 ccw_device_get_id(CARD_RDEV(card), &id);
ec61bd2f
JW		 4836 request->resp_buf_len = sizeof(*response);
4837 request->resp_version = DIAG26C_VERSION2;
4838 request->op_code = DIAG26C_GET_MAC;
4839 request->devno = id.devno;
4840
615dff22 4841 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f 4842 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
615dff22 4843 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f
JW		 4844 if (rc)
4845 goto out;
615dff22 4846 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
ec61bd2f
JW		 4847
4848 if (request->resp_buf_len < sizeof(*response) ||
4849 response->version != request->resp_version) {
4850 rc = -EIO;
4851 QETH_DBF_TEXT(SETUP, 2, "badresp");
4852 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4853 sizeof(request->resp_buf_len));
4854 } else if (!is_valid_ether_addr(response->mac)) {
4855 rc = -EINVAL;
4856 QETH_DBF_TEXT(SETUP, 2, "badmac");
4857 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4858 } else {
4859 ether_addr_copy(card->dev->dev_addr, response->mac);
4860 }
4861
4862out:
4863 kfree(response);
4864 kfree(request);
4865 return rc;
4866}
4867EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4868
cef6ff22 4869static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4870{
aa59004b
JW		 4871 if (card->info.type == QETH_CARD_TYPE_IQD)
4872 return QDIO_IQDIO_QFMT;
4873 else
4874 return QDIO_QETH_QFMT;
4a71df50
FB		 4875}
4876
d0ff1f52
UB		 4877static void qeth_determine_capabilities(struct qeth_card *card)
4878{
4879 int rc;
4880 int length;
4881 char *prcd;
4882 struct ccw_device *ddev;
4883 int ddev_offline = 0;
4884
4885 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4886 ddev = CARD_DDEV(card);
4887 if (!ddev->online) {
4888 ddev_offline = 1;
4889 rc = ccw_device_set_online(ddev);
4890 if (rc) {
4891 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4892 goto out;
4893 }
4894 }
4895
4896 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4897 if (rc) {
4898 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4899 dev_name(&card->gdev->dev), rc);
4900 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4901 goto out_offline;
4902 }
4903 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4904 if (ddev_offline)
4905 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4906 kfree(prcd);
4907
4908 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4909 if (rc)
4910 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4911
0da9581d 4912 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4913 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4914 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4915 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4916 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4917 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4918 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4919 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4920 dev_info(&card->gdev->dev,
4921 "Completion Queueing supported\n");
4922 } else {
4923 card->options.cq = QETH_CQ_NOTAVAILABLE;
4924 }
4925
4926
d0ff1f52
UB		 4927out_offline:
4928 if (ddev_offline == 1)
4929 ccw_device_set_offline(ddev);
4930out:
4931 return;
4932}
4933
cef6ff22
JW		 4934static void qeth_qdio_establish_cq(struct qeth_card *card,
4935 struct qdio_buffer **in_sbal_ptrs,
4936 void (**queue_start_poll)
4937 (struct ccw_device *, int,
4938 unsigned long))
4939{
0da9581d
EL		 4940 int i;
4941
4942 if (card->options.cq == QETH_CQ_ENABLED) {
4943 int offset = QDIO_MAX_BUFFERS_PER_Q *
4944 (card->qdio.no_in_queues - 1);
0da9581d
EL		 4945 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4946 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4947 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4948 }
4949
4950 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4951 }
4952}
4953
4a71df50
FB		 4954static int qeth_qdio_establish(struct qeth_card *card)
4955{
4956 struct qdio_initialize init_data;
4957 char *qib_param_field;
4958 struct qdio_buffer **in_sbal_ptrs;
104ea556 4959 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4960 struct qdio_buffer **out_sbal_ptrs;
4961 int i, j, k;
4962 int rc = 0;
4963
d11ba0c4 4964 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4965
4966 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4967 GFP_KERNEL);
104ea556 4968 if (!qib_param_field) {
4969 rc = -ENOMEM;
4970 goto out_free_nothing;
4971 }
4a71df50
FB		 4972
4973 qeth_create_qib_param_field(card, qib_param_field);
4974 qeth_create_qib_param_field_blkt(card, qib_param_field);
4975
b3332930 4976 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4977 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4978 GFP_KERNEL);
4979 if (!in_sbal_ptrs) {
104ea556 4980 rc = -ENOMEM;
4981 goto out_free_qib_param;
4a71df50 4982 }
0da9581d 4983 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4984 in_sbal_ptrs[i] = (struct qdio_buffer *)
4985 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4986 }
4a71df50 4987
0da9581d
EL		 4988 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4989 GFP_KERNEL);
104ea556 4990 if (!queue_start_poll) {
4991 rc = -ENOMEM;
4992 goto out_free_in_sbals;
4993 }
0da9581d 4994 for (i = 0; i < card->qdio.no_in_queues; ++i)
7bcd64eb 4995 queue_start_poll[i] = qeth_qdio_start_poll;
0da9581d
EL		 4996
4997 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4998
4a71df50 4999 out_sbal_ptrs =
b3332930 5000 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 5001 sizeof(void *), GFP_KERNEL);
5002 if (!out_sbal_ptrs) {
104ea556 5003 rc = -ENOMEM;
5004 goto out_free_queue_start_poll;
4a71df50
FB		 5005 }
5006 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
5007 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
5008 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 5009 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 5010 }
5011
5012 memset(&init_data, 0, sizeof(struct qdio_initialize));
5013 init_data.cdev = CARD_DDEV(card);
5014 init_data.q_format = qeth_get_qdio_q_format(card);
5015 init_data.qib_param_field_format = 0;
5016 init_data.qib_param_field = qib_param_field;
0da9581d 5017 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 5018 init_data.no_output_qs = card->qdio.no_out_queues;
7bcd64eb
JW		 5019 init_data.input_handler = qeth_qdio_input_handler;
5020 init_data.output_handler = qeth_qdio_output_handler;
e58b0d90 5021 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 5022 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 5023 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
5024 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 5025 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 5026 init_data.scan_threshold =
0fa81cd4 5027 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 5028
5029 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
5030 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 5031 rc = qdio_allocate(&init_data);
5032 if (rc) {
5033 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
5034 goto out;
5035 }
5036 rc = qdio_establish(&init_data);
5037 if (rc) {
4a71df50 5038 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 5039 qdio_free(CARD_DDEV(card));
5040 }
4a71df50 5041 }
0da9581d
EL		 5042
5043 switch (card->options.cq) {
5044 case QETH_CQ_ENABLED:
5045 dev_info(&card->gdev->dev, "Completion Queue support enabled");
5046 break;
5047 case QETH_CQ_DISABLED:
5048 dev_info(&card->gdev->dev, "Completion Queue support disabled");
5049 break;
5050 default:
5051 break;
5052 }
cc961d40 5053out:
4a71df50 5054 kfree(out_sbal_ptrs);
104ea556 5055out_free_queue_start_poll:
5056 kfree(queue_start_poll);
5057out_free_in_sbals:
4a71df50 5058 kfree(in_sbal_ptrs);
104ea556 5059out_free_qib_param:
4a71df50 5060 kfree(qib_param_field);
104ea556 5061out_free_nothing:
4a71df50
FB		 5062 return rc;
5063}
5064
5065static void qeth_core_free_card(struct qeth_card *card)
5066{
5067
d11ba0c4
PT		 5068 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5069 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 5070 qeth_clean_channel(&card->read);
5071 qeth_clean_channel(&card->write);
4a71df50 5072 qeth_free_qdio_buffers(card);
6bcac508 5073 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 5074 kfree(card);
5075}
5076
395672e0
SR		 5077void qeth_trace_features(struct qeth_card *card)
5078{
5079 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 5080 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
5081 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
5082 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
5083 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
5084 sizeof(card->info.diagass_support));
395672e0
SR		 5085}
5086EXPORT_SYMBOL_GPL(qeth_trace_features);
5087
4a71df50 5088static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 5089 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5090 .driver_info = QETH_CARD_TYPE_OSD},
5091 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5092 .driver_info = QETH_CARD_TYPE_IQD},
5093 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5094 .driver_info = QETH_CARD_TYPE_OSN},
5095 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5096 .driver_info = QETH_CARD_TYPE_OSM},
5097 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5098 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5099 {},
5100};
5101MODULE_DEVICE_TABLE(ccw, qeth_ids);
5102
5103static struct ccw_driver qeth_ccw_driver = {
3bda058b 5104 .driver = {
3e70b3b8 5105 .owner = THIS_MODULE,
3bda058b
SO		 5106 .name = "qeth",
5107 },
4a71df50
FB		 5108 .ids = qeth_ids,
5109 .probe = ccwgroup_probe_ccwdev,
5110 .remove = ccwgroup_remove_ccwdev,
5111};
5112
4a71df50
FB		 5113int qeth_core_hardsetup_card(struct qeth_card *card)
5114{
6ebb7f8d 5115 int retries = 3;
4a71df50
FB		 5116 int rc;
5117
d11ba0c4 5118 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5119 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5120 qeth_update_from_chp_desc(card);
4a71df50 5121retry:
6ebb7f8d 5122 if (retries < 3)
74eacdb9
FB		 5123 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5124 dev_name(&card->gdev->dev));
22ae2790 5125 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5126 ccw_device_set_offline(CARD_DDEV(card));
5127 ccw_device_set_offline(CARD_WDEV(card));
5128 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5129 qdio_free(CARD_DDEV(card));
aa909224
UB		 5130 rc = ccw_device_set_online(CARD_RDEV(card));
5131 if (rc)
5132 goto retriable;
5133 rc = ccw_device_set_online(CARD_WDEV(card));
5134 if (rc)
5135 goto retriable;
5136 rc = ccw_device_set_online(CARD_DDEV(card));
5137 if (rc)
5138 goto retriable;
aa909224 5139retriable:
4a71df50 5140 if (rc == -ERESTARTSYS) {
d11ba0c4 5141 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5142 return rc;
5143 } else if (rc) {
d11ba0c4 5144 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5145 if (--retries < 0)
4a71df50
FB		 5146 goto out;
5147 else
5148 goto retry;
5149 }
d0ff1f52 5150 qeth_determine_capabilities(card);
4a71df50
FB		 5151 qeth_init_tokens(card);
5152 qeth_init_func_level(card);
5153 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5154 if (rc == -ERESTARTSYS) {
d11ba0c4 5155 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5156 return rc;
5157 } else if (rc) {
d11ba0c4 5158 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5159 if (--retries < 0)
5160 goto out;
5161 else
5162 goto retry;
5163 }
5164 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5165 if (rc == -ERESTARTSYS) {
d11ba0c4 5166 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5167 return rc;
5168 } else if (rc) {
d11ba0c4 5169 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5170 if (--retries < 0)
5171 goto out;
5172 else
5173 goto retry;
5174 }
908abbb5 5175 card->read_or_write_problem = 0;
4a71df50
FB		 5176 rc = qeth_mpc_initialize(card);
5177 if (rc) {
d11ba0c4 5178 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5179 goto out;
5180 }
1da74b1c 5181
10340510
JW		 5182 rc = qeth_send_startlan(card);
5183 if (rc) {
5184 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5185 if (rc == IPA_RC_LAN_OFFLINE) {
5186 dev_warn(&card->gdev->dev,
5187 "The LAN is offline\n");
5188 card->lan_online = 0;
5189 } else {
5190 rc = -ENODEV;
5191 goto out;
5192 }
5193 } else
5194 card->lan_online = 1;
5195
1da74b1c 5196 card->options.ipa4.supported_funcs = 0;
4d7def2a 5197 card->options.ipa6.supported_funcs = 0;
1da74b1c 5198 card->options.adp.supported_funcs = 0;
b4d72c08 5199 card->options.sbp.supported_funcs = 0;
1da74b1c 5200 card->info.diagass_support = 0;
1aec42bc
TR		 5201 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5202 if (rc == -ENOMEM)
5203 goto out;
5204 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5205 rc = qeth_query_setadapterparms(card);
5206 if (rc < 0) {
10340510 5207 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5208 goto out;
5209 }
5210 }
5211 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5212 rc = qeth_query_setdiagass(card);
5213 if (rc < 0) {
10340510 5214 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5215 goto out;
5216 }
5217 }
4a71df50
FB		 5218 return 0;
5219out:
74eacdb9
FB		 5220 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5221 "an error on the device\n");
5222 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5223 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5224 return rc;
5225}
5226EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5227
8d68af6a
JW		 5228static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5229 struct sk_buff *skb, int offset, int data_len)
4a71df50
FB		 5230{
5231 struct page *page = virt_to_page(element->addr);
b6f72f96 5232 unsigned int next_frag;
b3332930 5233
8d68af6a
JW		 5234 /* first fill the linear space */
5235 if (!skb->len) {
5236 unsigned int linear = min(data_len, skb_tailroom(skb));
0da9581d 5237
8d68af6a
JW		 5238 skb_put_data(skb, element->addr + offset, linear);
5239 data_len -= linear;
5240 if (!data_len)
5241 return;
5242 offset += linear;
5243 /* fall through to add page frag for remaining data */
4a71df50 5244 }
0da9581d 5245
8d68af6a 5246 next_frag = skb_shinfo(skb)->nr_frags;
b6f72f96 5247 get_page(page);
8d68af6a 5248 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
4a71df50
FB		 5249}
5250
bca51650
TR		 5251static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5252{
5253 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5254}
5255
4a71df50 5256struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5257 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5258 struct qdio_buffer_element **__element, int *__offset,
5259 struct qeth_hdr **hdr)
5260{
5261 struct qdio_buffer_element *element = *__element;
b3332930 5262 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50 5263 int offset = *__offset;
8d68af6a 5264 struct sk_buff *skb;
76b11f8e 5265 int skb_len = 0;
4a71df50
FB		 5266 void *data_ptr;
5267 int data_len;
5268 int headroom = 0;
5269 int use_rx_sg = 0;
4a71df50 5270
4a71df50 5271 /* qeth_hdr must not cross element boundaries */
864c17c3 5272 while (element->length < offset + sizeof(struct qeth_hdr)) {
4a71df50
FB		 5273 if (qeth_is_last_sbale(element))
5274 return NULL;
5275 element++;
5276 offset = 0;
4a71df50
FB		 5277 }
5278 *hdr = element->addr + offset;
5279
5280 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5281 switch ((*hdr)->hdr.l2.id) {
5282 case QETH_HEADER_TYPE_LAYER2:
5283 skb_len = (*hdr)->hdr.l2.pkt_length;
5284 break;
5285 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5286 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5287 headroom = ETH_HLEN;
76b11f8e
UB		 5288 break;
5289 case QETH_HEADER_TYPE_OSN:
5290 skb_len = (*hdr)->hdr.osn.pdu_length;
5291 headroom = sizeof(struct qeth_hdr);
5292 break;
5293 default:
5294 break;
4a71df50
FB		 5295 }
5296
5297 if (!skb_len)
5298 return NULL;
5299
b3332930
FB		 5300 if (((skb_len >= card->options.rx_sg_cb) &&
5301 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5302 (!atomic_read(&card->force_alloc_skb))) ||
8d68af6a 5303 (card->options.cq == QETH_CQ_ENABLED))
4a71df50 5304 use_rx_sg = 1;
8d68af6a
JW		 5305
5306 if (use_rx_sg && qethbuffer->rx_skb) {
5307 /* QETH_CQ_ENABLED only: */
5308 skb = qethbuffer->rx_skb;
5309 qethbuffer->rx_skb = NULL;
4a71df50 5310 } else {
8d68af6a
JW		 5311 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5312
37cf05d2 5313 skb = napi_alloc_skb(&card->napi, linear + headroom);
4a71df50 5314 }
8d68af6a
JW		 5315 if (!skb)
5316 goto no_mem;
5317 if (headroom)
5318 skb_reserve(skb, headroom);
4a71df50
FB		 5319
5320 data_ptr = element->addr + offset;
5321 while (skb_len) {
5322 data_len = min(skb_len, (int)(element->length - offset));
5323 if (data_len) {
8d68af6a
JW		 5324 if (use_rx_sg)
5325 qeth_create_skb_frag(element, skb, offset,
5326 data_len);
5327 else
59ae1d12 5328 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5329 }
5330 skb_len -= data_len;
5331 if (skb_len) {
5332 if (qeth_is_last_sbale(element)) {
847a50fd 5333 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5334 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5335 dev_kfree_skb_any(skb);
5336 card->stats.rx_errors++;
5337 return NULL;
5338 }
5339 element++;
5340 offset = 0;
5341 data_ptr = element->addr;
5342 } else {
5343 offset += data_len;
5344 }
5345 }
5346 *__element = element;
5347 *__offset = offset;
5348 if (use_rx_sg && card->options.performance_stats) {
5349 card->perf_stats.sg_skbs_rx++;
5350 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5351 }
5352 return skb;
5353no_mem:
5354 if (net_ratelimit()) {
847a50fd 5355 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5356 }
5357 card->stats.rx_dropped++;
5358 return NULL;
5359}
5360EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5361
d73ef324
JW		 5362int qeth_poll(struct napi_struct *napi, int budget)
5363{
5364 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5365 int work_done = 0;
5366 struct qeth_qdio_buffer *buffer;
5367 int done;
5368 int new_budget = budget;
5369
5370 if (card->options.performance_stats) {
5371 card->perf_stats.inbound_cnt++;
5372 card->perf_stats.inbound_start_time = qeth_get_micros();
5373 }
5374
5375 while (1) {
5376 if (!card->rx.b_count) {
5377 card->rx.qdio_err = 0;
5378 card->rx.b_count = qdio_get_next_buffers(
5379 card->data.ccwdev, 0, &card->rx.b_index,
5380 &card->rx.qdio_err);
5381 if (card->rx.b_count <= 0) {
5382 card->rx.b_count = 0;
5383 break;
5384 }
5385 card->rx.b_element =
5386 &card->qdio.in_q->bufs[card->rx.b_index]
5387 .buffer->element[0];
5388 card->rx.e_offset = 0;
5389 }
5390
5391 while (card->rx.b_count) {
5392 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5393 if (!(card->rx.qdio_err &&
5394 qeth_check_qdio_errors(card, buffer->buffer,
5395 card->rx.qdio_err, "qinerr")))
5396 work_done +=
5397 card->discipline->process_rx_buffer(
5398 card, new_budget, &done);
5399 else
5400 done = 1;
5401
5402 if (done) {
5403 if (card->options.performance_stats)
5404 card->perf_stats.bufs_rec++;
5405 qeth_put_buffer_pool_entry(card,
5406 buffer->pool_entry);
5407 qeth_queue_input_buffer(card, card->rx.b_index);
5408 card->rx.b_count--;
5409 if (card->rx.b_count) {
5410 card->rx.b_index =
5411 (card->rx.b_index + 1) %
5412 QDIO_MAX_BUFFERS_PER_Q;
5413 card->rx.b_element =
5414 &card->qdio.in_q
5415 ->bufs[card->rx.b_index]
5416 .buffer->element[0];
5417 card->rx.e_offset = 0;
5418 }
5419 }
5420
5421 if (work_done >= budget)
5422 goto out;
5423 else
5424 new_budget = budget - work_done;
5425 }
5426 }
5427
978759e8 5428 napi_complete_done(napi, work_done);
d73ef324
JW		 5429 if (qdio_start_irq(card->data.ccwdev, 0))
5430 napi_schedule(&card->napi);
5431out:
5432 if (card->options.performance_stats)
5433 card->perf_stats.inbound_time += qeth_get_micros() -
5434 card->perf_stats.inbound_start_time;
5435 return work_done;
5436}
5437EXPORT_SYMBOL_GPL(qeth_poll);
5438
ad3cbf61
JW		 5439static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
5440{
5441 if (!cmd->hdr.return_code)
5442 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5443 return cmd->hdr.return_code;
5444}
5445
8f43fb00
TR		 5446int qeth_setassparms_cb(struct qeth_card *card,
5447 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5448{
5449 struct qeth_ipa_cmd *cmd;
5450
5451 QETH_CARD_TEXT(card, 4, "defadpcb");
5452
5453 cmd = (struct qeth_ipa_cmd *) data;
5454 if (cmd->hdr.return_code == 0) {
5455 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5456 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5457 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5458 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5459 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5460 }
4d7def2a
TR		 5461 return 0;
5462}
8f43fb00 5463EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5464
b475e316
TR		 5465struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5466 enum qeth_ipa_funcs ipa_func,
5467 __u16 cmd_code, __u16 len,
5468 enum qeth_prot_versions prot)
4d7def2a
TR		 5469{
5470 struct qeth_cmd_buffer *iob;
5471 struct qeth_ipa_cmd *cmd;
5472
5473 QETH_CARD_TEXT(card, 4, "getasscm");
5474 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5475
5476 if (iob) {
ff5caa7a 5477 cmd = __ipa_cmd(iob);
4d7def2a
TR		 5478 cmd->data.setassparms.hdr.assist_no = ipa_func;
5479 cmd->data.setassparms.hdr.length = 8 + len;
5480 cmd->data.setassparms.hdr.command_code = cmd_code;
5481 cmd->data.setassparms.hdr.return_code = 0;
5482 cmd->data.setassparms.hdr.seq_no = 0;
5483 }
5484
5485 return iob;
5486}
b475e316 5487EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5488
5489int qeth_send_setassparms(struct qeth_card *card,
5490 struct qeth_cmd_buffer *iob, __u16 len, long data,
5491 int (*reply_cb)(struct qeth_card *,
5492 struct qeth_reply *, unsigned long),
5493 void *reply_param)
5494{
5495 int rc;
5496 struct qeth_ipa_cmd *cmd;
5497
5498 QETH_CARD_TEXT(card, 4, "sendassp");
5499
ff5caa7a 5500 cmd = __ipa_cmd(iob);
4d7def2a
TR		 5501 if (len <= sizeof(__u32))
5502 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5503 else /* (len > sizeof(__u32)) */
5504 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5505
5506 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5507 return rc;
5508}
5509EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5510
5511int qeth_send_simple_setassparms(struct qeth_card *card,
5512 enum qeth_ipa_funcs ipa_func,
5513 __u16 cmd_code, long data)
5514{
5515 int rc;
5516 int length = 0;
5517 struct qeth_cmd_buffer *iob;
5518
5519 QETH_CARD_TEXT(card, 4, "simassp4");
5520 if (data)
5521 length = sizeof(__u32);
5522 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5523 length, QETH_PROT_IPV4);
5524 if (!iob)
5525 return -ENOMEM;
5526 rc = qeth_send_setassparms(card, iob, length, data,
5527 qeth_setassparms_cb, NULL);
5528 return rc;
5529}
5530EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5531
4a71df50
FB		 5532static void qeth_unregister_dbf_views(void)
5533{
d11ba0c4
PT		 5534 int x;
5535 for (x = 0; x < QETH_DBF_INFOS; x++) {
5536 debug_unregister(qeth_dbf[x].id);
5537 qeth_dbf[x].id = NULL;
5538 }
4a71df50
FB		 5539}
5540
8e96c51c 5541void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5542{
5543 char dbf_txt_buf[32];
345aa66e 5544 va_list args;
cd023216 5545
8e6a8285 5546 if (!debug_level_enabled(id, level))
cd023216 5547 return;
345aa66e
PT		 5548 va_start(args, fmt);
5549 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5550 va_end(args);
8e96c51c 5551 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5552}
5553EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5554
4a71df50
FB		 5555static int qeth_register_dbf_views(void)
5556{
d11ba0c4
PT		 5557 int ret;
5558 int x;
5559
5560 for (x = 0; x < QETH_DBF_INFOS; x++) {
5561 /* register the areas */
5562 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5563 qeth_dbf[x].pages,
5564 qeth_dbf[x].areas,
5565 qeth_dbf[x].len);
5566 if (qeth_dbf[x].id == NULL) {
5567 qeth_unregister_dbf_views();
5568 return -ENOMEM;
5569 }
4a71df50 5570
d11ba0c4
PT		 5571 /* register a view */
5572 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5573 if (ret) {
5574 qeth_unregister_dbf_views();
5575 return ret;
5576 }
4a71df50 5577
d11ba0c4
PT		 5578 /* set a passing level */
5579 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5580 }
4a71df50
FB		 5581
5582 return 0;
5583}
5584
5585int qeth_core_load_discipline(struct qeth_card *card,
5586 enum qeth_discipline_id discipline)
5587{
5588 int rc = 0;
c70eb09d 5589
2022e00c 5590 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5591 switch (discipline) {
5592 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5593 card->discipline = try_then_request_module(
5594 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5595 break;
5596 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5597 card->discipline = try_then_request_module(
5598 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5599 break;
c70eb09d
JW		 5600 default:
5601 break;
4a71df50 5602 }
c70eb09d 5603
c041f2d4 5604 if (!card->discipline) {
74eacdb9
FB		 5605 dev_err(&card->gdev->dev, "There is no kernel module to "
5606 "support discipline %d\n", discipline);
4a71df50
FB		 5607 rc = -EINVAL;
5608 }
2022e00c 5609 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5610 return rc;
5611}
5612
5613void qeth_core_free_discipline(struct qeth_card *card)
5614{
5615 if (card->options.layer2)
c041f2d4 5616 symbol_put(qeth_l2_discipline);
4a71df50 5617 else
c041f2d4
SO		 5618 symbol_put(qeth_l3_discipline);
5619 card->discipline = NULL;
4a71df50
FB		 5620}
5621
2d2ebb3e 5622const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5623 .name = "qeth_generic",
5624 .groups = qeth_generic_attr_groups,
5625};
2d2ebb3e
JW		 5626EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5627
b7169c51
SO		 5628static const struct device_type qeth_osn_devtype = {
5629 .name = "qeth_osn",
5630 .groups = qeth_osn_attr_groups,
5631};
5632
819dc537
SR		 5633#define DBF_NAME_LEN 20
5634
5635struct qeth_dbf_entry {
5636 char dbf_name[DBF_NAME_LEN];
5637 debug_info_t *dbf_info;
5638 struct list_head dbf_list;
5639};
5640
5641static LIST_HEAD(qeth_dbf_list);
5642static DEFINE_MUTEX(qeth_dbf_list_mutex);
5643
5644static debug_info_t *qeth_get_dbf_entry(char *name)
5645{
5646 struct qeth_dbf_entry *entry;
5647 debug_info_t *rc = NULL;
5648
5649 mutex_lock(&qeth_dbf_list_mutex);
5650 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5651 if (strcmp(entry->dbf_name, name) == 0) {
5652 rc = entry->dbf_info;
5653 break;
5654 }
5655 }
5656 mutex_unlock(&qeth_dbf_list_mutex);
5657 return rc;
5658}
5659
5660static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5661{
5662 struct qeth_dbf_entry *new_entry;
5663
5664 card->debug = debug_register(name, 2, 1, 8);
5665 if (!card->debug) {
5666 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5667 goto err;
5668 }
5669 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5670 goto err_dbg;
5671 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5672 if (!new_entry)
5673 goto err_dbg;
5674 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5675 new_entry->dbf_info = card->debug;
5676 mutex_lock(&qeth_dbf_list_mutex);
5677 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5678 mutex_unlock(&qeth_dbf_list_mutex);
5679
5680 return 0;
5681
5682err_dbg:
5683 debug_unregister(card->debug);
5684err:
5685 return -ENOMEM;
5686}
5687
5688static void qeth_clear_dbf_list(void)
5689{
5690 struct qeth_dbf_entry *entry, *tmp;
5691
5692 mutex_lock(&qeth_dbf_list_mutex);
5693 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5694 list_del(&entry->dbf_list);
5695 debug_unregister(entry->dbf_info);
5696 kfree(entry);
5697 }
5698 mutex_unlock(&qeth_dbf_list_mutex);
5699}
5700
4a71df50
FB		 5701static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5702{
5703 struct qeth_card *card;
5704 struct device *dev;
5705 int rc;
c70eb09d 5706 enum qeth_discipline_id enforced_disc;
4a71df50 5707 unsigned long flags;
819dc537 5708 char dbf_name[DBF_NAME_LEN];
4a71df50 5709
d11ba0c4 5710 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5711
5712 dev = &gdev->dev;
5713 if (!get_device(dev))
5714 return -ENODEV;
5715
2a0217d5 5716 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5717
5718 card = qeth_alloc_card();
5719 if (!card) {
d11ba0c4 5720 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5721 rc = -ENOMEM;
5722 goto err_dev;
5723 }
af039068
CO		 5724
5725 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5726 dev_name(&gdev->dev));
819dc537 5727 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5728 if (!card->debug) {
819dc537
SR		 5729 rc = qeth_add_dbf_entry(card, dbf_name);
5730 if (rc)
5731 goto err_card;
af039068 5732 }
af039068 5733
4a71df50
FB		 5734 card->read.ccwdev = gdev->cdev[0];
5735 card->write.ccwdev = gdev->cdev[1];
5736 card->data.ccwdev = gdev->cdev[2];
5737 dev_set_drvdata(&gdev->dev, card);
5738 card->gdev = gdev;
5739 gdev->cdev[0]->handler = qeth_irq;
5740 gdev->cdev[1]->handler = qeth_irq;
5741 gdev->cdev[2]->handler = qeth_irq;
5742
ed2e93ef 5743 qeth_determine_card_type(card);
4a71df50
FB		 5744 rc = qeth_setup_card(card);
5745 if (rc) {
d11ba0c4 5746 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5747 goto err_card;
4a71df50
FB		 5748 }
5749
c70eb09d
JW		 5750 qeth_determine_capabilities(card);
5751 enforced_disc = qeth_enforce_discipline(card);
5752 switch (enforced_disc) {
5753 case QETH_DISCIPLINE_UNDETERMINED:
5754 gdev->dev.type = &qeth_generic_devtype;
5755 break;
5756 default:
5757 card->info.layer_enforced = true;
5758 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5759 if (rc)
819dc537 5760 goto err_card;
2d2ebb3e
JW		 5761
5762 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5763 ? card->discipline->devtype
5764 : &qeth_osn_devtype;
c041f2d4 5765 rc = card->discipline->setup(card->gdev);
4a71df50 5766 if (rc)
5113fec0 5767 goto err_disc;
2d2ebb3e 5768 break;
4a71df50
FB		 5769 }
5770
5771 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5772 list_add_tail(&card->list, &qeth_core_card_list.list);
5773 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5774 return 0;
5775
5113fec0
UB		 5776err_disc:
5777 qeth_core_free_discipline(card);
4a71df50
FB		 5778err_card:
5779 qeth_core_free_card(card);
5780err_dev:
5781 put_device(dev);
5782 return rc;
5783}
5784
5785static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5786{
5787 unsigned long flags;
5788 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5789
28a7e4c9 5790 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5791
c041f2d4
SO		 5792 if (card->discipline) {
5793 card->discipline->remove(gdev);
9dc48ccc
UB		 5794 qeth_core_free_discipline(card);
5795 }
5796
4a71df50
FB		 5797 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5798 list_del(&card->list);
5799 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5800 qeth_core_free_card(card);
5801 dev_set_drvdata(&gdev->dev, NULL);
5802 put_device(&gdev->dev);
5803 return;
5804}
5805
5806static int qeth_core_set_online(struct ccwgroup_device *gdev)
5807{
5808 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5809 int rc = 0;
c70eb09d 5810 enum qeth_discipline_id def_discipline;
4a71df50 5811
c041f2d4 5812 if (!card->discipline) {
4a71df50
FB		 5813 if (card->info.type == QETH_CARD_TYPE_IQD)
5814 def_discipline = QETH_DISCIPLINE_LAYER3;
5815 else
5816 def_discipline = QETH_DISCIPLINE_LAYER2;
5817 rc = qeth_core_load_discipline(card, def_discipline);
5818 if (rc)
5819 goto err;
c041f2d4 5820 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5821 if (rc) {
5822 qeth_core_free_discipline(card);
4a71df50 5823 goto err;
9111e788 5824 }
4a71df50 5825 }
c041f2d4 5826 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5827err:
5828 return rc;
5829}
5830
5831static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5832{
5833 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5834 return card->discipline->set_offline(gdev);
4a71df50
FB		 5835}
5836
5837static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5838{
5839 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5840 qeth_set_allowed_threads(card, 0, 1);
5841 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5842 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5843 qeth_qdio_clear_card(card, 0);
5844 qeth_clear_qdio_buffers(card);
5845 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5846}
5847
bbcfcdc8
FB		 5848static int qeth_core_freeze(struct ccwgroup_device *gdev)
5849{
5850 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5851 if (card->discipline && card->discipline->freeze)
5852 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5853 return 0;
5854}
5855
5856static int qeth_core_thaw(struct ccwgroup_device *gdev)
5857{
5858 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5859 if (card->discipline && card->discipline->thaw)
5860 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5861 return 0;
5862}
5863
5864static int qeth_core_restore(struct ccwgroup_device *gdev)
5865{
5866 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5867 if (card->discipline && card->discipline->restore)
5868 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5869 return 0;
5870}
5871
4a71df50 5872static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5873 .driver = {
5874 .owner = THIS_MODULE,
5875 .name = "qeth",
5876 },
f9a5d70c 5877 .ccw_driver = &qeth_ccw_driver,
b7169c51 5878 .setup = qeth_core_probe_device,
4a71df50
FB		 5879 .remove = qeth_core_remove_device,
5880 .set_online = qeth_core_set_online,
5881 .set_offline = qeth_core_set_offline,
5882 .shutdown = qeth_core_shutdown,
6ffa4d1b
JW		 5883 .prepare = NULL,
5884 .complete = NULL,
bbcfcdc8
FB		 5885 .freeze = qeth_core_freeze,
5886 .thaw = qeth_core_thaw,
5887 .restore = qeth_core_restore,
4a71df50
FB		 5888};
5889
36369569
GKH		 5890static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5891 size_t count)
4a71df50
FB		 5892{
5893 int err;
4a71df50 5894
b7169c51 5895 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5896 &qeth_core_ccwgroup_driver, 3, buf);
5897
5898 return err ? err : count;
5899}
36369569 5900static DRIVER_ATTR_WO(group);
4a71df50 5901
f47e2256
SO		 5902static struct attribute *qeth_drv_attrs[] = {
5903 &driver_attr_group.attr,
5904 NULL,
5905};
5906static struct attribute_group qeth_drv_attr_group = {
5907 .attrs = qeth_drv_attrs,
5908};
5909static const struct attribute_group *qeth_drv_attr_groups[] = {
5910 &qeth_drv_attr_group,
5911 NULL,
5912};
5913
942d6984
JW		 5914int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5915{
5916 struct qeth_card *card = dev->ml_priv;
5917 struct mii_ioctl_data *mii_data;
5918 int rc = 0;
5919
5920 if (!card)
5921 return -ENODEV;
5922
5923 if (!qeth_card_hw_is_reachable(card))
5924 return -ENODEV;
5925
5926 if (card->info.type == QETH_CARD_TYPE_OSN)
5927 return -EPERM;
5928
5929 switch (cmd) {
5930 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5931 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5932 break;
5933 case SIOC_QETH_GET_CARD_TYPE:
5934 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5935 card->info.type == QETH_CARD_TYPE_OSM ||
5936 card->info.type == QETH_CARD_TYPE_OSX) &&
5937 !card->info.guestlan)
5938 return 1;
5939 else
5940 return 0;
5941 case SIOCGMIIPHY:
5942 mii_data = if_mii(rq);
5943 mii_data->phy_id = 0;
5944 break;
5945 case SIOCGMIIREG:
5946 mii_data = if_mii(rq);
5947 if (mii_data->phy_id != 0)
5948 rc = -EINVAL;
5949 else
5950 mii_data->val_out = qeth_mdio_read(dev,
5951 mii_data->phy_id, mii_data->reg_num);
5952 break;
5953 case SIOC_QETH_QUERY_OAT:
5954 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5955 break;
5956 default:
5957 if (card->discipline->do_ioctl)
5958 rc = card->discipline->do_ioctl(dev, rq, cmd);
5959 else
5960 rc = -EOPNOTSUPP;
5961 }
5962 if (rc)
5963 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5964 return rc;
5965}
5966EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5967
4a71df50
FB		 5968static struct {
5969 const char str[ETH_GSTRING_LEN];
5970} qeth_ethtool_stats_keys[] = {
5971/* 0 */{"rx skbs"},
5972 {"rx buffers"},
5973 {"tx skbs"},
5974 {"tx buffers"},
5975 {"tx skbs no packing"},
5976 {"tx buffers no packing"},
5977 {"tx skbs packing"},
5978 {"tx buffers packing"},
5979 {"tx sg skbs"},
5980 {"tx sg frags"},
5981/* 10 */{"rx sg skbs"},
5982 {"rx sg frags"},
5983 {"rx sg page allocs"},
5984 {"tx large kbytes"},
5985 {"tx large count"},
5986 {"tx pk state ch n->p"},
5987 {"tx pk state ch p->n"},
5988 {"tx pk watermark low"},
5989 {"tx pk watermark high"},
5990 {"queue 0 buffer usage"},
5991/* 20 */{"queue 1 buffer usage"},
5992 {"queue 2 buffer usage"},
5993 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5994 {"rx poll time"},
5995 {"rx poll count"},
4a71df50
FB		 5996 {"rx do_QDIO time"},
5997 {"rx do_QDIO count"},
5998 {"tx handler time"},
5999 {"tx handler count"},
6000 {"tx time"},
6001/* 30 */{"tx count"},
6002 {"tx do_QDIO time"},
6003 {"tx do_QDIO count"},
f61a0d05 6004 {"tx csum"},
c3b4a740 6005 {"tx lin"},
6059c905 6006 {"tx linfail"},
0da9581d
EL		 6007 {"cq handler count"},
6008 {"cq handler time"}
4a71df50
FB		 6009};
6010
df8b4ec8 6011int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 6012{
df8b4ec8
BH		 6013 switch (stringset) {
6014 case ETH_SS_STATS:
6015 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
6016 default:
6017 return -EINVAL;
6018 }
4a71df50 6019}
df8b4ec8 6020EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 6021
6022void qeth_core_get_ethtool_stats(struct net_device *dev,
6023 struct ethtool_stats *stats, u64 *data)
6024{
509e2562 6025 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 6026 data[0] = card->stats.rx_packets -
6027 card->perf_stats.initial_rx_packets;
6028 data[1] = card->perf_stats.bufs_rec;
6029 data[2] = card->stats.tx_packets -
6030 card->perf_stats.initial_tx_packets;
6031 data[3] = card->perf_stats.bufs_sent;
6032 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
6033 - card->perf_stats.skbs_sent_pack;
6034 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
6035 data[6] = card->perf_stats.skbs_sent_pack;
6036 data[7] = card->perf_stats.bufs_sent_pack;
6037 data[8] = card->perf_stats.sg_skbs_sent;
6038 data[9] = card->perf_stats.sg_frags_sent;
6039 data[10] = card->perf_stats.sg_skbs_rx;
6040 data[11] = card->perf_stats.sg_frags_rx;
6041 data[12] = card->perf_stats.sg_alloc_page_rx;
6042 data[13] = (card->perf_stats.large_send_bytes >> 10);
6043 data[14] = card->perf_stats.large_send_cnt;
6044 data[15] = card->perf_stats.sc_dp_p;
6045 data[16] = card->perf_stats.sc_p_dp;
6046 data[17] = QETH_LOW_WATERMARK_PACK;
6047 data[18] = QETH_HIGH_WATERMARK_PACK;
6048 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
6049 data[20] = (card->qdio.no_out_queues > 1) ?
6050 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
6051 data[21] = (card->qdio.no_out_queues > 2) ?
6052 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
6053 data[22] = (card->qdio.no_out_queues > 3) ?
6054 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
6055 data[23] = card->perf_stats.inbound_time;
6056 data[24] = card->perf_stats.inbound_cnt;
6057 data[25] = card->perf_stats.inbound_do_qdio_time;
6058 data[26] = card->perf_stats.inbound_do_qdio_cnt;
6059 data[27] = card->perf_stats.outbound_handler_time;
6060 data[28] = card->perf_stats.outbound_handler_cnt;
6061 data[29] = card->perf_stats.outbound_time;
6062 data[30] = card->perf_stats.outbound_cnt;
6063 data[31] = card->perf_stats.outbound_do_qdio_time;
6064 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 6065 data[33] = card->perf_stats.tx_csum;
c3b4a740 6066 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 6067 data[35] = card->perf_stats.tx_linfail;
6068 data[36] = card->perf_stats.cq_cnt;
6069 data[37] = card->perf_stats.cq_time;
4a71df50
FB		 6070}
6071EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
6072
6073void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
6074{
6075 switch (stringset) {
6076 case ETH_SS_STATS:
6077 memcpy(data, &qeth_ethtool_stats_keys,
6078 sizeof(qeth_ethtool_stats_keys));
6079 break;
6080 default:
6081 WARN_ON(1);
6082 break;
6083 }
6084}
6085EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6086
6087void qeth_core_get_drvinfo(struct net_device *dev,
6088 struct ethtool_drvinfo *info)
6089{
509e2562 6090 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 6091
6092 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
6093 sizeof(info->driver));
6094 strlcpy(info->version, "1.0", sizeof(info->version));
6095 strlcpy(info->fw_version, card->info.mcl_level,
6096 sizeof(info->fw_version));
6097 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6098 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6099}
6100EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6101
774afb8e
JW		 6102/* Helper function to fill 'advertising' and 'supported' which are the same. */
6103/* Autoneg and full-duplex are supported and advertised unconditionally. */
6104/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6105/* specified port type. */
993e19c0 6106static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6107 int maxspeed, int porttype)
6108{
41fc3b65
JW		 6109 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6110 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6111 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6112
41fc3b65
JW		 6113 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6114 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6115
6116 switch (porttype) {
6117 case PORT_TP:
41fc3b65
JW		 6118 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6119 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6120 break;
6121 case PORT_FIBRE:
41fc3b65
JW		 6122 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6123 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6124 break;
6125 default:
41fc3b65
JW		 6126 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6127 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6128 WARN_ON_ONCE(1);
6129 }
6130
774afb8e 6131 /* fallthrough from high to low, to select all legal speeds: */
02d5cb5b
EC		 6132 switch (maxspeed) {
6133 case SPEED_10000:
41fc3b65
JW		 6134 ethtool_link_ksettings_add_link_mode(cmd, supported,
6135 10000baseT_Full);
6136 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6137 10000baseT_Full);
02d5cb5b 6138 case SPEED_1000:
41fc3b65
JW		 6139 ethtool_link_ksettings_add_link_mode(cmd, supported,
6140 1000baseT_Full);
6141 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6142 1000baseT_Full);
6143 ethtool_link_ksettings_add_link_mode(cmd, supported,
6144 1000baseT_Half);
6145 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6146 1000baseT_Half);
02d5cb5b 6147 case SPEED_100:
41fc3b65
JW		 6148 ethtool_link_ksettings_add_link_mode(cmd, supported,
6149 100baseT_Full);
6150 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6151 100baseT_Full);
6152 ethtool_link_ksettings_add_link_mode(cmd, supported,
6153 100baseT_Half);
6154 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6155 100baseT_Half);
02d5cb5b 6156 case SPEED_10:
41fc3b65
JW		 6157 ethtool_link_ksettings_add_link_mode(cmd, supported,
6158 10baseT_Full);
6159 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6160 10baseT_Full);
6161 ethtool_link_ksettings_add_link_mode(cmd, supported,
6162 10baseT_Half);
6163 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6164 10baseT_Half);
774afb8e
JW		 6165 /* end fallthrough */
6166 break;
02d5cb5b 6167 default:
41fc3b65
JW		 6168 ethtool_link_ksettings_add_link_mode(cmd, supported,
6169 10baseT_Full);
6170 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6171 10baseT_Full);
6172 ethtool_link_ksettings_add_link_mode(cmd, supported,
6173 10baseT_Half);
6174 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6175 10baseT_Half);
02d5cb5b
EC		 6176 WARN_ON_ONCE(1);
6177 }
02d5cb5b
EC		 6178}
6179
993e19c0
JW		 6180int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6181 struct ethtool_link_ksettings *cmd)
3f9975aa 6182{
509e2562 6183 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6184 enum qeth_link_types link_type;
02d5cb5b 6185 struct carrier_info carrier_info;
511c2445 6186 int rc;
3f9975aa
FB		 6187
6188 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6189 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6190 else
6191 link_type = card->info.link_type;
6192
993e19c0
JW		 6193 cmd->base.duplex = DUPLEX_FULL;
6194 cmd->base.autoneg = AUTONEG_ENABLE;
6195 cmd->base.phy_address = 0;
6196 cmd->base.mdio_support = 0;
6197 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6198 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6199
6200 switch (link_type) {
6201 case QETH_LINK_TYPE_FAST_ETH:
6202 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6203 cmd->base.speed = SPEED_100;
6204 cmd->base.port = PORT_TP;
3f9975aa 6205 break;
3f9975aa
FB		 6206 case QETH_LINK_TYPE_GBIT_ETH:
6207 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6208 cmd->base.speed = SPEED_1000;
6209 cmd->base.port = PORT_FIBRE;
3f9975aa 6210 break;
3f9975aa 6211 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6212 cmd->base.speed = SPEED_10000;
6213 cmd->base.port = PORT_FIBRE;
3f9975aa 6214 break;
3f9975aa 6215 default:
993e19c0
JW		 6216 cmd->base.speed = SPEED_10;
6217 cmd->base.port = PORT_TP;
3f9975aa 6218 }
993e19c0 6219 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6220
02d5cb5b
EC		 6221 /* Check if we can obtain more accurate information. */
6222 /* If QUERY_CARD_INFO command is not supported or fails, */
6223 /* just return the heuristics that was filled above. */
511c2445
EC		 6224 if (!qeth_card_hw_is_reachable(card))
6225 return -ENODEV;
6226 rc = qeth_query_card_info(card, &carrier_info);
6227 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6228 return 0;
511c2445
EC		 6229 if (rc) /* report error from the hardware operation */
6230 return rc;
6231 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6232
6233 netdev_dbg(netdev,
6234 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6235 carrier_info.card_type,
6236 carrier_info.port_mode,
6237 carrier_info.port_speed);
6238
6239 /* Update attributes for which we've obtained more authoritative */
6240 /* information, leave the rest the way they where filled above. */
6241 switch (carrier_info.card_type) {
6242 case CARD_INFO_TYPE_1G_COPPER_A:
6243 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6244 cmd->base.port = PORT_TP;
6245 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6246 break;
6247 case CARD_INFO_TYPE_1G_FIBRE_A:
6248 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6249 cmd->base.port = PORT_FIBRE;
6250 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6251 break;
6252 case CARD_INFO_TYPE_10G_FIBRE_A:
6253 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6254 cmd->base.port = PORT_FIBRE;
6255 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6256 break;
6257 }
6258
6259 switch (carrier_info.port_mode) {
6260 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6261 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6262 break;
6263 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6264 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6265 break;
6266 }
6267
6268 switch (carrier_info.port_speed) {
6269 case CARD_INFO_PORTS_10M:
993e19c0 6270 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6271 break;
6272 case CARD_INFO_PORTS_100M:
993e19c0 6273 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6274 break;
6275 case CARD_INFO_PORTS_1G:
993e19c0 6276 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6277 break;
6278 case CARD_INFO_PORTS_10G:
993e19c0 6279 cmd->base.speed = SPEED_10000;
02d5cb5b
EC		 6280 break;
6281 }
6282
3f9975aa
FB		 6283 return 0;
6284}
993e19c0 6285EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6286
c9475369
TR		 6287/* Callback to handle checksum offload command reply from OSA card.
6288 * Verify that required features have been enabled on the card.
6289 * Return error in hdr->return_code as this value is checked by caller.
6290 *
6291 * Always returns zero to indicate no further messages from the OSA card.
6292 */
6293static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6294 struct qeth_reply *reply,
6295 unsigned long data)
6296{
6297 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6298 struct qeth_checksum_cmd *chksum_cb =
6299 (struct qeth_checksum_cmd *)reply->param;
6300
6301 QETH_CARD_TEXT(card, 4, "chkdoccb");
ad3cbf61 6302 if (qeth_setassparms_inspect_rc(cmd))
c9475369
TR		 6303 return 0;
6304
6305 memset(chksum_cb, 0, sizeof(*chksum_cb));
6306 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6307 chksum_cb->supported =
6308 cmd->data.setassparms.data.chksum.supported;
6309 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6310 }
6311 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6312 chksum_cb->supported =
6313 cmd->data.setassparms.data.chksum.supported;
6314 chksum_cb->enabled =
6315 cmd->data.setassparms.data.chksum.enabled;
6316 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6317 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6318 }
6319 return 0;
6320}
6321
6322/* Send command to OSA card and check results. */
6323static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6324 enum qeth_ipa_funcs ipa_func,
6325 __u16 cmd_code, long data,
6326 struct qeth_checksum_cmd *chksum_cb)
6327{
6328 struct qeth_cmd_buffer *iob;
6329 int rc = -ENOMEM;
6330
6331 QETH_CARD_TEXT(card, 4, "chkdocmd");
6332 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
6333 sizeof(__u32), QETH_PROT_IPV4);
6334 if (iob)
6335 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6336 qeth_ipa_checksum_run_cmd_cb,
6337 chksum_cb);
6338 return rc;
6339}
6340
8f43fb00 6341static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
4d7def2a 6342{
f9d8e6dc
TR		 6343 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
6344 QETH_IPA_CHECKSUM_UDP |
6345 QETH_IPA_CHECKSUM_TCP;
c9475369 6346 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6347 int rc;
6348
c9475369
TR		 6349 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6350 &chksum_cb);
f9d8e6dc
TR		 6351 if (!rc) {
6352 if ((required_features & chksum_cb.supported) !=
6353 required_features)
6354 rc = -EIO;
dae84c8e
TR		 6355 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6356 cstype == IPA_INBOUND_CHECKSUM)
6357 dev_warn(&card->gdev->dev,
6358 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6359 QETH_CARD_IFNAME(card));
f9d8e6dc 6360 }
4d7def2a 6361 if (rc) {
c9475369 6362 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6363 dev_warn(&card->gdev->dev,
6364 "Starting HW checksumming for %s failed, using SW checksumming\n",
6365 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6366 return rc;
6367 }
c9475369
TR		 6368 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
6369 chksum_cb.supported, &chksum_cb);
f9d8e6dc
TR		 6370 if (!rc) {
6371 if ((required_features & chksum_cb.enabled) !=
6372 required_features)
6373 rc = -EIO;
6374 }
4d7def2a 6375 if (rc) {
c9475369 6376 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6377 dev_warn(&card->gdev->dev,
6378 "Enabling HW checksumming for %s failed, using SW checksumming\n",
6379 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6380 return rc;
6381 }
8f43fb00
TR		 6382
6383 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
6384 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
4d7def2a
TR		 6385 return 0;
6386}
6387
8f43fb00 6388static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
4d7def2a 6389{
c9475369
TR		 6390 int rc = (on) ? qeth_send_checksum_on(card, cstype)
6391 : qeth_send_simple_setassparms(card, cstype,
6392 IPA_CMD_ASS_STOP, 0);
6393 return rc ? -EIO : 0;
4d7def2a 6394}
4d7def2a 6395
8f43fb00 6396static int qeth_set_ipa_tso(struct qeth_card *card, int on)
4d7def2a 6397{
8f43fb00 6398 int rc;
4d7def2a 6399
8f43fb00 6400 QETH_CARD_TEXT(card, 3, "sttso");
4d7def2a 6401
8f43fb00
TR		 6402 if (on) {
6403 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6404 IPA_CMD_ASS_START, 0);
6405 if (rc) {
6406 dev_warn(&card->gdev->dev,
6407 "Starting outbound TCP segmentation offload for %s failed\n",
6408 QETH_CARD_IFNAME(card));
6409 return -EIO;
6410 }
6411 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6412 } else {
6413 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6414 IPA_CMD_ASS_STOP, 0);
6415 }
4d7def2a
TR		 6416 return rc;
6417}
8f43fb00 6418
ce344356
JW		 6419#define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO)
6420
6421/**
6422 * qeth_recover_features() - Restore device features after recovery
6423 * @dev: the recovering net_device
6424 *
6425 * Caller must hold rtnl lock.
6426 */
6427void qeth_recover_features(struct net_device *dev)
e830baa9 6428{
ce344356 6429 netdev_features_t features = dev->features;
e830baa9 6430 struct qeth_card *card = dev->ml_priv;
e830baa9 6431
ce344356
JW		 6432 /* force-off any feature that needs an IPA sequence.
6433 * netdev_update_features() will restart them.
6434 */
6435 dev->features &= ~QETH_HW_FEATURES;
6436 netdev_update_features(dev);
e830baa9 6437
ce344356
JW		 6438 if (features == dev->features)
6439 return;
e830baa9
HW		 6440 dev_warn(&card->gdev->dev,
6441 "Device recovery failed to restore all offload features\n");
e830baa9
HW		 6442}
6443EXPORT_SYMBOL_GPL(qeth_recover_features);
6444
8f43fb00
TR		 6445int qeth_set_features(struct net_device *dev, netdev_features_t features)
6446{
6447 struct qeth_card *card = dev->ml_priv;
6c7cd712 6448 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6449 int rc = 0;
6450
6451 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6452 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6453
6c7cd712 6454 if ((changed & NETIF_F_IP_CSUM)) {
8f43fb00
TR		 6455 rc = qeth_set_ipa_csum(card,
6456 features & NETIF_F_IP_CSUM ? 1 : 0,
6457 IPA_OUTBOUND_CHECKSUM);
6c7cd712
HW		 6458 if (rc)
6459 changed ^= NETIF_F_IP_CSUM;
6460 }
6461 if ((changed & NETIF_F_RXCSUM)) {
6462 rc = qeth_set_ipa_csum(card,
8f43fb00
TR		 6463 features & NETIF_F_RXCSUM ? 1 : 0,
6464 IPA_INBOUND_CHECKSUM);
6c7cd712
HW		 6465 if (rc)
6466 changed ^= NETIF_F_RXCSUM;
6467 }
6468 if ((changed & NETIF_F_TSO)) {
6469 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6470 if (rc)
6471 changed ^= NETIF_F_TSO;
6472 }
6473
6474 /* everything changed successfully? */
6475 if ((dev->features ^ features) == changed)
6476 return 0;
6477 /* something went wrong. save changed features and return error */
6478 dev->features ^= changed;
6479 return -EIO;
8f43fb00
TR		 6480}
6481EXPORT_SYMBOL_GPL(qeth_set_features);
6482
6483netdev_features_t qeth_fix_features(struct net_device *dev,
6484 netdev_features_t features)
6485{
6486 struct qeth_card *card = dev->ml_priv;
6487
6488 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6489 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6490 features &= ~NETIF_F_IP_CSUM;
6491 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6492 features &= ~NETIF_F_RXCSUM;
cf536ffe 6493 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6494 features &= ~NETIF_F_TSO;
6c7cd712
HW		 6495 /* if the card isn't up, remove features that require hw changes */
6496 if (card->state == CARD_STATE_DOWN ||
6497 card->state == CARD_STATE_RECOVER)
ce344356 6498 features &= ~QETH_HW_FEATURES;
8f43fb00
TR		 6499 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6500 return features;
6501}
6502EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6503
6d69b1f1
JW		 6504netdev_features_t qeth_features_check(struct sk_buff *skb,
6505 struct net_device *dev,
6506 netdev_features_t features)
6507{
6508 /* GSO segmentation builds skbs with
6509 * a (small) linear part for the headers, and
6510 * page frags for the data.
6511 * Compared to a linear skb, the header-only part consumes an
6512 * additional buffer element. This reduces buffer utilization, and
6513 * hurts throughput. So compress small segments into one element.
6514 */
6515 if (netif_needs_gso(skb, features)) {
6516 /* match skb_segment(): */
6517 unsigned int doffset = skb->data - skb_mac_header(skb);
6518 unsigned int hsize = skb_shinfo(skb)->gso_size;
6519 unsigned int hroom = skb_headroom(skb);
6520
6521 /* linearize only if resulting skb allocations are order-0: */
6522 if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
6523 features &= ~NETIF_F_SG;
6524 }
6525
6526 return vlan_features_check(skb, features);
6527}
6528EXPORT_SYMBOL_GPL(qeth_features_check);
6529
4a71df50
FB		 6530static int __init qeth_core_init(void)
6531{
6532 int rc;
6533
74eacdb9 6534 pr_info("loading core functions\n");
4a71df50 6535 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6536 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6537 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6538 mutex_init(&qeth_mod_mutex);
4a71df50 6539
0f54761d 6540 qeth_wq = create_singlethread_workqueue("qeth_wq");
a936b1ef
JW		 6541 if (!qeth_wq) {
6542 rc = -ENOMEM;
6543 goto out_err;
6544 }
0f54761d 6545
4a71df50
FB		 6546 rc = qeth_register_dbf_views();
6547 if (rc)
a936b1ef 6548 goto dbf_err;
035da16f 6549 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6550 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6551 if (rc)
6552 goto register_err;
683d718a
FB		 6553 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6554 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6555 if (!qeth_core_header_cache) {
6556 rc = -ENOMEM;
6557 goto slab_err;
6558 }
0da9581d
EL		 6559 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6560 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6561 if (!qeth_qdio_outbuf_cache) {
6562 rc = -ENOMEM;
6563 goto cqslab_err;
6564 }
afb6ac59
SO		 6565 rc = ccw_driver_register(&qeth_ccw_driver);
6566 if (rc)
6567 goto ccw_err;
6568 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6569 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6570 if (rc)
6571 goto ccwgroup_err;
0da9581d 6572
683d718a 6573 return 0;
afb6ac59
SO		 6574
6575ccwgroup_err:
6576 ccw_driver_unregister(&qeth_ccw_driver);
6577ccw_err:
6578 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6579cqslab_err:
6580 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6581slab_err:
035da16f 6582 root_device_unregister(qeth_core_root_dev);
4a71df50 6583register_err:
4a71df50 6584 qeth_unregister_dbf_views();
a936b1ef
JW		 6585dbf_err:
6586 destroy_workqueue(qeth_wq);
4a71df50 6587out_err:
74eacdb9 6588 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6589 return rc;
6590}
6591
6592static void __exit qeth_core_exit(void)
6593{
819dc537 6594 qeth_clear_dbf_list();
0f54761d 6595 destroy_workqueue(qeth_wq);
4a71df50
FB		 6596 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6597 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6598 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6599 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6600 root_device_unregister(qeth_core_root_dev);
4a71df50 6601 qeth_unregister_dbf_views();
74eacdb9 6602 pr_info("core functions removed\n");
4a71df50
FB		 6603}
6604
6605module_init(qeth_core_init);
6606module_exit(qeth_core_exit);
6607MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6608MODULE_DESCRIPTION("qeth core functions");
6609MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)