Commit | Line | Data |
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4a71df50 FB |
1 | /* |
2 | * drivers/s390/net/qeth_core_main.c | |
3 | * | |
4 | * Copyright IBM Corp. 2007 | |
5 | * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, | |
6 | * Frank Pavlic <fpavlic@de.ibm.com>, | |
7 | * Thomas Spatzier <tspat@de.ibm.com>, | |
8 | * Frank Blaschka <frank.blaschka@de.ibm.com> | |
9 | */ | |
10 | ||
74eacdb9 FB |
11 | #define KMSG_COMPONENT "qeth" |
12 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
13 | ||
4a71df50 FB |
14 | #include <linux/module.h> |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/errno.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/ip.h> | |
4a71df50 FB |
20 | #include <linux/tcp.h> |
21 | #include <linux/mii.h> | |
22 | #include <linux/kthread.h> | |
23 | ||
ab4227cb MS |
24 | #include <asm/ebcdic.h> |
25 | #include <asm/io.h> | |
4a71df50 FB |
26 | |
27 | #include "qeth_core.h" | |
4a71df50 | 28 | |
d11ba0c4 PT |
29 | struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { |
30 | /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ | |
31 | /* N P A M L V H */ | |
32 | [QETH_DBF_SETUP] = {"qeth_setup", | |
33 | 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, | |
34 | [QETH_DBF_QERR] = {"qeth_qerr", | |
35 | 2, 1, 8, 2, &debug_hex_ascii_view, NULL}, | |
36 | [QETH_DBF_TRACE] = {"qeth_trace", | |
37 | 4, 1, 8, 3, &debug_hex_ascii_view, NULL}, | |
38 | [QETH_DBF_MSG] = {"qeth_msg", | |
39 | 8, 1, 128, 3, &debug_sprintf_view, NULL}, | |
40 | [QETH_DBF_SENSE] = {"qeth_sense", | |
41 | 2, 1, 64, 2, &debug_hex_ascii_view, NULL}, | |
42 | [QETH_DBF_MISC] = {"qeth_misc", | |
43 | 2, 1, 256, 2, &debug_hex_ascii_view, NULL}, | |
44 | [QETH_DBF_CTRL] = {"qeth_control", | |
45 | 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, | |
46 | }; | |
47 | EXPORT_SYMBOL_GPL(qeth_dbf); | |
4a71df50 FB |
48 | |
49 | struct qeth_card_list_struct qeth_core_card_list; | |
50 | EXPORT_SYMBOL_GPL(qeth_core_card_list); | |
683d718a FB |
51 | struct kmem_cache *qeth_core_header_cache; |
52 | EXPORT_SYMBOL_GPL(qeth_core_header_cache); | |
4a71df50 FB |
53 | |
54 | static struct device *qeth_core_root_dev; | |
55 | static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY; | |
56 | static struct lock_class_key qdio_out_skb_queue_key; | |
4a71df50 FB |
57 | |
58 | static void qeth_send_control_data_cb(struct qeth_channel *, | |
59 | struct qeth_cmd_buffer *); | |
60 | static int qeth_issue_next_read(struct qeth_card *); | |
61 | static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); | |
62 | static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); | |
63 | static void qeth_free_buffer_pool(struct qeth_card *); | |
64 | static int qeth_qdio_establish(struct qeth_card *); | |
65 | ||
66 | ||
67 | static inline void __qeth_fill_buffer_frag(struct sk_buff *skb, | |
68 | struct qdio_buffer *buffer, int is_tso, | |
69 | int *next_element_to_fill) | |
70 | { | |
71 | struct skb_frag_struct *frag; | |
72 | int fragno; | |
73 | unsigned long addr; | |
74 | int element, cnt, dlen; | |
75 | ||
76 | fragno = skb_shinfo(skb)->nr_frags; | |
77 | element = *next_element_to_fill; | |
78 | dlen = 0; | |
79 | ||
80 | if (is_tso) | |
81 | buffer->element[element].flags = | |
82 | SBAL_FLAGS_MIDDLE_FRAG; | |
83 | else | |
84 | buffer->element[element].flags = | |
85 | SBAL_FLAGS_FIRST_FRAG; | |
86 | dlen = skb->len - skb->data_len; | |
87 | if (dlen) { | |
88 | buffer->element[element].addr = skb->data; | |
89 | buffer->element[element].length = dlen; | |
90 | element++; | |
91 | } | |
92 | for (cnt = 0; cnt < fragno; cnt++) { | |
93 | frag = &skb_shinfo(skb)->frags[cnt]; | |
94 | addr = (page_to_pfn(frag->page) << PAGE_SHIFT) + | |
95 | frag->page_offset; | |
96 | buffer->element[element].addr = (char *)addr; | |
97 | buffer->element[element].length = frag->size; | |
98 | if (cnt < (fragno - 1)) | |
99 | buffer->element[element].flags = | |
100 | SBAL_FLAGS_MIDDLE_FRAG; | |
101 | else | |
102 | buffer->element[element].flags = | |
103 | SBAL_FLAGS_LAST_FRAG; | |
104 | element++; | |
105 | } | |
106 | *next_element_to_fill = element; | |
107 | } | |
108 | ||
109 | static inline const char *qeth_get_cardname(struct qeth_card *card) | |
110 | { | |
111 | if (card->info.guestlan) { | |
112 | switch (card->info.type) { | |
113 | case QETH_CARD_TYPE_OSAE: | |
114 | return " Guest LAN QDIO"; | |
115 | case QETH_CARD_TYPE_IQD: | |
116 | return " Guest LAN Hiper"; | |
117 | default: | |
118 | return " unknown"; | |
119 | } | |
120 | } else { | |
121 | switch (card->info.type) { | |
122 | case QETH_CARD_TYPE_OSAE: | |
123 | return " OSD Express"; | |
124 | case QETH_CARD_TYPE_IQD: | |
125 | return " HiperSockets"; | |
126 | case QETH_CARD_TYPE_OSN: | |
127 | return " OSN QDIO"; | |
128 | default: | |
129 | return " unknown"; | |
130 | } | |
131 | } | |
132 | return " n/a"; | |
133 | } | |
134 | ||
135 | /* max length to be returned: 14 */ | |
136 | const char *qeth_get_cardname_short(struct qeth_card *card) | |
137 | { | |
138 | if (card->info.guestlan) { | |
139 | switch (card->info.type) { | |
140 | case QETH_CARD_TYPE_OSAE: | |
141 | return "GuestLAN QDIO"; | |
142 | case QETH_CARD_TYPE_IQD: | |
143 | return "GuestLAN Hiper"; | |
144 | default: | |
145 | return "unknown"; | |
146 | } | |
147 | } else { | |
148 | switch (card->info.type) { | |
149 | case QETH_CARD_TYPE_OSAE: | |
150 | switch (card->info.link_type) { | |
151 | case QETH_LINK_TYPE_FAST_ETH: | |
152 | return "OSD_100"; | |
153 | case QETH_LINK_TYPE_HSTR: | |
154 | return "HSTR"; | |
155 | case QETH_LINK_TYPE_GBIT_ETH: | |
156 | return "OSD_1000"; | |
157 | case QETH_LINK_TYPE_10GBIT_ETH: | |
158 | return "OSD_10GIG"; | |
159 | case QETH_LINK_TYPE_LANE_ETH100: | |
160 | return "OSD_FE_LANE"; | |
161 | case QETH_LINK_TYPE_LANE_TR: | |
162 | return "OSD_TR_LANE"; | |
163 | case QETH_LINK_TYPE_LANE_ETH1000: | |
164 | return "OSD_GbE_LANE"; | |
165 | case QETH_LINK_TYPE_LANE: | |
166 | return "OSD_ATM_LANE"; | |
167 | default: | |
168 | return "OSD_Express"; | |
169 | } | |
170 | case QETH_CARD_TYPE_IQD: | |
171 | return "HiperSockets"; | |
172 | case QETH_CARD_TYPE_OSN: | |
173 | return "OSN"; | |
174 | default: | |
175 | return "unknown"; | |
176 | } | |
177 | } | |
178 | return "n/a"; | |
179 | } | |
180 | ||
181 | void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, | |
182 | int clear_start_mask) | |
183 | { | |
184 | unsigned long flags; | |
185 | ||
186 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
187 | card->thread_allowed_mask = threads; | |
188 | if (clear_start_mask) | |
189 | card->thread_start_mask &= threads; | |
190 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
191 | wake_up(&card->wait_q); | |
192 | } | |
193 | EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); | |
194 | ||
195 | int qeth_threads_running(struct qeth_card *card, unsigned long threads) | |
196 | { | |
197 | unsigned long flags; | |
198 | int rc = 0; | |
199 | ||
200 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
201 | rc = (card->thread_running_mask & threads); | |
202 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
203 | return rc; | |
204 | } | |
205 | EXPORT_SYMBOL_GPL(qeth_threads_running); | |
206 | ||
207 | int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) | |
208 | { | |
209 | return wait_event_interruptible(card->wait_q, | |
210 | qeth_threads_running(card, threads) == 0); | |
211 | } | |
212 | EXPORT_SYMBOL_GPL(qeth_wait_for_threads); | |
213 | ||
214 | void qeth_clear_working_pool_list(struct qeth_card *card) | |
215 | { | |
216 | struct qeth_buffer_pool_entry *pool_entry, *tmp; | |
217 | ||
d11ba0c4 | 218 | QETH_DBF_TEXT(TRACE, 5, "clwrklst"); |
4a71df50 FB |
219 | list_for_each_entry_safe(pool_entry, tmp, |
220 | &card->qdio.in_buf_pool.entry_list, list){ | |
221 | list_del(&pool_entry->list); | |
222 | } | |
223 | } | |
224 | EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); | |
225 | ||
226 | static int qeth_alloc_buffer_pool(struct qeth_card *card) | |
227 | { | |
228 | struct qeth_buffer_pool_entry *pool_entry; | |
229 | void *ptr; | |
230 | int i, j; | |
231 | ||
d11ba0c4 | 232 | QETH_DBF_TEXT(TRACE, 5, "alocpool"); |
4a71df50 FB |
233 | for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { |
234 | pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL); | |
235 | if (!pool_entry) { | |
236 | qeth_free_buffer_pool(card); | |
237 | return -ENOMEM; | |
238 | } | |
239 | for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { | |
508b3c4f | 240 | ptr = (void *) __get_free_page(GFP_KERNEL); |
4a71df50 FB |
241 | if (!ptr) { |
242 | while (j > 0) | |
243 | free_page((unsigned long) | |
244 | pool_entry->elements[--j]); | |
245 | kfree(pool_entry); | |
246 | qeth_free_buffer_pool(card); | |
247 | return -ENOMEM; | |
248 | } | |
249 | pool_entry->elements[j] = ptr; | |
250 | } | |
251 | list_add(&pool_entry->init_list, | |
252 | &card->qdio.init_pool.entry_list); | |
253 | } | |
254 | return 0; | |
255 | } | |
256 | ||
257 | int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) | |
258 | { | |
d11ba0c4 | 259 | QETH_DBF_TEXT(TRACE, 2, "realcbp"); |
4a71df50 FB |
260 | |
261 | if ((card->state != CARD_STATE_DOWN) && | |
262 | (card->state != CARD_STATE_RECOVER)) | |
263 | return -EPERM; | |
264 | ||
265 | /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ | |
266 | qeth_clear_working_pool_list(card); | |
267 | qeth_free_buffer_pool(card); | |
268 | card->qdio.in_buf_pool.buf_count = bufcnt; | |
269 | card->qdio.init_pool.buf_count = bufcnt; | |
270 | return qeth_alloc_buffer_pool(card); | |
271 | } | |
272 | ||
273 | int qeth_set_large_send(struct qeth_card *card, | |
274 | enum qeth_large_send_types type) | |
275 | { | |
276 | int rc = 0; | |
277 | ||
278 | if (card->dev == NULL) { | |
279 | card->options.large_send = type; | |
280 | return 0; | |
281 | } | |
282 | if (card->state == CARD_STATE_UP) | |
283 | netif_tx_disable(card->dev); | |
284 | card->options.large_send = type; | |
285 | switch (card->options.large_send) { | |
4a71df50 FB |
286 | case QETH_LARGE_SEND_TSO: |
287 | if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) { | |
288 | card->dev->features |= NETIF_F_TSO | NETIF_F_SG | | |
289 | NETIF_F_HW_CSUM; | |
290 | } else { | |
4a71df50 FB |
291 | card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | |
292 | NETIF_F_HW_CSUM); | |
293 | card->options.large_send = QETH_LARGE_SEND_NO; | |
294 | rc = -EOPNOTSUPP; | |
295 | } | |
296 | break; | |
297 | default: /* includes QETH_LARGE_SEND_NO */ | |
298 | card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | | |
299 | NETIF_F_HW_CSUM); | |
300 | break; | |
301 | } | |
302 | if (card->state == CARD_STATE_UP) | |
303 | netif_wake_queue(card->dev); | |
304 | return rc; | |
305 | } | |
306 | EXPORT_SYMBOL_GPL(qeth_set_large_send); | |
307 | ||
308 | static int qeth_issue_next_read(struct qeth_card *card) | |
309 | { | |
310 | int rc; | |
311 | struct qeth_cmd_buffer *iob; | |
312 | ||
d11ba0c4 | 313 | QETH_DBF_TEXT(TRACE, 5, "issnxrd"); |
4a71df50 FB |
314 | if (card->read.state != CH_STATE_UP) |
315 | return -EIO; | |
316 | iob = qeth_get_buffer(&card->read); | |
317 | if (!iob) { | |
74eacdb9 FB |
318 | dev_warn(&card->gdev->dev, "The qeth device driver " |
319 | "failed to recover an error on the device\n"); | |
320 | QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " | |
321 | "available\n", dev_name(&card->gdev->dev)); | |
4a71df50 FB |
322 | return -ENOMEM; |
323 | } | |
324 | qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); | |
d11ba0c4 | 325 | QETH_DBF_TEXT(TRACE, 6, "noirqpnd"); |
4a71df50 FB |
326 | rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, |
327 | (addr_t) iob, 0, 0); | |
328 | if (rc) { | |
74eacdb9 FB |
329 | QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " |
330 | "rc=%i\n", dev_name(&card->gdev->dev), rc); | |
4a71df50 FB |
331 | atomic_set(&card->read.irq_pending, 0); |
332 | qeth_schedule_recovery(card); | |
333 | wake_up(&card->wait_q); | |
334 | } | |
335 | return rc; | |
336 | } | |
337 | ||
338 | static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) | |
339 | { | |
340 | struct qeth_reply *reply; | |
341 | ||
342 | reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); | |
343 | if (reply) { | |
344 | atomic_set(&reply->refcnt, 1); | |
345 | atomic_set(&reply->received, 0); | |
346 | reply->card = card; | |
347 | }; | |
348 | return reply; | |
349 | } | |
350 | ||
351 | static void qeth_get_reply(struct qeth_reply *reply) | |
352 | { | |
353 | WARN_ON(atomic_read(&reply->refcnt) <= 0); | |
354 | atomic_inc(&reply->refcnt); | |
355 | } | |
356 | ||
357 | static void qeth_put_reply(struct qeth_reply *reply) | |
358 | { | |
359 | WARN_ON(atomic_read(&reply->refcnt) <= 0); | |
360 | if (atomic_dec_and_test(&reply->refcnt)) | |
361 | kfree(reply); | |
362 | } | |
363 | ||
d11ba0c4 | 364 | static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, |
4a71df50 FB |
365 | struct qeth_card *card) |
366 | { | |
4a71df50 | 367 | char *ipa_name; |
d11ba0c4 | 368 | int com = cmd->hdr.command; |
4a71df50 | 369 | ipa_name = qeth_get_ipa_cmd_name(com); |
d11ba0c4 PT |
370 | if (rc) |
371 | QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n", | |
372 | ipa_name, com, QETH_CARD_IFNAME(card), | |
373 | rc, qeth_get_ipa_msg(rc)); | |
374 | else | |
375 | QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n", | |
376 | ipa_name, com, QETH_CARD_IFNAME(card)); | |
4a71df50 FB |
377 | } |
378 | ||
379 | static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, | |
380 | struct qeth_cmd_buffer *iob) | |
381 | { | |
382 | struct qeth_ipa_cmd *cmd = NULL; | |
383 | ||
d11ba0c4 | 384 | QETH_DBF_TEXT(TRACE, 5, "chkipad"); |
4a71df50 FB |
385 | if (IS_IPA(iob->data)) { |
386 | cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); | |
387 | if (IS_IPA_REPLY(cmd)) { | |
d11ba0c4 PT |
388 | if (cmd->hdr.command < IPA_CMD_SETCCID || |
389 | cmd->hdr.command > IPA_CMD_MODCCID) | |
390 | qeth_issue_ipa_msg(cmd, | |
391 | cmd->hdr.return_code, card); | |
4a71df50 FB |
392 | return cmd; |
393 | } else { | |
394 | switch (cmd->hdr.command) { | |
395 | case IPA_CMD_STOPLAN: | |
74eacdb9 FB |
396 | dev_warn(&card->gdev->dev, |
397 | "The link for interface %s on CHPID" | |
398 | " 0x%X failed\n", | |
4a71df50 FB |
399 | QETH_CARD_IFNAME(card), |
400 | card->info.chpid); | |
401 | card->lan_online = 0; | |
402 | if (card->dev && netif_carrier_ok(card->dev)) | |
403 | netif_carrier_off(card->dev); | |
404 | return NULL; | |
405 | case IPA_CMD_STARTLAN: | |
74eacdb9 FB |
406 | dev_info(&card->gdev->dev, |
407 | "The link for %s on CHPID 0x%X has" | |
408 | " been restored\n", | |
4a71df50 FB |
409 | QETH_CARD_IFNAME(card), |
410 | card->info.chpid); | |
411 | netif_carrier_on(card->dev); | |
922dc062 | 412 | card->lan_online = 1; |
4a71df50 FB |
413 | qeth_schedule_recovery(card); |
414 | return NULL; | |
415 | case IPA_CMD_MODCCID: | |
416 | return cmd; | |
417 | case IPA_CMD_REGISTER_LOCAL_ADDR: | |
d11ba0c4 | 418 | QETH_DBF_TEXT(TRACE, 3, "irla"); |
4a71df50 FB |
419 | break; |
420 | case IPA_CMD_UNREGISTER_LOCAL_ADDR: | |
d11ba0c4 | 421 | QETH_DBF_TEXT(TRACE, 3, "urla"); |
4a71df50 FB |
422 | break; |
423 | default: | |
c4cef07c | 424 | QETH_DBF_MESSAGE(2, "Received data is IPA " |
4a71df50 FB |
425 | "but not a reply!\n"); |
426 | break; | |
427 | } | |
428 | } | |
429 | } | |
430 | return cmd; | |
431 | } | |
432 | ||
433 | void qeth_clear_ipacmd_list(struct qeth_card *card) | |
434 | { | |
435 | struct qeth_reply *reply, *r; | |
436 | unsigned long flags; | |
437 | ||
d11ba0c4 | 438 | QETH_DBF_TEXT(TRACE, 4, "clipalst"); |
4a71df50 FB |
439 | |
440 | spin_lock_irqsave(&card->lock, flags); | |
441 | list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { | |
442 | qeth_get_reply(reply); | |
443 | reply->rc = -EIO; | |
444 | atomic_inc(&reply->received); | |
445 | list_del_init(&reply->list); | |
446 | wake_up(&reply->wait_q); | |
447 | qeth_put_reply(reply); | |
448 | } | |
449 | spin_unlock_irqrestore(&card->lock, flags); | |
450 | } | |
451 | EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); | |
452 | ||
453 | static int qeth_check_idx_response(unsigned char *buffer) | |
454 | { | |
455 | if (!buffer) | |
456 | return 0; | |
457 | ||
d11ba0c4 | 458 | QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); |
4a71df50 | 459 | if ((buffer[2] & 0xc0) == 0xc0) { |
74eacdb9 | 460 | QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " |
4a71df50 FB |
461 | "with cause code 0x%02x%s\n", |
462 | buffer[4], | |
463 | ((buffer[4] == 0x22) ? | |
464 | " -- try another portname" : "")); | |
d11ba0c4 PT |
465 | QETH_DBF_TEXT(TRACE, 2, "ckidxres"); |
466 | QETH_DBF_TEXT(TRACE, 2, " idxterm"); | |
467 | QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO); | |
4a71df50 FB |
468 | return -EIO; |
469 | } | |
470 | return 0; | |
471 | } | |
472 | ||
473 | static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, | |
474 | __u32 len) | |
475 | { | |
476 | struct qeth_card *card; | |
477 | ||
d11ba0c4 | 478 | QETH_DBF_TEXT(TRACE, 4, "setupccw"); |
4a71df50 FB |
479 | card = CARD_FROM_CDEV(channel->ccwdev); |
480 | if (channel == &card->read) | |
481 | memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); | |
482 | else | |
483 | memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); | |
484 | channel->ccw.count = len; | |
485 | channel->ccw.cda = (__u32) __pa(iob); | |
486 | } | |
487 | ||
488 | static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) | |
489 | { | |
490 | __u8 index; | |
491 | ||
d11ba0c4 | 492 | QETH_DBF_TEXT(TRACE, 6, "getbuff"); |
4a71df50 FB |
493 | index = channel->io_buf_no; |
494 | do { | |
495 | if (channel->iob[index].state == BUF_STATE_FREE) { | |
496 | channel->iob[index].state = BUF_STATE_LOCKED; | |
497 | channel->io_buf_no = (channel->io_buf_no + 1) % | |
498 | QETH_CMD_BUFFER_NO; | |
499 | memset(channel->iob[index].data, 0, QETH_BUFSIZE); | |
500 | return channel->iob + index; | |
501 | } | |
502 | index = (index + 1) % QETH_CMD_BUFFER_NO; | |
503 | } while (index != channel->io_buf_no); | |
504 | ||
505 | return NULL; | |
506 | } | |
507 | ||
508 | void qeth_release_buffer(struct qeth_channel *channel, | |
509 | struct qeth_cmd_buffer *iob) | |
510 | { | |
511 | unsigned long flags; | |
512 | ||
d11ba0c4 | 513 | QETH_DBF_TEXT(TRACE, 6, "relbuff"); |
4a71df50 FB |
514 | spin_lock_irqsave(&channel->iob_lock, flags); |
515 | memset(iob->data, 0, QETH_BUFSIZE); | |
516 | iob->state = BUF_STATE_FREE; | |
517 | iob->callback = qeth_send_control_data_cb; | |
518 | iob->rc = 0; | |
519 | spin_unlock_irqrestore(&channel->iob_lock, flags); | |
520 | } | |
521 | EXPORT_SYMBOL_GPL(qeth_release_buffer); | |
522 | ||
523 | static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) | |
524 | { | |
525 | struct qeth_cmd_buffer *buffer = NULL; | |
526 | unsigned long flags; | |
527 | ||
528 | spin_lock_irqsave(&channel->iob_lock, flags); | |
529 | buffer = __qeth_get_buffer(channel); | |
530 | spin_unlock_irqrestore(&channel->iob_lock, flags); | |
531 | return buffer; | |
532 | } | |
533 | ||
534 | struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) | |
535 | { | |
536 | struct qeth_cmd_buffer *buffer; | |
537 | wait_event(channel->wait_q, | |
538 | ((buffer = qeth_get_buffer(channel)) != NULL)); | |
539 | return buffer; | |
540 | } | |
541 | EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); | |
542 | ||
543 | void qeth_clear_cmd_buffers(struct qeth_channel *channel) | |
544 | { | |
545 | int cnt; | |
546 | ||
547 | for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) | |
548 | qeth_release_buffer(channel, &channel->iob[cnt]); | |
549 | channel->buf_no = 0; | |
550 | channel->io_buf_no = 0; | |
551 | } | |
552 | EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); | |
553 | ||
554 | static void qeth_send_control_data_cb(struct qeth_channel *channel, | |
555 | struct qeth_cmd_buffer *iob) | |
556 | { | |
557 | struct qeth_card *card; | |
558 | struct qeth_reply *reply, *r; | |
559 | struct qeth_ipa_cmd *cmd; | |
560 | unsigned long flags; | |
561 | int keep_reply; | |
562 | ||
d11ba0c4 | 563 | QETH_DBF_TEXT(TRACE, 4, "sndctlcb"); |
4a71df50 FB |
564 | |
565 | card = CARD_FROM_CDEV(channel->ccwdev); | |
566 | if (qeth_check_idx_response(iob->data)) { | |
567 | qeth_clear_ipacmd_list(card); | |
fc9c2460 UB |
568 | if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6) |
569 | dev_err(&card->gdev->dev, | |
570 | "The qeth device is not configured " | |
571 | "for the OSI layer required by z/VM\n"); | |
4a71df50 FB |
572 | qeth_schedule_recovery(card); |
573 | goto out; | |
574 | } | |
575 | ||
576 | cmd = qeth_check_ipa_data(card, iob); | |
577 | if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) | |
578 | goto out; | |
579 | /*in case of OSN : check if cmd is set */ | |
580 | if (card->info.type == QETH_CARD_TYPE_OSN && | |
581 | cmd && | |
582 | cmd->hdr.command != IPA_CMD_STARTLAN && | |
583 | card->osn_info.assist_cb != NULL) { | |
584 | card->osn_info.assist_cb(card->dev, cmd); | |
585 | goto out; | |
586 | } | |
587 | ||
588 | spin_lock_irqsave(&card->lock, flags); | |
589 | list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { | |
590 | if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || | |
591 | ((cmd) && (reply->seqno == cmd->hdr.seqno))) { | |
592 | qeth_get_reply(reply); | |
593 | list_del_init(&reply->list); | |
594 | spin_unlock_irqrestore(&card->lock, flags); | |
595 | keep_reply = 0; | |
596 | if (reply->callback != NULL) { | |
597 | if (cmd) { | |
598 | reply->offset = (__u16)((char *)cmd - | |
599 | (char *)iob->data); | |
600 | keep_reply = reply->callback(card, | |
601 | reply, | |
602 | (unsigned long)cmd); | |
603 | } else | |
604 | keep_reply = reply->callback(card, | |
605 | reply, | |
606 | (unsigned long)iob); | |
607 | } | |
608 | if (cmd) | |
609 | reply->rc = (u16) cmd->hdr.return_code; | |
610 | else if (iob->rc) | |
611 | reply->rc = iob->rc; | |
612 | if (keep_reply) { | |
613 | spin_lock_irqsave(&card->lock, flags); | |
614 | list_add_tail(&reply->list, | |
615 | &card->cmd_waiter_list); | |
616 | spin_unlock_irqrestore(&card->lock, flags); | |
617 | } else { | |
618 | atomic_inc(&reply->received); | |
619 | wake_up(&reply->wait_q); | |
620 | } | |
621 | qeth_put_reply(reply); | |
622 | goto out; | |
623 | } | |
624 | } | |
625 | spin_unlock_irqrestore(&card->lock, flags); | |
626 | out: | |
627 | memcpy(&card->seqno.pdu_hdr_ack, | |
628 | QETH_PDU_HEADER_SEQ_NO(iob->data), | |
629 | QETH_SEQ_NO_LENGTH); | |
630 | qeth_release_buffer(channel, iob); | |
631 | } | |
632 | ||
633 | static int qeth_setup_channel(struct qeth_channel *channel) | |
634 | { | |
635 | int cnt; | |
636 | ||
d11ba0c4 | 637 | QETH_DBF_TEXT(SETUP, 2, "setupch"); |
4a71df50 FB |
638 | for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { |
639 | channel->iob[cnt].data = (char *) | |
640 | kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); | |
641 | if (channel->iob[cnt].data == NULL) | |
642 | break; | |
643 | channel->iob[cnt].state = BUF_STATE_FREE; | |
644 | channel->iob[cnt].channel = channel; | |
645 | channel->iob[cnt].callback = qeth_send_control_data_cb; | |
646 | channel->iob[cnt].rc = 0; | |
647 | } | |
648 | if (cnt < QETH_CMD_BUFFER_NO) { | |
649 | while (cnt-- > 0) | |
650 | kfree(channel->iob[cnt].data); | |
651 | return -ENOMEM; | |
652 | } | |
653 | channel->buf_no = 0; | |
654 | channel->io_buf_no = 0; | |
655 | atomic_set(&channel->irq_pending, 0); | |
656 | spin_lock_init(&channel->iob_lock); | |
657 | ||
658 | init_waitqueue_head(&channel->wait_q); | |
659 | return 0; | |
660 | } | |
661 | ||
662 | static int qeth_set_thread_start_bit(struct qeth_card *card, | |
663 | unsigned long thread) | |
664 | { | |
665 | unsigned long flags; | |
666 | ||
667 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
668 | if (!(card->thread_allowed_mask & thread) || | |
669 | (card->thread_start_mask & thread)) { | |
670 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
671 | return -EPERM; | |
672 | } | |
673 | card->thread_start_mask |= thread; | |
674 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
675 | return 0; | |
676 | } | |
677 | ||
678 | void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) | |
679 | { | |
680 | unsigned long flags; | |
681 | ||
682 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
683 | card->thread_start_mask &= ~thread; | |
684 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
685 | wake_up(&card->wait_q); | |
686 | } | |
687 | EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); | |
688 | ||
689 | void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) | |
690 | { | |
691 | unsigned long flags; | |
692 | ||
693 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
694 | card->thread_running_mask &= ~thread; | |
695 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
696 | wake_up(&card->wait_q); | |
697 | } | |
698 | EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); | |
699 | ||
700 | static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) | |
701 | { | |
702 | unsigned long flags; | |
703 | int rc = 0; | |
704 | ||
705 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
706 | if (card->thread_start_mask & thread) { | |
707 | if ((card->thread_allowed_mask & thread) && | |
708 | !(card->thread_running_mask & thread)) { | |
709 | rc = 1; | |
710 | card->thread_start_mask &= ~thread; | |
711 | card->thread_running_mask |= thread; | |
712 | } else | |
713 | rc = -EPERM; | |
714 | } | |
715 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
716 | return rc; | |
717 | } | |
718 | ||
719 | int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) | |
720 | { | |
721 | int rc = 0; | |
722 | ||
723 | wait_event(card->wait_q, | |
724 | (rc = __qeth_do_run_thread(card, thread)) >= 0); | |
725 | return rc; | |
726 | } | |
727 | EXPORT_SYMBOL_GPL(qeth_do_run_thread); | |
728 | ||
729 | void qeth_schedule_recovery(struct qeth_card *card) | |
730 | { | |
d11ba0c4 | 731 | QETH_DBF_TEXT(TRACE, 2, "startrec"); |
4a71df50 FB |
732 | if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) |
733 | schedule_work(&card->kernel_thread_starter); | |
734 | } | |
735 | EXPORT_SYMBOL_GPL(qeth_schedule_recovery); | |
736 | ||
737 | static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) | |
738 | { | |
739 | int dstat, cstat; | |
740 | char *sense; | |
741 | ||
742 | sense = (char *) irb->ecw; | |
23d805b6 PO |
743 | cstat = irb->scsw.cmd.cstat; |
744 | dstat = irb->scsw.cmd.dstat; | |
4a71df50 FB |
745 | |
746 | if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | | |
747 | SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | | |
748 | SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { | |
d11ba0c4 | 749 | QETH_DBF_TEXT(TRACE, 2, "CGENCHK"); |
74eacdb9 FB |
750 | dev_warn(&cdev->dev, "The qeth device driver " |
751 | "failed to recover an error on the device\n"); | |
752 | QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ", | |
753 | dev_name(&cdev->dev), dstat, cstat); | |
4a71df50 FB |
754 | print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, |
755 | 16, 1, irb, 64, 1); | |
756 | return 1; | |
757 | } | |
758 | ||
759 | if (dstat & DEV_STAT_UNIT_CHECK) { | |
760 | if (sense[SENSE_RESETTING_EVENT_BYTE] & | |
761 | SENSE_RESETTING_EVENT_FLAG) { | |
d11ba0c4 | 762 | QETH_DBF_TEXT(TRACE, 2, "REVIND"); |
4a71df50 FB |
763 | return 1; |
764 | } | |
765 | if (sense[SENSE_COMMAND_REJECT_BYTE] & | |
766 | SENSE_COMMAND_REJECT_FLAG) { | |
d11ba0c4 | 767 | QETH_DBF_TEXT(TRACE, 2, "CMDREJi"); |
28a7e4c9 | 768 | return 1; |
4a71df50 FB |
769 | } |
770 | if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { | |
d11ba0c4 | 771 | QETH_DBF_TEXT(TRACE, 2, "AFFE"); |
4a71df50 FB |
772 | return 1; |
773 | } | |
774 | if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { | |
d11ba0c4 | 775 | QETH_DBF_TEXT(TRACE, 2, "ZEROSEN"); |
4a71df50 FB |
776 | return 0; |
777 | } | |
d11ba0c4 | 778 | QETH_DBF_TEXT(TRACE, 2, "DGENCHK"); |
4a71df50 FB |
779 | return 1; |
780 | } | |
781 | return 0; | |
782 | } | |
783 | ||
784 | static long __qeth_check_irb_error(struct ccw_device *cdev, | |
785 | unsigned long intparm, struct irb *irb) | |
786 | { | |
787 | if (!IS_ERR(irb)) | |
788 | return 0; | |
789 | ||
790 | switch (PTR_ERR(irb)) { | |
791 | case -EIO: | |
74eacdb9 FB |
792 | QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", |
793 | dev_name(&cdev->dev)); | |
d11ba0c4 PT |
794 | QETH_DBF_TEXT(TRACE, 2, "ckirberr"); |
795 | QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO); | |
4a71df50 FB |
796 | break; |
797 | case -ETIMEDOUT: | |
74eacdb9 FB |
798 | dev_warn(&cdev->dev, "A hardware operation timed out" |
799 | " on the device\n"); | |
d11ba0c4 PT |
800 | QETH_DBF_TEXT(TRACE, 2, "ckirberr"); |
801 | QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT); | |
4a71df50 FB |
802 | if (intparm == QETH_RCD_PARM) { |
803 | struct qeth_card *card = CARD_FROM_CDEV(cdev); | |
804 | ||
805 | if (card && (card->data.ccwdev == cdev)) { | |
806 | card->data.state = CH_STATE_DOWN; | |
807 | wake_up(&card->wait_q); | |
808 | } | |
809 | } | |
810 | break; | |
811 | default: | |
74eacdb9 FB |
812 | QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", |
813 | dev_name(&cdev->dev), PTR_ERR(irb)); | |
d11ba0c4 PT |
814 | QETH_DBF_TEXT(TRACE, 2, "ckirberr"); |
815 | QETH_DBF_TEXT(TRACE, 2, " rc???"); | |
4a71df50 FB |
816 | } |
817 | return PTR_ERR(irb); | |
818 | } | |
819 | ||
820 | static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, | |
821 | struct irb *irb) | |
822 | { | |
823 | int rc; | |
824 | int cstat, dstat; | |
825 | struct qeth_cmd_buffer *buffer; | |
826 | struct qeth_channel *channel; | |
827 | struct qeth_card *card; | |
828 | struct qeth_cmd_buffer *iob; | |
829 | __u8 index; | |
830 | ||
d11ba0c4 | 831 | QETH_DBF_TEXT(TRACE, 5, "irq"); |
4a71df50 FB |
832 | |
833 | if (__qeth_check_irb_error(cdev, intparm, irb)) | |
834 | return; | |
23d805b6 PO |
835 | cstat = irb->scsw.cmd.cstat; |
836 | dstat = irb->scsw.cmd.dstat; | |
4a71df50 FB |
837 | |
838 | card = CARD_FROM_CDEV(cdev); | |
839 | if (!card) | |
840 | return; | |
841 | ||
842 | if (card->read.ccwdev == cdev) { | |
843 | channel = &card->read; | |
d11ba0c4 | 844 | QETH_DBF_TEXT(TRACE, 5, "read"); |
4a71df50 FB |
845 | } else if (card->write.ccwdev == cdev) { |
846 | channel = &card->write; | |
d11ba0c4 | 847 | QETH_DBF_TEXT(TRACE, 5, "write"); |
4a71df50 FB |
848 | } else { |
849 | channel = &card->data; | |
d11ba0c4 | 850 | QETH_DBF_TEXT(TRACE, 5, "data"); |
4a71df50 FB |
851 | } |
852 | atomic_set(&channel->irq_pending, 0); | |
853 | ||
23d805b6 | 854 | if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) |
4a71df50 FB |
855 | channel->state = CH_STATE_STOPPED; |
856 | ||
23d805b6 | 857 | if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) |
4a71df50 FB |
858 | channel->state = CH_STATE_HALTED; |
859 | ||
860 | /*let's wake up immediately on data channel*/ | |
861 | if ((channel == &card->data) && (intparm != 0) && | |
862 | (intparm != QETH_RCD_PARM)) | |
863 | goto out; | |
864 | ||
865 | if (intparm == QETH_CLEAR_CHANNEL_PARM) { | |
d11ba0c4 | 866 | QETH_DBF_TEXT(TRACE, 6, "clrchpar"); |
4a71df50 FB |
867 | /* we don't have to handle this further */ |
868 | intparm = 0; | |
869 | } | |
870 | if (intparm == QETH_HALT_CHANNEL_PARM) { | |
d11ba0c4 | 871 | QETH_DBF_TEXT(TRACE, 6, "hltchpar"); |
4a71df50 FB |
872 | /* we don't have to handle this further */ |
873 | intparm = 0; | |
874 | } | |
875 | if ((dstat & DEV_STAT_UNIT_EXCEP) || | |
876 | (dstat & DEV_STAT_UNIT_CHECK) || | |
877 | (cstat)) { | |
878 | if (irb->esw.esw0.erw.cons) { | |
74eacdb9 FB |
879 | dev_warn(&channel->ccwdev->dev, |
880 | "The qeth device driver failed to recover " | |
881 | "an error on the device\n"); | |
882 | QETH_DBF_MESSAGE(2, "%s sense data available. cstat " | |
883 | "0x%X dstat 0x%X\n", | |
884 | dev_name(&channel->ccwdev->dev), cstat, dstat); | |
4a71df50 FB |
885 | print_hex_dump(KERN_WARNING, "qeth: irb ", |
886 | DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); | |
887 | print_hex_dump(KERN_WARNING, "qeth: sense data ", | |
888 | DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); | |
889 | } | |
890 | if (intparm == QETH_RCD_PARM) { | |
891 | channel->state = CH_STATE_DOWN; | |
892 | goto out; | |
893 | } | |
894 | rc = qeth_get_problem(cdev, irb); | |
895 | if (rc) { | |
28a7e4c9 | 896 | qeth_clear_ipacmd_list(card); |
4a71df50 FB |
897 | qeth_schedule_recovery(card); |
898 | goto out; | |
899 | } | |
900 | } | |
901 | ||
902 | if (intparm == QETH_RCD_PARM) { | |
903 | channel->state = CH_STATE_RCD_DONE; | |
904 | goto out; | |
905 | } | |
906 | if (intparm) { | |
907 | buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); | |
908 | buffer->state = BUF_STATE_PROCESSED; | |
909 | } | |
910 | if (channel == &card->data) | |
911 | return; | |
912 | if (channel == &card->read && | |
913 | channel->state == CH_STATE_UP) | |
914 | qeth_issue_next_read(card); | |
915 | ||
916 | iob = channel->iob; | |
917 | index = channel->buf_no; | |
918 | while (iob[index].state == BUF_STATE_PROCESSED) { | |
919 | if (iob[index].callback != NULL) | |
920 | iob[index].callback(channel, iob + index); | |
921 | ||
922 | index = (index + 1) % QETH_CMD_BUFFER_NO; | |
923 | } | |
924 | channel->buf_no = index; | |
925 | out: | |
926 | wake_up(&card->wait_q); | |
927 | return; | |
928 | } | |
929 | ||
930 | static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, | |
931 | struct qeth_qdio_out_buffer *buf) | |
932 | { | |
933 | int i; | |
934 | struct sk_buff *skb; | |
935 | ||
936 | /* is PCI flag set on buffer? */ | |
937 | if (buf->buffer->element[0].flags & 0x40) | |
938 | atomic_dec(&queue->set_pci_flags_count); | |
939 | ||
940 | skb = skb_dequeue(&buf->skb_list); | |
941 | while (skb) { | |
942 | atomic_dec(&skb->users); | |
943 | dev_kfree_skb_any(skb); | |
944 | skb = skb_dequeue(&buf->skb_list); | |
945 | } | |
4a71df50 | 946 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { |
683d718a FB |
947 | if (buf->buffer->element[i].addr && buf->is_header[i]) |
948 | kmem_cache_free(qeth_core_header_cache, | |
949 | buf->buffer->element[i].addr); | |
950 | buf->is_header[i] = 0; | |
4a71df50 FB |
951 | buf->buffer->element[i].length = 0; |
952 | buf->buffer->element[i].addr = NULL; | |
953 | buf->buffer->element[i].flags = 0; | |
954 | } | |
955 | buf->next_element_to_fill = 0; | |
956 | atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); | |
957 | } | |
958 | ||
959 | void qeth_clear_qdio_buffers(struct qeth_card *card) | |
960 | { | |
961 | int i, j; | |
962 | ||
d11ba0c4 | 963 | QETH_DBF_TEXT(TRACE, 2, "clearqdbf"); |
4a71df50 FB |
964 | /* clear outbound buffers to free skbs */ |
965 | for (i = 0; i < card->qdio.no_out_queues; ++i) | |
966 | if (card->qdio.out_qs[i]) { | |
967 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) | |
968 | qeth_clear_output_buffer(card->qdio.out_qs[i], | |
969 | &card->qdio.out_qs[i]->bufs[j]); | |
970 | } | |
971 | } | |
972 | EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); | |
973 | ||
974 | static void qeth_free_buffer_pool(struct qeth_card *card) | |
975 | { | |
976 | struct qeth_buffer_pool_entry *pool_entry, *tmp; | |
977 | int i = 0; | |
d11ba0c4 | 978 | QETH_DBF_TEXT(TRACE, 5, "freepool"); |
4a71df50 FB |
979 | list_for_each_entry_safe(pool_entry, tmp, |
980 | &card->qdio.init_pool.entry_list, init_list){ | |
981 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) | |
982 | free_page((unsigned long)pool_entry->elements[i]); | |
983 | list_del(&pool_entry->init_list); | |
984 | kfree(pool_entry); | |
985 | } | |
986 | } | |
987 | ||
988 | static void qeth_free_qdio_buffers(struct qeth_card *card) | |
989 | { | |
990 | int i, j; | |
991 | ||
d11ba0c4 | 992 | QETH_DBF_TEXT(TRACE, 2, "freeqdbf"); |
4a71df50 FB |
993 | if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == |
994 | QETH_QDIO_UNINITIALIZED) | |
995 | return; | |
996 | kfree(card->qdio.in_q); | |
997 | card->qdio.in_q = NULL; | |
998 | /* inbound buffer pool */ | |
999 | qeth_free_buffer_pool(card); | |
1000 | /* free outbound qdio_qs */ | |
1001 | if (card->qdio.out_qs) { | |
1002 | for (i = 0; i < card->qdio.no_out_queues; ++i) { | |
1003 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) | |
1004 | qeth_clear_output_buffer(card->qdio.out_qs[i], | |
1005 | &card->qdio.out_qs[i]->bufs[j]); | |
1006 | kfree(card->qdio.out_qs[i]); | |
1007 | } | |
1008 | kfree(card->qdio.out_qs); | |
1009 | card->qdio.out_qs = NULL; | |
1010 | } | |
1011 | } | |
1012 | ||
1013 | static void qeth_clean_channel(struct qeth_channel *channel) | |
1014 | { | |
1015 | int cnt; | |
1016 | ||
d11ba0c4 | 1017 | QETH_DBF_TEXT(SETUP, 2, "freech"); |
4a71df50 FB |
1018 | for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) |
1019 | kfree(channel->iob[cnt].data); | |
1020 | } | |
1021 | ||
1022 | static int qeth_is_1920_device(struct qeth_card *card) | |
1023 | { | |
1024 | int single_queue = 0; | |
1025 | struct ccw_device *ccwdev; | |
1026 | struct channelPath_dsc { | |
1027 | u8 flags; | |
1028 | u8 lsn; | |
1029 | u8 desc; | |
1030 | u8 chpid; | |
1031 | u8 swla; | |
1032 | u8 zeroes; | |
1033 | u8 chla; | |
1034 | u8 chpp; | |
1035 | } *chp_dsc; | |
1036 | ||
d11ba0c4 | 1037 | QETH_DBF_TEXT(SETUP, 2, "chk_1920"); |
4a71df50 FB |
1038 | |
1039 | ccwdev = card->data.ccwdev; | |
1040 | chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); | |
1041 | if (chp_dsc != NULL) { | |
1042 | /* CHPP field bit 6 == 1 -> single queue */ | |
1043 | single_queue = ((chp_dsc->chpp & 0x02) == 0x02); | |
1044 | kfree(chp_dsc); | |
1045 | } | |
d11ba0c4 | 1046 | QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue); |
4a71df50 FB |
1047 | return single_queue; |
1048 | } | |
1049 | ||
1050 | static void qeth_init_qdio_info(struct qeth_card *card) | |
1051 | { | |
d11ba0c4 | 1052 | QETH_DBF_TEXT(SETUP, 4, "intqdinf"); |
4a71df50 FB |
1053 | atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); |
1054 | /* inbound */ | |
1055 | card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; | |
1056 | card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; | |
1057 | card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; | |
1058 | INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); | |
1059 | INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); | |
1060 | } | |
1061 | ||
1062 | static void qeth_set_intial_options(struct qeth_card *card) | |
1063 | { | |
1064 | card->options.route4.type = NO_ROUTER; | |
1065 | card->options.route6.type = NO_ROUTER; | |
1066 | card->options.checksum_type = QETH_CHECKSUM_DEFAULT; | |
1067 | card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; | |
1068 | card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; | |
1069 | card->options.fake_broadcast = 0; | |
1070 | card->options.add_hhlen = DEFAULT_ADD_HHLEN; | |
4a71df50 FB |
1071 | card->options.performance_stats = 0; |
1072 | card->options.rx_sg_cb = QETH_RX_SG_CB; | |
1073 | } | |
1074 | ||
1075 | static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) | |
1076 | { | |
1077 | unsigned long flags; | |
1078 | int rc = 0; | |
1079 | ||
1080 | spin_lock_irqsave(&card->thread_mask_lock, flags); | |
d11ba0c4 | 1081 | QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x", |
4a71df50 FB |
1082 | (u8) card->thread_start_mask, |
1083 | (u8) card->thread_allowed_mask, | |
1084 | (u8) card->thread_running_mask); | |
1085 | rc = (card->thread_start_mask & thread); | |
1086 | spin_unlock_irqrestore(&card->thread_mask_lock, flags); | |
1087 | return rc; | |
1088 | } | |
1089 | ||
1090 | static void qeth_start_kernel_thread(struct work_struct *work) | |
1091 | { | |
1092 | struct qeth_card *card = container_of(work, struct qeth_card, | |
1093 | kernel_thread_starter); | |
d11ba0c4 | 1094 | QETH_DBF_TEXT(TRACE , 2, "strthrd"); |
4a71df50 FB |
1095 | |
1096 | if (card->read.state != CH_STATE_UP && | |
1097 | card->write.state != CH_STATE_UP) | |
1098 | return; | |
1099 | if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) | |
1100 | kthread_run(card->discipline.recover, (void *) card, | |
1101 | "qeth_recover"); | |
1102 | } | |
1103 | ||
1104 | static int qeth_setup_card(struct qeth_card *card) | |
1105 | { | |
1106 | ||
d11ba0c4 PT |
1107 | QETH_DBF_TEXT(SETUP, 2, "setupcrd"); |
1108 | QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); | |
4a71df50 FB |
1109 | |
1110 | card->read.state = CH_STATE_DOWN; | |
1111 | card->write.state = CH_STATE_DOWN; | |
1112 | card->data.state = CH_STATE_DOWN; | |
1113 | card->state = CARD_STATE_DOWN; | |
1114 | card->lan_online = 0; | |
1115 | card->use_hard_stop = 0; | |
1116 | card->dev = NULL; | |
1117 | spin_lock_init(&card->vlanlock); | |
1118 | spin_lock_init(&card->mclock); | |
1119 | card->vlangrp = NULL; | |
1120 | spin_lock_init(&card->lock); | |
1121 | spin_lock_init(&card->ip_lock); | |
1122 | spin_lock_init(&card->thread_mask_lock); | |
1123 | card->thread_start_mask = 0; | |
1124 | card->thread_allowed_mask = 0; | |
1125 | card->thread_running_mask = 0; | |
1126 | INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); | |
1127 | INIT_LIST_HEAD(&card->ip_list); | |
1128 | card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL); | |
1129 | if (!card->ip_tbd_list) { | |
d11ba0c4 | 1130 | QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); |
4a71df50 FB |
1131 | return -ENOMEM; |
1132 | } | |
1133 | INIT_LIST_HEAD(card->ip_tbd_list); | |
1134 | INIT_LIST_HEAD(&card->cmd_waiter_list); | |
1135 | init_waitqueue_head(&card->wait_q); | |
1136 | /* intial options */ | |
1137 | qeth_set_intial_options(card); | |
1138 | /* IP address takeover */ | |
1139 | INIT_LIST_HEAD(&card->ipato.entries); | |
1140 | card->ipato.enabled = 0; | |
1141 | card->ipato.invert4 = 0; | |
1142 | card->ipato.invert6 = 0; | |
1143 | /* init QDIO stuff */ | |
1144 | qeth_init_qdio_info(card); | |
1145 | return 0; | |
1146 | } | |
1147 | ||
6bcac508 MS |
1148 | static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) |
1149 | { | |
1150 | struct qeth_card *card = container_of(slr, struct qeth_card, | |
1151 | qeth_service_level); | |
1152 | seq_printf(m, "qeth: %s firmware level %s\n", CARD_BUS_ID(card), | |
1153 | card->info.mcl_level); | |
1154 | } | |
1155 | ||
4a71df50 FB |
1156 | static struct qeth_card *qeth_alloc_card(void) |
1157 | { | |
1158 | struct qeth_card *card; | |
1159 | ||
d11ba0c4 | 1160 | QETH_DBF_TEXT(SETUP, 2, "alloccrd"); |
4a71df50 FB |
1161 | card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); |
1162 | if (!card) | |
1163 | return NULL; | |
d11ba0c4 | 1164 | QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); |
4a71df50 FB |
1165 | if (qeth_setup_channel(&card->read)) { |
1166 | kfree(card); | |
1167 | return NULL; | |
1168 | } | |
1169 | if (qeth_setup_channel(&card->write)) { | |
1170 | qeth_clean_channel(&card->read); | |
1171 | kfree(card); | |
1172 | return NULL; | |
1173 | } | |
1174 | card->options.layer2 = -1; | |
6bcac508 MS |
1175 | card->qeth_service_level.seq_print = qeth_core_sl_print; |
1176 | register_service_level(&card->qeth_service_level); | |
4a71df50 FB |
1177 | return card; |
1178 | } | |
1179 | ||
1180 | static int qeth_determine_card_type(struct qeth_card *card) | |
1181 | { | |
1182 | int i = 0; | |
1183 | ||
d11ba0c4 | 1184 | QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); |
4a71df50 FB |
1185 | |
1186 | card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; | |
1187 | card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; | |
1188 | while (known_devices[i][4]) { | |
1189 | if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) && | |
1190 | (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) { | |
1191 | card->info.type = known_devices[i][4]; | |
1192 | card->qdio.no_out_queues = known_devices[i][8]; | |
1193 | card->info.is_multicast_different = known_devices[i][9]; | |
1194 | if (qeth_is_1920_device(card)) { | |
74eacdb9 FB |
1195 | dev_info(&card->gdev->dev, |
1196 | "Priority Queueing not supported\n"); | |
4a71df50 FB |
1197 | card->qdio.no_out_queues = 1; |
1198 | card->qdio.default_out_queue = 0; | |
1199 | } | |
1200 | return 0; | |
1201 | } | |
1202 | i++; | |
1203 | } | |
1204 | card->info.type = QETH_CARD_TYPE_UNKNOWN; | |
74eacdb9 FB |
1205 | dev_err(&card->gdev->dev, "The adapter hardware is of an " |
1206 | "unknown type\n"); | |
4a71df50 FB |
1207 | return -ENOENT; |
1208 | } | |
1209 | ||
1210 | static int qeth_clear_channel(struct qeth_channel *channel) | |
1211 | { | |
1212 | unsigned long flags; | |
1213 | struct qeth_card *card; | |
1214 | int rc; | |
1215 | ||
d11ba0c4 | 1216 | QETH_DBF_TEXT(TRACE, 3, "clearch"); |
4a71df50 FB |
1217 | card = CARD_FROM_CDEV(channel->ccwdev); |
1218 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); | |
1219 | rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); | |
1220 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1221 | ||
1222 | if (rc) | |
1223 | return rc; | |
1224 | rc = wait_event_interruptible_timeout(card->wait_q, | |
1225 | channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); | |
1226 | if (rc == -ERESTARTSYS) | |
1227 | return rc; | |
1228 | if (channel->state != CH_STATE_STOPPED) | |
1229 | return -ETIME; | |
1230 | channel->state = CH_STATE_DOWN; | |
1231 | return 0; | |
1232 | } | |
1233 | ||
1234 | static int qeth_halt_channel(struct qeth_channel *channel) | |
1235 | { | |
1236 | unsigned long flags; | |
1237 | struct qeth_card *card; | |
1238 | int rc; | |
1239 | ||
d11ba0c4 | 1240 | QETH_DBF_TEXT(TRACE, 3, "haltch"); |
4a71df50 FB |
1241 | card = CARD_FROM_CDEV(channel->ccwdev); |
1242 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); | |
1243 | rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); | |
1244 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1245 | ||
1246 | if (rc) | |
1247 | return rc; | |
1248 | rc = wait_event_interruptible_timeout(card->wait_q, | |
1249 | channel->state == CH_STATE_HALTED, QETH_TIMEOUT); | |
1250 | if (rc == -ERESTARTSYS) | |
1251 | return rc; | |
1252 | if (channel->state != CH_STATE_HALTED) | |
1253 | return -ETIME; | |
1254 | return 0; | |
1255 | } | |
1256 | ||
1257 | static int qeth_halt_channels(struct qeth_card *card) | |
1258 | { | |
1259 | int rc1 = 0, rc2 = 0, rc3 = 0; | |
1260 | ||
d11ba0c4 | 1261 | QETH_DBF_TEXT(TRACE, 3, "haltchs"); |
4a71df50 FB |
1262 | rc1 = qeth_halt_channel(&card->read); |
1263 | rc2 = qeth_halt_channel(&card->write); | |
1264 | rc3 = qeth_halt_channel(&card->data); | |
1265 | if (rc1) | |
1266 | return rc1; | |
1267 | if (rc2) | |
1268 | return rc2; | |
1269 | return rc3; | |
1270 | } | |
1271 | ||
1272 | static int qeth_clear_channels(struct qeth_card *card) | |
1273 | { | |
1274 | int rc1 = 0, rc2 = 0, rc3 = 0; | |
1275 | ||
d11ba0c4 | 1276 | QETH_DBF_TEXT(TRACE, 3, "clearchs"); |
4a71df50 FB |
1277 | rc1 = qeth_clear_channel(&card->read); |
1278 | rc2 = qeth_clear_channel(&card->write); | |
1279 | rc3 = qeth_clear_channel(&card->data); | |
1280 | if (rc1) | |
1281 | return rc1; | |
1282 | if (rc2) | |
1283 | return rc2; | |
1284 | return rc3; | |
1285 | } | |
1286 | ||
1287 | static int qeth_clear_halt_card(struct qeth_card *card, int halt) | |
1288 | { | |
1289 | int rc = 0; | |
1290 | ||
d11ba0c4 PT |
1291 | QETH_DBF_TEXT(TRACE, 3, "clhacrd"); |
1292 | QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *)); | |
4a71df50 FB |
1293 | |
1294 | if (halt) | |
1295 | rc = qeth_halt_channels(card); | |
1296 | if (rc) | |
1297 | return rc; | |
1298 | return qeth_clear_channels(card); | |
1299 | } | |
1300 | ||
1301 | int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) | |
1302 | { | |
1303 | int rc = 0; | |
1304 | ||
d11ba0c4 | 1305 | QETH_DBF_TEXT(TRACE, 3, "qdioclr"); |
4a71df50 FB |
1306 | switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, |
1307 | QETH_QDIO_CLEANING)) { | |
1308 | case QETH_QDIO_ESTABLISHED: | |
1309 | if (card->info.type == QETH_CARD_TYPE_IQD) | |
1310 | rc = qdio_cleanup(CARD_DDEV(card), | |
1311 | QDIO_FLAG_CLEANUP_USING_HALT); | |
1312 | else | |
1313 | rc = qdio_cleanup(CARD_DDEV(card), | |
1314 | QDIO_FLAG_CLEANUP_USING_CLEAR); | |
1315 | if (rc) | |
d11ba0c4 | 1316 | QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc); |
4a71df50 FB |
1317 | atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); |
1318 | break; | |
1319 | case QETH_QDIO_CLEANING: | |
1320 | return rc; | |
1321 | default: | |
1322 | break; | |
1323 | } | |
1324 | rc = qeth_clear_halt_card(card, use_halt); | |
1325 | if (rc) | |
d11ba0c4 | 1326 | QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc); |
4a71df50 FB |
1327 | card->state = CARD_STATE_DOWN; |
1328 | return rc; | |
1329 | } | |
1330 | EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); | |
1331 | ||
1332 | static int qeth_read_conf_data(struct qeth_card *card, void **buffer, | |
1333 | int *length) | |
1334 | { | |
1335 | struct ciw *ciw; | |
1336 | char *rcd_buf; | |
1337 | int ret; | |
1338 | struct qeth_channel *channel = &card->data; | |
1339 | unsigned long flags; | |
1340 | ||
1341 | /* | |
1342 | * scan for RCD command in extended SenseID data | |
1343 | */ | |
1344 | ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); | |
1345 | if (!ciw || ciw->cmd == 0) | |
1346 | return -EOPNOTSUPP; | |
1347 | rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); | |
1348 | if (!rcd_buf) | |
1349 | return -ENOMEM; | |
1350 | ||
1351 | channel->ccw.cmd_code = ciw->cmd; | |
1352 | channel->ccw.cda = (__u32) __pa(rcd_buf); | |
1353 | channel->ccw.count = ciw->count; | |
1354 | channel->ccw.flags = CCW_FLAG_SLI; | |
1355 | channel->state = CH_STATE_RCD; | |
1356 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); | |
1357 | ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, | |
1358 | QETH_RCD_PARM, LPM_ANYPATH, 0, | |
1359 | QETH_RCD_TIMEOUT); | |
1360 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1361 | if (!ret) | |
1362 | wait_event(card->wait_q, | |
1363 | (channel->state == CH_STATE_RCD_DONE || | |
1364 | channel->state == CH_STATE_DOWN)); | |
1365 | if (channel->state == CH_STATE_DOWN) | |
1366 | ret = -EIO; | |
1367 | else | |
1368 | channel->state = CH_STATE_DOWN; | |
1369 | if (ret) { | |
1370 | kfree(rcd_buf); | |
1371 | *buffer = NULL; | |
1372 | *length = 0; | |
1373 | } else { | |
1374 | *length = ciw->count; | |
1375 | *buffer = rcd_buf; | |
1376 | } | |
1377 | return ret; | |
1378 | } | |
1379 | ||
1380 | static int qeth_get_unitaddr(struct qeth_card *card) | |
1381 | { | |
1382 | int length; | |
1383 | char *prcd; | |
1384 | int rc; | |
1385 | ||
d11ba0c4 | 1386 | QETH_DBF_TEXT(SETUP, 2, "getunit"); |
4a71df50 FB |
1387 | rc = qeth_read_conf_data(card, (void **) &prcd, &length); |
1388 | if (rc) { | |
74eacdb9 FB |
1389 | QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", |
1390 | dev_name(&card->gdev->dev), rc); | |
4a71df50 FB |
1391 | return rc; |
1392 | } | |
1393 | card->info.chpid = prcd[30]; | |
1394 | card->info.unit_addr2 = prcd[31]; | |
1395 | card->info.cula = prcd[63]; | |
1396 | card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && | |
1397 | (prcd[0x11] == _ascebc['M'])); | |
1398 | kfree(prcd); | |
1399 | return 0; | |
1400 | } | |
1401 | ||
1402 | static void qeth_init_tokens(struct qeth_card *card) | |
1403 | { | |
1404 | card->token.issuer_rm_w = 0x00010103UL; | |
1405 | card->token.cm_filter_w = 0x00010108UL; | |
1406 | card->token.cm_connection_w = 0x0001010aUL; | |
1407 | card->token.ulp_filter_w = 0x0001010bUL; | |
1408 | card->token.ulp_connection_w = 0x0001010dUL; | |
1409 | } | |
1410 | ||
1411 | static void qeth_init_func_level(struct qeth_card *card) | |
1412 | { | |
1413 | if (card->ipato.enabled) { | |
1414 | if (card->info.type == QETH_CARD_TYPE_IQD) | |
1415 | card->info.func_level = | |
1416 | QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT; | |
1417 | else | |
1418 | card->info.func_level = | |
1419 | QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT; | |
1420 | } else { | |
1421 | if (card->info.type == QETH_CARD_TYPE_IQD) | |
1422 | /*FIXME:why do we have same values for dis and ena for | |
1423 | osae??? */ | |
1424 | card->info.func_level = | |
1425 | QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT; | |
1426 | else | |
1427 | card->info.func_level = | |
1428 | QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT; | |
1429 | } | |
1430 | } | |
1431 | ||
4a71df50 FB |
1432 | static int qeth_idx_activate_get_answer(struct qeth_channel *channel, |
1433 | void (*idx_reply_cb)(struct qeth_channel *, | |
1434 | struct qeth_cmd_buffer *)) | |
1435 | { | |
1436 | struct qeth_cmd_buffer *iob; | |
1437 | unsigned long flags; | |
1438 | int rc; | |
1439 | struct qeth_card *card; | |
1440 | ||
d11ba0c4 | 1441 | QETH_DBF_TEXT(SETUP, 2, "idxanswr"); |
4a71df50 FB |
1442 | card = CARD_FROM_CDEV(channel->ccwdev); |
1443 | iob = qeth_get_buffer(channel); | |
1444 | iob->callback = idx_reply_cb; | |
1445 | memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); | |
1446 | channel->ccw.count = QETH_BUFSIZE; | |
1447 | channel->ccw.cda = (__u32) __pa(iob->data); | |
1448 | ||
1449 | wait_event(card->wait_q, | |
1450 | atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); | |
d11ba0c4 | 1451 | QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); |
4a71df50 FB |
1452 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); |
1453 | rc = ccw_device_start(channel->ccwdev, | |
1454 | &channel->ccw, (addr_t) iob, 0, 0); | |
1455 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1456 | ||
1457 | if (rc) { | |
14cc21b6 | 1458 | QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); |
d11ba0c4 | 1459 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); |
4a71df50 FB |
1460 | atomic_set(&channel->irq_pending, 0); |
1461 | wake_up(&card->wait_q); | |
1462 | return rc; | |
1463 | } | |
1464 | rc = wait_event_interruptible_timeout(card->wait_q, | |
1465 | channel->state == CH_STATE_UP, QETH_TIMEOUT); | |
1466 | if (rc == -ERESTARTSYS) | |
1467 | return rc; | |
1468 | if (channel->state != CH_STATE_UP) { | |
1469 | rc = -ETIME; | |
d11ba0c4 | 1470 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); |
4a71df50 FB |
1471 | qeth_clear_cmd_buffers(channel); |
1472 | } else | |
1473 | rc = 0; | |
1474 | return rc; | |
1475 | } | |
1476 | ||
1477 | static int qeth_idx_activate_channel(struct qeth_channel *channel, | |
1478 | void (*idx_reply_cb)(struct qeth_channel *, | |
1479 | struct qeth_cmd_buffer *)) | |
1480 | { | |
1481 | struct qeth_card *card; | |
1482 | struct qeth_cmd_buffer *iob; | |
1483 | unsigned long flags; | |
1484 | __u16 temp; | |
1485 | __u8 tmp; | |
1486 | int rc; | |
f06f6f32 | 1487 | struct ccw_dev_id temp_devid; |
4a71df50 FB |
1488 | |
1489 | card = CARD_FROM_CDEV(channel->ccwdev); | |
1490 | ||
d11ba0c4 | 1491 | QETH_DBF_TEXT(SETUP, 2, "idxactch"); |
4a71df50 FB |
1492 | |
1493 | iob = qeth_get_buffer(channel); | |
1494 | iob->callback = idx_reply_cb; | |
1495 | memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); | |
1496 | channel->ccw.count = IDX_ACTIVATE_SIZE; | |
1497 | channel->ccw.cda = (__u32) __pa(iob->data); | |
1498 | if (channel == &card->write) { | |
1499 | memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); | |
1500 | memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), | |
1501 | &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); | |
1502 | card->seqno.trans_hdr++; | |
1503 | } else { | |
1504 | memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); | |
1505 | memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), | |
1506 | &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); | |
1507 | } | |
1508 | tmp = ((__u8)card->info.portno) | 0x80; | |
1509 | memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); | |
1510 | memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), | |
1511 | &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); | |
1512 | memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), | |
1513 | &card->info.func_level, sizeof(__u16)); | |
f06f6f32 CH |
1514 | ccw_device_get_id(CARD_DDEV(card), &temp_devid); |
1515 | memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); | |
4a71df50 FB |
1516 | temp = (card->info.cula << 8) + card->info.unit_addr2; |
1517 | memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); | |
1518 | ||
1519 | wait_event(card->wait_q, | |
1520 | atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); | |
d11ba0c4 | 1521 | QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); |
4a71df50 FB |
1522 | spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); |
1523 | rc = ccw_device_start(channel->ccwdev, | |
1524 | &channel->ccw, (addr_t) iob, 0, 0); | |
1525 | spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); | |
1526 | ||
1527 | if (rc) { | |
14cc21b6 FB |
1528 | QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", |
1529 | rc); | |
d11ba0c4 | 1530 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); |
4a71df50 FB |
1531 | atomic_set(&channel->irq_pending, 0); |
1532 | wake_up(&card->wait_q); | |
1533 | return rc; | |
1534 | } | |
1535 | rc = wait_event_interruptible_timeout(card->wait_q, | |
1536 | channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); | |
1537 | if (rc == -ERESTARTSYS) | |
1538 | return rc; | |
1539 | if (channel->state != CH_STATE_ACTIVATING) { | |
74eacdb9 FB |
1540 | dev_warn(&channel->ccwdev->dev, "The qeth device driver" |
1541 | " failed to recover an error on the device\n"); | |
1542 | QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", | |
1543 | dev_name(&channel->ccwdev->dev)); | |
d11ba0c4 | 1544 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); |
4a71df50 FB |
1545 | qeth_clear_cmd_buffers(channel); |
1546 | return -ETIME; | |
1547 | } | |
1548 | return qeth_idx_activate_get_answer(channel, idx_reply_cb); | |
1549 | } | |
1550 | ||
1551 | static int qeth_peer_func_level(int level) | |
1552 | { | |
1553 | if ((level & 0xff) == 8) | |
1554 | return (level & 0xff) + 0x400; | |
1555 | if (((level >> 8) & 3) == 1) | |
1556 | return (level & 0xff) + 0x200; | |
1557 | return level; | |
1558 | } | |
1559 | ||
1560 | static void qeth_idx_write_cb(struct qeth_channel *channel, | |
1561 | struct qeth_cmd_buffer *iob) | |
1562 | { | |
1563 | struct qeth_card *card; | |
1564 | __u16 temp; | |
1565 | ||
d11ba0c4 | 1566 | QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); |
4a71df50 FB |
1567 | |
1568 | if (channel->state == CH_STATE_DOWN) { | |
1569 | channel->state = CH_STATE_ACTIVATING; | |
1570 | goto out; | |
1571 | } | |
1572 | card = CARD_FROM_CDEV(channel->ccwdev); | |
1573 | ||
1574 | if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { | |
1575 | if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19) | |
74eacdb9 FB |
1576 | dev_err(&card->write.ccwdev->dev, |
1577 | "The adapter is used exclusively by another " | |
1578 | "host\n"); | |
4a71df50 | 1579 | else |
74eacdb9 FB |
1580 | QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" |
1581 | " negative reply\n", | |
1582 | dev_name(&card->write.ccwdev->dev)); | |
4a71df50 FB |
1583 | goto out; |
1584 | } | |
1585 | memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); | |
1586 | if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { | |
74eacdb9 FB |
1587 | QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " |
1588 | "function level mismatch (sent: 0x%x, received: " | |
1589 | "0x%x)\n", dev_name(&card->write.ccwdev->dev), | |
1590 | card->info.func_level, temp); | |
4a71df50 FB |
1591 | goto out; |
1592 | } | |
1593 | channel->state = CH_STATE_UP; | |
1594 | out: | |
1595 | qeth_release_buffer(channel, iob); | |
1596 | } | |
1597 | ||
1598 | static void qeth_idx_read_cb(struct qeth_channel *channel, | |
1599 | struct qeth_cmd_buffer *iob) | |
1600 | { | |
1601 | struct qeth_card *card; | |
1602 | __u16 temp; | |
1603 | ||
d11ba0c4 | 1604 | QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); |
4a71df50 FB |
1605 | if (channel->state == CH_STATE_DOWN) { |
1606 | channel->state = CH_STATE_ACTIVATING; | |
1607 | goto out; | |
1608 | } | |
1609 | ||
1610 | card = CARD_FROM_CDEV(channel->ccwdev); | |
1611 | if (qeth_check_idx_response(iob->data)) | |
1612 | goto out; | |
1613 | ||
1614 | if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { | |
1615 | if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19) | |
74eacdb9 FB |
1616 | dev_err(&card->write.ccwdev->dev, |
1617 | "The adapter is used exclusively by another " | |
1618 | "host\n"); | |
4a71df50 | 1619 | else |
74eacdb9 FB |
1620 | QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" |
1621 | " negative reply\n", | |
1622 | dev_name(&card->read.ccwdev->dev)); | |
4a71df50 FB |
1623 | goto out; |
1624 | } | |
1625 | ||
1626 | /** | |
1627 | * temporary fix for microcode bug | |
1628 | * to revert it,replace OR by AND | |
1629 | */ | |
1630 | if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || | |
1631 | (card->info.type == QETH_CARD_TYPE_OSAE)) | |
1632 | card->info.portname_required = 1; | |
1633 | ||
1634 | memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); | |
1635 | if (temp != qeth_peer_func_level(card->info.func_level)) { | |
74eacdb9 FB |
1636 | QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " |
1637 | "level mismatch (sent: 0x%x, received: 0x%x)\n", | |
1638 | dev_name(&card->read.ccwdev->dev), | |
1639 | card->info.func_level, temp); | |
4a71df50 FB |
1640 | goto out; |
1641 | } | |
1642 | memcpy(&card->token.issuer_rm_r, | |
1643 | QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), | |
1644 | QETH_MPC_TOKEN_LENGTH); | |
1645 | memcpy(&card->info.mcl_level[0], | |
1646 | QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); | |
1647 | channel->state = CH_STATE_UP; | |
1648 | out: | |
1649 | qeth_release_buffer(channel, iob); | |
1650 | } | |
1651 | ||
1652 | void qeth_prepare_control_data(struct qeth_card *card, int len, | |
1653 | struct qeth_cmd_buffer *iob) | |
1654 | { | |
1655 | qeth_setup_ccw(&card->write, iob->data, len); | |
1656 | iob->callback = qeth_release_buffer; | |
1657 | ||
1658 | memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), | |
1659 | &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); | |
1660 | card->seqno.trans_hdr++; | |
1661 | memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), | |
1662 | &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); | |
1663 | card->seqno.pdu_hdr++; | |
1664 | memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), | |
1665 | &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); | |
d11ba0c4 | 1666 | QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); |
4a71df50 FB |
1667 | } |
1668 | EXPORT_SYMBOL_GPL(qeth_prepare_control_data); | |
1669 | ||
1670 | int qeth_send_control_data(struct qeth_card *card, int len, | |
1671 | struct qeth_cmd_buffer *iob, | |
1672 | int (*reply_cb)(struct qeth_card *, struct qeth_reply *, | |
1673 | unsigned long), | |
1674 | void *reply_param) | |
1675 | { | |
1676 | int rc; | |
1677 | unsigned long flags; | |
1678 | struct qeth_reply *reply = NULL; | |
7834cd5a | 1679 | unsigned long timeout, event_timeout; |
5b54e16f | 1680 | struct qeth_ipa_cmd *cmd; |
4a71df50 | 1681 | |
d11ba0c4 | 1682 | QETH_DBF_TEXT(TRACE, 2, "sendctl"); |
4a71df50 FB |
1683 | |
1684 | reply = qeth_alloc_reply(card); | |
1685 | if (!reply) { | |
4a71df50 FB |
1686 | return -ENOMEM; |
1687 | } | |
1688 | reply->callback = reply_cb; | |
1689 | reply->param = reply_param; | |
1690 | if (card->state == CARD_STATE_DOWN) | |
1691 | reply->seqno = QETH_IDX_COMMAND_SEQNO; | |
1692 | else | |
1693 | reply->seqno = card->seqno.ipa++; | |
1694 | init_waitqueue_head(&reply->wait_q); | |
1695 | spin_lock_irqsave(&card->lock, flags); | |
1696 | list_add_tail(&reply->list, &card->cmd_waiter_list); | |
1697 | spin_unlock_irqrestore(&card->lock, flags); | |
d11ba0c4 | 1698 | QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); |
4a71df50 FB |
1699 | |
1700 | while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; | |
1701 | qeth_prepare_control_data(card, len, iob); | |
1702 | ||
1703 | if (IS_IPA(iob->data)) | |
7834cd5a | 1704 | event_timeout = QETH_IPA_TIMEOUT; |
4a71df50 | 1705 | else |
7834cd5a HC |
1706 | event_timeout = QETH_TIMEOUT; |
1707 | timeout = jiffies + event_timeout; | |
4a71df50 | 1708 | |
d11ba0c4 | 1709 | QETH_DBF_TEXT(TRACE, 6, "noirqpnd"); |
4a71df50 FB |
1710 | spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); |
1711 | rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, | |
1712 | (addr_t) iob, 0, 0); | |
1713 | spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); | |
1714 | if (rc) { | |
74eacdb9 FB |
1715 | QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " |
1716 | "ccw_device_start rc = %i\n", | |
1717 | dev_name(&card->write.ccwdev->dev), rc); | |
d11ba0c4 | 1718 | QETH_DBF_TEXT_(TRACE, 2, " err%d", rc); |
4a71df50 FB |
1719 | spin_lock_irqsave(&card->lock, flags); |
1720 | list_del_init(&reply->list); | |
1721 | qeth_put_reply(reply); | |
1722 | spin_unlock_irqrestore(&card->lock, flags); | |
1723 | qeth_release_buffer(iob->channel, iob); | |
1724 | atomic_set(&card->write.irq_pending, 0); | |
1725 | wake_up(&card->wait_q); | |
1726 | return rc; | |
1727 | } | |
5b54e16f FB |
1728 | |
1729 | /* we have only one long running ipassist, since we can ensure | |
1730 | process context of this command we can sleep */ | |
1731 | cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); | |
1732 | if ((cmd->hdr.command == IPA_CMD_SETIP) && | |
1733 | (cmd->hdr.prot_version == QETH_PROT_IPV4)) { | |
1734 | if (!wait_event_timeout(reply->wait_q, | |
7834cd5a | 1735 | atomic_read(&reply->received), event_timeout)) |
5b54e16f FB |
1736 | goto time_err; |
1737 | } else { | |
1738 | while (!atomic_read(&reply->received)) { | |
1739 | if (time_after(jiffies, timeout)) | |
1740 | goto time_err; | |
1741 | cpu_relax(); | |
1742 | }; | |
1743 | } | |
1744 | ||
1745 | rc = reply->rc; | |
1746 | qeth_put_reply(reply); | |
1747 | return rc; | |
1748 | ||
1749 | time_err: | |
1750 | spin_lock_irqsave(&reply->card->lock, flags); | |
1751 | list_del_init(&reply->list); | |
1752 | spin_unlock_irqrestore(&reply->card->lock, flags); | |
1753 | reply->rc = -ETIME; | |
1754 | atomic_inc(&reply->received); | |
1755 | wake_up(&reply->wait_q); | |
4a71df50 FB |
1756 | rc = reply->rc; |
1757 | qeth_put_reply(reply); | |
1758 | return rc; | |
1759 | } | |
1760 | EXPORT_SYMBOL_GPL(qeth_send_control_data); | |
1761 | ||
1762 | static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, | |
1763 | unsigned long data) | |
1764 | { | |
1765 | struct qeth_cmd_buffer *iob; | |
1766 | ||
d11ba0c4 | 1767 | QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); |
4a71df50 FB |
1768 | |
1769 | iob = (struct qeth_cmd_buffer *) data; | |
1770 | memcpy(&card->token.cm_filter_r, | |
1771 | QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), | |
1772 | QETH_MPC_TOKEN_LENGTH); | |
d11ba0c4 | 1773 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1774 | return 0; |
1775 | } | |
1776 | ||
1777 | static int qeth_cm_enable(struct qeth_card *card) | |
1778 | { | |
1779 | int rc; | |
1780 | struct qeth_cmd_buffer *iob; | |
1781 | ||
d11ba0c4 | 1782 | QETH_DBF_TEXT(SETUP, 2, "cmenable"); |
4a71df50 FB |
1783 | |
1784 | iob = qeth_wait_for_buffer(&card->write); | |
1785 | memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); | |
1786 | memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), | |
1787 | &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); | |
1788 | memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), | |
1789 | &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); | |
1790 | ||
1791 | rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, | |
1792 | qeth_cm_enable_cb, NULL); | |
1793 | return rc; | |
1794 | } | |
1795 | ||
1796 | static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, | |
1797 | unsigned long data) | |
1798 | { | |
1799 | ||
1800 | struct qeth_cmd_buffer *iob; | |
1801 | ||
d11ba0c4 | 1802 | QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); |
4a71df50 FB |
1803 | |
1804 | iob = (struct qeth_cmd_buffer *) data; | |
1805 | memcpy(&card->token.cm_connection_r, | |
1806 | QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), | |
1807 | QETH_MPC_TOKEN_LENGTH); | |
d11ba0c4 | 1808 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1809 | return 0; |
1810 | } | |
1811 | ||
1812 | static int qeth_cm_setup(struct qeth_card *card) | |
1813 | { | |
1814 | int rc; | |
1815 | struct qeth_cmd_buffer *iob; | |
1816 | ||
d11ba0c4 | 1817 | QETH_DBF_TEXT(SETUP, 2, "cmsetup"); |
4a71df50 FB |
1818 | |
1819 | iob = qeth_wait_for_buffer(&card->write); | |
1820 | memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); | |
1821 | memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), | |
1822 | &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); | |
1823 | memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), | |
1824 | &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); | |
1825 | memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), | |
1826 | &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); | |
1827 | rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, | |
1828 | qeth_cm_setup_cb, NULL); | |
1829 | return rc; | |
1830 | ||
1831 | } | |
1832 | ||
1833 | static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) | |
1834 | { | |
1835 | switch (card->info.type) { | |
1836 | case QETH_CARD_TYPE_UNKNOWN: | |
1837 | return 1500; | |
1838 | case QETH_CARD_TYPE_IQD: | |
1839 | return card->info.max_mtu; | |
1840 | case QETH_CARD_TYPE_OSAE: | |
1841 | switch (card->info.link_type) { | |
1842 | case QETH_LINK_TYPE_HSTR: | |
1843 | case QETH_LINK_TYPE_LANE_TR: | |
1844 | return 2000; | |
1845 | default: | |
1846 | return 1492; | |
1847 | } | |
1848 | default: | |
1849 | return 1500; | |
1850 | } | |
1851 | } | |
1852 | ||
1853 | static inline int qeth_get_max_mtu_for_card(int cardtype) | |
1854 | { | |
1855 | switch (cardtype) { | |
1856 | ||
1857 | case QETH_CARD_TYPE_UNKNOWN: | |
1858 | case QETH_CARD_TYPE_OSAE: | |
1859 | case QETH_CARD_TYPE_OSN: | |
1860 | return 61440; | |
1861 | case QETH_CARD_TYPE_IQD: | |
1862 | return 57344; | |
1863 | default: | |
1864 | return 1500; | |
1865 | } | |
1866 | } | |
1867 | ||
1868 | static inline int qeth_get_mtu_out_of_mpc(int cardtype) | |
1869 | { | |
1870 | switch (cardtype) { | |
1871 | case QETH_CARD_TYPE_IQD: | |
1872 | return 1; | |
1873 | default: | |
1874 | return 0; | |
1875 | } | |
1876 | } | |
1877 | ||
1878 | static inline int qeth_get_mtu_outof_framesize(int framesize) | |
1879 | { | |
1880 | switch (framesize) { | |
1881 | case 0x4000: | |
1882 | return 8192; | |
1883 | case 0x6000: | |
1884 | return 16384; | |
1885 | case 0xa000: | |
1886 | return 32768; | |
1887 | case 0xffff: | |
1888 | return 57344; | |
1889 | default: | |
1890 | return 0; | |
1891 | } | |
1892 | } | |
1893 | ||
1894 | static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) | |
1895 | { | |
1896 | switch (card->info.type) { | |
1897 | case QETH_CARD_TYPE_OSAE: | |
1898 | return ((mtu >= 576) && (mtu <= 61440)); | |
1899 | case QETH_CARD_TYPE_IQD: | |
1900 | return ((mtu >= 576) && | |
1901 | (mtu <= card->info.max_mtu + 4096 - 32)); | |
1902 | case QETH_CARD_TYPE_OSN: | |
1903 | case QETH_CARD_TYPE_UNKNOWN: | |
1904 | default: | |
1905 | return 1; | |
1906 | } | |
1907 | } | |
1908 | ||
1909 | static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, | |
1910 | unsigned long data) | |
1911 | { | |
1912 | ||
1913 | __u16 mtu, framesize; | |
1914 | __u16 len; | |
1915 | __u8 link_type; | |
1916 | struct qeth_cmd_buffer *iob; | |
1917 | ||
d11ba0c4 | 1918 | QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); |
4a71df50 FB |
1919 | |
1920 | iob = (struct qeth_cmd_buffer *) data; | |
1921 | memcpy(&card->token.ulp_filter_r, | |
1922 | QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), | |
1923 | QETH_MPC_TOKEN_LENGTH); | |
1924 | if (qeth_get_mtu_out_of_mpc(card->info.type)) { | |
1925 | memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); | |
1926 | mtu = qeth_get_mtu_outof_framesize(framesize); | |
1927 | if (!mtu) { | |
1928 | iob->rc = -EINVAL; | |
d11ba0c4 | 1929 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1930 | return 0; |
1931 | } | |
1932 | card->info.max_mtu = mtu; | |
1933 | card->info.initial_mtu = mtu; | |
1934 | card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; | |
1935 | } else { | |
1936 | card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); | |
1937 | card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type); | |
1938 | card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; | |
1939 | } | |
1940 | ||
1941 | memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); | |
1942 | if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { | |
1943 | memcpy(&link_type, | |
1944 | QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); | |
1945 | card->info.link_type = link_type; | |
1946 | } else | |
1947 | card->info.link_type = 0; | |
d11ba0c4 | 1948 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1949 | return 0; |
1950 | } | |
1951 | ||
1952 | static int qeth_ulp_enable(struct qeth_card *card) | |
1953 | { | |
1954 | int rc; | |
1955 | char prot_type; | |
1956 | struct qeth_cmd_buffer *iob; | |
1957 | ||
1958 | /*FIXME: trace view callbacks*/ | |
d11ba0c4 | 1959 | QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); |
4a71df50 FB |
1960 | |
1961 | iob = qeth_wait_for_buffer(&card->write); | |
1962 | memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); | |
1963 | ||
1964 | *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = | |
1965 | (__u8) card->info.portno; | |
1966 | if (card->options.layer2) | |
1967 | if (card->info.type == QETH_CARD_TYPE_OSN) | |
1968 | prot_type = QETH_PROT_OSN2; | |
1969 | else | |
1970 | prot_type = QETH_PROT_LAYER2; | |
1971 | else | |
1972 | prot_type = QETH_PROT_TCPIP; | |
1973 | ||
1974 | memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); | |
1975 | memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), | |
1976 | &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); | |
1977 | memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), | |
1978 | &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); | |
1979 | memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), | |
1980 | card->info.portname, 9); | |
1981 | rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, | |
1982 | qeth_ulp_enable_cb, NULL); | |
1983 | return rc; | |
1984 | ||
1985 | } | |
1986 | ||
1987 | static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, | |
1988 | unsigned long data) | |
1989 | { | |
1990 | struct qeth_cmd_buffer *iob; | |
1991 | ||
d11ba0c4 | 1992 | QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); |
4a71df50 FB |
1993 | |
1994 | iob = (struct qeth_cmd_buffer *) data; | |
1995 | memcpy(&card->token.ulp_connection_r, | |
1996 | QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), | |
1997 | QETH_MPC_TOKEN_LENGTH); | |
d11ba0c4 | 1998 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
4a71df50 FB |
1999 | return 0; |
2000 | } | |
2001 | ||
2002 | static int qeth_ulp_setup(struct qeth_card *card) | |
2003 | { | |
2004 | int rc; | |
2005 | __u16 temp; | |
2006 | struct qeth_cmd_buffer *iob; | |
2007 | struct ccw_dev_id dev_id; | |
2008 | ||
d11ba0c4 | 2009 | QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); |
4a71df50 FB |
2010 | |
2011 | iob = qeth_wait_for_buffer(&card->write); | |
2012 | memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); | |
2013 | ||
2014 | memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), | |
2015 | &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); | |
2016 | memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), | |
2017 | &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); | |
2018 | memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), | |
2019 | &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); | |
2020 | ||
2021 | ccw_device_get_id(CARD_DDEV(card), &dev_id); | |
2022 | memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); | |
2023 | temp = (card->info.cula << 8) + card->info.unit_addr2; | |
2024 | memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); | |
2025 | rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, | |
2026 | qeth_ulp_setup_cb, NULL); | |
2027 | return rc; | |
2028 | } | |
2029 | ||
2030 | static int qeth_alloc_qdio_buffers(struct qeth_card *card) | |
2031 | { | |
2032 | int i, j; | |
2033 | ||
d11ba0c4 | 2034 | QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); |
4a71df50 FB |
2035 | |
2036 | if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, | |
2037 | QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) | |
2038 | return 0; | |
2039 | ||
2040 | card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q), | |
508b3c4f | 2041 | GFP_KERNEL); |
4a71df50 FB |
2042 | if (!card->qdio.in_q) |
2043 | goto out_nomem; | |
d11ba0c4 PT |
2044 | QETH_DBF_TEXT(SETUP, 2, "inq"); |
2045 | QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); | |
4a71df50 FB |
2046 | memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); |
2047 | /* give inbound qeth_qdio_buffers their qdio_buffers */ | |
2048 | for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) | |
2049 | card->qdio.in_q->bufs[i].buffer = | |
2050 | &card->qdio.in_q->qdio_bufs[i]; | |
2051 | /* inbound buffer pool */ | |
2052 | if (qeth_alloc_buffer_pool(card)) | |
2053 | goto out_freeinq; | |
2054 | /* outbound */ | |
2055 | card->qdio.out_qs = | |
2056 | kmalloc(card->qdio.no_out_queues * | |
2057 | sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); | |
2058 | if (!card->qdio.out_qs) | |
2059 | goto out_freepool; | |
2060 | for (i = 0; i < card->qdio.no_out_queues; ++i) { | |
2061 | card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q), | |
508b3c4f | 2062 | GFP_KERNEL); |
4a71df50 FB |
2063 | if (!card->qdio.out_qs[i]) |
2064 | goto out_freeoutq; | |
d11ba0c4 PT |
2065 | QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); |
2066 | QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); | |
4a71df50 FB |
2067 | memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q)); |
2068 | card->qdio.out_qs[i]->queue_no = i; | |
2069 | /* give outbound qeth_qdio_buffers their qdio_buffers */ | |
2070 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { | |
2071 | card->qdio.out_qs[i]->bufs[j].buffer = | |
2072 | &card->qdio.out_qs[i]->qdio_bufs[j]; | |
2073 | skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j]. | |
2074 | skb_list); | |
2075 | lockdep_set_class( | |
2076 | &card->qdio.out_qs[i]->bufs[j].skb_list.lock, | |
2077 | &qdio_out_skb_queue_key); | |
2078 | INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list); | |
2079 | } | |
2080 | } | |
2081 | return 0; | |
2082 | ||
2083 | out_freeoutq: | |
2084 | while (i > 0) | |
2085 | kfree(card->qdio.out_qs[--i]); | |
2086 | kfree(card->qdio.out_qs); | |
2087 | card->qdio.out_qs = NULL; | |
2088 | out_freepool: | |
2089 | qeth_free_buffer_pool(card); | |
2090 | out_freeinq: | |
2091 | kfree(card->qdio.in_q); | |
2092 | card->qdio.in_q = NULL; | |
2093 | out_nomem: | |
2094 | atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); | |
2095 | return -ENOMEM; | |
2096 | } | |
2097 | ||
2098 | static void qeth_create_qib_param_field(struct qeth_card *card, | |
2099 | char *param_field) | |
2100 | { | |
2101 | ||
2102 | param_field[0] = _ascebc['P']; | |
2103 | param_field[1] = _ascebc['C']; | |
2104 | param_field[2] = _ascebc['I']; | |
2105 | param_field[3] = _ascebc['T']; | |
2106 | *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); | |
2107 | *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); | |
2108 | *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); | |
2109 | } | |
2110 | ||
2111 | static void qeth_create_qib_param_field_blkt(struct qeth_card *card, | |
2112 | char *param_field) | |
2113 | { | |
2114 | param_field[16] = _ascebc['B']; | |
2115 | param_field[17] = _ascebc['L']; | |
2116 | param_field[18] = _ascebc['K']; | |
2117 | param_field[19] = _ascebc['T']; | |
2118 | *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; | |
2119 | *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; | |
2120 | *((unsigned int *) (¶m_field[28])) = | |
2121 | card->info.blkt.inter_packet_jumbo; | |
2122 | } | |
2123 | ||
2124 | static int qeth_qdio_activate(struct qeth_card *card) | |
2125 | { | |
d11ba0c4 | 2126 | QETH_DBF_TEXT(SETUP, 3, "qdioact"); |
779e6e1c | 2127 | return qdio_activate(CARD_DDEV(card)); |
4a71df50 FB |
2128 | } |
2129 | ||
2130 | static int qeth_dm_act(struct qeth_card *card) | |
2131 | { | |
2132 | int rc; | |
2133 | struct qeth_cmd_buffer *iob; | |
2134 | ||
d11ba0c4 | 2135 | QETH_DBF_TEXT(SETUP, 2, "dmact"); |
4a71df50 FB |
2136 | |
2137 | iob = qeth_wait_for_buffer(&card->write); | |
2138 | memcpy(iob->data, DM_ACT, DM_ACT_SIZE); | |
2139 | ||
2140 | memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), | |
2141 | &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); | |
2142 | memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), | |
2143 | &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); | |
2144 | rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); | |
2145 | return rc; | |
2146 | } | |
2147 | ||
2148 | static int qeth_mpc_initialize(struct qeth_card *card) | |
2149 | { | |
2150 | int rc; | |
2151 | ||
d11ba0c4 | 2152 | QETH_DBF_TEXT(SETUP, 2, "mpcinit"); |
4a71df50 FB |
2153 | |
2154 | rc = qeth_issue_next_read(card); | |
2155 | if (rc) { | |
d11ba0c4 | 2156 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); |
4a71df50 FB |
2157 | return rc; |
2158 | } | |
2159 | rc = qeth_cm_enable(card); | |
2160 | if (rc) { | |
d11ba0c4 | 2161 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); |
4a71df50 FB |
2162 | goto out_qdio; |
2163 | } | |
2164 | rc = qeth_cm_setup(card); | |
2165 | if (rc) { | |
d11ba0c4 | 2166 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); |
4a71df50 FB |
2167 | goto out_qdio; |
2168 | } | |
2169 | rc = qeth_ulp_enable(card); | |
2170 | if (rc) { | |
d11ba0c4 | 2171 | QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); |
4a71df50 FB |
2172 | goto out_qdio; |
2173 | } | |
2174 | rc = qeth_ulp_setup(card); | |
2175 | if (rc) { | |
d11ba0c4 | 2176 | QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); |
4a71df50 FB |
2177 | goto out_qdio; |
2178 | } | |
2179 | rc = qeth_alloc_qdio_buffers(card); | |
2180 | if (rc) { | |
d11ba0c4 | 2181 | QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); |
4a71df50 FB |
2182 | goto out_qdio; |
2183 | } | |
2184 | rc = qeth_qdio_establish(card); | |
2185 | if (rc) { | |
d11ba0c4 | 2186 | QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); |
4a71df50 FB |
2187 | qeth_free_qdio_buffers(card); |
2188 | goto out_qdio; | |
2189 | } | |
2190 | rc = qeth_qdio_activate(card); | |
2191 | if (rc) { | |
d11ba0c4 | 2192 | QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); |
4a71df50 FB |
2193 | goto out_qdio; |
2194 | } | |
2195 | rc = qeth_dm_act(card); | |
2196 | if (rc) { | |
d11ba0c4 | 2197 | QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); |
4a71df50 FB |
2198 | goto out_qdio; |
2199 | } | |
2200 | ||
2201 | return 0; | |
2202 | out_qdio: | |
2203 | qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); | |
2204 | return rc; | |
2205 | } | |
2206 | ||
2207 | static void qeth_print_status_with_portname(struct qeth_card *card) | |
2208 | { | |
2209 | char dbf_text[15]; | |
2210 | int i; | |
2211 | ||
2212 | sprintf(dbf_text, "%s", card->info.portname + 1); | |
2213 | for (i = 0; i < 8; i++) | |
2214 | dbf_text[i] = | |
2215 | (char) _ebcasc[(__u8) dbf_text[i]]; | |
2216 | dbf_text[8] = 0; | |
74eacdb9 | 2217 | dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" |
4a71df50 | 2218 | "with link type %s (portname: %s)\n", |
4a71df50 FB |
2219 | qeth_get_cardname(card), |
2220 | (card->info.mcl_level[0]) ? " (level: " : "", | |
2221 | (card->info.mcl_level[0]) ? card->info.mcl_level : "", | |
2222 | (card->info.mcl_level[0]) ? ")" : "", | |
2223 | qeth_get_cardname_short(card), | |
2224 | dbf_text); | |
2225 | ||
2226 | } | |
2227 | ||
2228 | static void qeth_print_status_no_portname(struct qeth_card *card) | |
2229 | { | |
2230 | if (card->info.portname[0]) | |
74eacdb9 | 2231 | dev_info(&card->gdev->dev, "Device is a%s " |
4a71df50 FB |
2232 | "card%s%s%s\nwith link type %s " |
2233 | "(no portname needed by interface).\n", | |
4a71df50 FB |
2234 | qeth_get_cardname(card), |
2235 | (card->info.mcl_level[0]) ? " (level: " : "", | |
2236 | (card->info.mcl_level[0]) ? card->info.mcl_level : "", | |
2237 | (card->info.mcl_level[0]) ? ")" : "", | |
2238 | qeth_get_cardname_short(card)); | |
2239 | else | |
74eacdb9 | 2240 | dev_info(&card->gdev->dev, "Device is a%s " |
4a71df50 | 2241 | "card%s%s%s\nwith link type %s.\n", |
4a71df50 FB |
2242 | qeth_get_cardname(card), |
2243 | (card->info.mcl_level[0]) ? " (level: " : "", | |
2244 | (card->info.mcl_level[0]) ? card->info.mcl_level : "", | |
2245 | (card->info.mcl_level[0]) ? ")" : "", | |
2246 | qeth_get_cardname_short(card)); | |
2247 | } | |
2248 | ||
2249 | void qeth_print_status_message(struct qeth_card *card) | |
2250 | { | |
2251 | switch (card->info.type) { | |
2252 | case QETH_CARD_TYPE_OSAE: | |
2253 | /* VM will use a non-zero first character | |
2254 | * to indicate a HiperSockets like reporting | |
2255 | * of the level OSA sets the first character to zero | |
2256 | * */ | |
2257 | if (!card->info.mcl_level[0]) { | |
2258 | sprintf(card->info.mcl_level, "%02x%02x", | |
2259 | card->info.mcl_level[2], | |
2260 | card->info.mcl_level[3]); | |
2261 | ||
2262 | card->info.mcl_level[QETH_MCL_LENGTH] = 0; | |
2263 | break; | |
2264 | } | |
2265 | /* fallthrough */ | |
2266 | case QETH_CARD_TYPE_IQD: | |
906f1f07 KDW |
2267 | if ((card->info.guestlan) || |
2268 | (card->info.mcl_level[0] & 0x80)) { | |
4a71df50 FB |
2269 | card->info.mcl_level[0] = (char) _ebcasc[(__u8) |
2270 | card->info.mcl_level[0]]; | |
2271 | card->info.mcl_level[1] = (char) _ebcasc[(__u8) | |
2272 | card->info.mcl_level[1]]; | |
2273 | card->info.mcl_level[2] = (char) _ebcasc[(__u8) | |
2274 | card->info.mcl_level[2]]; | |
2275 | card->info.mcl_level[3] = (char) _ebcasc[(__u8) | |
2276 | card->info.mcl_level[3]]; | |
2277 | card->info.mcl_level[QETH_MCL_LENGTH] = 0; | |
2278 | } | |
2279 | break; | |
2280 | default: | |
2281 | memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); | |
2282 | } | |
2283 | if (card->info.portname_required) | |
2284 | qeth_print_status_with_portname(card); | |
2285 | else | |
2286 | qeth_print_status_no_portname(card); | |
2287 | } | |
2288 | EXPORT_SYMBOL_GPL(qeth_print_status_message); | |
2289 | ||
4a71df50 FB |
2290 | static void qeth_initialize_working_pool_list(struct qeth_card *card) |
2291 | { | |
2292 | struct qeth_buffer_pool_entry *entry; | |
2293 | ||
d11ba0c4 | 2294 | QETH_DBF_TEXT(TRACE, 5, "inwrklst"); |
4a71df50 FB |
2295 | |
2296 | list_for_each_entry(entry, | |
2297 | &card->qdio.init_pool.entry_list, init_list) { | |
2298 | qeth_put_buffer_pool_entry(card, entry); | |
2299 | } | |
2300 | } | |
2301 | ||
2302 | static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( | |
2303 | struct qeth_card *card) | |
2304 | { | |
2305 | struct list_head *plh; | |
2306 | struct qeth_buffer_pool_entry *entry; | |
2307 | int i, free; | |
2308 | struct page *page; | |
2309 | ||
2310 | if (list_empty(&card->qdio.in_buf_pool.entry_list)) | |
2311 | return NULL; | |
2312 | ||
2313 | list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { | |
2314 | entry = list_entry(plh, struct qeth_buffer_pool_entry, list); | |
2315 | free = 1; | |
2316 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { | |
2317 | if (page_count(virt_to_page(entry->elements[i])) > 1) { | |
2318 | free = 0; | |
2319 | break; | |
2320 | } | |
2321 | } | |
2322 | if (free) { | |
2323 | list_del_init(&entry->list); | |
2324 | return entry; | |
2325 | } | |
2326 | } | |
2327 | ||
2328 | /* no free buffer in pool so take first one and swap pages */ | |
2329 | entry = list_entry(card->qdio.in_buf_pool.entry_list.next, | |
2330 | struct qeth_buffer_pool_entry, list); | |
2331 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { | |
2332 | if (page_count(virt_to_page(entry->elements[i])) > 1) { | |
508b3c4f | 2333 | page = alloc_page(GFP_ATOMIC); |
4a71df50 FB |
2334 | if (!page) { |
2335 | return NULL; | |
2336 | } else { | |
2337 | free_page((unsigned long)entry->elements[i]); | |
2338 | entry->elements[i] = page_address(page); | |
2339 | if (card->options.performance_stats) | |
2340 | card->perf_stats.sg_alloc_page_rx++; | |
2341 | } | |
2342 | } | |
2343 | } | |
2344 | list_del_init(&entry->list); | |
2345 | return entry; | |
2346 | } | |
2347 | ||
2348 | static int qeth_init_input_buffer(struct qeth_card *card, | |
2349 | struct qeth_qdio_buffer *buf) | |
2350 | { | |
2351 | struct qeth_buffer_pool_entry *pool_entry; | |
2352 | int i; | |
2353 | ||
2354 | pool_entry = qeth_find_free_buffer_pool_entry(card); | |
2355 | if (!pool_entry) | |
2356 | return 1; | |
2357 | ||
2358 | /* | |
2359 | * since the buffer is accessed only from the input_tasklet | |
2360 | * there shouldn't be a need to synchronize; also, since we use | |
2361 | * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off | |
2362 | * buffers | |
2363 | */ | |
4a71df50 FB |
2364 | |
2365 | buf->pool_entry = pool_entry; | |
2366 | for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { | |
2367 | buf->buffer->element[i].length = PAGE_SIZE; | |
2368 | buf->buffer->element[i].addr = pool_entry->elements[i]; | |
2369 | if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) | |
2370 | buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY; | |
2371 | else | |
2372 | buf->buffer->element[i].flags = 0; | |
2373 | } | |
2374 | return 0; | |
2375 | } | |
2376 | ||
2377 | int qeth_init_qdio_queues(struct qeth_card *card) | |
2378 | { | |
2379 | int i, j; | |
2380 | int rc; | |
2381 | ||
d11ba0c4 | 2382 | QETH_DBF_TEXT(SETUP, 2, "initqdqs"); |
4a71df50 FB |
2383 | |
2384 | /* inbound queue */ | |
2385 | memset(card->qdio.in_q->qdio_bufs, 0, | |
2386 | QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); | |
2387 | qeth_initialize_working_pool_list(card); | |
2388 | /*give only as many buffers to hardware as we have buffer pool entries*/ | |
2389 | for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) | |
2390 | qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); | |
2391 | card->qdio.in_q->next_buf_to_init = | |
2392 | card->qdio.in_buf_pool.buf_count - 1; | |
2393 | rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, | |
779e6e1c | 2394 | card->qdio.in_buf_pool.buf_count - 1); |
4a71df50 | 2395 | if (rc) { |
d11ba0c4 | 2396 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); |
4a71df50 FB |
2397 | return rc; |
2398 | } | |
4a71df50 FB |
2399 | /* outbound queue */ |
2400 | for (i = 0; i < card->qdio.no_out_queues; ++i) { | |
2401 | memset(card->qdio.out_qs[i]->qdio_bufs, 0, | |
2402 | QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); | |
2403 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { | |
2404 | qeth_clear_output_buffer(card->qdio.out_qs[i], | |
2405 | &card->qdio.out_qs[i]->bufs[j]); | |
2406 | } | |
2407 | card->qdio.out_qs[i]->card = card; | |
2408 | card->qdio.out_qs[i]->next_buf_to_fill = 0; | |
2409 | card->qdio.out_qs[i]->do_pack = 0; | |
2410 | atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); | |
2411 | atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); | |
2412 | atomic_set(&card->qdio.out_qs[i]->state, | |
2413 | QETH_OUT_Q_UNLOCKED); | |
2414 | } | |
2415 | return 0; | |
2416 | } | |
2417 | EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); | |
2418 | ||
2419 | static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) | |
2420 | { | |
2421 | switch (link_type) { | |
2422 | case QETH_LINK_TYPE_HSTR: | |
2423 | return 2; | |
2424 | default: | |
2425 | return 1; | |
2426 | } | |
2427 | } | |
2428 | ||
2429 | static void qeth_fill_ipacmd_header(struct qeth_card *card, | |
2430 | struct qeth_ipa_cmd *cmd, __u8 command, | |
2431 | enum qeth_prot_versions prot) | |
2432 | { | |
2433 | memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); | |
2434 | cmd->hdr.command = command; | |
2435 | cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; | |
2436 | cmd->hdr.seqno = card->seqno.ipa; | |
2437 | cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); | |
2438 | cmd->hdr.rel_adapter_no = (__u8) card->info.portno; | |
2439 | if (card->options.layer2) | |
2440 | cmd->hdr.prim_version_no = 2; | |
2441 | else | |
2442 | cmd->hdr.prim_version_no = 1; | |
2443 | cmd->hdr.param_count = 1; | |
2444 | cmd->hdr.prot_version = prot; | |
2445 | cmd->hdr.ipa_supported = 0; | |
2446 | cmd->hdr.ipa_enabled = 0; | |
2447 | } | |
2448 | ||
2449 | struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, | |
2450 | enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) | |
2451 | { | |
2452 | struct qeth_cmd_buffer *iob; | |
2453 | struct qeth_ipa_cmd *cmd; | |
2454 | ||
2455 | iob = qeth_wait_for_buffer(&card->write); | |
2456 | cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); | |
2457 | qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); | |
2458 | ||
2459 | return iob; | |
2460 | } | |
2461 | EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); | |
2462 | ||
2463 | void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, | |
2464 | char prot_type) | |
2465 | { | |
2466 | memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); | |
2467 | memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); | |
2468 | memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), | |
2469 | &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); | |
2470 | } | |
2471 | EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); | |
2472 | ||
2473 | int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, | |
2474 | int (*reply_cb)(struct qeth_card *, struct qeth_reply*, | |
2475 | unsigned long), | |
2476 | void *reply_param) | |
2477 | { | |
2478 | int rc; | |
2479 | char prot_type; | |
4a71df50 | 2480 | |
d11ba0c4 | 2481 | QETH_DBF_TEXT(TRACE, 4, "sendipa"); |
4a71df50 FB |
2482 | |
2483 | if (card->options.layer2) | |
2484 | if (card->info.type == QETH_CARD_TYPE_OSN) | |
2485 | prot_type = QETH_PROT_OSN2; | |
2486 | else | |
2487 | prot_type = QETH_PROT_LAYER2; | |
2488 | else | |
2489 | prot_type = QETH_PROT_TCPIP; | |
2490 | qeth_prepare_ipa_cmd(card, iob, prot_type); | |
d11ba0c4 PT |
2491 | rc = qeth_send_control_data(card, IPA_CMD_LENGTH, |
2492 | iob, reply_cb, reply_param); | |
4a71df50 FB |
2493 | return rc; |
2494 | } | |
2495 | EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); | |
2496 | ||
2497 | static int qeth_send_startstoplan(struct qeth_card *card, | |
2498 | enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) | |
2499 | { | |
2500 | int rc; | |
2501 | struct qeth_cmd_buffer *iob; | |
2502 | ||
2503 | iob = qeth_get_ipacmd_buffer(card, ipacmd, prot); | |
2504 | rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); | |
2505 | ||
2506 | return rc; | |
2507 | } | |
2508 | ||
2509 | int qeth_send_startlan(struct qeth_card *card) | |
2510 | { | |
2511 | int rc; | |
2512 | ||
d11ba0c4 | 2513 | QETH_DBF_TEXT(SETUP, 2, "strtlan"); |
4a71df50 FB |
2514 | |
2515 | rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0); | |
2516 | return rc; | |
2517 | } | |
2518 | EXPORT_SYMBOL_GPL(qeth_send_startlan); | |
2519 | ||
2520 | int qeth_send_stoplan(struct qeth_card *card) | |
2521 | { | |
2522 | int rc = 0; | |
2523 | ||
2524 | /* | |
2525 | * TODO: according to the IPA format document page 14, | |
2526 | * TCP/IP (we!) never issue a STOPLAN | |
2527 | * is this right ?!? | |
2528 | */ | |
d11ba0c4 | 2529 | QETH_DBF_TEXT(SETUP, 2, "stoplan"); |
4a71df50 FB |
2530 | |
2531 | rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0); | |
2532 | return rc; | |
2533 | } | |
2534 | EXPORT_SYMBOL_GPL(qeth_send_stoplan); | |
2535 | ||
2536 | int qeth_default_setadapterparms_cb(struct qeth_card *card, | |
2537 | struct qeth_reply *reply, unsigned long data) | |
2538 | { | |
2539 | struct qeth_ipa_cmd *cmd; | |
2540 | ||
d11ba0c4 | 2541 | QETH_DBF_TEXT(TRACE, 4, "defadpcb"); |
4a71df50 FB |
2542 | |
2543 | cmd = (struct qeth_ipa_cmd *) data; | |
2544 | if (cmd->hdr.return_code == 0) | |
2545 | cmd->hdr.return_code = | |
2546 | cmd->data.setadapterparms.hdr.return_code; | |
2547 | return 0; | |
2548 | } | |
2549 | EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); | |
2550 | ||
2551 | static int qeth_query_setadapterparms_cb(struct qeth_card *card, | |
2552 | struct qeth_reply *reply, unsigned long data) | |
2553 | { | |
2554 | struct qeth_ipa_cmd *cmd; | |
2555 | ||
d11ba0c4 | 2556 | QETH_DBF_TEXT(TRACE, 3, "quyadpcb"); |
4a71df50 FB |
2557 | |
2558 | cmd = (struct qeth_ipa_cmd *) data; | |
2559 | if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) | |
2560 | card->info.link_type = | |
2561 | cmd->data.setadapterparms.data.query_cmds_supp.lan_type; | |
2562 | card->options.adp.supported_funcs = | |
2563 | cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; | |
2564 | return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); | |
2565 | } | |
2566 | ||
2567 | struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, | |
2568 | __u32 command, __u32 cmdlen) | |
2569 | { | |
2570 | struct qeth_cmd_buffer *iob; | |
2571 | struct qeth_ipa_cmd *cmd; | |
2572 | ||
2573 | iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, | |
2574 | QETH_PROT_IPV4); | |
2575 | cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); | |
2576 | cmd->data.setadapterparms.hdr.cmdlength = cmdlen; | |
2577 | cmd->data.setadapterparms.hdr.command_code = command; | |
2578 | cmd->data.setadapterparms.hdr.used_total = 1; | |
2579 | cmd->data.setadapterparms.hdr.seq_no = 1; | |
2580 | ||
2581 | return iob; | |
2582 | } | |
2583 | EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); | |
2584 | ||
2585 | int qeth_query_setadapterparms(struct qeth_card *card) | |
2586 | { | |
2587 | int rc; | |
2588 | struct qeth_cmd_buffer *iob; | |
2589 | ||
d11ba0c4 | 2590 | QETH_DBF_TEXT(TRACE, 3, "queryadp"); |
4a71df50 FB |
2591 | iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, |
2592 | sizeof(struct qeth_ipacmd_setadpparms)); | |
2593 | rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); | |
2594 | return rc; | |
2595 | } | |
2596 | EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); | |
2597 | ||
2598 | int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error, | |
779e6e1c | 2599 | const char *dbftext) |
4a71df50 | 2600 | { |
779e6e1c | 2601 | if (qdio_error) { |
d11ba0c4 PT |
2602 | QETH_DBF_TEXT(TRACE, 2, dbftext); |
2603 | QETH_DBF_TEXT(QERR, 2, dbftext); | |
2604 | QETH_DBF_TEXT_(QERR, 2, " F15=%02X", | |
4a71df50 | 2605 | buf->element[15].flags & 0xff); |
d11ba0c4 | 2606 | QETH_DBF_TEXT_(QERR, 2, " F14=%02X", |
4a71df50 | 2607 | buf->element[14].flags & 0xff); |
d11ba0c4 | 2608 | QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error); |
4a71df50 FB |
2609 | return 1; |
2610 | } | |
2611 | return 0; | |
2612 | } | |
2613 | EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); | |
2614 | ||
2615 | void qeth_queue_input_buffer(struct qeth_card *card, int index) | |
2616 | { | |
2617 | struct qeth_qdio_q *queue = card->qdio.in_q; | |
2618 | int count; | |
2619 | int i; | |
2620 | int rc; | |
2621 | int newcount = 0; | |
2622 | ||
4a71df50 FB |
2623 | count = (index < queue->next_buf_to_init)? |
2624 | card->qdio.in_buf_pool.buf_count - | |
2625 | (queue->next_buf_to_init - index) : | |
2626 | card->qdio.in_buf_pool.buf_count - | |
2627 | (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); | |
2628 | /* only requeue at a certain threshold to avoid SIGAs */ | |
2629 | if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { | |
2630 | for (i = queue->next_buf_to_init; | |
2631 | i < queue->next_buf_to_init + count; ++i) { | |
2632 | if (qeth_init_input_buffer(card, | |
2633 | &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { | |
2634 | break; | |
2635 | } else { | |
2636 | newcount++; | |
2637 | } | |
2638 | } | |
2639 | ||
2640 | if (newcount < count) { | |
2641 | /* we are in memory shortage so we switch back to | |
2642 | traditional skb allocation and drop packages */ | |
4a71df50 FB |
2643 | atomic_set(&card->force_alloc_skb, 3); |
2644 | count = newcount; | |
2645 | } else { | |
4a71df50 FB |
2646 | atomic_add_unless(&card->force_alloc_skb, -1, 0); |
2647 | } | |
2648 | ||
2649 | /* | |
2650 | * according to old code it should be avoided to requeue all | |
2651 | * 128 buffers in order to benefit from PCI avoidance. | |
2652 | * this function keeps at least one buffer (the buffer at | |
2653 | * 'index') un-requeued -> this buffer is the first buffer that | |
2654 | * will be requeued the next time | |
2655 | */ | |
2656 | if (card->options.performance_stats) { | |
2657 | card->perf_stats.inbound_do_qdio_cnt++; | |
2658 | card->perf_stats.inbound_do_qdio_start_time = | |
2659 | qeth_get_micros(); | |
2660 | } | |
779e6e1c JG |
2661 | rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, |
2662 | queue->next_buf_to_init, count); | |
4a71df50 FB |
2663 | if (card->options.performance_stats) |
2664 | card->perf_stats.inbound_do_qdio_time += | |
2665 | qeth_get_micros() - | |
2666 | card->perf_stats.inbound_do_qdio_start_time; | |
2667 | if (rc) { | |
74eacdb9 FB |
2668 | dev_warn(&card->gdev->dev, |
2669 | "QDIO reported an error, rc=%i\n", rc); | |
d11ba0c4 PT |
2670 | QETH_DBF_TEXT(TRACE, 2, "qinberr"); |
2671 | QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
2672 | } |
2673 | queue->next_buf_to_init = (queue->next_buf_to_init + count) % | |
2674 | QDIO_MAX_BUFFERS_PER_Q; | |
2675 | } | |
2676 | } | |
2677 | EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); | |
2678 | ||
2679 | static int qeth_handle_send_error(struct qeth_card *card, | |
779e6e1c | 2680 | struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) |
4a71df50 FB |
2681 | { |
2682 | int sbalf15 = buffer->buffer->element[15].flags & 0xff; | |
779e6e1c | 2683 | int cc = qdio_err & 3; |
4a71df50 | 2684 | |
d11ba0c4 | 2685 | QETH_DBF_TEXT(TRACE, 6, "hdsnderr"); |
779e6e1c | 2686 | qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr"); |
4a71df50 FB |
2687 | switch (cc) { |
2688 | case 0: | |
2689 | if (qdio_err) { | |
d11ba0c4 PT |
2690 | QETH_DBF_TEXT(TRACE, 1, "lnkfail"); |
2691 | QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); | |
2692 | QETH_DBF_TEXT_(TRACE, 1, "%04x %02x", | |
4a71df50 FB |
2693 | (u16)qdio_err, (u8)sbalf15); |
2694 | return QETH_SEND_ERROR_LINK_FAILURE; | |
2695 | } | |
2696 | return QETH_SEND_ERROR_NONE; | |
2697 | case 2: | |
779e6e1c | 2698 | if (qdio_err & QDIO_ERROR_SIGA_BUSY) { |
d11ba0c4 PT |
2699 | QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B"); |
2700 | QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
2701 | return QETH_SEND_ERROR_KICK_IT; |
2702 | } | |
2703 | if ((sbalf15 >= 15) && (sbalf15 <= 31)) | |
2704 | return QETH_SEND_ERROR_RETRY; | |
2705 | return QETH_SEND_ERROR_LINK_FAILURE; | |
2706 | /* look at qdio_error and sbalf 15 */ | |
2707 | case 1: | |
d11ba0c4 PT |
2708 | QETH_DBF_TEXT(TRACE, 1, "SIGAcc1"); |
2709 | QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
2710 | return QETH_SEND_ERROR_LINK_FAILURE; |
2711 | case 3: | |
2712 | default: | |
d11ba0c4 PT |
2713 | QETH_DBF_TEXT(TRACE, 1, "SIGAcc3"); |
2714 | QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
2715 | return QETH_SEND_ERROR_KICK_IT; |
2716 | } | |
2717 | } | |
2718 | ||
2719 | /* | |
2720 | * Switched to packing state if the number of used buffers on a queue | |
2721 | * reaches a certain limit. | |
2722 | */ | |
2723 | static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) | |
2724 | { | |
2725 | if (!queue->do_pack) { | |
2726 | if (atomic_read(&queue->used_buffers) | |
2727 | >= QETH_HIGH_WATERMARK_PACK){ | |
2728 | /* switch non-PACKING -> PACKING */ | |
d11ba0c4 | 2729 | QETH_DBF_TEXT(TRACE, 6, "np->pack"); |
4a71df50 FB |
2730 | if (queue->card->options.performance_stats) |
2731 | queue->card->perf_stats.sc_dp_p++; | |
2732 | queue->do_pack = 1; | |
2733 | } | |
2734 | } | |
2735 | } | |
2736 | ||
2737 | /* | |
2738 | * Switches from packing to non-packing mode. If there is a packing | |
2739 | * buffer on the queue this buffer will be prepared to be flushed. | |
2740 | * In that case 1 is returned to inform the caller. If no buffer | |
2741 | * has to be flushed, zero is returned. | |
2742 | */ | |
2743 | static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) | |
2744 | { | |
2745 | struct qeth_qdio_out_buffer *buffer; | |
2746 | int flush_count = 0; | |
2747 | ||
2748 | if (queue->do_pack) { | |
2749 | if (atomic_read(&queue->used_buffers) | |
2750 | <= QETH_LOW_WATERMARK_PACK) { | |
2751 | /* switch PACKING -> non-PACKING */ | |
d11ba0c4 | 2752 | QETH_DBF_TEXT(TRACE, 6, "pack->np"); |
4a71df50 FB |
2753 | if (queue->card->options.performance_stats) |
2754 | queue->card->perf_stats.sc_p_dp++; | |
2755 | queue->do_pack = 0; | |
2756 | /* flush packing buffers */ | |
2757 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
2758 | if ((atomic_read(&buffer->state) == | |
2759 | QETH_QDIO_BUF_EMPTY) && | |
2760 | (buffer->next_element_to_fill > 0)) { | |
2761 | atomic_set(&buffer->state, | |
2762 | QETH_QDIO_BUF_PRIMED); | |
2763 | flush_count++; | |
2764 | queue->next_buf_to_fill = | |
2765 | (queue->next_buf_to_fill + 1) % | |
2766 | QDIO_MAX_BUFFERS_PER_Q; | |
2767 | } | |
2768 | } | |
2769 | } | |
2770 | return flush_count; | |
2771 | } | |
2772 | ||
2773 | /* | |
2774 | * Called to flush a packing buffer if no more pci flags are on the queue. | |
2775 | * Checks if there is a packing buffer and prepares it to be flushed. | |
2776 | * In that case returns 1, otherwise zero. | |
2777 | */ | |
2778 | static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) | |
2779 | { | |
2780 | struct qeth_qdio_out_buffer *buffer; | |
2781 | ||
2782 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
2783 | if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && | |
2784 | (buffer->next_element_to_fill > 0)) { | |
2785 | /* it's a packing buffer */ | |
2786 | atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); | |
2787 | queue->next_buf_to_fill = | |
2788 | (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; | |
2789 | return 1; | |
2790 | } | |
2791 | return 0; | |
2792 | } | |
2793 | ||
779e6e1c JG |
2794 | static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, |
2795 | int count) | |
4a71df50 FB |
2796 | { |
2797 | struct qeth_qdio_out_buffer *buf; | |
2798 | int rc; | |
2799 | int i; | |
2800 | unsigned int qdio_flags; | |
2801 | ||
4a71df50 FB |
2802 | for (i = index; i < index + count; ++i) { |
2803 | buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; | |
2804 | buf->buffer->element[buf->next_element_to_fill - 1].flags |= | |
2805 | SBAL_FLAGS_LAST_ENTRY; | |
2806 | ||
2807 | if (queue->card->info.type == QETH_CARD_TYPE_IQD) | |
2808 | continue; | |
2809 | ||
2810 | if (!queue->do_pack) { | |
2811 | if ((atomic_read(&queue->used_buffers) >= | |
2812 | (QETH_HIGH_WATERMARK_PACK - | |
2813 | QETH_WATERMARK_PACK_FUZZ)) && | |
2814 | !atomic_read(&queue->set_pci_flags_count)) { | |
2815 | /* it's likely that we'll go to packing | |
2816 | * mode soon */ | |
2817 | atomic_inc(&queue->set_pci_flags_count); | |
2818 | buf->buffer->element[0].flags |= 0x40; | |
2819 | } | |
2820 | } else { | |
2821 | if (!atomic_read(&queue->set_pci_flags_count)) { | |
2822 | /* | |
2823 | * there's no outstanding PCI any more, so we | |
2824 | * have to request a PCI to be sure the the PCI | |
2825 | * will wake at some time in the future then we | |
2826 | * can flush packed buffers that might still be | |
2827 | * hanging around, which can happen if no | |
2828 | * further send was requested by the stack | |
2829 | */ | |
2830 | atomic_inc(&queue->set_pci_flags_count); | |
2831 | buf->buffer->element[0].flags |= 0x40; | |
2832 | } | |
2833 | } | |
2834 | } | |
2835 | ||
2836 | queue->card->dev->trans_start = jiffies; | |
2837 | if (queue->card->options.performance_stats) { | |
2838 | queue->card->perf_stats.outbound_do_qdio_cnt++; | |
2839 | queue->card->perf_stats.outbound_do_qdio_start_time = | |
2840 | qeth_get_micros(); | |
2841 | } | |
2842 | qdio_flags = QDIO_FLAG_SYNC_OUTPUT; | |
4a71df50 FB |
2843 | if (atomic_read(&queue->set_pci_flags_count)) |
2844 | qdio_flags |= QDIO_FLAG_PCI_OUT; | |
2845 | rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, | |
779e6e1c | 2846 | queue->queue_no, index, count); |
4a71df50 FB |
2847 | if (queue->card->options.performance_stats) |
2848 | queue->card->perf_stats.outbound_do_qdio_time += | |
2849 | qeth_get_micros() - | |
2850 | queue->card->perf_stats.outbound_do_qdio_start_time; | |
2851 | if (rc) { | |
d11ba0c4 PT |
2852 | QETH_DBF_TEXT(TRACE, 2, "flushbuf"); |
2853 | QETH_DBF_TEXT_(TRACE, 2, " err%d", rc); | |
2854 | QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card)); | |
4a71df50 FB |
2855 | queue->card->stats.tx_errors += count; |
2856 | /* this must not happen under normal circumstances. if it | |
2857 | * happens something is really wrong -> recover */ | |
2858 | qeth_schedule_recovery(queue->card); | |
2859 | return; | |
2860 | } | |
2861 | atomic_add(count, &queue->used_buffers); | |
2862 | if (queue->card->options.performance_stats) | |
2863 | queue->card->perf_stats.bufs_sent += count; | |
2864 | } | |
2865 | ||
2866 | static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) | |
2867 | { | |
2868 | int index; | |
2869 | int flush_cnt = 0; | |
2870 | int q_was_packing = 0; | |
2871 | ||
2872 | /* | |
2873 | * check if weed have to switch to non-packing mode or if | |
2874 | * we have to get a pci flag out on the queue | |
2875 | */ | |
2876 | if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || | |
2877 | !atomic_read(&queue->set_pci_flags_count)) { | |
2878 | if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == | |
2879 | QETH_OUT_Q_UNLOCKED) { | |
2880 | /* | |
2881 | * If we get in here, there was no action in | |
2882 | * do_send_packet. So, we check if there is a | |
2883 | * packing buffer to be flushed here. | |
2884 | */ | |
2885 | netif_stop_queue(queue->card->dev); | |
2886 | index = queue->next_buf_to_fill; | |
2887 | q_was_packing = queue->do_pack; | |
2888 | /* queue->do_pack may change */ | |
2889 | barrier(); | |
2890 | flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); | |
2891 | if (!flush_cnt && | |
2892 | !atomic_read(&queue->set_pci_flags_count)) | |
2893 | flush_cnt += | |
2894 | qeth_flush_buffers_on_no_pci(queue); | |
2895 | if (queue->card->options.performance_stats && | |
2896 | q_was_packing) | |
2897 | queue->card->perf_stats.bufs_sent_pack += | |
2898 | flush_cnt; | |
2899 | if (flush_cnt) | |
779e6e1c | 2900 | qeth_flush_buffers(queue, index, flush_cnt); |
4a71df50 FB |
2901 | atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); |
2902 | } | |
2903 | } | |
2904 | } | |
2905 | ||
779e6e1c JG |
2906 | void qeth_qdio_output_handler(struct ccw_device *ccwdev, |
2907 | unsigned int qdio_error, int __queue, int first_element, | |
2908 | int count, unsigned long card_ptr) | |
4a71df50 FB |
2909 | { |
2910 | struct qeth_card *card = (struct qeth_card *) card_ptr; | |
2911 | struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; | |
2912 | struct qeth_qdio_out_buffer *buffer; | |
2913 | int i; | |
2914 | ||
d11ba0c4 | 2915 | QETH_DBF_TEXT(TRACE, 6, "qdouhdl"); |
779e6e1c JG |
2916 | if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { |
2917 | QETH_DBF_TEXT(TRACE, 2, "achkcond"); | |
2918 | QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); | |
2919 | netif_stop_queue(card->dev); | |
2920 | qeth_schedule_recovery(card); | |
2921 | return; | |
4a71df50 FB |
2922 | } |
2923 | if (card->options.performance_stats) { | |
2924 | card->perf_stats.outbound_handler_cnt++; | |
2925 | card->perf_stats.outbound_handler_start_time = | |
2926 | qeth_get_micros(); | |
2927 | } | |
2928 | for (i = first_element; i < (first_element + count); ++i) { | |
2929 | buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; | |
2930 | /*we only handle the KICK_IT error by doing a recovery */ | |
779e6e1c | 2931 | if (qeth_handle_send_error(card, buffer, qdio_error) |
4a71df50 FB |
2932 | == QETH_SEND_ERROR_KICK_IT){ |
2933 | netif_stop_queue(card->dev); | |
2934 | qeth_schedule_recovery(card); | |
2935 | return; | |
2936 | } | |
2937 | qeth_clear_output_buffer(queue, buffer); | |
2938 | } | |
2939 | atomic_sub(count, &queue->used_buffers); | |
2940 | /* check if we need to do something on this outbound queue */ | |
2941 | if (card->info.type != QETH_CARD_TYPE_IQD) | |
2942 | qeth_check_outbound_queue(queue); | |
2943 | ||
2944 | netif_wake_queue(queue->card->dev); | |
2945 | if (card->options.performance_stats) | |
2946 | card->perf_stats.outbound_handler_time += qeth_get_micros() - | |
2947 | card->perf_stats.outbound_handler_start_time; | |
2948 | } | |
2949 | EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); | |
2950 | ||
2951 | int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb) | |
2952 | { | |
2953 | int cast_type = RTN_UNSPEC; | |
2954 | ||
2955 | if (card->info.type == QETH_CARD_TYPE_OSN) | |
2956 | return cast_type; | |
2957 | ||
2958 | if (skb->dst && skb->dst->neighbour) { | |
2959 | cast_type = skb->dst->neighbour->type; | |
2960 | if ((cast_type == RTN_BROADCAST) || | |
2961 | (cast_type == RTN_MULTICAST) || | |
2962 | (cast_type == RTN_ANYCAST)) | |
2963 | return cast_type; | |
2964 | else | |
2965 | return RTN_UNSPEC; | |
2966 | } | |
2967 | /* try something else */ | |
2968 | if (skb->protocol == ETH_P_IPV6) | |
2969 | return (skb_network_header(skb)[24] == 0xff) ? | |
2970 | RTN_MULTICAST : 0; | |
2971 | else if (skb->protocol == ETH_P_IP) | |
2972 | return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ? | |
2973 | RTN_MULTICAST : 0; | |
2974 | /* ... */ | |
2975 | if (!memcmp(skb->data, skb->dev->broadcast, 6)) | |
2976 | return RTN_BROADCAST; | |
2977 | else { | |
2978 | u16 hdr_mac; | |
2979 | ||
2980 | hdr_mac = *((u16 *)skb->data); | |
2981 | /* tr multicast? */ | |
2982 | switch (card->info.link_type) { | |
2983 | case QETH_LINK_TYPE_HSTR: | |
2984 | case QETH_LINK_TYPE_LANE_TR: | |
2985 | if ((hdr_mac == QETH_TR_MAC_NC) || | |
2986 | (hdr_mac == QETH_TR_MAC_C)) | |
2987 | return RTN_MULTICAST; | |
2988 | break; | |
2989 | /* eth or so multicast? */ | |
2990 | default: | |
2991 | if ((hdr_mac == QETH_ETH_MAC_V4) || | |
2992 | (hdr_mac == QETH_ETH_MAC_V6)) | |
2993 | return RTN_MULTICAST; | |
2994 | } | |
2995 | } | |
2996 | return cast_type; | |
2997 | } | |
2998 | EXPORT_SYMBOL_GPL(qeth_get_cast_type); | |
2999 | ||
3000 | int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, | |
3001 | int ipv, int cast_type) | |
3002 | { | |
3003 | if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE)) | |
3004 | return card->qdio.default_out_queue; | |
3005 | switch (card->qdio.no_out_queues) { | |
3006 | case 4: | |
3007 | if (cast_type && card->info.is_multicast_different) | |
3008 | return card->info.is_multicast_different & | |
3009 | (card->qdio.no_out_queues - 1); | |
3010 | if (card->qdio.do_prio_queueing && (ipv == 4)) { | |
3011 | const u8 tos = ip_hdr(skb)->tos; | |
3012 | ||
3013 | if (card->qdio.do_prio_queueing == | |
3014 | QETH_PRIO_Q_ING_TOS) { | |
3015 | if (tos & IP_TOS_NOTIMPORTANT) | |
3016 | return 3; | |
3017 | if (tos & IP_TOS_HIGHRELIABILITY) | |
3018 | return 2; | |
3019 | if (tos & IP_TOS_HIGHTHROUGHPUT) | |
3020 | return 1; | |
3021 | if (tos & IP_TOS_LOWDELAY) | |
3022 | return 0; | |
3023 | } | |
3024 | if (card->qdio.do_prio_queueing == | |
3025 | QETH_PRIO_Q_ING_PREC) | |
3026 | return 3 - (tos >> 6); | |
3027 | } else if (card->qdio.do_prio_queueing && (ipv == 6)) { | |
3028 | /* TODO: IPv6!!! */ | |
3029 | } | |
3030 | return card->qdio.default_out_queue; | |
3031 | case 1: /* fallthrough for single-out-queue 1920-device */ | |
3032 | default: | |
3033 | return card->qdio.default_out_queue; | |
3034 | } | |
3035 | } | |
3036 | EXPORT_SYMBOL_GPL(qeth_get_priority_queue); | |
3037 | ||
4a71df50 FB |
3038 | int qeth_get_elements_no(struct qeth_card *card, void *hdr, |
3039 | struct sk_buff *skb, int elems) | |
3040 | { | |
3041 | int elements_needed = 0; | |
3042 | ||
3043 | if (skb_shinfo(skb)->nr_frags > 0) | |
3044 | elements_needed = (skb_shinfo(skb)->nr_frags + 1); | |
3045 | if (elements_needed == 0) | |
683d718a FB |
3046 | elements_needed = 1 + (((((unsigned long) skb->data) % |
3047 | PAGE_SIZE) + skb->len) >> PAGE_SHIFT); | |
4a71df50 | 3048 | if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { |
14cc21b6 | 3049 | QETH_DBF_MESSAGE(2, "Invalid size of IP packet " |
4a71df50 FB |
3050 | "(Number=%d / Length=%d). Discarded.\n", |
3051 | (elements_needed+elems), skb->len); | |
3052 | return 0; | |
3053 | } | |
3054 | return elements_needed; | |
3055 | } | |
3056 | EXPORT_SYMBOL_GPL(qeth_get_elements_no); | |
3057 | ||
f90b744e | 3058 | static inline void __qeth_fill_buffer(struct sk_buff *skb, |
683d718a FB |
3059 | struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, |
3060 | int offset) | |
4a71df50 | 3061 | { |
e1f03ae8 | 3062 | int length = skb->len; |
4a71df50 FB |
3063 | int length_here; |
3064 | int element; | |
3065 | char *data; | |
3066 | int first_lap ; | |
3067 | ||
3068 | element = *next_element_to_fill; | |
3069 | data = skb->data; | |
3070 | first_lap = (is_tso == 0 ? 1 : 0); | |
3071 | ||
683d718a FB |
3072 | if (offset >= 0) { |
3073 | data = skb->data + offset; | |
e1f03ae8 | 3074 | length -= offset; |
683d718a FB |
3075 | first_lap = 0; |
3076 | } | |
3077 | ||
4a71df50 FB |
3078 | while (length > 0) { |
3079 | /* length_here is the remaining amount of data in this page */ | |
3080 | length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); | |
3081 | if (length < length_here) | |
3082 | length_here = length; | |
3083 | ||
3084 | buffer->element[element].addr = data; | |
3085 | buffer->element[element].length = length_here; | |
3086 | length -= length_here; | |
3087 | if (!length) { | |
3088 | if (first_lap) | |
3089 | buffer->element[element].flags = 0; | |
3090 | else | |
3091 | buffer->element[element].flags = | |
3092 | SBAL_FLAGS_LAST_FRAG; | |
3093 | } else { | |
3094 | if (first_lap) | |
3095 | buffer->element[element].flags = | |
3096 | SBAL_FLAGS_FIRST_FRAG; | |
3097 | else | |
3098 | buffer->element[element].flags = | |
3099 | SBAL_FLAGS_MIDDLE_FRAG; | |
3100 | } | |
3101 | data += length_here; | |
3102 | element++; | |
3103 | first_lap = 0; | |
3104 | } | |
3105 | *next_element_to_fill = element; | |
3106 | } | |
3107 | ||
f90b744e | 3108 | static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, |
683d718a FB |
3109 | struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, |
3110 | struct qeth_hdr *hdr, int offset, int hd_len) | |
4a71df50 FB |
3111 | { |
3112 | struct qdio_buffer *buffer; | |
4a71df50 FB |
3113 | int flush_cnt = 0, hdr_len, large_send = 0; |
3114 | ||
4a71df50 FB |
3115 | buffer = buf->buffer; |
3116 | atomic_inc(&skb->users); | |
3117 | skb_queue_tail(&buf->skb_list, skb); | |
3118 | ||
4a71df50 | 3119 | /*check first on TSO ....*/ |
683d718a | 3120 | if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { |
4a71df50 FB |
3121 | int element = buf->next_element_to_fill; |
3122 | ||
683d718a FB |
3123 | hdr_len = sizeof(struct qeth_hdr_tso) + |
3124 | ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; | |
4a71df50 FB |
3125 | /*fill first buffer entry only with header information */ |
3126 | buffer->element[element].addr = skb->data; | |
3127 | buffer->element[element].length = hdr_len; | |
3128 | buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; | |
3129 | buf->next_element_to_fill++; | |
3130 | skb->data += hdr_len; | |
3131 | skb->len -= hdr_len; | |
3132 | large_send = 1; | |
3133 | } | |
683d718a FB |
3134 | |
3135 | if (offset >= 0) { | |
3136 | int element = buf->next_element_to_fill; | |
3137 | buffer->element[element].addr = hdr; | |
3138 | buffer->element[element].length = sizeof(struct qeth_hdr) + | |
3139 | hd_len; | |
3140 | buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; | |
3141 | buf->is_header[element] = 1; | |
3142 | buf->next_element_to_fill++; | |
3143 | } | |
3144 | ||
4a71df50 FB |
3145 | if (skb_shinfo(skb)->nr_frags == 0) |
3146 | __qeth_fill_buffer(skb, buffer, large_send, | |
683d718a | 3147 | (int *)&buf->next_element_to_fill, offset); |
4a71df50 FB |
3148 | else |
3149 | __qeth_fill_buffer_frag(skb, buffer, large_send, | |
3150 | (int *)&buf->next_element_to_fill); | |
3151 | ||
3152 | if (!queue->do_pack) { | |
d11ba0c4 | 3153 | QETH_DBF_TEXT(TRACE, 6, "fillbfnp"); |
4a71df50 FB |
3154 | /* set state to PRIMED -> will be flushed */ |
3155 | atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); | |
3156 | flush_cnt = 1; | |
3157 | } else { | |
d11ba0c4 | 3158 | QETH_DBF_TEXT(TRACE, 6, "fillbfpa"); |
4a71df50 FB |
3159 | if (queue->card->options.performance_stats) |
3160 | queue->card->perf_stats.skbs_sent_pack++; | |
3161 | if (buf->next_element_to_fill >= | |
3162 | QETH_MAX_BUFFER_ELEMENTS(queue->card)) { | |
3163 | /* | |
3164 | * packed buffer if full -> set state PRIMED | |
3165 | * -> will be flushed | |
3166 | */ | |
3167 | atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); | |
3168 | flush_cnt = 1; | |
3169 | } | |
3170 | } | |
3171 | return flush_cnt; | |
3172 | } | |
3173 | ||
3174 | int qeth_do_send_packet_fast(struct qeth_card *card, | |
3175 | struct qeth_qdio_out_q *queue, struct sk_buff *skb, | |
3176 | struct qeth_hdr *hdr, int elements_needed, | |
64ef8957 | 3177 | int offset, int hd_len) |
4a71df50 FB |
3178 | { |
3179 | struct qeth_qdio_out_buffer *buffer; | |
4a71df50 FB |
3180 | int index; |
3181 | ||
4a71df50 FB |
3182 | /* spin until we get the queue ... */ |
3183 | while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, | |
3184 | QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); | |
3185 | /* ... now we've got the queue */ | |
3186 | index = queue->next_buf_to_fill; | |
3187 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
3188 | /* | |
3189 | * check if buffer is empty to make sure that we do not 'overtake' | |
3190 | * ourselves and try to fill a buffer that is already primed | |
3191 | */ | |
3192 | if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) | |
3193 | goto out; | |
64ef8957 | 3194 | queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % |
4a71df50 | 3195 | QDIO_MAX_BUFFERS_PER_Q; |
4a71df50 | 3196 | atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); |
64ef8957 FB |
3197 | qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); |
3198 | qeth_flush_buffers(queue, index, 1); | |
4a71df50 FB |
3199 | return 0; |
3200 | out: | |
3201 | atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); | |
3202 | return -EBUSY; | |
3203 | } | |
3204 | EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); | |
3205 | ||
3206 | int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, | |
3207 | struct sk_buff *skb, struct qeth_hdr *hdr, | |
64ef8957 | 3208 | int elements_needed) |
4a71df50 FB |
3209 | { |
3210 | struct qeth_qdio_out_buffer *buffer; | |
3211 | int start_index; | |
3212 | int flush_count = 0; | |
3213 | int do_pack = 0; | |
3214 | int tmp; | |
3215 | int rc = 0; | |
3216 | ||
4a71df50 FB |
3217 | /* spin until we get the queue ... */ |
3218 | while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, | |
3219 | QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); | |
3220 | start_index = queue->next_buf_to_fill; | |
3221 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
3222 | /* | |
3223 | * check if buffer is empty to make sure that we do not 'overtake' | |
3224 | * ourselves and try to fill a buffer that is already primed | |
3225 | */ | |
3226 | if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { | |
3227 | atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); | |
3228 | return -EBUSY; | |
3229 | } | |
3230 | /* check if we need to switch packing state of this queue */ | |
3231 | qeth_switch_to_packing_if_needed(queue); | |
3232 | if (queue->do_pack) { | |
3233 | do_pack = 1; | |
64ef8957 FB |
3234 | /* does packet fit in current buffer? */ |
3235 | if ((QETH_MAX_BUFFER_ELEMENTS(card) - | |
3236 | buffer->next_element_to_fill) < elements_needed) { | |
3237 | /* ... no -> set state PRIMED */ | |
3238 | atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); | |
3239 | flush_count++; | |
3240 | queue->next_buf_to_fill = | |
3241 | (queue->next_buf_to_fill + 1) % | |
3242 | QDIO_MAX_BUFFERS_PER_Q; | |
3243 | buffer = &queue->bufs[queue->next_buf_to_fill]; | |
3244 | /* we did a step forward, so check buffer state | |
3245 | * again */ | |
3246 | if (atomic_read(&buffer->state) != | |
3247 | QETH_QDIO_BUF_EMPTY) { | |
3248 | qeth_flush_buffers(queue, start_index, | |
779e6e1c | 3249 | flush_count); |
64ef8957 | 3250 | atomic_set(&queue->state, |
4a71df50 | 3251 | QETH_OUT_Q_UNLOCKED); |
64ef8957 | 3252 | return -EBUSY; |
4a71df50 FB |
3253 | } |
3254 | } | |
3255 | } | |
64ef8957 | 3256 | tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); |
4a71df50 FB |
3257 | queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % |
3258 | QDIO_MAX_BUFFERS_PER_Q; | |
3259 | flush_count += tmp; | |
4a71df50 | 3260 | if (flush_count) |
779e6e1c | 3261 | qeth_flush_buffers(queue, start_index, flush_count); |
4a71df50 FB |
3262 | else if (!atomic_read(&queue->set_pci_flags_count)) |
3263 | atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); | |
3264 | /* | |
3265 | * queue->state will go from LOCKED -> UNLOCKED or from | |
3266 | * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us | |
3267 | * (switch packing state or flush buffer to get another pci flag out). | |
3268 | * In that case we will enter this loop | |
3269 | */ | |
3270 | while (atomic_dec_return(&queue->state)) { | |
3271 | flush_count = 0; | |
3272 | start_index = queue->next_buf_to_fill; | |
3273 | /* check if we can go back to non-packing state */ | |
3274 | flush_count += qeth_switch_to_nonpacking_if_needed(queue); | |
3275 | /* | |
3276 | * check if we need to flush a packing buffer to get a pci | |
3277 | * flag out on the queue | |
3278 | */ | |
3279 | if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) | |
3280 | flush_count += qeth_flush_buffers_on_no_pci(queue); | |
3281 | if (flush_count) | |
779e6e1c | 3282 | qeth_flush_buffers(queue, start_index, flush_count); |
4a71df50 FB |
3283 | } |
3284 | /* at this point the queue is UNLOCKED again */ | |
3285 | if (queue->card->options.performance_stats && do_pack) | |
3286 | queue->card->perf_stats.bufs_sent_pack += flush_count; | |
3287 | ||
3288 | return rc; | |
3289 | } | |
3290 | EXPORT_SYMBOL_GPL(qeth_do_send_packet); | |
3291 | ||
3292 | static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, | |
3293 | struct qeth_reply *reply, unsigned long data) | |
3294 | { | |
3295 | struct qeth_ipa_cmd *cmd; | |
3296 | struct qeth_ipacmd_setadpparms *setparms; | |
3297 | ||
d11ba0c4 | 3298 | QETH_DBF_TEXT(TRACE, 4, "prmadpcb"); |
4a71df50 FB |
3299 | |
3300 | cmd = (struct qeth_ipa_cmd *) data; | |
3301 | setparms = &(cmd->data.setadapterparms); | |
3302 | ||
3303 | qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); | |
3304 | if (cmd->hdr.return_code) { | |
d11ba0c4 | 3305 | QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code); |
4a71df50 FB |
3306 | setparms->data.mode = SET_PROMISC_MODE_OFF; |
3307 | } | |
3308 | card->info.promisc_mode = setparms->data.mode; | |
3309 | return 0; | |
3310 | } | |
3311 | ||
3312 | void qeth_setadp_promisc_mode(struct qeth_card *card) | |
3313 | { | |
3314 | enum qeth_ipa_promisc_modes mode; | |
3315 | struct net_device *dev = card->dev; | |
3316 | struct qeth_cmd_buffer *iob; | |
3317 | struct qeth_ipa_cmd *cmd; | |
3318 | ||
d11ba0c4 | 3319 | QETH_DBF_TEXT(TRACE, 4, "setprom"); |
4a71df50 FB |
3320 | |
3321 | if (((dev->flags & IFF_PROMISC) && | |
3322 | (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || | |
3323 | (!(dev->flags & IFF_PROMISC) && | |
3324 | (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) | |
3325 | return; | |
3326 | mode = SET_PROMISC_MODE_OFF; | |
3327 | if (dev->flags & IFF_PROMISC) | |
3328 | mode = SET_PROMISC_MODE_ON; | |
d11ba0c4 | 3329 | QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode); |
4a71df50 FB |
3330 | |
3331 | iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, | |
3332 | sizeof(struct qeth_ipacmd_setadpparms)); | |
3333 | cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); | |
3334 | cmd->data.setadapterparms.data.mode = mode; | |
3335 | qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); | |
3336 | } | |
3337 | EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); | |
3338 | ||
3339 | int qeth_change_mtu(struct net_device *dev, int new_mtu) | |
3340 | { | |
3341 | struct qeth_card *card; | |
3342 | char dbf_text[15]; | |
3343 | ||
509e2562 | 3344 | card = dev->ml_priv; |
4a71df50 | 3345 | |
d11ba0c4 | 3346 | QETH_DBF_TEXT(TRACE, 4, "chgmtu"); |
4a71df50 | 3347 | sprintf(dbf_text, "%8x", new_mtu); |
d11ba0c4 | 3348 | QETH_DBF_TEXT(TRACE, 4, dbf_text); |
4a71df50 FB |
3349 | |
3350 | if (new_mtu < 64) | |
3351 | return -EINVAL; | |
3352 | if (new_mtu > 65535) | |
3353 | return -EINVAL; | |
3354 | if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && | |
3355 | (!qeth_mtu_is_valid(card, new_mtu))) | |
3356 | return -EINVAL; | |
3357 | dev->mtu = new_mtu; | |
3358 | return 0; | |
3359 | } | |
3360 | EXPORT_SYMBOL_GPL(qeth_change_mtu); | |
3361 | ||
3362 | struct net_device_stats *qeth_get_stats(struct net_device *dev) | |
3363 | { | |
3364 | struct qeth_card *card; | |
3365 | ||
509e2562 | 3366 | card = dev->ml_priv; |
4a71df50 | 3367 | |
d11ba0c4 | 3368 | QETH_DBF_TEXT(TRACE, 5, "getstat"); |
4a71df50 FB |
3369 | |
3370 | return &card->stats; | |
3371 | } | |
3372 | EXPORT_SYMBOL_GPL(qeth_get_stats); | |
3373 | ||
3374 | static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, | |
3375 | struct qeth_reply *reply, unsigned long data) | |
3376 | { | |
3377 | struct qeth_ipa_cmd *cmd; | |
3378 | ||
d11ba0c4 | 3379 | QETH_DBF_TEXT(TRACE, 4, "chgmaccb"); |
4a71df50 FB |
3380 | |
3381 | cmd = (struct qeth_ipa_cmd *) data; | |
3382 | if (!card->options.layer2 || | |
3383 | !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { | |
3384 | memcpy(card->dev->dev_addr, | |
3385 | &cmd->data.setadapterparms.data.change_addr.addr, | |
3386 | OSA_ADDR_LEN); | |
3387 | card->info.mac_bits |= QETH_LAYER2_MAC_READ; | |
3388 | } | |
3389 | qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); | |
3390 | return 0; | |
3391 | } | |
3392 | ||
3393 | int qeth_setadpparms_change_macaddr(struct qeth_card *card) | |
3394 | { | |
3395 | int rc; | |
3396 | struct qeth_cmd_buffer *iob; | |
3397 | struct qeth_ipa_cmd *cmd; | |
3398 | ||
d11ba0c4 | 3399 | QETH_DBF_TEXT(TRACE, 4, "chgmac"); |
4a71df50 FB |
3400 | |
3401 | iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, | |
3402 | sizeof(struct qeth_ipacmd_setadpparms)); | |
3403 | cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); | |
3404 | cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; | |
3405 | cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; | |
3406 | memcpy(&cmd->data.setadapterparms.data.change_addr.addr, | |
3407 | card->dev->dev_addr, OSA_ADDR_LEN); | |
3408 | rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, | |
3409 | NULL); | |
3410 | return rc; | |
3411 | } | |
3412 | EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); | |
3413 | ||
3414 | void qeth_tx_timeout(struct net_device *dev) | |
3415 | { | |
3416 | struct qeth_card *card; | |
3417 | ||
509e2562 | 3418 | card = dev->ml_priv; |
4a71df50 FB |
3419 | card->stats.tx_errors++; |
3420 | qeth_schedule_recovery(card); | |
3421 | } | |
3422 | EXPORT_SYMBOL_GPL(qeth_tx_timeout); | |
3423 | ||
3424 | int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) | |
3425 | { | |
509e2562 | 3426 | struct qeth_card *card = dev->ml_priv; |
4a71df50 FB |
3427 | int rc = 0; |
3428 | ||
3429 | switch (regnum) { | |
3430 | case MII_BMCR: /* Basic mode control register */ | |
3431 | rc = BMCR_FULLDPLX; | |
3432 | if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && | |
3433 | (card->info.link_type != QETH_LINK_TYPE_OSN) && | |
3434 | (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) | |
3435 | rc |= BMCR_SPEED100; | |
3436 | break; | |
3437 | case MII_BMSR: /* Basic mode status register */ | |
3438 | rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | | |
3439 | BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | | |
3440 | BMSR_100BASE4; | |
3441 | break; | |
3442 | case MII_PHYSID1: /* PHYS ID 1 */ | |
3443 | rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | | |
3444 | dev->dev_addr[2]; | |
3445 | rc = (rc >> 5) & 0xFFFF; | |
3446 | break; | |
3447 | case MII_PHYSID2: /* PHYS ID 2 */ | |
3448 | rc = (dev->dev_addr[2] << 10) & 0xFFFF; | |
3449 | break; | |
3450 | case MII_ADVERTISE: /* Advertisement control reg */ | |
3451 | rc = ADVERTISE_ALL; | |
3452 | break; | |
3453 | case MII_LPA: /* Link partner ability reg */ | |
3454 | rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | | |
3455 | LPA_100BASE4 | LPA_LPACK; | |
3456 | break; | |
3457 | case MII_EXPANSION: /* Expansion register */ | |
3458 | break; | |
3459 | case MII_DCOUNTER: /* disconnect counter */ | |
3460 | break; | |
3461 | case MII_FCSCOUNTER: /* false carrier counter */ | |
3462 | break; | |
3463 | case MII_NWAYTEST: /* N-way auto-neg test register */ | |
3464 | break; | |
3465 | case MII_RERRCOUNTER: /* rx error counter */ | |
3466 | rc = card->stats.rx_errors; | |
3467 | break; | |
3468 | case MII_SREVISION: /* silicon revision */ | |
3469 | break; | |
3470 | case MII_RESV1: /* reserved 1 */ | |
3471 | break; | |
3472 | case MII_LBRERROR: /* loopback, rx, bypass error */ | |
3473 | break; | |
3474 | case MII_PHYADDR: /* physical address */ | |
3475 | break; | |
3476 | case MII_RESV2: /* reserved 2 */ | |
3477 | break; | |
3478 | case MII_TPISTATUS: /* TPI status for 10mbps */ | |
3479 | break; | |
3480 | case MII_NCONFIG: /* network interface config */ | |
3481 | break; | |
3482 | default: | |
3483 | break; | |
3484 | } | |
3485 | return rc; | |
3486 | } | |
3487 | EXPORT_SYMBOL_GPL(qeth_mdio_read); | |
3488 | ||
3489 | static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, | |
3490 | struct qeth_cmd_buffer *iob, int len, | |
3491 | int (*reply_cb)(struct qeth_card *, struct qeth_reply *, | |
3492 | unsigned long), | |
3493 | void *reply_param) | |
3494 | { | |
3495 | u16 s1, s2; | |
3496 | ||
d11ba0c4 | 3497 | QETH_DBF_TEXT(TRACE, 4, "sendsnmp"); |
4a71df50 FB |
3498 | |
3499 | memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); | |
3500 | memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), | |
3501 | &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); | |
3502 | /* adjust PDU length fields in IPA_PDU_HEADER */ | |
3503 | s1 = (u32) IPA_PDU_HEADER_SIZE + len; | |
3504 | s2 = (u32) len; | |
3505 | memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); | |
3506 | memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); | |
3507 | memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); | |
3508 | memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); | |
3509 | return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, | |
3510 | reply_cb, reply_param); | |
3511 | } | |
3512 | ||
3513 | static int qeth_snmp_command_cb(struct qeth_card *card, | |
3514 | struct qeth_reply *reply, unsigned long sdata) | |
3515 | { | |
3516 | struct qeth_ipa_cmd *cmd; | |
3517 | struct qeth_arp_query_info *qinfo; | |
3518 | struct qeth_snmp_cmd *snmp; | |
3519 | unsigned char *data; | |
3520 | __u16 data_len; | |
3521 | ||
d11ba0c4 | 3522 | QETH_DBF_TEXT(TRACE, 3, "snpcmdcb"); |
4a71df50 FB |
3523 | |
3524 | cmd = (struct qeth_ipa_cmd *) sdata; | |
3525 | data = (unsigned char *)((char *)cmd - reply->offset); | |
3526 | qinfo = (struct qeth_arp_query_info *) reply->param; | |
3527 | snmp = &cmd->data.setadapterparms.data.snmp; | |
3528 | ||
3529 | if (cmd->hdr.return_code) { | |
d11ba0c4 | 3530 | QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code); |
4a71df50 FB |
3531 | return 0; |
3532 | } | |
3533 | if (cmd->data.setadapterparms.hdr.return_code) { | |
3534 | cmd->hdr.return_code = | |
3535 | cmd->data.setadapterparms.hdr.return_code; | |
d11ba0c4 | 3536 | QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code); |
4a71df50 FB |
3537 | return 0; |
3538 | } | |
3539 | data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); | |
3540 | if (cmd->data.setadapterparms.hdr.seq_no == 1) | |
3541 | data_len -= (__u16)((char *)&snmp->data - (char *)cmd); | |
3542 | else | |
3543 | data_len -= (__u16)((char *)&snmp->request - (char *)cmd); | |
3544 | ||
3545 | /* check if there is enough room in userspace */ | |
3546 | if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { | |
d11ba0c4 | 3547 | QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM); |
4a71df50 FB |
3548 | cmd->hdr.return_code = -ENOMEM; |
3549 | return 0; | |
3550 | } | |
d11ba0c4 | 3551 | QETH_DBF_TEXT_(TRACE, 4, "snore%i", |
4a71df50 | 3552 | cmd->data.setadapterparms.hdr.used_total); |
d11ba0c4 | 3553 | QETH_DBF_TEXT_(TRACE, 4, "sseqn%i", |
4a71df50 FB |
3554 | cmd->data.setadapterparms.hdr.seq_no); |
3555 | /*copy entries to user buffer*/ | |
3556 | if (cmd->data.setadapterparms.hdr.seq_no == 1) { | |
3557 | memcpy(qinfo->udata + qinfo->udata_offset, | |
3558 | (char *)snmp, | |
3559 | data_len + offsetof(struct qeth_snmp_cmd, data)); | |
3560 | qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); | |
3561 | } else { | |
3562 | memcpy(qinfo->udata + qinfo->udata_offset, | |
3563 | (char *)&snmp->request, data_len); | |
3564 | } | |
3565 | qinfo->udata_offset += data_len; | |
3566 | /* check if all replies received ... */ | |
d11ba0c4 | 3567 | QETH_DBF_TEXT_(TRACE, 4, "srtot%i", |
4a71df50 | 3568 | cmd->data.setadapterparms.hdr.used_total); |
d11ba0c4 | 3569 | QETH_DBF_TEXT_(TRACE, 4, "srseq%i", |
4a71df50 FB |
3570 | cmd->data.setadapterparms.hdr.seq_no); |
3571 | if (cmd->data.setadapterparms.hdr.seq_no < | |
3572 | cmd->data.setadapterparms.hdr.used_total) | |
3573 | return 1; | |
3574 | return 0; | |
3575 | } | |
3576 | ||
3577 | int qeth_snmp_command(struct qeth_card *card, char __user *udata) | |
3578 | { | |
3579 | struct qeth_cmd_buffer *iob; | |
3580 | struct qeth_ipa_cmd *cmd; | |
3581 | struct qeth_snmp_ureq *ureq; | |
3582 | int req_len; | |
3583 | struct qeth_arp_query_info qinfo = {0, }; | |
3584 | int rc = 0; | |
3585 | ||
d11ba0c4 | 3586 | QETH_DBF_TEXT(TRACE, 3, "snmpcmd"); |
4a71df50 FB |
3587 | |
3588 | if (card->info.guestlan) | |
3589 | return -EOPNOTSUPP; | |
3590 | ||
3591 | if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && | |
3592 | (!card->options.layer2)) { | |
4a71df50 FB |
3593 | return -EOPNOTSUPP; |
3594 | } | |
3595 | /* skip 4 bytes (data_len struct member) to get req_len */ | |
3596 | if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) | |
3597 | return -EFAULT; | |
3598 | ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL); | |
3599 | if (!ureq) { | |
d11ba0c4 | 3600 | QETH_DBF_TEXT(TRACE, 2, "snmpnome"); |
4a71df50 FB |
3601 | return -ENOMEM; |
3602 | } | |
3603 | if (copy_from_user(ureq, udata, | |
3604 | req_len + sizeof(struct qeth_snmp_ureq_hdr))) { | |
3605 | kfree(ureq); | |
3606 | return -EFAULT; | |
3607 | } | |
3608 | qinfo.udata_len = ureq->hdr.data_len; | |
3609 | qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); | |
3610 | if (!qinfo.udata) { | |
3611 | kfree(ureq); | |
3612 | return -ENOMEM; | |
3613 | } | |
3614 | qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); | |
3615 | ||
3616 | iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, | |
3617 | QETH_SNMP_SETADP_CMDLENGTH + req_len); | |
3618 | cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); | |
3619 | memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); | |
3620 | rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, | |
3621 | qeth_snmp_command_cb, (void *)&qinfo); | |
3622 | if (rc) | |
14cc21b6 | 3623 | QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", |
4a71df50 FB |
3624 | QETH_CARD_IFNAME(card), rc); |
3625 | else { | |
3626 | if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) | |
3627 | rc = -EFAULT; | |
3628 | } | |
3629 | ||
3630 | kfree(ureq); | |
3631 | kfree(qinfo.udata); | |
3632 | return rc; | |
3633 | } | |
3634 | EXPORT_SYMBOL_GPL(qeth_snmp_command); | |
3635 | ||
3636 | static inline int qeth_get_qdio_q_format(struct qeth_card *card) | |
3637 | { | |
3638 | switch (card->info.type) { | |
3639 | case QETH_CARD_TYPE_IQD: | |
3640 | return 2; | |
3641 | default: | |
3642 | return 0; | |
3643 | } | |
3644 | } | |
3645 | ||
3646 | static int qeth_qdio_establish(struct qeth_card *card) | |
3647 | { | |
3648 | struct qdio_initialize init_data; | |
3649 | char *qib_param_field; | |
3650 | struct qdio_buffer **in_sbal_ptrs; | |
3651 | struct qdio_buffer **out_sbal_ptrs; | |
3652 | int i, j, k; | |
3653 | int rc = 0; | |
3654 | ||
d11ba0c4 | 3655 | QETH_DBF_TEXT(SETUP, 2, "qdioest"); |
4a71df50 FB |
3656 | |
3657 | qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), | |
3658 | GFP_KERNEL); | |
3659 | if (!qib_param_field) | |
3660 | return -ENOMEM; | |
3661 | ||
3662 | qeth_create_qib_param_field(card, qib_param_field); | |
3663 | qeth_create_qib_param_field_blkt(card, qib_param_field); | |
3664 | ||
3665 | in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), | |
3666 | GFP_KERNEL); | |
3667 | if (!in_sbal_ptrs) { | |
3668 | kfree(qib_param_field); | |
3669 | return -ENOMEM; | |
3670 | } | |
3671 | for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) | |
3672 | in_sbal_ptrs[i] = (struct qdio_buffer *) | |
3673 | virt_to_phys(card->qdio.in_q->bufs[i].buffer); | |
3674 | ||
3675 | out_sbal_ptrs = | |
3676 | kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * | |
3677 | sizeof(void *), GFP_KERNEL); | |
3678 | if (!out_sbal_ptrs) { | |
3679 | kfree(in_sbal_ptrs); | |
3680 | kfree(qib_param_field); | |
3681 | return -ENOMEM; | |
3682 | } | |
3683 | for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) | |
3684 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { | |
3685 | out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( | |
3686 | card->qdio.out_qs[i]->bufs[j].buffer); | |
3687 | } | |
3688 | ||
3689 | memset(&init_data, 0, sizeof(struct qdio_initialize)); | |
3690 | init_data.cdev = CARD_DDEV(card); | |
3691 | init_data.q_format = qeth_get_qdio_q_format(card); | |
3692 | init_data.qib_param_field_format = 0; | |
3693 | init_data.qib_param_field = qib_param_field; | |
4a71df50 FB |
3694 | init_data.no_input_qs = 1; |
3695 | init_data.no_output_qs = card->qdio.no_out_queues; | |
3696 | init_data.input_handler = card->discipline.input_handler; | |
3697 | init_data.output_handler = card->discipline.output_handler; | |
3698 | init_data.int_parm = (unsigned long) card; | |
3699 | init_data.flags = QDIO_INBOUND_0COPY_SBALS | | |
3700 | QDIO_OUTBOUND_0COPY_SBALS | | |
3701 | QDIO_USE_OUTBOUND_PCIS; | |
3702 | init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; | |
3703 | init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; | |
3704 | ||
3705 | if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, | |
3706 | QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { | |
3707 | rc = qdio_initialize(&init_data); | |
3708 | if (rc) | |
3709 | atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); | |
3710 | } | |
3711 | kfree(out_sbal_ptrs); | |
3712 | kfree(in_sbal_ptrs); | |
3713 | kfree(qib_param_field); | |
3714 | return rc; | |
3715 | } | |
3716 | ||
3717 | static void qeth_core_free_card(struct qeth_card *card) | |
3718 | { | |
3719 | ||
d11ba0c4 PT |
3720 | QETH_DBF_TEXT(SETUP, 2, "freecrd"); |
3721 | QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); | |
4a71df50 FB |
3722 | qeth_clean_channel(&card->read); |
3723 | qeth_clean_channel(&card->write); | |
3724 | if (card->dev) | |
3725 | free_netdev(card->dev); | |
3726 | kfree(card->ip_tbd_list); | |
3727 | qeth_free_qdio_buffers(card); | |
6bcac508 | 3728 | unregister_service_level(&card->qeth_service_level); |
4a71df50 FB |
3729 | kfree(card); |
3730 | } | |
3731 | ||
3732 | static struct ccw_device_id qeth_ids[] = { | |
3733 | {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE}, | |
3734 | {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD}, | |
3735 | {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN}, | |
3736 | {}, | |
3737 | }; | |
3738 | MODULE_DEVICE_TABLE(ccw, qeth_ids); | |
3739 | ||
3740 | static struct ccw_driver qeth_ccw_driver = { | |
3741 | .name = "qeth", | |
3742 | .ids = qeth_ids, | |
3743 | .probe = ccwgroup_probe_ccwdev, | |
3744 | .remove = ccwgroup_remove_ccwdev, | |
3745 | }; | |
3746 | ||
3747 | static int qeth_core_driver_group(const char *buf, struct device *root_dev, | |
3748 | unsigned long driver_id) | |
3749 | { | |
022b660a UB |
3750 | return ccwgroup_create_from_string(root_dev, driver_id, |
3751 | &qeth_ccw_driver, 3, buf); | |
4a71df50 FB |
3752 | } |
3753 | ||
3754 | int qeth_core_hardsetup_card(struct qeth_card *card) | |
3755 | { | |
bbd50e17 | 3756 | struct qdio_ssqd_desc *ssqd; |
4a71df50 | 3757 | int retries = 3; |
779e6e1c | 3758 | int mpno = 0; |
4a71df50 FB |
3759 | int rc; |
3760 | ||
d11ba0c4 | 3761 | QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); |
4a71df50 FB |
3762 | atomic_set(&card->force_alloc_skb, 0); |
3763 | retry: | |
3764 | if (retries < 3) { | |
74eacdb9 FB |
3765 | QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", |
3766 | dev_name(&card->gdev->dev)); | |
4a71df50 FB |
3767 | ccw_device_set_offline(CARD_DDEV(card)); |
3768 | ccw_device_set_offline(CARD_WDEV(card)); | |
3769 | ccw_device_set_offline(CARD_RDEV(card)); | |
3770 | ccw_device_set_online(CARD_RDEV(card)); | |
3771 | ccw_device_set_online(CARD_WDEV(card)); | |
3772 | ccw_device_set_online(CARD_DDEV(card)); | |
3773 | } | |
3774 | rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); | |
3775 | if (rc == -ERESTARTSYS) { | |
d11ba0c4 | 3776 | QETH_DBF_TEXT(SETUP, 2, "break1"); |
4a71df50 FB |
3777 | return rc; |
3778 | } else if (rc) { | |
d11ba0c4 | 3779 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); |
4a71df50 FB |
3780 | if (--retries < 0) |
3781 | goto out; | |
3782 | else | |
3783 | goto retry; | |
3784 | } | |
3785 | ||
3786 | rc = qeth_get_unitaddr(card); | |
3787 | if (rc) { | |
d11ba0c4 | 3788 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); |
4a71df50 FB |
3789 | return rc; |
3790 | } | |
779e6e1c | 3791 | |
bbd50e17 JG |
3792 | ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL); |
3793 | if (!ssqd) { | |
3794 | rc = -ENOMEM; | |
3795 | goto out; | |
3796 | } | |
3797 | rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd); | |
3798 | if (rc == 0) | |
3799 | mpno = ssqd->pcnt; | |
3800 | kfree(ssqd); | |
3801 | ||
a74b08c7 UB |
3802 | if (mpno) |
3803 | mpno = min(mpno - 1, QETH_MAX_PORTNO); | |
4a71df50 | 3804 | if (card->info.portno > mpno) { |
14cc21b6 FB |
3805 | QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d" |
3806 | "\n.", CARD_BUS_ID(card), card->info.portno); | |
4a71df50 FB |
3807 | rc = -ENODEV; |
3808 | goto out; | |
3809 | } | |
3810 | qeth_init_tokens(card); | |
3811 | qeth_init_func_level(card); | |
3812 | rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); | |
3813 | if (rc == -ERESTARTSYS) { | |
d11ba0c4 | 3814 | QETH_DBF_TEXT(SETUP, 2, "break2"); |
4a71df50 FB |
3815 | return rc; |
3816 | } else if (rc) { | |
d11ba0c4 | 3817 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); |
4a71df50 FB |
3818 | if (--retries < 0) |
3819 | goto out; | |
3820 | else | |
3821 | goto retry; | |
3822 | } | |
3823 | rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); | |
3824 | if (rc == -ERESTARTSYS) { | |
d11ba0c4 | 3825 | QETH_DBF_TEXT(SETUP, 2, "break3"); |
4a71df50 FB |
3826 | return rc; |
3827 | } else if (rc) { | |
d11ba0c4 | 3828 | QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); |
4a71df50 FB |
3829 | if (--retries < 0) |
3830 | goto out; | |
3831 | else | |
3832 | goto retry; | |
3833 | } | |
3834 | rc = qeth_mpc_initialize(card); | |
3835 | if (rc) { | |
d11ba0c4 | 3836 | QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); |
4a71df50 FB |
3837 | goto out; |
3838 | } | |
3839 | return 0; | |
3840 | out: | |
74eacdb9 FB |
3841 | dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " |
3842 | "an error on the device\n"); | |
3843 | QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", | |
3844 | dev_name(&card->gdev->dev), rc); | |
4a71df50 FB |
3845 | return rc; |
3846 | } | |
3847 | EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); | |
3848 | ||
3849 | static inline int qeth_create_skb_frag(struct qdio_buffer_element *element, | |
3850 | struct sk_buff **pskb, int offset, int *pfrag, int data_len) | |
3851 | { | |
3852 | struct page *page = virt_to_page(element->addr); | |
3853 | if (*pskb == NULL) { | |
3854 | /* the upper protocol layers assume that there is data in the | |
3855 | * skb itself. Copy a small amount (64 bytes) to make them | |
3856 | * happy. */ | |
3857 | *pskb = dev_alloc_skb(64 + ETH_HLEN); | |
3858 | if (!(*pskb)) | |
3859 | return -ENOMEM; | |
3860 | skb_reserve(*pskb, ETH_HLEN); | |
3861 | if (data_len <= 64) { | |
3862 | memcpy(skb_put(*pskb, data_len), element->addr + offset, | |
3863 | data_len); | |
3864 | } else { | |
3865 | get_page(page); | |
3866 | memcpy(skb_put(*pskb, 64), element->addr + offset, 64); | |
3867 | skb_fill_page_desc(*pskb, *pfrag, page, offset + 64, | |
3868 | data_len - 64); | |
3869 | (*pskb)->data_len += data_len - 64; | |
3870 | (*pskb)->len += data_len - 64; | |
3871 | (*pskb)->truesize += data_len - 64; | |
3872 | (*pfrag)++; | |
3873 | } | |
3874 | } else { | |
3875 | get_page(page); | |
3876 | skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); | |
3877 | (*pskb)->data_len += data_len; | |
3878 | (*pskb)->len += data_len; | |
3879 | (*pskb)->truesize += data_len; | |
3880 | (*pfrag)++; | |
3881 | } | |
3882 | return 0; | |
3883 | } | |
3884 | ||
3885 | struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, | |
3886 | struct qdio_buffer *buffer, | |
3887 | struct qdio_buffer_element **__element, int *__offset, | |
3888 | struct qeth_hdr **hdr) | |
3889 | { | |
3890 | struct qdio_buffer_element *element = *__element; | |
3891 | int offset = *__offset; | |
3892 | struct sk_buff *skb = NULL; | |
3893 | int skb_len; | |
3894 | void *data_ptr; | |
3895 | int data_len; | |
3896 | int headroom = 0; | |
3897 | int use_rx_sg = 0; | |
3898 | int frag = 0; | |
3899 | ||
4a71df50 FB |
3900 | /* qeth_hdr must not cross element boundaries */ |
3901 | if (element->length < offset + sizeof(struct qeth_hdr)) { | |
3902 | if (qeth_is_last_sbale(element)) | |
3903 | return NULL; | |
3904 | element++; | |
3905 | offset = 0; | |
3906 | if (element->length < sizeof(struct qeth_hdr)) | |
3907 | return NULL; | |
3908 | } | |
3909 | *hdr = element->addr + offset; | |
3910 | ||
3911 | offset += sizeof(struct qeth_hdr); | |
3912 | if (card->options.layer2) { | |
3913 | if (card->info.type == QETH_CARD_TYPE_OSN) { | |
3914 | skb_len = (*hdr)->hdr.osn.pdu_length; | |
3915 | headroom = sizeof(struct qeth_hdr); | |
3916 | } else { | |
3917 | skb_len = (*hdr)->hdr.l2.pkt_length; | |
3918 | } | |
3919 | } else { | |
3920 | skb_len = (*hdr)->hdr.l3.length; | |
b403e685 FB |
3921 | if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || |
3922 | (card->info.link_type == QETH_LINK_TYPE_HSTR)) | |
3923 | headroom = TR_HLEN; | |
3924 | else | |
3925 | headroom = ETH_HLEN; | |
4a71df50 FB |
3926 | } |
3927 | ||
3928 | if (!skb_len) | |
3929 | return NULL; | |
3930 | ||
3931 | if ((skb_len >= card->options.rx_sg_cb) && | |
3932 | (!(card->info.type == QETH_CARD_TYPE_OSN)) && | |
3933 | (!atomic_read(&card->force_alloc_skb))) { | |
3934 | use_rx_sg = 1; | |
3935 | } else { | |
3936 | skb = dev_alloc_skb(skb_len + headroom); | |
3937 | if (!skb) | |
3938 | goto no_mem; | |
3939 | if (headroom) | |
3940 | skb_reserve(skb, headroom); | |
3941 | } | |
3942 | ||
3943 | data_ptr = element->addr + offset; | |
3944 | while (skb_len) { | |
3945 | data_len = min(skb_len, (int)(element->length - offset)); | |
3946 | if (data_len) { | |
3947 | if (use_rx_sg) { | |
3948 | if (qeth_create_skb_frag(element, &skb, offset, | |
3949 | &frag, data_len)) | |
3950 | goto no_mem; | |
3951 | } else { | |
3952 | memcpy(skb_put(skb, data_len), data_ptr, | |
3953 | data_len); | |
3954 | } | |
3955 | } | |
3956 | skb_len -= data_len; | |
3957 | if (skb_len) { | |
3958 | if (qeth_is_last_sbale(element)) { | |
d11ba0c4 PT |
3959 | QETH_DBF_TEXT(TRACE, 4, "unexeob"); |
3960 | QETH_DBF_TEXT_(TRACE, 4, "%s", | |
4a71df50 | 3961 | CARD_BUS_ID(card)); |
d11ba0c4 PT |
3962 | QETH_DBF_TEXT(QERR, 2, "unexeob"); |
3963 | QETH_DBF_TEXT_(QERR, 2, "%s", | |
4a71df50 | 3964 | CARD_BUS_ID(card)); |
d11ba0c4 | 3965 | QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer)); |
4a71df50 FB |
3966 | dev_kfree_skb_any(skb); |
3967 | card->stats.rx_errors++; | |
3968 | return NULL; | |
3969 | } | |
3970 | element++; | |
3971 | offset = 0; | |
3972 | data_ptr = element->addr; | |
3973 | } else { | |
3974 | offset += data_len; | |
3975 | } | |
3976 | } | |
3977 | *__element = element; | |
3978 | *__offset = offset; | |
3979 | if (use_rx_sg && card->options.performance_stats) { | |
3980 | card->perf_stats.sg_skbs_rx++; | |
3981 | card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; | |
3982 | } | |
3983 | return skb; | |
3984 | no_mem: | |
3985 | if (net_ratelimit()) { | |
d11ba0c4 PT |
3986 | QETH_DBF_TEXT(TRACE, 2, "noskbmem"); |
3987 | QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); | |
4a71df50 FB |
3988 | } |
3989 | card->stats.rx_dropped++; | |
3990 | return NULL; | |
3991 | } | |
3992 | EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); | |
3993 | ||
3994 | static void qeth_unregister_dbf_views(void) | |
3995 | { | |
d11ba0c4 PT |
3996 | int x; |
3997 | for (x = 0; x < QETH_DBF_INFOS; x++) { | |
3998 | debug_unregister(qeth_dbf[x].id); | |
3999 | qeth_dbf[x].id = NULL; | |
4000 | } | |
4a71df50 FB |
4001 | } |
4002 | ||
345aa66e | 4003 | void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...) |
cd023216 PT |
4004 | { |
4005 | char dbf_txt_buf[32]; | |
345aa66e | 4006 | va_list args; |
cd023216 PT |
4007 | |
4008 | if (level > (qeth_dbf[dbf_nix].id)->level) | |
4009 | return; | |
345aa66e PT |
4010 | va_start(args, fmt); |
4011 | vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); | |
4012 | va_end(args); | |
cd023216 | 4013 | debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf); |
cd023216 PT |
4014 | } |
4015 | EXPORT_SYMBOL_GPL(qeth_dbf_longtext); | |
4016 | ||
4a71df50 FB |
4017 | static int qeth_register_dbf_views(void) |
4018 | { | |
d11ba0c4 PT |
4019 | int ret; |
4020 | int x; | |
4021 | ||
4022 | for (x = 0; x < QETH_DBF_INFOS; x++) { | |
4023 | /* register the areas */ | |
4024 | qeth_dbf[x].id = debug_register(qeth_dbf[x].name, | |
4025 | qeth_dbf[x].pages, | |
4026 | qeth_dbf[x].areas, | |
4027 | qeth_dbf[x].len); | |
4028 | if (qeth_dbf[x].id == NULL) { | |
4029 | qeth_unregister_dbf_views(); | |
4030 | return -ENOMEM; | |
4031 | } | |
4a71df50 | 4032 | |
d11ba0c4 PT |
4033 | /* register a view */ |
4034 | ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); | |
4035 | if (ret) { | |
4036 | qeth_unregister_dbf_views(); | |
4037 | return ret; | |
4038 | } | |
4a71df50 | 4039 | |
d11ba0c4 PT |
4040 | /* set a passing level */ |
4041 | debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); | |
4042 | } | |
4a71df50 FB |
4043 | |
4044 | return 0; | |
4045 | } | |
4046 | ||
4047 | int qeth_core_load_discipline(struct qeth_card *card, | |
4048 | enum qeth_discipline_id discipline) | |
4049 | { | |
4050 | int rc = 0; | |
4051 | switch (discipline) { | |
4052 | case QETH_DISCIPLINE_LAYER3: | |
4053 | card->discipline.ccwgdriver = try_then_request_module( | |
4054 | symbol_get(qeth_l3_ccwgroup_driver), | |
4055 | "qeth_l3"); | |
4056 | break; | |
4057 | case QETH_DISCIPLINE_LAYER2: | |
4058 | card->discipline.ccwgdriver = try_then_request_module( | |
4059 | symbol_get(qeth_l2_ccwgroup_driver), | |
4060 | "qeth_l2"); | |
4061 | break; | |
4062 | } | |
4063 | if (!card->discipline.ccwgdriver) { | |
74eacdb9 FB |
4064 | dev_err(&card->gdev->dev, "There is no kernel module to " |
4065 | "support discipline %d\n", discipline); | |
4a71df50 FB |
4066 | rc = -EINVAL; |
4067 | } | |
4068 | return rc; | |
4069 | } | |
4070 | ||
4071 | void qeth_core_free_discipline(struct qeth_card *card) | |
4072 | { | |
4073 | if (card->options.layer2) | |
4074 | symbol_put(qeth_l2_ccwgroup_driver); | |
4075 | else | |
4076 | symbol_put(qeth_l3_ccwgroup_driver); | |
4077 | card->discipline.ccwgdriver = NULL; | |
4078 | } | |
4079 | ||
4080 | static int qeth_core_probe_device(struct ccwgroup_device *gdev) | |
4081 | { | |
4082 | struct qeth_card *card; | |
4083 | struct device *dev; | |
4084 | int rc; | |
4085 | unsigned long flags; | |
4086 | ||
d11ba0c4 | 4087 | QETH_DBF_TEXT(SETUP, 2, "probedev"); |
4a71df50 FB |
4088 | |
4089 | dev = &gdev->dev; | |
4090 | if (!get_device(dev)) | |
4091 | return -ENODEV; | |
4092 | ||
2a0217d5 | 4093 | QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); |
4a71df50 FB |
4094 | |
4095 | card = qeth_alloc_card(); | |
4096 | if (!card) { | |
d11ba0c4 | 4097 | QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); |
4a71df50 FB |
4098 | rc = -ENOMEM; |
4099 | goto err_dev; | |
4100 | } | |
4101 | card->read.ccwdev = gdev->cdev[0]; | |
4102 | card->write.ccwdev = gdev->cdev[1]; | |
4103 | card->data.ccwdev = gdev->cdev[2]; | |
4104 | dev_set_drvdata(&gdev->dev, card); | |
4105 | card->gdev = gdev; | |
4106 | gdev->cdev[0]->handler = qeth_irq; | |
4107 | gdev->cdev[1]->handler = qeth_irq; | |
4108 | gdev->cdev[2]->handler = qeth_irq; | |
4109 | ||
4110 | rc = qeth_determine_card_type(card); | |
4111 | if (rc) { | |
d11ba0c4 | 4112 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); |
4a71df50 FB |
4113 | goto err_card; |
4114 | } | |
4115 | rc = qeth_setup_card(card); | |
4116 | if (rc) { | |
d11ba0c4 | 4117 | QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); |
4a71df50 FB |
4118 | goto err_card; |
4119 | } | |
4120 | ||
4121 | if (card->info.type == QETH_CARD_TYPE_OSN) { | |
4122 | rc = qeth_core_create_osn_attributes(dev); | |
4123 | if (rc) | |
4124 | goto err_card; | |
4125 | rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); | |
4126 | if (rc) { | |
4127 | qeth_core_remove_osn_attributes(dev); | |
4128 | goto err_card; | |
4129 | } | |
4130 | rc = card->discipline.ccwgdriver->probe(card->gdev); | |
4131 | if (rc) { | |
4132 | qeth_core_free_discipline(card); | |
4133 | qeth_core_remove_osn_attributes(dev); | |
4134 | goto err_card; | |
4135 | } | |
4136 | } else { | |
4137 | rc = qeth_core_create_device_attributes(dev); | |
4138 | if (rc) | |
4139 | goto err_card; | |
4140 | } | |
4141 | ||
4142 | write_lock_irqsave(&qeth_core_card_list.rwlock, flags); | |
4143 | list_add_tail(&card->list, &qeth_core_card_list.list); | |
4144 | write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); | |
4145 | return 0; | |
4146 | ||
4147 | err_card: | |
4148 | qeth_core_free_card(card); | |
4149 | err_dev: | |
4150 | put_device(dev); | |
4151 | return rc; | |
4152 | } | |
4153 | ||
4154 | static void qeth_core_remove_device(struct ccwgroup_device *gdev) | |
4155 | { | |
4156 | unsigned long flags; | |
4157 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | |
4158 | ||
28a7e4c9 | 4159 | QETH_DBF_TEXT(SETUP, 2, "removedv"); |
4a71df50 FB |
4160 | if (card->discipline.ccwgdriver) { |
4161 | card->discipline.ccwgdriver->remove(gdev); | |
4162 | qeth_core_free_discipline(card); | |
4163 | } | |
4164 | ||
4165 | if (card->info.type == QETH_CARD_TYPE_OSN) { | |
4166 | qeth_core_remove_osn_attributes(&gdev->dev); | |
4167 | } else { | |
4168 | qeth_core_remove_device_attributes(&gdev->dev); | |
4169 | } | |
4170 | write_lock_irqsave(&qeth_core_card_list.rwlock, flags); | |
4171 | list_del(&card->list); | |
4172 | write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); | |
4173 | qeth_core_free_card(card); | |
4174 | dev_set_drvdata(&gdev->dev, NULL); | |
4175 | put_device(&gdev->dev); | |
4176 | return; | |
4177 | } | |
4178 | ||
4179 | static int qeth_core_set_online(struct ccwgroup_device *gdev) | |
4180 | { | |
4181 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | |
4182 | int rc = 0; | |
4183 | int def_discipline; | |
4184 | ||
4185 | if (!card->discipline.ccwgdriver) { | |
4186 | if (card->info.type == QETH_CARD_TYPE_IQD) | |
4187 | def_discipline = QETH_DISCIPLINE_LAYER3; | |
4188 | else | |
4189 | def_discipline = QETH_DISCIPLINE_LAYER2; | |
4190 | rc = qeth_core_load_discipline(card, def_discipline); | |
4191 | if (rc) | |
4192 | goto err; | |
4193 | rc = card->discipline.ccwgdriver->probe(card->gdev); | |
4194 | if (rc) | |
4195 | goto err; | |
4196 | } | |
4197 | rc = card->discipline.ccwgdriver->set_online(gdev); | |
4198 | err: | |
4199 | return rc; | |
4200 | } | |
4201 | ||
4202 | static int qeth_core_set_offline(struct ccwgroup_device *gdev) | |
4203 | { | |
4204 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | |
4205 | return card->discipline.ccwgdriver->set_offline(gdev); | |
4206 | } | |
4207 | ||
4208 | static void qeth_core_shutdown(struct ccwgroup_device *gdev) | |
4209 | { | |
4210 | struct qeth_card *card = dev_get_drvdata(&gdev->dev); | |
4211 | if (card->discipline.ccwgdriver && | |
4212 | card->discipline.ccwgdriver->shutdown) | |
4213 | card->discipline.ccwgdriver->shutdown(gdev); | |
4214 | } | |
4215 | ||
4216 | static struct ccwgroup_driver qeth_core_ccwgroup_driver = { | |
4217 | .owner = THIS_MODULE, | |
4218 | .name = "qeth", | |
4219 | .driver_id = 0xD8C5E3C8, | |
4220 | .probe = qeth_core_probe_device, | |
4221 | .remove = qeth_core_remove_device, | |
4222 | .set_online = qeth_core_set_online, | |
4223 | .set_offline = qeth_core_set_offline, | |
4224 | .shutdown = qeth_core_shutdown, | |
4225 | }; | |
4226 | ||
4227 | static ssize_t | |
4228 | qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, | |
4229 | size_t count) | |
4230 | { | |
4231 | int err; | |
4232 | err = qeth_core_driver_group(buf, qeth_core_root_dev, | |
4233 | qeth_core_ccwgroup_driver.driver_id); | |
4234 | if (err) | |
4235 | return err; | |
4236 | else | |
4237 | return count; | |
4238 | } | |
4239 | ||
4240 | static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); | |
4241 | ||
4242 | static struct { | |
4243 | const char str[ETH_GSTRING_LEN]; | |
4244 | } qeth_ethtool_stats_keys[] = { | |
4245 | /* 0 */{"rx skbs"}, | |
4246 | {"rx buffers"}, | |
4247 | {"tx skbs"}, | |
4248 | {"tx buffers"}, | |
4249 | {"tx skbs no packing"}, | |
4250 | {"tx buffers no packing"}, | |
4251 | {"tx skbs packing"}, | |
4252 | {"tx buffers packing"}, | |
4253 | {"tx sg skbs"}, | |
4254 | {"tx sg frags"}, | |
4255 | /* 10 */{"rx sg skbs"}, | |
4256 | {"rx sg frags"}, | |
4257 | {"rx sg page allocs"}, | |
4258 | {"tx large kbytes"}, | |
4259 | {"tx large count"}, | |
4260 | {"tx pk state ch n->p"}, | |
4261 | {"tx pk state ch p->n"}, | |
4262 | {"tx pk watermark low"}, | |
4263 | {"tx pk watermark high"}, | |
4264 | {"queue 0 buffer usage"}, | |
4265 | /* 20 */{"queue 1 buffer usage"}, | |
4266 | {"queue 2 buffer usage"}, | |
4267 | {"queue 3 buffer usage"}, | |
4268 | {"rx handler time"}, | |
4269 | {"rx handler count"}, | |
4270 | {"rx do_QDIO time"}, | |
4271 | {"rx do_QDIO count"}, | |
4272 | {"tx handler time"}, | |
4273 | {"tx handler count"}, | |
4274 | {"tx time"}, | |
4275 | /* 30 */{"tx count"}, | |
4276 | {"tx do_QDIO time"}, | |
4277 | {"tx do_QDIO count"}, | |
f61a0d05 | 4278 | {"tx csum"}, |
4a71df50 FB |
4279 | }; |
4280 | ||
4281 | int qeth_core_get_stats_count(struct net_device *dev) | |
4282 | { | |
4283 | return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); | |
4284 | } | |
4285 | EXPORT_SYMBOL_GPL(qeth_core_get_stats_count); | |
4286 | ||
4287 | void qeth_core_get_ethtool_stats(struct net_device *dev, | |
4288 | struct ethtool_stats *stats, u64 *data) | |
4289 | { | |
509e2562 | 4290 | struct qeth_card *card = dev->ml_priv; |
4a71df50 FB |
4291 | data[0] = card->stats.rx_packets - |
4292 | card->perf_stats.initial_rx_packets; | |
4293 | data[1] = card->perf_stats.bufs_rec; | |
4294 | data[2] = card->stats.tx_packets - | |
4295 | card->perf_stats.initial_tx_packets; | |
4296 | data[3] = card->perf_stats.bufs_sent; | |
4297 | data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets | |
4298 | - card->perf_stats.skbs_sent_pack; | |
4299 | data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; | |
4300 | data[6] = card->perf_stats.skbs_sent_pack; | |
4301 | data[7] = card->perf_stats.bufs_sent_pack; | |
4302 | data[8] = card->perf_stats.sg_skbs_sent; | |
4303 | data[9] = card->perf_stats.sg_frags_sent; | |
4304 | data[10] = card->perf_stats.sg_skbs_rx; | |
4305 | data[11] = card->perf_stats.sg_frags_rx; | |
4306 | data[12] = card->perf_stats.sg_alloc_page_rx; | |
4307 | data[13] = (card->perf_stats.large_send_bytes >> 10); | |
4308 | data[14] = card->perf_stats.large_send_cnt; | |
4309 | data[15] = card->perf_stats.sc_dp_p; | |
4310 | data[16] = card->perf_stats.sc_p_dp; | |
4311 | data[17] = QETH_LOW_WATERMARK_PACK; | |
4312 | data[18] = QETH_HIGH_WATERMARK_PACK; | |
4313 | data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); | |
4314 | data[20] = (card->qdio.no_out_queues > 1) ? | |
4315 | atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; | |
4316 | data[21] = (card->qdio.no_out_queues > 2) ? | |
4317 | atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; | |
4318 | data[22] = (card->qdio.no_out_queues > 3) ? | |
4319 | atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; | |
4320 | data[23] = card->perf_stats.inbound_time; | |
4321 | data[24] = card->perf_stats.inbound_cnt; | |
4322 | data[25] = card->perf_stats.inbound_do_qdio_time; | |
4323 | data[26] = card->perf_stats.inbound_do_qdio_cnt; | |
4324 | data[27] = card->perf_stats.outbound_handler_time; | |
4325 | data[28] = card->perf_stats.outbound_handler_cnt; | |
4326 | data[29] = card->perf_stats.outbound_time; | |
4327 | data[30] = card->perf_stats.outbound_cnt; | |
4328 | data[31] = card->perf_stats.outbound_do_qdio_time; | |
4329 | data[32] = card->perf_stats.outbound_do_qdio_cnt; | |
f61a0d05 | 4330 | data[33] = card->perf_stats.tx_csum; |
4a71df50 FB |
4331 | } |
4332 | EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); | |
4333 | ||
4334 | void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) | |
4335 | { | |
4336 | switch (stringset) { | |
4337 | case ETH_SS_STATS: | |
4338 | memcpy(data, &qeth_ethtool_stats_keys, | |
4339 | sizeof(qeth_ethtool_stats_keys)); | |
4340 | break; | |
4341 | default: | |
4342 | WARN_ON(1); | |
4343 | break; | |
4344 | } | |
4345 | } | |
4346 | EXPORT_SYMBOL_GPL(qeth_core_get_strings); | |
4347 | ||
4348 | void qeth_core_get_drvinfo(struct net_device *dev, | |
4349 | struct ethtool_drvinfo *info) | |
4350 | { | |
509e2562 | 4351 | struct qeth_card *card = dev->ml_priv; |
4a71df50 FB |
4352 | if (card->options.layer2) |
4353 | strcpy(info->driver, "qeth_l2"); | |
4354 | else | |
4355 | strcpy(info->driver, "qeth_l3"); | |
4356 | ||
4357 | strcpy(info->version, "1.0"); | |
4358 | strcpy(info->fw_version, card->info.mcl_level); | |
4359 | sprintf(info->bus_info, "%s/%s/%s", | |
4360 | CARD_RDEV_ID(card), | |
4361 | CARD_WDEV_ID(card), | |
4362 | CARD_DDEV_ID(card)); | |
4363 | } | |
4364 | EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); | |
4365 | ||
3f9975aa FB |
4366 | int qeth_core_ethtool_get_settings(struct net_device *netdev, |
4367 | struct ethtool_cmd *ecmd) | |
4368 | { | |
509e2562 | 4369 | struct qeth_card *card = netdev->ml_priv; |
3f9975aa FB |
4370 | enum qeth_link_types link_type; |
4371 | ||
4372 | if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) | |
4373 | link_type = QETH_LINK_TYPE_10GBIT_ETH; | |
4374 | else | |
4375 | link_type = card->info.link_type; | |
4376 | ||
4377 | ecmd->transceiver = XCVR_INTERNAL; | |
4378 | ecmd->supported = SUPPORTED_Autoneg; | |
4379 | ecmd->advertising = ADVERTISED_Autoneg; | |
4380 | ecmd->duplex = DUPLEX_FULL; | |
4381 | ecmd->autoneg = AUTONEG_ENABLE; | |
4382 | ||
4383 | switch (link_type) { | |
4384 | case QETH_LINK_TYPE_FAST_ETH: | |
4385 | case QETH_LINK_TYPE_LANE_ETH100: | |
4386 | ecmd->supported |= SUPPORTED_10baseT_Half | | |
4387 | SUPPORTED_10baseT_Full | | |
4388 | SUPPORTED_100baseT_Half | | |
4389 | SUPPORTED_100baseT_Full | | |
4390 | SUPPORTED_TP; | |
4391 | ecmd->advertising |= ADVERTISED_10baseT_Half | | |
4392 | ADVERTISED_10baseT_Full | | |
4393 | ADVERTISED_100baseT_Half | | |
4394 | ADVERTISED_100baseT_Full | | |
4395 | ADVERTISED_TP; | |
4396 | ecmd->speed = SPEED_100; | |
4397 | ecmd->port = PORT_TP; | |
4398 | break; | |
4399 | ||
4400 | case QETH_LINK_TYPE_GBIT_ETH: | |
4401 | case QETH_LINK_TYPE_LANE_ETH1000: | |
4402 | ecmd->supported |= SUPPORTED_10baseT_Half | | |
4403 | SUPPORTED_10baseT_Full | | |
4404 | SUPPORTED_100baseT_Half | | |
4405 | SUPPORTED_100baseT_Full | | |
4406 | SUPPORTED_1000baseT_Half | | |
4407 | SUPPORTED_1000baseT_Full | | |
4408 | SUPPORTED_FIBRE; | |
4409 | ecmd->advertising |= ADVERTISED_10baseT_Half | | |
4410 | ADVERTISED_10baseT_Full | | |
4411 | ADVERTISED_100baseT_Half | | |
4412 | ADVERTISED_100baseT_Full | | |
4413 | ADVERTISED_1000baseT_Half | | |
4414 | ADVERTISED_1000baseT_Full | | |
4415 | ADVERTISED_FIBRE; | |
4416 | ecmd->speed = SPEED_1000; | |
4417 | ecmd->port = PORT_FIBRE; | |
4418 | break; | |
4419 | ||
4420 | case QETH_LINK_TYPE_10GBIT_ETH: | |
4421 | ecmd->supported |= SUPPORTED_10baseT_Half | | |
4422 | SUPPORTED_10baseT_Full | | |
4423 | SUPPORTED_100baseT_Half | | |
4424 | SUPPORTED_100baseT_Full | | |
4425 | SUPPORTED_1000baseT_Half | | |
4426 | SUPPORTED_1000baseT_Full | | |
4427 | SUPPORTED_10000baseT_Full | | |
4428 | SUPPORTED_FIBRE; | |
4429 | ecmd->advertising |= ADVERTISED_10baseT_Half | | |
4430 | ADVERTISED_10baseT_Full | | |
4431 | ADVERTISED_100baseT_Half | | |
4432 | ADVERTISED_100baseT_Full | | |
4433 | ADVERTISED_1000baseT_Half | | |
4434 | ADVERTISED_1000baseT_Full | | |
4435 | ADVERTISED_10000baseT_Full | | |
4436 | ADVERTISED_FIBRE; | |
4437 | ecmd->speed = SPEED_10000; | |
4438 | ecmd->port = PORT_FIBRE; | |
4439 | break; | |
4440 | ||
4441 | default: | |
4442 | ecmd->supported |= SUPPORTED_10baseT_Half | | |
4443 | SUPPORTED_10baseT_Full | | |
4444 | SUPPORTED_TP; | |
4445 | ecmd->advertising |= ADVERTISED_10baseT_Half | | |
4446 | ADVERTISED_10baseT_Full | | |
4447 | ADVERTISED_TP; | |
4448 | ecmd->speed = SPEED_10; | |
4449 | ecmd->port = PORT_TP; | |
4450 | } | |
4451 | ||
4452 | return 0; | |
4453 | } | |
4454 | EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); | |
4455 | ||
4a71df50 FB |
4456 | static int __init qeth_core_init(void) |
4457 | { | |
4458 | int rc; | |
4459 | ||
74eacdb9 | 4460 | pr_info("loading core functions\n"); |
4a71df50 FB |
4461 | INIT_LIST_HEAD(&qeth_core_card_list.list); |
4462 | rwlock_init(&qeth_core_card_list.rwlock); | |
4463 | ||
4464 | rc = qeth_register_dbf_views(); | |
4465 | if (rc) | |
4466 | goto out_err; | |
4467 | rc = ccw_driver_register(&qeth_ccw_driver); | |
4468 | if (rc) | |
4469 | goto ccw_err; | |
4470 | rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); | |
4471 | if (rc) | |
4472 | goto ccwgroup_err; | |
4473 | rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, | |
4474 | &driver_attr_group); | |
4475 | if (rc) | |
4476 | goto driver_err; | |
035da16f | 4477 | qeth_core_root_dev = root_device_register("qeth"); |
4a71df50 FB |
4478 | rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; |
4479 | if (rc) | |
4480 | goto register_err; | |
4a71df50 | 4481 | |
683d718a FB |
4482 | qeth_core_header_cache = kmem_cache_create("qeth_hdr", |
4483 | sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); | |
4484 | if (!qeth_core_header_cache) { | |
4485 | rc = -ENOMEM; | |
4486 | goto slab_err; | |
4487 | } | |
4488 | ||
4489 | return 0; | |
4490 | slab_err: | |
035da16f | 4491 | root_device_unregister(qeth_core_root_dev); |
4a71df50 FB |
4492 | register_err: |
4493 | driver_remove_file(&qeth_core_ccwgroup_driver.driver, | |
4494 | &driver_attr_group); | |
4495 | driver_err: | |
4496 | ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); | |
4497 | ccwgroup_err: | |
4498 | ccw_driver_unregister(&qeth_ccw_driver); | |
4499 | ccw_err: | |
74eacdb9 | 4500 | QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc); |
4a71df50 FB |
4501 | qeth_unregister_dbf_views(); |
4502 | out_err: | |
74eacdb9 | 4503 | pr_err("Initializing the qeth device driver failed\n"); |
4a71df50 FB |
4504 | return rc; |
4505 | } | |
4506 | ||
4507 | static void __exit qeth_core_exit(void) | |
4508 | { | |
035da16f | 4509 | root_device_unregister(qeth_core_root_dev); |
4a71df50 FB |
4510 | driver_remove_file(&qeth_core_ccwgroup_driver.driver, |
4511 | &driver_attr_group); | |
4512 | ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); | |
4513 | ccw_driver_unregister(&qeth_ccw_driver); | |
683d718a | 4514 | kmem_cache_destroy(qeth_core_header_cache); |
4a71df50 | 4515 | qeth_unregister_dbf_views(); |
74eacdb9 | 4516 | pr_info("core functions removed\n"); |
4a71df50 FB |
4517 | } |
4518 | ||
4519 | module_init(qeth_core_init); | |
4520 | module_exit(qeth_core_exit); | |
4521 | MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); | |
4522 | MODULE_DESCRIPTION("qeth core functions"); | |
4523 | MODULE_LICENSE("GPL"); |