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Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux-block.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
ab9953ff 1// SPDX-License-Identifier: GPL-2.0
4a71df50 2/*
bbcfcdc8 3 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
74eacdb9
FB		 10#define KMSG_COMPONENT "qeth"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
0d55303c 13#include <linux/compat.h>
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
4a71df50
FB		 20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
5a0e3ad6 23#include <linux/slab.h>
6d69b1f1
JW		 24#include <linux/if_vlan.h>
25#include <linux/netdevice.h>
26#include <linux/netdev_features.h>
27#include <linux/skbuff.h>
aec45e85 28#include <linux/vmalloc.h>
6d69b1f1 29
b3332930 30#include <net/iucv/af_iucv.h>
290b8348 31#include <net/dsfield.h>
4a71df50 32
ab4227cb 33#include <asm/ebcdic.h>
2bf29df7 34#include <asm/chpid.h>
ab4227cb 35#include <asm/io.h>
1da74b1c 36#include <asm/sysinfo.h>
ec61bd2f
JW		 37#include <asm/diag.h>
38#include <asm/cio.h>
39#include <asm/ccwdev.h>
615dff22 40#include <asm/cpcmd.h>
4a71df50
FB		 41
42#include "qeth_core.h"
4a71df50 43
d11ba0c4
PT		 44struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
45 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
46 /* N P A M L V H */
47 [QETH_DBF_SETUP] = {"qeth_setup",
48 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 49 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
50 &debug_sprintf_view, NULL},
d11ba0c4
PT		 51 [QETH_DBF_CTRL] = {"qeth_control",
52 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
53};
54EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 55
56struct qeth_card_list_struct qeth_core_card_list;
57EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 58struct kmem_cache *qeth_core_header_cache;
59EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 60static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 61
62static struct device *qeth_core_root_dev;
4a71df50 63static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 64static struct mutex qeth_mod_mutex;
4a71df50
FB		 65
66static void qeth_send_control_data_cb(struct qeth_channel *,
67 struct qeth_cmd_buffer *);
4a71df50 68static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
4a71df50
FB		 69static void qeth_free_buffer_pool(struct qeth_card *);
70static int qeth_qdio_establish(struct qeth_card *);
0da9581d 71static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 72static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
73 struct qeth_qdio_out_buffer *buf,
74 enum iucv_tx_notify notification);
75static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
72861ae7 76static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 77
b4d72c08 78struct workqueue_struct *qeth_wq;
c044dc21 79EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 80
511c2445
EC		 81int qeth_card_hw_is_reachable(struct qeth_card *card)
82{
83 return (card->state == CARD_STATE_SOFTSETUP) ||
84 (card->state == CARD_STATE_UP);
85}
86EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
87
0f54761d
SR		 88static void qeth_close_dev_handler(struct work_struct *work)
89{
90 struct qeth_card *card;
91
92 card = container_of(work, struct qeth_card, close_dev_work);
93 QETH_CARD_TEXT(card, 2, "cldevhdl");
94 rtnl_lock();
95 dev_close(card->dev);
96 rtnl_unlock();
97 ccwgroup_set_offline(card->gdev);
98}
99
100void qeth_close_dev(struct qeth_card *card)
101{
102 QETH_CARD_TEXT(card, 2, "cldevsubm");
103 queue_work(qeth_wq, &card->close_dev_work);
104}
105EXPORT_SYMBOL_GPL(qeth_close_dev);
106
cef6ff22 107static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 108{
109 if (card->info.guestlan) {
110 switch (card->info.type) {
5113fec0 111 case QETH_CARD_TYPE_OSD:
7096b187 112 return " Virtual NIC QDIO";
4a71df50 113 case QETH_CARD_TYPE_IQD:
7096b187 114 return " Virtual NIC Hiper";
5113fec0 115 case QETH_CARD_TYPE_OSM:
7096b187 116 return " Virtual NIC QDIO - OSM";
5113fec0 117 case QETH_CARD_TYPE_OSX:
7096b187 118 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 119 default:
120 return " unknown";
121 }
122 } else {
123 switch (card->info.type) {
5113fec0 124 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 125 return " OSD Express";
126 case QETH_CARD_TYPE_IQD:
127 return " HiperSockets";
128 case QETH_CARD_TYPE_OSN:
129 return " OSN QDIO";
5113fec0
UB		 130 case QETH_CARD_TYPE_OSM:
131 return " OSM QDIO";
132 case QETH_CARD_TYPE_OSX:
133 return " OSX QDIO";
4a71df50
FB		 134 default:
135 return " unknown";
136 }
137 }
138 return " n/a";
139}
140
141/* max length to be returned: 14 */
142const char *qeth_get_cardname_short(struct qeth_card *card)
143{
144 if (card->info.guestlan) {
145 switch (card->info.type) {
5113fec0 146 case QETH_CARD_TYPE_OSD:
7096b187 147 return "Virt.NIC QDIO";
4a71df50 148 case QETH_CARD_TYPE_IQD:
7096b187 149 return "Virt.NIC Hiper";
5113fec0 150 case QETH_CARD_TYPE_OSM:
7096b187 151 return "Virt.NIC OSM";
5113fec0 152 case QETH_CARD_TYPE_OSX:
7096b187 153 return "Virt.NIC OSX";
4a71df50
FB		 154 default:
155 return "unknown";
156 }
157 } else {
158 switch (card->info.type) {
5113fec0 159 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 160 switch (card->info.link_type) {
161 case QETH_LINK_TYPE_FAST_ETH:
162 return "OSD_100";
163 case QETH_LINK_TYPE_HSTR:
164 return "HSTR";
165 case QETH_LINK_TYPE_GBIT_ETH:
166 return "OSD_1000";
167 case QETH_LINK_TYPE_10GBIT_ETH:
168 return "OSD_10GIG";
169 case QETH_LINK_TYPE_LANE_ETH100:
170 return "OSD_FE_LANE";
171 case QETH_LINK_TYPE_LANE_TR:
172 return "OSD_TR_LANE";
173 case QETH_LINK_TYPE_LANE_ETH1000:
174 return "OSD_GbE_LANE";
175 case QETH_LINK_TYPE_LANE:
176 return "OSD_ATM_LANE";
177 default:
178 return "OSD_Express";
179 }
180 case QETH_CARD_TYPE_IQD:
181 return "HiperSockets";
182 case QETH_CARD_TYPE_OSN:
183 return "OSN";
5113fec0
UB		 184 case QETH_CARD_TYPE_OSM:
185 return "OSM_1000";
186 case QETH_CARD_TYPE_OSX:
187 return "OSX_10GIG";
4a71df50
FB		 188 default:
189 return "unknown";
190 }
191 }
192 return "n/a";
193}
194
65d8013c
SR		 195void qeth_set_recovery_task(struct qeth_card *card)
196{
197 card->recovery_task = current;
198}
199EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
200
201void qeth_clear_recovery_task(struct qeth_card *card)
202{
203 card->recovery_task = NULL;
204}
205EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
206
207static bool qeth_is_recovery_task(const struct qeth_card *card)
208{
209 return card->recovery_task == current;
210}
211
4a71df50
FB		 212void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
213 int clear_start_mask)
214{
215 unsigned long flags;
216
217 spin_lock_irqsave(&card->thread_mask_lock, flags);
218 card->thread_allowed_mask = threads;
219 if (clear_start_mask)
220 card->thread_start_mask &= threads;
221 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
222 wake_up(&card->wait_q);
223}
224EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
225
226int qeth_threads_running(struct qeth_card *card, unsigned long threads)
227{
228 unsigned long flags;
229 int rc = 0;
230
231 spin_lock_irqsave(&card->thread_mask_lock, flags);
232 rc = (card->thread_running_mask & threads);
233 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
234 return rc;
235}
236EXPORT_SYMBOL_GPL(qeth_threads_running);
237
238int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
239{
65d8013c
SR		 240 if (qeth_is_recovery_task(card))
241 return 0;
4a71df50
FB		 242 return wait_event_interruptible(card->wait_q,
243 qeth_threads_running(card, threads) == 0);
244}
245EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
246
247void qeth_clear_working_pool_list(struct qeth_card *card)
248{
249 struct qeth_buffer_pool_entry *pool_entry, *tmp;
250
847a50fd 251 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 252 list_for_each_entry_safe(pool_entry, tmp,
253 &card->qdio.in_buf_pool.entry_list, list){
254 list_del(&pool_entry->list);
255 }
256}
257EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
258
259static int qeth_alloc_buffer_pool(struct qeth_card *card)
260{
261 struct qeth_buffer_pool_entry *pool_entry;
262 void *ptr;
263 int i, j;
264
847a50fd 265 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 266 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 267 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 268 if (!pool_entry) {
269 qeth_free_buffer_pool(card);
270 return -ENOMEM;
271 }
272 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 273 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 274 if (!ptr) {
275 while (j > 0)
276 free_page((unsigned long)
277 pool_entry->elements[--j]);
278 kfree(pool_entry);
279 qeth_free_buffer_pool(card);
280 return -ENOMEM;
281 }
282 pool_entry->elements[j] = ptr;
283 }
284 list_add(&pool_entry->init_list,
285 &card->qdio.init_pool.entry_list);
286 }
287 return 0;
288}
289
290int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
291{
847a50fd 292 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 293
294 if ((card->state != CARD_STATE_DOWN) &&
295 (card->state != CARD_STATE_RECOVER))
296 return -EPERM;
297
298 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
299 qeth_clear_working_pool_list(card);
300 qeth_free_buffer_pool(card);
301 card->qdio.in_buf_pool.buf_count = bufcnt;
302 card->qdio.init_pool.buf_count = bufcnt;
303 return qeth_alloc_buffer_pool(card);
304}
76b11f8e 305EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 306
4601ba6c
SO		 307static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
308{
6d284bde
SO		 309 if (!q)
310 return;
311
312 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 313 kfree(q);
314}
315
316static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
317{
318 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
319 int i;
320
321 if (!q)
322 return NULL;
323
6d284bde
SO		 324 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
325 kfree(q);
326 return NULL;
327 }
328
4601ba6c 329 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 330 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 331
332 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
333 return q;
334}
335
cef6ff22 336static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 337{
338 int rc;
339
340 if (card->options.cq == QETH_CQ_ENABLED) {
341 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 342 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
343 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 344 card->qdio.c_q->next_buf_to_init = 127;
345 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
346 card->qdio.no_in_queues - 1, 0,
347 127);
348 if (rc) {
349 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
350 goto out;
351 }
352 }
353 rc = 0;
354out:
355 return rc;
356}
357
cef6ff22 358static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 359{
360 int rc;
361
362 if (card->options.cq == QETH_CQ_ENABLED) {
363 int i;
364 struct qdio_outbuf_state *outbuf_states;
365
366 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 367 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 368 if (!card->qdio.c_q) {
369 rc = -1;
370 goto kmsg_out;
371 }
0da9581d 372 card->qdio.no_in_queues = 2;
4a912f98 373 card->qdio.out_bufstates =
6396bb22
KC		 374 kcalloc(card->qdio.no_out_queues *
375 QDIO_MAX_BUFFERS_PER_Q,
376 sizeof(struct qdio_outbuf_state),
377 GFP_KERNEL);
0da9581d
EL		 378 outbuf_states = card->qdio.out_bufstates;
379 if (outbuf_states == NULL) {
380 rc = -1;
381 goto free_cq_out;
382 }
383 for (i = 0; i < card->qdio.no_out_queues; ++i) {
384 card->qdio.out_qs[i]->bufstates = outbuf_states;
385 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
386 }
387 } else {
388 QETH_DBF_TEXT(SETUP, 2, "nocq");
389 card->qdio.c_q = NULL;
390 card->qdio.no_in_queues = 1;
391 }
392 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
393 rc = 0;
394out:
395 return rc;
396free_cq_out:
4601ba6c 397 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 398 card->qdio.c_q = NULL;
399kmsg_out:
400 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
401 goto out;
402}
403
cef6ff22 404static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 405{
406 if (card->qdio.c_q) {
407 --card->qdio.no_in_queues;
4601ba6c 408 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 409 card->qdio.c_q = NULL;
410 }
411 kfree(card->qdio.out_bufstates);
412 card->qdio.out_bufstates = NULL;
413}
414
cef6ff22
JW		 415static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
416 int delayed)
417{
b3332930
FB		 418 enum iucv_tx_notify n;
419
420 switch (sbalf15) {
421 case 0:
422 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
423 break;
424 case 4:
425 case 16:
426 case 17:
427 case 18:
428 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
429 TX_NOTIFY_UNREACHABLE;
430 break;
431 default:
432 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
433 TX_NOTIFY_GENERALERROR;
434 break;
435 }
436
437 return n;
438}
439
cef6ff22
JW		 440static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
441 int forced_cleanup)
0da9581d 442{
72861ae7
EL		 443 if (q->card->options.cq != QETH_CQ_ENABLED)
444 return;
445
0da9581d
EL		 446 if (q->bufs[bidx]->next_pending != NULL) {
447 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
448 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
449
450 while (c) {
451 if (forced_cleanup ||
452 atomic_read(&c->state) ==
453 QETH_QDIO_BUF_HANDLED_DELAYED) {
454 struct qeth_qdio_out_buffer *f = c;
455 QETH_CARD_TEXT(f->q->card, 5, "fp");
456 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 457 /* release here to avoid interleaving between
458 outbound tasklet and inbound tasklet
459 regarding notifications and lifecycle */
460 qeth_release_skbs(c);
461
0da9581d 462 c = f->next_pending;
18af5c17 463 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 464 head->next_pending = c;
465 kmem_cache_free(qeth_qdio_outbuf_cache, f);
466 } else {
467 head = c;
468 c = c->next_pending;
469 }
470
471 }
472 }
72861ae7
EL		 473 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
474 QETH_QDIO_BUF_HANDLED_DELAYED)) {
475 /* for recovery situations */
72861ae7
EL		 476 qeth_init_qdio_out_buf(q, bidx);
477 QETH_CARD_TEXT(q->card, 2, "clprecov");
478 }
0da9581d
EL		 479}
480
481
cef6ff22
JW		 482static void qeth_qdio_handle_aob(struct qeth_card *card,
483 unsigned long phys_aob_addr)
484{
0da9581d
EL		 485 struct qaob *aob;
486 struct qeth_qdio_out_buffer *buffer;
b3332930 487 enum iucv_tx_notify notification;
ce28867f 488 unsigned int i;
0da9581d
EL		 489
490 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
491 QETH_CARD_TEXT(card, 5, "haob");
492 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
493 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
494 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
495
b3332930
FB		 496 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
497 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
498 notification = TX_NOTIFY_OK;
499 } else {
18af5c17
SR		 500 WARN_ON_ONCE(atomic_read(&buffer->state) !=
501 QETH_QDIO_BUF_PENDING);
b3332930
FB		 502 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
503 notification = TX_NOTIFY_DELAYED_OK;
504 }
505
506 if (aob->aorc != 0) {
507 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
508 notification = qeth_compute_cq_notification(aob->aorc, 1);
509 }
510 qeth_notify_skbs(buffer->q, buffer, notification);
511
ce28867f
JW		 512 /* Free dangling allocations. The attached skbs are handled by
513 * qeth_cleanup_handled_pending().
514 */
515 for (i = 0;
516 i < aob->sb_count && i < QETH_MAX_BUFFER_ELEMENTS(card);
517 i++) {
518 if (aob->sba[i] && buffer->is_header[i])
519 kmem_cache_free(qeth_core_header_cache,
520 (void *) aob->sba[i]);
521 }
522 atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
72861ae7 523
0da9581d
EL		 524 qdio_release_aob(aob);
525}
526
527static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
528{
529 return card->options.cq == QETH_CQ_ENABLED &&
530 card->qdio.c_q != NULL &&
531 queue != 0 &&
532 queue == card->qdio.no_in_queues - 1;
533}
534
45ca2fd6
JW		 535static void qeth_setup_ccw(struct ccw1 *ccw, u8 cmd_code, u32 len, void *data)
536{
537 ccw->cmd_code = cmd_code;
538 ccw->flags = CCW_FLAG_SLI;
539 ccw->count = len;
540 ccw->cda = (__u32) __pa(data);
541}
542
17bf8c9b 543static int __qeth_issue_next_read(struct qeth_card *card)
4a71df50 544{
750b1625 545 struct qeth_channel *channel = &card->read;
4a71df50 546 struct qeth_cmd_buffer *iob;
750b1625 547 int rc;
4a71df50 548
847a50fd 549 QETH_CARD_TEXT(card, 5, "issnxrd");
750b1625 550 if (channel->state != CH_STATE_UP)
4a71df50 551 return -EIO;
750b1625 552 iob = qeth_get_buffer(channel);
4a71df50 553 if (!iob) {
74eacdb9
FB		 554 dev_warn(&card->gdev->dev, "The qeth device driver "
555 "failed to recover an error on the device\n");
556 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
557 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 558 return -ENOMEM;
559 }
f15cdaf2 560 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
847a50fd 561 QETH_CARD_TEXT(card, 6, "noirqpnd");
f15cdaf2 562 rc = ccw_device_start(channel->ccwdev, channel->ccw,
4a71df50
FB		 563 (addr_t) iob, 0, 0);
564 if (rc) {
74eacdb9
FB		 565 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
566 "rc=%i\n", dev_name(&card->gdev->dev), rc);
750b1625 567 atomic_set(&channel->irq_pending, 0);
908abbb5 568 card->read_or_write_problem = 1;
4a71df50
FB		 569 qeth_schedule_recovery(card);
570 wake_up(&card->wait_q);
571 }
572 return rc;
573}
574
17bf8c9b
JW		 575static int qeth_issue_next_read(struct qeth_card *card)
576{
577 int ret;
578
579 spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
580 ret = __qeth_issue_next_read(card);
581 spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
582
583 return ret;
584}
585
4a71df50
FB		 586static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
587{
588 struct qeth_reply *reply;
589
590 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
591 if (reply) {
ae695927 592 refcount_set(&reply->refcnt, 1);
4a71df50
FB		 593 atomic_set(&reply->received, 0);
594 reply->card = card;
6531084c 595 }
4a71df50
FB		 596 return reply;
597}
598
599static void qeth_get_reply(struct qeth_reply *reply)
600{
ae695927 601 refcount_inc(&reply->refcnt);
4a71df50
FB		 602}
603
604static void qeth_put_reply(struct qeth_reply *reply)
605{
ae695927 606 if (refcount_dec_and_test(&reply->refcnt))
4a71df50
FB		 607 kfree(reply);
608}
609
d11ba0c4 610static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 611 struct qeth_card *card)
612{
4a71df50 613 char *ipa_name;
d11ba0c4 614 int com = cmd->hdr.command;
4a71df50 615 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 616 if (rc)
70919e23
UB		 617 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
618 "x%X \"%s\"\n",
619 ipa_name, com, dev_name(&card->gdev->dev),
620 QETH_CARD_IFNAME(card), rc,
621 qeth_get_ipa_msg(rc));
d11ba0c4 622 else
70919e23
UB		 623 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
624 ipa_name, com, dev_name(&card->gdev->dev),
625 QETH_CARD_IFNAME(card));
4a71df50
FB		 626}
627
628static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
629 struct qeth_cmd_buffer *iob)
630{
631 struct qeth_ipa_cmd *cmd = NULL;
632
847a50fd 633 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 634 if (IS_IPA(iob->data)) {
635 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
636 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 637 if (cmd->hdr.command != IPA_CMD_SETCCID &&
638 cmd->hdr.command != IPA_CMD_DELCCID &&
639 cmd->hdr.command != IPA_CMD_MODCCID &&
640 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 641 qeth_issue_ipa_msg(cmd,
642 cmd->hdr.return_code, card);
4a71df50
FB		 643 return cmd;
644 } else {
645 switch (cmd->hdr.command) {
646 case IPA_CMD_STOPLAN:
0f54761d
SR		 647 if (cmd->hdr.return_code ==
648 IPA_RC_VEPA_TO_VEB_TRANSITION) {
649 dev_err(&card->gdev->dev,
650 "Interface %s is down because the "
651 "adjacent port is no longer in "
652 "reflective relay mode\n",
653 QETH_CARD_IFNAME(card));
654 qeth_close_dev(card);
655 } else {
656 dev_warn(&card->gdev->dev,
74eacdb9
FB		 657 "The link for interface %s on CHPID"
658 " 0x%X failed\n",
4a71df50
FB		 659 QETH_CARD_IFNAME(card),
660 card->info.chpid);
0f54761d
SR		 661 qeth_issue_ipa_msg(cmd,
662 cmd->hdr.return_code, card);
663 }
4a71df50 664 card->lan_online = 0;
d3d1b205 665 netif_carrier_off(card->dev);
4a71df50
FB		 666 return NULL;
667 case IPA_CMD_STARTLAN:
74eacdb9
FB		 668 dev_info(&card->gdev->dev,
669 "The link for %s on CHPID 0x%X has"
670 " been restored\n",
4a71df50
FB		 671 QETH_CARD_IFNAME(card),
672 card->info.chpid);
673 netif_carrier_on(card->dev);
922dc062 674 card->lan_online = 1;
1da74b1c
FB		 675 if (card->info.hwtrap)
676 card->info.hwtrap = 2;
4a71df50
FB		 677 qeth_schedule_recovery(card);
678 return NULL;
9c23f4da
EC		 679 case IPA_CMD_SETBRIDGEPORT_IQD:
680 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 681 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 682 if (card->discipline->control_event_handler
683 (card, cmd))
684 return cmd;
685 else
686 return NULL;
4a71df50
FB		 687 case IPA_CMD_MODCCID:
688 return cmd;
689 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 690 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 691 break;
692 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 693 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 694 break;
695 default:
c4cef07c 696 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 697 "but not a reply!\n");
698 break;
699 }
700 }
701 }
702 return cmd;
703}
704
705void qeth_clear_ipacmd_list(struct qeth_card *card)
706{
707 struct qeth_reply *reply, *r;
708 unsigned long flags;
709
847a50fd 710 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 711
712 spin_lock_irqsave(&card->lock, flags);
713 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
714 qeth_get_reply(reply);
715 reply->rc = -EIO;
716 atomic_inc(&reply->received);
717 list_del_init(&reply->list);
718 wake_up(&reply->wait_q);
719 qeth_put_reply(reply);
720 }
721 spin_unlock_irqrestore(&card->lock, flags);
722}
723EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
724
5113fec0
UB		 725static int qeth_check_idx_response(struct qeth_card *card,
726 unsigned char *buffer)
4a71df50
FB		 727{
728 if (!buffer)
729 return 0;
730
d11ba0c4 731 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 732 if ((buffer[2] & 0xc0) == 0xc0) {
d857e111
JW		 733 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#02x\n",
734 buffer[4]);
847a50fd
CO		 735 QETH_CARD_TEXT(card, 2, "ckidxres");
736 QETH_CARD_TEXT(card, 2, " idxterm");
737 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 738 if (buffer[4] == 0xf6) {
739 dev_err(&card->gdev->dev,
740 "The qeth device is not configured "
741 "for the OSI layer required by z/VM\n");
742 return -EPERM;
743 }
4a71df50
FB		 744 return -EIO;
745 }
746 return 0;
747}
748
bca51650
TR		 749static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
750{
751 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
752 dev_get_drvdata(&cdev->dev))->dev);
753 return card;
754}
755
4a71df50
FB		 756static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
757{
758 __u8 index;
759
847a50fd 760 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 761 index = channel->io_buf_no;
762 do {
763 if (channel->iob[index].state == BUF_STATE_FREE) {
764 channel->iob[index].state = BUF_STATE_LOCKED;
765 channel->io_buf_no = (channel->io_buf_no + 1) %
766 QETH_CMD_BUFFER_NO;
767 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
768 return channel->iob + index;
769 }
770 index = (index + 1) % QETH_CMD_BUFFER_NO;
771 } while (index != channel->io_buf_no);
772
773 return NULL;
774}
775
776void qeth_release_buffer(struct qeth_channel *channel,
777 struct qeth_cmd_buffer *iob)
778{
779 unsigned long flags;
780
847a50fd 781 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 782 spin_lock_irqsave(&channel->iob_lock, flags);
783 memset(iob->data, 0, QETH_BUFSIZE);
784 iob->state = BUF_STATE_FREE;
785 iob->callback = qeth_send_control_data_cb;
786 iob->rc = 0;
787 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 788 wake_up(&channel->wait_q);
4a71df50
FB		 789}
790EXPORT_SYMBOL_GPL(qeth_release_buffer);
791
792static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
793{
794 struct qeth_cmd_buffer *buffer = NULL;
795 unsigned long flags;
796
797 spin_lock_irqsave(&channel->iob_lock, flags);
798 buffer = __qeth_get_buffer(channel);
799 spin_unlock_irqrestore(&channel->iob_lock, flags);
800 return buffer;
801}
802
803struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
804{
805 struct qeth_cmd_buffer *buffer;
806 wait_event(channel->wait_q,
807 ((buffer = qeth_get_buffer(channel)) != NULL));
808 return buffer;
809}
810EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
811
812void qeth_clear_cmd_buffers(struct qeth_channel *channel)
813{
814 int cnt;
815
816 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
817 qeth_release_buffer(channel, &channel->iob[cnt]);
4a71df50
FB		 818 channel->io_buf_no = 0;
819}
820EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
821
822static void qeth_send_control_data_cb(struct qeth_channel *channel,
823 struct qeth_cmd_buffer *iob)
824{
825 struct qeth_card *card;
826 struct qeth_reply *reply, *r;
827 struct qeth_ipa_cmd *cmd;
828 unsigned long flags;
829 int keep_reply;
5113fec0 830 int rc = 0;
4a71df50 831
4a71df50 832 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 833 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 834 rc = qeth_check_idx_response(card, iob->data);
835 switch (rc) {
836 case 0:
837 break;
838 case -EIO:
4a71df50 839 qeth_clear_ipacmd_list(card);
5113fec0 840 qeth_schedule_recovery(card);
01fc3e86 841 /* fall through */
5113fec0 842 default:
4a71df50
FB		 843 goto out;
844 }
845
846 cmd = qeth_check_ipa_data(card, iob);
847 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
848 goto out;
849 /*in case of OSN : check if cmd is set */
850 if (card->info.type == QETH_CARD_TYPE_OSN &&
851 cmd &&
852 cmd->hdr.command != IPA_CMD_STARTLAN &&
853 card->osn_info.assist_cb != NULL) {
854 card->osn_info.assist_cb(card->dev, cmd);
855 goto out;
856 }
857
858 spin_lock_irqsave(&card->lock, flags);
859 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
860 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
861 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
862 qeth_get_reply(reply);
863 list_del_init(&reply->list);
864 spin_unlock_irqrestore(&card->lock, flags);
865 keep_reply = 0;
866 if (reply->callback != NULL) {
867 if (cmd) {
868 reply->offset = (__u16)((char *)cmd -
869 (char *)iob->data);
870 keep_reply = reply->callback(card,
871 reply,
872 (unsigned long)cmd);
873 } else
874 keep_reply = reply->callback(card,
875 reply,
876 (unsigned long)iob);
877 }
878 if (cmd)
879 reply->rc = (u16) cmd->hdr.return_code;
880 else if (iob->rc)
881 reply->rc = iob->rc;
882 if (keep_reply) {
883 spin_lock_irqsave(&card->lock, flags);
884 list_add_tail(&reply->list,
885 &card->cmd_waiter_list);
886 spin_unlock_irqrestore(&card->lock, flags);
887 } else {
888 atomic_inc(&reply->received);
889 wake_up(&reply->wait_q);
890 }
891 qeth_put_reply(reply);
892 goto out;
893 }
894 }
895 spin_unlock_irqrestore(&card->lock, flags);
896out:
897 memcpy(&card->seqno.pdu_hdr_ack,
898 QETH_PDU_HEADER_SEQ_NO(iob->data),
899 QETH_SEQ_NO_LENGTH);
900 qeth_release_buffer(channel, iob);
901}
902
24142fd8 903static int qeth_setup_channel(struct qeth_channel *channel, bool alloc_buffers)
4a71df50
FB		 904{
905 int cnt;
906
d11ba0c4 907 QETH_DBF_TEXT(SETUP, 2, "setupch");
24142fd8 908
f15cdaf2
JW		 909 channel->ccw = kmalloc(sizeof(struct ccw1), GFP_KERNEL | GFP_DMA);
910 if (!channel->ccw)
911 return -ENOMEM;
24142fd8
JW		 912 channel->state = CH_STATE_DOWN;
913 atomic_set(&channel->irq_pending, 0);
914 init_waitqueue_head(&channel->wait_q);
915
916 if (!alloc_buffers)
917 return 0;
918
4a71df50 919 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 920 channel->iob[cnt].data =
b3332930 921 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 922 if (channel->iob[cnt].data == NULL)
923 break;
924 channel->iob[cnt].state = BUF_STATE_FREE;
925 channel->iob[cnt].channel = channel;
926 channel->iob[cnt].callback = qeth_send_control_data_cb;
927 channel->iob[cnt].rc = 0;
928 }
929 if (cnt < QETH_CMD_BUFFER_NO) {
f15cdaf2 930 kfree(channel->ccw);
4a71df50
FB		 931 while (cnt-- > 0)
932 kfree(channel->iob[cnt].data);
933 return -ENOMEM;
934 }
4a71df50 935 channel->io_buf_no = 0;
4a71df50
FB		 936 spin_lock_init(&channel->iob_lock);
937
4a71df50
FB		 938 return 0;
939}
940
941static int qeth_set_thread_start_bit(struct qeth_card *card,
942 unsigned long thread)
943{
944 unsigned long flags;
945
946 spin_lock_irqsave(&card->thread_mask_lock, flags);
947 if (!(card->thread_allowed_mask & thread) ||
948 (card->thread_start_mask & thread)) {
949 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
950 return -EPERM;
951 }
952 card->thread_start_mask |= thread;
953 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
954 return 0;
955}
956
957void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
958{
959 unsigned long flags;
960
961 spin_lock_irqsave(&card->thread_mask_lock, flags);
962 card->thread_start_mask &= ~thread;
963 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
964 wake_up(&card->wait_q);
965}
966EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
967
968void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
969{
970 unsigned long flags;
971
972 spin_lock_irqsave(&card->thread_mask_lock, flags);
973 card->thread_running_mask &= ~thread;
974 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1063e432 975 wake_up_all(&card->wait_q);
4a71df50
FB		 976}
977EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
978
979static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
980{
981 unsigned long flags;
982 int rc = 0;
983
984 spin_lock_irqsave(&card->thread_mask_lock, flags);
985 if (card->thread_start_mask & thread) {
986 if ((card->thread_allowed_mask & thread) &&
987 !(card->thread_running_mask & thread)) {
988 rc = 1;
989 card->thread_start_mask &= ~thread;
990 card->thread_running_mask |= thread;
991 } else
992 rc = -EPERM;
993 }
994 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
995 return rc;
996}
997
998int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
999{
1000 int rc = 0;
1001
1002 wait_event(card->wait_q,
1003 (rc = __qeth_do_run_thread(card, thread)) >= 0);
1004 return rc;
1005}
1006EXPORT_SYMBOL_GPL(qeth_do_run_thread);
1007
1008void qeth_schedule_recovery(struct qeth_card *card)
1009{
847a50fd 1010 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 1011 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
1012 schedule_work(&card->kernel_thread_starter);
1013}
1014EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
1015
1016static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
1017{
1018 int dstat, cstat;
1019 char *sense;
847a50fd 1020 struct qeth_card *card;
4a71df50
FB		 1021
1022 sense = (char *) irb->ecw;
23d805b6
PO		 1023 cstat = irb->scsw.cmd.cstat;
1024 dstat = irb->scsw.cmd.dstat;
847a50fd 1025 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1026
1027 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1028 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1029 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1030 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1031 dev_warn(&cdev->dev, "The qeth device driver "
1032 "failed to recover an error on the device\n");
5113fec0 1033 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1034 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1035 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1036 16, 1, irb, 64, 1);
1037 return 1;
1038 }
1039
1040 if (dstat & DEV_STAT_UNIT_CHECK) {
1041 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1042 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1043 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1044 return 1;
1045 }
1046 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1047 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1048 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1049 return 1;
4a71df50
FB		 1050 }
1051 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1052 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1053 return 1;
1054 }
1055 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1056 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1057 return 0;
1058 }
847a50fd 1059 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1060 return 1;
1061 }
1062 return 0;
1063}
1064
1065static long __qeth_check_irb_error(struct ccw_device *cdev,
1066 unsigned long intparm, struct irb *irb)
1067{
847a50fd
CO		 1068 struct qeth_card *card;
1069
1070 card = CARD_FROM_CDEV(cdev);
1071
e95051ff 1072 if (!card || !IS_ERR(irb))
4a71df50
FB		 1073 return 0;
1074
1075 switch (PTR_ERR(irb)) {
1076 case -EIO:
74eacdb9
FB		 1077 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1078 dev_name(&cdev->dev));
847a50fd
CO		 1079 QETH_CARD_TEXT(card, 2, "ckirberr");
1080 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1081 break;
1082 case -ETIMEDOUT:
74eacdb9
FB		 1083 dev_warn(&cdev->dev, "A hardware operation timed out"
1084 " on the device\n");
847a50fd
CO		 1085 QETH_CARD_TEXT(card, 2, "ckirberr");
1086 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1087 if (intparm == QETH_RCD_PARM) {
e95051ff 1088 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1089 card->data.state = CH_STATE_DOWN;
1090 wake_up(&card->wait_q);
1091 }
1092 }
1093 break;
1094 default:
74eacdb9
FB		 1095 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1096 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1097 QETH_CARD_TEXT(card, 2, "ckirberr");
1098 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1099 }
1100 return PTR_ERR(irb);
1101}
1102
1103static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1104 struct irb *irb)
1105{
1106 int rc;
1107 int cstat, dstat;
db71bbbd 1108 struct qeth_cmd_buffer *iob = NULL;
4a71df50
FB		 1109 struct qeth_channel *channel;
1110 struct qeth_card *card;
4a71df50
FB		 1111
1112 card = CARD_FROM_CDEV(cdev);
1113 if (!card)
1114 return;
1115
847a50fd
CO		 1116 QETH_CARD_TEXT(card, 5, "irq");
1117
4a71df50
FB		 1118 if (card->read.ccwdev == cdev) {
1119 channel = &card->read;
847a50fd 1120 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1121 } else if (card->write.ccwdev == cdev) {
1122 channel = &card->write;
847a50fd 1123 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1124 } else {
1125 channel = &card->data;
847a50fd 1126 QETH_CARD_TEXT(card, 5, "data");
4a71df50 1127 }
db71bbbd
JW		 1128
1129 if (qeth_intparm_is_iob(intparm))
1130 iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1131
1132 if (__qeth_check_irb_error(cdev, intparm, irb)) {
1133 /* IO was terminated, free its resources. */
1134 if (iob)
1135 qeth_release_buffer(iob->channel, iob);
1136 atomic_set(&channel->irq_pending, 0);
1137 wake_up(&card->wait_q);
1138 return;
1139 }
1140
4a71df50
FB		 1141 atomic_set(&channel->irq_pending, 0);
1142
23d805b6 1143 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1144 channel->state = CH_STATE_STOPPED;
1145
23d805b6 1146 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1147 channel->state = CH_STATE_HALTED;
1148
1149 /*let's wake up immediately on data channel*/
1150 if ((channel == &card->data) && (intparm != 0) &&
1151 (intparm != QETH_RCD_PARM))
1152 goto out;
1153
1154 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1155 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1156 /* we don't have to handle this further */
1157 intparm = 0;
1158 }
1159 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1160 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1161 /* we don't have to handle this further */
1162 intparm = 0;
1163 }
db71bbbd
JW		 1164
1165 cstat = irb->scsw.cmd.cstat;
1166 dstat = irb->scsw.cmd.dstat;
1167
4a71df50
FB		 1168 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1169 (dstat & DEV_STAT_UNIT_CHECK) ||
1170 (cstat)) {
1171 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1172 dev_warn(&channel->ccwdev->dev,
1173 "The qeth device driver failed to recover "
1174 "an error on the device\n");
1175 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1176 "0x%X dstat 0x%X\n",
1177 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1178 print_hex_dump(KERN_WARNING, "qeth: irb ",
1179 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1180 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1181 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1182 }
1183 if (intparm == QETH_RCD_PARM) {
1184 channel->state = CH_STATE_DOWN;
1185 goto out;
1186 }
1187 rc = qeth_get_problem(cdev, irb);
1188 if (rc) {
a6c3d939 1189 card->read_or_write_problem = 1;
28a7e4c9 1190 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1191 qeth_schedule_recovery(card);
1192 goto out;
1193 }
1194 }
1195
1196 if (intparm == QETH_RCD_PARM) {
1197 channel->state = CH_STATE_RCD_DONE;
1198 goto out;
1199 }
4a71df50
FB		 1200 if (channel == &card->data)
1201 return;
1202 if (channel == &card->read &&
1203 channel->state == CH_STATE_UP)
17bf8c9b 1204 __qeth_issue_next_read(card);
4a71df50 1205
db71bbbd
JW		 1206 if (iob && iob->callback)
1207 iob->callback(iob->channel, iob);
4a71df50 1208
4a71df50
FB		 1209out:
1210 wake_up(&card->wait_q);
1211 return;
1212}
1213
b3332930 1214static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1215 struct qeth_qdio_out_buffer *buf,
b3332930 1216 enum iucv_tx_notify notification)
4a71df50 1217{
4a71df50
FB		 1218 struct sk_buff *skb;
1219
b3332930
FB		 1220 if (skb_queue_empty(&buf->skb_list))
1221 goto out;
1222 skb = skb_peek(&buf->skb_list);
1223 while (skb) {
1224 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1225 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6bee4e26 1226 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
b3332930
FB		 1227 if (skb->sk) {
1228 struct iucv_sock *iucv = iucv_sk(skb->sk);
1229 iucv->sk_txnotify(skb, notification);
1230 }
1231 }
1232 if (skb_queue_is_last(&buf->skb_list, skb))
1233 skb = NULL;
1234 else
1235 skb = skb_queue_next(&buf->skb_list, skb);
1236 }
1237out:
1238 return;
1239}
1240
1241static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1242{
1243 struct sk_buff *skb;
72861ae7
EL		 1244 struct iucv_sock *iucv;
1245 int notify_general_error = 0;
1246
1247 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1248 notify_general_error = 1;
1249
1250 /* release may never happen from within CQ tasklet scope */
18af5c17 1251 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1252
b67d801f
UB		 1253 skb = skb_dequeue(&buf->skb_list);
1254 while (skb) {
b3332930
FB		 1255 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1256 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
6bee4e26
HW		 1257 if (notify_general_error &&
1258 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
72861ae7
EL		 1259 if (skb->sk) {
1260 iucv = iucv_sk(skb->sk);
1261 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1262 }
1263 }
63354797 1264 refcount_dec(&skb->users);
b67d801f 1265 dev_kfree_skb_any(skb);
4a71df50
FB		 1266 skb = skb_dequeue(&buf->skb_list);
1267 }
b3332930
FB		 1268}
1269
1270static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
3b346c18 1271 struct qeth_qdio_out_buffer *buf)
b3332930
FB		 1272{
1273 int i;
1274
1275 /* is PCI flag set on buffer? */
1276 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1277 atomic_dec(&queue->set_pci_flags_count);
1278
3b346c18
JW		 1279 qeth_release_skbs(buf);
1280
4a71df50 1281 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1282 if (buf->buffer->element[i].addr && buf->is_header[i])
1283 kmem_cache_free(qeth_core_header_cache,
1284 buf->buffer->element[i].addr);
1285 buf->is_header[i] = 0;
4a71df50 1286 }
3b346c18
JW		 1287
1288 qeth_scrub_qdio_buffer(buf->buffer,
1289 QETH_MAX_BUFFER_ELEMENTS(queue->card));
4a71df50 1290 buf->next_element_to_fill = 0;
3b346c18 1291 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
0da9581d
EL		 1292}
1293
1294static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1295{
1296 int j;
1297
1298 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1299 if (!q->bufs[j])
1300 continue;
72861ae7 1301 qeth_cleanup_handled_pending(q, j, 1);
3b346c18 1302 qeth_clear_output_buffer(q, q->bufs[j]);
0da9581d
EL		 1303 if (free) {
1304 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1305 q->bufs[j] = NULL;
1306 }
1307 }
4a71df50
FB		 1308}
1309
1310void qeth_clear_qdio_buffers(struct qeth_card *card)
1311{
0da9581d 1312 int i;
4a71df50 1313
847a50fd 1314 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1315 /* clear outbound buffers to free skbs */
0da9581d 1316 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1317 if (card->qdio.out_qs[i]) {
0da9581d 1318 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1319 }
0da9581d 1320 }
4a71df50
FB		 1321}
1322EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1323
1324static void qeth_free_buffer_pool(struct qeth_card *card)
1325{
1326 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1327 int i = 0;
4a71df50
FB		 1328 list_for_each_entry_safe(pool_entry, tmp,
1329 &card->qdio.init_pool.entry_list, init_list){
1330 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1331 free_page((unsigned long)pool_entry->elements[i]);
1332 list_del(&pool_entry->init_list);
1333 kfree(pool_entry);
1334 }
1335}
1336
4a71df50
FB		 1337static void qeth_clean_channel(struct qeth_channel *channel)
1338{
1339 int cnt;
1340
d11ba0c4 1341 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1342 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1343 kfree(channel->iob[cnt].data);
f15cdaf2 1344 kfree(channel->ccw);
4a71df50
FB		 1345}
1346
725b9c04
SO		 1347static void qeth_set_single_write_queues(struct qeth_card *card)
1348{
1349 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1350 (card->qdio.no_out_queues == 4))
1351 qeth_free_qdio_buffers(card);
1352
1353 card->qdio.no_out_queues = 1;
1354 if (card->qdio.default_out_queue != 0)
1355 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1356
1357 card->qdio.default_out_queue = 0;
1358}
1359
1360static void qeth_set_multiple_write_queues(struct qeth_card *card)
1361{
1362 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1363 (card->qdio.no_out_queues == 1)) {
1364 qeth_free_qdio_buffers(card);
1365 card->qdio.default_out_queue = 2;
1366 }
1367 card->qdio.no_out_queues = 4;
1368}
1369
1370static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1371{
4a71df50 1372 struct ccw_device *ccwdev;
ded27d8d 1373 struct channel_path_desc_fmt0 *chp_dsc;
4a71df50 1374
5113fec0 1375 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1376
1377 ccwdev = card->data.ccwdev;
725b9c04
SO		 1378 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1379 if (!chp_dsc)
1380 goto out;
1381
1382 card->info.func_level = 0x4100 + chp_dsc->desc;
1383 if (card->info.type == QETH_CARD_TYPE_IQD)
1384 goto out;
1385
1386 /* CHPP field bit 6 == 1 -> single queue */
1387 if ((chp_dsc->chpp & 0x02) == 0x02)
1388 qeth_set_single_write_queues(card);
1389 else
1390 qeth_set_multiple_write_queues(card);
1391out:
1392 kfree(chp_dsc);
5113fec0
UB		 1393 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1394 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1395}
1396
1397static void qeth_init_qdio_info(struct qeth_card *card)
1398{
d11ba0c4 1399 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50 1400 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
95f4d8b7
JW		 1401 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1402 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1403 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1404
4a71df50 1405 /* inbound */
ed2e93ef 1406 card->qdio.no_in_queues = 1;
4a71df50 1407 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1408 if (card->info.type == QETH_CARD_TYPE_IQD)
1409 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1410 else
1411 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1412 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1413 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1414 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1415}
1416
95f4d8b7 1417static void qeth_set_initial_options(struct qeth_card *card)
4a71df50
FB		 1418{
1419 card->options.route4.type = NO_ROUTER;
1420 card->options.route6.type = NO_ROUTER;
4a71df50 1421 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1422 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1423 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1424}
1425
1426static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1427{
1428 unsigned long flags;
1429 int rc = 0;
1430
1431 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1432 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1433 (u8) card->thread_start_mask,
1434 (u8) card->thread_allowed_mask,
1435 (u8) card->thread_running_mask);
1436 rc = (card->thread_start_mask & thread);
1437 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1438 return rc;
1439}
1440
1441static void qeth_start_kernel_thread(struct work_struct *work)
1442{
3f36b890 1443 struct task_struct *ts;
4a71df50
FB		 1444 struct qeth_card *card = container_of(work, struct qeth_card,
1445 kernel_thread_starter);
847a50fd 1446 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1447
1448 if (card->read.state != CH_STATE_UP &&
1449 card->write.state != CH_STATE_UP)
1450 return;
3f36b890 1451 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1452 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1453 "qeth_recover");
3f36b890
FB		 1454 if (IS_ERR(ts)) {
1455 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1456 qeth_clear_thread_running_bit(card,
1457 QETH_RECOVER_THREAD);
1458 }
1459 }
4a71df50
FB		 1460}
1461
bca51650 1462static void qeth_buffer_reclaim_work(struct work_struct *);
95f4d8b7 1463static void qeth_setup_card(struct qeth_card *card)
4a71df50 1464{
d11ba0c4
PT		 1465 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1466 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50 1467
95f4d8b7 1468 card->info.type = CARD_RDEV(card)->id.driver_info;
4a71df50 1469 card->state = CARD_STATE_DOWN;
4a71df50 1470 spin_lock_init(&card->mclock);
4a71df50
FB		 1471 spin_lock_init(&card->lock);
1472 spin_lock_init(&card->ip_lock);
1473 spin_lock_init(&card->thread_mask_lock);
c4949f07 1474 mutex_init(&card->conf_mutex);
9dc48ccc 1475 mutex_init(&card->discipline_mutex);
d4ac0246 1476 mutex_init(&card->vid_list_mutex);
4a71df50 1477 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1478 INIT_LIST_HEAD(&card->cmd_waiter_list);
1479 init_waitqueue_head(&card->wait_q);
95f4d8b7 1480 qeth_set_initial_options(card);
4a71df50
FB		 1481 /* IP address takeover */
1482 INIT_LIST_HEAD(&card->ipato.entries);
4a71df50 1483 qeth_init_qdio_info(card);
b3332930 1484 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1485 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1486}
1487
6bcac508
MS		 1488static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1489{
1490 struct qeth_card *card = container_of(slr, struct qeth_card,
1491 qeth_service_level);
0d788c7d
KDW		 1492 if (card->info.mcl_level[0])
1493 seq_printf(m, "qeth: %s firmware level %s\n",
1494 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1495}
1496
4a71df50
FB		 1497static struct qeth_card *qeth_alloc_card(void)
1498{
1499 struct qeth_card *card;
1500
d11ba0c4 1501 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
f15cdaf2 1502 card = kzalloc(sizeof(*card), GFP_KERNEL);
4a71df50 1503 if (!card)
76b11f8e 1504 goto out;
d11ba0c4 1505 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
24142fd8 1506 if (qeth_setup_channel(&card->read, true))
76b11f8e 1507 goto out_ip;
24142fd8 1508 if (qeth_setup_channel(&card->write, true))
76b11f8e 1509 goto out_channel;
24142fd8
JW		 1510 if (qeth_setup_channel(&card->data, false))
1511 goto out_data;
4a71df50 1512 card->options.layer2 = -1;
6bcac508
MS		 1513 card->qeth_service_level.seq_print = qeth_core_sl_print;
1514 register_service_level(&card->qeth_service_level);
4a71df50 1515 return card;
76b11f8e 1516
24142fd8
JW		 1517out_data:
1518 qeth_clean_channel(&card->write);
76b11f8e
UB		 1519out_channel:
1520 qeth_clean_channel(&card->read);
1521out_ip:
76b11f8e
UB		 1522 kfree(card);
1523out:
1524 return NULL;
4a71df50
FB		 1525}
1526
4a71df50
FB		 1527static int qeth_clear_channel(struct qeth_channel *channel)
1528{
1529 unsigned long flags;
1530 struct qeth_card *card;
1531 int rc;
1532
4a71df50 1533 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1534 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1535 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1536 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1537 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1538
1539 if (rc)
1540 return rc;
1541 rc = wait_event_interruptible_timeout(card->wait_q,
1542 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1543 if (rc == -ERESTARTSYS)
1544 return rc;
1545 if (channel->state != CH_STATE_STOPPED)
1546 return -ETIME;
1547 channel->state = CH_STATE_DOWN;
1548 return 0;
1549}
1550
1551static int qeth_halt_channel(struct qeth_channel *channel)
1552{
1553 unsigned long flags;
1554 struct qeth_card *card;
1555 int rc;
1556
4a71df50 1557 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1558 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1559 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1560 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1561 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1562
1563 if (rc)
1564 return rc;
1565 rc = wait_event_interruptible_timeout(card->wait_q,
1566 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1567 if (rc == -ERESTARTSYS)
1568 return rc;
1569 if (channel->state != CH_STATE_HALTED)
1570 return -ETIME;
1571 return 0;
1572}
1573
1574static int qeth_halt_channels(struct qeth_card *card)
1575{
1576 int rc1 = 0, rc2 = 0, rc3 = 0;
1577
847a50fd 1578 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1579 rc1 = qeth_halt_channel(&card->read);
1580 rc2 = qeth_halt_channel(&card->write);
1581 rc3 = qeth_halt_channel(&card->data);
1582 if (rc1)
1583 return rc1;
1584 if (rc2)
1585 return rc2;
1586 return rc3;
1587}
1588
1589static int qeth_clear_channels(struct qeth_card *card)
1590{
1591 int rc1 = 0, rc2 = 0, rc3 = 0;
1592
847a50fd 1593 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1594 rc1 = qeth_clear_channel(&card->read);
1595 rc2 = qeth_clear_channel(&card->write);
1596 rc3 = qeth_clear_channel(&card->data);
1597 if (rc1)
1598 return rc1;
1599 if (rc2)
1600 return rc2;
1601 return rc3;
1602}
1603
1604static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1605{
1606 int rc = 0;
1607
847a50fd 1608 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1609
1610 if (halt)
1611 rc = qeth_halt_channels(card);
1612 if (rc)
1613 return rc;
1614 return qeth_clear_channels(card);
1615}
1616
1617int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1618{
1619 int rc = 0;
1620
847a50fd 1621 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1622 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1623 QETH_QDIO_CLEANING)) {
1624 case QETH_QDIO_ESTABLISHED:
1625 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1626 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1627 QDIO_FLAG_CLEANUP_USING_HALT);
1628 else
cc961d40 1629 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1630 QDIO_FLAG_CLEANUP_USING_CLEAR);
1631 if (rc)
847a50fd 1632 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1633 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1634 break;
1635 case QETH_QDIO_CLEANING:
1636 return rc;
1637 default:
1638 break;
1639 }
1640 rc = qeth_clear_halt_card(card, use_halt);
1641 if (rc)
847a50fd 1642 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1643 card->state = CARD_STATE_DOWN;
1644 return rc;
1645}
1646EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1647
1648static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1649 int *length)
1650{
1651 struct ciw *ciw;
1652 char *rcd_buf;
1653 int ret;
1654 struct qeth_channel *channel = &card->data;
1655 unsigned long flags;
1656
1657 /*
1658 * scan for RCD command in extended SenseID data
1659 */
1660 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1661 if (!ciw || ciw->cmd == 0)
1662 return -EOPNOTSUPP;
1663 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1664 if (!rcd_buf)
1665 return -ENOMEM;
1666
f15cdaf2 1667 qeth_setup_ccw(channel->ccw, ciw->cmd, ciw->count, rcd_buf);
4a71df50
FB		 1668 channel->state = CH_STATE_RCD;
1669 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
f15cdaf2 1670 ret = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
4a71df50
FB		 1671 QETH_RCD_PARM, LPM_ANYPATH, 0,
1672 QETH_RCD_TIMEOUT);
1673 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1674 if (!ret)
1675 wait_event(card->wait_q,
1676 (channel->state == CH_STATE_RCD_DONE ||
1677 channel->state == CH_STATE_DOWN));
1678 if (channel->state == CH_STATE_DOWN)
1679 ret = -EIO;
1680 else
1681 channel->state = CH_STATE_DOWN;
1682 if (ret) {
1683 kfree(rcd_buf);
1684 *buffer = NULL;
1685 *length = 0;
1686 } else {
1687 *length = ciw->count;
1688 *buffer = rcd_buf;
1689 }
1690 return ret;
1691}
1692
a60389ab 1693static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1694{
a60389ab 1695 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1696 card->info.chpid = prcd[30];
1697 card->info.unit_addr2 = prcd[31];
1698 card->info.cula = prcd[63];
1699 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1700 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1701}
1702
615dff22
JW		 1703static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
1704{
1705 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1706 struct diag26c_vnic_resp *response = NULL;
1707 struct diag26c_vnic_req *request = NULL;
1708 struct ccw_dev_id id;
1709 char userid[80];
1710 int rc = 0;
1711
1712 QETH_DBF_TEXT(SETUP, 2, "vmlayer");
1713
1714 cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
1715 if (rc)
1716 goto out;
1717
1718 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
1719 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
1720 if (!request || !response) {
1721 rc = -ENOMEM;
1722 goto out;
1723 }
1724
1725 ccw_device_get_id(CARD_RDEV(card), &id);
1726 request->resp_buf_len = sizeof(*response);
1727 request->resp_version = DIAG26C_VERSION6_VM65918;
1728 request->req_format = DIAG26C_VNIC_INFO;
1729 ASCEBC(userid, 8);
1730 memcpy(&request->sys_name, userid, 8);
1731 request->devno = id.devno;
1732
1733 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1734 rc = diag26c(request, response, DIAG26C_PORT_VNIC);
1735 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1736 if (rc)
1737 goto out;
1738 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
1739
1740 if (request->resp_buf_len < sizeof(*response) ||
1741 response->version != request->resp_version) {
1742 rc = -EIO;
1743 goto out;
1744 }
1745
1746 if (response->protocol == VNIC_INFO_PROT_L2)
1747 disc = QETH_DISCIPLINE_LAYER2;
1748 else if (response->protocol == VNIC_INFO_PROT_L3)
1749 disc = QETH_DISCIPLINE_LAYER3;
1750
1751out:
1752 kfree(response);
1753 kfree(request);
1754 if (rc)
1755 QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
1756 return disc;
1757}
1758
c70eb09d
JW		 1759/* Determine whether the device requires a specific layer discipline */
1760static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1761{
615dff22
JW		 1762 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1763
c70eb09d 1764 if (card->info.type == QETH_CARD_TYPE_OSM ||
615dff22
JW		 1765 card->info.type == QETH_CARD_TYPE_OSN)
1766 disc = QETH_DISCIPLINE_LAYER2;
1767 else if (card->info.guestlan)
1768 disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
1769 QETH_DISCIPLINE_LAYER3 :
1770 qeth_vm_detect_layer(card);
1771
1772 switch (disc) {
1773 case QETH_DISCIPLINE_LAYER2:
c70eb09d 1774 QETH_DBF_TEXT(SETUP, 3, "force l2");
615dff22
JW		 1775 break;
1776 case QETH_DISCIPLINE_LAYER3:
c70eb09d 1777 QETH_DBF_TEXT(SETUP, 3, "force l3");
615dff22
JW		 1778 break;
1779 default:
1780 QETH_DBF_TEXT(SETUP, 3, "force no");
c70eb09d
JW		 1781 }
1782
615dff22 1783 return disc;
c70eb09d
JW		 1784}
1785
a60389ab
EL		 1786static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1787{
1788 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1789
e6e056ba 1790 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1791 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1792 card->info.blkt.time_total = 0;
1793 card->info.blkt.inter_packet = 0;
1794 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1795 } else {
1796 card->info.blkt.time_total = 250;
1797 card->info.blkt.inter_packet = 5;
1798 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1799 }
4a71df50
FB		 1800}
1801
1802static void qeth_init_tokens(struct qeth_card *card)
1803{
1804 card->token.issuer_rm_w = 0x00010103UL;
1805 card->token.cm_filter_w = 0x00010108UL;
1806 card->token.cm_connection_w = 0x0001010aUL;
1807 card->token.ulp_filter_w = 0x0001010bUL;
1808 card->token.ulp_connection_w = 0x0001010dUL;
1809}
1810
1811static void qeth_init_func_level(struct qeth_card *card)
1812{
5113fec0
UB		 1813 switch (card->info.type) {
1814 case QETH_CARD_TYPE_IQD:
6298263a 1815 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1816 break;
1817 case QETH_CARD_TYPE_OSD:
0132951e 1818 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1819 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1820 break;
1821 default:
1822 break;
4a71df50
FB		 1823 }
1824}
1825
4a71df50
FB		 1826static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1827 void (*idx_reply_cb)(struct qeth_channel *,
1828 struct qeth_cmd_buffer *))
1829{
1830 struct qeth_cmd_buffer *iob;
1831 unsigned long flags;
1832 int rc;
1833 struct qeth_card *card;
1834
d11ba0c4 1835 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1836 card = CARD_FROM_CDEV(channel->ccwdev);
1837 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1838 if (!iob)
1839 return -ENOMEM;
4a71df50 1840 iob->callback = idx_reply_cb;
f15cdaf2 1841 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
4a71df50
FB		 1842
1843 wait_event(card->wait_q,
1844 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1845 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50 1846 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
f15cdaf2 1847 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 1848 (addr_t) iob, 0, 0, QETH_TIMEOUT);
4a71df50
FB		 1849 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1850
1851 if (rc) {
14cc21b6 1852 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1853 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1854 atomic_set(&channel->irq_pending, 0);
1855 wake_up(&card->wait_q);
1856 return rc;
1857 }
1858 rc = wait_event_interruptible_timeout(card->wait_q,
1859 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1860 if (rc == -ERESTARTSYS)
1861 return rc;
1862 if (channel->state != CH_STATE_UP) {
1863 rc = -ETIME;
d11ba0c4 1864 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1865 } else
1866 rc = 0;
1867 return rc;
1868}
1869
1870static int qeth_idx_activate_channel(struct qeth_channel *channel,
1871 void (*idx_reply_cb)(struct qeth_channel *,
1872 struct qeth_cmd_buffer *))
1873{
1874 struct qeth_card *card;
1875 struct qeth_cmd_buffer *iob;
1876 unsigned long flags;
1877 __u16 temp;
1878 __u8 tmp;
1879 int rc;
f06f6f32 1880 struct ccw_dev_id temp_devid;
4a71df50
FB		 1881
1882 card = CARD_FROM_CDEV(channel->ccwdev);
1883
d11ba0c4 1884 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1885
1886 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1887 if (!iob)
1888 return -ENOMEM;
4a71df50 1889 iob->callback = idx_reply_cb;
f15cdaf2 1890 qeth_setup_ccw(channel->ccw, CCW_CMD_WRITE, IDX_ACTIVATE_SIZE,
45ca2fd6 1891 iob->data);
4a71df50
FB		 1892 if (channel == &card->write) {
1893 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1894 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1895 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1896 card->seqno.trans_hdr++;
1897 } else {
1898 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1899 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1900 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1901 }
92d27209 1902 tmp = ((u8)card->dev->dev_port) | 0x80;
4a71df50
FB		 1903 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1904 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1905 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1906 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1907 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1908 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1909 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1910 temp = (card->info.cula << 8) + card->info.unit_addr2;
1911 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1912
1913 wait_event(card->wait_q,
1914 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1915 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50 1916 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
f15cdaf2 1917 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 1918 (addr_t) iob, 0, 0, QETH_TIMEOUT);
4a71df50
FB		 1919 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1920
1921 if (rc) {
14cc21b6
FB		 1922 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1923 rc);
d11ba0c4 1924 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1925 atomic_set(&channel->irq_pending, 0);
1926 wake_up(&card->wait_q);
1927 return rc;
1928 }
1929 rc = wait_event_interruptible_timeout(card->wait_q,
1930 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1931 if (rc == -ERESTARTSYS)
1932 return rc;
1933 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1934 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1935 " failed to recover an error on the device\n");
1936 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1937 dev_name(&channel->ccwdev->dev));
d11ba0c4 1938 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1939 return -ETIME;
1940 }
1941 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1942}
1943
1944static int qeth_peer_func_level(int level)
1945{
1946 if ((level & 0xff) == 8)
1947 return (level & 0xff) + 0x400;
1948 if (((level >> 8) & 3) == 1)
1949 return (level & 0xff) + 0x200;
1950 return level;
1951}
1952
1953static void qeth_idx_write_cb(struct qeth_channel *channel,
1954 struct qeth_cmd_buffer *iob)
1955{
1956 struct qeth_card *card;
1957 __u16 temp;
1958
d11ba0c4 1959 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1960
1961 if (channel->state == CH_STATE_DOWN) {
1962 channel->state = CH_STATE_ACTIVATING;
1963 goto out;
1964 }
1965 card = CARD_FROM_CDEV(channel->ccwdev);
1966
1967 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1968 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
750b1625 1969 dev_err(&channel->ccwdev->dev,
74eacdb9
FB		 1970 "The adapter is used exclusively by another "
1971 "host\n");
4a71df50 1972 else
74eacdb9
FB		 1973 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1974 " negative reply\n",
750b1625 1975 dev_name(&channel->ccwdev->dev));
4a71df50
FB		 1976 goto out;
1977 }
1978 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1979 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1980 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1981 "function level mismatch (sent: 0x%x, received: "
750b1625 1982 "0x%x)\n", dev_name(&channel->ccwdev->dev),
74eacdb9 1983 card->info.func_level, temp);
4a71df50
FB		 1984 goto out;
1985 }
1986 channel->state = CH_STATE_UP;
1987out:
1988 qeth_release_buffer(channel, iob);
1989}
1990
1991static void qeth_idx_read_cb(struct qeth_channel *channel,
1992 struct qeth_cmd_buffer *iob)
1993{
1994 struct qeth_card *card;
1995 __u16 temp;
1996
d11ba0c4 1997 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1998 if (channel->state == CH_STATE_DOWN) {
1999 channel->state = CH_STATE_ACTIVATING;
2000 goto out;
2001 }
2002
2003 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 2004 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 2005 goto out;
2006
2007 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 2008 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
2009 case QETH_IDX_ACT_ERR_EXCL:
750b1625 2010 dev_err(&channel->ccwdev->dev,
74eacdb9
FB		 2011 "The adapter is used exclusively by another "
2012 "host\n");
5113fec0
UB		 2013 break;
2014 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 2015 case QETH_IDX_ACT_ERR_AUTH_USER:
750b1625 2016 dev_err(&channel->ccwdev->dev,
5113fec0 2017 "Setting the device online failed because of "
01fc3e86 2018 "insufficient authorization\n");
5113fec0
UB		 2019 break;
2020 default:
74eacdb9
FB		 2021 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
2022 " negative reply\n",
750b1625 2023 dev_name(&channel->ccwdev->dev));
5113fec0 2024 }
01fc3e86
UB		 2025 QETH_CARD_TEXT_(card, 2, "idxread%c",
2026 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 2027 goto out;
2028 }
2029
4a71df50
FB		 2030 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
2031 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 2032 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
2033 "level mismatch (sent: 0x%x, received: 0x%x)\n",
750b1625 2034 dev_name(&channel->ccwdev->dev),
74eacdb9 2035 card->info.func_level, temp);
4a71df50
FB		 2036 goto out;
2037 }
2038 memcpy(&card->token.issuer_rm_r,
2039 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2040 QETH_MPC_TOKEN_LENGTH);
2041 memcpy(&card->info.mcl_level[0],
2042 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2043 channel->state = CH_STATE_UP;
2044out:
2045 qeth_release_buffer(channel, iob);
2046}
2047
2048void qeth_prepare_control_data(struct qeth_card *card, int len,
2049 struct qeth_cmd_buffer *iob)
2050{
f15cdaf2 2051 qeth_setup_ccw(iob->channel->ccw, CCW_CMD_WRITE, len, iob->data);
4a71df50
FB		 2052 iob->callback = qeth_release_buffer;
2053
2054 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2055 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2056 card->seqno.trans_hdr++;
2057 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2058 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2059 card->seqno.pdu_hdr++;
2060 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2061 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2062 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2063}
2064EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2065
efbbc1d5
EC		 2066/**
2067 * qeth_send_control_data() - send control command to the card
2068 * @card: qeth_card structure pointer
2069 * @len: size of the command buffer
2070 * @iob: qeth_cmd_buffer pointer
2071 * @reply_cb: callback function pointer
2072 * @cb_card: pointer to the qeth_card structure
2073 * @cb_reply: pointer to the qeth_reply structure
2074 * @cb_cmd: pointer to the original iob for non-IPA
2075 * commands, or to the qeth_ipa_cmd structure
2076 * for the IPA commands.
2077 * @reply_param: private pointer passed to the callback
2078 *
2079 * Returns the value of the `return_code' field of the response
2080 * block returned from the hardware, or other error indication.
2081 * Value of zero indicates successful execution of the command.
2082 *
2083 * Callback function gets called one or more times, with cb_cmd
2084 * pointing to the response returned by the hardware. Callback
2085 * function must return non-zero if more reply blocks are expected,
2086 * and zero if the last or only reply block is received. Callback
2087 * function can get the value of the reply_param pointer from the
2088 * field 'param' of the structure qeth_reply.
2089 */
2090
4a71df50
FB		 2091int qeth_send_control_data(struct qeth_card *card, int len,
2092 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2093 int (*reply_cb)(struct qeth_card *cb_card,
2094 struct qeth_reply *cb_reply,
2095 unsigned long cb_cmd),
4a71df50
FB		 2096 void *reply_param)
2097{
750b1625 2098 struct qeth_channel *channel = iob->channel;
4a71df50
FB		 2099 int rc;
2100 unsigned long flags;
2101 struct qeth_reply *reply = NULL;
7834cd5a 2102 unsigned long timeout, event_timeout;
1c5b2216 2103 struct qeth_ipa_cmd *cmd = NULL;
4a71df50 2104
847a50fd 2105 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2106
908abbb5 2107 if (card->read_or_write_problem) {
750b1625 2108 qeth_release_buffer(channel, iob);
908abbb5
UB		 2109 return -EIO;
2110 }
4a71df50
FB		 2111 reply = qeth_alloc_reply(card);
2112 if (!reply) {
4a71df50
FB		 2113 return -ENOMEM;
2114 }
2115 reply->callback = reply_cb;
2116 reply->param = reply_param;
d22ffb5a 2117
4a71df50 2118 init_waitqueue_head(&reply->wait_q);
4a71df50 2119
750b1625 2120 while (atomic_cmpxchg(&channel->irq_pending, 0, 1)) ;
4a71df50 2121
1c5b2216
JW		 2122 if (IS_IPA(iob->data)) {
2123 cmd = __ipa_cmd(iob);
d22ffb5a
JW		 2124 cmd->hdr.seqno = card->seqno.ipa++;
2125 reply->seqno = cmd->hdr.seqno;
7834cd5a 2126 event_timeout = QETH_IPA_TIMEOUT;
1c5b2216 2127 } else {
d22ffb5a 2128 reply->seqno = QETH_IDX_COMMAND_SEQNO;
7834cd5a 2129 event_timeout = QETH_TIMEOUT;
1c5b2216 2130 }
d22ffb5a
JW		 2131 qeth_prepare_control_data(card, len, iob);
2132
2133 spin_lock_irqsave(&card->lock, flags);
2134 list_add_tail(&reply->list, &card->cmd_waiter_list);
2135 spin_unlock_irqrestore(&card->lock, flags);
1c5b2216 2136
7834cd5a 2137 timeout = jiffies + event_timeout;
4a71df50 2138
847a50fd 2139 QETH_CARD_TEXT(card, 6, "noirqpnd");
750b1625 2140 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
f15cdaf2 2141 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 2142 (addr_t) iob, 0, 0, event_timeout);
750b1625 2143 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
4a71df50 2144 if (rc) {
74eacdb9
FB		 2145 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2146 "ccw_device_start rc = %i\n",
750b1625 2147 dev_name(&channel->ccwdev->dev), rc);
847a50fd 2148 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2149 spin_lock_irqsave(&card->lock, flags);
2150 list_del_init(&reply->list);
2151 qeth_put_reply(reply);
2152 spin_unlock_irqrestore(&card->lock, flags);
750b1625
JW		 2153 qeth_release_buffer(channel, iob);
2154 atomic_set(&channel->irq_pending, 0);
4a71df50
FB		 2155 wake_up(&card->wait_q);
2156 return rc;
2157 }
5b54e16f
FB		 2158
2159 /* we have only one long running ipassist, since we can ensure
2160 process context of this command we can sleep */
1c5b2216
JW		 2161 if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
2162 cmd->hdr.prot_version == QETH_PROT_IPV4) {
5b54e16f 2163 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2164 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2165 goto time_err;
2166 } else {
2167 while (!atomic_read(&reply->received)) {
2168 if (time_after(jiffies, timeout))
2169 goto time_err;
2170 cpu_relax();
6531084c 2171 }
5b54e16f
FB		 2172 }
2173
2174 rc = reply->rc;
2175 qeth_put_reply(reply);
2176 return rc;
2177
2178time_err:
70919e23 2179 reply->rc = -ETIME;
5b54e16f
FB		 2180 spin_lock_irqsave(&reply->card->lock, flags);
2181 list_del_init(&reply->list);
2182 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2183 atomic_inc(&reply->received);
4a71df50
FB		 2184 rc = reply->rc;
2185 qeth_put_reply(reply);
2186 return rc;
2187}
2188EXPORT_SYMBOL_GPL(qeth_send_control_data);
2189
2190static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2191 unsigned long data)
2192{
2193 struct qeth_cmd_buffer *iob;
2194
d11ba0c4 2195 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2196
2197 iob = (struct qeth_cmd_buffer *) data;
2198 memcpy(&card->token.cm_filter_r,
2199 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2200 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2201 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2202 return 0;
2203}
2204
2205static int qeth_cm_enable(struct qeth_card *card)
2206{
2207 int rc;
2208 struct qeth_cmd_buffer *iob;
2209
d11ba0c4 2210 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2211
2212 iob = qeth_wait_for_buffer(&card->write);
2213 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2214 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2215 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2216 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2217 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2218
2219 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2220 qeth_cm_enable_cb, NULL);
2221 return rc;
2222}
2223
2224static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2225 unsigned long data)
2226{
2227
2228 struct qeth_cmd_buffer *iob;
2229
d11ba0c4 2230 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2231
2232 iob = (struct qeth_cmd_buffer *) data;
2233 memcpy(&card->token.cm_connection_r,
2234 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2235 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2236 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2237 return 0;
2238}
2239
2240static int qeth_cm_setup(struct qeth_card *card)
2241{
2242 int rc;
2243 struct qeth_cmd_buffer *iob;
2244
d11ba0c4 2245 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2246
2247 iob = qeth_wait_for_buffer(&card->write);
2248 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2249 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2250 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2251 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2252 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2253 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2254 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2255 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2256 qeth_cm_setup_cb, NULL);
2257 return rc;
2258
2259}
2260
8ce7a9e0 2261static int qeth_update_max_mtu(struct qeth_card *card, unsigned int max_mtu)
4a71df50 2262{
8ce7a9e0
JW		 2263 struct net_device *dev = card->dev;
2264 unsigned int new_mtu;
2265
2266 if (!max_mtu) {
2267 /* IQD needs accurate max MTU to set up its RX buffers: */
2268 if (IS_IQD(card))
2269 return -EINVAL;
2270 /* tolerate quirky HW: */
2271 max_mtu = ETH_MAX_MTU;
2272 }
2273
2274 rtnl_lock();
2275 if (IS_IQD(card)) {
2276 /* move any device with default MTU to new max MTU: */
2277 new_mtu = (dev->mtu == dev->max_mtu) ? max_mtu : dev->mtu;
2278
2279 /* adjust RX buffer size to new max MTU: */
2280 card->qdio.in_buf_size = max_mtu + 2 * PAGE_SIZE;
2281 if (dev->max_mtu && dev->max_mtu != max_mtu)
2282 qeth_free_qdio_buffers(card);
2283 } else {
2284 if (dev->mtu)
2285 new_mtu = dev->mtu;
2286 /* default MTUs for first setup: */
2287 else if (card->options.layer2)
2288 new_mtu = ETH_DATA_LEN;
2289 else
2290 new_mtu = ETH_DATA_LEN - 8; /* allow for LLC + SNAP */
4a71df50 2291 }
8ce7a9e0
JW		 2292
2293 dev->max_mtu = max_mtu;
2294 dev->mtu = min(new_mtu, max_mtu);
2295 rtnl_unlock();
2296 return 0;
4a71df50
FB		 2297}
2298
cef6ff22 2299static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2300{
2301 switch (framesize) {
2302 case 0x4000:
2303 return 8192;
2304 case 0x6000:
2305 return 16384;
2306 case 0xa000:
2307 return 32768;
2308 case 0xffff:
2309 return 57344;
2310 default:
2311 return 0;
2312 }
2313}
2314
4a71df50
FB		 2315static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2316 unsigned long data)
2317{
2318
2319 __u16 mtu, framesize;
2320 __u16 len;
2321 __u8 link_type;
2322 struct qeth_cmd_buffer *iob;
2323
d11ba0c4 2324 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2325
2326 iob = (struct qeth_cmd_buffer *) data;
2327 memcpy(&card->token.ulp_filter_r,
2328 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2329 QETH_MPC_TOKEN_LENGTH);
9853b97b 2330 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2331 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2332 mtu = qeth_get_mtu_outof_framesize(framesize);
4a71df50 2333 } else {
8ce7a9e0 2334 mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data);
4a71df50 2335 }
8ce7a9e0 2336 *(u16 *)reply->param = mtu;
4a71df50
FB		 2337
2338 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2339 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2340 memcpy(&link_type,
2341 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2342 card->info.link_type = link_type;
2343 } else
2344 card->info.link_type = 0;
01fc3e86 2345 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2346 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2347 return 0;
2348}
2349
73657a3e
JW		 2350static u8 qeth_mpc_select_prot_type(struct qeth_card *card)
2351{
2352 if (IS_OSN(card))
2353 return QETH_PROT_OSN2;
2354 return (card->options.layer2 == 1) ? QETH_PROT_LAYER2 : QETH_PROT_TCPIP;
2355}
2356
4a71df50
FB		 2357static int qeth_ulp_enable(struct qeth_card *card)
2358{
73657a3e 2359 u8 prot_type = qeth_mpc_select_prot_type(card);
4a71df50 2360 struct qeth_cmd_buffer *iob;
8ce7a9e0 2361 u16 max_mtu;
73657a3e 2362 int rc;
4a71df50
FB		 2363
2364 /*FIXME: trace view callbacks*/
d11ba0c4 2365 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2366
2367 iob = qeth_wait_for_buffer(&card->write);
2368 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2369
92d27209 2370 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = (u8) card->dev->dev_port;
4a71df50
FB		 2371 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2372 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2373 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2374 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2375 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50 2376 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
8ce7a9e0
JW		 2377 qeth_ulp_enable_cb, &max_mtu);
2378 if (rc)
2379 return rc;
2380 return qeth_update_max_mtu(card, max_mtu);
4a71df50
FB		 2381}
2382
2383static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2384 unsigned long data)
2385{
2386 struct qeth_cmd_buffer *iob;
2387
d11ba0c4 2388 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2389
2390 iob = (struct qeth_cmd_buffer *) data;
2391 memcpy(&card->token.ulp_connection_r,
2392 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2393 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2394 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2395 3)) {
2396 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2397 dev_err(&card->gdev->dev, "A connection could not be "
2398 "established because of an OLM limit\n");
bbb822a8 2399 iob->rc = -EMLINK;
65a1f898 2400 }
d11ba0c4 2401 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2402 return 0;
4a71df50
FB		 2403}
2404
2405static int qeth_ulp_setup(struct qeth_card *card)
2406{
2407 int rc;
2408 __u16 temp;
2409 struct qeth_cmd_buffer *iob;
2410 struct ccw_dev_id dev_id;
2411
d11ba0c4 2412 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2413
2414 iob = qeth_wait_for_buffer(&card->write);
2415 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2416
2417 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2418 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2419 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2420 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2421 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2422 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2423
2424 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2425 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2426 temp = (card->info.cula << 8) + card->info.unit_addr2;
2427 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2428 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2429 qeth_ulp_setup_cb, NULL);
2430 return rc;
2431}
2432
0da9581d
EL		 2433static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2434{
0da9581d
EL		 2435 struct qeth_qdio_out_buffer *newbuf;
2436
0da9581d 2437 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
3b346c18
JW		 2438 if (!newbuf)
2439 return -ENOMEM;
2440
d445a4e2 2441 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2442 skb_queue_head_init(&newbuf->skb_list);
2443 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2444 newbuf->q = q;
0da9581d
EL		 2445 newbuf->next_pending = q->bufs[bidx];
2446 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2447 q->bufs[bidx] = newbuf;
3b346c18 2448 return 0;
0da9581d
EL		 2449}
2450
d445a4e2
SO		 2451static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2452{
2453 if (!q)
2454 return;
2455
2456 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2457 kfree(q);
2458}
2459
2460static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2461{
2462 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2463
2464 if (!q)
2465 return NULL;
2466
2467 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2468 kfree(q);
2469 return NULL;
2470 }
2471 return q;
2472}
0da9581d 2473
4a71df50
FB		 2474static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2475{
2476 int i, j;
2477
d11ba0c4 2478 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2479
2480 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2481 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2482 return 0;
2483
4601ba6c
SO		 2484 QETH_DBF_TEXT(SETUP, 2, "inq");
2485 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2486 if (!card->qdio.in_q)
2487 goto out_nomem;
4601ba6c 2488
4a71df50
FB		 2489 /* inbound buffer pool */
2490 if (qeth_alloc_buffer_pool(card))
2491 goto out_freeinq;
0da9581d 2492
4a71df50
FB		 2493 /* outbound */
2494 card->qdio.out_qs =
6396bb22
KC		 2495 kcalloc(card->qdio.no_out_queues,
2496 sizeof(struct qeth_qdio_out_q *),
2497 GFP_KERNEL);
4a71df50
FB		 2498 if (!card->qdio.out_qs)
2499 goto out_freepool;
2500 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2501 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2502 if (!card->qdio.out_qs[i])
2503 goto out_freeoutq;
d11ba0c4
PT		 2504 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2505 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2506 card->qdio.out_qs[i]->queue_no = i;
2507 /* give outbound qeth_qdio_buffers their qdio_buffers */
2508 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2509 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2510 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2511 goto out_freeoutqbufs;
4a71df50
FB		 2512 }
2513 }
0da9581d
EL		 2514
2515 /* completion */
2516 if (qeth_alloc_cq(card))
2517 goto out_freeoutq;
2518
4a71df50
FB		 2519 return 0;
2520
0da9581d
EL		 2521out_freeoutqbufs:
2522 while (j > 0) {
2523 --j;
2524 kmem_cache_free(qeth_qdio_outbuf_cache,
2525 card->qdio.out_qs[i]->bufs[j]);
2526 card->qdio.out_qs[i]->bufs[j] = NULL;
2527 }
4a71df50 2528out_freeoutq:
0da9581d 2529 while (i > 0) {
d445a4e2 2530 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2531 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2532 }
4a71df50
FB		 2533 kfree(card->qdio.out_qs);
2534 card->qdio.out_qs = NULL;
2535out_freepool:
2536 qeth_free_buffer_pool(card);
2537out_freeinq:
4601ba6c 2538 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2539 card->qdio.in_q = NULL;
2540out_nomem:
2541 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2542 return -ENOMEM;
2543}
2544
d445a4e2
SO		 2545static void qeth_free_qdio_buffers(struct qeth_card *card)
2546{
2547 int i, j;
2548
2549 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2550 QETH_QDIO_UNINITIALIZED)
2551 return;
2552
2553 qeth_free_cq(card);
2554 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2555 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2556 if (card->qdio.in_q->bufs[j].rx_skb)
2557 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2558 }
2559 qeth_free_qdio_queue(card->qdio.in_q);
2560 card->qdio.in_q = NULL;
2561 /* inbound buffer pool */
2562 qeth_free_buffer_pool(card);
2563 /* free outbound qdio_qs */
2564 if (card->qdio.out_qs) {
2565 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2566 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2567 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2568 }
2569 kfree(card->qdio.out_qs);
2570 card->qdio.out_qs = NULL;
2571 }
2572}
2573
4a71df50
FB		 2574static void qeth_create_qib_param_field(struct qeth_card *card,
2575 char *param_field)
2576{
2577
2578 param_field[0] = _ascebc['P'];
2579 param_field[1] = _ascebc['C'];
2580 param_field[2] = _ascebc['I'];
2581 param_field[3] = _ascebc['T'];
2582 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2583 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2584 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2585}
2586
2587static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2588 char *param_field)
2589{
2590 param_field[16] = _ascebc['B'];
2591 param_field[17] = _ascebc['L'];
2592 param_field[18] = _ascebc['K'];
2593 param_field[19] = _ascebc['T'];
2594 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2595 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2596 *((unsigned int *) (&param_field[28])) =
2597 card->info.blkt.inter_packet_jumbo;
2598}
2599
2600static int qeth_qdio_activate(struct qeth_card *card)
2601{
d11ba0c4 2602 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2603 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2604}
2605
2606static int qeth_dm_act(struct qeth_card *card)
2607{
2608 int rc;
2609 struct qeth_cmd_buffer *iob;
2610
d11ba0c4 2611 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2612
2613 iob = qeth_wait_for_buffer(&card->write);
2614 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2615
2616 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2617 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2618 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2619 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2620 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2621 return rc;
2622}
2623
2624static int qeth_mpc_initialize(struct qeth_card *card)
2625{
2626 int rc;
2627
d11ba0c4 2628 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2629
2630 rc = qeth_issue_next_read(card);
2631 if (rc) {
d11ba0c4 2632 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2633 return rc;
2634 }
2635 rc = qeth_cm_enable(card);
2636 if (rc) {
d11ba0c4 2637 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2638 goto out_qdio;
2639 }
2640 rc = qeth_cm_setup(card);
2641 if (rc) {
d11ba0c4 2642 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2643 goto out_qdio;
2644 }
2645 rc = qeth_ulp_enable(card);
2646 if (rc) {
d11ba0c4 2647 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2648 goto out_qdio;
2649 }
2650 rc = qeth_ulp_setup(card);
2651 if (rc) {
d11ba0c4 2652 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2653 goto out_qdio;
2654 }
2655 rc = qeth_alloc_qdio_buffers(card);
2656 if (rc) {
d11ba0c4 2657 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2658 goto out_qdio;
2659 }
2660 rc = qeth_qdio_establish(card);
2661 if (rc) {
d11ba0c4 2662 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2663 qeth_free_qdio_buffers(card);
2664 goto out_qdio;
2665 }
2666 rc = qeth_qdio_activate(card);
2667 if (rc) {
d11ba0c4 2668 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2669 goto out_qdio;
2670 }
2671 rc = qeth_dm_act(card);
2672 if (rc) {
d11ba0c4 2673 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2674 goto out_qdio;
2675 }
2676
2677 return 0;
2678out_qdio:
2679 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2680 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2681 return rc;
2682}
2683
4a71df50
FB		 2684void qeth_print_status_message(struct qeth_card *card)
2685{
2686 switch (card->info.type) {
5113fec0
UB		 2687 case QETH_CARD_TYPE_OSD:
2688 case QETH_CARD_TYPE_OSM:
2689 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2690 /* VM will use a non-zero first character
2691 * to indicate a HiperSockets like reporting
2692 * of the level OSA sets the first character to zero
2693 * */
2694 if (!card->info.mcl_level[0]) {
2695 sprintf(card->info.mcl_level, "%02x%02x",
2696 card->info.mcl_level[2],
2697 card->info.mcl_level[3]);
4a71df50
FB		 2698 break;
2699 }
2700 /* fallthrough */
2701 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2702 if ((card->info.guestlan) ||
2703 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2704 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2705 card->info.mcl_level[0]];
2706 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2707 card->info.mcl_level[1]];
2708 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2709 card->info.mcl_level[2]];
2710 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2711 card->info.mcl_level[3]];
2712 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2713 }
2714 break;
2715 default:
2716 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2717 }
239ff408
UB		 2718 dev_info(&card->gdev->dev,
2719 "Device is a%s card%s%s%s\nwith link type %s.\n",
2720 qeth_get_cardname(card),
2721 (card->info.mcl_level[0]) ? " (level: " : "",
2722 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2723 (card->info.mcl_level[0]) ? ")" : "",
2724 qeth_get_cardname_short(card));
4a71df50
FB		 2725}
2726EXPORT_SYMBOL_GPL(qeth_print_status_message);
2727
4a71df50
FB		 2728static void qeth_initialize_working_pool_list(struct qeth_card *card)
2729{
2730 struct qeth_buffer_pool_entry *entry;
2731
847a50fd 2732 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2733
2734 list_for_each_entry(entry,
2735 &card->qdio.init_pool.entry_list, init_list) {
2736 qeth_put_buffer_pool_entry(card, entry);
2737 }
2738}
2739
cef6ff22
JW		 2740static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2741 struct qeth_card *card)
4a71df50
FB		 2742{
2743 struct list_head *plh;
2744 struct qeth_buffer_pool_entry *entry;
2745 int i, free;
2746 struct page *page;
2747
2748 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2749 return NULL;
2750
2751 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2752 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2753 free = 1;
2754 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2755 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2756 free = 0;
2757 break;
2758 }
2759 }
2760 if (free) {
2761 list_del_init(&entry->list);
2762 return entry;
2763 }
2764 }
2765
2766 /* no free buffer in pool so take first one and swap pages */
2767 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2768 struct qeth_buffer_pool_entry, list);
2769 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2770 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2771 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2772 if (!page) {
2773 return NULL;
2774 } else {
2775 free_page((unsigned long)entry->elements[i]);
2776 entry->elements[i] = page_address(page);
2777 if (card->options.performance_stats)
2778 card->perf_stats.sg_alloc_page_rx++;
2779 }
2780 }
2781 }
2782 list_del_init(&entry->list);
2783 return entry;
2784}
2785
2786static int qeth_init_input_buffer(struct qeth_card *card,
2787 struct qeth_qdio_buffer *buf)
2788{
2789 struct qeth_buffer_pool_entry *pool_entry;
2790 int i;
2791
b3332930 2792 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
37cf05d2
JW		 2793 buf->rx_skb = netdev_alloc_skb(card->dev,
2794 QETH_RX_PULL_LEN + ETH_HLEN);
b3332930
FB		 2795 if (!buf->rx_skb)
2796 return 1;
2797 }
2798
4a71df50
FB		 2799 pool_entry = qeth_find_free_buffer_pool_entry(card);
2800 if (!pool_entry)
2801 return 1;
2802
2803 /*
2804 * since the buffer is accessed only from the input_tasklet
2805 * there shouldn't be a need to synchronize; also, since we use
2806 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2807 * buffers
2808 */
4a71df50
FB		 2809
2810 buf->pool_entry = pool_entry;
2811 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2812 buf->buffer->element[i].length = PAGE_SIZE;
2813 buf->buffer->element[i].addr = pool_entry->elements[i];
2814 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2815 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2816 else
3ec90878
JG		 2817 buf->buffer->element[i].eflags = 0;
2818 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2819 }
2820 return 0;
2821}
2822
2823int qeth_init_qdio_queues(struct qeth_card *card)
2824{
2825 int i, j;
2826 int rc;
2827
d11ba0c4 2828 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2829
2830 /* inbound queue */
1b45c80b
JW		 2831 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2832 memset(&card->rx, 0, sizeof(struct qeth_rx));
4a71df50
FB		 2833 qeth_initialize_working_pool_list(card);
2834 /*give only as many buffers to hardware as we have buffer pool entries*/
2835 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2836 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2837 card->qdio.in_q->next_buf_to_init =
2838 card->qdio.in_buf_pool.buf_count - 1;
2839 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2840 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2841 if (rc) {
d11ba0c4 2842 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2843 return rc;
2844 }
0da9581d
EL		 2845
2846 /* completion */
2847 rc = qeth_cq_init(card);
2848 if (rc) {
2849 return rc;
2850 }
2851
4a71df50
FB		 2852 /* outbound queue */
2853 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2854 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2855 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2856 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2857 qeth_clear_output_buffer(card->qdio.out_qs[i],
3b346c18 2858 card->qdio.out_qs[i]->bufs[j]);
4a71df50
FB		 2859 }
2860 card->qdio.out_qs[i]->card = card;
2861 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2862 card->qdio.out_qs[i]->do_pack = 0;
2863 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2864 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2865 atomic_set(&card->qdio.out_qs[i]->state,
2866 QETH_OUT_Q_UNLOCKED);
2867 }
2868 return 0;
2869}
2870EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2871
cef6ff22 2872static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2873{
2874 switch (link_type) {
2875 case QETH_LINK_TYPE_HSTR:
2876 return 2;
2877 default:
2878 return 1;
2879 }
2880}
2881
2882static void qeth_fill_ipacmd_header(struct qeth_card *card,
2883 struct qeth_ipa_cmd *cmd, __u8 command,
2884 enum qeth_prot_versions prot)
2885{
2886 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2887 cmd->hdr.command = command;
2888 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
d22ffb5a 2889 /* cmd->hdr.seqno is set by qeth_send_control_data() */
4a71df50 2890 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
92d27209 2891 cmd->hdr.rel_adapter_no = (u8) card->dev->dev_port;
4a71df50
FB		 2892 if (card->options.layer2)
2893 cmd->hdr.prim_version_no = 2;
2894 else
2895 cmd->hdr.prim_version_no = 1;
2896 cmd->hdr.param_count = 1;
2897 cmd->hdr.prot_version = prot;
2898 cmd->hdr.ipa_supported = 0;
2899 cmd->hdr.ipa_enabled = 0;
2900}
2901
2902struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2903 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2904{
2905 struct qeth_cmd_buffer *iob;
4a71df50 2906
1aec42bc
TR		 2907 iob = qeth_get_buffer(&card->write);
2908 if (iob) {
ff5caa7a 2909 qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
1aec42bc
TR		 2910 } else {
2911 dev_warn(&card->gdev->dev,
2912 "The qeth driver ran out of channel command buffers\n");
2913 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2914 dev_name(&card->gdev->dev));
2915 }
4a71df50
FB		 2916
2917 return iob;
2918}
2919EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2920
73657a3e 2921void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob)
4a71df50 2922{
73657a3e
JW		 2923 u8 prot_type = qeth_mpc_select_prot_type(card);
2924
4a71df50
FB		 2925 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2926 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2927 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2928 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2929}
2930EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2931
efbbc1d5
EC		 2932/**
2933 * qeth_send_ipa_cmd() - send an IPA command
2934 *
2935 * See qeth_send_control_data() for explanation of the arguments.
2936 */
2937
4a71df50
FB		 2938int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2939 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2940 unsigned long),
2941 void *reply_param)
2942{
2943 int rc;
4a71df50 2944
847a50fd 2945 QETH_CARD_TEXT(card, 4, "sendipa");
73657a3e 2946 qeth_prepare_ipa_cmd(card, iob);
d11ba0c4
PT		 2947 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2948 iob, reply_cb, reply_param);
908abbb5
UB		 2949 if (rc == -ETIME) {
2950 qeth_clear_ipacmd_list(card);
2951 qeth_schedule_recovery(card);
2952 }
4a71df50
FB		 2953 return rc;
2954}
2955EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2956
10340510 2957static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 2958{
2959 int rc;
70919e23 2960 struct qeth_cmd_buffer *iob;
4a71df50 2961
d11ba0c4 2962 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2963
70919e23 2964 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2965 if (!iob)
2966 return -ENOMEM;
70919e23 2967 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2968 return rc;
2969}
4a71df50 2970
686c97ee 2971static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
4a71df50 2972{
686c97ee 2973 if (!cmd->hdr.return_code)
4a71df50
FB		 2974 cmd->hdr.return_code =
2975 cmd->data.setadapterparms.hdr.return_code;
686c97ee 2976 return cmd->hdr.return_code;
4a71df50 2977}
4a71df50
FB		 2978
2979static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2980 struct qeth_reply *reply, unsigned long data)
2981{
686c97ee 2982 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50 2983
847a50fd 2984 QETH_CARD_TEXT(card, 3, "quyadpcb");
686c97ee
JW		 2985 if (qeth_setadpparms_inspect_rc(cmd))
2986 return 0;
4a71df50 2987
5113fec0 2988 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2989 card->info.link_type =
2990 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2991 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2992 }
4a71df50
FB		 2993 card->options.adp.supported_funcs =
2994 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
686c97ee 2995 return 0;
4a71df50
FB		 2996}
2997
eb3fb0ba 2998static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2999 __u32 command, __u32 cmdlen)
3000{
3001 struct qeth_cmd_buffer *iob;
3002 struct qeth_ipa_cmd *cmd;
3003
3004 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3005 QETH_PROT_IPV4);
1aec42bc 3006 if (iob) {
ff5caa7a 3007 cmd = __ipa_cmd(iob);
1aec42bc
TR		 3008 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3009 cmd->data.setadapterparms.hdr.command_code = command;
3010 cmd->data.setadapterparms.hdr.used_total = 1;
3011 cmd->data.setadapterparms.hdr.seq_no = 1;
3012 }
4a71df50
FB		 3013
3014 return iob;
3015}
4a71df50 3016
09960b3a 3017static int qeth_query_setadapterparms(struct qeth_card *card)
4a71df50
FB		 3018{
3019 int rc;
3020 struct qeth_cmd_buffer *iob;
3021
847a50fd 3022 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3023 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3024 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3025 if (!iob)
3026 return -ENOMEM;
4a71df50
FB		 3027 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3028 return rc;
3029}
4a71df50 3030
1da74b1c
FB		 3031static int qeth_query_ipassists_cb(struct qeth_card *card,
3032 struct qeth_reply *reply, unsigned long data)
3033{
3034 struct qeth_ipa_cmd *cmd;
3035
3036 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3037
3038 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3039
3040 switch (cmd->hdr.return_code) {
3041 case IPA_RC_NOTSUPP:
3042 case IPA_RC_L2_UNSUPPORTED_CMD:
3043 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3044 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3045 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3046 return -0;
3047 default:
3048 if (cmd->hdr.return_code) {
3049 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3050 "rc=%d\n",
3051 dev_name(&card->gdev->dev),
3052 cmd->hdr.return_code);
3053 return 0;
3054 }
3055 }
3056
1da74b1c
FB		 3057 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3058 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3059 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3060 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3061 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3062 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3063 } else
3064 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3065 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3066 return 0;
3067}
3068
09960b3a
JW		 3069static int qeth_query_ipassists(struct qeth_card *card,
3070 enum qeth_prot_versions prot)
1da74b1c
FB		 3071{
3072 int rc;
3073 struct qeth_cmd_buffer *iob;
3074
3075 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3076 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3077 if (!iob)
3078 return -ENOMEM;
1da74b1c
FB		 3079 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3080 return rc;
3081}
1da74b1c 3082
45cbb2e4
SR		 3083static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3084 struct qeth_reply *reply, unsigned long data)
3085{
686c97ee 3086 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
45cbb2e4 3087 struct qeth_query_switch_attributes *attrs;
686c97ee 3088 struct qeth_switch_info *sw_info;
45cbb2e4
SR		 3089
3090 QETH_CARD_TEXT(card, 2, "qswiatcb");
686c97ee
JW		 3091 if (qeth_setadpparms_inspect_rc(cmd))
3092 return 0;
45cbb2e4 3093
686c97ee
JW		 3094 sw_info = (struct qeth_switch_info *)reply->param;
3095 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3096 sw_info->capabilities = attrs->capabilities;
3097 sw_info->settings = attrs->settings;
3098 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3099 sw_info->settings);
45cbb2e4
SR		 3100 return 0;
3101}
3102
3103int qeth_query_switch_attributes(struct qeth_card *card,
3104 struct qeth_switch_info *sw_info)
3105{
3106 struct qeth_cmd_buffer *iob;
3107
3108 QETH_CARD_TEXT(card, 2, "qswiattr");
3109 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3110 return -EOPNOTSUPP;
3111 if (!netif_carrier_ok(card->dev))
3112 return -ENOMEDIUM;
3113 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3114 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3115 if (!iob)
3116 return -ENOMEM;
45cbb2e4
SR		 3117 return qeth_send_ipa_cmd(card, iob,
3118 qeth_query_switch_attributes_cb, sw_info);
3119}
45cbb2e4 3120
1da74b1c
FB		 3121static int qeth_query_setdiagass_cb(struct qeth_card *card,
3122 struct qeth_reply *reply, unsigned long data)
3123{
3124 struct qeth_ipa_cmd *cmd;
3125 __u16 rc;
3126
3127 cmd = (struct qeth_ipa_cmd *)data;
3128 rc = cmd->hdr.return_code;
3129 if (rc)
3130 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3131 else
3132 card->info.diagass_support = cmd->data.diagass.ext;
3133 return 0;
3134}
3135
3136static int qeth_query_setdiagass(struct qeth_card *card)
3137{
3138 struct qeth_cmd_buffer *iob;
3139 struct qeth_ipa_cmd *cmd;
3140
3141 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3142 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3143 if (!iob)
3144 return -ENOMEM;
ff5caa7a 3145 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3146 cmd->data.diagass.subcmd_len = 16;
3147 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3148 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3149}
3150
3151static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3152{
3153 unsigned long info = get_zeroed_page(GFP_KERNEL);
3154 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3155 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3156 struct ccw_dev_id ccwid;
caf757c6 3157 int level;
1da74b1c
FB		 3158
3159 tid->chpid = card->info.chpid;
3160 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3161 tid->ssid = ccwid.ssid;
3162 tid->devno = ccwid.devno;
3163 if (!info)
3164 return;
caf757c6
HC		 3165 level = stsi(NULL, 0, 0, 0);
3166 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3167 tid->lparnr = info222->lpar_number;
caf757c6 3168 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3169 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3170 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3171 }
3172 free_page(info);
3173 return;
3174}
3175
3176static int qeth_hw_trap_cb(struct qeth_card *card,
3177 struct qeth_reply *reply, unsigned long data)
3178{
3179 struct qeth_ipa_cmd *cmd;
3180 __u16 rc;
3181
3182 cmd = (struct qeth_ipa_cmd *)data;
3183 rc = cmd->hdr.return_code;
3184 if (rc)
3185 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3186 return 0;
3187}
3188
3189int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3190{
3191 struct qeth_cmd_buffer *iob;
3192 struct qeth_ipa_cmd *cmd;
3193
3194 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3195 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3196 if (!iob)
3197 return -ENOMEM;
ff5caa7a 3198 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3199 cmd->data.diagass.subcmd_len = 80;
3200 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3201 cmd->data.diagass.type = 1;
3202 cmd->data.diagass.action = action;
3203 switch (action) {
3204 case QETH_DIAGS_TRAP_ARM:
3205 cmd->data.diagass.options = 0x0003;
3206 cmd->data.diagass.ext = 0x00010000 +
3207 sizeof(struct qeth_trap_id);
3208 qeth_get_trap_id(card,
3209 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3210 break;
3211 case QETH_DIAGS_TRAP_DISARM:
3212 cmd->data.diagass.options = 0x0001;
3213 break;
3214 case QETH_DIAGS_TRAP_CAPTURE:
3215 break;
3216 }
3217 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3218}
3219EXPORT_SYMBOL_GPL(qeth_hw_trap);
3220
d73ef324
JW		 3221static int qeth_check_qdio_errors(struct qeth_card *card,
3222 struct qdio_buffer *buf,
3223 unsigned int qdio_error,
3224 const char *dbftext)
4a71df50 3225{
779e6e1c 3226 if (qdio_error) {
847a50fd 3227 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3228 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3229 buf->element[15].sflags);
38593d01 3230 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3231 buf->element[14].sflags);
38593d01 3232 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3233 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3234 card->stats.rx_dropped++;
3235 return 0;
3236 } else
3237 return 1;
4a71df50
FB		 3238 }
3239 return 0;
3240}
4a71df50 3241
d73ef324 3242static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3243{
3244 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3245 struct list_head *lh;
4a71df50
FB		 3246 int count;
3247 int i;
3248 int rc;
3249 int newcount = 0;
3250
4a71df50
FB		 3251 count = (index < queue->next_buf_to_init)?
3252 card->qdio.in_buf_pool.buf_count -
3253 (queue->next_buf_to_init - index) :
3254 card->qdio.in_buf_pool.buf_count -
3255 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3256 /* only requeue at a certain threshold to avoid SIGAs */
3257 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3258 for (i = queue->next_buf_to_init;
3259 i < queue->next_buf_to_init + count; ++i) {
3260 if (qeth_init_input_buffer(card,
3261 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3262 break;
3263 } else {
3264 newcount++;
3265 }
3266 }
3267
3268 if (newcount < count) {
3269 /* we are in memory shortage so we switch back to
3270 traditional skb allocation and drop packages */
4a71df50
FB		 3271 atomic_set(&card->force_alloc_skb, 3);
3272 count = newcount;
3273 } else {
4a71df50
FB		 3274 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3275 }
3276
b3332930
FB		 3277 if (!count) {
3278 i = 0;
3279 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3280 i++;
3281 if (i == card->qdio.in_buf_pool.buf_count) {
3282 QETH_CARD_TEXT(card, 2, "qsarbw");
3283 card->reclaim_index = index;
3284 schedule_delayed_work(
3285 &card->buffer_reclaim_work,
3286 QETH_RECLAIM_WORK_TIME);
3287 }
3288 return;
3289 }
3290
4a71df50
FB		 3291 /*
3292 * according to old code it should be avoided to requeue all
3293 * 128 buffers in order to benefit from PCI avoidance.
3294 * this function keeps at least one buffer (the buffer at
3295 * 'index') un-requeued -> this buffer is the first buffer that
3296 * will be requeued the next time
3297 */
3298 if (card->options.performance_stats) {
3299 card->perf_stats.inbound_do_qdio_cnt++;
3300 card->perf_stats.inbound_do_qdio_start_time =
3301 qeth_get_micros();
3302 }
779e6e1c
JG		 3303 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3304 queue->next_buf_to_init, count);
4a71df50
FB		 3305 if (card->options.performance_stats)
3306 card->perf_stats.inbound_do_qdio_time +=
3307 qeth_get_micros() -
3308 card->perf_stats.inbound_do_qdio_start_time;
3309 if (rc) {
847a50fd 3310 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3311 }
3312 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3313 QDIO_MAX_BUFFERS_PER_Q;
3314 }
3315}
d73ef324
JW		 3316
3317static void qeth_buffer_reclaim_work(struct work_struct *work)
3318{
3319 struct qeth_card *card = container_of(work, struct qeth_card,
3320 buffer_reclaim_work.work);
3321
3322 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3323 qeth_queue_input_buffer(card, card->reclaim_index);
3324}
4a71df50 3325
d7a39937 3326static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3327 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3328{
3ec90878 3329 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3330
847a50fd 3331 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3332 if (card->info.type == QETH_CARD_TYPE_IQD) {
3333 if (sbalf15 == 0) {
3334 qdio_err = 0;
3335 } else {
3336 qdio_err = 1;
3337 }
3338 }
76b11f8e 3339 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3340
3341 if (!qdio_err)
d7a39937 3342 return;
d303b6fd
JG		 3343
3344 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3345 return;
d303b6fd 3346
847a50fd
CO		 3347 QETH_CARD_TEXT(card, 1, "lnkfail");
3348 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3349 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3350}
3351
664e42ac
JW		 3352/**
3353 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3354 * @queue: queue to check for packing buffer
3355 *
3356 * Returns number of buffers that were prepared for flush.
3357 */
3358static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3359{
3360 struct qeth_qdio_out_buffer *buffer;
3361
3362 buffer = queue->bufs[queue->next_buf_to_fill];
3363 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3364 (buffer->next_element_to_fill > 0)) {
3365 /* it's a packing buffer */
3366 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3367 queue->next_buf_to_fill =
3368 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3369 return 1;
3370 }
3371 return 0;
3372}
3373
4a71df50
FB		 3374/*
3375 * Switched to packing state if the number of used buffers on a queue
3376 * reaches a certain limit.
3377 */
3378static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3379{
3380 if (!queue->do_pack) {
3381 if (atomic_read(&queue->used_buffers)
3382 >= QETH_HIGH_WATERMARK_PACK){
3383 /* switch non-PACKING -> PACKING */
847a50fd 3384 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3385 if (queue->card->options.performance_stats)
3386 queue->card->perf_stats.sc_dp_p++;
3387 queue->do_pack = 1;
3388 }
3389 }
3390}
3391
3392/*
3393 * Switches from packing to non-packing mode. If there is a packing
3394 * buffer on the queue this buffer will be prepared to be flushed.
3395 * In that case 1 is returned to inform the caller. If no buffer
3396 * has to be flushed, zero is returned.
3397 */
3398static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3399{
4a71df50
FB		 3400 if (queue->do_pack) {
3401 if (atomic_read(&queue->used_buffers)
3402 <= QETH_LOW_WATERMARK_PACK) {
3403 /* switch PACKING -> non-PACKING */
847a50fd 3404 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3405 if (queue->card->options.performance_stats)
3406 queue->card->perf_stats.sc_p_dp++;
3407 queue->do_pack = 0;
664e42ac 3408 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3409 }
3410 }
4a71df50
FB		 3411 return 0;
3412}
3413
779e6e1c
JG		 3414static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3415 int count)
4a71df50
FB		 3416{
3417 struct qeth_qdio_out_buffer *buf;
3418 int rc;
3419 int i;
3420 unsigned int qdio_flags;
3421
4a71df50 3422 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3423 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3424 buf = queue->bufs[bidx];
3ec90878
JG		 3425 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3426 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3427
0da9581d
EL		 3428 if (queue->bufstates)
3429 queue->bufstates[bidx].user = buf;
3430
4a71df50
FB		 3431 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3432 continue;
3433
3434 if (!queue->do_pack) {
3435 if ((atomic_read(&queue->used_buffers) >=
3436 (QETH_HIGH_WATERMARK_PACK -
3437 QETH_WATERMARK_PACK_FUZZ)) &&
3438 !atomic_read(&queue->set_pci_flags_count)) {
3439 /* it's likely that we'll go to packing
3440 * mode soon */
3441 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3442 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3443 }
3444 } else {
3445 if (!atomic_read(&queue->set_pci_flags_count)) {
3446 /*
3447 * there's no outstanding PCI any more, so we
3448 * have to request a PCI to be sure the the PCI
3449 * will wake at some time in the future then we
3450 * can flush packed buffers that might still be
3451 * hanging around, which can happen if no
3452 * further send was requested by the stack
3453 */
3454 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3455 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3456 }
3457 }
3458 }
3459
3e66bab3 3460 netif_trans_update(queue->card->dev);
4a71df50
FB		 3461 if (queue->card->options.performance_stats) {
3462 queue->card->perf_stats.outbound_do_qdio_cnt++;
3463 queue->card->perf_stats.outbound_do_qdio_start_time =
3464 qeth_get_micros();
3465 }
3466 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3467 if (atomic_read(&queue->set_pci_flags_count))
3468 qdio_flags |= QDIO_FLAG_PCI_OUT;
a702349a
JW		 3469 atomic_add(count, &queue->used_buffers);
3470
4a71df50 3471 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3472 queue->queue_no, index, count);
4a71df50
FB		 3473 if (queue->card->options.performance_stats)
3474 queue->card->perf_stats.outbound_do_qdio_time +=
3475 qeth_get_micros() -
3476 queue->card->perf_stats.outbound_do_qdio_start_time;
3477 if (rc) {
d303b6fd
JG		 3478 queue->card->stats.tx_errors += count;
3479 /* ignore temporary SIGA errors without busy condition */
1549d13f 3480 if (rc == -ENOBUFS)
d303b6fd 3481 return;
847a50fd 3482 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3483 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3484 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3485 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3486 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3487
4a71df50
FB		 3488 /* this must not happen under normal circumstances. if it
3489 * happens something is really wrong -> recover */
3490 qeth_schedule_recovery(queue->card);
3491 return;
3492 }
4a71df50
FB		 3493 if (queue->card->options.performance_stats)
3494 queue->card->perf_stats.bufs_sent += count;
3495}
3496
3497static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3498{
3499 int index;
3500 int flush_cnt = 0;
3501 int q_was_packing = 0;
3502
3503 /*
3504 * check if weed have to switch to non-packing mode or if
3505 * we have to get a pci flag out on the queue
3506 */
3507 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3508 !atomic_read(&queue->set_pci_flags_count)) {
3509 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3510 QETH_OUT_Q_UNLOCKED) {
3511 /*
3512 * If we get in here, there was no action in
3513 * do_send_packet. So, we check if there is a
3514 * packing buffer to be flushed here.
3515 */
3516 netif_stop_queue(queue->card->dev);
3517 index = queue->next_buf_to_fill;
3518 q_was_packing = queue->do_pack;
3519 /* queue->do_pack may change */
3520 barrier();
3521 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3522 if (!flush_cnt &&
3523 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3524 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3525 if (queue->card->options.performance_stats &&
3526 q_was_packing)
3527 queue->card->perf_stats.bufs_sent_pack +=
3528 flush_cnt;
3529 if (flush_cnt)
779e6e1c 3530 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3531 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3532 }
3533 }
3534}
3535
7bcd64eb
JW		 3536static void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3537 unsigned long card_ptr)
a1c3ed4c
FB		 3538{
3539 struct qeth_card *card = (struct qeth_card *)card_ptr;
3540
d3d1b205 3541 if (card->dev->flags & IFF_UP)
a1c3ed4c
FB		 3542 napi_schedule(&card->napi);
3543}
a1c3ed4c 3544
0da9581d
EL		 3545int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3546{
3547 int rc;
3548
3549 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3550 rc = -1;
3551 goto out;
3552 } else {
3553 if (card->options.cq == cq) {
3554 rc = 0;
3555 goto out;
3556 }
3557
3558 if (card->state != CARD_STATE_DOWN &&
3559 card->state != CARD_STATE_RECOVER) {
3560 rc = -1;
3561 goto out;
3562 }
3563
3564 qeth_free_qdio_buffers(card);
3565 card->options.cq = cq;
3566 rc = 0;
3567 }
3568out:
3569 return rc;
3570
3571}
3572EXPORT_SYMBOL_GPL(qeth_configure_cq);
3573
3b346c18
JW		 3574static void qeth_qdio_cq_handler(struct qeth_card *card, unsigned int qdio_err,
3575 unsigned int queue, int first_element,
3576 int count)
3577{
0da9581d
EL		 3578 struct qeth_qdio_q *cq = card->qdio.c_q;
3579 int i;
3580 int rc;
3581
3582 if (!qeth_is_cq(card, queue))
3583 goto out;
3584
3585 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3586 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3587 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3588
3589 if (qdio_err) {
3590 netif_stop_queue(card->dev);
3591 qeth_schedule_recovery(card);
3592 goto out;
3593 }
3594
3595 if (card->options.performance_stats) {
3596 card->perf_stats.cq_cnt++;
3597 card->perf_stats.cq_start_time = qeth_get_micros();
3598 }
3599
3600 for (i = first_element; i < first_element + count; ++i) {
3601 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3602 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
3b346c18 3603 int e = 0;
0da9581d 3604
903e4853
UB		 3605 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3606 buffer->element[e].addr) {
0da9581d
EL		 3607 unsigned long phys_aob_addr;
3608
3609 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3610 qeth_qdio_handle_aob(card, phys_aob_addr);
0da9581d
EL		 3611 ++e;
3612 }
3b346c18 3613 qeth_scrub_qdio_buffer(buffer, QDIO_MAX_ELEMENTS_PER_BUFFER);
0da9581d
EL		 3614 }
3615 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3616 card->qdio.c_q->next_buf_to_init,
3617 count);
3618 if (rc) {
3619 dev_warn(&card->gdev->dev,
3620 "QDIO reported an error, rc=%i\n", rc);
3621 QETH_CARD_TEXT(card, 2, "qcqherr");
3622 }
3623 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3624 + count) % QDIO_MAX_BUFFERS_PER_Q;
3625
3626 netif_wake_queue(card->dev);
3627
3628 if (card->options.performance_stats) {
3629 int delta_t = qeth_get_micros();
3630 delta_t -= card->perf_stats.cq_start_time;
3631 card->perf_stats.cq_time += delta_t;
3632 }
3633out:
3634 return;
3635}
3636
7bcd64eb
JW		 3637static void qeth_qdio_input_handler(struct ccw_device *ccwdev,
3638 unsigned int qdio_err, int queue,
3639 int first_elem, int count,
3640 unsigned long card_ptr)
a1c3ed4c
FB		 3641{
3642 struct qeth_card *card = (struct qeth_card *)card_ptr;
3643
0da9581d
EL		 3644 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3645 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3646
3647 if (qeth_is_cq(card, queue))
3648 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3649 else if (qdio_err)
a1c3ed4c
FB		 3650 qeth_schedule_recovery(card);
3651}
a1c3ed4c 3652
7bcd64eb
JW		 3653static void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3654 unsigned int qdio_error, int __queue,
3655 int first_element, int count,
3656 unsigned long card_ptr)
4a71df50
FB		 3657{
3658 struct qeth_card *card = (struct qeth_card *) card_ptr;
3659 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3660 struct qeth_qdio_out_buffer *buffer;
3661 int i;
3662
847a50fd 3663 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3664 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3665 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3666 netif_stop_queue(card->dev);
3667 qeth_schedule_recovery(card);
3668 return;
4a71df50
FB		 3669 }
3670 if (card->options.performance_stats) {
3671 card->perf_stats.outbound_handler_cnt++;
3672 card->perf_stats.outbound_handler_start_time =
3673 qeth_get_micros();
3674 }
3675 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3676 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3677 buffer = queue->bufs[bidx];
b67d801f 3678 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3679
3680 if (queue->bufstates &&
3681 (queue->bufstates[bidx].flags &
3682 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3683 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3684
3685 if (atomic_cmpxchg(&buffer->state,
3686 QETH_QDIO_BUF_PRIMED,
3687 QETH_QDIO_BUF_PENDING) ==
3688 QETH_QDIO_BUF_PRIMED) {
3689 qeth_notify_skbs(queue, buffer,
3690 TX_NOTIFY_PENDING);
3691 }
0da9581d 3692 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
ce28867f
JW		 3693
3694 /* prepare the queue slot for re-use: */
3695 qeth_scrub_qdio_buffer(buffer->buffer,
3696 QETH_MAX_BUFFER_ELEMENTS(card));
b3332930
FB		 3697 if (qeth_init_qdio_out_buf(queue, bidx)) {
3698 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3699 qeth_schedule_recovery(card);
b3332930 3700 }
0da9581d 3701 } else {
b3332930
FB		 3702 if (card->options.cq == QETH_CQ_ENABLED) {
3703 enum iucv_tx_notify n;
3704
3705 n = qeth_compute_cq_notification(
3706 buffer->buffer->element[15].sflags, 0);
3707 qeth_notify_skbs(queue, buffer, n);
3708 }
3709
3b346c18 3710 qeth_clear_output_buffer(queue, buffer);
0da9581d
EL		 3711 }
3712 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3713 }
3714 atomic_sub(count, &queue->used_buffers);
3715 /* check if we need to do something on this outbound queue */
3716 if (card->info.type != QETH_CARD_TYPE_IQD)
3717 qeth_check_outbound_queue(queue);
3718
3719 netif_wake_queue(queue->card->dev);
3720 if (card->options.performance_stats)
3721 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3722 card->perf_stats.outbound_handler_start_time;
3723}
4a71df50 3724
70deb016
HW		 3725/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3726static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3727{
3728 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3729 return 2;
3730 return queue_num;
3731}
3732
290b8348
SR		 3733/**
3734 * Note: Function assumes that we have 4 outbound queues.
3735 */
4a71df50 3736int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
86c0cdb9 3737 int ipv)
4a71df50 3738{
d66cb37e 3739 __be16 *tci;
290b8348
SR		 3740 u8 tos;
3741
290b8348
SR		 3742 switch (card->qdio.do_prio_queueing) {
3743 case QETH_PRIO_Q_ING_TOS:
3744 case QETH_PRIO_Q_ING_PREC:
3745 switch (ipv) {
3746 case 4:
3747 tos = ipv4_get_dsfield(ip_hdr(skb));
3748 break;
3749 case 6:
3750 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3751 break;
3752 default:
3753 return card->qdio.default_out_queue;
4a71df50 3754 }
290b8348 3755 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3756 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3757 if (tos & IPTOS_MINCOST)
70deb016 3758 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3759 if (tos & IPTOS_RELIABILITY)
3760 return 2;
3761 if (tos & IPTOS_THROUGHPUT)
3762 return 1;
3763 if (tos & IPTOS_LOWDELAY)
3764 return 0;
d66cb37e
SR		 3765 break;
3766 case QETH_PRIO_Q_ING_SKB:
3767 if (skb->priority > 5)
3768 return 0;
70deb016 3769 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3770 case QETH_PRIO_Q_ING_VLAN:
3771 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3772 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3773 return qeth_cut_iqd_prio(card,
3774 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3775 break;
4a71df50 3776 default:
290b8348 3777 break;
4a71df50 3778 }
290b8348 3779 return card->qdio.default_out_queue;
4a71df50
FB		 3780}
3781EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3782
2863c613
EC		 3783/**
3784 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3785 * @skb: SKB address
3786 *
3787 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3788 * fragmented part of the SKB. Returns zero for linear SKB.
3789 */
271648b4
FB		 3790int qeth_get_elements_for_frags(struct sk_buff *skb)
3791{
2863c613 3792 int cnt, elements = 0;
271648b4
FB		 3793
3794 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3795 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3796
3797 elements += qeth_get_elements_for_range(
3798 (addr_t)skb_frag_address(frag),
3799 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3800 }
3801 return elements;
3802}
3803EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3804
ba86ceee
JW		 3805static unsigned int qeth_count_elements(struct sk_buff *skb, int data_offset)
3806{
3807 unsigned int elements = qeth_get_elements_for_frags(skb);
3808 addr_t end = (addr_t)skb->data + skb_headlen(skb);
3809 addr_t start = (addr_t)skb->data + data_offset;
3810
3811 if (start != end)
3812 elements += qeth_get_elements_for_range(start, end);
3813 return elements;
3814}
3815
2863c613
EC		 3816/**
3817 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3818 * @card: qeth card structure, to check max. elems.
3819 * @skb: SKB address
3820 * @extra_elems: extra elems needed, to check against max.
7d969d2e 3821 * @data_offset: range starts at skb->data + data_offset
2863c613
EC		 3822 *
3823 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3824 * skb data, including linear part and fragments. Checks if the result plus
3825 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3826 * Note: extra_elems is not included in the returned result.
3827 */
065cc782 3828int qeth_get_elements_no(struct qeth_card *card,
7d969d2e 3829 struct sk_buff *skb, int extra_elems, int data_offset)
4a71df50 3830{
ba86ceee 3831 int elements = qeth_count_elements(skb, data_offset);
4a71df50 3832
2863c613 3833 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3834 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3835 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3836 elements + extra_elems, skb->len);
4a71df50
FB		 3837 return 0;
3838 }
2863c613 3839 return elements;
4a71df50
FB		 3840}
3841EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3842
d4ae1f5e 3843int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3844{
3845 int hroom, inpage, rest;
3846
3847 if (((unsigned long)skb->data & PAGE_MASK) !=
3848 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3849 hroom = skb_headroom(skb);
3850 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3851 rest = len - inpage;
3852 if (rest > hroom)
3853 return 1;
2863c613 3854 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3855 skb->data -= rest;
d4ae1f5e
SR		 3856 skb->tail -= rest;
3857 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3858 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3859 }
3860 return 0;
3861}
3862EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3863
0d6f02d3 3864/**
ba86ceee
JW		 3865 * qeth_add_hw_header() - add a HW header to an skb.
3866 * @skb: skb that the HW header should be added to.
0d6f02d3
JW		 3867 * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
3868 * it contains a valid pointer to a qeth_hdr.
a7c2f4a3
JW		 3869 * @hdr_len: length of the HW header.
3870 * @proto_len: length of protocol headers that need to be in same page as the
3871 * HW header.
0d6f02d3
JW		 3872 *
3873 * Returns the pushed length. If the header can't be pushed on
3874 * (eg. because it would cross a page boundary), it is allocated from
3875 * the cache instead and 0 is returned.
ba86ceee 3876 * The number of needed buffer elements is returned in @elements.
0d6f02d3
JW		 3877 * Error to create the hdr is indicated by returning with < 0.
3878 */
ba86ceee 3879int qeth_add_hw_header(struct qeth_card *card, struct sk_buff *skb,
a7c2f4a3
JW		 3880 struct qeth_hdr **hdr, unsigned int hdr_len,
3881 unsigned int proto_len, unsigned int *elements)
ba86ceee
JW		 3882{
3883 const unsigned int max_elements = QETH_MAX_BUFFER_ELEMENTS(card);
a7c2f4a3 3884 const unsigned int contiguous = proto_len ? proto_len : 1;
ba86ceee
JW		 3885 unsigned int __elements;
3886 addr_t start, end;
3887 bool push_ok;
3888 int rc;
3889
3890check_layout:
a7c2f4a3 3891 start = (addr_t)skb->data - hdr_len;
ba86ceee
JW		 3892 end = (addr_t)skb->data;
3893
a7c2f4a3 3894 if (qeth_get_elements_for_range(start, end + contiguous) == 1) {
ba86ceee
JW		 3895 /* Push HW header into same page as first protocol header. */
3896 push_ok = true;
3897 __elements = qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3898 } else if (!proto_len && qeth_get_elements_for_range(start, end) == 1) {
3899 /* Push HW header into a new page. */
3900 push_ok = true;
ba86ceee 3901 __elements = 1 + qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3902 } else {
3903 /* Use header cache, copy protocol headers up. */
3904 push_ok = false;
3905 __elements = 1 + qeth_count_elements(skb, proto_len);
ba86ceee
JW		 3906 }
3907
3908 /* Compress skb to fit into one IO buffer: */
3909 if (__elements > max_elements) {
3910 if (!skb_is_nonlinear(skb)) {
3911 /* Drop it, no easy way of shrinking it further. */
3912 QETH_DBF_MESSAGE(2, "Dropped an oversized skb (Max Elements=%u / Actual=%u / Length=%u).\n",
3913 max_elements, __elements, skb->len);
3914 return -E2BIG;
3915 }
3916
3917 rc = skb_linearize(skb);
3918 if (card->options.performance_stats) {
3919 if (rc)
3920 card->perf_stats.tx_linfail++;
3921 else
3922 card->perf_stats.tx_lin++;
3923 }
3924 if (rc)
3925 return rc;
3926
3927 /* Linearization changed the layout, re-evaluate: */
3928 goto check_layout;
3929 }
3930
3931 *elements = __elements;
3932 /* Add the header: */
3933 if (push_ok) {
a7c2f4a3
JW		 3934 *hdr = skb_push(skb, hdr_len);
3935 return hdr_len;
0d6f02d3
JW		 3936 }
3937 /* fall back */
3938 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3939 if (!*hdr)
3940 return -ENOMEM;
a7c2f4a3
JW		 3941 /* Copy protocol headers behind HW header: */
3942 skb_copy_from_linear_data(skb, ((char *)*hdr) + hdr_len, proto_len);
0d6f02d3
JW		 3943 return 0;
3944}
ba86ceee 3945EXPORT_SYMBOL_GPL(qeth_add_hw_header);
0d6f02d3 3946
cef6ff22
JW		 3947static void __qeth_fill_buffer(struct sk_buff *skb,
3948 struct qeth_qdio_out_buffer *buf,
3949 bool is_first_elem, unsigned int offset)
4a71df50 3950{
384d2ef1
JW		 3951 struct qdio_buffer *buffer = buf->buffer;
3952 int element = buf->next_element_to_fill;
cc309f83
JW		 3953 int length = skb_headlen(skb) - offset;
3954 char *data = skb->data + offset;
384d2ef1 3955 int length_here, cnt;
4a71df50 3956
cc309f83 3957 /* map linear part into buffer element(s) */
4a71df50
FB		 3958 while (length > 0) {
3959 /* length_here is the remaining amount of data in this page */
3960 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3961 if (length < length_here)
3962 length_here = length;
3963
3964 buffer->element[element].addr = data;
3965 buffer->element[element].length = length_here;
3966 length -= length_here;
384d2ef1
JW		 3967 if (is_first_elem) {
3968 is_first_elem = false;
5258830b
JW		 3969 if (length || skb_is_nonlinear(skb))
3970 /* skb needs additional elements */
3ec90878 3971 buffer->element[element].eflags =
5258830b 3972 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3973 else
5258830b
JW		 3974 buffer->element[element].eflags = 0;
3975 } else {
3976 buffer->element[element].eflags =
3977 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3978 }
3979 data += length_here;
3980 element++;
4a71df50 3981 }
51aa165c 3982
cc309f83 3983 /* map page frags into buffer element(s) */
51aa165c 3984 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3985 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3986
3987 data = skb_frag_address(frag);
3988 length = skb_frag_size(frag);
271648b4
FB		 3989 while (length > 0) {
3990 length_here = PAGE_SIZE -
3991 ((unsigned long) data % PAGE_SIZE);
3992 if (length < length_here)
3993 length_here = length;
3994
3995 buffer->element[element].addr = data;
3996 buffer->element[element].length = length_here;
3997 buffer->element[element].eflags =
3998 SBAL_EFLAGS_MIDDLE_FRAG;
3999 length -= length_here;
4000 data += length_here;
4001 element++;
4002 }
51aa165c
FB		 4003 }
4004
3ec90878
JG		 4005 if (buffer->element[element - 1].eflags)
4006 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 4007 buf->next_element_to_fill = element;
4a71df50
FB		 4008}
4009
eaf3cc08
JW		 4010/**
4011 * qeth_fill_buffer() - map skb into an output buffer
4012 * @queue: QDIO queue to submit the buffer on
4013 * @buf: buffer to transport the skb
4014 * @skb: skb to map into the buffer
4015 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
4016 * from qeth_core_header_cache.
4017 * @offset: when mapping the skb, start at skb->data + offset
4018 * @hd_len: if > 0, build a dedicated header element of this size
4019 */
cef6ff22
JW		 4020static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
4021 struct qeth_qdio_out_buffer *buf,
4022 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 4023 unsigned int offset, unsigned int hd_len)
4a71df50 4024{
eaf3cc08 4025 struct qdio_buffer *buffer = buf->buffer;
384d2ef1 4026 bool is_first_elem = true;
13ddacb5 4027 int flush_cnt = 0;
4a71df50 4028
63354797 4029 refcount_inc(&skb->users);
4a71df50
FB		 4030 skb_queue_tail(&buf->skb_list, skb);
4031
eaf3cc08
JW		 4032 /* build dedicated header element */
4033 if (hd_len) {
683d718a 4034 int element = buf->next_element_to_fill;
384d2ef1
JW		 4035 is_first_elem = false;
4036
683d718a 4037 buffer->element[element].addr = hdr;
f1588177 4038 buffer->element[element].length = hd_len;
3ec90878 4039 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
eaf3cc08
JW		 4040 /* remember to free cache-allocated qeth_hdr: */
4041 buf->is_header[element] = ((void *)hdr != skb->data);
683d718a
FB		 4042 buf->next_element_to_fill++;
4043 }
4044
384d2ef1 4045 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 4046
4047 if (!queue->do_pack) {
847a50fd 4048 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 4049 /* set state to PRIMED -> will be flushed */
4050 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4051 flush_cnt = 1;
4052 } else {
847a50fd 4053 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4054 if (queue->card->options.performance_stats)
4055 queue->card->perf_stats.skbs_sent_pack++;
4056 if (buf->next_element_to_fill >=
4057 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4058 /*
4059 * packed buffer if full -> set state PRIMED
4060 * -> will be flushed
4061 */
4062 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4063 flush_cnt = 1;
4064 }
4065 }
4066 return flush_cnt;
4067}
4068
7c2e9ba3 4069int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
cc309f83 4070 struct qeth_hdr *hdr, unsigned int offset,
13ddacb5 4071 unsigned int hd_len)
4a71df50 4072{
7c2e9ba3
JW		 4073 int index = queue->next_buf_to_fill;
4074 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4a71df50 4075
4a71df50
FB		 4076 /*
4077 * check if buffer is empty to make sure that we do not 'overtake'
4078 * ourselves and try to fill a buffer that is already primed
4079 */
4080 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
7c2e9ba3
JW		 4081 return -EBUSY;
4082 queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
64ef8957
FB		 4083 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4084 qeth_flush_buffers(queue, index, 1);
4a71df50 4085 return 0;
4a71df50
FB		 4086}
4087EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4088
4089int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 4090 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 4091 unsigned int offset, unsigned int hd_len,
4092 int elements_needed)
4a71df50
FB		 4093{
4094 struct qeth_qdio_out_buffer *buffer;
4095 int start_index;
4096 int flush_count = 0;
4097 int do_pack = 0;
4098 int tmp;
4099 int rc = 0;
4100
4a71df50
FB		 4101 /* spin until we get the queue ... */
4102 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4103 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4104 start_index = queue->next_buf_to_fill;
0da9581d 4105 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4106 /*
4107 * check if buffer is empty to make sure that we do not 'overtake'
4108 * ourselves and try to fill a buffer that is already primed
4109 */
4110 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4111 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4112 return -EBUSY;
4113 }
4114 /* check if we need to switch packing state of this queue */
4115 qeth_switch_to_packing_if_needed(queue);
4116 if (queue->do_pack) {
4117 do_pack = 1;
64ef8957
FB		 4118 /* does packet fit in current buffer? */
4119 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4120 buffer->next_element_to_fill) < elements_needed) {
4121 /* ... no -> set state PRIMED */
4122 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4123 flush_count++;
4124 queue->next_buf_to_fill =
4125 (queue->next_buf_to_fill + 1) %
4126 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4127 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4128 /* we did a step forward, so check buffer state
4129 * again */
4130 if (atomic_read(&buffer->state) !=
4131 QETH_QDIO_BUF_EMPTY) {
4132 qeth_flush_buffers(queue, start_index,
779e6e1c 4133 flush_count);
64ef8957 4134 atomic_set(&queue->state,
4a71df50 4135 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4136 rc = -EBUSY;
4137 goto out;
4a71df50
FB		 4138 }
4139 }
4140 }
9c3bfda9 4141 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4a71df50
FB		 4142 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4143 QDIO_MAX_BUFFERS_PER_Q;
4144 flush_count += tmp;
4a71df50 4145 if (flush_count)
779e6e1c 4146 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4147 else if (!atomic_read(&queue->set_pci_flags_count))
4148 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4149 /*
4150 * queue->state will go from LOCKED -> UNLOCKED or from
4151 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4152 * (switch packing state or flush buffer to get another pci flag out).
4153 * In that case we will enter this loop
4154 */
4155 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4156 start_index = queue->next_buf_to_fill;
4157 /* check if we can go back to non-packing state */
3cdc8a25 4158 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4159 /*
4160 * check if we need to flush a packing buffer to get a pci
4161 * flag out on the queue
4162 */
3cdc8a25
JW		 4163 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4164 tmp = qeth_prep_flush_pack_buffer(queue);
4165 if (tmp) {
4166 qeth_flush_buffers(queue, start_index, tmp);
4167 flush_count += tmp;
4168 }
4a71df50 4169 }
3cdc8a25 4170out:
4a71df50
FB		 4171 /* at this point the queue is UNLOCKED again */
4172 if (queue->card->options.performance_stats && do_pack)
4173 queue->card->perf_stats.bufs_sent_pack += flush_count;
4174
4175 return rc;
4176}
4177EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4178
4179static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4180 struct qeth_reply *reply, unsigned long data)
4181{
686c97ee 4182 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50
FB		 4183 struct qeth_ipacmd_setadpparms *setparms;
4184
847a50fd 4185 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50 4186
4a71df50 4187 setparms = &(cmd->data.setadapterparms);
686c97ee 4188 if (qeth_setadpparms_inspect_rc(cmd)) {
8a593148 4189 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4190 setparms->data.mode = SET_PROMISC_MODE_OFF;
4191 }
4192 card->info.promisc_mode = setparms->data.mode;
4193 return 0;
4194}
4195
4196void qeth_setadp_promisc_mode(struct qeth_card *card)
4197{
4198 enum qeth_ipa_promisc_modes mode;
4199 struct net_device *dev = card->dev;
4200 struct qeth_cmd_buffer *iob;
4201 struct qeth_ipa_cmd *cmd;
4202
847a50fd 4203 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4204
4205 if (((dev->flags & IFF_PROMISC) &&
4206 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4207 (!(dev->flags & IFF_PROMISC) &&
4208 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4209 return;
4210 mode = SET_PROMISC_MODE_OFF;
4211 if (dev->flags & IFF_PROMISC)
4212 mode = SET_PROMISC_MODE_ON;
847a50fd 4213 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4214
4215 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4216 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4217 if (!iob)
4218 return;
ff5caa7a 4219 cmd = __ipa_cmd(iob);
4a71df50
FB		 4220 cmd->data.setadapterparms.data.mode = mode;
4221 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4222}
4223EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4224
4a71df50
FB		 4225struct net_device_stats *qeth_get_stats(struct net_device *dev)
4226{
4227 struct qeth_card *card;
4228
509e2562 4229 card = dev->ml_priv;
4a71df50 4230
847a50fd 4231 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4232
4233 return &card->stats;
4234}
4235EXPORT_SYMBOL_GPL(qeth_get_stats);
4236
4237static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4238 struct qeth_reply *reply, unsigned long data)
4239{
686c97ee 4240 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50 4241
847a50fd 4242 QETH_CARD_TEXT(card, 4, "chgmaccb");
686c97ee
JW		 4243 if (qeth_setadpparms_inspect_rc(cmd))
4244 return 0;
4a71df50 4245
4a71df50
FB		 4246 if (!card->options.layer2 ||
4247 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
99f0b85d
JW		 4248 ether_addr_copy(card->dev->dev_addr,
4249 cmd->data.setadapterparms.data.change_addr.addr);
4a71df50
FB		 4250 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4251 }
4a71df50
FB		 4252 return 0;
4253}
4254
4255int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4256{
4257 int rc;
4258 struct qeth_cmd_buffer *iob;
4259 struct qeth_ipa_cmd *cmd;
4260
847a50fd 4261 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4262
4263 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4264 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4265 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4266 if (!iob)
4267 return -ENOMEM;
ff5caa7a 4268 cmd = __ipa_cmd(iob);
4a71df50 4269 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
99f0b85d
JW		 4270 cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
4271 ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
4272 card->dev->dev_addr);
4a71df50
FB		 4273 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4274 NULL);
4275 return rc;
4276}
4277EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4278
d64ecc22
EL		 4279static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4280 struct qeth_reply *reply, unsigned long data)
4281{
686c97ee 4282 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
d64ecc22 4283 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4284 int fallback = *(int *)reply->param;
d64ecc22 4285
847a50fd 4286 QETH_CARD_TEXT(card, 4, "setaccb");
686c97ee
JW		 4287 if (cmd->hdr.return_code)
4288 return 0;
4289 qeth_setadpparms_inspect_rc(cmd);
d64ecc22 4290
d64ecc22
EL		 4291 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4292 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4293 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4294 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4295 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4296 if (cmd->data.setadapterparms.hdr.return_code !=
4297 SET_ACCESS_CTRL_RC_SUCCESS)
4298 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4299 card->gdev->dev.kobj.name,
4300 access_ctrl_req->subcmd_code,
4301 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4302 switch (cmd->data.setadapterparms.hdr.return_code) {
4303 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4304 if (card->options.isolation == ISOLATION_MODE_NONE) {
4305 dev_info(&card->gdev->dev,
4306 "QDIO data connection isolation is deactivated\n");
4307 } else {
4308 dev_info(&card->gdev->dev,
4309 "QDIO data connection isolation is activated\n");
4310 }
d64ecc22 4311 break;
0f54761d
SR		 4312 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4313 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4314 "deactivated\n", dev_name(&card->gdev->dev));
4315 if (fallback)
4316 card->options.isolation = card->options.prev_isolation;
4317 break;
4318 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4319 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4320 " activated\n", dev_name(&card->gdev->dev));
4321 if (fallback)
4322 card->options.isolation = card->options.prev_isolation;
4323 break;
d64ecc22 4324 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4325 dev_err(&card->gdev->dev, "Adapter does not "
4326 "support QDIO data connection isolation\n");
d64ecc22 4327 break;
d64ecc22 4328 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4329 dev_err(&card->gdev->dev,
4330 "Adapter is dedicated. "
4331 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4332 if (fallback)
4333 card->options.isolation = card->options.prev_isolation;
d64ecc22 4334 break;
d64ecc22 4335 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4336 dev_err(&card->gdev->dev,
4337 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4338 if (fallback)
4339 card->options.isolation = card->options.prev_isolation;
4340 break;
4341 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4342 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4343 "support reflective relay mode\n");
4344 if (fallback)
4345 card->options.isolation = card->options.prev_isolation;
4346 break;
4347 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4348 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4349 "enabled at the adjacent switch port");
4350 if (fallback)
4351 card->options.isolation = card->options.prev_isolation;
4352 break;
4353 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4354 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4355 "at the adjacent switch failed\n");
d64ecc22 4356 break;
d64ecc22 4357 default:
d64ecc22 4358 /* this should never happen */
0f54761d
SR		 4359 if (fallback)
4360 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4361 break;
4362 }
bbb822a8 4363 return 0;
d64ecc22
EL		 4364}
4365
4366static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4367 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4368{
4369 int rc;
4370 struct qeth_cmd_buffer *iob;
4371 struct qeth_ipa_cmd *cmd;
4372 struct qeth_set_access_ctrl *access_ctrl_req;
4373
847a50fd 4374 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4375
4376 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4377 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4378
4379 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4380 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4381 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4382 if (!iob)
4383 return -ENOMEM;
ff5caa7a 4384 cmd = __ipa_cmd(iob);
d64ecc22
EL		 4385 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4386 access_ctrl_req->subcmd_code = isolation;
4387
4388 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4389 &fallback);
d64ecc22
EL		 4390 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4391 return rc;
4392}
4393
0f54761d 4394int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4395{
4396 int rc = 0;
4397
847a50fd 4398 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4399
5113fec0
UB		 4400 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4401 card->info.type == QETH_CARD_TYPE_OSX) &&
4402 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4403 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4404 card->options.isolation, fallback);
d64ecc22
EL		 4405 if (rc) {
4406 QETH_DBF_MESSAGE(3,
5113fec0 4407 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4408 card->gdev->dev.kobj.name,
4409 rc);
0f54761d 4410 rc = -EOPNOTSUPP;
d64ecc22
EL		 4411 }
4412 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4413 card->options.isolation = ISOLATION_MODE_NONE;
4414
4415 dev_err(&card->gdev->dev, "Adapter does not "
4416 "support QDIO data connection isolation\n");
4417 rc = -EOPNOTSUPP;
4418 }
4419 return rc;
4420}
4421EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4422
4a71df50
FB		 4423void qeth_tx_timeout(struct net_device *dev)
4424{
4425 struct qeth_card *card;
4426
509e2562 4427 card = dev->ml_priv;
847a50fd 4428 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4429 card->stats.tx_errors++;
4430 qeth_schedule_recovery(card);
4431}
4432EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4433
942d6984 4434static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4435{
509e2562 4436 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4437 int rc = 0;
4438
4439 switch (regnum) {
4440 case MII_BMCR: /* Basic mode control register */
4441 rc = BMCR_FULLDPLX;
4442 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4443 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4444 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4445 rc |= BMCR_SPEED100;
4446 break;
4447 case MII_BMSR: /* Basic mode status register */
4448 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4449 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4450 BMSR_100BASE4;
4451 break;
4452 case MII_PHYSID1: /* PHYS ID 1 */
4453 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4454 dev->dev_addr[2];
4455 rc = (rc >> 5) & 0xFFFF;
4456 break;
4457 case MII_PHYSID2: /* PHYS ID 2 */
4458 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4459 break;
4460 case MII_ADVERTISE: /* Advertisement control reg */
4461 rc = ADVERTISE_ALL;
4462 break;
4463 case MII_LPA: /* Link partner ability reg */
4464 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4465 LPA_100BASE4 | LPA_LPACK;
4466 break;
4467 case MII_EXPANSION: /* Expansion register */
4468 break;
4469 case MII_DCOUNTER: /* disconnect counter */
4470 break;
4471 case MII_FCSCOUNTER: /* false carrier counter */
4472 break;
4473 case MII_NWAYTEST: /* N-way auto-neg test register */
4474 break;
4475 case MII_RERRCOUNTER: /* rx error counter */
4476 rc = card->stats.rx_errors;
4477 break;
4478 case MII_SREVISION: /* silicon revision */
4479 break;
4480 case MII_RESV1: /* reserved 1 */
4481 break;
4482 case MII_LBRERROR: /* loopback, rx, bypass error */
4483 break;
4484 case MII_PHYADDR: /* physical address */
4485 break;
4486 case MII_RESV2: /* reserved 2 */
4487 break;
4488 case MII_TPISTATUS: /* TPI status for 10mbps */
4489 break;
4490 case MII_NCONFIG: /* network interface config */
4491 break;
4492 default:
4493 break;
4494 }
4495 return rc;
4496}
4a71df50
FB		 4497
4498static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4499 struct qeth_cmd_buffer *iob, int len,
4500 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4501 unsigned long),
4502 void *reply_param)
4503{
4504 u16 s1, s2;
4505
847a50fd 4506 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4507
4508 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4509 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4510 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4511 /* adjust PDU length fields in IPA_PDU_HEADER */
4512 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4513 s2 = (u32) len;
4514 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4515 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4516 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4517 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4518 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4519 reply_cb, reply_param);
4520}
4521
4522static int qeth_snmp_command_cb(struct qeth_card *card,
4523 struct qeth_reply *reply, unsigned long sdata)
4524{
4525 struct qeth_ipa_cmd *cmd;
4526 struct qeth_arp_query_info *qinfo;
4527 struct qeth_snmp_cmd *snmp;
4528 unsigned char *data;
4529 __u16 data_len;
4530
847a50fd 4531 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4532
4533 cmd = (struct qeth_ipa_cmd *) sdata;
4534 data = (unsigned char *)((char *)cmd - reply->offset);
4535 qinfo = (struct qeth_arp_query_info *) reply->param;
4536 snmp = &cmd->data.setadapterparms.data.snmp;
4537
4538 if (cmd->hdr.return_code) {
8a593148 4539 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4540 return 0;
4541 }
4542 if (cmd->data.setadapterparms.hdr.return_code) {
4543 cmd->hdr.return_code =
4544 cmd->data.setadapterparms.hdr.return_code;
8a593148 4545 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4546 return 0;
4547 }
4548 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4549 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4550 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4551 else
4552 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4553
4554 /* check if there is enough room in userspace */
4555 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4556 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4557 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4558 return 0;
4559 }
847a50fd 4560 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4561 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4562 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4563 cmd->data.setadapterparms.hdr.seq_no);
4564 /*copy entries to user buffer*/
4565 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4566 memcpy(qinfo->udata + qinfo->udata_offset,
4567 (char *)snmp,
4568 data_len + offsetof(struct qeth_snmp_cmd, data));
4569 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4570 } else {
4571 memcpy(qinfo->udata + qinfo->udata_offset,
4572 (char *)&snmp->request, data_len);
4573 }
4574 qinfo->udata_offset += data_len;
4575 /* check if all replies received ... */
847a50fd 4576 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4577 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4578 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4579 cmd->data.setadapterparms.hdr.seq_no);
4580 if (cmd->data.setadapterparms.hdr.seq_no <
4581 cmd->data.setadapterparms.hdr.used_total)
4582 return 1;
4583 return 0;
4584}
4585
942d6984 4586static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4587{
4588 struct qeth_cmd_buffer *iob;
4589 struct qeth_ipa_cmd *cmd;
4590 struct qeth_snmp_ureq *ureq;
6fb392b1 4591 unsigned int req_len;
4a71df50
FB		 4592 struct qeth_arp_query_info qinfo = {0, };
4593 int rc = 0;
4594
847a50fd 4595 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4596
4597 if (card->info.guestlan)
4598 return -EOPNOTSUPP;
4599
4600 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4601 (!card->options.layer2)) {
4a71df50
FB		 4602 return -EOPNOTSUPP;
4603 }
4604 /* skip 4 bytes (data_len struct member) to get req_len */
4605 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4606 return -EFAULT;
6fb392b1
UB		 4607 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4608 sizeof(struct qeth_ipacmd_hdr) -
4609 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4610 return -EINVAL;
4986f3f0
JL		 4611 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4612 if (IS_ERR(ureq)) {
847a50fd 4613 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4614 return PTR_ERR(ureq);
4a71df50
FB		 4615 }
4616 qinfo.udata_len = ureq->hdr.data_len;
4617 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4618 if (!qinfo.udata) {
4619 kfree(ureq);
4620 return -ENOMEM;
4621 }
4622 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4623
4624 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4625 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4626 if (!iob) {
4627 rc = -ENOMEM;
4628 goto out;
4629 }
ff5caa7a 4630 cmd = __ipa_cmd(iob);
4a71df50
FB		 4631 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4632 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4633 qeth_snmp_command_cb, (void *)&qinfo);
4634 if (rc)
14cc21b6 4635 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4636 QETH_CARD_IFNAME(card), rc);
4637 else {
4638 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4639 rc = -EFAULT;
4640 }
1aec42bc 4641out:
4a71df50
FB		 4642 kfree(ureq);
4643 kfree(qinfo.udata);
4644 return rc;
4645}
4a71df50 4646
c3ab96f3
FB		 4647static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4648 struct qeth_reply *reply, unsigned long data)
4649{
686c97ee 4650 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
c3ab96f3
FB		 4651 struct qeth_qoat_priv *priv;
4652 char *resdata;
4653 int resdatalen;
4654
4655 QETH_CARD_TEXT(card, 3, "qoatcb");
686c97ee
JW		 4656 if (qeth_setadpparms_inspect_rc(cmd))
4657 return 0;
c3ab96f3 4658
c3ab96f3
FB		 4659 priv = (struct qeth_qoat_priv *)reply->param;
4660 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4661 resdata = (char *)data + 28;
4662
4663 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4664 cmd->hdr.return_code = IPA_RC_FFFF;
4665 return 0;
4666 }
4667
4668 memcpy((priv->buffer + priv->response_len), resdata,
4669 resdatalen);
4670 priv->response_len += resdatalen;
4671
4672 if (cmd->data.setadapterparms.hdr.seq_no <
4673 cmd->data.setadapterparms.hdr.used_total)
4674 return 1;
4675 return 0;
4676}
4677
942d6984 4678static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4679{
4680 int rc = 0;
4681 struct qeth_cmd_buffer *iob;
4682 struct qeth_ipa_cmd *cmd;
4683 struct qeth_query_oat *oat_req;
4684 struct qeth_query_oat_data oat_data;
4685 struct qeth_qoat_priv priv;
4686 void __user *tmp;
4687
4688 QETH_CARD_TEXT(card, 3, "qoatcmd");
4689
4690 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4691 rc = -EOPNOTSUPP;
4692 goto out;
4693 }
4694
4695 if (copy_from_user(&oat_data, udata,
4696 sizeof(struct qeth_query_oat_data))) {
4697 rc = -EFAULT;
4698 goto out;
4699 }
4700
4701 priv.buffer_len = oat_data.buffer_len;
4702 priv.response_len = 0;
aec45e85 4703 priv.buffer = vzalloc(oat_data.buffer_len);
c3ab96f3
FB		 4704 if (!priv.buffer) {
4705 rc = -ENOMEM;
4706 goto out;
4707 }
4708
4709 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4710 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4711 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4712 if (!iob) {
4713 rc = -ENOMEM;
4714 goto out_free;
4715 }
ff5caa7a 4716 cmd = __ipa_cmd(iob);
c3ab96f3
FB		 4717 oat_req = &cmd->data.setadapterparms.data.query_oat;
4718 oat_req->subcmd_code = oat_data.command;
4719
4720 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4721 &priv);
4722 if (!rc) {
4723 if (is_compat_task())
4724 tmp = compat_ptr(oat_data.ptr);
4725 else
4726 tmp = (void __user *)(unsigned long)oat_data.ptr;
4727
4728 if (copy_to_user(tmp, priv.buffer,
4729 priv.response_len)) {
4730 rc = -EFAULT;
4731 goto out_free;
4732 }
4733
4734 oat_data.response_len = priv.response_len;
4735
4736 if (copy_to_user(udata, &oat_data,
4737 sizeof(struct qeth_query_oat_data)))
4738 rc = -EFAULT;
4739 } else
4740 if (rc == IPA_RC_FFFF)
4741 rc = -EFAULT;
4742
4743out_free:
aec45e85 4744 vfree(priv.buffer);
c3ab96f3
FB		 4745out:
4746 return rc;
4747}
c3ab96f3 4748
e71e4072
HC		 4749static int qeth_query_card_info_cb(struct qeth_card *card,
4750 struct qeth_reply *reply, unsigned long data)
02d5cb5b 4751{
686c97ee
JW		 4752 struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
4753 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
02d5cb5b 4754 struct qeth_query_card_info *card_info;
02d5cb5b
EC		 4755
4756 QETH_CARD_TEXT(card, 2, "qcrdincb");
686c97ee
JW		 4757 if (qeth_setadpparms_inspect_rc(cmd))
4758 return 0;
02d5cb5b 4759
686c97ee
JW		 4760 card_info = &cmd->data.setadapterparms.data.card_info;
4761 carrier_info->card_type = card_info->card_type;
4762 carrier_info->port_mode = card_info->port_mode;
4763 carrier_info->port_speed = card_info->port_speed;
02d5cb5b
EC		 4764 return 0;
4765}
4766
bca51650 4767static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4768 struct carrier_info *carrier_info)
4769{
4770 struct qeth_cmd_buffer *iob;
4771
4772 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4773 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4774 return -EOPNOTSUPP;
4775 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4776 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4777 if (!iob)
4778 return -ENOMEM;
02d5cb5b
EC		 4779 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4780 (void *)carrier_info);
4781}
02d5cb5b 4782
ec61bd2f
JW		 4783/**
4784 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4785 * @card: pointer to a qeth_card
4786 *
4787 * Returns
4788 * 0, if a MAC address has been set for the card's netdevice
4789 * a return code, for various error conditions
4790 */
4791int qeth_vm_request_mac(struct qeth_card *card)
4792{
4793 struct diag26c_mac_resp *response;
4794 struct diag26c_mac_req *request;
4795 struct ccw_dev_id id;
4796 int rc;
4797
4798 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4799
ec61bd2f
JW		 4800 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4801 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4802 if (!request || !response) {
4803 rc = -ENOMEM;
4804 goto out;
4805 }
4806
46646105 4807 ccw_device_get_id(CARD_DDEV(card), &id);
ec61bd2f
JW		 4808 request->resp_buf_len = sizeof(*response);
4809 request->resp_version = DIAG26C_VERSION2;
4810 request->op_code = DIAG26C_GET_MAC;
4811 request->devno = id.devno;
4812
615dff22 4813 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f 4814 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
615dff22 4815 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f
JW		 4816 if (rc)
4817 goto out;
615dff22 4818 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
ec61bd2f
JW		 4819
4820 if (request->resp_buf_len < sizeof(*response) ||
4821 response->version != request->resp_version) {
4822 rc = -EIO;
4823 QETH_DBF_TEXT(SETUP, 2, "badresp");
4824 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4825 sizeof(request->resp_buf_len));
4826 } else if (!is_valid_ether_addr(response->mac)) {
4827 rc = -EINVAL;
4828 QETH_DBF_TEXT(SETUP, 2, "badmac");
4829 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4830 } else {
4831 ether_addr_copy(card->dev->dev_addr, response->mac);
4832 }
4833
4834out:
4835 kfree(response);
4836 kfree(request);
4837 return rc;
4838}
4839EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4840
cef6ff22 4841static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4842{
aa59004b
JW		 4843 if (card->info.type == QETH_CARD_TYPE_IQD)
4844 return QDIO_IQDIO_QFMT;
4845 else
4846 return QDIO_QETH_QFMT;
4a71df50
FB		 4847}
4848
d0ff1f52
UB		 4849static void qeth_determine_capabilities(struct qeth_card *card)
4850{
4851 int rc;
4852 int length;
4853 char *prcd;
4854 struct ccw_device *ddev;
4855 int ddev_offline = 0;
4856
4857 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4858 ddev = CARD_DDEV(card);
4859 if (!ddev->online) {
4860 ddev_offline = 1;
4861 rc = ccw_device_set_online(ddev);
4862 if (rc) {
4863 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4864 goto out;
4865 }
4866 }
4867
4868 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4869 if (rc) {
4870 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4871 dev_name(&card->gdev->dev), rc);
4872 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4873 goto out_offline;
4874 }
4875 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4876 if (ddev_offline)
4877 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4878 kfree(prcd);
4879
4880 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4881 if (rc)
4882 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4883
0da9581d 4884 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4885 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4886 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4887 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4888 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4889 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4890 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4891 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4892 dev_info(&card->gdev->dev,
4893 "Completion Queueing supported\n");
4894 } else {
4895 card->options.cq = QETH_CQ_NOTAVAILABLE;
4896 }
4897
4898
d0ff1f52
UB		 4899out_offline:
4900 if (ddev_offline == 1)
4901 ccw_device_set_offline(ddev);
4902out:
4903 return;
4904}
4905
cef6ff22
JW		 4906static void qeth_qdio_establish_cq(struct qeth_card *card,
4907 struct qdio_buffer **in_sbal_ptrs,
4908 void (**queue_start_poll)
4909 (struct ccw_device *, int,
4910 unsigned long))
4911{
0da9581d
EL		 4912 int i;
4913
4914 if (card->options.cq == QETH_CQ_ENABLED) {
4915 int offset = QDIO_MAX_BUFFERS_PER_Q *
4916 (card->qdio.no_in_queues - 1);
0da9581d
EL		 4917 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4918 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4919 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4920 }
4921
4922 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4923 }
4924}
4925
4a71df50
FB		 4926static int qeth_qdio_establish(struct qeth_card *card)
4927{
4928 struct qdio_initialize init_data;
4929 char *qib_param_field;
4930 struct qdio_buffer **in_sbal_ptrs;
104ea556 4931 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4932 struct qdio_buffer **out_sbal_ptrs;
4933 int i, j, k;
4934 int rc = 0;
4935
d11ba0c4 4936 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50 4937
6396bb22
KC		 4938 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q,
4939 GFP_KERNEL);
104ea556 4940 if (!qib_param_field) {
4941 rc = -ENOMEM;
4942 goto out_free_nothing;
4943 }
4a71df50
FB		 4944
4945 qeth_create_qib_param_field(card, qib_param_field);
4946 qeth_create_qib_param_field_blkt(card, qib_param_field);
4947
6396bb22
KC		 4948 in_sbal_ptrs = kcalloc(card->qdio.no_in_queues * QDIO_MAX_BUFFERS_PER_Q,
4949 sizeof(void *),
4a71df50
FB		 4950 GFP_KERNEL);
4951 if (!in_sbal_ptrs) {
104ea556 4952 rc = -ENOMEM;
4953 goto out_free_qib_param;
4a71df50 4954 }
0da9581d 4955 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4956 in_sbal_ptrs[i] = (struct qdio_buffer *)
4957 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4958 }
4a71df50 4959
6396bb22 4960 queue_start_poll = kcalloc(card->qdio.no_in_queues, sizeof(void *),
0da9581d 4961 GFP_KERNEL);
104ea556 4962 if (!queue_start_poll) {
4963 rc = -ENOMEM;
4964 goto out_free_in_sbals;
4965 }
0da9581d 4966 for (i = 0; i < card->qdio.no_in_queues; ++i)
7bcd64eb 4967 queue_start_poll[i] = qeth_qdio_start_poll;
0da9581d
EL		 4968
4969 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4970
4a71df50 4971 out_sbal_ptrs =
6396bb22
KC		 4972 kcalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q,
4973 sizeof(void *),
4974 GFP_KERNEL);
4a71df50 4975 if (!out_sbal_ptrs) {
104ea556 4976 rc = -ENOMEM;
4977 goto out_free_queue_start_poll;
4a71df50
FB		 4978 }
4979 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4980 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4981 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4982 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4983 }
4984
4985 memset(&init_data, 0, sizeof(struct qdio_initialize));
4986 init_data.cdev = CARD_DDEV(card);
4987 init_data.q_format = qeth_get_qdio_q_format(card);
4988 init_data.qib_param_field_format = 0;
4989 init_data.qib_param_field = qib_param_field;
0da9581d 4990 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4991 init_data.no_output_qs = card->qdio.no_out_queues;
7bcd64eb
JW		 4992 init_data.input_handler = qeth_qdio_input_handler;
4993 init_data.output_handler = qeth_qdio_output_handler;
e58b0d90 4994 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4995 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4996 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4997 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4998 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4999 init_data.scan_threshold =
0fa81cd4 5000 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 5001
5002 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
5003 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 5004 rc = qdio_allocate(&init_data);
5005 if (rc) {
5006 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
5007 goto out;
5008 }
5009 rc = qdio_establish(&init_data);
5010 if (rc) {
4a71df50 5011 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 5012 qdio_free(CARD_DDEV(card));
5013 }
4a71df50 5014 }
0da9581d
EL		 5015
5016 switch (card->options.cq) {
5017 case QETH_CQ_ENABLED:
5018 dev_info(&card->gdev->dev, "Completion Queue support enabled");
5019 break;
5020 case QETH_CQ_DISABLED:
5021 dev_info(&card->gdev->dev, "Completion Queue support disabled");
5022 break;
5023 default:
5024 break;
5025 }
cc961d40 5026out:
4a71df50 5027 kfree(out_sbal_ptrs);
104ea556 5028out_free_queue_start_poll:
5029 kfree(queue_start_poll);
5030out_free_in_sbals:
4a71df50 5031 kfree(in_sbal_ptrs);
104ea556 5032out_free_qib_param:
4a71df50 5033 kfree(qib_param_field);
104ea556 5034out_free_nothing:
4a71df50
FB		 5035 return rc;
5036}
5037
5038static void qeth_core_free_card(struct qeth_card *card)
5039{
d11ba0c4
PT		 5040 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5041 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 5042 qeth_clean_channel(&card->read);
5043 qeth_clean_channel(&card->write);
f15cdaf2 5044 qeth_clean_channel(&card->data);
4a71df50 5045 qeth_free_qdio_buffers(card);
6bcac508 5046 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 5047 kfree(card);
5048}
5049
395672e0
SR		 5050void qeth_trace_features(struct qeth_card *card)
5051{
5052 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 5053 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
5054 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
5055 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
5056 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
5057 sizeof(card->info.diagass_support));
395672e0
SR		 5058}
5059EXPORT_SYMBOL_GPL(qeth_trace_features);
5060
4a71df50 5061static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 5062 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5063 .driver_info = QETH_CARD_TYPE_OSD},
5064 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5065 .driver_info = QETH_CARD_TYPE_IQD},
5066 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5067 .driver_info = QETH_CARD_TYPE_OSN},
5068 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5069 .driver_info = QETH_CARD_TYPE_OSM},
5070 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5071 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5072 {},
5073};
5074MODULE_DEVICE_TABLE(ccw, qeth_ids);
5075
5076static struct ccw_driver qeth_ccw_driver = {
3bda058b 5077 .driver = {
3e70b3b8 5078 .owner = THIS_MODULE,
3bda058b
SO		 5079 .name = "qeth",
5080 },
4a71df50
FB		 5081 .ids = qeth_ids,
5082 .probe = ccwgroup_probe_ccwdev,
5083 .remove = ccwgroup_remove_ccwdev,
5084};
5085
4a71df50
FB		 5086int qeth_core_hardsetup_card(struct qeth_card *card)
5087{
6ebb7f8d 5088 int retries = 3;
4a71df50
FB		 5089 int rc;
5090
d11ba0c4 5091 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5092 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5093 qeth_update_from_chp_desc(card);
4a71df50 5094retry:
6ebb7f8d 5095 if (retries < 3)
74eacdb9
FB		 5096 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5097 dev_name(&card->gdev->dev));
22ae2790 5098 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5099 ccw_device_set_offline(CARD_DDEV(card));
5100 ccw_device_set_offline(CARD_WDEV(card));
5101 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5102 qdio_free(CARD_DDEV(card));
aa909224
UB		 5103 rc = ccw_device_set_online(CARD_RDEV(card));
5104 if (rc)
5105 goto retriable;
5106 rc = ccw_device_set_online(CARD_WDEV(card));
5107 if (rc)
5108 goto retriable;
5109 rc = ccw_device_set_online(CARD_DDEV(card));
5110 if (rc)
5111 goto retriable;
aa909224 5112retriable:
4a71df50 5113 if (rc == -ERESTARTSYS) {
d11ba0c4 5114 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5115 return rc;
5116 } else if (rc) {
d11ba0c4 5117 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5118 if (--retries < 0)
4a71df50
FB		 5119 goto out;
5120 else
5121 goto retry;
5122 }
d0ff1f52 5123 qeth_determine_capabilities(card);
4a71df50
FB		 5124 qeth_init_tokens(card);
5125 qeth_init_func_level(card);
5126 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5127 if (rc == -ERESTARTSYS) {
d11ba0c4 5128 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5129 return rc;
5130 } else if (rc) {
d11ba0c4 5131 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5132 if (--retries < 0)
5133 goto out;
5134 else
5135 goto retry;
5136 }
5137 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5138 if (rc == -ERESTARTSYS) {
d11ba0c4 5139 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5140 return rc;
5141 } else if (rc) {
d11ba0c4 5142 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5143 if (--retries < 0)
5144 goto out;
5145 else
5146 goto retry;
5147 }
908abbb5 5148 card->read_or_write_problem = 0;
4a71df50
FB		 5149 rc = qeth_mpc_initialize(card);
5150 if (rc) {
d11ba0c4 5151 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5152 goto out;
5153 }
1da74b1c 5154
10340510
JW		 5155 rc = qeth_send_startlan(card);
5156 if (rc) {
5157 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5158 if (rc == IPA_RC_LAN_OFFLINE) {
5159 dev_warn(&card->gdev->dev,
5160 "The LAN is offline\n");
5161 card->lan_online = 0;
5162 } else {
5163 rc = -ENODEV;
5164 goto out;
5165 }
5166 } else
5167 card->lan_online = 1;
5168
1da74b1c 5169 card->options.ipa4.supported_funcs = 0;
4d7def2a 5170 card->options.ipa6.supported_funcs = 0;
1da74b1c 5171 card->options.adp.supported_funcs = 0;
b4d72c08 5172 card->options.sbp.supported_funcs = 0;
1da74b1c 5173 card->info.diagass_support = 0;
1aec42bc
TR		 5174 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5175 if (rc == -ENOMEM)
5176 goto out;
ee75fb86
KM		 5177 if (qeth_is_supported(card, IPA_IPV6)) {
5178 rc = qeth_query_ipassists(card, QETH_PROT_IPV6);
5179 if (rc == -ENOMEM)
5180 goto out;
5181 }
1aec42bc
TR		 5182 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5183 rc = qeth_query_setadapterparms(card);
5184 if (rc < 0) {
10340510 5185 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5186 goto out;
5187 }
5188 }
5189 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5190 rc = qeth_query_setdiagass(card);
5191 if (rc < 0) {
10340510 5192 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5193 goto out;
5194 }
5195 }
4a71df50
FB		 5196 return 0;
5197out:
74eacdb9
FB		 5198 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5199 "an error on the device\n");
5200 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5201 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5202 return rc;
5203}
5204EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5205
8d68af6a
JW		 5206static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5207 struct sk_buff *skb, int offset, int data_len)
4a71df50
FB		 5208{
5209 struct page *page = virt_to_page(element->addr);
b6f72f96 5210 unsigned int next_frag;
b3332930 5211
8d68af6a
JW		 5212 /* first fill the linear space */
5213 if (!skb->len) {
5214 unsigned int linear = min(data_len, skb_tailroom(skb));
0da9581d 5215
8d68af6a
JW		 5216 skb_put_data(skb, element->addr + offset, linear);
5217 data_len -= linear;
5218 if (!data_len)
5219 return;
5220 offset += linear;
5221 /* fall through to add page frag for remaining data */
4a71df50 5222 }
0da9581d 5223
8d68af6a 5224 next_frag = skb_shinfo(skb)->nr_frags;
b6f72f96 5225 get_page(page);
8d68af6a 5226 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
4a71df50
FB		 5227}
5228
bca51650
TR		 5229static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5230{
5231 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5232}
5233
4a71df50 5234struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5235 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5236 struct qdio_buffer_element **__element, int *__offset,
5237 struct qeth_hdr **hdr)
5238{
5239 struct qdio_buffer_element *element = *__element;
b3332930 5240 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50 5241 int offset = *__offset;
8d68af6a 5242 struct sk_buff *skb;
76b11f8e 5243 int skb_len = 0;
4a71df50
FB		 5244 void *data_ptr;
5245 int data_len;
5246 int headroom = 0;
5247 int use_rx_sg = 0;
4a71df50 5248
4a71df50 5249 /* qeth_hdr must not cross element boundaries */
864c17c3 5250 while (element->length < offset + sizeof(struct qeth_hdr)) {
4a71df50
FB		 5251 if (qeth_is_last_sbale(element))
5252 return NULL;
5253 element++;
5254 offset = 0;
4a71df50
FB		 5255 }
5256 *hdr = element->addr + offset;
5257
5258 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5259 switch ((*hdr)->hdr.l2.id) {
5260 case QETH_HEADER_TYPE_LAYER2:
5261 skb_len = (*hdr)->hdr.l2.pkt_length;
5262 break;
5263 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5264 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5265 headroom = ETH_HLEN;
76b11f8e
UB		 5266 break;
5267 case QETH_HEADER_TYPE_OSN:
5268 skb_len = (*hdr)->hdr.osn.pdu_length;
5269 headroom = sizeof(struct qeth_hdr);
5270 break;
5271 default:
5272 break;
4a71df50
FB		 5273 }
5274
5275 if (!skb_len)
5276 return NULL;
5277
b3332930
FB		 5278 if (((skb_len >= card->options.rx_sg_cb) &&
5279 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5280 (!atomic_read(&card->force_alloc_skb))) ||
8d68af6a 5281 (card->options.cq == QETH_CQ_ENABLED))
4a71df50 5282 use_rx_sg = 1;
8d68af6a
JW		 5283
5284 if (use_rx_sg && qethbuffer->rx_skb) {
5285 /* QETH_CQ_ENABLED only: */
5286 skb = qethbuffer->rx_skb;
5287 qethbuffer->rx_skb = NULL;
4a71df50 5288 } else {
8d68af6a
JW		 5289 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5290
37cf05d2 5291 skb = napi_alloc_skb(&card->napi, linear + headroom);
4a71df50 5292 }
8d68af6a
JW		 5293 if (!skb)
5294 goto no_mem;
5295 if (headroom)
5296 skb_reserve(skb, headroom);
4a71df50
FB		 5297
5298 data_ptr = element->addr + offset;
5299 while (skb_len) {
5300 data_len = min(skb_len, (int)(element->length - offset));
5301 if (data_len) {
8d68af6a
JW		 5302 if (use_rx_sg)
5303 qeth_create_skb_frag(element, skb, offset,
5304 data_len);
5305 else
59ae1d12 5306 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5307 }
5308 skb_len -= data_len;
5309 if (skb_len) {
5310 if (qeth_is_last_sbale(element)) {
847a50fd 5311 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5312 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5313 dev_kfree_skb_any(skb);
5314 card->stats.rx_errors++;
5315 return NULL;
5316 }
5317 element++;
5318 offset = 0;
5319 data_ptr = element->addr;
5320 } else {
5321 offset += data_len;
5322 }
5323 }
5324 *__element = element;
5325 *__offset = offset;
5326 if (use_rx_sg && card->options.performance_stats) {
5327 card->perf_stats.sg_skbs_rx++;
5328 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5329 }
5330 return skb;
5331no_mem:
5332 if (net_ratelimit()) {
847a50fd 5333 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5334 }
5335 card->stats.rx_dropped++;
5336 return NULL;
5337}
5338EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5339
d73ef324
JW		 5340int qeth_poll(struct napi_struct *napi, int budget)
5341{
5342 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5343 int work_done = 0;
5344 struct qeth_qdio_buffer *buffer;
5345 int done;
5346 int new_budget = budget;
5347
5348 if (card->options.performance_stats) {
5349 card->perf_stats.inbound_cnt++;
5350 card->perf_stats.inbound_start_time = qeth_get_micros();
5351 }
5352
5353 while (1) {
5354 if (!card->rx.b_count) {
5355 card->rx.qdio_err = 0;
5356 card->rx.b_count = qdio_get_next_buffers(
5357 card->data.ccwdev, 0, &card->rx.b_index,
5358 &card->rx.qdio_err);
5359 if (card->rx.b_count <= 0) {
5360 card->rx.b_count = 0;
5361 break;
5362 }
5363 card->rx.b_element =
5364 &card->qdio.in_q->bufs[card->rx.b_index]
5365 .buffer->element[0];
5366 card->rx.e_offset = 0;
5367 }
5368
5369 while (card->rx.b_count) {
5370 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5371 if (!(card->rx.qdio_err &&
5372 qeth_check_qdio_errors(card, buffer->buffer,
5373 card->rx.qdio_err, "qinerr")))
5374 work_done +=
5375 card->discipline->process_rx_buffer(
5376 card, new_budget, &done);
5377 else
5378 done = 1;
5379
5380 if (done) {
5381 if (card->options.performance_stats)
5382 card->perf_stats.bufs_rec++;
5383 qeth_put_buffer_pool_entry(card,
5384 buffer->pool_entry);
5385 qeth_queue_input_buffer(card, card->rx.b_index);
5386 card->rx.b_count--;
5387 if (card->rx.b_count) {
5388 card->rx.b_index =
5389 (card->rx.b_index + 1) %
5390 QDIO_MAX_BUFFERS_PER_Q;
5391 card->rx.b_element =
5392 &card->qdio.in_q
5393 ->bufs[card->rx.b_index]
5394 .buffer->element[0];
5395 card->rx.e_offset = 0;
5396 }
5397 }
5398
5399 if (work_done >= budget)
5400 goto out;
5401 else
5402 new_budget = budget - work_done;
5403 }
5404 }
5405
978759e8 5406 napi_complete_done(napi, work_done);
d73ef324
JW		 5407 if (qdio_start_irq(card->data.ccwdev, 0))
5408 napi_schedule(&card->napi);
5409out:
5410 if (card->options.performance_stats)
5411 card->perf_stats.inbound_time += qeth_get_micros() -
5412 card->perf_stats.inbound_start_time;
5413 return work_done;
5414}
5415EXPORT_SYMBOL_GPL(qeth_poll);
5416
ad3cbf61
JW		 5417static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
5418{
5419 if (!cmd->hdr.return_code)
5420 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5421 return cmd->hdr.return_code;
5422}
5423
8f43fb00
TR		 5424int qeth_setassparms_cb(struct qeth_card *card,
5425 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5426{
5427 struct qeth_ipa_cmd *cmd;
5428
5429 QETH_CARD_TEXT(card, 4, "defadpcb");
5430
5431 cmd = (struct qeth_ipa_cmd *) data;
5432 if (cmd->hdr.return_code == 0) {
5433 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5434 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5435 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5436 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5437 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5438 }
4d7def2a
TR		 5439 return 0;
5440}
8f43fb00 5441EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5442
b475e316
TR		 5443struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5444 enum qeth_ipa_funcs ipa_func,
5445 __u16 cmd_code, __u16 len,
5446 enum qeth_prot_versions prot)
4d7def2a
TR		 5447{
5448 struct qeth_cmd_buffer *iob;
5449 struct qeth_ipa_cmd *cmd;
5450
5451 QETH_CARD_TEXT(card, 4, "getasscm");
5452 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5453
5454 if (iob) {
ff5caa7a 5455 cmd = __ipa_cmd(iob);
4d7def2a
TR		 5456 cmd->data.setassparms.hdr.assist_no = ipa_func;
5457 cmd->data.setassparms.hdr.length = 8 + len;
5458 cmd->data.setassparms.hdr.command_code = cmd_code;
5459 cmd->data.setassparms.hdr.return_code = 0;
5460 cmd->data.setassparms.hdr.seq_no = 0;
5461 }
5462
5463 return iob;
5464}
b475e316 5465EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5466
5467int qeth_send_setassparms(struct qeth_card *card,
5468 struct qeth_cmd_buffer *iob, __u16 len, long data,
5469 int (*reply_cb)(struct qeth_card *,
5470 struct qeth_reply *, unsigned long),
5471 void *reply_param)
5472{
5473 int rc;
5474 struct qeth_ipa_cmd *cmd;
5475
5476 QETH_CARD_TEXT(card, 4, "sendassp");
5477
ff5caa7a 5478 cmd = __ipa_cmd(iob);
4d7def2a
TR		 5479 if (len <= sizeof(__u32))
5480 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5481 else /* (len > sizeof(__u32)) */
5482 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5483
5484 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5485 return rc;
5486}
5487EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5488
a8155b00
KM		 5489int qeth_send_simple_setassparms_prot(struct qeth_card *card,
5490 enum qeth_ipa_funcs ipa_func,
5491 u16 cmd_code, long data,
5492 enum qeth_prot_versions prot)
4d7def2a
TR		 5493{
5494 int rc;
5495 int length = 0;
5496 struct qeth_cmd_buffer *iob;
5497
a8155b00 5498 QETH_CARD_TEXT_(card, 4, "simassp%i", prot);
4d7def2a
TR		 5499 if (data)
5500 length = sizeof(__u32);
a8155b00 5501 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, length, prot);
4d7def2a
TR		 5502 if (!iob)
5503 return -ENOMEM;
5504 rc = qeth_send_setassparms(card, iob, length, data,
5505 qeth_setassparms_cb, NULL);
5506 return rc;
5507}
a8155b00 5508EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms_prot);
4d7def2a 5509
4a71df50
FB		 5510static void qeth_unregister_dbf_views(void)
5511{
d11ba0c4
PT		 5512 int x;
5513 for (x = 0; x < QETH_DBF_INFOS; x++) {
5514 debug_unregister(qeth_dbf[x].id);
5515 qeth_dbf[x].id = NULL;
5516 }
4a71df50
FB		 5517}
5518
8e96c51c 5519void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5520{
5521 char dbf_txt_buf[32];
345aa66e 5522 va_list args;
cd023216 5523
8e6a8285 5524 if (!debug_level_enabled(id, level))
cd023216 5525 return;
345aa66e
PT		 5526 va_start(args, fmt);
5527 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5528 va_end(args);
8e96c51c 5529 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5530}
5531EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5532
4a71df50
FB		 5533static int qeth_register_dbf_views(void)
5534{
d11ba0c4
PT		 5535 int ret;
5536 int x;
5537
5538 for (x = 0; x < QETH_DBF_INFOS; x++) {
5539 /* register the areas */
5540 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5541 qeth_dbf[x].pages,
5542 qeth_dbf[x].areas,
5543 qeth_dbf[x].len);
5544 if (qeth_dbf[x].id == NULL) {
5545 qeth_unregister_dbf_views();
5546 return -ENOMEM;
5547 }
4a71df50 5548
d11ba0c4
PT		 5549 /* register a view */
5550 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5551 if (ret) {
5552 qeth_unregister_dbf_views();
5553 return ret;
5554 }
4a71df50 5555
d11ba0c4
PT		 5556 /* set a passing level */
5557 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5558 }
4a71df50
FB		 5559
5560 return 0;
5561}
5562
5563int qeth_core_load_discipline(struct qeth_card *card,
5564 enum qeth_discipline_id discipline)
5565{
5566 int rc = 0;
c70eb09d 5567
2022e00c 5568 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5569 switch (discipline) {
5570 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5571 card->discipline = try_then_request_module(
5572 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5573 break;
5574 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5575 card->discipline = try_then_request_module(
5576 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5577 break;
c70eb09d
JW		 5578 default:
5579 break;
4a71df50 5580 }
c70eb09d 5581
c041f2d4 5582 if (!card->discipline) {
74eacdb9
FB		 5583 dev_err(&card->gdev->dev, "There is no kernel module to "
5584 "support discipline %d\n", discipline);
4a71df50
FB		 5585 rc = -EINVAL;
5586 }
2022e00c 5587 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5588 return rc;
5589}
5590
5591void qeth_core_free_discipline(struct qeth_card *card)
5592{
5593 if (card->options.layer2)
c041f2d4 5594 symbol_put(qeth_l2_discipline);
4a71df50 5595 else
c041f2d4
SO		 5596 symbol_put(qeth_l3_discipline);
5597 card->discipline = NULL;
4a71df50
FB		 5598}
5599
2d2ebb3e 5600const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5601 .name = "qeth_generic",
5602 .groups = qeth_generic_attr_groups,
5603};
2d2ebb3e
JW		 5604EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5605
b7169c51
SO		 5606static const struct device_type qeth_osn_devtype = {
5607 .name = "qeth_osn",
5608 .groups = qeth_osn_attr_groups,
5609};
5610
819dc537
SR		 5611#define DBF_NAME_LEN 20
5612
5613struct qeth_dbf_entry {
5614 char dbf_name[DBF_NAME_LEN];
5615 debug_info_t *dbf_info;
5616 struct list_head dbf_list;
5617};
5618
5619static LIST_HEAD(qeth_dbf_list);
5620static DEFINE_MUTEX(qeth_dbf_list_mutex);
5621
5622static debug_info_t *qeth_get_dbf_entry(char *name)
5623{
5624 struct qeth_dbf_entry *entry;
5625 debug_info_t *rc = NULL;
5626
5627 mutex_lock(&qeth_dbf_list_mutex);
5628 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5629 if (strcmp(entry->dbf_name, name) == 0) {
5630 rc = entry->dbf_info;
5631 break;
5632 }
5633 }
5634 mutex_unlock(&qeth_dbf_list_mutex);
5635 return rc;
5636}
5637
5638static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5639{
5640 struct qeth_dbf_entry *new_entry;
5641
5642 card->debug = debug_register(name, 2, 1, 8);
5643 if (!card->debug) {
5644 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5645 goto err;
5646 }
5647 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5648 goto err_dbg;
5649 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5650 if (!new_entry)
5651 goto err_dbg;
5652 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5653 new_entry->dbf_info = card->debug;
5654 mutex_lock(&qeth_dbf_list_mutex);
5655 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5656 mutex_unlock(&qeth_dbf_list_mutex);
5657
5658 return 0;
5659
5660err_dbg:
5661 debug_unregister(card->debug);
5662err:
5663 return -ENOMEM;
5664}
5665
5666static void qeth_clear_dbf_list(void)
5667{
5668 struct qeth_dbf_entry *entry, *tmp;
5669
5670 mutex_lock(&qeth_dbf_list_mutex);
5671 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5672 list_del(&entry->dbf_list);
5673 debug_unregister(entry->dbf_info);
5674 kfree(entry);
5675 }
5676 mutex_unlock(&qeth_dbf_list_mutex);
5677}
5678
d3d1b205
JW		 5679static struct net_device *qeth_alloc_netdev(struct qeth_card *card)
5680{
5681 struct net_device *dev;
5682
5683 switch (card->info.type) {
5684 case QETH_CARD_TYPE_IQD:
5685 dev = alloc_netdev(0, "hsi%d", NET_NAME_UNKNOWN, ether_setup);
5686 break;
5687 case QETH_CARD_TYPE_OSN:
5688 dev = alloc_netdev(0, "osn%d", NET_NAME_UNKNOWN, ether_setup);
5689 break;
5690 default:
5691 dev = alloc_etherdev(0);
5692 }
5693
5694 if (!dev)
5695 return NULL;
5696
5697 dev->ml_priv = card;
5698 dev->watchdog_timeo = QETH_TX_TIMEOUT;
72f219da 5699 dev->min_mtu = IS_OSN(card) ? 64 : 576;
8ce7a9e0
JW		 5700 /* initialized when device first goes online: */
5701 dev->max_mtu = 0;
5702 dev->mtu = 0;
d3d1b205
JW		 5703 SET_NETDEV_DEV(dev, &card->gdev->dev);
5704 netif_carrier_off(dev);
5f89eca5
JW		 5705
5706 if (!IS_OSN(card)) {
5707 dev->priv_flags &= ~IFF_TX_SKB_SHARING;
5708 dev->hw_features |= NETIF_F_SG;
5709 dev->vlan_features |= NETIF_F_SG;
04db741d
JW		 5710 if (IS_IQD(card))
5711 dev->features |= NETIF_F_SG;
5f89eca5
JW		 5712 }
5713
d3d1b205
JW		 5714 return dev;
5715}
5716
5717struct net_device *qeth_clone_netdev(struct net_device *orig)
5718{
5719 struct net_device *clone = qeth_alloc_netdev(orig->ml_priv);
5720
5721 if (!clone)
5722 return NULL;
5723
5724 clone->dev_port = orig->dev_port;
5725 return clone;
5726}
5727
4a71df50
FB		 5728static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5729{
5730 struct qeth_card *card;
5731 struct device *dev;
5732 int rc;
c70eb09d 5733 enum qeth_discipline_id enforced_disc;
4a71df50 5734 unsigned long flags;
819dc537 5735 char dbf_name[DBF_NAME_LEN];
4a71df50 5736
d11ba0c4 5737 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5738
5739 dev = &gdev->dev;
5740 if (!get_device(dev))
5741 return -ENODEV;
5742
2a0217d5 5743 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5744
5745 card = qeth_alloc_card();
5746 if (!card) {
d11ba0c4 5747 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5748 rc = -ENOMEM;
5749 goto err_dev;
5750 }
af039068
CO		 5751
5752 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5753 dev_name(&gdev->dev));
819dc537 5754 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5755 if (!card->debug) {
819dc537
SR		 5756 rc = qeth_add_dbf_entry(card, dbf_name);
5757 if (rc)
5758 goto err_card;
af039068 5759 }
af039068 5760
4a71df50
FB		 5761 card->read.ccwdev = gdev->cdev[0];
5762 card->write.ccwdev = gdev->cdev[1];
5763 card->data.ccwdev = gdev->cdev[2];
5764 dev_set_drvdata(&gdev->dev, card);
5765 card->gdev = gdev;
5766 gdev->cdev[0]->handler = qeth_irq;
5767 gdev->cdev[1]->handler = qeth_irq;
5768 gdev->cdev[2]->handler = qeth_irq;
5769
95f4d8b7
JW		 5770 qeth_setup_card(card);
5771 qeth_update_from_chp_desc(card);
4a71df50 5772
d3d1b205 5773 card->dev = qeth_alloc_netdev(card);
778b1ac7
JW		 5774 if (!card->dev) {
5775 rc = -ENOMEM;
d3d1b205 5776 goto err_card;
778b1ac7 5777 }
d3d1b205 5778
c70eb09d
JW		 5779 qeth_determine_capabilities(card);
5780 enforced_disc = qeth_enforce_discipline(card);
5781 switch (enforced_disc) {
5782 case QETH_DISCIPLINE_UNDETERMINED:
5783 gdev->dev.type = &qeth_generic_devtype;
5784 break;
5785 default:
5786 card->info.layer_enforced = true;
5787 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5788 if (rc)
d3d1b205 5789 goto err_load;
2d2ebb3e
JW		 5790
5791 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5792 ? card->discipline->devtype
5793 : &qeth_osn_devtype;
c041f2d4 5794 rc = card->discipline->setup(card->gdev);
4a71df50 5795 if (rc)
5113fec0 5796 goto err_disc;
2d2ebb3e 5797 break;
4a71df50
FB		 5798 }
5799
5800 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5801 list_add_tail(&card->list, &qeth_core_card_list.list);
5802 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5803 return 0;
5804
5113fec0
UB		 5805err_disc:
5806 qeth_core_free_discipline(card);
d3d1b205
JW		 5807err_load:
5808 free_netdev(card->dev);
4a71df50
FB		 5809err_card:
5810 qeth_core_free_card(card);
5811err_dev:
5812 put_device(dev);
5813 return rc;
5814}
5815
5816static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5817{
5818 unsigned long flags;
5819 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5820
28a7e4c9 5821 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5822
c041f2d4
SO		 5823 if (card->discipline) {
5824 card->discipline->remove(gdev);
9dc48ccc
UB		 5825 qeth_core_free_discipline(card);
5826 }
5827
4a71df50
FB		 5828 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5829 list_del(&card->list);
5830 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
d3d1b205 5831 free_netdev(card->dev);
4a71df50
FB		 5832 qeth_core_free_card(card);
5833 dev_set_drvdata(&gdev->dev, NULL);
5834 put_device(&gdev->dev);
4a71df50
FB		 5835}
5836
5837static int qeth_core_set_online(struct ccwgroup_device *gdev)
5838{
5839 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5840 int rc = 0;
c70eb09d 5841 enum qeth_discipline_id def_discipline;
4a71df50 5842
c041f2d4 5843 if (!card->discipline) {
4a71df50
FB		 5844 if (card->info.type == QETH_CARD_TYPE_IQD)
5845 def_discipline = QETH_DISCIPLINE_LAYER3;
5846 else
5847 def_discipline = QETH_DISCIPLINE_LAYER2;
5848 rc = qeth_core_load_discipline(card, def_discipline);
5849 if (rc)
5850 goto err;
c041f2d4 5851 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5852 if (rc) {
5853 qeth_core_free_discipline(card);
4a71df50 5854 goto err;
9111e788 5855 }
4a71df50 5856 }
c041f2d4 5857 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5858err:
5859 return rc;
5860}
5861
5862static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5863{
5864 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5865 return card->discipline->set_offline(gdev);
4a71df50
FB		 5866}
5867
5868static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5869{
5870 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5871 qeth_set_allowed_threads(card, 0, 1);
5872 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5873 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5874 qeth_qdio_clear_card(card, 0);
5875 qeth_clear_qdio_buffers(card);
5876 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5877}
5878
bbcfcdc8
FB		 5879static int qeth_core_freeze(struct ccwgroup_device *gdev)
5880{
5881 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5882 if (card->discipline && card->discipline->freeze)
5883 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5884 return 0;
5885}
5886
5887static int qeth_core_thaw(struct ccwgroup_device *gdev)
5888{
5889 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5890 if (card->discipline && card->discipline->thaw)
5891 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5892 return 0;
5893}
5894
5895static int qeth_core_restore(struct ccwgroup_device *gdev)
5896{
5897 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5898 if (card->discipline && card->discipline->restore)
5899 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5900 return 0;
5901}
5902
36369569
GKH		 5903static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5904 size_t count)
4a71df50
FB		 5905{
5906 int err;
4a71df50 5907
6d8769ab
JW		 5908 err = ccwgroup_create_dev(qeth_core_root_dev, to_ccwgroupdrv(ddrv), 3,
5909 buf);
b7169c51
SO		 5910
5911 return err ? err : count;
5912}
36369569 5913static DRIVER_ATTR_WO(group);
4a71df50 5914
f47e2256
SO		 5915static struct attribute *qeth_drv_attrs[] = {
5916 &driver_attr_group.attr,
5917 NULL,
5918};
5919static struct attribute_group qeth_drv_attr_group = {
5920 .attrs = qeth_drv_attrs,
5921};
5922static const struct attribute_group *qeth_drv_attr_groups[] = {
5923 &qeth_drv_attr_group,
5924 NULL,
5925};
5926
6d8769ab
JW		 5927static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5928 .driver = {
5929 .groups = qeth_drv_attr_groups,
5930 .owner = THIS_MODULE,
5931 .name = "qeth",
5932 },
5933 .ccw_driver = &qeth_ccw_driver,
5934 .setup = qeth_core_probe_device,
5935 .remove = qeth_core_remove_device,
5936 .set_online = qeth_core_set_online,
5937 .set_offline = qeth_core_set_offline,
5938 .shutdown = qeth_core_shutdown,
5939 .prepare = NULL,
5940 .complete = NULL,
5941 .freeze = qeth_core_freeze,
5942 .thaw = qeth_core_thaw,
5943 .restore = qeth_core_restore,
5944};
5945
942d6984
JW		 5946int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5947{
5948 struct qeth_card *card = dev->ml_priv;
5949 struct mii_ioctl_data *mii_data;
5950 int rc = 0;
5951
5952 if (!card)
5953 return -ENODEV;
5954
5955 if (!qeth_card_hw_is_reachable(card))
5956 return -ENODEV;
5957
5958 if (card->info.type == QETH_CARD_TYPE_OSN)
5959 return -EPERM;
5960
5961 switch (cmd) {
5962 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5963 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5964 break;
5965 case SIOC_QETH_GET_CARD_TYPE:
5966 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5967 card->info.type == QETH_CARD_TYPE_OSM ||
5968 card->info.type == QETH_CARD_TYPE_OSX) &&
5969 !card->info.guestlan)
5970 return 1;
5971 else
5972 return 0;
5973 case SIOCGMIIPHY:
5974 mii_data = if_mii(rq);
5975 mii_data->phy_id = 0;
5976 break;
5977 case SIOCGMIIREG:
5978 mii_data = if_mii(rq);
5979 if (mii_data->phy_id != 0)
5980 rc = -EINVAL;
5981 else
5982 mii_data->val_out = qeth_mdio_read(dev,
5983 mii_data->phy_id, mii_data->reg_num);
5984 break;
5985 case SIOC_QETH_QUERY_OAT:
5986 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5987 break;
5988 default:
5989 if (card->discipline->do_ioctl)
5990 rc = card->discipline->do_ioctl(dev, rq, cmd);
5991 else
5992 rc = -EOPNOTSUPP;
5993 }
5994 if (rc)
5995 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5996 return rc;
5997}
5998EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5999
4a71df50
FB		 6000static struct {
6001 const char str[ETH_GSTRING_LEN];
6002} qeth_ethtool_stats_keys[] = {
6003/* 0 */{"rx skbs"},
6004 {"rx buffers"},
6005 {"tx skbs"},
6006 {"tx buffers"},
6007 {"tx skbs no packing"},
6008 {"tx buffers no packing"},
6009 {"tx skbs packing"},
6010 {"tx buffers packing"},
6011 {"tx sg skbs"},
d2a274b2 6012 {"tx buffer elements"},
4a71df50
FB		 6013/* 10 */{"rx sg skbs"},
6014 {"rx sg frags"},
6015 {"rx sg page allocs"},
6016 {"tx large kbytes"},
6017 {"tx large count"},
6018 {"tx pk state ch n->p"},
6019 {"tx pk state ch p->n"},
6020 {"tx pk watermark low"},
6021 {"tx pk watermark high"},
6022 {"queue 0 buffer usage"},
6023/* 20 */{"queue 1 buffer usage"},
6024 {"queue 2 buffer usage"},
6025 {"queue 3 buffer usage"},
a1c3ed4c
FB		 6026 {"rx poll time"},
6027 {"rx poll count"},
4a71df50
FB		 6028 {"rx do_QDIO time"},
6029 {"rx do_QDIO count"},
6030 {"tx handler time"},
6031 {"tx handler count"},
6032 {"tx time"},
6033/* 30 */{"tx count"},
6034 {"tx do_QDIO time"},
6035 {"tx do_QDIO count"},
f61a0d05 6036 {"tx csum"},
c3b4a740 6037 {"tx lin"},
6059c905 6038 {"tx linfail"},
0da9581d 6039 {"cq handler count"},
3aade31b
KM		 6040 {"cq handler time"},
6041 {"rx csum"}
4a71df50
FB		 6042};
6043
df8b4ec8 6044int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 6045{
df8b4ec8
BH		 6046 switch (stringset) {
6047 case ETH_SS_STATS:
6048 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
6049 default:
6050 return -EINVAL;
6051 }
4a71df50 6052}
df8b4ec8 6053EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 6054
6055void qeth_core_get_ethtool_stats(struct net_device *dev,
6056 struct ethtool_stats *stats, u64 *data)
6057{
509e2562 6058 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 6059 data[0] = card->stats.rx_packets -
6060 card->perf_stats.initial_rx_packets;
6061 data[1] = card->perf_stats.bufs_rec;
6062 data[2] = card->stats.tx_packets -
6063 card->perf_stats.initial_tx_packets;
6064 data[3] = card->perf_stats.bufs_sent;
6065 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
6066 - card->perf_stats.skbs_sent_pack;
6067 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
6068 data[6] = card->perf_stats.skbs_sent_pack;
6069 data[7] = card->perf_stats.bufs_sent_pack;
6070 data[8] = card->perf_stats.sg_skbs_sent;
d2a274b2 6071 data[9] = card->perf_stats.buf_elements_sent;
4a71df50
FB		 6072 data[10] = card->perf_stats.sg_skbs_rx;
6073 data[11] = card->perf_stats.sg_frags_rx;
6074 data[12] = card->perf_stats.sg_alloc_page_rx;
6075 data[13] = (card->perf_stats.large_send_bytes >> 10);
6076 data[14] = card->perf_stats.large_send_cnt;
6077 data[15] = card->perf_stats.sc_dp_p;
6078 data[16] = card->perf_stats.sc_p_dp;
6079 data[17] = QETH_LOW_WATERMARK_PACK;
6080 data[18] = QETH_HIGH_WATERMARK_PACK;
6081 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
6082 data[20] = (card->qdio.no_out_queues > 1) ?
6083 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
6084 data[21] = (card->qdio.no_out_queues > 2) ?
6085 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
6086 data[22] = (card->qdio.no_out_queues > 3) ?
6087 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
6088 data[23] = card->perf_stats.inbound_time;
6089 data[24] = card->perf_stats.inbound_cnt;
6090 data[25] = card->perf_stats.inbound_do_qdio_time;
6091 data[26] = card->perf_stats.inbound_do_qdio_cnt;
6092 data[27] = card->perf_stats.outbound_handler_time;
6093 data[28] = card->perf_stats.outbound_handler_cnt;
6094 data[29] = card->perf_stats.outbound_time;
6095 data[30] = card->perf_stats.outbound_cnt;
6096 data[31] = card->perf_stats.outbound_do_qdio_time;
6097 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 6098 data[33] = card->perf_stats.tx_csum;
c3b4a740 6099 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 6100 data[35] = card->perf_stats.tx_linfail;
6101 data[36] = card->perf_stats.cq_cnt;
6102 data[37] = card->perf_stats.cq_time;
3aade31b 6103 data[38] = card->perf_stats.rx_csum;
4a71df50
FB		 6104}
6105EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
6106
6107void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
6108{
6109 switch (stringset) {
6110 case ETH_SS_STATS:
6111 memcpy(data, &qeth_ethtool_stats_keys,
6112 sizeof(qeth_ethtool_stats_keys));
6113 break;
6114 default:
6115 WARN_ON(1);
6116 break;
6117 }
6118}
6119EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6120
6121void qeth_core_get_drvinfo(struct net_device *dev,
6122 struct ethtool_drvinfo *info)
6123{
509e2562 6124 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 6125
6126 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
6127 sizeof(info->driver));
6128 strlcpy(info->version, "1.0", sizeof(info->version));
6129 strlcpy(info->fw_version, card->info.mcl_level,
6130 sizeof(info->fw_version));
6131 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6132 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6133}
6134EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6135
774afb8e
JW		 6136/* Helper function to fill 'advertising' and 'supported' which are the same. */
6137/* Autoneg and full-duplex are supported and advertised unconditionally. */
6138/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6139/* specified port type. */
993e19c0 6140static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6141 int maxspeed, int porttype)
6142{
41fc3b65
JW		 6143 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6144 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6145 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6146
41fc3b65
JW		 6147 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6148 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6149
6150 switch (porttype) {
6151 case PORT_TP:
41fc3b65
JW		 6152 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6153 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6154 break;
6155 case PORT_FIBRE:
41fc3b65
JW		 6156 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6157 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6158 break;
6159 default:
41fc3b65
JW		 6160 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6161 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6162 WARN_ON_ONCE(1);
6163 }
6164
774afb8e 6165 /* fallthrough from high to low, to select all legal speeds: */
02d5cb5b
EC		 6166 switch (maxspeed) {
6167 case SPEED_10000:
41fc3b65
JW		 6168 ethtool_link_ksettings_add_link_mode(cmd, supported,
6169 10000baseT_Full);
6170 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6171 10000baseT_Full);
02d5cb5b 6172 case SPEED_1000:
41fc3b65
JW		 6173 ethtool_link_ksettings_add_link_mode(cmd, supported,
6174 1000baseT_Full);
6175 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6176 1000baseT_Full);
6177 ethtool_link_ksettings_add_link_mode(cmd, supported,
6178 1000baseT_Half);
6179 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6180 1000baseT_Half);
02d5cb5b 6181 case SPEED_100:
41fc3b65
JW		 6182 ethtool_link_ksettings_add_link_mode(cmd, supported,
6183 100baseT_Full);
6184 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6185 100baseT_Full);
6186 ethtool_link_ksettings_add_link_mode(cmd, supported,
6187 100baseT_Half);
6188 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6189 100baseT_Half);
02d5cb5b 6190 case SPEED_10:
41fc3b65
JW		 6191 ethtool_link_ksettings_add_link_mode(cmd, supported,
6192 10baseT_Full);
6193 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6194 10baseT_Full);
6195 ethtool_link_ksettings_add_link_mode(cmd, supported,
6196 10baseT_Half);
6197 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6198 10baseT_Half);
774afb8e
JW		 6199 /* end fallthrough */
6200 break;
02d5cb5b 6201 default:
41fc3b65
JW		 6202 ethtool_link_ksettings_add_link_mode(cmd, supported,
6203 10baseT_Full);
6204 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6205 10baseT_Full);
6206 ethtool_link_ksettings_add_link_mode(cmd, supported,
6207 10baseT_Half);
6208 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6209 10baseT_Half);
02d5cb5b
EC		 6210 WARN_ON_ONCE(1);
6211 }
02d5cb5b
EC		 6212}
6213
993e19c0
JW		 6214int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6215 struct ethtool_link_ksettings *cmd)
3f9975aa 6216{
509e2562 6217 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6218 enum qeth_link_types link_type;
02d5cb5b 6219 struct carrier_info carrier_info;
511c2445 6220 int rc;
3f9975aa
FB		 6221
6222 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6223 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6224 else
6225 link_type = card->info.link_type;
6226
993e19c0
JW		 6227 cmd->base.duplex = DUPLEX_FULL;
6228 cmd->base.autoneg = AUTONEG_ENABLE;
6229 cmd->base.phy_address = 0;
6230 cmd->base.mdio_support = 0;
6231 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6232 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6233
6234 switch (link_type) {
6235 case QETH_LINK_TYPE_FAST_ETH:
6236 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6237 cmd->base.speed = SPEED_100;
6238 cmd->base.port = PORT_TP;
3f9975aa 6239 break;
3f9975aa
FB		 6240 case QETH_LINK_TYPE_GBIT_ETH:
6241 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6242 cmd->base.speed = SPEED_1000;
6243 cmd->base.port = PORT_FIBRE;
3f9975aa 6244 break;
3f9975aa 6245 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6246 cmd->base.speed = SPEED_10000;
6247 cmd->base.port = PORT_FIBRE;
3f9975aa 6248 break;
3f9975aa 6249 default:
993e19c0
JW		 6250 cmd->base.speed = SPEED_10;
6251 cmd->base.port = PORT_TP;
3f9975aa 6252 }
993e19c0 6253 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6254
02d5cb5b
EC		 6255 /* Check if we can obtain more accurate information. */
6256 /* If QUERY_CARD_INFO command is not supported or fails, */
6257 /* just return the heuristics that was filled above. */
511c2445
EC		 6258 if (!qeth_card_hw_is_reachable(card))
6259 return -ENODEV;
6260 rc = qeth_query_card_info(card, &carrier_info);
6261 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6262 return 0;
511c2445
EC		 6263 if (rc) /* report error from the hardware operation */
6264 return rc;
6265 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6266
6267 netdev_dbg(netdev,
6268 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6269 carrier_info.card_type,
6270 carrier_info.port_mode,
6271 carrier_info.port_speed);
6272
6273 /* Update attributes for which we've obtained more authoritative */
6274 /* information, leave the rest the way they where filled above. */
6275 switch (carrier_info.card_type) {
6276 case CARD_INFO_TYPE_1G_COPPER_A:
6277 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6278 cmd->base.port = PORT_TP;
6279 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6280 break;
6281 case CARD_INFO_TYPE_1G_FIBRE_A:
6282 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6283 cmd->base.port = PORT_FIBRE;
6284 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6285 break;
6286 case CARD_INFO_TYPE_10G_FIBRE_A:
6287 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6288 cmd->base.port = PORT_FIBRE;
6289 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6290 break;
6291 }
6292
6293 switch (carrier_info.port_mode) {
6294 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6295 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6296 break;
6297 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6298 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6299 break;
6300 }
6301
6302 switch (carrier_info.port_speed) {
6303 case CARD_INFO_PORTS_10M:
993e19c0 6304 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6305 break;
6306 case CARD_INFO_PORTS_100M:
993e19c0 6307 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6308 break;
6309 case CARD_INFO_PORTS_1G:
993e19c0 6310 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6311 break;
6312 case CARD_INFO_PORTS_10G:
993e19c0 6313 cmd->base.speed = SPEED_10000;
02d5cb5b
EC		 6314 break;
6315 }
6316
3f9975aa
FB		 6317 return 0;
6318}
993e19c0 6319EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6320
c9475369
TR		 6321/* Callback to handle checksum offload command reply from OSA card.
6322 * Verify that required features have been enabled on the card.
6323 * Return error in hdr->return_code as this value is checked by caller.
6324 *
6325 * Always returns zero to indicate no further messages from the OSA card.
6326 */
6327static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6328 struct qeth_reply *reply,
6329 unsigned long data)
6330{
6331 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6332 struct qeth_checksum_cmd *chksum_cb =
6333 (struct qeth_checksum_cmd *)reply->param;
6334
6335 QETH_CARD_TEXT(card, 4, "chkdoccb");
ad3cbf61 6336 if (qeth_setassparms_inspect_rc(cmd))
c9475369
TR		 6337 return 0;
6338
6339 memset(chksum_cb, 0, sizeof(*chksum_cb));
6340 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6341 chksum_cb->supported =
6342 cmd->data.setassparms.data.chksum.supported;
6343 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6344 }
6345 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6346 chksum_cb->supported =
6347 cmd->data.setassparms.data.chksum.supported;
6348 chksum_cb->enabled =
6349 cmd->data.setassparms.data.chksum.enabled;
6350 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6351 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6352 }
6353 return 0;
6354}
6355
6356/* Send command to OSA card and check results. */
6357static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6358 enum qeth_ipa_funcs ipa_func,
6359 __u16 cmd_code, long data,
a8155b00
KM		 6360 struct qeth_checksum_cmd *chksum_cb,
6361 enum qeth_prot_versions prot)
c9475369
TR		 6362{
6363 struct qeth_cmd_buffer *iob;
6364 int rc = -ENOMEM;
6365
6366 QETH_CARD_TEXT(card, 4, "chkdocmd");
6367 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
a8155b00 6368 sizeof(__u32), prot);
c9475369
TR		 6369 if (iob)
6370 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6371 qeth_ipa_checksum_run_cmd_cb,
6372 chksum_cb);
6373 return rc;
6374}
6375
a8155b00
KM		 6376static int qeth_send_checksum_on(struct qeth_card *card, int cstype,
6377 enum qeth_prot_versions prot)
4d7def2a 6378{
571f9dd8 6379 u32 required_features = QETH_IPA_CHECKSUM_UDP | QETH_IPA_CHECKSUM_TCP;
c9475369 6380 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6381 int rc;
6382
571f9dd8
KM		 6383 if (prot == QETH_PROT_IPV4)
6384 required_features |= QETH_IPA_CHECKSUM_IP_HDR;
c9475369 6385 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
a8155b00 6386 &chksum_cb, prot);
f9d8e6dc
TR		 6387 if (!rc) {
6388 if ((required_features & chksum_cb.supported) !=
6389 required_features)
6390 rc = -EIO;
dae84c8e
TR		 6391 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6392 cstype == IPA_INBOUND_CHECKSUM)
6393 dev_warn(&card->gdev->dev,
6394 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6395 QETH_CARD_IFNAME(card));
f9d8e6dc 6396 }
4d7def2a 6397 if (rc) {
a8155b00
KM		 6398 qeth_send_simple_setassparms_prot(card, cstype,
6399 IPA_CMD_ASS_STOP, 0, prot);
8f43fb00 6400 dev_warn(&card->gdev->dev,
a8155b00
KM		 6401 "Starting HW IPv%d checksumming for %s failed, using SW checksumming\n",
6402 prot, QETH_CARD_IFNAME(card));
4d7def2a
TR		 6403 return rc;
6404 }
c9475369 6405 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
a8155b00
KM		 6406 chksum_cb.supported, &chksum_cb,
6407 prot);
f9d8e6dc
TR		 6408 if (!rc) {
6409 if ((required_features & chksum_cb.enabled) !=
6410 required_features)
6411 rc = -EIO;
6412 }
4d7def2a 6413 if (rc) {
a8155b00
KM		 6414 qeth_send_simple_setassparms_prot(card, cstype,
6415 IPA_CMD_ASS_STOP, 0, prot);
8f43fb00 6416 dev_warn(&card->gdev->dev,
a8155b00
KM		 6417 "Enabling HW IPv%d checksumming for %s failed, using SW checksumming\n",
6418 prot, QETH_CARD_IFNAME(card));
4d7def2a
TR		 6419 return rc;
6420 }
8f43fb00 6421
a8155b00
KM		 6422 dev_info(&card->gdev->dev, "HW Checksumming (%sbound IPv%d) enabled\n",
6423 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out", prot);
4d7def2a
TR		 6424 return 0;
6425}
6426
a8155b00
KM		 6427static int qeth_set_ipa_csum(struct qeth_card *card, bool on, int cstype,
6428 enum qeth_prot_versions prot)
4d7def2a 6429{
a8155b00
KM		 6430 int rc = (on) ? qeth_send_checksum_on(card, cstype, prot)
6431 : qeth_send_simple_setassparms_prot(card, cstype,
6432 IPA_CMD_ASS_STOP, 0,
6433 prot);
c9475369 6434 return rc ? -EIO : 0;
4d7def2a 6435}
4d7def2a 6436
8f43fb00 6437static int qeth_set_ipa_tso(struct qeth_card *card, int on)
4d7def2a 6438{
8f43fb00 6439 int rc;
4d7def2a 6440
8f43fb00 6441 QETH_CARD_TEXT(card, 3, "sttso");
4d7def2a 6442
8f43fb00
TR		 6443 if (on) {
6444 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6445 IPA_CMD_ASS_START, 0);
6446 if (rc) {
6447 dev_warn(&card->gdev->dev,
6448 "Starting outbound TCP segmentation offload for %s failed\n",
6449 QETH_CARD_IFNAME(card));
6450 return -EIO;
6451 }
6452 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6453 } else {
6454 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6455 IPA_CMD_ASS_STOP, 0);
6456 }
4d7def2a
TR		 6457 return rc;
6458}
8f43fb00 6459
d7e6ed97
KM		 6460static int qeth_set_ipa_rx_csum(struct qeth_card *card, bool on)
6461{
6462 int rc_ipv4 = (on) ? -EOPNOTSUPP : 0;
6463 int rc_ipv6;
6464
6465 if (qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6466 rc_ipv4 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6467 QETH_PROT_IPV4);
6468 if (!qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
6469 /* no/one Offload Assist available, so the rc is trivial */
6470 return rc_ipv4;
ce344356 6471
d7e6ed97
KM		 6472 rc_ipv6 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6473 QETH_PROT_IPV6);
6474
6475 if (on)
6476 /* enable: success if any Assist is active */
6477 return (rc_ipv6) ? rc_ipv4 : 0;
6478
6479 /* disable: failure if any Assist is still active */
6480 return (rc_ipv6) ? rc_ipv6 : rc_ipv4;
6481}
6482
571f9dd8
KM		 6483#define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO | \
6484 NETIF_F_IPV6_CSUM)
ce344356 6485/**
d025da9e
JW		 6486 * qeth_enable_hw_features() - (Re-)Enable HW functions for device features
6487 * @dev: a net_device
ce344356 6488 */
d025da9e 6489void qeth_enable_hw_features(struct net_device *dev)
e830baa9
HW		 6490{
6491 struct qeth_card *card = dev->ml_priv;
d025da9e 6492 netdev_features_t features;
e830baa9 6493
d025da9e
JW		 6494 rtnl_lock();
6495 features = dev->features;
ce344356
JW		 6496 /* force-off any feature that needs an IPA sequence.
6497 * netdev_update_features() will restart them.
6498 */
6499 dev->features &= ~QETH_HW_FEATURES;
6500 netdev_update_features(dev);
d025da9e
JW		 6501 if (features != dev->features)
6502 dev_warn(&card->gdev->dev,
6503 "Device recovery failed to restore all offload features\n");
6504 rtnl_unlock();
e830baa9 6505}
d025da9e 6506EXPORT_SYMBOL_GPL(qeth_enable_hw_features);
e830baa9 6507
8f43fb00
TR		 6508int qeth_set_features(struct net_device *dev, netdev_features_t features)
6509{
6510 struct qeth_card *card = dev->ml_priv;
6c7cd712 6511 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6512 int rc = 0;
6513
6514 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6515 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6516
6c7cd712 6517 if ((changed & NETIF_F_IP_CSUM)) {
a8155b00
KM		 6518 rc = qeth_set_ipa_csum(card, features & NETIF_F_IP_CSUM,
6519 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV4);
6c7cd712
HW		 6520 if (rc)
6521 changed ^= NETIF_F_IP_CSUM;
6522 }
571f9dd8
KM		 6523 if (changed & NETIF_F_IPV6_CSUM) {
6524 rc = qeth_set_ipa_csum(card, features & NETIF_F_IPV6_CSUM,
6525 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV6);
6526 if (rc)
6527 changed ^= NETIF_F_IPV6_CSUM;
6528 }
d7e6ed97
KM		 6529 if (changed & NETIF_F_RXCSUM) {
6530 rc = qeth_set_ipa_rx_csum(card, features & NETIF_F_RXCSUM);
6c7cd712
HW		 6531 if (rc)
6532 changed ^= NETIF_F_RXCSUM;
6533 }
6534 if ((changed & NETIF_F_TSO)) {
6535 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6536 if (rc)
6537 changed ^= NETIF_F_TSO;
6538 }
6539
6540 /* everything changed successfully? */
6541 if ((dev->features ^ features) == changed)
6542 return 0;
6543 /* something went wrong. save changed features and return error */
6544 dev->features ^= changed;
6545 return -EIO;
8f43fb00
TR		 6546}
6547EXPORT_SYMBOL_GPL(qeth_set_features);
6548
6549netdev_features_t qeth_fix_features(struct net_device *dev,
6550 netdev_features_t features)
6551{
6552 struct qeth_card *card = dev->ml_priv;
6553
6554 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6555 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6556 features &= ~NETIF_F_IP_CSUM;
571f9dd8
KM		 6557 if (!qeth_is_supported6(card, IPA_OUTBOUND_CHECKSUM_V6))
6558 features &= ~NETIF_F_IPV6_CSUM;
d7e6ed97
KM		 6559 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM) &&
6560 !qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
8f43fb00 6561 features &= ~NETIF_F_RXCSUM;
cf536ffe 6562 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6563 features &= ~NETIF_F_TSO;
6c7cd712
HW		 6564 /* if the card isn't up, remove features that require hw changes */
6565 if (card->state == CARD_STATE_DOWN ||
6566 card->state == CARD_STATE_RECOVER)
ce344356 6567 features &= ~QETH_HW_FEATURES;
8f43fb00
TR		 6568 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6569 return features;
6570}
6571EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6572
6d69b1f1
JW		 6573netdev_features_t qeth_features_check(struct sk_buff *skb,
6574 struct net_device *dev,
6575 netdev_features_t features)
6576{
6577 /* GSO segmentation builds skbs with
6578 * a (small) linear part for the headers, and
6579 * page frags for the data.
6580 * Compared to a linear skb, the header-only part consumes an
6581 * additional buffer element. This reduces buffer utilization, and
6582 * hurts throughput. So compress small segments into one element.
6583 */
6584 if (netif_needs_gso(skb, features)) {
6585 /* match skb_segment(): */
6586 unsigned int doffset = skb->data - skb_mac_header(skb);
6587 unsigned int hsize = skb_shinfo(skb)->gso_size;
6588 unsigned int hroom = skb_headroom(skb);
6589
6590 /* linearize only if resulting skb allocations are order-0: */
6591 if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
6592 features &= ~NETIF_F_SG;
6593 }
6594
6595 return vlan_features_check(skb, features);
6596}
6597EXPORT_SYMBOL_GPL(qeth_features_check);
6598
4a71df50
FB		 6599static int __init qeth_core_init(void)
6600{
6601 int rc;
6602
74eacdb9 6603 pr_info("loading core functions\n");
4a71df50 6604 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6605 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6606 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6607 mutex_init(&qeth_mod_mutex);
4a71df50 6608
0f54761d 6609 qeth_wq = create_singlethread_workqueue("qeth_wq");
a936b1ef
JW		 6610 if (!qeth_wq) {
6611 rc = -ENOMEM;
6612 goto out_err;
6613 }
0f54761d 6614
4a71df50
FB		 6615 rc = qeth_register_dbf_views();
6616 if (rc)
a936b1ef 6617 goto dbf_err;
035da16f 6618 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6619 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6620 if (rc)
6621 goto register_err;
683d718a
FB		 6622 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6623 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6624 if (!qeth_core_header_cache) {
6625 rc = -ENOMEM;
6626 goto slab_err;
6627 }
0da9581d
EL		 6628 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6629 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6630 if (!qeth_qdio_outbuf_cache) {
6631 rc = -ENOMEM;
6632 goto cqslab_err;
6633 }
afb6ac59
SO		 6634 rc = ccw_driver_register(&qeth_ccw_driver);
6635 if (rc)
6636 goto ccw_err;
afb6ac59
SO		 6637 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6638 if (rc)
6639 goto ccwgroup_err;
0da9581d 6640
683d718a 6641 return 0;
afb6ac59
SO		 6642
6643ccwgroup_err:
6644 ccw_driver_unregister(&qeth_ccw_driver);
6645ccw_err:
6646 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6647cqslab_err:
6648 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6649slab_err:
035da16f 6650 root_device_unregister(qeth_core_root_dev);
4a71df50 6651register_err:
4a71df50 6652 qeth_unregister_dbf_views();
a936b1ef
JW		 6653dbf_err:
6654 destroy_workqueue(qeth_wq);
4a71df50 6655out_err:
74eacdb9 6656 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6657 return rc;
6658}
6659
6660static void __exit qeth_core_exit(void)
6661{
819dc537 6662 qeth_clear_dbf_list();
0f54761d 6663 destroy_workqueue(qeth_wq);
4a71df50
FB		 6664 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6665 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6666 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6667 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6668 root_device_unregister(qeth_core_root_dev);
4a71df50 6669 qeth_unregister_dbf_views();
74eacdb9 6670 pr_info("core functions removed\n");
4a71df50
FB		 6671}
6672
6673module_init(qeth_core_init);
6674module_exit(qeth_core_exit);
6675MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6676MODULE_DESCRIPTION("qeth core functions");
6677MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)