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s390: char: add SPDX identifiers to the remaining files
[linux-block.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
290b8348 23#include <net/dsfield.h>
4a71df50 24
ab4227cb 25#include <asm/ebcdic.h>
2bf29df7 26#include <asm/chpid.h>
ab4227cb 27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
c3ab96f3 29#include <asm/compat.h>
ec61bd2f
JW		 30#include <asm/diag.h>
31#include <asm/cio.h>
32#include <asm/ccwdev.h>
4a71df50
FB		 33
34#include "qeth_core.h"
4a71df50 35
d11ba0c4
PT		 36struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
37 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
38 /* N P A M L V H */
39 [QETH_DBF_SETUP] = {"qeth_setup",
40 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 41 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
42 &debug_sprintf_view, NULL},
d11ba0c4
PT		 43 [QETH_DBF_CTRL] = {"qeth_control",
44 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
45};
46EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 47
48struct qeth_card_list_struct qeth_core_card_list;
49EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 50struct kmem_cache *qeth_core_header_cache;
51EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 52static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 53
54static struct device *qeth_core_root_dev;
4a71df50 55static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 56static struct mutex qeth_mod_mutex;
4a71df50
FB		 57
58static void qeth_send_control_data_cb(struct qeth_channel *,
59 struct qeth_cmd_buffer *);
4a71df50
FB		 60static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
61static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
62static void qeth_free_buffer_pool(struct qeth_card *);
63static int qeth_qdio_establish(struct qeth_card *);
0da9581d 64static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 65static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
66 struct qeth_qdio_out_buffer *buf,
67 enum iucv_tx_notify notification);
68static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 69static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
70 struct qeth_qdio_out_buffer *buf,
71 enum qeth_qdio_buffer_states newbufstate);
72861ae7 72static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 73
b4d72c08 74struct workqueue_struct *qeth_wq;
c044dc21 75EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 76
511c2445
EC		 77int qeth_card_hw_is_reachable(struct qeth_card *card)
78{
79 return (card->state == CARD_STATE_SOFTSETUP) ||
80 (card->state == CARD_STATE_UP);
81}
82EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
83
0f54761d
SR		 84static void qeth_close_dev_handler(struct work_struct *work)
85{
86 struct qeth_card *card;
87
88 card = container_of(work, struct qeth_card, close_dev_work);
89 QETH_CARD_TEXT(card, 2, "cldevhdl");
90 rtnl_lock();
91 dev_close(card->dev);
92 rtnl_unlock();
93 ccwgroup_set_offline(card->gdev);
94}
95
96void qeth_close_dev(struct qeth_card *card)
97{
98 QETH_CARD_TEXT(card, 2, "cldevsubm");
99 queue_work(qeth_wq, &card->close_dev_work);
100}
101EXPORT_SYMBOL_GPL(qeth_close_dev);
102
cef6ff22 103static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 104{
105 if (card->info.guestlan) {
106 switch (card->info.type) {
5113fec0 107 case QETH_CARD_TYPE_OSD:
7096b187 108 return " Virtual NIC QDIO";
4a71df50 109 case QETH_CARD_TYPE_IQD:
7096b187 110 return " Virtual NIC Hiper";
5113fec0 111 case QETH_CARD_TYPE_OSM:
7096b187 112 return " Virtual NIC QDIO - OSM";
5113fec0 113 case QETH_CARD_TYPE_OSX:
7096b187 114 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 115 default:
116 return " unknown";
117 }
118 } else {
119 switch (card->info.type) {
5113fec0 120 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 121 return " OSD Express";
122 case QETH_CARD_TYPE_IQD:
123 return " HiperSockets";
124 case QETH_CARD_TYPE_OSN:
125 return " OSN QDIO";
5113fec0
UB		 126 case QETH_CARD_TYPE_OSM:
127 return " OSM QDIO";
128 case QETH_CARD_TYPE_OSX:
129 return " OSX QDIO";
4a71df50
FB		 130 default:
131 return " unknown";
132 }
133 }
134 return " n/a";
135}
136
137/* max length to be returned: 14 */
138const char *qeth_get_cardname_short(struct qeth_card *card)
139{
140 if (card->info.guestlan) {
141 switch (card->info.type) {
5113fec0 142 case QETH_CARD_TYPE_OSD:
7096b187 143 return "Virt.NIC QDIO";
4a71df50 144 case QETH_CARD_TYPE_IQD:
7096b187 145 return "Virt.NIC Hiper";
5113fec0 146 case QETH_CARD_TYPE_OSM:
7096b187 147 return "Virt.NIC OSM";
5113fec0 148 case QETH_CARD_TYPE_OSX:
7096b187 149 return "Virt.NIC OSX";
4a71df50
FB		 150 default:
151 return "unknown";
152 }
153 } else {
154 switch (card->info.type) {
5113fec0 155 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 156 switch (card->info.link_type) {
157 case QETH_LINK_TYPE_FAST_ETH:
158 return "OSD_100";
159 case QETH_LINK_TYPE_HSTR:
160 return "HSTR";
161 case QETH_LINK_TYPE_GBIT_ETH:
162 return "OSD_1000";
163 case QETH_LINK_TYPE_10GBIT_ETH:
164 return "OSD_10GIG";
165 case QETH_LINK_TYPE_LANE_ETH100:
166 return "OSD_FE_LANE";
167 case QETH_LINK_TYPE_LANE_TR:
168 return "OSD_TR_LANE";
169 case QETH_LINK_TYPE_LANE_ETH1000:
170 return "OSD_GbE_LANE";
171 case QETH_LINK_TYPE_LANE:
172 return "OSD_ATM_LANE";
173 default:
174 return "OSD_Express";
175 }
176 case QETH_CARD_TYPE_IQD:
177 return "HiperSockets";
178 case QETH_CARD_TYPE_OSN:
179 return "OSN";
5113fec0
UB		 180 case QETH_CARD_TYPE_OSM:
181 return "OSM_1000";
182 case QETH_CARD_TYPE_OSX:
183 return "OSX_10GIG";
4a71df50
FB		 184 default:
185 return "unknown";
186 }
187 }
188 return "n/a";
189}
190
65d8013c
SR		 191void qeth_set_recovery_task(struct qeth_card *card)
192{
193 card->recovery_task = current;
194}
195EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
196
197void qeth_clear_recovery_task(struct qeth_card *card)
198{
199 card->recovery_task = NULL;
200}
201EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
202
203static bool qeth_is_recovery_task(const struct qeth_card *card)
204{
205 return card->recovery_task == current;
206}
207
4a71df50
FB		 208void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
209 int clear_start_mask)
210{
211 unsigned long flags;
212
213 spin_lock_irqsave(&card->thread_mask_lock, flags);
214 card->thread_allowed_mask = threads;
215 if (clear_start_mask)
216 card->thread_start_mask &= threads;
217 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
218 wake_up(&card->wait_q);
219}
220EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
221
222int qeth_threads_running(struct qeth_card *card, unsigned long threads)
223{
224 unsigned long flags;
225 int rc = 0;
226
227 spin_lock_irqsave(&card->thread_mask_lock, flags);
228 rc = (card->thread_running_mask & threads);
229 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
230 return rc;
231}
232EXPORT_SYMBOL_GPL(qeth_threads_running);
233
234int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
235{
65d8013c
SR		 236 if (qeth_is_recovery_task(card))
237 return 0;
4a71df50
FB		 238 return wait_event_interruptible(card->wait_q,
239 qeth_threads_running(card, threads) == 0);
240}
241EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
242
243void qeth_clear_working_pool_list(struct qeth_card *card)
244{
245 struct qeth_buffer_pool_entry *pool_entry, *tmp;
246
847a50fd 247 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 248 list_for_each_entry_safe(pool_entry, tmp,
249 &card->qdio.in_buf_pool.entry_list, list){
250 list_del(&pool_entry->list);
251 }
252}
253EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
254
255static int qeth_alloc_buffer_pool(struct qeth_card *card)
256{
257 struct qeth_buffer_pool_entry *pool_entry;
258 void *ptr;
259 int i, j;
260
847a50fd 261 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 262 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 263 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 264 if (!pool_entry) {
265 qeth_free_buffer_pool(card);
266 return -ENOMEM;
267 }
268 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 269 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 270 if (!ptr) {
271 while (j > 0)
272 free_page((unsigned long)
273 pool_entry->elements[--j]);
274 kfree(pool_entry);
275 qeth_free_buffer_pool(card);
276 return -ENOMEM;
277 }
278 pool_entry->elements[j] = ptr;
279 }
280 list_add(&pool_entry->init_list,
281 &card->qdio.init_pool.entry_list);
282 }
283 return 0;
284}
285
286int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
287{
847a50fd 288 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 289
290 if ((card->state != CARD_STATE_DOWN) &&
291 (card->state != CARD_STATE_RECOVER))
292 return -EPERM;
293
294 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
295 qeth_clear_working_pool_list(card);
296 qeth_free_buffer_pool(card);
297 card->qdio.in_buf_pool.buf_count = bufcnt;
298 card->qdio.init_pool.buf_count = bufcnt;
299 return qeth_alloc_buffer_pool(card);
300}
76b11f8e 301EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 302
4601ba6c
SO		 303static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
304{
6d284bde
SO		 305 if (!q)
306 return;
307
308 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 309 kfree(q);
310}
311
312static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
313{
314 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
315 int i;
316
317 if (!q)
318 return NULL;
319
6d284bde
SO		 320 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
321 kfree(q);
322 return NULL;
323 }
324
4601ba6c 325 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 326 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 327
328 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
329 return q;
330}
331
cef6ff22 332static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 333{
334 int rc;
335
336 if (card->options.cq == QETH_CQ_ENABLED) {
337 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 338 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
339 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 340 card->qdio.c_q->next_buf_to_init = 127;
341 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
342 card->qdio.no_in_queues - 1, 0,
343 127);
344 if (rc) {
345 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
346 goto out;
347 }
348 }
349 rc = 0;
350out:
351 return rc;
352}
353
cef6ff22 354static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 355{
356 int rc;
357
358 if (card->options.cq == QETH_CQ_ENABLED) {
359 int i;
360 struct qdio_outbuf_state *outbuf_states;
361
362 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 363 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 364 if (!card->qdio.c_q) {
365 rc = -1;
366 goto kmsg_out;
367 }
0da9581d 368 card->qdio.no_in_queues = 2;
4a912f98 369 card->qdio.out_bufstates =
0da9581d
EL		 370 kzalloc(card->qdio.no_out_queues *
371 QDIO_MAX_BUFFERS_PER_Q *
372 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
373 outbuf_states = card->qdio.out_bufstates;
374 if (outbuf_states == NULL) {
375 rc = -1;
376 goto free_cq_out;
377 }
378 for (i = 0; i < card->qdio.no_out_queues; ++i) {
379 card->qdio.out_qs[i]->bufstates = outbuf_states;
380 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
381 }
382 } else {
383 QETH_DBF_TEXT(SETUP, 2, "nocq");
384 card->qdio.c_q = NULL;
385 card->qdio.no_in_queues = 1;
386 }
387 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
388 rc = 0;
389out:
390 return rc;
391free_cq_out:
4601ba6c 392 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 393 card->qdio.c_q = NULL;
394kmsg_out:
395 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
396 goto out;
397}
398
cef6ff22 399static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 400{
401 if (card->qdio.c_q) {
402 --card->qdio.no_in_queues;
4601ba6c 403 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 404 card->qdio.c_q = NULL;
405 }
406 kfree(card->qdio.out_bufstates);
407 card->qdio.out_bufstates = NULL;
408}
409
cef6ff22
JW		 410static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
411 int delayed)
412{
b3332930
FB		 413 enum iucv_tx_notify n;
414
415 switch (sbalf15) {
416 case 0:
417 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
418 break;
419 case 4:
420 case 16:
421 case 17:
422 case 18:
423 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
424 TX_NOTIFY_UNREACHABLE;
425 break;
426 default:
427 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
428 TX_NOTIFY_GENERALERROR;
429 break;
430 }
431
432 return n;
433}
434
cef6ff22
JW		 435static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
436 int forced_cleanup)
0da9581d 437{
72861ae7
EL		 438 if (q->card->options.cq != QETH_CQ_ENABLED)
439 return;
440
0da9581d
EL		 441 if (q->bufs[bidx]->next_pending != NULL) {
442 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
443 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
444
445 while (c) {
446 if (forced_cleanup ||
447 atomic_read(&c->state) ==
448 QETH_QDIO_BUF_HANDLED_DELAYED) {
449 struct qeth_qdio_out_buffer *f = c;
450 QETH_CARD_TEXT(f->q->card, 5, "fp");
451 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 452 /* release here to avoid interleaving between
453 outbound tasklet and inbound tasklet
454 regarding notifications and lifecycle */
455 qeth_release_skbs(c);
456
0da9581d 457 c = f->next_pending;
18af5c17 458 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 459 head->next_pending = c;
460 kmem_cache_free(qeth_qdio_outbuf_cache, f);
461 } else {
462 head = c;
463 c = c->next_pending;
464 }
465
466 }
467 }
72861ae7
EL		 468 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
469 QETH_QDIO_BUF_HANDLED_DELAYED)) {
470 /* for recovery situations */
471 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
472 qeth_init_qdio_out_buf(q, bidx);
473 QETH_CARD_TEXT(q->card, 2, "clprecov");
474 }
0da9581d
EL		 475}
476
477
cef6ff22
JW		 478static void qeth_qdio_handle_aob(struct qeth_card *card,
479 unsigned long phys_aob_addr)
480{
0da9581d
EL		 481 struct qaob *aob;
482 struct qeth_qdio_out_buffer *buffer;
b3332930 483 enum iucv_tx_notify notification;
0da9581d
EL		 484
485 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
486 QETH_CARD_TEXT(card, 5, "haob");
487 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
488 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
489 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
490
b3332930
FB		 491 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
492 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
493 notification = TX_NOTIFY_OK;
494 } else {
18af5c17
SR		 495 WARN_ON_ONCE(atomic_read(&buffer->state) !=
496 QETH_QDIO_BUF_PENDING);
b3332930
FB		 497 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
498 notification = TX_NOTIFY_DELAYED_OK;
499 }
500
501 if (aob->aorc != 0) {
502 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
503 notification = qeth_compute_cq_notification(aob->aorc, 1);
504 }
505 qeth_notify_skbs(buffer->q, buffer, notification);
506
0da9581d
EL		 507 buffer->aob = NULL;
508 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 509 QETH_QDIO_BUF_HANDLED_DELAYED);
510
0da9581d
EL		 511 /* from here on: do not touch buffer anymore */
512 qdio_release_aob(aob);
513}
514
515static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
516{
517 return card->options.cq == QETH_CQ_ENABLED &&
518 card->qdio.c_q != NULL &&
519 queue != 0 &&
520 queue == card->qdio.no_in_queues - 1;
521}
522
523
4a71df50
FB		 524static int qeth_issue_next_read(struct qeth_card *card)
525{
526 int rc;
527 struct qeth_cmd_buffer *iob;
528
847a50fd 529 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 530 if (card->read.state != CH_STATE_UP)
531 return -EIO;
532 iob = qeth_get_buffer(&card->read);
533 if (!iob) {
74eacdb9
FB		 534 dev_warn(&card->gdev->dev, "The qeth device driver "
535 "failed to recover an error on the device\n");
536 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
537 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 538 return -ENOMEM;
539 }
540 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 541 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 542 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
543 (addr_t) iob, 0, 0);
544 if (rc) {
74eacdb9
FB		 545 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
546 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 547 atomic_set(&card->read.irq_pending, 0);
908abbb5 548 card->read_or_write_problem = 1;
4a71df50
FB		 549 qeth_schedule_recovery(card);
550 wake_up(&card->wait_q);
551 }
552 return rc;
553}
554
555static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
556{
557 struct qeth_reply *reply;
558
559 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
560 if (reply) {
561 atomic_set(&reply->refcnt, 1);
562 atomic_set(&reply->received, 0);
563 reply->card = card;
6531084c 564 }
4a71df50
FB		 565 return reply;
566}
567
568static void qeth_get_reply(struct qeth_reply *reply)
569{
570 WARN_ON(atomic_read(&reply->refcnt) <= 0);
571 atomic_inc(&reply->refcnt);
572}
573
574static void qeth_put_reply(struct qeth_reply *reply)
575{
576 WARN_ON(atomic_read(&reply->refcnt) <= 0);
577 if (atomic_dec_and_test(&reply->refcnt))
578 kfree(reply);
579}
580
d11ba0c4 581static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 582 struct qeth_card *card)
583{
4a71df50 584 char *ipa_name;
d11ba0c4 585 int com = cmd->hdr.command;
4a71df50 586 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 587 if (rc)
70919e23
UB		 588 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
589 "x%X \"%s\"\n",
590 ipa_name, com, dev_name(&card->gdev->dev),
591 QETH_CARD_IFNAME(card), rc,
592 qeth_get_ipa_msg(rc));
d11ba0c4 593 else
70919e23
UB		 594 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
595 ipa_name, com, dev_name(&card->gdev->dev),
596 QETH_CARD_IFNAME(card));
4a71df50
FB		 597}
598
599static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
600 struct qeth_cmd_buffer *iob)
601{
602 struct qeth_ipa_cmd *cmd = NULL;
603
847a50fd 604 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 605 if (IS_IPA(iob->data)) {
606 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
607 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 608 if (cmd->hdr.command != IPA_CMD_SETCCID &&
609 cmd->hdr.command != IPA_CMD_DELCCID &&
610 cmd->hdr.command != IPA_CMD_MODCCID &&
611 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 612 qeth_issue_ipa_msg(cmd,
613 cmd->hdr.return_code, card);
4a71df50
FB		 614 return cmd;
615 } else {
616 switch (cmd->hdr.command) {
617 case IPA_CMD_STOPLAN:
0f54761d
SR		 618 if (cmd->hdr.return_code ==
619 IPA_RC_VEPA_TO_VEB_TRANSITION) {
620 dev_err(&card->gdev->dev,
621 "Interface %s is down because the "
622 "adjacent port is no longer in "
623 "reflective relay mode\n",
624 QETH_CARD_IFNAME(card));
625 qeth_close_dev(card);
626 } else {
627 dev_warn(&card->gdev->dev,
74eacdb9
FB		 628 "The link for interface %s on CHPID"
629 " 0x%X failed\n",
4a71df50
FB		 630 QETH_CARD_IFNAME(card),
631 card->info.chpid);
0f54761d
SR		 632 qeth_issue_ipa_msg(cmd,
633 cmd->hdr.return_code, card);
634 }
4a71df50
FB		 635 card->lan_online = 0;
636 if (card->dev && netif_carrier_ok(card->dev))
637 netif_carrier_off(card->dev);
638 return NULL;
639 case IPA_CMD_STARTLAN:
74eacdb9
FB		 640 dev_info(&card->gdev->dev,
641 "The link for %s on CHPID 0x%X has"
642 " been restored\n",
4a71df50
FB		 643 QETH_CARD_IFNAME(card),
644 card->info.chpid);
645 netif_carrier_on(card->dev);
922dc062 646 card->lan_online = 1;
1da74b1c
FB		 647 if (card->info.hwtrap)
648 card->info.hwtrap = 2;
4a71df50
FB		 649 qeth_schedule_recovery(card);
650 return NULL;
9c23f4da
EC		 651 case IPA_CMD_SETBRIDGEPORT_IQD:
652 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 653 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 654 if (card->discipline->control_event_handler
655 (card, cmd))
656 return cmd;
657 else
658 return NULL;
4a71df50
FB		 659 case IPA_CMD_MODCCID:
660 return cmd;
661 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 662 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 663 break;
664 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 665 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 666 break;
667 default:
c4cef07c 668 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 669 "but not a reply!\n");
670 break;
671 }
672 }
673 }
674 return cmd;
675}
676
677void qeth_clear_ipacmd_list(struct qeth_card *card)
678{
679 struct qeth_reply *reply, *r;
680 unsigned long flags;
681
847a50fd 682 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 683
684 spin_lock_irqsave(&card->lock, flags);
685 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
686 qeth_get_reply(reply);
687 reply->rc = -EIO;
688 atomic_inc(&reply->received);
689 list_del_init(&reply->list);
690 wake_up(&reply->wait_q);
691 qeth_put_reply(reply);
692 }
693 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 694 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 695}
696EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
697
5113fec0
UB		 698static int qeth_check_idx_response(struct qeth_card *card,
699 unsigned char *buffer)
4a71df50
FB		 700{
701 if (!buffer)
702 return 0;
703
d11ba0c4 704 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 705 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 706 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 707 "with cause code 0x%02x%s\n",
708 buffer[4],
709 ((buffer[4] == 0x22) ?
710 " -- try another portname" : ""));
847a50fd
CO		 711 QETH_CARD_TEXT(card, 2, "ckidxres");
712 QETH_CARD_TEXT(card, 2, " idxterm");
713 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 714 if (buffer[4] == 0xf6) {
715 dev_err(&card->gdev->dev,
716 "The qeth device is not configured "
717 "for the OSI layer required by z/VM\n");
718 return -EPERM;
719 }
4a71df50
FB		 720 return -EIO;
721 }
722 return 0;
723}
724
bca51650
TR		 725static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
726{
727 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
728 dev_get_drvdata(&cdev->dev))->dev);
729 return card;
730}
731
4a71df50
FB		 732static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
733 __u32 len)
734{
735 struct qeth_card *card;
736
4a71df50 737 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 738 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 739 if (channel == &card->read)
740 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
741 else
742 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
743 channel->ccw.count = len;
744 channel->ccw.cda = (__u32) __pa(iob);
745}
746
747static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
748{
749 __u8 index;
750
847a50fd 751 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 752 index = channel->io_buf_no;
753 do {
754 if (channel->iob[index].state == BUF_STATE_FREE) {
755 channel->iob[index].state = BUF_STATE_LOCKED;
756 channel->io_buf_no = (channel->io_buf_no + 1) %
757 QETH_CMD_BUFFER_NO;
758 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
759 return channel->iob + index;
760 }
761 index = (index + 1) % QETH_CMD_BUFFER_NO;
762 } while (index != channel->io_buf_no);
763
764 return NULL;
765}
766
767void qeth_release_buffer(struct qeth_channel *channel,
768 struct qeth_cmd_buffer *iob)
769{
770 unsigned long flags;
771
847a50fd 772 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 773 spin_lock_irqsave(&channel->iob_lock, flags);
774 memset(iob->data, 0, QETH_BUFSIZE);
775 iob->state = BUF_STATE_FREE;
776 iob->callback = qeth_send_control_data_cb;
777 iob->rc = 0;
778 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 779 wake_up(&channel->wait_q);
4a71df50
FB		 780}
781EXPORT_SYMBOL_GPL(qeth_release_buffer);
782
783static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
784{
785 struct qeth_cmd_buffer *buffer = NULL;
786 unsigned long flags;
787
788 spin_lock_irqsave(&channel->iob_lock, flags);
789 buffer = __qeth_get_buffer(channel);
790 spin_unlock_irqrestore(&channel->iob_lock, flags);
791 return buffer;
792}
793
794struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
795{
796 struct qeth_cmd_buffer *buffer;
797 wait_event(channel->wait_q,
798 ((buffer = qeth_get_buffer(channel)) != NULL));
799 return buffer;
800}
801EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
802
803void qeth_clear_cmd_buffers(struct qeth_channel *channel)
804{
805 int cnt;
806
807 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
808 qeth_release_buffer(channel, &channel->iob[cnt]);
809 channel->buf_no = 0;
810 channel->io_buf_no = 0;
811}
812EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
813
814static void qeth_send_control_data_cb(struct qeth_channel *channel,
815 struct qeth_cmd_buffer *iob)
816{
817 struct qeth_card *card;
818 struct qeth_reply *reply, *r;
819 struct qeth_ipa_cmd *cmd;
820 unsigned long flags;
821 int keep_reply;
5113fec0 822 int rc = 0;
4a71df50 823
4a71df50 824 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 825 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 826 rc = qeth_check_idx_response(card, iob->data);
827 switch (rc) {
828 case 0:
829 break;
830 case -EIO:
4a71df50 831 qeth_clear_ipacmd_list(card);
5113fec0 832 qeth_schedule_recovery(card);
01fc3e86 833 /* fall through */
5113fec0 834 default:
4a71df50
FB		 835 goto out;
836 }
837
838 cmd = qeth_check_ipa_data(card, iob);
839 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
840 goto out;
841 /*in case of OSN : check if cmd is set */
842 if (card->info.type == QETH_CARD_TYPE_OSN &&
843 cmd &&
844 cmd->hdr.command != IPA_CMD_STARTLAN &&
845 card->osn_info.assist_cb != NULL) {
846 card->osn_info.assist_cb(card->dev, cmd);
847 goto out;
848 }
849
850 spin_lock_irqsave(&card->lock, flags);
851 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
852 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
853 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
854 qeth_get_reply(reply);
855 list_del_init(&reply->list);
856 spin_unlock_irqrestore(&card->lock, flags);
857 keep_reply = 0;
858 if (reply->callback != NULL) {
859 if (cmd) {
860 reply->offset = (__u16)((char *)cmd -
861 (char *)iob->data);
862 keep_reply = reply->callback(card,
863 reply,
864 (unsigned long)cmd);
865 } else
866 keep_reply = reply->callback(card,
867 reply,
868 (unsigned long)iob);
869 }
870 if (cmd)
871 reply->rc = (u16) cmd->hdr.return_code;
872 else if (iob->rc)
873 reply->rc = iob->rc;
874 if (keep_reply) {
875 spin_lock_irqsave(&card->lock, flags);
876 list_add_tail(&reply->list,
877 &card->cmd_waiter_list);
878 spin_unlock_irqrestore(&card->lock, flags);
879 } else {
880 atomic_inc(&reply->received);
881 wake_up(&reply->wait_q);
882 }
883 qeth_put_reply(reply);
884 goto out;
885 }
886 }
887 spin_unlock_irqrestore(&card->lock, flags);
888out:
889 memcpy(&card->seqno.pdu_hdr_ack,
890 QETH_PDU_HEADER_SEQ_NO(iob->data),
891 QETH_SEQ_NO_LENGTH);
892 qeth_release_buffer(channel, iob);
893}
894
895static int qeth_setup_channel(struct qeth_channel *channel)
896{
897 int cnt;
898
d11ba0c4 899 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 900 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 901 channel->iob[cnt].data =
b3332930 902 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 903 if (channel->iob[cnt].data == NULL)
904 break;
905 channel->iob[cnt].state = BUF_STATE_FREE;
906 channel->iob[cnt].channel = channel;
907 channel->iob[cnt].callback = qeth_send_control_data_cb;
908 channel->iob[cnt].rc = 0;
909 }
910 if (cnt < QETH_CMD_BUFFER_NO) {
911 while (cnt-- > 0)
912 kfree(channel->iob[cnt].data);
913 return -ENOMEM;
914 }
915 channel->buf_no = 0;
916 channel->io_buf_no = 0;
917 atomic_set(&channel->irq_pending, 0);
918 spin_lock_init(&channel->iob_lock);
919
920 init_waitqueue_head(&channel->wait_q);
921 return 0;
922}
923
924static int qeth_set_thread_start_bit(struct qeth_card *card,
925 unsigned long thread)
926{
927 unsigned long flags;
928
929 spin_lock_irqsave(&card->thread_mask_lock, flags);
930 if (!(card->thread_allowed_mask & thread) ||
931 (card->thread_start_mask & thread)) {
932 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
933 return -EPERM;
934 }
935 card->thread_start_mask |= thread;
936 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
937 return 0;
938}
939
940void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
941{
942 unsigned long flags;
943
944 spin_lock_irqsave(&card->thread_mask_lock, flags);
945 card->thread_start_mask &= ~thread;
946 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
947 wake_up(&card->wait_q);
948}
949EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
950
951void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
952{
953 unsigned long flags;
954
955 spin_lock_irqsave(&card->thread_mask_lock, flags);
956 card->thread_running_mask &= ~thread;
957 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
958 wake_up(&card->wait_q);
959}
960EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
961
962static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
963{
964 unsigned long flags;
965 int rc = 0;
966
967 spin_lock_irqsave(&card->thread_mask_lock, flags);
968 if (card->thread_start_mask & thread) {
969 if ((card->thread_allowed_mask & thread) &&
970 !(card->thread_running_mask & thread)) {
971 rc = 1;
972 card->thread_start_mask &= ~thread;
973 card->thread_running_mask |= thread;
974 } else
975 rc = -EPERM;
976 }
977 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
978 return rc;
979}
980
981int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
982{
983 int rc = 0;
984
985 wait_event(card->wait_q,
986 (rc = __qeth_do_run_thread(card, thread)) >= 0);
987 return rc;
988}
989EXPORT_SYMBOL_GPL(qeth_do_run_thread);
990
991void qeth_schedule_recovery(struct qeth_card *card)
992{
847a50fd 993 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 994 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
995 schedule_work(&card->kernel_thread_starter);
996}
997EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
998
999static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
1000{
1001 int dstat, cstat;
1002 char *sense;
847a50fd 1003 struct qeth_card *card;
4a71df50
FB		 1004
1005 sense = (char *) irb->ecw;
23d805b6
PO		 1006 cstat = irb->scsw.cmd.cstat;
1007 dstat = irb->scsw.cmd.dstat;
847a50fd 1008 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1009
1010 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1011 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1012 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1013 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1014 dev_warn(&cdev->dev, "The qeth device driver "
1015 "failed to recover an error on the device\n");
5113fec0 1016 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1017 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1018 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1019 16, 1, irb, 64, 1);
1020 return 1;
1021 }
1022
1023 if (dstat & DEV_STAT_UNIT_CHECK) {
1024 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1025 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1026 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1027 return 1;
1028 }
1029 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1030 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1031 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1032 return 1;
4a71df50
FB		 1033 }
1034 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1035 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1036 return 1;
1037 }
1038 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1039 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1040 return 0;
1041 }
847a50fd 1042 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1043 return 1;
1044 }
1045 return 0;
1046}
1047
1048static long __qeth_check_irb_error(struct ccw_device *cdev,
1049 unsigned long intparm, struct irb *irb)
1050{
847a50fd
CO		 1051 struct qeth_card *card;
1052
1053 card = CARD_FROM_CDEV(cdev);
1054
e95051ff 1055 if (!card || !IS_ERR(irb))
4a71df50
FB		 1056 return 0;
1057
1058 switch (PTR_ERR(irb)) {
1059 case -EIO:
74eacdb9
FB		 1060 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1061 dev_name(&cdev->dev));
847a50fd
CO		 1062 QETH_CARD_TEXT(card, 2, "ckirberr");
1063 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1064 break;
1065 case -ETIMEDOUT:
74eacdb9
FB		 1066 dev_warn(&cdev->dev, "A hardware operation timed out"
1067 " on the device\n");
847a50fd
CO		 1068 QETH_CARD_TEXT(card, 2, "ckirberr");
1069 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1070 if (intparm == QETH_RCD_PARM) {
e95051ff 1071 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1072 card->data.state = CH_STATE_DOWN;
1073 wake_up(&card->wait_q);
1074 }
1075 }
1076 break;
1077 default:
74eacdb9
FB		 1078 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1079 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1080 QETH_CARD_TEXT(card, 2, "ckirberr");
1081 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1082 }
1083 return PTR_ERR(irb);
1084}
1085
1086static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1087 struct irb *irb)
1088{
1089 int rc;
1090 int cstat, dstat;
1091 struct qeth_cmd_buffer *buffer;
1092 struct qeth_channel *channel;
1093 struct qeth_card *card;
1094 struct qeth_cmd_buffer *iob;
1095 __u8 index;
1096
4a71df50
FB		 1097 if (__qeth_check_irb_error(cdev, intparm, irb))
1098 return;
23d805b6
PO		 1099 cstat = irb->scsw.cmd.cstat;
1100 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1101
1102 card = CARD_FROM_CDEV(cdev);
1103 if (!card)
1104 return;
1105
847a50fd
CO		 1106 QETH_CARD_TEXT(card, 5, "irq");
1107
4a71df50
FB		 1108 if (card->read.ccwdev == cdev) {
1109 channel = &card->read;
847a50fd 1110 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1111 } else if (card->write.ccwdev == cdev) {
1112 channel = &card->write;
847a50fd 1113 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1114 } else {
1115 channel = &card->data;
847a50fd 1116 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1117 }
1118 atomic_set(&channel->irq_pending, 0);
1119
23d805b6 1120 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1121 channel->state = CH_STATE_STOPPED;
1122
23d805b6 1123 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1124 channel->state = CH_STATE_HALTED;
1125
1126 /*let's wake up immediately on data channel*/
1127 if ((channel == &card->data) && (intparm != 0) &&
1128 (intparm != QETH_RCD_PARM))
1129 goto out;
1130
1131 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1132 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1133 /* we don't have to handle this further */
1134 intparm = 0;
1135 }
1136 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1137 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1138 /* we don't have to handle this further */
1139 intparm = 0;
1140 }
1141 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1142 (dstat & DEV_STAT_UNIT_CHECK) ||
1143 (cstat)) {
1144 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1145 dev_warn(&channel->ccwdev->dev,
1146 "The qeth device driver failed to recover "
1147 "an error on the device\n");
1148 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1149 "0x%X dstat 0x%X\n",
1150 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1151 print_hex_dump(KERN_WARNING, "qeth: irb ",
1152 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1153 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1154 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1155 }
1156 if (intparm == QETH_RCD_PARM) {
1157 channel->state = CH_STATE_DOWN;
1158 goto out;
1159 }
1160 rc = qeth_get_problem(cdev, irb);
1161 if (rc) {
28a7e4c9 1162 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1163 qeth_schedule_recovery(card);
1164 goto out;
1165 }
1166 }
1167
1168 if (intparm == QETH_RCD_PARM) {
1169 channel->state = CH_STATE_RCD_DONE;
1170 goto out;
1171 }
1172 if (intparm) {
1173 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1174 buffer->state = BUF_STATE_PROCESSED;
1175 }
1176 if (channel == &card->data)
1177 return;
1178 if (channel == &card->read &&
1179 channel->state == CH_STATE_UP)
1180 qeth_issue_next_read(card);
1181
1182 iob = channel->iob;
1183 index = channel->buf_no;
1184 while (iob[index].state == BUF_STATE_PROCESSED) {
1185 if (iob[index].callback != NULL)
1186 iob[index].callback(channel, iob + index);
1187
1188 index = (index + 1) % QETH_CMD_BUFFER_NO;
1189 }
1190 channel->buf_no = index;
1191out:
1192 wake_up(&card->wait_q);
1193 return;
1194}
1195
b3332930 1196static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1197 struct qeth_qdio_out_buffer *buf,
b3332930 1198 enum iucv_tx_notify notification)
4a71df50 1199{
4a71df50
FB		 1200 struct sk_buff *skb;
1201
b3332930
FB		 1202 if (skb_queue_empty(&buf->skb_list))
1203 goto out;
1204 skb = skb_peek(&buf->skb_list);
1205 while (skb) {
1206 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1207 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6bee4e26 1208 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
b3332930
FB		 1209 if (skb->sk) {
1210 struct iucv_sock *iucv = iucv_sk(skb->sk);
1211 iucv->sk_txnotify(skb, notification);
1212 }
1213 }
1214 if (skb_queue_is_last(&buf->skb_list, skb))
1215 skb = NULL;
1216 else
1217 skb = skb_queue_next(&buf->skb_list, skb);
1218 }
1219out:
1220 return;
1221}
1222
1223static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1224{
1225 struct sk_buff *skb;
72861ae7
EL		 1226 struct iucv_sock *iucv;
1227 int notify_general_error = 0;
1228
1229 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1230 notify_general_error = 1;
1231
1232 /* release may never happen from within CQ tasklet scope */
18af5c17 1233 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1234
b67d801f
UB		 1235 skb = skb_dequeue(&buf->skb_list);
1236 while (skb) {
b3332930
FB		 1237 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1238 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
6bee4e26
HW		 1239 if (notify_general_error &&
1240 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
72861ae7
EL		 1241 if (skb->sk) {
1242 iucv = iucv_sk(skb->sk);
1243 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1244 }
1245 }
63354797 1246 refcount_dec(&skb->users);
b67d801f 1247 dev_kfree_skb_any(skb);
4a71df50
FB		 1248 skb = skb_dequeue(&buf->skb_list);
1249 }
b3332930
FB		 1250}
1251
1252static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1253 struct qeth_qdio_out_buffer *buf,
1254 enum qeth_qdio_buffer_states newbufstate)
1255{
1256 int i;
1257
1258 /* is PCI flag set on buffer? */
1259 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1260 atomic_dec(&queue->set_pci_flags_count);
1261
1262 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1263 qeth_release_skbs(buf);
1264 }
4a71df50 1265 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1266 if (buf->buffer->element[i].addr && buf->is_header[i])
1267 kmem_cache_free(qeth_core_header_cache,
1268 buf->buffer->element[i].addr);
1269 buf->is_header[i] = 0;
4a71df50
FB		 1270 buf->buffer->element[i].length = 0;
1271 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1272 buf->buffer->element[i].eflags = 0;
1273 buf->buffer->element[i].sflags = 0;
4a71df50 1274 }
3ec90878
JG		 1275 buf->buffer->element[15].eflags = 0;
1276 buf->buffer->element[15].sflags = 0;
4a71df50 1277 buf->next_element_to_fill = 0;
0da9581d
EL		 1278 atomic_set(&buf->state, newbufstate);
1279}
1280
1281static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1282{
1283 int j;
1284
1285 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1286 if (!q->bufs[j])
1287 continue;
72861ae7 1288 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1289 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1290 if (free) {
1291 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1292 q->bufs[j] = NULL;
1293 }
1294 }
4a71df50
FB		 1295}
1296
1297void qeth_clear_qdio_buffers(struct qeth_card *card)
1298{
0da9581d 1299 int i;
4a71df50 1300
847a50fd 1301 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1302 /* clear outbound buffers to free skbs */
0da9581d 1303 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1304 if (card->qdio.out_qs[i]) {
0da9581d 1305 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1306 }
0da9581d 1307 }
4a71df50
FB		 1308}
1309EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1310
1311static void qeth_free_buffer_pool(struct qeth_card *card)
1312{
1313 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1314 int i = 0;
4a71df50
FB		 1315 list_for_each_entry_safe(pool_entry, tmp,
1316 &card->qdio.init_pool.entry_list, init_list){
1317 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1318 free_page((unsigned long)pool_entry->elements[i]);
1319 list_del(&pool_entry->init_list);
1320 kfree(pool_entry);
1321 }
1322}
1323
4a71df50
FB		 1324static void qeth_clean_channel(struct qeth_channel *channel)
1325{
1326 int cnt;
1327
d11ba0c4 1328 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1329 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1330 kfree(channel->iob[cnt].data);
1331}
1332
725b9c04
SO		 1333static void qeth_set_single_write_queues(struct qeth_card *card)
1334{
1335 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1336 (card->qdio.no_out_queues == 4))
1337 qeth_free_qdio_buffers(card);
1338
1339 card->qdio.no_out_queues = 1;
1340 if (card->qdio.default_out_queue != 0)
1341 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1342
1343 card->qdio.default_out_queue = 0;
1344}
1345
1346static void qeth_set_multiple_write_queues(struct qeth_card *card)
1347{
1348 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1349 (card->qdio.no_out_queues == 1)) {
1350 qeth_free_qdio_buffers(card);
1351 card->qdio.default_out_queue = 2;
1352 }
1353 card->qdio.no_out_queues = 4;
1354}
1355
1356static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1357{
4a71df50 1358 struct ccw_device *ccwdev;
2bf29df7 1359 struct channel_path_desc *chp_dsc;
4a71df50 1360
5113fec0 1361 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1362
1363 ccwdev = card->data.ccwdev;
725b9c04
SO		 1364 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1365 if (!chp_dsc)
1366 goto out;
1367
1368 card->info.func_level = 0x4100 + chp_dsc->desc;
1369 if (card->info.type == QETH_CARD_TYPE_IQD)
1370 goto out;
1371
1372 /* CHPP field bit 6 == 1 -> single queue */
1373 if ((chp_dsc->chpp & 0x02) == 0x02)
1374 qeth_set_single_write_queues(card);
1375 else
1376 qeth_set_multiple_write_queues(card);
1377out:
1378 kfree(chp_dsc);
5113fec0
UB		 1379 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1380 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1381}
1382
1383static void qeth_init_qdio_info(struct qeth_card *card)
1384{
d11ba0c4 1385 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1386 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1387 /* inbound */
ed2e93ef 1388 card->qdio.no_in_queues = 1;
4a71df50 1389 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1390 if (card->info.type == QETH_CARD_TYPE_IQD)
1391 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1392 else
1393 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1394 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1395 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1396 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1397}
1398
1399static void qeth_set_intial_options(struct qeth_card *card)
1400{
1401 card->options.route4.type = NO_ROUTER;
1402 card->options.route6.type = NO_ROUTER;
4a71df50 1403 card->options.fake_broadcast = 0;
4a71df50
FB		 1404 card->options.performance_stats = 0;
1405 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1406 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1407 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1408}
1409
1410static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1411{
1412 unsigned long flags;
1413 int rc = 0;
1414
1415 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1416 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1417 (u8) card->thread_start_mask,
1418 (u8) card->thread_allowed_mask,
1419 (u8) card->thread_running_mask);
1420 rc = (card->thread_start_mask & thread);
1421 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1422 return rc;
1423}
1424
1425static void qeth_start_kernel_thread(struct work_struct *work)
1426{
3f36b890 1427 struct task_struct *ts;
4a71df50
FB		 1428 struct qeth_card *card = container_of(work, struct qeth_card,
1429 kernel_thread_starter);
847a50fd 1430 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1431
1432 if (card->read.state != CH_STATE_UP &&
1433 card->write.state != CH_STATE_UP)
1434 return;
3f36b890 1435 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1436 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1437 "qeth_recover");
3f36b890
FB		 1438 if (IS_ERR(ts)) {
1439 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1440 qeth_clear_thread_running_bit(card,
1441 QETH_RECOVER_THREAD);
1442 }
1443 }
4a71df50
FB		 1444}
1445
bca51650 1446static void qeth_buffer_reclaim_work(struct work_struct *);
4a71df50
FB		 1447static int qeth_setup_card(struct qeth_card *card)
1448{
1449
d11ba0c4
PT		 1450 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1451 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1452
1453 card->read.state = CH_STATE_DOWN;
1454 card->write.state = CH_STATE_DOWN;
1455 card->data.state = CH_STATE_DOWN;
1456 card->state = CARD_STATE_DOWN;
1457 card->lan_online = 0;
908abbb5 1458 card->read_or_write_problem = 0;
4a71df50
FB		 1459 card->dev = NULL;
1460 spin_lock_init(&card->vlanlock);
1461 spin_lock_init(&card->mclock);
4a71df50
FB		 1462 spin_lock_init(&card->lock);
1463 spin_lock_init(&card->ip_lock);
1464 spin_lock_init(&card->thread_mask_lock);
c4949f07 1465 mutex_init(&card->conf_mutex);
9dc48ccc 1466 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1467 card->thread_start_mask = 0;
1468 card->thread_allowed_mask = 0;
1469 card->thread_running_mask = 0;
1470 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1471 INIT_LIST_HEAD(&card->cmd_waiter_list);
1472 init_waitqueue_head(&card->wait_q);
25985edc 1473 /* initial options */
4a71df50
FB		 1474 qeth_set_intial_options(card);
1475 /* IP address takeover */
1476 INIT_LIST_HEAD(&card->ipato.entries);
1477 card->ipato.enabled = 0;
1478 card->ipato.invert4 = 0;
1479 card->ipato.invert6 = 0;
1480 /* init QDIO stuff */
1481 qeth_init_qdio_info(card);
b3332930 1482 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1483 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1484 return 0;
1485}
1486
6bcac508
MS		 1487static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1488{
1489 struct qeth_card *card = container_of(slr, struct qeth_card,
1490 qeth_service_level);
0d788c7d
KDW		 1491 if (card->info.mcl_level[0])
1492 seq_printf(m, "qeth: %s firmware level %s\n",
1493 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1494}
1495
4a71df50
FB		 1496static struct qeth_card *qeth_alloc_card(void)
1497{
1498 struct qeth_card *card;
1499
d11ba0c4 1500 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1501 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1502 if (!card)
76b11f8e 1503 goto out;
d11ba0c4 1504 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1505 if (qeth_setup_channel(&card->read))
1506 goto out_ip;
1507 if (qeth_setup_channel(&card->write))
1508 goto out_channel;
4a71df50 1509 card->options.layer2 = -1;
6bcac508
MS		 1510 card->qeth_service_level.seq_print = qeth_core_sl_print;
1511 register_service_level(&card->qeth_service_level);
4a71df50 1512 return card;
76b11f8e
UB		 1513
1514out_channel:
1515 qeth_clean_channel(&card->read);
1516out_ip:
76b11f8e
UB		 1517 kfree(card);
1518out:
1519 return NULL;
4a71df50
FB		 1520}
1521
ed2e93ef 1522static void qeth_determine_card_type(struct qeth_card *card)
4a71df50 1523{
d11ba0c4 1524 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1525
1526 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1527 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
ed2e93ef
JW		 1528 card->info.type = CARD_RDEV(card)->id.driver_info;
1529 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1530 if (card->info.type == QETH_CARD_TYPE_IQD)
1531 card->info.is_multicast_different = 0x0103;
1532 qeth_update_from_chp_desc(card);
4a71df50
FB		 1533}
1534
1535static int qeth_clear_channel(struct qeth_channel *channel)
1536{
1537 unsigned long flags;
1538 struct qeth_card *card;
1539 int rc;
1540
4a71df50 1541 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1542 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1543 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1544 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1545 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1546
1547 if (rc)
1548 return rc;
1549 rc = wait_event_interruptible_timeout(card->wait_q,
1550 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1551 if (rc == -ERESTARTSYS)
1552 return rc;
1553 if (channel->state != CH_STATE_STOPPED)
1554 return -ETIME;
1555 channel->state = CH_STATE_DOWN;
1556 return 0;
1557}
1558
1559static int qeth_halt_channel(struct qeth_channel *channel)
1560{
1561 unsigned long flags;
1562 struct qeth_card *card;
1563 int rc;
1564
4a71df50 1565 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1566 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1567 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1568 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1569 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1570
1571 if (rc)
1572 return rc;
1573 rc = wait_event_interruptible_timeout(card->wait_q,
1574 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1575 if (rc == -ERESTARTSYS)
1576 return rc;
1577 if (channel->state != CH_STATE_HALTED)
1578 return -ETIME;
1579 return 0;
1580}
1581
1582static int qeth_halt_channels(struct qeth_card *card)
1583{
1584 int rc1 = 0, rc2 = 0, rc3 = 0;
1585
847a50fd 1586 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1587 rc1 = qeth_halt_channel(&card->read);
1588 rc2 = qeth_halt_channel(&card->write);
1589 rc3 = qeth_halt_channel(&card->data);
1590 if (rc1)
1591 return rc1;
1592 if (rc2)
1593 return rc2;
1594 return rc3;
1595}
1596
1597static int qeth_clear_channels(struct qeth_card *card)
1598{
1599 int rc1 = 0, rc2 = 0, rc3 = 0;
1600
847a50fd 1601 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1602 rc1 = qeth_clear_channel(&card->read);
1603 rc2 = qeth_clear_channel(&card->write);
1604 rc3 = qeth_clear_channel(&card->data);
1605 if (rc1)
1606 return rc1;
1607 if (rc2)
1608 return rc2;
1609 return rc3;
1610}
1611
1612static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1613{
1614 int rc = 0;
1615
847a50fd 1616 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1617
1618 if (halt)
1619 rc = qeth_halt_channels(card);
1620 if (rc)
1621 return rc;
1622 return qeth_clear_channels(card);
1623}
1624
1625int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1626{
1627 int rc = 0;
1628
847a50fd 1629 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1630 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1631 QETH_QDIO_CLEANING)) {
1632 case QETH_QDIO_ESTABLISHED:
1633 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1634 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1635 QDIO_FLAG_CLEANUP_USING_HALT);
1636 else
cc961d40 1637 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1638 QDIO_FLAG_CLEANUP_USING_CLEAR);
1639 if (rc)
847a50fd 1640 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1641 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1642 break;
1643 case QETH_QDIO_CLEANING:
1644 return rc;
1645 default:
1646 break;
1647 }
1648 rc = qeth_clear_halt_card(card, use_halt);
1649 if (rc)
847a50fd 1650 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1651 card->state = CARD_STATE_DOWN;
1652 return rc;
1653}
1654EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1655
1656static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1657 int *length)
1658{
1659 struct ciw *ciw;
1660 char *rcd_buf;
1661 int ret;
1662 struct qeth_channel *channel = &card->data;
1663 unsigned long flags;
1664
1665 /*
1666 * scan for RCD command in extended SenseID data
1667 */
1668 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1669 if (!ciw || ciw->cmd == 0)
1670 return -EOPNOTSUPP;
1671 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1672 if (!rcd_buf)
1673 return -ENOMEM;
1674
1675 channel->ccw.cmd_code = ciw->cmd;
1676 channel->ccw.cda = (__u32) __pa(rcd_buf);
1677 channel->ccw.count = ciw->count;
1678 channel->ccw.flags = CCW_FLAG_SLI;
1679 channel->state = CH_STATE_RCD;
1680 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1681 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1682 QETH_RCD_PARM, LPM_ANYPATH, 0,
1683 QETH_RCD_TIMEOUT);
1684 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1685 if (!ret)
1686 wait_event(card->wait_q,
1687 (channel->state == CH_STATE_RCD_DONE ||
1688 channel->state == CH_STATE_DOWN));
1689 if (channel->state == CH_STATE_DOWN)
1690 ret = -EIO;
1691 else
1692 channel->state = CH_STATE_DOWN;
1693 if (ret) {
1694 kfree(rcd_buf);
1695 *buffer = NULL;
1696 *length = 0;
1697 } else {
1698 *length = ciw->count;
1699 *buffer = rcd_buf;
1700 }
1701 return ret;
1702}
1703
a60389ab 1704static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1705{
a60389ab 1706 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1707 card->info.chpid = prcd[30];
1708 card->info.unit_addr2 = prcd[31];
1709 card->info.cula = prcd[63];
1710 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1711 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1712}
1713
c70eb09d
JW		 1714/* Determine whether the device requires a specific layer discipline */
1715static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1716{
1717 if (card->info.type == QETH_CARD_TYPE_OSM ||
1718 card->info.type == QETH_CARD_TYPE_OSN) {
1719 QETH_DBF_TEXT(SETUP, 3, "force l2");
1720 return QETH_DISCIPLINE_LAYER2;
1721 }
1722
1723 /* virtual HiperSocket is L3 only: */
1724 if (card->info.guestlan && card->info.type == QETH_CARD_TYPE_IQD) {
1725 QETH_DBF_TEXT(SETUP, 3, "force l3");
1726 return QETH_DISCIPLINE_LAYER3;
1727 }
1728
1729 QETH_DBF_TEXT(SETUP, 3, "force no");
1730 return QETH_DISCIPLINE_UNDETERMINED;
1731}
1732
a60389ab
EL		 1733static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1734{
1735 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1736
e6e056ba 1737 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1738 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1739 card->info.blkt.time_total = 0;
1740 card->info.blkt.inter_packet = 0;
1741 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1742 } else {
1743 card->info.blkt.time_total = 250;
1744 card->info.blkt.inter_packet = 5;
1745 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1746 }
4a71df50
FB		 1747}
1748
1749static void qeth_init_tokens(struct qeth_card *card)
1750{
1751 card->token.issuer_rm_w = 0x00010103UL;
1752 card->token.cm_filter_w = 0x00010108UL;
1753 card->token.cm_connection_w = 0x0001010aUL;
1754 card->token.ulp_filter_w = 0x0001010bUL;
1755 card->token.ulp_connection_w = 0x0001010dUL;
1756}
1757
1758static void qeth_init_func_level(struct qeth_card *card)
1759{
5113fec0
UB		 1760 switch (card->info.type) {
1761 case QETH_CARD_TYPE_IQD:
6298263a 1762 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1763 break;
1764 case QETH_CARD_TYPE_OSD:
0132951e 1765 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1766 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1767 break;
1768 default:
1769 break;
4a71df50
FB		 1770 }
1771}
1772
4a71df50
FB		 1773static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1774 void (*idx_reply_cb)(struct qeth_channel *,
1775 struct qeth_cmd_buffer *))
1776{
1777 struct qeth_cmd_buffer *iob;
1778 unsigned long flags;
1779 int rc;
1780 struct qeth_card *card;
1781
d11ba0c4 1782 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1783 card = CARD_FROM_CDEV(channel->ccwdev);
1784 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1785 if (!iob)
1786 return -ENOMEM;
4a71df50
FB		 1787 iob->callback = idx_reply_cb;
1788 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1789 channel->ccw.count = QETH_BUFSIZE;
1790 channel->ccw.cda = (__u32) __pa(iob->data);
1791
1792 wait_event(card->wait_q,
1793 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1794 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1795 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1796 rc = ccw_device_start(channel->ccwdev,
1797 &channel->ccw, (addr_t) iob, 0, 0);
1798 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1799
1800 if (rc) {
14cc21b6 1801 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1802 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1803 atomic_set(&channel->irq_pending, 0);
1804 wake_up(&card->wait_q);
1805 return rc;
1806 }
1807 rc = wait_event_interruptible_timeout(card->wait_q,
1808 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1809 if (rc == -ERESTARTSYS)
1810 return rc;
1811 if (channel->state != CH_STATE_UP) {
1812 rc = -ETIME;
d11ba0c4 1813 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1814 qeth_clear_cmd_buffers(channel);
1815 } else
1816 rc = 0;
1817 return rc;
1818}
1819
1820static int qeth_idx_activate_channel(struct qeth_channel *channel,
1821 void (*idx_reply_cb)(struct qeth_channel *,
1822 struct qeth_cmd_buffer *))
1823{
1824 struct qeth_card *card;
1825 struct qeth_cmd_buffer *iob;
1826 unsigned long flags;
1827 __u16 temp;
1828 __u8 tmp;
1829 int rc;
f06f6f32 1830 struct ccw_dev_id temp_devid;
4a71df50
FB		 1831
1832 card = CARD_FROM_CDEV(channel->ccwdev);
1833
d11ba0c4 1834 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1835
1836 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1837 if (!iob)
1838 return -ENOMEM;
4a71df50
FB		 1839 iob->callback = idx_reply_cb;
1840 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1841 channel->ccw.count = IDX_ACTIVATE_SIZE;
1842 channel->ccw.cda = (__u32) __pa(iob->data);
1843 if (channel == &card->write) {
1844 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1845 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1846 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1847 card->seqno.trans_hdr++;
1848 } else {
1849 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1850 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1851 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1852 }
1853 tmp = ((__u8)card->info.portno) | 0x80;
1854 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1855 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1856 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1857 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1858 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1859 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1860 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1861 temp = (card->info.cula << 8) + card->info.unit_addr2;
1862 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1863
1864 wait_event(card->wait_q,
1865 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1866 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1867 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1868 rc = ccw_device_start(channel->ccwdev,
1869 &channel->ccw, (addr_t) iob, 0, 0);
1870 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1871
1872 if (rc) {
14cc21b6
FB		 1873 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1874 rc);
d11ba0c4 1875 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1876 atomic_set(&channel->irq_pending, 0);
1877 wake_up(&card->wait_q);
1878 return rc;
1879 }
1880 rc = wait_event_interruptible_timeout(card->wait_q,
1881 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1882 if (rc == -ERESTARTSYS)
1883 return rc;
1884 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1885 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1886 " failed to recover an error on the device\n");
1887 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1888 dev_name(&channel->ccwdev->dev));
d11ba0c4 1889 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1890 qeth_clear_cmd_buffers(channel);
1891 return -ETIME;
1892 }
1893 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1894}
1895
1896static int qeth_peer_func_level(int level)
1897{
1898 if ((level & 0xff) == 8)
1899 return (level & 0xff) + 0x400;
1900 if (((level >> 8) & 3) == 1)
1901 return (level & 0xff) + 0x200;
1902 return level;
1903}
1904
1905static void qeth_idx_write_cb(struct qeth_channel *channel,
1906 struct qeth_cmd_buffer *iob)
1907{
1908 struct qeth_card *card;
1909 __u16 temp;
1910
d11ba0c4 1911 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1912
1913 if (channel->state == CH_STATE_DOWN) {
1914 channel->state = CH_STATE_ACTIVATING;
1915 goto out;
1916 }
1917 card = CARD_FROM_CDEV(channel->ccwdev);
1918
1919 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1920 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1921 dev_err(&card->write.ccwdev->dev,
1922 "The adapter is used exclusively by another "
1923 "host\n");
4a71df50 1924 else
74eacdb9
FB		 1925 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1926 " negative reply\n",
1927 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1928 goto out;
1929 }
1930 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1931 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1932 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1933 "function level mismatch (sent: 0x%x, received: "
1934 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1935 card->info.func_level, temp);
4a71df50
FB		 1936 goto out;
1937 }
1938 channel->state = CH_STATE_UP;
1939out:
1940 qeth_release_buffer(channel, iob);
1941}
1942
1943static void qeth_idx_read_cb(struct qeth_channel *channel,
1944 struct qeth_cmd_buffer *iob)
1945{
1946 struct qeth_card *card;
1947 __u16 temp;
1948
d11ba0c4 1949 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1950 if (channel->state == CH_STATE_DOWN) {
1951 channel->state = CH_STATE_ACTIVATING;
1952 goto out;
1953 }
1954
1955 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1956 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1957 goto out;
1958
1959 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1960 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1961 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1962 dev_err(&card->write.ccwdev->dev,
1963 "The adapter is used exclusively by another "
1964 "host\n");
5113fec0
UB		 1965 break;
1966 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1967 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1968 dev_err(&card->read.ccwdev->dev,
1969 "Setting the device online failed because of "
01fc3e86 1970 "insufficient authorization\n");
5113fec0
UB		 1971 break;
1972 default:
74eacdb9
FB		 1973 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1974 " negative reply\n",
1975 dev_name(&card->read.ccwdev->dev));
5113fec0 1976 }
01fc3e86
UB		 1977 QETH_CARD_TEXT_(card, 2, "idxread%c",
1978 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1979 goto out;
1980 }
1981
4a71df50
FB		 1982 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1983 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1984 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1985 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1986 dev_name(&card->read.ccwdev->dev),
1987 card->info.func_level, temp);
4a71df50
FB		 1988 goto out;
1989 }
1990 memcpy(&card->token.issuer_rm_r,
1991 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1992 QETH_MPC_TOKEN_LENGTH);
1993 memcpy(&card->info.mcl_level[0],
1994 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1995 channel->state = CH_STATE_UP;
1996out:
1997 qeth_release_buffer(channel, iob);
1998}
1999
2000void qeth_prepare_control_data(struct qeth_card *card, int len,
2001 struct qeth_cmd_buffer *iob)
2002{
2003 qeth_setup_ccw(&card->write, iob->data, len);
2004 iob->callback = qeth_release_buffer;
2005
2006 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2007 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2008 card->seqno.trans_hdr++;
2009 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2010 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2011 card->seqno.pdu_hdr++;
2012 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2013 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2014 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2015}
2016EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2017
efbbc1d5
EC		 2018/**
2019 * qeth_send_control_data() - send control command to the card
2020 * @card: qeth_card structure pointer
2021 * @len: size of the command buffer
2022 * @iob: qeth_cmd_buffer pointer
2023 * @reply_cb: callback function pointer
2024 * @cb_card: pointer to the qeth_card structure
2025 * @cb_reply: pointer to the qeth_reply structure
2026 * @cb_cmd: pointer to the original iob for non-IPA
2027 * commands, or to the qeth_ipa_cmd structure
2028 * for the IPA commands.
2029 * @reply_param: private pointer passed to the callback
2030 *
2031 * Returns the value of the `return_code' field of the response
2032 * block returned from the hardware, or other error indication.
2033 * Value of zero indicates successful execution of the command.
2034 *
2035 * Callback function gets called one or more times, with cb_cmd
2036 * pointing to the response returned by the hardware. Callback
2037 * function must return non-zero if more reply blocks are expected,
2038 * and zero if the last or only reply block is received. Callback
2039 * function can get the value of the reply_param pointer from the
2040 * field 'param' of the structure qeth_reply.
2041 */
2042
4a71df50
FB		 2043int qeth_send_control_data(struct qeth_card *card, int len,
2044 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2045 int (*reply_cb)(struct qeth_card *cb_card,
2046 struct qeth_reply *cb_reply,
2047 unsigned long cb_cmd),
4a71df50
FB		 2048 void *reply_param)
2049{
2050 int rc;
2051 unsigned long flags;
2052 struct qeth_reply *reply = NULL;
7834cd5a 2053 unsigned long timeout, event_timeout;
5b54e16f 2054 struct qeth_ipa_cmd *cmd;
4a71df50 2055
847a50fd 2056 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2057
908abbb5
UB		 2058 if (card->read_or_write_problem) {
2059 qeth_release_buffer(iob->channel, iob);
2060 return -EIO;
2061 }
4a71df50
FB		 2062 reply = qeth_alloc_reply(card);
2063 if (!reply) {
4a71df50
FB		 2064 return -ENOMEM;
2065 }
2066 reply->callback = reply_cb;
2067 reply->param = reply_param;
2068 if (card->state == CARD_STATE_DOWN)
2069 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2070 else
2071 reply->seqno = card->seqno.ipa++;
2072 init_waitqueue_head(&reply->wait_q);
2073 spin_lock_irqsave(&card->lock, flags);
2074 list_add_tail(&reply->list, &card->cmd_waiter_list);
2075 spin_unlock_irqrestore(&card->lock, flags);
4a71df50
FB		 2076
2077 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2078 qeth_prepare_control_data(card, len, iob);
2079
2080 if (IS_IPA(iob->data))
7834cd5a 2081 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2082 else
7834cd5a
HC		 2083 event_timeout = QETH_TIMEOUT;
2084 timeout = jiffies + event_timeout;
4a71df50 2085
847a50fd 2086 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2087 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2088 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2089 (addr_t) iob, 0, 0);
2090 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2091 if (rc) {
74eacdb9
FB		 2092 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2093 "ccw_device_start rc = %i\n",
2094 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2095 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2096 spin_lock_irqsave(&card->lock, flags);
2097 list_del_init(&reply->list);
2098 qeth_put_reply(reply);
2099 spin_unlock_irqrestore(&card->lock, flags);
2100 qeth_release_buffer(iob->channel, iob);
2101 atomic_set(&card->write.irq_pending, 0);
2102 wake_up(&card->wait_q);
2103 return rc;
2104 }
5b54e16f
FB		 2105
2106 /* we have only one long running ipassist, since we can ensure
2107 process context of this command we can sleep */
2108 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2109 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2110 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2111 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2112 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2113 goto time_err;
2114 } else {
2115 while (!atomic_read(&reply->received)) {
2116 if (time_after(jiffies, timeout))
2117 goto time_err;
2118 cpu_relax();
6531084c 2119 }
5b54e16f
FB		 2120 }
2121
70919e23
UB		 2122 if (reply->rc == -EIO)
2123 goto error;
5b54e16f
FB		 2124 rc = reply->rc;
2125 qeth_put_reply(reply);
2126 return rc;
2127
2128time_err:
70919e23 2129 reply->rc = -ETIME;
5b54e16f
FB		 2130 spin_lock_irqsave(&reply->card->lock, flags);
2131 list_del_init(&reply->list);
2132 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2133 atomic_inc(&reply->received);
70919e23 2134error:
908abbb5
UB		 2135 atomic_set(&card->write.irq_pending, 0);
2136 qeth_release_buffer(iob->channel, iob);
2137 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2138 rc = reply->rc;
2139 qeth_put_reply(reply);
2140 return rc;
2141}
2142EXPORT_SYMBOL_GPL(qeth_send_control_data);
2143
2144static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2145 unsigned long data)
2146{
2147 struct qeth_cmd_buffer *iob;
2148
d11ba0c4 2149 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2150
2151 iob = (struct qeth_cmd_buffer *) data;
2152 memcpy(&card->token.cm_filter_r,
2153 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2154 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2155 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2156 return 0;
2157}
2158
2159static int qeth_cm_enable(struct qeth_card *card)
2160{
2161 int rc;
2162 struct qeth_cmd_buffer *iob;
2163
d11ba0c4 2164 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2165
2166 iob = qeth_wait_for_buffer(&card->write);
2167 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2168 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2169 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2170 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2171 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2172
2173 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2174 qeth_cm_enable_cb, NULL);
2175 return rc;
2176}
2177
2178static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2179 unsigned long data)
2180{
2181
2182 struct qeth_cmd_buffer *iob;
2183
d11ba0c4 2184 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2185
2186 iob = (struct qeth_cmd_buffer *) data;
2187 memcpy(&card->token.cm_connection_r,
2188 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2189 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2190 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2191 return 0;
2192}
2193
2194static int qeth_cm_setup(struct qeth_card *card)
2195{
2196 int rc;
2197 struct qeth_cmd_buffer *iob;
2198
d11ba0c4 2199 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2200
2201 iob = qeth_wait_for_buffer(&card->write);
2202 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2203 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2204 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2205 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2206 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2207 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2208 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2209 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2210 qeth_cm_setup_cb, NULL);
2211 return rc;
2212
2213}
2214
cef6ff22 2215static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
4a71df50
FB		 2216{
2217 switch (card->info.type) {
4a71df50
FB		 2218 case QETH_CARD_TYPE_IQD:
2219 return card->info.max_mtu;
5113fec0 2220 case QETH_CARD_TYPE_OSD:
5113fec0 2221 case QETH_CARD_TYPE_OSX:
6e6f472d
JW		 2222 if (!card->options.layer2)
2223 return ETH_DATA_LEN - 8; /* L3: allow for LLC + SNAP */
2224 /* fall through */
4a71df50 2225 default:
6e6f472d 2226 return ETH_DATA_LEN;
4a71df50
FB		 2227 }
2228}
2229
cef6ff22 2230static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2231{
2232 switch (framesize) {
2233 case 0x4000:
2234 return 8192;
2235 case 0x6000:
2236 return 16384;
2237 case 0xa000:
2238 return 32768;
2239 case 0xffff:
2240 return 57344;
2241 default:
2242 return 0;
2243 }
2244}
2245
cef6ff22 2246static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
4a71df50
FB		 2247{
2248 switch (card->info.type) {
5113fec0
UB		 2249 case QETH_CARD_TYPE_OSD:
2250 case QETH_CARD_TYPE_OSM:
2251 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2252 case QETH_CARD_TYPE_IQD:
2253 return ((mtu >= 576) &&
9853b97b 2254 (mtu <= card->info.max_mtu));
4a71df50 2255 case QETH_CARD_TYPE_OSN:
4a71df50
FB		 2256 default:
2257 return 1;
2258 }
2259}
2260
2261static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2262 unsigned long data)
2263{
2264
2265 __u16 mtu, framesize;
2266 __u16 len;
2267 __u8 link_type;
2268 struct qeth_cmd_buffer *iob;
2269
d11ba0c4 2270 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2271
2272 iob = (struct qeth_cmd_buffer *) data;
2273 memcpy(&card->token.ulp_filter_r,
2274 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2275 QETH_MPC_TOKEN_LENGTH);
9853b97b 2276 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2277 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2278 mtu = qeth_get_mtu_outof_framesize(framesize);
2279 if (!mtu) {
2280 iob->rc = -EINVAL;
d11ba0c4 2281 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2282 return 0;
2283 }
8b2e18f6
UB		 2284 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2285 /* frame size has changed */
2286 if (card->dev &&
2287 ((card->dev->mtu == card->info.initial_mtu) ||
2288 (card->dev->mtu > mtu)))
2289 card->dev->mtu = mtu;
2290 qeth_free_qdio_buffers(card);
2291 }
4a71df50 2292 card->info.initial_mtu = mtu;
8b2e18f6 2293 card->info.max_mtu = mtu;
4a71df50
FB		 2294 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2295 } else {
9853b97b
FB		 2296 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2297 iob->data);
fe44014a
SR		 2298 card->info.initial_mtu = min(card->info.max_mtu,
2299 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2300 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2301 }
2302
2303 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2304 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2305 memcpy(&link_type,
2306 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2307 card->info.link_type = link_type;
2308 } else
2309 card->info.link_type = 0;
01fc3e86 2310 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2311 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2312 return 0;
2313}
2314
2315static int qeth_ulp_enable(struct qeth_card *card)
2316{
2317 int rc;
2318 char prot_type;
2319 struct qeth_cmd_buffer *iob;
2320
2321 /*FIXME: trace view callbacks*/
d11ba0c4 2322 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2323
2324 iob = qeth_wait_for_buffer(&card->write);
2325 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2326
2327 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2328 (__u8) card->info.portno;
2329 if (card->options.layer2)
2330 if (card->info.type == QETH_CARD_TYPE_OSN)
2331 prot_type = QETH_PROT_OSN2;
2332 else
2333 prot_type = QETH_PROT_LAYER2;
2334 else
2335 prot_type = QETH_PROT_TCPIP;
2336
2337 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2338 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2339 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2340 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2341 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2342 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2343 qeth_ulp_enable_cb, NULL);
2344 return rc;
2345
2346}
2347
2348static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2349 unsigned long data)
2350{
2351 struct qeth_cmd_buffer *iob;
2352
d11ba0c4 2353 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2354
2355 iob = (struct qeth_cmd_buffer *) data;
2356 memcpy(&card->token.ulp_connection_r,
2357 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2358 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2359 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2360 3)) {
2361 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2362 dev_err(&card->gdev->dev, "A connection could not be "
2363 "established because of an OLM limit\n");
bbb822a8 2364 iob->rc = -EMLINK;
65a1f898 2365 }
d11ba0c4 2366 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2367 return 0;
4a71df50
FB		 2368}
2369
2370static int qeth_ulp_setup(struct qeth_card *card)
2371{
2372 int rc;
2373 __u16 temp;
2374 struct qeth_cmd_buffer *iob;
2375 struct ccw_dev_id dev_id;
2376
d11ba0c4 2377 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2378
2379 iob = qeth_wait_for_buffer(&card->write);
2380 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2381
2382 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2383 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2384 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2385 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2386 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2387 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2388
2389 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2390 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2391 temp = (card->info.cula << 8) + card->info.unit_addr2;
2392 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2393 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2394 qeth_ulp_setup_cb, NULL);
2395 return rc;
2396}
2397
0da9581d
EL		 2398static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2399{
2400 int rc;
2401 struct qeth_qdio_out_buffer *newbuf;
2402
2403 rc = 0;
2404 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2405 if (!newbuf) {
2406 rc = -ENOMEM;
2407 goto out;
2408 }
d445a4e2 2409 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2410 skb_queue_head_init(&newbuf->skb_list);
2411 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2412 newbuf->q = q;
2413 newbuf->aob = NULL;
2414 newbuf->next_pending = q->bufs[bidx];
2415 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2416 q->bufs[bidx] = newbuf;
2417 if (q->bufstates) {
2418 q->bufstates[bidx].user = newbuf;
2419 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2420 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2421 QETH_CARD_TEXT_(q->card, 2, "%lx",
2422 (long) newbuf->next_pending);
2423 }
2424out:
2425 return rc;
2426}
2427
d445a4e2
SO		 2428static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2429{
2430 if (!q)
2431 return;
2432
2433 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2434 kfree(q);
2435}
2436
2437static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2438{
2439 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2440
2441 if (!q)
2442 return NULL;
2443
2444 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2445 kfree(q);
2446 return NULL;
2447 }
2448 return q;
2449}
0da9581d 2450
4a71df50
FB		 2451static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2452{
2453 int i, j;
2454
d11ba0c4 2455 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2456
2457 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2458 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2459 return 0;
2460
4601ba6c
SO		 2461 QETH_DBF_TEXT(SETUP, 2, "inq");
2462 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2463 if (!card->qdio.in_q)
2464 goto out_nomem;
4601ba6c 2465
4a71df50
FB		 2466 /* inbound buffer pool */
2467 if (qeth_alloc_buffer_pool(card))
2468 goto out_freeinq;
0da9581d 2469
4a71df50
FB		 2470 /* outbound */
2471 card->qdio.out_qs =
b3332930 2472 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2473 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2474 if (!card->qdio.out_qs)
2475 goto out_freepool;
2476 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2477 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2478 if (!card->qdio.out_qs[i])
2479 goto out_freeoutq;
d11ba0c4
PT		 2480 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2481 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2482 card->qdio.out_qs[i]->queue_no = i;
2483 /* give outbound qeth_qdio_buffers their qdio_buffers */
2484 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2485 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2486 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2487 goto out_freeoutqbufs;
4a71df50
FB		 2488 }
2489 }
0da9581d
EL		 2490
2491 /* completion */
2492 if (qeth_alloc_cq(card))
2493 goto out_freeoutq;
2494
4a71df50
FB		 2495 return 0;
2496
0da9581d
EL		 2497out_freeoutqbufs:
2498 while (j > 0) {
2499 --j;
2500 kmem_cache_free(qeth_qdio_outbuf_cache,
2501 card->qdio.out_qs[i]->bufs[j]);
2502 card->qdio.out_qs[i]->bufs[j] = NULL;
2503 }
4a71df50 2504out_freeoutq:
0da9581d 2505 while (i > 0) {
d445a4e2 2506 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2507 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2508 }
4a71df50
FB		 2509 kfree(card->qdio.out_qs);
2510 card->qdio.out_qs = NULL;
2511out_freepool:
2512 qeth_free_buffer_pool(card);
2513out_freeinq:
4601ba6c 2514 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2515 card->qdio.in_q = NULL;
2516out_nomem:
2517 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2518 return -ENOMEM;
2519}
2520
d445a4e2
SO		 2521static void qeth_free_qdio_buffers(struct qeth_card *card)
2522{
2523 int i, j;
2524
2525 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2526 QETH_QDIO_UNINITIALIZED)
2527 return;
2528
2529 qeth_free_cq(card);
2530 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2531 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2532 if (card->qdio.in_q->bufs[j].rx_skb)
2533 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2534 }
2535 qeth_free_qdio_queue(card->qdio.in_q);
2536 card->qdio.in_q = NULL;
2537 /* inbound buffer pool */
2538 qeth_free_buffer_pool(card);
2539 /* free outbound qdio_qs */
2540 if (card->qdio.out_qs) {
2541 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2542 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2543 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2544 }
2545 kfree(card->qdio.out_qs);
2546 card->qdio.out_qs = NULL;
2547 }
2548}
2549
4a71df50
FB		 2550static void qeth_create_qib_param_field(struct qeth_card *card,
2551 char *param_field)
2552{
2553
2554 param_field[0] = _ascebc['P'];
2555 param_field[1] = _ascebc['C'];
2556 param_field[2] = _ascebc['I'];
2557 param_field[3] = _ascebc['T'];
2558 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2559 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2560 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2561}
2562
2563static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2564 char *param_field)
2565{
2566 param_field[16] = _ascebc['B'];
2567 param_field[17] = _ascebc['L'];
2568 param_field[18] = _ascebc['K'];
2569 param_field[19] = _ascebc['T'];
2570 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2571 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2572 *((unsigned int *) (&param_field[28])) =
2573 card->info.blkt.inter_packet_jumbo;
2574}
2575
2576static int qeth_qdio_activate(struct qeth_card *card)
2577{
d11ba0c4 2578 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2579 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2580}
2581
2582static int qeth_dm_act(struct qeth_card *card)
2583{
2584 int rc;
2585 struct qeth_cmd_buffer *iob;
2586
d11ba0c4 2587 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2588
2589 iob = qeth_wait_for_buffer(&card->write);
2590 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2591
2592 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2593 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2594 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2595 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2596 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2597 return rc;
2598}
2599
2600static int qeth_mpc_initialize(struct qeth_card *card)
2601{
2602 int rc;
2603
d11ba0c4 2604 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2605
2606 rc = qeth_issue_next_read(card);
2607 if (rc) {
d11ba0c4 2608 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2609 return rc;
2610 }
2611 rc = qeth_cm_enable(card);
2612 if (rc) {
d11ba0c4 2613 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2614 goto out_qdio;
2615 }
2616 rc = qeth_cm_setup(card);
2617 if (rc) {
d11ba0c4 2618 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2619 goto out_qdio;
2620 }
2621 rc = qeth_ulp_enable(card);
2622 if (rc) {
d11ba0c4 2623 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2624 goto out_qdio;
2625 }
2626 rc = qeth_ulp_setup(card);
2627 if (rc) {
d11ba0c4 2628 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2629 goto out_qdio;
2630 }
2631 rc = qeth_alloc_qdio_buffers(card);
2632 if (rc) {
d11ba0c4 2633 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2634 goto out_qdio;
2635 }
2636 rc = qeth_qdio_establish(card);
2637 if (rc) {
d11ba0c4 2638 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2639 qeth_free_qdio_buffers(card);
2640 goto out_qdio;
2641 }
2642 rc = qeth_qdio_activate(card);
2643 if (rc) {
d11ba0c4 2644 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2645 goto out_qdio;
2646 }
2647 rc = qeth_dm_act(card);
2648 if (rc) {
d11ba0c4 2649 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2650 goto out_qdio;
2651 }
2652
2653 return 0;
2654out_qdio:
2655 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2656 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2657 return rc;
2658}
2659
4a71df50
FB		 2660void qeth_print_status_message(struct qeth_card *card)
2661{
2662 switch (card->info.type) {
5113fec0
UB		 2663 case QETH_CARD_TYPE_OSD:
2664 case QETH_CARD_TYPE_OSM:
2665 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2666 /* VM will use a non-zero first character
2667 * to indicate a HiperSockets like reporting
2668 * of the level OSA sets the first character to zero
2669 * */
2670 if (!card->info.mcl_level[0]) {
2671 sprintf(card->info.mcl_level, "%02x%02x",
2672 card->info.mcl_level[2],
2673 card->info.mcl_level[3]);
4a71df50
FB		 2674 break;
2675 }
2676 /* fallthrough */
2677 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2678 if ((card->info.guestlan) ||
2679 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2680 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2681 card->info.mcl_level[0]];
2682 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2683 card->info.mcl_level[1]];
2684 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2685 card->info.mcl_level[2]];
2686 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2687 card->info.mcl_level[3]];
2688 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2689 }
2690 break;
2691 default:
2692 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2693 }
239ff408
UB		 2694 dev_info(&card->gdev->dev,
2695 "Device is a%s card%s%s%s\nwith link type %s.\n",
2696 qeth_get_cardname(card),
2697 (card->info.mcl_level[0]) ? " (level: " : "",
2698 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2699 (card->info.mcl_level[0]) ? ")" : "",
2700 qeth_get_cardname_short(card));
4a71df50
FB		 2701}
2702EXPORT_SYMBOL_GPL(qeth_print_status_message);
2703
4a71df50
FB		 2704static void qeth_initialize_working_pool_list(struct qeth_card *card)
2705{
2706 struct qeth_buffer_pool_entry *entry;
2707
847a50fd 2708 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2709
2710 list_for_each_entry(entry,
2711 &card->qdio.init_pool.entry_list, init_list) {
2712 qeth_put_buffer_pool_entry(card, entry);
2713 }
2714}
2715
cef6ff22
JW		 2716static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2717 struct qeth_card *card)
4a71df50
FB		 2718{
2719 struct list_head *plh;
2720 struct qeth_buffer_pool_entry *entry;
2721 int i, free;
2722 struct page *page;
2723
2724 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2725 return NULL;
2726
2727 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2728 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2729 free = 1;
2730 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2731 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2732 free = 0;
2733 break;
2734 }
2735 }
2736 if (free) {
2737 list_del_init(&entry->list);
2738 return entry;
2739 }
2740 }
2741
2742 /* no free buffer in pool so take first one and swap pages */
2743 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2744 struct qeth_buffer_pool_entry, list);
2745 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2746 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2747 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2748 if (!page) {
2749 return NULL;
2750 } else {
2751 free_page((unsigned long)entry->elements[i]);
2752 entry->elements[i] = page_address(page);
2753 if (card->options.performance_stats)
2754 card->perf_stats.sg_alloc_page_rx++;
2755 }
2756 }
2757 }
2758 list_del_init(&entry->list);
2759 return entry;
2760}
2761
2762static int qeth_init_input_buffer(struct qeth_card *card,
2763 struct qeth_qdio_buffer *buf)
2764{
2765 struct qeth_buffer_pool_entry *pool_entry;
2766 int i;
2767
b3332930
FB		 2768 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2769 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2770 if (!buf->rx_skb)
2771 return 1;
2772 }
2773
4a71df50
FB		 2774 pool_entry = qeth_find_free_buffer_pool_entry(card);
2775 if (!pool_entry)
2776 return 1;
2777
2778 /*
2779 * since the buffer is accessed only from the input_tasklet
2780 * there shouldn't be a need to synchronize; also, since we use
2781 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2782 * buffers
2783 */
4a71df50
FB		 2784
2785 buf->pool_entry = pool_entry;
2786 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2787 buf->buffer->element[i].length = PAGE_SIZE;
2788 buf->buffer->element[i].addr = pool_entry->elements[i];
2789 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2790 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2791 else
3ec90878
JG		 2792 buf->buffer->element[i].eflags = 0;
2793 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2794 }
2795 return 0;
2796}
2797
2798int qeth_init_qdio_queues(struct qeth_card *card)
2799{
2800 int i, j;
2801 int rc;
2802
d11ba0c4 2803 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2804
2805 /* inbound queue */
6d284bde
SO		 2806 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2807 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2808 qeth_initialize_working_pool_list(card);
2809 /*give only as many buffers to hardware as we have buffer pool entries*/
2810 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2811 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2812 card->qdio.in_q->next_buf_to_init =
2813 card->qdio.in_buf_pool.buf_count - 1;
2814 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2815 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2816 if (rc) {
d11ba0c4 2817 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2818 return rc;
2819 }
0da9581d
EL		 2820
2821 /* completion */
2822 rc = qeth_cq_init(card);
2823 if (rc) {
2824 return rc;
2825 }
2826
4a71df50
FB		 2827 /* outbound queue */
2828 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2829 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2830 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2831 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2832 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2833 card->qdio.out_qs[i]->bufs[j],
2834 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2835 }
2836 card->qdio.out_qs[i]->card = card;
2837 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2838 card->qdio.out_qs[i]->do_pack = 0;
2839 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2840 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2841 atomic_set(&card->qdio.out_qs[i]->state,
2842 QETH_OUT_Q_UNLOCKED);
2843 }
2844 return 0;
2845}
2846EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2847
cef6ff22 2848static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2849{
2850 switch (link_type) {
2851 case QETH_LINK_TYPE_HSTR:
2852 return 2;
2853 default:
2854 return 1;
2855 }
2856}
2857
2858static void qeth_fill_ipacmd_header(struct qeth_card *card,
2859 struct qeth_ipa_cmd *cmd, __u8 command,
2860 enum qeth_prot_versions prot)
2861{
2862 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2863 cmd->hdr.command = command;
2864 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2865 cmd->hdr.seqno = card->seqno.ipa;
2866 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2867 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2868 if (card->options.layer2)
2869 cmd->hdr.prim_version_no = 2;
2870 else
2871 cmd->hdr.prim_version_no = 1;
2872 cmd->hdr.param_count = 1;
2873 cmd->hdr.prot_version = prot;
2874 cmd->hdr.ipa_supported = 0;
2875 cmd->hdr.ipa_enabled = 0;
2876}
2877
2878struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2879 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2880{
2881 struct qeth_cmd_buffer *iob;
2882 struct qeth_ipa_cmd *cmd;
2883
1aec42bc
TR		 2884 iob = qeth_get_buffer(&card->write);
2885 if (iob) {
2886 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2887 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2888 } else {
2889 dev_warn(&card->gdev->dev,
2890 "The qeth driver ran out of channel command buffers\n");
2891 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2892 dev_name(&card->gdev->dev));
2893 }
4a71df50
FB		 2894
2895 return iob;
2896}
2897EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2898
2899void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2900 char prot_type)
2901{
2902 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2903 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2904 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2905 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2906}
2907EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2908
efbbc1d5
EC		 2909/**
2910 * qeth_send_ipa_cmd() - send an IPA command
2911 *
2912 * See qeth_send_control_data() for explanation of the arguments.
2913 */
2914
4a71df50
FB		 2915int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2916 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2917 unsigned long),
2918 void *reply_param)
2919{
2920 int rc;
2921 char prot_type;
4a71df50 2922
847a50fd 2923 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2924
2925 if (card->options.layer2)
2926 if (card->info.type == QETH_CARD_TYPE_OSN)
2927 prot_type = QETH_PROT_OSN2;
2928 else
2929 prot_type = QETH_PROT_LAYER2;
2930 else
2931 prot_type = QETH_PROT_TCPIP;
2932 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2933 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2934 iob, reply_cb, reply_param);
908abbb5
UB		 2935 if (rc == -ETIME) {
2936 qeth_clear_ipacmd_list(card);
2937 qeth_schedule_recovery(card);
2938 }
4a71df50
FB		 2939 return rc;
2940}
2941EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2942
10340510 2943static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 2944{
2945 int rc;
70919e23 2946 struct qeth_cmd_buffer *iob;
4a71df50 2947
d11ba0c4 2948 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2949
70919e23 2950 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2951 if (!iob)
2952 return -ENOMEM;
70919e23 2953 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2954 return rc;
2955}
4a71df50 2956
eb3fb0ba 2957static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2958 struct qeth_reply *reply, unsigned long data)
2959{
2960 struct qeth_ipa_cmd *cmd;
2961
847a50fd 2962 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2963
2964 cmd = (struct qeth_ipa_cmd *) data;
2965 if (cmd->hdr.return_code == 0)
2966 cmd->hdr.return_code =
2967 cmd->data.setadapterparms.hdr.return_code;
2968 return 0;
2969}
4a71df50
FB		 2970
2971static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2972 struct qeth_reply *reply, unsigned long data)
2973{
2974 struct qeth_ipa_cmd *cmd;
2975
847a50fd 2976 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2977
2978 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2979 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2980 card->info.link_type =
2981 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2982 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2983 }
4a71df50
FB		 2984 card->options.adp.supported_funcs =
2985 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2986 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2987}
2988
eb3fb0ba 2989static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2990 __u32 command, __u32 cmdlen)
2991{
2992 struct qeth_cmd_buffer *iob;
2993 struct qeth_ipa_cmd *cmd;
2994
2995 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2996 QETH_PROT_IPV4);
1aec42bc
TR		 2997 if (iob) {
2998 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2999 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3000 cmd->data.setadapterparms.hdr.command_code = command;
3001 cmd->data.setadapterparms.hdr.used_total = 1;
3002 cmd->data.setadapterparms.hdr.seq_no = 1;
3003 }
4a71df50
FB		 3004
3005 return iob;
3006}
4a71df50
FB		 3007
3008int qeth_query_setadapterparms(struct qeth_card *card)
3009{
3010 int rc;
3011 struct qeth_cmd_buffer *iob;
3012
847a50fd 3013 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3014 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3015 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3016 if (!iob)
3017 return -ENOMEM;
4a71df50
FB		 3018 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3019 return rc;
3020}
3021EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3022
1da74b1c
FB		 3023static int qeth_query_ipassists_cb(struct qeth_card *card,
3024 struct qeth_reply *reply, unsigned long data)
3025{
3026 struct qeth_ipa_cmd *cmd;
3027
3028 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3029
3030 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3031
3032 switch (cmd->hdr.return_code) {
3033 case IPA_RC_NOTSUPP:
3034 case IPA_RC_L2_UNSUPPORTED_CMD:
3035 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3036 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3037 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3038 return -0;
3039 default:
3040 if (cmd->hdr.return_code) {
3041 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3042 "rc=%d\n",
3043 dev_name(&card->gdev->dev),
3044 cmd->hdr.return_code);
3045 return 0;
3046 }
3047 }
3048
1da74b1c
FB		 3049 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3050 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3051 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3052 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3053 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3054 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3055 } else
3056 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3057 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3058 return 0;
3059}
3060
3061int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3062{
3063 int rc;
3064 struct qeth_cmd_buffer *iob;
3065
3066 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3067 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3068 if (!iob)
3069 return -ENOMEM;
1da74b1c
FB		 3070 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3071 return rc;
3072}
3073EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3074
45cbb2e4
SR		 3075static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3076 struct qeth_reply *reply, unsigned long data)
3077{
3078 struct qeth_ipa_cmd *cmd;
3079 struct qeth_switch_info *sw_info;
3080 struct qeth_query_switch_attributes *attrs;
3081
3082 QETH_CARD_TEXT(card, 2, "qswiatcb");
3083 cmd = (struct qeth_ipa_cmd *) data;
3084 sw_info = (struct qeth_switch_info *)reply->param;
3085 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3086 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3087 sw_info->capabilities = attrs->capabilities;
3088 sw_info->settings = attrs->settings;
3089 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3090 sw_info->settings);
3091 }
3092 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3093
3094 return 0;
3095}
3096
3097int qeth_query_switch_attributes(struct qeth_card *card,
3098 struct qeth_switch_info *sw_info)
3099{
3100 struct qeth_cmd_buffer *iob;
3101
3102 QETH_CARD_TEXT(card, 2, "qswiattr");
3103 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3104 return -EOPNOTSUPP;
3105 if (!netif_carrier_ok(card->dev))
3106 return -ENOMEDIUM;
3107 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3108 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3109 if (!iob)
3110 return -ENOMEM;
45cbb2e4
SR		 3111 return qeth_send_ipa_cmd(card, iob,
3112 qeth_query_switch_attributes_cb, sw_info);
3113}
3114EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3115
1da74b1c
FB		 3116static int qeth_query_setdiagass_cb(struct qeth_card *card,
3117 struct qeth_reply *reply, unsigned long data)
3118{
3119 struct qeth_ipa_cmd *cmd;
3120 __u16 rc;
3121
3122 cmd = (struct qeth_ipa_cmd *)data;
3123 rc = cmd->hdr.return_code;
3124 if (rc)
3125 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3126 else
3127 card->info.diagass_support = cmd->data.diagass.ext;
3128 return 0;
3129}
3130
3131static int qeth_query_setdiagass(struct qeth_card *card)
3132{
3133 struct qeth_cmd_buffer *iob;
3134 struct qeth_ipa_cmd *cmd;
3135
3136 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3137 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3138 if (!iob)
3139 return -ENOMEM;
1da74b1c
FB		 3140 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3141 cmd->data.diagass.subcmd_len = 16;
3142 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3143 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3144}
3145
3146static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3147{
3148 unsigned long info = get_zeroed_page(GFP_KERNEL);
3149 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3150 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3151 struct ccw_dev_id ccwid;
caf757c6 3152 int level;
1da74b1c
FB		 3153
3154 tid->chpid = card->info.chpid;
3155 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3156 tid->ssid = ccwid.ssid;
3157 tid->devno = ccwid.devno;
3158 if (!info)
3159 return;
caf757c6
HC		 3160 level = stsi(NULL, 0, 0, 0);
3161 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3162 tid->lparnr = info222->lpar_number;
caf757c6 3163 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3164 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3165 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3166 }
3167 free_page(info);
3168 return;
3169}
3170
3171static int qeth_hw_trap_cb(struct qeth_card *card,
3172 struct qeth_reply *reply, unsigned long data)
3173{
3174 struct qeth_ipa_cmd *cmd;
3175 __u16 rc;
3176
3177 cmd = (struct qeth_ipa_cmd *)data;
3178 rc = cmd->hdr.return_code;
3179 if (rc)
3180 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3181 return 0;
3182}
3183
3184int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3185{
3186 struct qeth_cmd_buffer *iob;
3187 struct qeth_ipa_cmd *cmd;
3188
3189 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3190 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3191 if (!iob)
3192 return -ENOMEM;
1da74b1c
FB		 3193 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3194 cmd->data.diagass.subcmd_len = 80;
3195 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3196 cmd->data.diagass.type = 1;
3197 cmd->data.diagass.action = action;
3198 switch (action) {
3199 case QETH_DIAGS_TRAP_ARM:
3200 cmd->data.diagass.options = 0x0003;
3201 cmd->data.diagass.ext = 0x00010000 +
3202 sizeof(struct qeth_trap_id);
3203 qeth_get_trap_id(card,
3204 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3205 break;
3206 case QETH_DIAGS_TRAP_DISARM:
3207 cmd->data.diagass.options = 0x0001;
3208 break;
3209 case QETH_DIAGS_TRAP_CAPTURE:
3210 break;
3211 }
3212 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3213}
3214EXPORT_SYMBOL_GPL(qeth_hw_trap);
3215
d73ef324
JW		 3216static int qeth_check_qdio_errors(struct qeth_card *card,
3217 struct qdio_buffer *buf,
3218 unsigned int qdio_error,
3219 const char *dbftext)
4a71df50 3220{
779e6e1c 3221 if (qdio_error) {
847a50fd 3222 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3223 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3224 buf->element[15].sflags);
38593d01 3225 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3226 buf->element[14].sflags);
38593d01 3227 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3228 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3229 card->stats.rx_dropped++;
3230 return 0;
3231 } else
3232 return 1;
4a71df50
FB		 3233 }
3234 return 0;
3235}
4a71df50 3236
d73ef324 3237static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3238{
3239 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3240 struct list_head *lh;
4a71df50
FB		 3241 int count;
3242 int i;
3243 int rc;
3244 int newcount = 0;
3245
4a71df50
FB		 3246 count = (index < queue->next_buf_to_init)?
3247 card->qdio.in_buf_pool.buf_count -
3248 (queue->next_buf_to_init - index) :
3249 card->qdio.in_buf_pool.buf_count -
3250 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3251 /* only requeue at a certain threshold to avoid SIGAs */
3252 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3253 for (i = queue->next_buf_to_init;
3254 i < queue->next_buf_to_init + count; ++i) {
3255 if (qeth_init_input_buffer(card,
3256 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3257 break;
3258 } else {
3259 newcount++;
3260 }
3261 }
3262
3263 if (newcount < count) {
3264 /* we are in memory shortage so we switch back to
3265 traditional skb allocation and drop packages */
4a71df50
FB		 3266 atomic_set(&card->force_alloc_skb, 3);
3267 count = newcount;
3268 } else {
4a71df50
FB		 3269 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3270 }
3271
b3332930
FB		 3272 if (!count) {
3273 i = 0;
3274 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3275 i++;
3276 if (i == card->qdio.in_buf_pool.buf_count) {
3277 QETH_CARD_TEXT(card, 2, "qsarbw");
3278 card->reclaim_index = index;
3279 schedule_delayed_work(
3280 &card->buffer_reclaim_work,
3281 QETH_RECLAIM_WORK_TIME);
3282 }
3283 return;
3284 }
3285
4a71df50
FB		 3286 /*
3287 * according to old code it should be avoided to requeue all
3288 * 128 buffers in order to benefit from PCI avoidance.
3289 * this function keeps at least one buffer (the buffer at
3290 * 'index') un-requeued -> this buffer is the first buffer that
3291 * will be requeued the next time
3292 */
3293 if (card->options.performance_stats) {
3294 card->perf_stats.inbound_do_qdio_cnt++;
3295 card->perf_stats.inbound_do_qdio_start_time =
3296 qeth_get_micros();
3297 }
779e6e1c
JG		 3298 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3299 queue->next_buf_to_init, count);
4a71df50
FB		 3300 if (card->options.performance_stats)
3301 card->perf_stats.inbound_do_qdio_time +=
3302 qeth_get_micros() -
3303 card->perf_stats.inbound_do_qdio_start_time;
3304 if (rc) {
847a50fd 3305 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3306 }
3307 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3308 QDIO_MAX_BUFFERS_PER_Q;
3309 }
3310}
d73ef324
JW		 3311
3312static void qeth_buffer_reclaim_work(struct work_struct *work)
3313{
3314 struct qeth_card *card = container_of(work, struct qeth_card,
3315 buffer_reclaim_work.work);
3316
3317 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3318 qeth_queue_input_buffer(card, card->reclaim_index);
3319}
4a71df50 3320
d7a39937 3321static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3322 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3323{
3ec90878 3324 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3325
847a50fd 3326 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3327 if (card->info.type == QETH_CARD_TYPE_IQD) {
3328 if (sbalf15 == 0) {
3329 qdio_err = 0;
3330 } else {
3331 qdio_err = 1;
3332 }
3333 }
76b11f8e 3334 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3335
3336 if (!qdio_err)
d7a39937 3337 return;
d303b6fd
JG		 3338
3339 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3340 return;
d303b6fd 3341
847a50fd
CO		 3342 QETH_CARD_TEXT(card, 1, "lnkfail");
3343 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3344 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3345}
3346
664e42ac
JW		 3347/**
3348 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3349 * @queue: queue to check for packing buffer
3350 *
3351 * Returns number of buffers that were prepared for flush.
3352 */
3353static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3354{
3355 struct qeth_qdio_out_buffer *buffer;
3356
3357 buffer = queue->bufs[queue->next_buf_to_fill];
3358 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3359 (buffer->next_element_to_fill > 0)) {
3360 /* it's a packing buffer */
3361 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3362 queue->next_buf_to_fill =
3363 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3364 return 1;
3365 }
3366 return 0;
3367}
3368
4a71df50
FB		 3369/*
3370 * Switched to packing state if the number of used buffers on a queue
3371 * reaches a certain limit.
3372 */
3373static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3374{
3375 if (!queue->do_pack) {
3376 if (atomic_read(&queue->used_buffers)
3377 >= QETH_HIGH_WATERMARK_PACK){
3378 /* switch non-PACKING -> PACKING */
847a50fd 3379 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3380 if (queue->card->options.performance_stats)
3381 queue->card->perf_stats.sc_dp_p++;
3382 queue->do_pack = 1;
3383 }
3384 }
3385}
3386
3387/*
3388 * Switches from packing to non-packing mode. If there is a packing
3389 * buffer on the queue this buffer will be prepared to be flushed.
3390 * In that case 1 is returned to inform the caller. If no buffer
3391 * has to be flushed, zero is returned.
3392 */
3393static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3394{
4a71df50
FB		 3395 if (queue->do_pack) {
3396 if (atomic_read(&queue->used_buffers)
3397 <= QETH_LOW_WATERMARK_PACK) {
3398 /* switch PACKING -> non-PACKING */
847a50fd 3399 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3400 if (queue->card->options.performance_stats)
3401 queue->card->perf_stats.sc_p_dp++;
3402 queue->do_pack = 0;
664e42ac 3403 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3404 }
3405 }
4a71df50
FB		 3406 return 0;
3407}
3408
779e6e1c
JG		 3409static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3410 int count)
4a71df50
FB		 3411{
3412 struct qeth_qdio_out_buffer *buf;
3413 int rc;
3414 int i;
3415 unsigned int qdio_flags;
3416
4a71df50 3417 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3418 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3419 buf = queue->bufs[bidx];
3ec90878
JG		 3420 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3421 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3422
0da9581d
EL		 3423 if (queue->bufstates)
3424 queue->bufstates[bidx].user = buf;
3425
4a71df50
FB		 3426 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3427 continue;
3428
3429 if (!queue->do_pack) {
3430 if ((atomic_read(&queue->used_buffers) >=
3431 (QETH_HIGH_WATERMARK_PACK -
3432 QETH_WATERMARK_PACK_FUZZ)) &&
3433 !atomic_read(&queue->set_pci_flags_count)) {
3434 /* it's likely that we'll go to packing
3435 * mode soon */
3436 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3437 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3438 }
3439 } else {
3440 if (!atomic_read(&queue->set_pci_flags_count)) {
3441 /*
3442 * there's no outstanding PCI any more, so we
3443 * have to request a PCI to be sure the the PCI
3444 * will wake at some time in the future then we
3445 * can flush packed buffers that might still be
3446 * hanging around, which can happen if no
3447 * further send was requested by the stack
3448 */
3449 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3450 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3451 }
3452 }
3453 }
3454
3e66bab3 3455 netif_trans_update(queue->card->dev);
4a71df50
FB		 3456 if (queue->card->options.performance_stats) {
3457 queue->card->perf_stats.outbound_do_qdio_cnt++;
3458 queue->card->perf_stats.outbound_do_qdio_start_time =
3459 qeth_get_micros();
3460 }
3461 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3462 if (atomic_read(&queue->set_pci_flags_count))
3463 qdio_flags |= QDIO_FLAG_PCI_OUT;
3464 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3465 queue->queue_no, index, count);
4a71df50
FB		 3466 if (queue->card->options.performance_stats)
3467 queue->card->perf_stats.outbound_do_qdio_time +=
3468 qeth_get_micros() -
3469 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3470 atomic_add(count, &queue->used_buffers);
4a71df50 3471 if (rc) {
d303b6fd
JG		 3472 queue->card->stats.tx_errors += count;
3473 /* ignore temporary SIGA errors without busy condition */
1549d13f 3474 if (rc == -ENOBUFS)
d303b6fd 3475 return;
847a50fd 3476 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3477 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3478 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3479 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3480 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3481
4a71df50
FB		 3482 /* this must not happen under normal circumstances. if it
3483 * happens something is really wrong -> recover */
3484 qeth_schedule_recovery(queue->card);
3485 return;
3486 }
4a71df50
FB		 3487 if (queue->card->options.performance_stats)
3488 queue->card->perf_stats.bufs_sent += count;
3489}
3490
3491static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3492{
3493 int index;
3494 int flush_cnt = 0;
3495 int q_was_packing = 0;
3496
3497 /*
3498 * check if weed have to switch to non-packing mode or if
3499 * we have to get a pci flag out on the queue
3500 */
3501 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3502 !atomic_read(&queue->set_pci_flags_count)) {
3503 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3504 QETH_OUT_Q_UNLOCKED) {
3505 /*
3506 * If we get in here, there was no action in
3507 * do_send_packet. So, we check if there is a
3508 * packing buffer to be flushed here.
3509 */
3510 netif_stop_queue(queue->card->dev);
3511 index = queue->next_buf_to_fill;
3512 q_was_packing = queue->do_pack;
3513 /* queue->do_pack may change */
3514 barrier();
3515 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3516 if (!flush_cnt &&
3517 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3518 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3519 if (queue->card->options.performance_stats &&
3520 q_was_packing)
3521 queue->card->perf_stats.bufs_sent_pack +=
3522 flush_cnt;
3523 if (flush_cnt)
779e6e1c 3524 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3525 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3526 }
3527 }
3528}
3529
a1c3ed4c
FB		 3530void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3531 unsigned long card_ptr)
3532{
3533 struct qeth_card *card = (struct qeth_card *)card_ptr;
3534
0cffef48 3535 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3536 napi_schedule(&card->napi);
3537}
3538EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3539
0da9581d
EL		 3540int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3541{
3542 int rc;
3543
3544 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3545 rc = -1;
3546 goto out;
3547 } else {
3548 if (card->options.cq == cq) {
3549 rc = 0;
3550 goto out;
3551 }
3552
3553 if (card->state != CARD_STATE_DOWN &&
3554 card->state != CARD_STATE_RECOVER) {
3555 rc = -1;
3556 goto out;
3557 }
3558
3559 qeth_free_qdio_buffers(card);
3560 card->options.cq = cq;
3561 rc = 0;
3562 }
3563out:
3564 return rc;
3565
3566}
3567EXPORT_SYMBOL_GPL(qeth_configure_cq);
3568
3569
3570static void qeth_qdio_cq_handler(struct qeth_card *card,
3571 unsigned int qdio_err,
3572 unsigned int queue, int first_element, int count) {
3573 struct qeth_qdio_q *cq = card->qdio.c_q;
3574 int i;
3575 int rc;
3576
3577 if (!qeth_is_cq(card, queue))
3578 goto out;
3579
3580 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3581 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3582 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3583
3584 if (qdio_err) {
3585 netif_stop_queue(card->dev);
3586 qeth_schedule_recovery(card);
3587 goto out;
3588 }
3589
3590 if (card->options.performance_stats) {
3591 card->perf_stats.cq_cnt++;
3592 card->perf_stats.cq_start_time = qeth_get_micros();
3593 }
3594
3595 for (i = first_element; i < first_element + count; ++i) {
3596 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3597 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3598 int e;
3599
3600 e = 0;
903e4853
UB		 3601 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3602 buffer->element[e].addr) {
0da9581d
EL		 3603 unsigned long phys_aob_addr;
3604
3605 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3606 qeth_qdio_handle_aob(card, phys_aob_addr);
3607 buffer->element[e].addr = NULL;
3608 buffer->element[e].eflags = 0;
3609 buffer->element[e].sflags = 0;
3610 buffer->element[e].length = 0;
3611
3612 ++e;
3613 }
3614
3615 buffer->element[15].eflags = 0;
3616 buffer->element[15].sflags = 0;
3617 }
3618 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3619 card->qdio.c_q->next_buf_to_init,
3620 count);
3621 if (rc) {
3622 dev_warn(&card->gdev->dev,
3623 "QDIO reported an error, rc=%i\n", rc);
3624 QETH_CARD_TEXT(card, 2, "qcqherr");
3625 }
3626 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3627 + count) % QDIO_MAX_BUFFERS_PER_Q;
3628
3629 netif_wake_queue(card->dev);
3630
3631 if (card->options.performance_stats) {
3632 int delta_t = qeth_get_micros();
3633 delta_t -= card->perf_stats.cq_start_time;
3634 card->perf_stats.cq_time += delta_t;
3635 }
3636out:
3637 return;
3638}
3639
a1c3ed4c 3640void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3641 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3642 unsigned long card_ptr)
3643{
3644 struct qeth_card *card = (struct qeth_card *)card_ptr;
3645
0da9581d
EL		 3646 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3647 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3648
3649 if (qeth_is_cq(card, queue))
3650 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3651 else if (qdio_err)
a1c3ed4c 3652 qeth_schedule_recovery(card);
0da9581d
EL		 3653
3654
a1c3ed4c
FB		 3655}
3656EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3657
779e6e1c
JG		 3658void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3659 unsigned int qdio_error, int __queue, int first_element,
3660 int count, unsigned long card_ptr)
4a71df50
FB		 3661{
3662 struct qeth_card *card = (struct qeth_card *) card_ptr;
3663 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3664 struct qeth_qdio_out_buffer *buffer;
3665 int i;
3666
847a50fd 3667 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3668 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3669 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3670 netif_stop_queue(card->dev);
3671 qeth_schedule_recovery(card);
3672 return;
4a71df50
FB		 3673 }
3674 if (card->options.performance_stats) {
3675 card->perf_stats.outbound_handler_cnt++;
3676 card->perf_stats.outbound_handler_start_time =
3677 qeth_get_micros();
3678 }
3679 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3680 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3681 buffer = queue->bufs[bidx];
b67d801f 3682 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3683
3684 if (queue->bufstates &&
3685 (queue->bufstates[bidx].flags &
3686 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3687 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3688
3689 if (atomic_cmpxchg(&buffer->state,
3690 QETH_QDIO_BUF_PRIMED,
3691 QETH_QDIO_BUF_PENDING) ==
3692 QETH_QDIO_BUF_PRIMED) {
3693 qeth_notify_skbs(queue, buffer,
3694 TX_NOTIFY_PENDING);
3695 }
0da9581d
EL		 3696 buffer->aob = queue->bufstates[bidx].aob;
3697 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3698 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3699 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3700 virt_to_phys(buffer->aob));
b3332930
FB		 3701 if (qeth_init_qdio_out_buf(queue, bidx)) {
3702 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3703 qeth_schedule_recovery(card);
b3332930 3704 }
0da9581d 3705 } else {
b3332930
FB		 3706 if (card->options.cq == QETH_CQ_ENABLED) {
3707 enum iucv_tx_notify n;
3708
3709 n = qeth_compute_cq_notification(
3710 buffer->buffer->element[15].sflags, 0);
3711 qeth_notify_skbs(queue, buffer, n);
3712 }
3713
0da9581d
EL		 3714 qeth_clear_output_buffer(queue, buffer,
3715 QETH_QDIO_BUF_EMPTY);
3716 }
3717 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3718 }
3719 atomic_sub(count, &queue->used_buffers);
3720 /* check if we need to do something on this outbound queue */
3721 if (card->info.type != QETH_CARD_TYPE_IQD)
3722 qeth_check_outbound_queue(queue);
3723
3724 netif_wake_queue(queue->card->dev);
3725 if (card->options.performance_stats)
3726 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3727 card->perf_stats.outbound_handler_start_time;
3728}
3729EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3730
70deb016
HW		 3731/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3732static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3733{
3734 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3735 return 2;
3736 return queue_num;
3737}
3738
290b8348
SR		 3739/**
3740 * Note: Function assumes that we have 4 outbound queues.
3741 */
4a71df50
FB		 3742int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3743 int ipv, int cast_type)
3744{
d66cb37e 3745 __be16 *tci;
290b8348
SR		 3746 u8 tos;
3747
290b8348
SR		 3748 if (cast_type && card->info.is_multicast_different)
3749 return card->info.is_multicast_different &
3750 (card->qdio.no_out_queues - 1);
3751
3752 switch (card->qdio.do_prio_queueing) {
3753 case QETH_PRIO_Q_ING_TOS:
3754 case QETH_PRIO_Q_ING_PREC:
3755 switch (ipv) {
3756 case 4:
3757 tos = ipv4_get_dsfield(ip_hdr(skb));
3758 break;
3759 case 6:
3760 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3761 break;
3762 default:
3763 return card->qdio.default_out_queue;
4a71df50 3764 }
290b8348 3765 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3766 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3767 if (tos & IPTOS_MINCOST)
70deb016 3768 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3769 if (tos & IPTOS_RELIABILITY)
3770 return 2;
3771 if (tos & IPTOS_THROUGHPUT)
3772 return 1;
3773 if (tos & IPTOS_LOWDELAY)
3774 return 0;
d66cb37e
SR		 3775 break;
3776 case QETH_PRIO_Q_ING_SKB:
3777 if (skb->priority > 5)
3778 return 0;
70deb016 3779 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3780 case QETH_PRIO_Q_ING_VLAN:
3781 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3782 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3783 return qeth_cut_iqd_prio(card,
3784 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3785 break;
4a71df50 3786 default:
290b8348 3787 break;
4a71df50 3788 }
290b8348 3789 return card->qdio.default_out_queue;
4a71df50
FB		 3790}
3791EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3792
2863c613
EC		 3793/**
3794 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3795 * @skb: SKB address
3796 *
3797 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3798 * fragmented part of the SKB. Returns zero for linear SKB.
3799 */
271648b4
FB		 3800int qeth_get_elements_for_frags(struct sk_buff *skb)
3801{
2863c613 3802 int cnt, elements = 0;
271648b4
FB		 3803
3804 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3805 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3806
3807 elements += qeth_get_elements_for_range(
3808 (addr_t)skb_frag_address(frag),
3809 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3810 }
3811 return elements;
3812}
3813EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3814
2863c613
EC		 3815/**
3816 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3817 * @card: qeth card structure, to check max. elems.
3818 * @skb: SKB address
3819 * @extra_elems: extra elems needed, to check against max.
7d969d2e 3820 * @data_offset: range starts at skb->data + data_offset
2863c613
EC		 3821 *
3822 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3823 * skb data, including linear part and fragments. Checks if the result plus
3824 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3825 * Note: extra_elems is not included in the returned result.
3826 */
065cc782 3827int qeth_get_elements_no(struct qeth_card *card,
7d969d2e 3828 struct sk_buff *skb, int extra_elems, int data_offset)
4a71df50 3829{
2863c613 3830 int elements = qeth_get_elements_for_range(
7d969d2e 3831 (addr_t)skb->data + data_offset,
2863c613
EC		 3832 (addr_t)skb->data + skb_headlen(skb)) +
3833 qeth_get_elements_for_frags(skb);
4a71df50 3834
2863c613 3835 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3836 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3837 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3838 elements + extra_elems, skb->len);
4a71df50
FB		 3839 return 0;
3840 }
2863c613 3841 return elements;
4a71df50
FB		 3842}
3843EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3844
d4ae1f5e 3845int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3846{
3847 int hroom, inpage, rest;
3848
3849 if (((unsigned long)skb->data & PAGE_MASK) !=
3850 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3851 hroom = skb_headroom(skb);
3852 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3853 rest = len - inpage;
3854 if (rest > hroom)
3855 return 1;
2863c613 3856 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3857 skb->data -= rest;
d4ae1f5e
SR		 3858 skb->tail -= rest;
3859 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3860 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3861 }
3862 return 0;
3863}
3864EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3865
0d6f02d3
JW		 3866/**
3867 * qeth_push_hdr() - push a qeth_hdr onto an skb.
3868 * @skb: skb that the qeth_hdr should be pushed onto.
3869 * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
3870 * it contains a valid pointer to a qeth_hdr.
3871 * @len: length of the hdr that needs to be pushed on.
3872 *
3873 * Returns the pushed length. If the header can't be pushed on
3874 * (eg. because it would cross a page boundary), it is allocated from
3875 * the cache instead and 0 is returned.
3876 * Error to create the hdr is indicated by returning with < 0.
3877 */
3878int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len)
3879{
3880 if (skb_headroom(skb) >= len &&
3881 qeth_get_elements_for_range((addr_t)skb->data - len,
3882 (addr_t)skb->data) == 1) {
3883 *hdr = skb_push(skb, len);
3884 return len;
3885 }
3886 /* fall back */
3887 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3888 if (!*hdr)
3889 return -ENOMEM;
3890 return 0;
3891}
3892EXPORT_SYMBOL_GPL(qeth_push_hdr);
3893
cef6ff22
JW		 3894static void __qeth_fill_buffer(struct sk_buff *skb,
3895 struct qeth_qdio_out_buffer *buf,
3896 bool is_first_elem, unsigned int offset)
4a71df50 3897{
384d2ef1
JW		 3898 struct qdio_buffer *buffer = buf->buffer;
3899 int element = buf->next_element_to_fill;
cc309f83
JW		 3900 int length = skb_headlen(skb) - offset;
3901 char *data = skb->data + offset;
384d2ef1 3902 int length_here, cnt;
4a71df50 3903
cc309f83 3904 /* map linear part into buffer element(s) */
4a71df50
FB		 3905 while (length > 0) {
3906 /* length_here is the remaining amount of data in this page */
3907 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3908 if (length < length_here)
3909 length_here = length;
3910
3911 buffer->element[element].addr = data;
3912 buffer->element[element].length = length_here;
3913 length -= length_here;
384d2ef1
JW		 3914 if (is_first_elem) {
3915 is_first_elem = false;
5258830b
JW		 3916 if (length || skb_is_nonlinear(skb))
3917 /* skb needs additional elements */
3ec90878 3918 buffer->element[element].eflags =
5258830b 3919 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3920 else
5258830b
JW		 3921 buffer->element[element].eflags = 0;
3922 } else {
3923 buffer->element[element].eflags =
3924 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3925 }
3926 data += length_here;
3927 element++;
4a71df50 3928 }
51aa165c 3929
cc309f83 3930 /* map page frags into buffer element(s) */
51aa165c 3931 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3932 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3933
3934 data = skb_frag_address(frag);
3935 length = skb_frag_size(frag);
271648b4
FB		 3936 while (length > 0) {
3937 length_here = PAGE_SIZE -
3938 ((unsigned long) data % PAGE_SIZE);
3939 if (length < length_here)
3940 length_here = length;
3941
3942 buffer->element[element].addr = data;
3943 buffer->element[element].length = length_here;
3944 buffer->element[element].eflags =
3945 SBAL_EFLAGS_MIDDLE_FRAG;
3946 length -= length_here;
3947 data += length_here;
3948 element++;
3949 }
51aa165c
FB		 3950 }
3951
3ec90878
JG		 3952 if (buffer->element[element - 1].eflags)
3953 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 3954 buf->next_element_to_fill = element;
4a71df50
FB		 3955}
3956
eaf3cc08
JW		 3957/**
3958 * qeth_fill_buffer() - map skb into an output buffer
3959 * @queue: QDIO queue to submit the buffer on
3960 * @buf: buffer to transport the skb
3961 * @skb: skb to map into the buffer
3962 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
3963 * from qeth_core_header_cache.
3964 * @offset: when mapping the skb, start at skb->data + offset
3965 * @hd_len: if > 0, build a dedicated header element of this size
3966 */
cef6ff22
JW		 3967static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3968 struct qeth_qdio_out_buffer *buf,
3969 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 3970 unsigned int offset, unsigned int hd_len)
4a71df50 3971{
eaf3cc08 3972 struct qdio_buffer *buffer = buf->buffer;
384d2ef1 3973 bool is_first_elem = true;
13ddacb5 3974 int flush_cnt = 0;
4a71df50 3975
63354797 3976 refcount_inc(&skb->users);
4a71df50
FB		 3977 skb_queue_tail(&buf->skb_list, skb);
3978
eaf3cc08
JW		 3979 /* build dedicated header element */
3980 if (hd_len) {
683d718a 3981 int element = buf->next_element_to_fill;
384d2ef1
JW		 3982 is_first_elem = false;
3983
683d718a 3984 buffer->element[element].addr = hdr;
f1588177 3985 buffer->element[element].length = hd_len;
3ec90878 3986 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
eaf3cc08
JW		 3987 /* remember to free cache-allocated qeth_hdr: */
3988 buf->is_header[element] = ((void *)hdr != skb->data);
683d718a
FB		 3989 buf->next_element_to_fill++;
3990 }
3991
384d2ef1 3992 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 3993
3994 if (!queue->do_pack) {
847a50fd 3995 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3996 /* set state to PRIMED -> will be flushed */
3997 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3998 flush_cnt = 1;
3999 } else {
847a50fd 4000 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4001 if (queue->card->options.performance_stats)
4002 queue->card->perf_stats.skbs_sent_pack++;
4003 if (buf->next_element_to_fill >=
4004 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4005 /*
4006 * packed buffer if full -> set state PRIMED
4007 * -> will be flushed
4008 */
4009 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4010 flush_cnt = 1;
4011 }
4012 }
4013 return flush_cnt;
4014}
4015
7c2e9ba3 4016int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
cc309f83 4017 struct qeth_hdr *hdr, unsigned int offset,
13ddacb5 4018 unsigned int hd_len)
4a71df50 4019{
7c2e9ba3
JW		 4020 int index = queue->next_buf_to_fill;
4021 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4a71df50 4022
4a71df50
FB		 4023 /*
4024 * check if buffer is empty to make sure that we do not 'overtake'
4025 * ourselves and try to fill a buffer that is already primed
4026 */
4027 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
7c2e9ba3
JW		 4028 return -EBUSY;
4029 queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
64ef8957
FB		 4030 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4031 qeth_flush_buffers(queue, index, 1);
4a71df50 4032 return 0;
4a71df50
FB		 4033}
4034EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4035
4036int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 4037 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 4038 unsigned int offset, unsigned int hd_len,
4039 int elements_needed)
4a71df50
FB		 4040{
4041 struct qeth_qdio_out_buffer *buffer;
4042 int start_index;
4043 int flush_count = 0;
4044 int do_pack = 0;
4045 int tmp;
4046 int rc = 0;
4047
4a71df50
FB		 4048 /* spin until we get the queue ... */
4049 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4050 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4051 start_index = queue->next_buf_to_fill;
0da9581d 4052 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4053 /*
4054 * check if buffer is empty to make sure that we do not 'overtake'
4055 * ourselves and try to fill a buffer that is already primed
4056 */
4057 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4058 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4059 return -EBUSY;
4060 }
4061 /* check if we need to switch packing state of this queue */
4062 qeth_switch_to_packing_if_needed(queue);
4063 if (queue->do_pack) {
4064 do_pack = 1;
64ef8957
FB		 4065 /* does packet fit in current buffer? */
4066 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4067 buffer->next_element_to_fill) < elements_needed) {
4068 /* ... no -> set state PRIMED */
4069 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4070 flush_count++;
4071 queue->next_buf_to_fill =
4072 (queue->next_buf_to_fill + 1) %
4073 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4074 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4075 /* we did a step forward, so check buffer state
4076 * again */
4077 if (atomic_read(&buffer->state) !=
4078 QETH_QDIO_BUF_EMPTY) {
4079 qeth_flush_buffers(queue, start_index,
779e6e1c 4080 flush_count);
64ef8957 4081 atomic_set(&queue->state,
4a71df50 4082 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4083 rc = -EBUSY;
4084 goto out;
4a71df50
FB		 4085 }
4086 }
4087 }
9c3bfda9 4088 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4a71df50
FB		 4089 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4090 QDIO_MAX_BUFFERS_PER_Q;
4091 flush_count += tmp;
4a71df50 4092 if (flush_count)
779e6e1c 4093 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4094 else if (!atomic_read(&queue->set_pci_flags_count))
4095 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4096 /*
4097 * queue->state will go from LOCKED -> UNLOCKED or from
4098 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4099 * (switch packing state or flush buffer to get another pci flag out).
4100 * In that case we will enter this loop
4101 */
4102 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4103 start_index = queue->next_buf_to_fill;
4104 /* check if we can go back to non-packing state */
3cdc8a25 4105 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4106 /*
4107 * check if we need to flush a packing buffer to get a pci
4108 * flag out on the queue
4109 */
3cdc8a25
JW		 4110 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4111 tmp = qeth_prep_flush_pack_buffer(queue);
4112 if (tmp) {
4113 qeth_flush_buffers(queue, start_index, tmp);
4114 flush_count += tmp;
4115 }
4a71df50 4116 }
3cdc8a25 4117out:
4a71df50
FB		 4118 /* at this point the queue is UNLOCKED again */
4119 if (queue->card->options.performance_stats && do_pack)
4120 queue->card->perf_stats.bufs_sent_pack += flush_count;
4121
4122 return rc;
4123}
4124EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4125
4126static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4127 struct qeth_reply *reply, unsigned long data)
4128{
4129 struct qeth_ipa_cmd *cmd;
4130 struct qeth_ipacmd_setadpparms *setparms;
4131
847a50fd 4132 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4133
4134 cmd = (struct qeth_ipa_cmd *) data;
4135 setparms = &(cmd->data.setadapterparms);
4136
4137 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4138 if (cmd->hdr.return_code) {
8a593148 4139 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4140 setparms->data.mode = SET_PROMISC_MODE_OFF;
4141 }
4142 card->info.promisc_mode = setparms->data.mode;
4143 return 0;
4144}
4145
4146void qeth_setadp_promisc_mode(struct qeth_card *card)
4147{
4148 enum qeth_ipa_promisc_modes mode;
4149 struct net_device *dev = card->dev;
4150 struct qeth_cmd_buffer *iob;
4151 struct qeth_ipa_cmd *cmd;
4152
847a50fd 4153 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4154
4155 if (((dev->flags & IFF_PROMISC) &&
4156 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4157 (!(dev->flags & IFF_PROMISC) &&
4158 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4159 return;
4160 mode = SET_PROMISC_MODE_OFF;
4161 if (dev->flags & IFF_PROMISC)
4162 mode = SET_PROMISC_MODE_ON;
847a50fd 4163 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4164
4165 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4166 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4167 if (!iob)
4168 return;
4a71df50
FB		 4169 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4170 cmd->data.setadapterparms.data.mode = mode;
4171 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4172}
4173EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4174
4175int qeth_change_mtu(struct net_device *dev, int new_mtu)
4176{
4177 struct qeth_card *card;
4178 char dbf_text[15];
4179
509e2562 4180 card = dev->ml_priv;
4a71df50 4181
847a50fd 4182 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4183 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4184 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50 4185
4845b93f 4186 if (!qeth_mtu_is_valid(card, new_mtu))
4a71df50
FB		 4187 return -EINVAL;
4188 dev->mtu = new_mtu;
4189 return 0;
4190}
4191EXPORT_SYMBOL_GPL(qeth_change_mtu);
4192
4193struct net_device_stats *qeth_get_stats(struct net_device *dev)
4194{
4195 struct qeth_card *card;
4196
509e2562 4197 card = dev->ml_priv;
4a71df50 4198
847a50fd 4199 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4200
4201 return &card->stats;
4202}
4203EXPORT_SYMBOL_GPL(qeth_get_stats);
4204
4205static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4206 struct qeth_reply *reply, unsigned long data)
4207{
4208 struct qeth_ipa_cmd *cmd;
4209
847a50fd 4210 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4211
4212 cmd = (struct qeth_ipa_cmd *) data;
4213 if (!card->options.layer2 ||
4214 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4215 memcpy(card->dev->dev_addr,
4216 &cmd->data.setadapterparms.data.change_addr.addr,
4217 OSA_ADDR_LEN);
4218 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4219 }
4220 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4221 return 0;
4222}
4223
4224int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4225{
4226 int rc;
4227 struct qeth_cmd_buffer *iob;
4228 struct qeth_ipa_cmd *cmd;
4229
847a50fd 4230 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4231
4232 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4233 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4234 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4235 if (!iob)
4236 return -ENOMEM;
4a71df50
FB		 4237 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4238 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4239 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4240 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4241 card->dev->dev_addr, OSA_ADDR_LEN);
4242 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4243 NULL);
4244 return rc;
4245}
4246EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4247
d64ecc22
EL		 4248static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4249 struct qeth_reply *reply, unsigned long data)
4250{
4251 struct qeth_ipa_cmd *cmd;
4252 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4253 int fallback = *(int *)reply->param;
d64ecc22 4254
847a50fd 4255 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4256
4257 cmd = (struct qeth_ipa_cmd *) data;
4258 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4259 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4260 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4261 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4262 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4263 if (cmd->data.setadapterparms.hdr.return_code !=
4264 SET_ACCESS_CTRL_RC_SUCCESS)
4265 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4266 card->gdev->dev.kobj.name,
4267 access_ctrl_req->subcmd_code,
4268 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4269 switch (cmd->data.setadapterparms.hdr.return_code) {
4270 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4271 if (card->options.isolation == ISOLATION_MODE_NONE) {
4272 dev_info(&card->gdev->dev,
4273 "QDIO data connection isolation is deactivated\n");
4274 } else {
4275 dev_info(&card->gdev->dev,
4276 "QDIO data connection isolation is activated\n");
4277 }
d64ecc22 4278 break;
0f54761d
SR		 4279 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4280 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4281 "deactivated\n", dev_name(&card->gdev->dev));
4282 if (fallback)
4283 card->options.isolation = card->options.prev_isolation;
4284 break;
4285 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4286 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4287 " activated\n", dev_name(&card->gdev->dev));
4288 if (fallback)
4289 card->options.isolation = card->options.prev_isolation;
4290 break;
d64ecc22 4291 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4292 dev_err(&card->gdev->dev, "Adapter does not "
4293 "support QDIO data connection isolation\n");
d64ecc22 4294 break;
d64ecc22 4295 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4296 dev_err(&card->gdev->dev,
4297 "Adapter is dedicated. "
4298 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4299 if (fallback)
4300 card->options.isolation = card->options.prev_isolation;
d64ecc22 4301 break;
d64ecc22 4302 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4303 dev_err(&card->gdev->dev,
4304 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4305 if (fallback)
4306 card->options.isolation = card->options.prev_isolation;
4307 break;
4308 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4309 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4310 "support reflective relay mode\n");
4311 if (fallback)
4312 card->options.isolation = card->options.prev_isolation;
4313 break;
4314 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4315 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4316 "enabled at the adjacent switch port");
4317 if (fallback)
4318 card->options.isolation = card->options.prev_isolation;
4319 break;
4320 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4321 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4322 "at the adjacent switch failed\n");
d64ecc22 4323 break;
d64ecc22 4324 default:
d64ecc22 4325 /* this should never happen */
0f54761d
SR		 4326 if (fallback)
4327 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4328 break;
4329 }
d64ecc22 4330 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4331 return 0;
d64ecc22
EL		 4332}
4333
4334static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4335 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4336{
4337 int rc;
4338 struct qeth_cmd_buffer *iob;
4339 struct qeth_ipa_cmd *cmd;
4340 struct qeth_set_access_ctrl *access_ctrl_req;
4341
847a50fd 4342 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4343
4344 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4345 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4346
4347 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4348 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4349 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4350 if (!iob)
4351 return -ENOMEM;
d64ecc22
EL		 4352 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4353 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4354 access_ctrl_req->subcmd_code = isolation;
4355
4356 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4357 &fallback);
d64ecc22
EL		 4358 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4359 return rc;
4360}
4361
0f54761d 4362int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4363{
4364 int rc = 0;
4365
847a50fd 4366 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4367
5113fec0
UB		 4368 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4369 card->info.type == QETH_CARD_TYPE_OSX) &&
4370 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4371 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4372 card->options.isolation, fallback);
d64ecc22
EL		 4373 if (rc) {
4374 QETH_DBF_MESSAGE(3,
5113fec0 4375 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4376 card->gdev->dev.kobj.name,
4377 rc);
0f54761d 4378 rc = -EOPNOTSUPP;
d64ecc22
EL		 4379 }
4380 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4381 card->options.isolation = ISOLATION_MODE_NONE;
4382
4383 dev_err(&card->gdev->dev, "Adapter does not "
4384 "support QDIO data connection isolation\n");
4385 rc = -EOPNOTSUPP;
4386 }
4387 return rc;
4388}
4389EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4390
4a71df50
FB		 4391void qeth_tx_timeout(struct net_device *dev)
4392{
4393 struct qeth_card *card;
4394
509e2562 4395 card = dev->ml_priv;
847a50fd 4396 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4397 card->stats.tx_errors++;
4398 qeth_schedule_recovery(card);
4399}
4400EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4401
942d6984 4402static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4403{
509e2562 4404 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4405 int rc = 0;
4406
4407 switch (regnum) {
4408 case MII_BMCR: /* Basic mode control register */
4409 rc = BMCR_FULLDPLX;
4410 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4411 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4412 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4413 rc |= BMCR_SPEED100;
4414 break;
4415 case MII_BMSR: /* Basic mode status register */
4416 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4417 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4418 BMSR_100BASE4;
4419 break;
4420 case MII_PHYSID1: /* PHYS ID 1 */
4421 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4422 dev->dev_addr[2];
4423 rc = (rc >> 5) & 0xFFFF;
4424 break;
4425 case MII_PHYSID2: /* PHYS ID 2 */
4426 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4427 break;
4428 case MII_ADVERTISE: /* Advertisement control reg */
4429 rc = ADVERTISE_ALL;
4430 break;
4431 case MII_LPA: /* Link partner ability reg */
4432 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4433 LPA_100BASE4 | LPA_LPACK;
4434 break;
4435 case MII_EXPANSION: /* Expansion register */
4436 break;
4437 case MII_DCOUNTER: /* disconnect counter */
4438 break;
4439 case MII_FCSCOUNTER: /* false carrier counter */
4440 break;
4441 case MII_NWAYTEST: /* N-way auto-neg test register */
4442 break;
4443 case MII_RERRCOUNTER: /* rx error counter */
4444 rc = card->stats.rx_errors;
4445 break;
4446 case MII_SREVISION: /* silicon revision */
4447 break;
4448 case MII_RESV1: /* reserved 1 */
4449 break;
4450 case MII_LBRERROR: /* loopback, rx, bypass error */
4451 break;
4452 case MII_PHYADDR: /* physical address */
4453 break;
4454 case MII_RESV2: /* reserved 2 */
4455 break;
4456 case MII_TPISTATUS: /* TPI status for 10mbps */
4457 break;
4458 case MII_NCONFIG: /* network interface config */
4459 break;
4460 default:
4461 break;
4462 }
4463 return rc;
4464}
4a71df50
FB		 4465
4466static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4467 struct qeth_cmd_buffer *iob, int len,
4468 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4469 unsigned long),
4470 void *reply_param)
4471{
4472 u16 s1, s2;
4473
847a50fd 4474 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4475
4476 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4477 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4478 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4479 /* adjust PDU length fields in IPA_PDU_HEADER */
4480 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4481 s2 = (u32) len;
4482 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4483 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4484 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4485 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4486 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4487 reply_cb, reply_param);
4488}
4489
4490static int qeth_snmp_command_cb(struct qeth_card *card,
4491 struct qeth_reply *reply, unsigned long sdata)
4492{
4493 struct qeth_ipa_cmd *cmd;
4494 struct qeth_arp_query_info *qinfo;
4495 struct qeth_snmp_cmd *snmp;
4496 unsigned char *data;
4497 __u16 data_len;
4498
847a50fd 4499 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4500
4501 cmd = (struct qeth_ipa_cmd *) sdata;
4502 data = (unsigned char *)((char *)cmd - reply->offset);
4503 qinfo = (struct qeth_arp_query_info *) reply->param;
4504 snmp = &cmd->data.setadapterparms.data.snmp;
4505
4506 if (cmd->hdr.return_code) {
8a593148 4507 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4508 return 0;
4509 }
4510 if (cmd->data.setadapterparms.hdr.return_code) {
4511 cmd->hdr.return_code =
4512 cmd->data.setadapterparms.hdr.return_code;
8a593148 4513 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4514 return 0;
4515 }
4516 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4517 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4518 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4519 else
4520 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4521
4522 /* check if there is enough room in userspace */
4523 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4524 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4525 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4526 return 0;
4527 }
847a50fd 4528 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4529 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4530 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4531 cmd->data.setadapterparms.hdr.seq_no);
4532 /*copy entries to user buffer*/
4533 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4534 memcpy(qinfo->udata + qinfo->udata_offset,
4535 (char *)snmp,
4536 data_len + offsetof(struct qeth_snmp_cmd, data));
4537 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4538 } else {
4539 memcpy(qinfo->udata + qinfo->udata_offset,
4540 (char *)&snmp->request, data_len);
4541 }
4542 qinfo->udata_offset += data_len;
4543 /* check if all replies received ... */
847a50fd 4544 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4545 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4546 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4547 cmd->data.setadapterparms.hdr.seq_no);
4548 if (cmd->data.setadapterparms.hdr.seq_no <
4549 cmd->data.setadapterparms.hdr.used_total)
4550 return 1;
4551 return 0;
4552}
4553
942d6984 4554static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4555{
4556 struct qeth_cmd_buffer *iob;
4557 struct qeth_ipa_cmd *cmd;
4558 struct qeth_snmp_ureq *ureq;
6fb392b1 4559 unsigned int req_len;
4a71df50
FB		 4560 struct qeth_arp_query_info qinfo = {0, };
4561 int rc = 0;
4562
847a50fd 4563 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4564
4565 if (card->info.guestlan)
4566 return -EOPNOTSUPP;
4567
4568 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4569 (!card->options.layer2)) {
4a71df50
FB		 4570 return -EOPNOTSUPP;
4571 }
4572 /* skip 4 bytes (data_len struct member) to get req_len */
4573 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4574 return -EFAULT;
6fb392b1
UB		 4575 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4576 sizeof(struct qeth_ipacmd_hdr) -
4577 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4578 return -EINVAL;
4986f3f0
JL		 4579 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4580 if (IS_ERR(ureq)) {
847a50fd 4581 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4582 return PTR_ERR(ureq);
4a71df50
FB		 4583 }
4584 qinfo.udata_len = ureq->hdr.data_len;
4585 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4586 if (!qinfo.udata) {
4587 kfree(ureq);
4588 return -ENOMEM;
4589 }
4590 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4591
4592 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4593 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4594 if (!iob) {
4595 rc = -ENOMEM;
4596 goto out;
4597 }
4a71df50
FB		 4598 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4599 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4600 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4601 qeth_snmp_command_cb, (void *)&qinfo);
4602 if (rc)
14cc21b6 4603 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4604 QETH_CARD_IFNAME(card), rc);
4605 else {
4606 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4607 rc = -EFAULT;
4608 }
1aec42bc 4609out:
4a71df50
FB		 4610 kfree(ureq);
4611 kfree(qinfo.udata);
4612 return rc;
4613}
4a71df50 4614
c3ab96f3
FB		 4615static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4616 struct qeth_reply *reply, unsigned long data)
4617{
4618 struct qeth_ipa_cmd *cmd;
4619 struct qeth_qoat_priv *priv;
4620 char *resdata;
4621 int resdatalen;
4622
4623 QETH_CARD_TEXT(card, 3, "qoatcb");
4624
4625 cmd = (struct qeth_ipa_cmd *)data;
4626 priv = (struct qeth_qoat_priv *)reply->param;
4627 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4628 resdata = (char *)data + 28;
4629
4630 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4631 cmd->hdr.return_code = IPA_RC_FFFF;
4632 return 0;
4633 }
4634
4635 memcpy((priv->buffer + priv->response_len), resdata,
4636 resdatalen);
4637 priv->response_len += resdatalen;
4638
4639 if (cmd->data.setadapterparms.hdr.seq_no <
4640 cmd->data.setadapterparms.hdr.used_total)
4641 return 1;
4642 return 0;
4643}
4644
942d6984 4645static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4646{
4647 int rc = 0;
4648 struct qeth_cmd_buffer *iob;
4649 struct qeth_ipa_cmd *cmd;
4650 struct qeth_query_oat *oat_req;
4651 struct qeth_query_oat_data oat_data;
4652 struct qeth_qoat_priv priv;
4653 void __user *tmp;
4654
4655 QETH_CARD_TEXT(card, 3, "qoatcmd");
4656
4657 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4658 rc = -EOPNOTSUPP;
4659 goto out;
4660 }
4661
4662 if (copy_from_user(&oat_data, udata,
4663 sizeof(struct qeth_query_oat_data))) {
4664 rc = -EFAULT;
4665 goto out;
4666 }
4667
4668 priv.buffer_len = oat_data.buffer_len;
4669 priv.response_len = 0;
4670 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4671 if (!priv.buffer) {
4672 rc = -ENOMEM;
4673 goto out;
4674 }
4675
4676 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4677 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4678 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4679 if (!iob) {
4680 rc = -ENOMEM;
4681 goto out_free;
4682 }
c3ab96f3
FB		 4683 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4684 oat_req = &cmd->data.setadapterparms.data.query_oat;
4685 oat_req->subcmd_code = oat_data.command;
4686
4687 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4688 &priv);
4689 if (!rc) {
4690 if (is_compat_task())
4691 tmp = compat_ptr(oat_data.ptr);
4692 else
4693 tmp = (void __user *)(unsigned long)oat_data.ptr;
4694
4695 if (copy_to_user(tmp, priv.buffer,
4696 priv.response_len)) {
4697 rc = -EFAULT;
4698 goto out_free;
4699 }
4700
4701 oat_data.response_len = priv.response_len;
4702
4703 if (copy_to_user(udata, &oat_data,
4704 sizeof(struct qeth_query_oat_data)))
4705 rc = -EFAULT;
4706 } else
4707 if (rc == IPA_RC_FFFF)
4708 rc = -EFAULT;
4709
4710out_free:
4711 kfree(priv.buffer);
4712out:
4713 return rc;
4714}
c3ab96f3 4715
e71e4072
HC		 4716static int qeth_query_card_info_cb(struct qeth_card *card,
4717 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4718{
4719 struct qeth_ipa_cmd *cmd;
4720 struct qeth_query_card_info *card_info;
4721 struct carrier_info *carrier_info;
4722
4723 QETH_CARD_TEXT(card, 2, "qcrdincb");
4724 carrier_info = (struct carrier_info *)reply->param;
4725 cmd = (struct qeth_ipa_cmd *)data;
4726 card_info = &cmd->data.setadapterparms.data.card_info;
4727 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4728 carrier_info->card_type = card_info->card_type;
4729 carrier_info->port_mode = card_info->port_mode;
4730 carrier_info->port_speed = card_info->port_speed;
4731 }
4732
4733 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4734 return 0;
4735}
4736
bca51650 4737static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4738 struct carrier_info *carrier_info)
4739{
4740 struct qeth_cmd_buffer *iob;
4741
4742 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4743 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4744 return -EOPNOTSUPP;
4745 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4746 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4747 if (!iob)
4748 return -ENOMEM;
02d5cb5b
EC		 4749 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4750 (void *)carrier_info);
4751}
02d5cb5b 4752
ec61bd2f
JW		 4753/**
4754 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4755 * @card: pointer to a qeth_card
4756 *
4757 * Returns
4758 * 0, if a MAC address has been set for the card's netdevice
4759 * a return code, for various error conditions
4760 */
4761int qeth_vm_request_mac(struct qeth_card *card)
4762{
4763 struct diag26c_mac_resp *response;
4764 struct diag26c_mac_req *request;
4765 struct ccw_dev_id id;
4766 int rc;
4767
4768 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4769
4770 if (!card->dev)
4771 return -ENODEV;
4772
4773 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4774 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4775 if (!request || !response) {
4776 rc = -ENOMEM;
4777 goto out;
4778 }
4779
4780 ccw_device_get_id(CARD_DDEV(card), &id);
4781 request->resp_buf_len = sizeof(*response);
4782 request->resp_version = DIAG26C_VERSION2;
4783 request->op_code = DIAG26C_GET_MAC;
4784 request->devno = id.devno;
4785
4786 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
4787 if (rc)
4788 goto out;
4789
4790 if (request->resp_buf_len < sizeof(*response) ||
4791 response->version != request->resp_version) {
4792 rc = -EIO;
4793 QETH_DBF_TEXT(SETUP, 2, "badresp");
4794 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4795 sizeof(request->resp_buf_len));
4796 } else if (!is_valid_ether_addr(response->mac)) {
4797 rc = -EINVAL;
4798 QETH_DBF_TEXT(SETUP, 2, "badmac");
4799 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4800 } else {
4801 ether_addr_copy(card->dev->dev_addr, response->mac);
4802 }
4803
4804out:
4805 kfree(response);
4806 kfree(request);
4807 return rc;
4808}
4809EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4810
cef6ff22 4811static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4812{
aa59004b
JW		 4813 if (card->info.type == QETH_CARD_TYPE_IQD)
4814 return QDIO_IQDIO_QFMT;
4815 else
4816 return QDIO_QETH_QFMT;
4a71df50
FB		 4817}
4818
d0ff1f52
UB		 4819static void qeth_determine_capabilities(struct qeth_card *card)
4820{
4821 int rc;
4822 int length;
4823 char *prcd;
4824 struct ccw_device *ddev;
4825 int ddev_offline = 0;
4826
4827 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4828 ddev = CARD_DDEV(card);
4829 if (!ddev->online) {
4830 ddev_offline = 1;
4831 rc = ccw_device_set_online(ddev);
4832 if (rc) {
4833 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4834 goto out;
4835 }
4836 }
4837
4838 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4839 if (rc) {
4840 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4841 dev_name(&card->gdev->dev), rc);
4842 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4843 goto out_offline;
4844 }
4845 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4846 if (ddev_offline)
4847 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4848 kfree(prcd);
4849
4850 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4851 if (rc)
4852 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4853
0da9581d 4854 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4855 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4856 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4857 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4858 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4859 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4860 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4861 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4862 dev_info(&card->gdev->dev,
4863 "Completion Queueing supported\n");
4864 } else {
4865 card->options.cq = QETH_CQ_NOTAVAILABLE;
4866 }
4867
4868
d0ff1f52
UB		 4869out_offline:
4870 if (ddev_offline == 1)
4871 ccw_device_set_offline(ddev);
4872out:
4873 return;
4874}
4875
cef6ff22
JW		 4876static void qeth_qdio_establish_cq(struct qeth_card *card,
4877 struct qdio_buffer **in_sbal_ptrs,
4878 void (**queue_start_poll)
4879 (struct ccw_device *, int,
4880 unsigned long))
4881{
0da9581d
EL		 4882 int i;
4883
4884 if (card->options.cq == QETH_CQ_ENABLED) {
4885 int offset = QDIO_MAX_BUFFERS_PER_Q *
4886 (card->qdio.no_in_queues - 1);
0da9581d
EL		 4887 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4888 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4889 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4890 }
4891
4892 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4893 }
4894}
4895
4a71df50
FB		 4896static int qeth_qdio_establish(struct qeth_card *card)
4897{
4898 struct qdio_initialize init_data;
4899 char *qib_param_field;
4900 struct qdio_buffer **in_sbal_ptrs;
104ea556 4901 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4902 struct qdio_buffer **out_sbal_ptrs;
4903 int i, j, k;
4904 int rc = 0;
4905
d11ba0c4 4906 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4907
4908 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4909 GFP_KERNEL);
104ea556 4910 if (!qib_param_field) {
4911 rc = -ENOMEM;
4912 goto out_free_nothing;
4913 }
4a71df50
FB		 4914
4915 qeth_create_qib_param_field(card, qib_param_field);
4916 qeth_create_qib_param_field_blkt(card, qib_param_field);
4917
b3332930 4918 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4919 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4920 GFP_KERNEL);
4921 if (!in_sbal_ptrs) {
104ea556 4922 rc = -ENOMEM;
4923 goto out_free_qib_param;
4a71df50 4924 }
0da9581d 4925 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4926 in_sbal_ptrs[i] = (struct qdio_buffer *)
4927 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4928 }
4a71df50 4929
0da9581d
EL		 4930 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4931 GFP_KERNEL);
104ea556 4932 if (!queue_start_poll) {
4933 rc = -ENOMEM;
4934 goto out_free_in_sbals;
4935 }
0da9581d 4936 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4937 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4938
4939 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4940
4a71df50 4941 out_sbal_ptrs =
b3332930 4942 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4943 sizeof(void *), GFP_KERNEL);
4944 if (!out_sbal_ptrs) {
104ea556 4945 rc = -ENOMEM;
4946 goto out_free_queue_start_poll;
4a71df50
FB		 4947 }
4948 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4949 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4950 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4951 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4952 }
4953
4954 memset(&init_data, 0, sizeof(struct qdio_initialize));
4955 init_data.cdev = CARD_DDEV(card);
4956 init_data.q_format = qeth_get_qdio_q_format(card);
4957 init_data.qib_param_field_format = 0;
4958 init_data.qib_param_field = qib_param_field;
0da9581d 4959 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4960 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4961 init_data.input_handler = card->discipline->input_handler;
4962 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4963 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4964 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4965 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4966 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4967 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4968 init_data.scan_threshold =
0fa81cd4 4969 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4970
4971 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4972 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4973 rc = qdio_allocate(&init_data);
4974 if (rc) {
4975 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4976 goto out;
4977 }
4978 rc = qdio_establish(&init_data);
4979 if (rc) {
4a71df50 4980 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4981 qdio_free(CARD_DDEV(card));
4982 }
4a71df50 4983 }
0da9581d
EL		 4984
4985 switch (card->options.cq) {
4986 case QETH_CQ_ENABLED:
4987 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4988 break;
4989 case QETH_CQ_DISABLED:
4990 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4991 break;
4992 default:
4993 break;
4994 }
cc961d40 4995out:
4a71df50 4996 kfree(out_sbal_ptrs);
104ea556 4997out_free_queue_start_poll:
4998 kfree(queue_start_poll);
4999out_free_in_sbals:
4a71df50 5000 kfree(in_sbal_ptrs);
104ea556 5001out_free_qib_param:
4a71df50 5002 kfree(qib_param_field);
104ea556 5003out_free_nothing:
4a71df50
FB		 5004 return rc;
5005}
5006
5007static void qeth_core_free_card(struct qeth_card *card)
5008{
5009
d11ba0c4
PT		 5010 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5011 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 5012 qeth_clean_channel(&card->read);
5013 qeth_clean_channel(&card->write);
5014 if (card->dev)
5015 free_netdev(card->dev);
4a71df50 5016 qeth_free_qdio_buffers(card);
6bcac508 5017 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 5018 kfree(card);
5019}
5020
395672e0
SR		 5021void qeth_trace_features(struct qeth_card *card)
5022{
5023 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 5024 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
5025 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
5026 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
5027 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
5028 sizeof(card->info.diagass_support));
395672e0
SR		 5029}
5030EXPORT_SYMBOL_GPL(qeth_trace_features);
5031
4a71df50 5032static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 5033 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5034 .driver_info = QETH_CARD_TYPE_OSD},
5035 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5036 .driver_info = QETH_CARD_TYPE_IQD},
5037 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5038 .driver_info = QETH_CARD_TYPE_OSN},
5039 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5040 .driver_info = QETH_CARD_TYPE_OSM},
5041 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5042 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5043 {},
5044};
5045MODULE_DEVICE_TABLE(ccw, qeth_ids);
5046
5047static struct ccw_driver qeth_ccw_driver = {
3bda058b 5048 .driver = {
3e70b3b8 5049 .owner = THIS_MODULE,
3bda058b
SO		 5050 .name = "qeth",
5051 },
4a71df50
FB		 5052 .ids = qeth_ids,
5053 .probe = ccwgroup_probe_ccwdev,
5054 .remove = ccwgroup_remove_ccwdev,
5055};
5056
4a71df50
FB		 5057int qeth_core_hardsetup_card(struct qeth_card *card)
5058{
6ebb7f8d 5059 int retries = 3;
4a71df50
FB		 5060 int rc;
5061
d11ba0c4 5062 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5063 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5064 qeth_update_from_chp_desc(card);
4a71df50 5065retry:
6ebb7f8d 5066 if (retries < 3)
74eacdb9
FB		 5067 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5068 dev_name(&card->gdev->dev));
22ae2790 5069 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5070 ccw_device_set_offline(CARD_DDEV(card));
5071 ccw_device_set_offline(CARD_WDEV(card));
5072 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5073 qdio_free(CARD_DDEV(card));
aa909224
UB		 5074 rc = ccw_device_set_online(CARD_RDEV(card));
5075 if (rc)
5076 goto retriable;
5077 rc = ccw_device_set_online(CARD_WDEV(card));
5078 if (rc)
5079 goto retriable;
5080 rc = ccw_device_set_online(CARD_DDEV(card));
5081 if (rc)
5082 goto retriable;
aa909224 5083retriable:
4a71df50 5084 if (rc == -ERESTARTSYS) {
d11ba0c4 5085 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5086 return rc;
5087 } else if (rc) {
d11ba0c4 5088 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5089 if (--retries < 0)
4a71df50
FB		 5090 goto out;
5091 else
5092 goto retry;
5093 }
d0ff1f52 5094 qeth_determine_capabilities(card);
4a71df50
FB		 5095 qeth_init_tokens(card);
5096 qeth_init_func_level(card);
5097 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5098 if (rc == -ERESTARTSYS) {
d11ba0c4 5099 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5100 return rc;
5101 } else if (rc) {
d11ba0c4 5102 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5103 if (--retries < 0)
5104 goto out;
5105 else
5106 goto retry;
5107 }
5108 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5109 if (rc == -ERESTARTSYS) {
d11ba0c4 5110 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5111 return rc;
5112 } else if (rc) {
d11ba0c4 5113 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5114 if (--retries < 0)
5115 goto out;
5116 else
5117 goto retry;
5118 }
908abbb5 5119 card->read_or_write_problem = 0;
4a71df50
FB		 5120 rc = qeth_mpc_initialize(card);
5121 if (rc) {
d11ba0c4 5122 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5123 goto out;
5124 }
1da74b1c 5125
10340510
JW		 5126 rc = qeth_send_startlan(card);
5127 if (rc) {
5128 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5129 if (rc == IPA_RC_LAN_OFFLINE) {
5130 dev_warn(&card->gdev->dev,
5131 "The LAN is offline\n");
5132 card->lan_online = 0;
5133 } else {
5134 rc = -ENODEV;
5135 goto out;
5136 }
5137 } else
5138 card->lan_online = 1;
5139
1da74b1c 5140 card->options.ipa4.supported_funcs = 0;
4d7def2a 5141 card->options.ipa6.supported_funcs = 0;
1da74b1c 5142 card->options.adp.supported_funcs = 0;
b4d72c08 5143 card->options.sbp.supported_funcs = 0;
1da74b1c 5144 card->info.diagass_support = 0;
1aec42bc
TR		 5145 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5146 if (rc == -ENOMEM)
5147 goto out;
5148 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5149 rc = qeth_query_setadapterparms(card);
5150 if (rc < 0) {
10340510 5151 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5152 goto out;
5153 }
5154 }
5155 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5156 rc = qeth_query_setdiagass(card);
5157 if (rc < 0) {
10340510 5158 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5159 goto out;
5160 }
5161 }
4a71df50
FB		 5162 return 0;
5163out:
74eacdb9
FB		 5164 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5165 "an error on the device\n");
5166 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5167 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5168 return rc;
5169}
5170EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5171
8d68af6a
JW		 5172static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5173 struct sk_buff *skb, int offset, int data_len)
4a71df50
FB		 5174{
5175 struct page *page = virt_to_page(element->addr);
b6f72f96 5176 unsigned int next_frag;
b3332930 5177
8d68af6a
JW		 5178 /* first fill the linear space */
5179 if (!skb->len) {
5180 unsigned int linear = min(data_len, skb_tailroom(skb));
0da9581d 5181
8d68af6a
JW		 5182 skb_put_data(skb, element->addr + offset, linear);
5183 data_len -= linear;
5184 if (!data_len)
5185 return;
5186 offset += linear;
5187 /* fall through to add page frag for remaining data */
4a71df50 5188 }
0da9581d 5189
8d68af6a 5190 next_frag = skb_shinfo(skb)->nr_frags;
b6f72f96 5191 get_page(page);
8d68af6a 5192 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
4a71df50
FB		 5193}
5194
bca51650
TR		 5195static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5196{
5197 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5198}
5199
4a71df50 5200struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5201 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5202 struct qdio_buffer_element **__element, int *__offset,
5203 struct qeth_hdr **hdr)
5204{
5205 struct qdio_buffer_element *element = *__element;
b3332930 5206 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50 5207 int offset = *__offset;
8d68af6a 5208 struct sk_buff *skb;
76b11f8e 5209 int skb_len = 0;
4a71df50
FB		 5210 void *data_ptr;
5211 int data_len;
5212 int headroom = 0;
5213 int use_rx_sg = 0;
4a71df50 5214
4a71df50 5215 /* qeth_hdr must not cross element boundaries */
864c17c3 5216 while (element->length < offset + sizeof(struct qeth_hdr)) {
4a71df50
FB		 5217 if (qeth_is_last_sbale(element))
5218 return NULL;
5219 element++;
5220 offset = 0;
4a71df50
FB		 5221 }
5222 *hdr = element->addr + offset;
5223
5224 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5225 switch ((*hdr)->hdr.l2.id) {
5226 case QETH_HEADER_TYPE_LAYER2:
5227 skb_len = (*hdr)->hdr.l2.pkt_length;
5228 break;
5229 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5230 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5231 headroom = ETH_HLEN;
76b11f8e
UB		 5232 break;
5233 case QETH_HEADER_TYPE_OSN:
5234 skb_len = (*hdr)->hdr.osn.pdu_length;
5235 headroom = sizeof(struct qeth_hdr);
5236 break;
5237 default:
5238 break;
4a71df50
FB		 5239 }
5240
5241 if (!skb_len)
5242 return NULL;
5243
b3332930
FB		 5244 if (((skb_len >= card->options.rx_sg_cb) &&
5245 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5246 (!atomic_read(&card->force_alloc_skb))) ||
8d68af6a 5247 (card->options.cq == QETH_CQ_ENABLED))
4a71df50 5248 use_rx_sg = 1;
8d68af6a
JW		 5249
5250 if (use_rx_sg && qethbuffer->rx_skb) {
5251 /* QETH_CQ_ENABLED only: */
5252 skb = qethbuffer->rx_skb;
5253 qethbuffer->rx_skb = NULL;
4a71df50 5254 } else {
8d68af6a
JW		 5255 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5256
5257 skb = dev_alloc_skb(linear + headroom);
4a71df50 5258 }
8d68af6a
JW		 5259 if (!skb)
5260 goto no_mem;
5261 if (headroom)
5262 skb_reserve(skb, headroom);
4a71df50
FB		 5263
5264 data_ptr = element->addr + offset;
5265 while (skb_len) {
5266 data_len = min(skb_len, (int)(element->length - offset));
5267 if (data_len) {
8d68af6a
JW		 5268 if (use_rx_sg)
5269 qeth_create_skb_frag(element, skb, offset,
5270 data_len);
5271 else
59ae1d12 5272 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5273 }
5274 skb_len -= data_len;
5275 if (skb_len) {
5276 if (qeth_is_last_sbale(element)) {
847a50fd 5277 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5278 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5279 dev_kfree_skb_any(skb);
5280 card->stats.rx_errors++;
5281 return NULL;
5282 }
5283 element++;
5284 offset = 0;
5285 data_ptr = element->addr;
5286 } else {
5287 offset += data_len;
5288 }
5289 }
5290 *__element = element;
5291 *__offset = offset;
5292 if (use_rx_sg && card->options.performance_stats) {
5293 card->perf_stats.sg_skbs_rx++;
5294 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5295 }
5296 return skb;
5297no_mem:
5298 if (net_ratelimit()) {
847a50fd 5299 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5300 }
5301 card->stats.rx_dropped++;
5302 return NULL;
5303}
5304EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5305
d73ef324
JW		 5306int qeth_poll(struct napi_struct *napi, int budget)
5307{
5308 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5309 int work_done = 0;
5310 struct qeth_qdio_buffer *buffer;
5311 int done;
5312 int new_budget = budget;
5313
5314 if (card->options.performance_stats) {
5315 card->perf_stats.inbound_cnt++;
5316 card->perf_stats.inbound_start_time = qeth_get_micros();
5317 }
5318
5319 while (1) {
5320 if (!card->rx.b_count) {
5321 card->rx.qdio_err = 0;
5322 card->rx.b_count = qdio_get_next_buffers(
5323 card->data.ccwdev, 0, &card->rx.b_index,
5324 &card->rx.qdio_err);
5325 if (card->rx.b_count <= 0) {
5326 card->rx.b_count = 0;
5327 break;
5328 }
5329 card->rx.b_element =
5330 &card->qdio.in_q->bufs[card->rx.b_index]
5331 .buffer->element[0];
5332 card->rx.e_offset = 0;
5333 }
5334
5335 while (card->rx.b_count) {
5336 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5337 if (!(card->rx.qdio_err &&
5338 qeth_check_qdio_errors(card, buffer->buffer,
5339 card->rx.qdio_err, "qinerr")))
5340 work_done +=
5341 card->discipline->process_rx_buffer(
5342 card, new_budget, &done);
5343 else
5344 done = 1;
5345
5346 if (done) {
5347 if (card->options.performance_stats)
5348 card->perf_stats.bufs_rec++;
5349 qeth_put_buffer_pool_entry(card,
5350 buffer->pool_entry);
5351 qeth_queue_input_buffer(card, card->rx.b_index);
5352 card->rx.b_count--;
5353 if (card->rx.b_count) {
5354 card->rx.b_index =
5355 (card->rx.b_index + 1) %
5356 QDIO_MAX_BUFFERS_PER_Q;
5357 card->rx.b_element =
5358 &card->qdio.in_q
5359 ->bufs[card->rx.b_index]
5360 .buffer->element[0];
5361 card->rx.e_offset = 0;
5362 }
5363 }
5364
5365 if (work_done >= budget)
5366 goto out;
5367 else
5368 new_budget = budget - work_done;
5369 }
5370 }
5371
978759e8 5372 napi_complete_done(napi, work_done);
d73ef324
JW		 5373 if (qdio_start_irq(card->data.ccwdev, 0))
5374 napi_schedule(&card->napi);
5375out:
5376 if (card->options.performance_stats)
5377 card->perf_stats.inbound_time += qeth_get_micros() -
5378 card->perf_stats.inbound_start_time;
5379 return work_done;
5380}
5381EXPORT_SYMBOL_GPL(qeth_poll);
5382
8f43fb00
TR		 5383int qeth_setassparms_cb(struct qeth_card *card,
5384 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5385{
5386 struct qeth_ipa_cmd *cmd;
5387
5388 QETH_CARD_TEXT(card, 4, "defadpcb");
5389
5390 cmd = (struct qeth_ipa_cmd *) data;
5391 if (cmd->hdr.return_code == 0) {
5392 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5393 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5394 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5395 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5396 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5397 }
4d7def2a
TR		 5398 return 0;
5399}
8f43fb00 5400EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5401
b475e316
TR		 5402struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5403 enum qeth_ipa_funcs ipa_func,
5404 __u16 cmd_code, __u16 len,
5405 enum qeth_prot_versions prot)
4d7def2a
TR		 5406{
5407 struct qeth_cmd_buffer *iob;
5408 struct qeth_ipa_cmd *cmd;
5409
5410 QETH_CARD_TEXT(card, 4, "getasscm");
5411 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5412
5413 if (iob) {
5414 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5415 cmd->data.setassparms.hdr.assist_no = ipa_func;
5416 cmd->data.setassparms.hdr.length = 8 + len;
5417 cmd->data.setassparms.hdr.command_code = cmd_code;
5418 cmd->data.setassparms.hdr.return_code = 0;
5419 cmd->data.setassparms.hdr.seq_no = 0;
5420 }
5421
5422 return iob;
5423}
b475e316 5424EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5425
5426int qeth_send_setassparms(struct qeth_card *card,
5427 struct qeth_cmd_buffer *iob, __u16 len, long data,
5428 int (*reply_cb)(struct qeth_card *,
5429 struct qeth_reply *, unsigned long),
5430 void *reply_param)
5431{
5432 int rc;
5433 struct qeth_ipa_cmd *cmd;
5434
5435 QETH_CARD_TEXT(card, 4, "sendassp");
5436
5437 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5438 if (len <= sizeof(__u32))
5439 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5440 else /* (len > sizeof(__u32)) */
5441 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5442
5443 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5444 return rc;
5445}
5446EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5447
5448int qeth_send_simple_setassparms(struct qeth_card *card,
5449 enum qeth_ipa_funcs ipa_func,
5450 __u16 cmd_code, long data)
5451{
5452 int rc;
5453 int length = 0;
5454 struct qeth_cmd_buffer *iob;
5455
5456 QETH_CARD_TEXT(card, 4, "simassp4");
5457 if (data)
5458 length = sizeof(__u32);
5459 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5460 length, QETH_PROT_IPV4);
5461 if (!iob)
5462 return -ENOMEM;
5463 rc = qeth_send_setassparms(card, iob, length, data,
5464 qeth_setassparms_cb, NULL);
5465 return rc;
5466}
5467EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5468
4a71df50
FB		 5469static void qeth_unregister_dbf_views(void)
5470{
d11ba0c4
PT		 5471 int x;
5472 for (x = 0; x < QETH_DBF_INFOS; x++) {
5473 debug_unregister(qeth_dbf[x].id);
5474 qeth_dbf[x].id = NULL;
5475 }
4a71df50
FB		 5476}
5477
8e96c51c 5478void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5479{
5480 char dbf_txt_buf[32];
345aa66e 5481 va_list args;
cd023216 5482
8e6a8285 5483 if (!debug_level_enabled(id, level))
cd023216 5484 return;
345aa66e
PT		 5485 va_start(args, fmt);
5486 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5487 va_end(args);
8e96c51c 5488 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5489}
5490EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5491
4a71df50
FB		 5492static int qeth_register_dbf_views(void)
5493{
d11ba0c4
PT		 5494 int ret;
5495 int x;
5496
5497 for (x = 0; x < QETH_DBF_INFOS; x++) {
5498 /* register the areas */
5499 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5500 qeth_dbf[x].pages,
5501 qeth_dbf[x].areas,
5502 qeth_dbf[x].len);
5503 if (qeth_dbf[x].id == NULL) {
5504 qeth_unregister_dbf_views();
5505 return -ENOMEM;
5506 }
4a71df50 5507
d11ba0c4
PT		 5508 /* register a view */
5509 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5510 if (ret) {
5511 qeth_unregister_dbf_views();
5512 return ret;
5513 }
4a71df50 5514
d11ba0c4
PT		 5515 /* set a passing level */
5516 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5517 }
4a71df50
FB		 5518
5519 return 0;
5520}
5521
5522int qeth_core_load_discipline(struct qeth_card *card,
5523 enum qeth_discipline_id discipline)
5524{
5525 int rc = 0;
c70eb09d 5526
2022e00c 5527 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5528 switch (discipline) {
5529 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5530 card->discipline = try_then_request_module(
5531 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5532 break;
5533 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5534 card->discipline = try_then_request_module(
5535 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5536 break;
c70eb09d
JW		 5537 default:
5538 break;
4a71df50 5539 }
c70eb09d 5540
c041f2d4 5541 if (!card->discipline) {
74eacdb9
FB		 5542 dev_err(&card->gdev->dev, "There is no kernel module to "
5543 "support discipline %d\n", discipline);
4a71df50
FB		 5544 rc = -EINVAL;
5545 }
2022e00c 5546 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5547 return rc;
5548}
5549
5550void qeth_core_free_discipline(struct qeth_card *card)
5551{
5552 if (card->options.layer2)
c041f2d4 5553 symbol_put(qeth_l2_discipline);
4a71df50 5554 else
c041f2d4
SO		 5555 symbol_put(qeth_l3_discipline);
5556 card->discipline = NULL;
4a71df50
FB		 5557}
5558
2d2ebb3e 5559const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5560 .name = "qeth_generic",
5561 .groups = qeth_generic_attr_groups,
5562};
2d2ebb3e
JW		 5563EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5564
b7169c51
SO		 5565static const struct device_type qeth_osn_devtype = {
5566 .name = "qeth_osn",
5567 .groups = qeth_osn_attr_groups,
5568};
5569
819dc537
SR		 5570#define DBF_NAME_LEN 20
5571
5572struct qeth_dbf_entry {
5573 char dbf_name[DBF_NAME_LEN];
5574 debug_info_t *dbf_info;
5575 struct list_head dbf_list;
5576};
5577
5578static LIST_HEAD(qeth_dbf_list);
5579static DEFINE_MUTEX(qeth_dbf_list_mutex);
5580
5581static debug_info_t *qeth_get_dbf_entry(char *name)
5582{
5583 struct qeth_dbf_entry *entry;
5584 debug_info_t *rc = NULL;
5585
5586 mutex_lock(&qeth_dbf_list_mutex);
5587 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5588 if (strcmp(entry->dbf_name, name) == 0) {
5589 rc = entry->dbf_info;
5590 break;
5591 }
5592 }
5593 mutex_unlock(&qeth_dbf_list_mutex);
5594 return rc;
5595}
5596
5597static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5598{
5599 struct qeth_dbf_entry *new_entry;
5600
5601 card->debug = debug_register(name, 2, 1, 8);
5602 if (!card->debug) {
5603 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5604 goto err;
5605 }
5606 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5607 goto err_dbg;
5608 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5609 if (!new_entry)
5610 goto err_dbg;
5611 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5612 new_entry->dbf_info = card->debug;
5613 mutex_lock(&qeth_dbf_list_mutex);
5614 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5615 mutex_unlock(&qeth_dbf_list_mutex);
5616
5617 return 0;
5618
5619err_dbg:
5620 debug_unregister(card->debug);
5621err:
5622 return -ENOMEM;
5623}
5624
5625static void qeth_clear_dbf_list(void)
5626{
5627 struct qeth_dbf_entry *entry, *tmp;
5628
5629 mutex_lock(&qeth_dbf_list_mutex);
5630 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5631 list_del(&entry->dbf_list);
5632 debug_unregister(entry->dbf_info);
5633 kfree(entry);
5634 }
5635 mutex_unlock(&qeth_dbf_list_mutex);
5636}
5637
4a71df50
FB		 5638static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5639{
5640 struct qeth_card *card;
5641 struct device *dev;
5642 int rc;
c70eb09d 5643 enum qeth_discipline_id enforced_disc;
4a71df50 5644 unsigned long flags;
819dc537 5645 char dbf_name[DBF_NAME_LEN];
4a71df50 5646
d11ba0c4 5647 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5648
5649 dev = &gdev->dev;
5650 if (!get_device(dev))
5651 return -ENODEV;
5652
2a0217d5 5653 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5654
5655 card = qeth_alloc_card();
5656 if (!card) {
d11ba0c4 5657 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5658 rc = -ENOMEM;
5659 goto err_dev;
5660 }
af039068
CO		 5661
5662 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5663 dev_name(&gdev->dev));
819dc537 5664 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5665 if (!card->debug) {
819dc537
SR		 5666 rc = qeth_add_dbf_entry(card, dbf_name);
5667 if (rc)
5668 goto err_card;
af039068 5669 }
af039068 5670
4a71df50
FB		 5671 card->read.ccwdev = gdev->cdev[0];
5672 card->write.ccwdev = gdev->cdev[1];
5673 card->data.ccwdev = gdev->cdev[2];
5674 dev_set_drvdata(&gdev->dev, card);
5675 card->gdev = gdev;
5676 gdev->cdev[0]->handler = qeth_irq;
5677 gdev->cdev[1]->handler = qeth_irq;
5678 gdev->cdev[2]->handler = qeth_irq;
5679
ed2e93ef 5680 qeth_determine_card_type(card);
4a71df50
FB		 5681 rc = qeth_setup_card(card);
5682 if (rc) {
d11ba0c4 5683 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5684 goto err_card;
4a71df50
FB		 5685 }
5686
c70eb09d
JW		 5687 qeth_determine_capabilities(card);
5688 enforced_disc = qeth_enforce_discipline(card);
5689 switch (enforced_disc) {
5690 case QETH_DISCIPLINE_UNDETERMINED:
5691 gdev->dev.type = &qeth_generic_devtype;
5692 break;
5693 default:
5694 card->info.layer_enforced = true;
5695 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5696 if (rc)
819dc537 5697 goto err_card;
2d2ebb3e
JW		 5698
5699 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5700 ? card->discipline->devtype
5701 : &qeth_osn_devtype;
c041f2d4 5702 rc = card->discipline->setup(card->gdev);
4a71df50 5703 if (rc)
5113fec0 5704 goto err_disc;
2d2ebb3e 5705 break;
4a71df50
FB		 5706 }
5707
5708 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5709 list_add_tail(&card->list, &qeth_core_card_list.list);
5710 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5711 return 0;
5712
5113fec0
UB		 5713err_disc:
5714 qeth_core_free_discipline(card);
4a71df50
FB		 5715err_card:
5716 qeth_core_free_card(card);
5717err_dev:
5718 put_device(dev);
5719 return rc;
5720}
5721
5722static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5723{
5724 unsigned long flags;
5725 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5726
28a7e4c9 5727 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5728
c041f2d4
SO		 5729 if (card->discipline) {
5730 card->discipline->remove(gdev);
9dc48ccc
UB		 5731 qeth_core_free_discipline(card);
5732 }
5733
4a71df50
FB		 5734 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5735 list_del(&card->list);
5736 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5737 qeth_core_free_card(card);
5738 dev_set_drvdata(&gdev->dev, NULL);
5739 put_device(&gdev->dev);
5740 return;
5741}
5742
5743static int qeth_core_set_online(struct ccwgroup_device *gdev)
5744{
5745 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5746 int rc = 0;
c70eb09d 5747 enum qeth_discipline_id def_discipline;
4a71df50 5748
c041f2d4 5749 if (!card->discipline) {
4a71df50
FB		 5750 if (card->info.type == QETH_CARD_TYPE_IQD)
5751 def_discipline = QETH_DISCIPLINE_LAYER3;
5752 else
5753 def_discipline = QETH_DISCIPLINE_LAYER2;
5754 rc = qeth_core_load_discipline(card, def_discipline);
5755 if (rc)
5756 goto err;
c041f2d4 5757 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5758 if (rc) {
5759 qeth_core_free_discipline(card);
4a71df50 5760 goto err;
9111e788 5761 }
4a71df50 5762 }
c041f2d4 5763 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5764err:
5765 return rc;
5766}
5767
5768static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5769{
5770 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5771 return card->discipline->set_offline(gdev);
4a71df50
FB		 5772}
5773
5774static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5775{
5776 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5777 qeth_set_allowed_threads(card, 0, 1);
5778 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5779 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5780 qeth_qdio_clear_card(card, 0);
5781 qeth_clear_qdio_buffers(card);
5782 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5783}
5784
bbcfcdc8
FB		 5785static int qeth_core_freeze(struct ccwgroup_device *gdev)
5786{
5787 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5788 if (card->discipline && card->discipline->freeze)
5789 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5790 return 0;
5791}
5792
5793static int qeth_core_thaw(struct ccwgroup_device *gdev)
5794{
5795 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5796 if (card->discipline && card->discipline->thaw)
5797 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5798 return 0;
5799}
5800
5801static int qeth_core_restore(struct ccwgroup_device *gdev)
5802{
5803 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5804 if (card->discipline && card->discipline->restore)
5805 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5806 return 0;
5807}
5808
4a71df50 5809static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5810 .driver = {
5811 .owner = THIS_MODULE,
5812 .name = "qeth",
5813 },
f9a5d70c 5814 .ccw_driver = &qeth_ccw_driver,
b7169c51 5815 .setup = qeth_core_probe_device,
4a71df50
FB		 5816 .remove = qeth_core_remove_device,
5817 .set_online = qeth_core_set_online,
5818 .set_offline = qeth_core_set_offline,
5819 .shutdown = qeth_core_shutdown,
6ffa4d1b
JW		 5820 .prepare = NULL,
5821 .complete = NULL,
bbcfcdc8
FB		 5822 .freeze = qeth_core_freeze,
5823 .thaw = qeth_core_thaw,
5824 .restore = qeth_core_restore,
4a71df50
FB		 5825};
5826
36369569
GKH		 5827static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5828 size_t count)
4a71df50
FB		 5829{
5830 int err;
4a71df50 5831
b7169c51 5832 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5833 &qeth_core_ccwgroup_driver, 3, buf);
5834
5835 return err ? err : count;
5836}
36369569 5837static DRIVER_ATTR_WO(group);
4a71df50 5838
f47e2256
SO		 5839static struct attribute *qeth_drv_attrs[] = {
5840 &driver_attr_group.attr,
5841 NULL,
5842};
5843static struct attribute_group qeth_drv_attr_group = {
5844 .attrs = qeth_drv_attrs,
5845};
5846static const struct attribute_group *qeth_drv_attr_groups[] = {
5847 &qeth_drv_attr_group,
5848 NULL,
5849};
5850
942d6984
JW		 5851int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5852{
5853 struct qeth_card *card = dev->ml_priv;
5854 struct mii_ioctl_data *mii_data;
5855 int rc = 0;
5856
5857 if (!card)
5858 return -ENODEV;
5859
5860 if (!qeth_card_hw_is_reachable(card))
5861 return -ENODEV;
5862
5863 if (card->info.type == QETH_CARD_TYPE_OSN)
5864 return -EPERM;
5865
5866 switch (cmd) {
5867 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5868 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5869 break;
5870 case SIOC_QETH_GET_CARD_TYPE:
5871 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5872 card->info.type == QETH_CARD_TYPE_OSM ||
5873 card->info.type == QETH_CARD_TYPE_OSX) &&
5874 !card->info.guestlan)
5875 return 1;
5876 else
5877 return 0;
5878 case SIOCGMIIPHY:
5879 mii_data = if_mii(rq);
5880 mii_data->phy_id = 0;
5881 break;
5882 case SIOCGMIIREG:
5883 mii_data = if_mii(rq);
5884 if (mii_data->phy_id != 0)
5885 rc = -EINVAL;
5886 else
5887 mii_data->val_out = qeth_mdio_read(dev,
5888 mii_data->phy_id, mii_data->reg_num);
5889 break;
5890 case SIOC_QETH_QUERY_OAT:
5891 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5892 break;
5893 default:
5894 if (card->discipline->do_ioctl)
5895 rc = card->discipline->do_ioctl(dev, rq, cmd);
5896 else
5897 rc = -EOPNOTSUPP;
5898 }
5899 if (rc)
5900 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5901 return rc;
5902}
5903EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5904
4a71df50
FB		 5905static struct {
5906 const char str[ETH_GSTRING_LEN];
5907} qeth_ethtool_stats_keys[] = {
5908/* 0 */{"rx skbs"},
5909 {"rx buffers"},
5910 {"tx skbs"},
5911 {"tx buffers"},
5912 {"tx skbs no packing"},
5913 {"tx buffers no packing"},
5914 {"tx skbs packing"},
5915 {"tx buffers packing"},
5916 {"tx sg skbs"},
5917 {"tx sg frags"},
5918/* 10 */{"rx sg skbs"},
5919 {"rx sg frags"},
5920 {"rx sg page allocs"},
5921 {"tx large kbytes"},
5922 {"tx large count"},
5923 {"tx pk state ch n->p"},
5924 {"tx pk state ch p->n"},
5925 {"tx pk watermark low"},
5926 {"tx pk watermark high"},
5927 {"queue 0 buffer usage"},
5928/* 20 */{"queue 1 buffer usage"},
5929 {"queue 2 buffer usage"},
5930 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5931 {"rx poll time"},
5932 {"rx poll count"},
4a71df50
FB		 5933 {"rx do_QDIO time"},
5934 {"rx do_QDIO count"},
5935 {"tx handler time"},
5936 {"tx handler count"},
5937 {"tx time"},
5938/* 30 */{"tx count"},
5939 {"tx do_QDIO time"},
5940 {"tx do_QDIO count"},
f61a0d05 5941 {"tx csum"},
c3b4a740 5942 {"tx lin"},
6059c905 5943 {"tx linfail"},
0da9581d
EL		 5944 {"cq handler count"},
5945 {"cq handler time"}
4a71df50
FB		 5946};
5947
df8b4ec8 5948int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5949{
df8b4ec8
BH		 5950 switch (stringset) {
5951 case ETH_SS_STATS:
5952 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5953 default:
5954 return -EINVAL;
5955 }
4a71df50 5956}
df8b4ec8 5957EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5958
5959void qeth_core_get_ethtool_stats(struct net_device *dev,
5960 struct ethtool_stats *stats, u64 *data)
5961{
509e2562 5962 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5963 data[0] = card->stats.rx_packets -
5964 card->perf_stats.initial_rx_packets;
5965 data[1] = card->perf_stats.bufs_rec;
5966 data[2] = card->stats.tx_packets -
5967 card->perf_stats.initial_tx_packets;
5968 data[3] = card->perf_stats.bufs_sent;
5969 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5970 - card->perf_stats.skbs_sent_pack;
5971 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5972 data[6] = card->perf_stats.skbs_sent_pack;
5973 data[7] = card->perf_stats.bufs_sent_pack;
5974 data[8] = card->perf_stats.sg_skbs_sent;
5975 data[9] = card->perf_stats.sg_frags_sent;
5976 data[10] = card->perf_stats.sg_skbs_rx;
5977 data[11] = card->perf_stats.sg_frags_rx;
5978 data[12] = card->perf_stats.sg_alloc_page_rx;
5979 data[13] = (card->perf_stats.large_send_bytes >> 10);
5980 data[14] = card->perf_stats.large_send_cnt;
5981 data[15] = card->perf_stats.sc_dp_p;
5982 data[16] = card->perf_stats.sc_p_dp;
5983 data[17] = QETH_LOW_WATERMARK_PACK;
5984 data[18] = QETH_HIGH_WATERMARK_PACK;
5985 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5986 data[20] = (card->qdio.no_out_queues > 1) ?
5987 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5988 data[21] = (card->qdio.no_out_queues > 2) ?
5989 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5990 data[22] = (card->qdio.no_out_queues > 3) ?
5991 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5992 data[23] = card->perf_stats.inbound_time;
5993 data[24] = card->perf_stats.inbound_cnt;
5994 data[25] = card->perf_stats.inbound_do_qdio_time;
5995 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5996 data[27] = card->perf_stats.outbound_handler_time;
5997 data[28] = card->perf_stats.outbound_handler_cnt;
5998 data[29] = card->perf_stats.outbound_time;
5999 data[30] = card->perf_stats.outbound_cnt;
6000 data[31] = card->perf_stats.outbound_do_qdio_time;
6001 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 6002 data[33] = card->perf_stats.tx_csum;
c3b4a740 6003 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 6004 data[35] = card->perf_stats.tx_linfail;
6005 data[36] = card->perf_stats.cq_cnt;
6006 data[37] = card->perf_stats.cq_time;
4a71df50
FB		 6007}
6008EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
6009
6010void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
6011{
6012 switch (stringset) {
6013 case ETH_SS_STATS:
6014 memcpy(data, &qeth_ethtool_stats_keys,
6015 sizeof(qeth_ethtool_stats_keys));
6016 break;
6017 default:
6018 WARN_ON(1);
6019 break;
6020 }
6021}
6022EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6023
6024void qeth_core_get_drvinfo(struct net_device *dev,
6025 struct ethtool_drvinfo *info)
6026{
509e2562 6027 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 6028
6029 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
6030 sizeof(info->driver));
6031 strlcpy(info->version, "1.0", sizeof(info->version));
6032 strlcpy(info->fw_version, card->info.mcl_level,
6033 sizeof(info->fw_version));
6034 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6035 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6036}
6037EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6038
774afb8e
JW		 6039/* Helper function to fill 'advertising' and 'supported' which are the same. */
6040/* Autoneg and full-duplex are supported and advertised unconditionally. */
6041/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6042/* specified port type. */
993e19c0 6043static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6044 int maxspeed, int porttype)
6045{
41fc3b65
JW		 6046 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6047 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6048 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6049
41fc3b65
JW		 6050 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6051 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6052
6053 switch (porttype) {
6054 case PORT_TP:
41fc3b65
JW		 6055 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6056 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6057 break;
6058 case PORT_FIBRE:
41fc3b65
JW		 6059 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6060 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6061 break;
6062 default:
41fc3b65
JW		 6063 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6064 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6065 WARN_ON_ONCE(1);
6066 }
6067
774afb8e 6068 /* fallthrough from high to low, to select all legal speeds: */
02d5cb5b
EC		 6069 switch (maxspeed) {
6070 case SPEED_10000:
41fc3b65
JW		 6071 ethtool_link_ksettings_add_link_mode(cmd, supported,
6072 10000baseT_Full);
6073 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6074 10000baseT_Full);
02d5cb5b 6075 case SPEED_1000:
41fc3b65
JW		 6076 ethtool_link_ksettings_add_link_mode(cmd, supported,
6077 1000baseT_Full);
6078 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6079 1000baseT_Full);
6080 ethtool_link_ksettings_add_link_mode(cmd, supported,
6081 1000baseT_Half);
6082 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6083 1000baseT_Half);
02d5cb5b 6084 case SPEED_100:
41fc3b65
JW		 6085 ethtool_link_ksettings_add_link_mode(cmd, supported,
6086 100baseT_Full);
6087 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6088 100baseT_Full);
6089 ethtool_link_ksettings_add_link_mode(cmd, supported,
6090 100baseT_Half);
6091 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6092 100baseT_Half);
02d5cb5b 6093 case SPEED_10:
41fc3b65
JW		 6094 ethtool_link_ksettings_add_link_mode(cmd, supported,
6095 10baseT_Full);
6096 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6097 10baseT_Full);
6098 ethtool_link_ksettings_add_link_mode(cmd, supported,
6099 10baseT_Half);
6100 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6101 10baseT_Half);
774afb8e
JW		 6102 /* end fallthrough */
6103 break;
02d5cb5b 6104 default:
41fc3b65
JW		 6105 ethtool_link_ksettings_add_link_mode(cmd, supported,
6106 10baseT_Full);
6107 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6108 10baseT_Full);
6109 ethtool_link_ksettings_add_link_mode(cmd, supported,
6110 10baseT_Half);
6111 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6112 10baseT_Half);
02d5cb5b
EC		 6113 WARN_ON_ONCE(1);
6114 }
02d5cb5b
EC		 6115}
6116
993e19c0
JW		 6117int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6118 struct ethtool_link_ksettings *cmd)
3f9975aa 6119{
509e2562 6120 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6121 enum qeth_link_types link_type;
02d5cb5b 6122 struct carrier_info carrier_info;
511c2445 6123 int rc;
3f9975aa
FB		 6124
6125 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6126 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6127 else
6128 link_type = card->info.link_type;
6129
993e19c0
JW		 6130 cmd->base.duplex = DUPLEX_FULL;
6131 cmd->base.autoneg = AUTONEG_ENABLE;
6132 cmd->base.phy_address = 0;
6133 cmd->base.mdio_support = 0;
6134 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6135 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6136
6137 switch (link_type) {
6138 case QETH_LINK_TYPE_FAST_ETH:
6139 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6140 cmd->base.speed = SPEED_100;
6141 cmd->base.port = PORT_TP;
3f9975aa 6142 break;
3f9975aa
FB		 6143 case QETH_LINK_TYPE_GBIT_ETH:
6144 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6145 cmd->base.speed = SPEED_1000;
6146 cmd->base.port = PORT_FIBRE;
3f9975aa 6147 break;
3f9975aa 6148 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6149 cmd->base.speed = SPEED_10000;
6150 cmd->base.port = PORT_FIBRE;
3f9975aa 6151 break;
3f9975aa 6152 default:
993e19c0
JW		 6153 cmd->base.speed = SPEED_10;
6154 cmd->base.port = PORT_TP;
3f9975aa 6155 }
993e19c0 6156 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6157
02d5cb5b
EC		 6158 /* Check if we can obtain more accurate information. */
6159 /* If QUERY_CARD_INFO command is not supported or fails, */
6160 /* just return the heuristics that was filled above. */
511c2445
EC		 6161 if (!qeth_card_hw_is_reachable(card))
6162 return -ENODEV;
6163 rc = qeth_query_card_info(card, &carrier_info);
6164 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6165 return 0;
511c2445
EC		 6166 if (rc) /* report error from the hardware operation */
6167 return rc;
6168 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6169
6170 netdev_dbg(netdev,
6171 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6172 carrier_info.card_type,
6173 carrier_info.port_mode,
6174 carrier_info.port_speed);
6175
6176 /* Update attributes for which we've obtained more authoritative */
6177 /* information, leave the rest the way they where filled above. */
6178 switch (carrier_info.card_type) {
6179 case CARD_INFO_TYPE_1G_COPPER_A:
6180 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6181 cmd->base.port = PORT_TP;
6182 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6183 break;
6184 case CARD_INFO_TYPE_1G_FIBRE_A:
6185 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6186 cmd->base.port = PORT_FIBRE;
6187 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6188 break;
6189 case CARD_INFO_TYPE_10G_FIBRE_A:
6190 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6191 cmd->base.port = PORT_FIBRE;
6192 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6193 break;
6194 }
6195
6196 switch (carrier_info.port_mode) {
6197 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6198 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6199 break;
6200 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6201 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6202 break;
6203 }
6204
6205 switch (carrier_info.port_speed) {
6206 case CARD_INFO_PORTS_10M:
993e19c0 6207 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6208 break;
6209 case CARD_INFO_PORTS_100M:
993e19c0 6210 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6211 break;
6212 case CARD_INFO_PORTS_1G:
993e19c0 6213 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6214 break;
6215 case CARD_INFO_PORTS_10G:
993e19c0 6216 cmd->base.speed = SPEED_10000;
02d5cb5b
EC		 6217 break;
6218 }
6219
3f9975aa
FB		 6220 return 0;
6221}
993e19c0 6222EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6223
c9475369
TR		 6224/* Callback to handle checksum offload command reply from OSA card.
6225 * Verify that required features have been enabled on the card.
6226 * Return error in hdr->return_code as this value is checked by caller.
6227 *
6228 * Always returns zero to indicate no further messages from the OSA card.
6229 */
6230static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6231 struct qeth_reply *reply,
6232 unsigned long data)
6233{
6234 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6235 struct qeth_checksum_cmd *chksum_cb =
6236 (struct qeth_checksum_cmd *)reply->param;
6237
6238 QETH_CARD_TEXT(card, 4, "chkdoccb");
6239 if (cmd->hdr.return_code)
6240 return 0;
6241
6242 memset(chksum_cb, 0, sizeof(*chksum_cb));
6243 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6244 chksum_cb->supported =
6245 cmd->data.setassparms.data.chksum.supported;
6246 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6247 }
6248 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6249 chksum_cb->supported =
6250 cmd->data.setassparms.data.chksum.supported;
6251 chksum_cb->enabled =
6252 cmd->data.setassparms.data.chksum.enabled;
6253 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6254 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6255 }
6256 return 0;
6257}
6258
6259/* Send command to OSA card and check results. */
6260static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6261 enum qeth_ipa_funcs ipa_func,
6262 __u16 cmd_code, long data,
6263 struct qeth_checksum_cmd *chksum_cb)
6264{
6265 struct qeth_cmd_buffer *iob;
6266 int rc = -ENOMEM;
6267
6268 QETH_CARD_TEXT(card, 4, "chkdocmd");
6269 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
6270 sizeof(__u32), QETH_PROT_IPV4);
6271 if (iob)
6272 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6273 qeth_ipa_checksum_run_cmd_cb,
6274 chksum_cb);
6275 return rc;
6276}
6277
8f43fb00 6278static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
4d7def2a 6279{
f9d8e6dc
TR		 6280 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
6281 QETH_IPA_CHECKSUM_UDP |
6282 QETH_IPA_CHECKSUM_TCP;
c9475369 6283 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6284 int rc;
6285
c9475369
TR		 6286 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6287 &chksum_cb);
f9d8e6dc
TR		 6288 if (!rc) {
6289 if ((required_features & chksum_cb.supported) !=
6290 required_features)
6291 rc = -EIO;
dae84c8e
TR		 6292 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6293 cstype == IPA_INBOUND_CHECKSUM)
6294 dev_warn(&card->gdev->dev,
6295 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6296 QETH_CARD_IFNAME(card));
f9d8e6dc 6297 }
4d7def2a 6298 if (rc) {
c9475369 6299 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6300 dev_warn(&card->gdev->dev,
6301 "Starting HW checksumming for %s failed, using SW checksumming\n",
6302 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6303 return rc;
6304 }
c9475369
TR		 6305 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
6306 chksum_cb.supported, &chksum_cb);
f9d8e6dc
TR		 6307 if (!rc) {
6308 if ((required_features & chksum_cb.enabled) !=
6309 required_features)
6310 rc = -EIO;
6311 }
4d7def2a 6312 if (rc) {
c9475369 6313 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6314 dev_warn(&card->gdev->dev,
6315 "Enabling HW checksumming for %s failed, using SW checksumming\n",
6316 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6317 return rc;
6318 }
8f43fb00
TR		 6319
6320 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
6321 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
4d7def2a
TR		 6322 return 0;
6323}
6324
8f43fb00 6325static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
4d7def2a 6326{
c9475369
TR		 6327 int rc = (on) ? qeth_send_checksum_on(card, cstype)
6328 : qeth_send_simple_setassparms(card, cstype,
6329 IPA_CMD_ASS_STOP, 0);
6330 return rc ? -EIO : 0;
4d7def2a 6331}
4d7def2a 6332
8f43fb00 6333static int qeth_set_ipa_tso(struct qeth_card *card, int on)
4d7def2a 6334{
8f43fb00 6335 int rc;
4d7def2a 6336
8f43fb00 6337 QETH_CARD_TEXT(card, 3, "sttso");
4d7def2a 6338
8f43fb00
TR		 6339 if (on) {
6340 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6341 IPA_CMD_ASS_START, 0);
6342 if (rc) {
6343 dev_warn(&card->gdev->dev,
6344 "Starting outbound TCP segmentation offload for %s failed\n",
6345 QETH_CARD_IFNAME(card));
6346 return -EIO;
6347 }
6348 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6349 } else {
6350 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6351 IPA_CMD_ASS_STOP, 0);
6352 }
4d7def2a
TR		 6353 return rc;
6354}
8f43fb00 6355
ce344356
JW		 6356#define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO)
6357
6358/**
6359 * qeth_recover_features() - Restore device features after recovery
6360 * @dev: the recovering net_device
6361 *
6362 * Caller must hold rtnl lock.
6363 */
6364void qeth_recover_features(struct net_device *dev)
e830baa9 6365{
ce344356 6366 netdev_features_t features = dev->features;
e830baa9 6367 struct qeth_card *card = dev->ml_priv;
e830baa9 6368
ce344356
JW		 6369 /* force-off any feature that needs an IPA sequence.
6370 * netdev_update_features() will restart them.
6371 */
6372 dev->features &= ~QETH_HW_FEATURES;
6373 netdev_update_features(dev);
e830baa9 6374
ce344356
JW		 6375 if (features == dev->features)
6376 return;
e830baa9
HW		 6377 dev_warn(&card->gdev->dev,
6378 "Device recovery failed to restore all offload features\n");
e830baa9
HW		 6379}
6380EXPORT_SYMBOL_GPL(qeth_recover_features);
6381
8f43fb00
TR		 6382int qeth_set_features(struct net_device *dev, netdev_features_t features)
6383{
6384 struct qeth_card *card = dev->ml_priv;
6c7cd712 6385 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6386 int rc = 0;
6387
6388 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6389 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6390
6c7cd712 6391 if ((changed & NETIF_F_IP_CSUM)) {
8f43fb00
TR		 6392 rc = qeth_set_ipa_csum(card,
6393 features & NETIF_F_IP_CSUM ? 1 : 0,
6394 IPA_OUTBOUND_CHECKSUM);
6c7cd712
HW		 6395 if (rc)
6396 changed ^= NETIF_F_IP_CSUM;
6397 }
6398 if ((changed & NETIF_F_RXCSUM)) {
6399 rc = qeth_set_ipa_csum(card,
8f43fb00
TR		 6400 features & NETIF_F_RXCSUM ? 1 : 0,
6401 IPA_INBOUND_CHECKSUM);
6c7cd712
HW		 6402 if (rc)
6403 changed ^= NETIF_F_RXCSUM;
6404 }
6405 if ((changed & NETIF_F_TSO)) {
6406 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6407 if (rc)
6408 changed ^= NETIF_F_TSO;
6409 }
6410
6411 /* everything changed successfully? */
6412 if ((dev->features ^ features) == changed)
6413 return 0;
6414 /* something went wrong. save changed features and return error */
6415 dev->features ^= changed;
6416 return -EIO;
8f43fb00
TR		 6417}
6418EXPORT_SYMBOL_GPL(qeth_set_features);
6419
6420netdev_features_t qeth_fix_features(struct net_device *dev,
6421 netdev_features_t features)
6422{
6423 struct qeth_card *card = dev->ml_priv;
6424
6425 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6426 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6427 features &= ~NETIF_F_IP_CSUM;
6428 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6429 features &= ~NETIF_F_RXCSUM;
cf536ffe 6430 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6431 features &= ~NETIF_F_TSO;
6c7cd712
HW		 6432 /* if the card isn't up, remove features that require hw changes */
6433 if (card->state == CARD_STATE_DOWN ||
6434 card->state == CARD_STATE_RECOVER)
ce344356 6435 features &= ~QETH_HW_FEATURES;
8f43fb00
TR		 6436 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6437 return features;
6438}
6439EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6440
4a71df50
FB		 6441static int __init qeth_core_init(void)
6442{
6443 int rc;
6444
74eacdb9 6445 pr_info("loading core functions\n");
4a71df50 6446 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6447 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6448 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6449 mutex_init(&qeth_mod_mutex);
4a71df50 6450
0f54761d
SR		 6451 qeth_wq = create_singlethread_workqueue("qeth_wq");
6452
4a71df50
FB		 6453 rc = qeth_register_dbf_views();
6454 if (rc)
6455 goto out_err;
035da16f 6456 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6457 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6458 if (rc)
6459 goto register_err;
683d718a
FB		 6460 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6461 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6462 if (!qeth_core_header_cache) {
6463 rc = -ENOMEM;
6464 goto slab_err;
6465 }
0da9581d
EL		 6466 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6467 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6468 if (!qeth_qdio_outbuf_cache) {
6469 rc = -ENOMEM;
6470 goto cqslab_err;
6471 }
afb6ac59
SO		 6472 rc = ccw_driver_register(&qeth_ccw_driver);
6473 if (rc)
6474 goto ccw_err;
6475 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6476 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6477 if (rc)
6478 goto ccwgroup_err;
0da9581d 6479
683d718a 6480 return 0;
afb6ac59
SO		 6481
6482ccwgroup_err:
6483 ccw_driver_unregister(&qeth_ccw_driver);
6484ccw_err:
6485 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6486cqslab_err:
6487 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6488slab_err:
035da16f 6489 root_device_unregister(qeth_core_root_dev);
4a71df50 6490register_err:
4a71df50
FB		 6491 qeth_unregister_dbf_views();
6492out_err:
74eacdb9 6493 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6494 return rc;
6495}
6496
6497static void __exit qeth_core_exit(void)
6498{
819dc537 6499 qeth_clear_dbf_list();
0f54761d 6500 destroy_workqueue(qeth_wq);
4a71df50
FB		 6501 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6502 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6503 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6504 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6505 root_device_unregister(qeth_core_root_dev);
4a71df50 6506 qeth_unregister_dbf_views();
74eacdb9 6507 pr_info("core functions removed\n");
4a71df50
FB		 6508}
6509
6510module_init(qeth_core_init);
6511module_exit(qeth_core_exit);
6512MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6513MODULE_DESCRIPTION("qeth core functions");
6514MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)