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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[linux-block.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
bbcfcdc8 4 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
4a71df50
FB		 20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
5a0e3ad6 23#include <linux/slab.h>
4a71df50 24
ab4227cb
MS		 25#include <asm/ebcdic.h>
26#include <asm/io.h>
4a71df50
FB		 27
28#include "qeth_core.h"
4a71df50 29
d11ba0c4
PT		 30struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
32 /* N P A M L V H */
33 [QETH_DBF_SETUP] = {"qeth_setup",
34 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
35 [QETH_DBF_QERR] = {"qeth_qerr",
36 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
37 [QETH_DBF_TRACE] = {"qeth_trace",
38 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
39 [QETH_DBF_MSG] = {"qeth_msg",
40 8, 1, 128, 3, &debug_sprintf_view, NULL},
41 [QETH_DBF_SENSE] = {"qeth_sense",
42 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
43 [QETH_DBF_MISC] = {"qeth_misc",
44 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
45 [QETH_DBF_CTRL] = {"qeth_control",
46 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
47};
48EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 49
50struct qeth_card_list_struct qeth_core_card_list;
51EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 52struct kmem_cache *qeth_core_header_cache;
53EXPORT_SYMBOL_GPL(qeth_core_header_cache);
4a71df50
FB		 54
55static struct device *qeth_core_root_dev;
56static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
57static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 58
59static void qeth_send_control_data_cb(struct qeth_channel *,
60 struct qeth_cmd_buffer *);
61static int qeth_issue_next_read(struct qeth_card *);
62static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
63static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
64static void qeth_free_buffer_pool(struct qeth_card *);
65static int qeth_qdio_establish(struct qeth_card *);
66
67
68static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
69 struct qdio_buffer *buffer, int is_tso,
70 int *next_element_to_fill)
71{
72 struct skb_frag_struct *frag;
73 int fragno;
74 unsigned long addr;
75 int element, cnt, dlen;
76
77 fragno = skb_shinfo(skb)->nr_frags;
78 element = *next_element_to_fill;
79 dlen = 0;
80
81 if (is_tso)
82 buffer->element[element].flags =
83 SBAL_FLAGS_MIDDLE_FRAG;
84 else
85 buffer->element[element].flags =
86 SBAL_FLAGS_FIRST_FRAG;
87 dlen = skb->len - skb->data_len;
88 if (dlen) {
89 buffer->element[element].addr = skb->data;
90 buffer->element[element].length = dlen;
91 element++;
92 }
93 for (cnt = 0; cnt < fragno; cnt++) {
94 frag = &skb_shinfo(skb)->frags[cnt];
95 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
96 frag->page_offset;
97 buffer->element[element].addr = (char *)addr;
98 buffer->element[element].length = frag->size;
99 if (cnt < (fragno - 1))
100 buffer->element[element].flags =
101 SBAL_FLAGS_MIDDLE_FRAG;
102 else
103 buffer->element[element].flags =
104 SBAL_FLAGS_LAST_FRAG;
105 element++;
106 }
107 *next_element_to_fill = element;
108}
109
110static inline const char *qeth_get_cardname(struct qeth_card *card)
111{
112 if (card->info.guestlan) {
113 switch (card->info.type) {
114 case QETH_CARD_TYPE_OSAE:
115 return " Guest LAN QDIO";
116 case QETH_CARD_TYPE_IQD:
117 return " Guest LAN Hiper";
118 default:
119 return " unknown";
120 }
121 } else {
122 switch (card->info.type) {
123 case QETH_CARD_TYPE_OSAE:
124 return " OSD Express";
125 case QETH_CARD_TYPE_IQD:
126 return " HiperSockets";
127 case QETH_CARD_TYPE_OSN:
128 return " OSN QDIO";
129 default:
130 return " unknown";
131 }
132 }
133 return " n/a";
134}
135
136/* max length to be returned: 14 */
137const char *qeth_get_cardname_short(struct qeth_card *card)
138{
139 if (card->info.guestlan) {
140 switch (card->info.type) {
141 case QETH_CARD_TYPE_OSAE:
142 return "GuestLAN QDIO";
143 case QETH_CARD_TYPE_IQD:
144 return "GuestLAN Hiper";
145 default:
146 return "unknown";
147 }
148 } else {
149 switch (card->info.type) {
150 case QETH_CARD_TYPE_OSAE:
151 switch (card->info.link_type) {
152 case QETH_LINK_TYPE_FAST_ETH:
153 return "OSD_100";
154 case QETH_LINK_TYPE_HSTR:
155 return "HSTR";
156 case QETH_LINK_TYPE_GBIT_ETH:
157 return "OSD_1000";
158 case QETH_LINK_TYPE_10GBIT_ETH:
159 return "OSD_10GIG";
160 case QETH_LINK_TYPE_LANE_ETH100:
161 return "OSD_FE_LANE";
162 case QETH_LINK_TYPE_LANE_TR:
163 return "OSD_TR_LANE";
164 case QETH_LINK_TYPE_LANE_ETH1000:
165 return "OSD_GbE_LANE";
166 case QETH_LINK_TYPE_LANE:
167 return "OSD_ATM_LANE";
168 default:
169 return "OSD_Express";
170 }
171 case QETH_CARD_TYPE_IQD:
172 return "HiperSockets";
173 case QETH_CARD_TYPE_OSN:
174 return "OSN";
175 default:
176 return "unknown";
177 }
178 }
179 return "n/a";
180}
181
182void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
183 int clear_start_mask)
184{
185 unsigned long flags;
186
187 spin_lock_irqsave(&card->thread_mask_lock, flags);
188 card->thread_allowed_mask = threads;
189 if (clear_start_mask)
190 card->thread_start_mask &= threads;
191 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
192 wake_up(&card->wait_q);
193}
194EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
195
196int qeth_threads_running(struct qeth_card *card, unsigned long threads)
197{
198 unsigned long flags;
199 int rc = 0;
200
201 spin_lock_irqsave(&card->thread_mask_lock, flags);
202 rc = (card->thread_running_mask & threads);
203 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
204 return rc;
205}
206EXPORT_SYMBOL_GPL(qeth_threads_running);
207
208int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
209{
210 return wait_event_interruptible(card->wait_q,
211 qeth_threads_running(card, threads) == 0);
212}
213EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
214
215void qeth_clear_working_pool_list(struct qeth_card *card)
216{
217 struct qeth_buffer_pool_entry *pool_entry, *tmp;
218
d11ba0c4 219 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
4a71df50
FB		 220 list_for_each_entry_safe(pool_entry, tmp,
221 &card->qdio.in_buf_pool.entry_list, list){
222 list_del(&pool_entry->list);
223 }
224}
225EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
226
227static int qeth_alloc_buffer_pool(struct qeth_card *card)
228{
229 struct qeth_buffer_pool_entry *pool_entry;
230 void *ptr;
231 int i, j;
232
d11ba0c4 233 QETH_DBF_TEXT(TRACE, 5, "alocpool");
4a71df50
FB		 234 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
235 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
236 if (!pool_entry) {
237 qeth_free_buffer_pool(card);
238 return -ENOMEM;
239 }
240 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 241 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 242 if (!ptr) {
243 while (j > 0)
244 free_page((unsigned long)
245 pool_entry->elements[--j]);
246 kfree(pool_entry);
247 qeth_free_buffer_pool(card);
248 return -ENOMEM;
249 }
250 pool_entry->elements[j] = ptr;
251 }
252 list_add(&pool_entry->init_list,
253 &card->qdio.init_pool.entry_list);
254 }
255 return 0;
256}
257
258int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
259{
d11ba0c4 260 QETH_DBF_TEXT(TRACE, 2, "realcbp");
4a71df50
FB		 261
262 if ((card->state != CARD_STATE_DOWN) &&
263 (card->state != CARD_STATE_RECOVER))
264 return -EPERM;
265
266 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
267 qeth_clear_working_pool_list(card);
268 qeth_free_buffer_pool(card);
269 card->qdio.in_buf_pool.buf_count = bufcnt;
270 card->qdio.init_pool.buf_count = bufcnt;
271 return qeth_alloc_buffer_pool(card);
272}
76b11f8e 273EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 274
4a71df50
FB		 275static int qeth_issue_next_read(struct qeth_card *card)
276{
277 int rc;
278 struct qeth_cmd_buffer *iob;
279
d11ba0c4 280 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
4a71df50
FB		 281 if (card->read.state != CH_STATE_UP)
282 return -EIO;
283 iob = qeth_get_buffer(&card->read);
284 if (!iob) {
74eacdb9
FB		 285 dev_warn(&card->gdev->dev, "The qeth device driver "
286 "failed to recover an error on the device\n");
287 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
288 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 289 return -ENOMEM;
290 }
291 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
d11ba0c4 292 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 293 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
294 (addr_t) iob, 0, 0);
295 if (rc) {
74eacdb9
FB		 296 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
297 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50
FB		 298 atomic_set(&card->read.irq_pending, 0);
299 qeth_schedule_recovery(card);
300 wake_up(&card->wait_q);
301 }
302 return rc;
303}
304
305static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
306{
307 struct qeth_reply *reply;
308
309 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
310 if (reply) {
311 atomic_set(&reply->refcnt, 1);
312 atomic_set(&reply->received, 0);
313 reply->card = card;
314 };
315 return reply;
316}
317
318static void qeth_get_reply(struct qeth_reply *reply)
319{
320 WARN_ON(atomic_read(&reply->refcnt) <= 0);
321 atomic_inc(&reply->refcnt);
322}
323
324static void qeth_put_reply(struct qeth_reply *reply)
325{
326 WARN_ON(atomic_read(&reply->refcnt) <= 0);
327 if (atomic_dec_and_test(&reply->refcnt))
328 kfree(reply);
329}
330
d11ba0c4 331static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 332 struct qeth_card *card)
333{
4a71df50 334 char *ipa_name;
d11ba0c4 335 int com = cmd->hdr.command;
4a71df50 336 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4
PT		 337 if (rc)
338 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
339 ipa_name, com, QETH_CARD_IFNAME(card),
340 rc, qeth_get_ipa_msg(rc));
341 else
342 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
343 ipa_name, com, QETH_CARD_IFNAME(card));
4a71df50
FB		 344}
345
346static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
347 struct qeth_cmd_buffer *iob)
348{
349 struct qeth_ipa_cmd *cmd = NULL;
350
d11ba0c4 351 QETH_DBF_TEXT(TRACE, 5, "chkipad");
4a71df50
FB		 352 if (IS_IPA(iob->data)) {
353 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
354 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 355 if (cmd->hdr.command != IPA_CMD_SETCCID &&
356 cmd->hdr.command != IPA_CMD_DELCCID &&
357 cmd->hdr.command != IPA_CMD_MODCCID &&
358 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 359 qeth_issue_ipa_msg(cmd,
360 cmd->hdr.return_code, card);
4a71df50
FB		 361 return cmd;
362 } else {
363 switch (cmd->hdr.command) {
364 case IPA_CMD_STOPLAN:
74eacdb9
FB		 365 dev_warn(&card->gdev->dev,
366 "The link for interface %s on CHPID"
367 " 0x%X failed\n",
4a71df50
FB		 368 QETH_CARD_IFNAME(card),
369 card->info.chpid);
370 card->lan_online = 0;
371 if (card->dev && netif_carrier_ok(card->dev))
372 netif_carrier_off(card->dev);
373 return NULL;
374 case IPA_CMD_STARTLAN:
74eacdb9
FB		 375 dev_info(&card->gdev->dev,
376 "The link for %s on CHPID 0x%X has"
377 " been restored\n",
4a71df50
FB		 378 QETH_CARD_IFNAME(card),
379 card->info.chpid);
380 netif_carrier_on(card->dev);
922dc062 381 card->lan_online = 1;
4a71df50
FB		 382 qeth_schedule_recovery(card);
383 return NULL;
384 case IPA_CMD_MODCCID:
385 return cmd;
386 case IPA_CMD_REGISTER_LOCAL_ADDR:
d11ba0c4 387 QETH_DBF_TEXT(TRACE, 3, "irla");
4a71df50
FB		 388 break;
389 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
d11ba0c4 390 QETH_DBF_TEXT(TRACE, 3, "urla");
4a71df50
FB		 391 break;
392 default:
c4cef07c 393 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 394 "but not a reply!\n");
395 break;
396 }
397 }
398 }
399 return cmd;
400}
401
402void qeth_clear_ipacmd_list(struct qeth_card *card)
403{
404 struct qeth_reply *reply, *r;
405 unsigned long flags;
406
d11ba0c4 407 QETH_DBF_TEXT(TRACE, 4, "clipalst");
4a71df50
FB		 408
409 spin_lock_irqsave(&card->lock, flags);
410 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
411 qeth_get_reply(reply);
412 reply->rc = -EIO;
413 atomic_inc(&reply->received);
414 list_del_init(&reply->list);
415 wake_up(&reply->wait_q);
416 qeth_put_reply(reply);
417 }
418 spin_unlock_irqrestore(&card->lock, flags);
419}
420EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
421
422static int qeth_check_idx_response(unsigned char *buffer)
423{
424 if (!buffer)
425 return 0;
426
d11ba0c4 427 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 428 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 429 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 430 "with cause code 0x%02x%s\n",
431 buffer[4],
432 ((buffer[4] == 0x22) ?
433 " -- try another portname" : ""));
d11ba0c4
PT		 434 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
435 QETH_DBF_TEXT(TRACE, 2, " idxterm");
436 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 437 return -EIO;
438 }
439 return 0;
440}
441
442static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
443 __u32 len)
444{
445 struct qeth_card *card;
446
d11ba0c4 447 QETH_DBF_TEXT(TRACE, 4, "setupccw");
4a71df50
FB		 448 card = CARD_FROM_CDEV(channel->ccwdev);
449 if (channel == &card->read)
450 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
451 else
452 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
453 channel->ccw.count = len;
454 channel->ccw.cda = (__u32) __pa(iob);
455}
456
457static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
458{
459 __u8 index;
460
d11ba0c4 461 QETH_DBF_TEXT(TRACE, 6, "getbuff");
4a71df50
FB		 462 index = channel->io_buf_no;
463 do {
464 if (channel->iob[index].state == BUF_STATE_FREE) {
465 channel->iob[index].state = BUF_STATE_LOCKED;
466 channel->io_buf_no = (channel->io_buf_no + 1) %
467 QETH_CMD_BUFFER_NO;
468 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
469 return channel->iob + index;
470 }
471 index = (index + 1) % QETH_CMD_BUFFER_NO;
472 } while (index != channel->io_buf_no);
473
474 return NULL;
475}
476
477void qeth_release_buffer(struct qeth_channel *channel,
478 struct qeth_cmd_buffer *iob)
479{
480 unsigned long flags;
481
d11ba0c4 482 QETH_DBF_TEXT(TRACE, 6, "relbuff");
4a71df50
FB		 483 spin_lock_irqsave(&channel->iob_lock, flags);
484 memset(iob->data, 0, QETH_BUFSIZE);
485 iob->state = BUF_STATE_FREE;
486 iob->callback = qeth_send_control_data_cb;
487 iob->rc = 0;
488 spin_unlock_irqrestore(&channel->iob_lock, flags);
489}
490EXPORT_SYMBOL_GPL(qeth_release_buffer);
491
492static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
493{
494 struct qeth_cmd_buffer *buffer = NULL;
495 unsigned long flags;
496
497 spin_lock_irqsave(&channel->iob_lock, flags);
498 buffer = __qeth_get_buffer(channel);
499 spin_unlock_irqrestore(&channel->iob_lock, flags);
500 return buffer;
501}
502
503struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
504{
505 struct qeth_cmd_buffer *buffer;
506 wait_event(channel->wait_q,
507 ((buffer = qeth_get_buffer(channel)) != NULL));
508 return buffer;
509}
510EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
511
512void qeth_clear_cmd_buffers(struct qeth_channel *channel)
513{
514 int cnt;
515
516 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
517 qeth_release_buffer(channel, &channel->iob[cnt]);
518 channel->buf_no = 0;
519 channel->io_buf_no = 0;
520}
521EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
522
523static void qeth_send_control_data_cb(struct qeth_channel *channel,
524 struct qeth_cmd_buffer *iob)
525{
526 struct qeth_card *card;
527 struct qeth_reply *reply, *r;
528 struct qeth_ipa_cmd *cmd;
529 unsigned long flags;
530 int keep_reply;
531
d11ba0c4 532 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
4a71df50
FB		 533
534 card = CARD_FROM_CDEV(channel->ccwdev);
535 if (qeth_check_idx_response(iob->data)) {
536 qeth_clear_ipacmd_list(card);
fc9c2460
UB		 537 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
538 dev_err(&card->gdev->dev,
539 "The qeth device is not configured "
540 "for the OSI layer required by z/VM\n");
869da90b
UB		 541 else
542 qeth_schedule_recovery(card);
4a71df50
FB		 543 goto out;
544 }
545
546 cmd = qeth_check_ipa_data(card, iob);
547 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
548 goto out;
549 /*in case of OSN : check if cmd is set */
550 if (card->info.type == QETH_CARD_TYPE_OSN &&
551 cmd &&
552 cmd->hdr.command != IPA_CMD_STARTLAN &&
553 card->osn_info.assist_cb != NULL) {
554 card->osn_info.assist_cb(card->dev, cmd);
555 goto out;
556 }
557
558 spin_lock_irqsave(&card->lock, flags);
559 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
560 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
561 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
562 qeth_get_reply(reply);
563 list_del_init(&reply->list);
564 spin_unlock_irqrestore(&card->lock, flags);
565 keep_reply = 0;
566 if (reply->callback != NULL) {
567 if (cmd) {
568 reply->offset = (__u16)((char *)cmd -
569 (char *)iob->data);
570 keep_reply = reply->callback(card,
571 reply,
572 (unsigned long)cmd);
573 } else
574 keep_reply = reply->callback(card,
575 reply,
576 (unsigned long)iob);
577 }
578 if (cmd)
579 reply->rc = (u16) cmd->hdr.return_code;
580 else if (iob->rc)
581 reply->rc = iob->rc;
582 if (keep_reply) {
583 spin_lock_irqsave(&card->lock, flags);
584 list_add_tail(&reply->list,
585 &card->cmd_waiter_list);
586 spin_unlock_irqrestore(&card->lock, flags);
587 } else {
588 atomic_inc(&reply->received);
589 wake_up(&reply->wait_q);
590 }
591 qeth_put_reply(reply);
592 goto out;
593 }
594 }
595 spin_unlock_irqrestore(&card->lock, flags);
596out:
597 memcpy(&card->seqno.pdu_hdr_ack,
598 QETH_PDU_HEADER_SEQ_NO(iob->data),
599 QETH_SEQ_NO_LENGTH);
600 qeth_release_buffer(channel, iob);
601}
602
603static int qeth_setup_channel(struct qeth_channel *channel)
604{
605 int cnt;
606
d11ba0c4 607 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50
FB		 608 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
609 channel->iob[cnt].data = (char *)
610 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
611 if (channel->iob[cnt].data == NULL)
612 break;
613 channel->iob[cnt].state = BUF_STATE_FREE;
614 channel->iob[cnt].channel = channel;
615 channel->iob[cnt].callback = qeth_send_control_data_cb;
616 channel->iob[cnt].rc = 0;
617 }
618 if (cnt < QETH_CMD_BUFFER_NO) {
619 while (cnt-- > 0)
620 kfree(channel->iob[cnt].data);
621 return -ENOMEM;
622 }
623 channel->buf_no = 0;
624 channel->io_buf_no = 0;
625 atomic_set(&channel->irq_pending, 0);
626 spin_lock_init(&channel->iob_lock);
627
628 init_waitqueue_head(&channel->wait_q);
629 return 0;
630}
631
632static int qeth_set_thread_start_bit(struct qeth_card *card,
633 unsigned long thread)
634{
635 unsigned long flags;
636
637 spin_lock_irqsave(&card->thread_mask_lock, flags);
638 if (!(card->thread_allowed_mask & thread) ||
639 (card->thread_start_mask & thread)) {
640 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
641 return -EPERM;
642 }
643 card->thread_start_mask |= thread;
644 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
645 return 0;
646}
647
648void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
649{
650 unsigned long flags;
651
652 spin_lock_irqsave(&card->thread_mask_lock, flags);
653 card->thread_start_mask &= ~thread;
654 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
655 wake_up(&card->wait_q);
656}
657EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
658
659void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
660{
661 unsigned long flags;
662
663 spin_lock_irqsave(&card->thread_mask_lock, flags);
664 card->thread_running_mask &= ~thread;
665 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
666 wake_up(&card->wait_q);
667}
668EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
669
670static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
671{
672 unsigned long flags;
673 int rc = 0;
674
675 spin_lock_irqsave(&card->thread_mask_lock, flags);
676 if (card->thread_start_mask & thread) {
677 if ((card->thread_allowed_mask & thread) &&
678 !(card->thread_running_mask & thread)) {
679 rc = 1;
680 card->thread_start_mask &= ~thread;
681 card->thread_running_mask |= thread;
682 } else
683 rc = -EPERM;
684 }
685 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
686 return rc;
687}
688
689int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
690{
691 int rc = 0;
692
693 wait_event(card->wait_q,
694 (rc = __qeth_do_run_thread(card, thread)) >= 0);
695 return rc;
696}
697EXPORT_SYMBOL_GPL(qeth_do_run_thread);
698
699void qeth_schedule_recovery(struct qeth_card *card)
700{
d11ba0c4 701 QETH_DBF_TEXT(TRACE, 2, "startrec");
4a71df50
FB		 702 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
703 schedule_work(&card->kernel_thread_starter);
704}
705EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
706
707static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
708{
709 int dstat, cstat;
710 char *sense;
711
712 sense = (char *) irb->ecw;
23d805b6
PO		 713 cstat = irb->scsw.cmd.cstat;
714 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 715
716 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
717 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
718 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
d11ba0c4 719 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
74eacdb9
FB		 720 dev_warn(&cdev->dev, "The qeth device driver "
721 "failed to recover an error on the device\n");
722 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
723 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 724 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
725 16, 1, irb, 64, 1);
726 return 1;
727 }
728
729 if (dstat & DEV_STAT_UNIT_CHECK) {
730 if (sense[SENSE_RESETTING_EVENT_BYTE] &
731 SENSE_RESETTING_EVENT_FLAG) {
d11ba0c4 732 QETH_DBF_TEXT(TRACE, 2, "REVIND");
4a71df50
FB		 733 return 1;
734 }
735 if (sense[SENSE_COMMAND_REJECT_BYTE] &
736 SENSE_COMMAND_REJECT_FLAG) {
d11ba0c4 737 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
28a7e4c9 738 return 1;
4a71df50
FB		 739 }
740 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
d11ba0c4 741 QETH_DBF_TEXT(TRACE, 2, "AFFE");
4a71df50
FB		 742 return 1;
743 }
744 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
d11ba0c4 745 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
4a71df50
FB		 746 return 0;
747 }
d11ba0c4 748 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
4a71df50
FB		 749 return 1;
750 }
751 return 0;
752}
753
754static long __qeth_check_irb_error(struct ccw_device *cdev,
755 unsigned long intparm, struct irb *irb)
756{
757 if (!IS_ERR(irb))
758 return 0;
759
760 switch (PTR_ERR(irb)) {
761 case -EIO:
74eacdb9
FB		 762 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
763 dev_name(&cdev->dev));
d11ba0c4
PT		 764 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
765 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 766 break;
767 case -ETIMEDOUT:
74eacdb9
FB		 768 dev_warn(&cdev->dev, "A hardware operation timed out"
769 " on the device\n");
d11ba0c4
PT		 770 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
771 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
4a71df50
FB		 772 if (intparm == QETH_RCD_PARM) {
773 struct qeth_card *card = CARD_FROM_CDEV(cdev);
774
775 if (card && (card->data.ccwdev == cdev)) {
776 card->data.state = CH_STATE_DOWN;
777 wake_up(&card->wait_q);
778 }
779 }
780 break;
781 default:
74eacdb9
FB		 782 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
783 dev_name(&cdev->dev), PTR_ERR(irb));
d11ba0c4
PT		 784 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
785 QETH_DBF_TEXT(TRACE, 2, " rc???");
4a71df50
FB		 786 }
787 return PTR_ERR(irb);
788}
789
790static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
791 struct irb *irb)
792{
793 int rc;
794 int cstat, dstat;
795 struct qeth_cmd_buffer *buffer;
796 struct qeth_channel *channel;
797 struct qeth_card *card;
798 struct qeth_cmd_buffer *iob;
799 __u8 index;
800
d11ba0c4 801 QETH_DBF_TEXT(TRACE, 5, "irq");
4a71df50
FB		 802
803 if (__qeth_check_irb_error(cdev, intparm, irb))
804 return;
23d805b6
PO		 805 cstat = irb->scsw.cmd.cstat;
806 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 807
808 card = CARD_FROM_CDEV(cdev);
809 if (!card)
810 return;
811
812 if (card->read.ccwdev == cdev) {
813 channel = &card->read;
d11ba0c4 814 QETH_DBF_TEXT(TRACE, 5, "read");
4a71df50
FB		 815 } else if (card->write.ccwdev == cdev) {
816 channel = &card->write;
d11ba0c4 817 QETH_DBF_TEXT(TRACE, 5, "write");
4a71df50
FB		 818 } else {
819 channel = &card->data;
d11ba0c4 820 QETH_DBF_TEXT(TRACE, 5, "data");
4a71df50
FB		 821 }
822 atomic_set(&channel->irq_pending, 0);
823
23d805b6 824 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 825 channel->state = CH_STATE_STOPPED;
826
23d805b6 827 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 828 channel->state = CH_STATE_HALTED;
829
830 /*let's wake up immediately on data channel*/
831 if ((channel == &card->data) && (intparm != 0) &&
832 (intparm != QETH_RCD_PARM))
833 goto out;
834
835 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
d11ba0c4 836 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
4a71df50
FB		 837 /* we don't have to handle this further */
838 intparm = 0;
839 }
840 if (intparm == QETH_HALT_CHANNEL_PARM) {
d11ba0c4 841 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
4a71df50
FB		 842 /* we don't have to handle this further */
843 intparm = 0;
844 }
845 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
846 (dstat & DEV_STAT_UNIT_CHECK) ||
847 (cstat)) {
848 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 849 dev_warn(&channel->ccwdev->dev,
850 "The qeth device driver failed to recover "
851 "an error on the device\n");
852 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
853 "0x%X dstat 0x%X\n",
854 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 855 print_hex_dump(KERN_WARNING, "qeth: irb ",
856 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
857 print_hex_dump(KERN_WARNING, "qeth: sense data ",
858 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
859 }
860 if (intparm == QETH_RCD_PARM) {
861 channel->state = CH_STATE_DOWN;
862 goto out;
863 }
864 rc = qeth_get_problem(cdev, irb);
865 if (rc) {
28a7e4c9 866 qeth_clear_ipacmd_list(card);
4a71df50
FB		 867 qeth_schedule_recovery(card);
868 goto out;
869 }
870 }
871
872 if (intparm == QETH_RCD_PARM) {
873 channel->state = CH_STATE_RCD_DONE;
874 goto out;
875 }
876 if (intparm) {
877 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
878 buffer->state = BUF_STATE_PROCESSED;
879 }
880 if (channel == &card->data)
881 return;
882 if (channel == &card->read &&
883 channel->state == CH_STATE_UP)
884 qeth_issue_next_read(card);
885
886 iob = channel->iob;
887 index = channel->buf_no;
888 while (iob[index].state == BUF_STATE_PROCESSED) {
889 if (iob[index].callback != NULL)
890 iob[index].callback(channel, iob + index);
891
892 index = (index + 1) % QETH_CMD_BUFFER_NO;
893 }
894 channel->buf_no = index;
895out:
896 wake_up(&card->wait_q);
897 return;
898}
899
58490f18
KDW		 900static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
901 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb)
4a71df50
FB		 902{
903 int i;
904 struct sk_buff *skb;
905
906 /* is PCI flag set on buffer? */
907 if (buf->buffer->element[0].flags & 0x40)
908 atomic_dec(&queue->set_pci_flags_count);
909
58490f18 910 if (!qeth_skip_skb) {
4a71df50 911 skb = skb_dequeue(&buf->skb_list);
58490f18
KDW		 912 while (skb) {
913 atomic_dec(&skb->users);
914 dev_kfree_skb_any(skb);
915 skb = skb_dequeue(&buf->skb_list);
916 }
4a71df50 917 }
4a71df50 918 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 919 if (buf->buffer->element[i].addr && buf->is_header[i])
920 kmem_cache_free(qeth_core_header_cache,
921 buf->buffer->element[i].addr);
922 buf->is_header[i] = 0;
4a71df50
FB		 923 buf->buffer->element[i].length = 0;
924 buf->buffer->element[i].addr = NULL;
925 buf->buffer->element[i].flags = 0;
926 }
9f29f6de 927 buf->buffer->element[15].flags = 0;
4a71df50
FB		 928 buf->next_element_to_fill = 0;
929 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
930}
931
58490f18
KDW		 932static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
933 struct qeth_qdio_out_buffer *buf)
934{
935 __qeth_clear_output_buffer(queue, buf, 0);
936}
937
4a71df50
FB		 938void qeth_clear_qdio_buffers(struct qeth_card *card)
939{
940 int i, j;
941
d11ba0c4 942 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
4a71df50
FB		 943 /* clear outbound buffers to free skbs */
944 for (i = 0; i < card->qdio.no_out_queues; ++i)
945 if (card->qdio.out_qs[i]) {
946 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
947 qeth_clear_output_buffer(card->qdio.out_qs[i],
948 &card->qdio.out_qs[i]->bufs[j]);
949 }
950}
951EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
952
953static void qeth_free_buffer_pool(struct qeth_card *card)
954{
955 struct qeth_buffer_pool_entry *pool_entry, *tmp;
956 int i = 0;
d11ba0c4 957 QETH_DBF_TEXT(TRACE, 5, "freepool");
4a71df50
FB		 958 list_for_each_entry_safe(pool_entry, tmp,
959 &card->qdio.init_pool.entry_list, init_list){
960 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
961 free_page((unsigned long)pool_entry->elements[i]);
962 list_del(&pool_entry->init_list);
963 kfree(pool_entry);
964 }
965}
966
967static void qeth_free_qdio_buffers(struct qeth_card *card)
968{
969 int i, j;
970
d11ba0c4 971 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
4a71df50
FB		 972 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
973 QETH_QDIO_UNINITIALIZED)
974 return;
975 kfree(card->qdio.in_q);
976 card->qdio.in_q = NULL;
977 /* inbound buffer pool */
978 qeth_free_buffer_pool(card);
979 /* free outbound qdio_qs */
980 if (card->qdio.out_qs) {
981 for (i = 0; i < card->qdio.no_out_queues; ++i) {
982 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
983 qeth_clear_output_buffer(card->qdio.out_qs[i],
984 &card->qdio.out_qs[i]->bufs[j]);
985 kfree(card->qdio.out_qs[i]);
986 }
987 kfree(card->qdio.out_qs);
988 card->qdio.out_qs = NULL;
989 }
990}
991
992static void qeth_clean_channel(struct qeth_channel *channel)
993{
994 int cnt;
995
d11ba0c4 996 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 997 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
998 kfree(channel->iob[cnt].data);
999}
1000
1001static int qeth_is_1920_device(struct qeth_card *card)
1002{
1003 int single_queue = 0;
1004 struct ccw_device *ccwdev;
1005 struct channelPath_dsc {
1006 u8 flags;
1007 u8 lsn;
1008 u8 desc;
1009 u8 chpid;
1010 u8 swla;
1011 u8 zeroes;
1012 u8 chla;
1013 u8 chpp;
1014 } *chp_dsc;
1015
d11ba0c4 1016 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
4a71df50
FB		 1017
1018 ccwdev = card->data.ccwdev;
1019 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1020 if (chp_dsc != NULL) {
1021 /* CHPP field bit 6 == 1 -> single queue */
1022 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1023 kfree(chp_dsc);
1024 }
d11ba0c4 1025 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
4a71df50
FB		 1026 return single_queue;
1027}
1028
1029static void qeth_init_qdio_info(struct qeth_card *card)
1030{
d11ba0c4 1031 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1032 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1033 /* inbound */
1034 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1035 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1036 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1037 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1038 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1039}
1040
1041static void qeth_set_intial_options(struct qeth_card *card)
1042{
1043 card->options.route4.type = NO_ROUTER;
1044 card->options.route6.type = NO_ROUTER;
1045 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1046 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1047 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1048 card->options.fake_broadcast = 0;
1049 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1050 card->options.performance_stats = 0;
1051 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1052 card->options.isolation = ISOLATION_MODE_NONE;
4a71df50
FB		 1053}
1054
1055static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1056{
1057 unsigned long flags;
1058 int rc = 0;
1059
1060 spin_lock_irqsave(&card->thread_mask_lock, flags);
d11ba0c4 1061 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
4a71df50
FB		 1062 (u8) card->thread_start_mask,
1063 (u8) card->thread_allowed_mask,
1064 (u8) card->thread_running_mask);
1065 rc = (card->thread_start_mask & thread);
1066 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1067 return rc;
1068}
1069
1070static void qeth_start_kernel_thread(struct work_struct *work)
1071{
1072 struct qeth_card *card = container_of(work, struct qeth_card,
1073 kernel_thread_starter);
d11ba0c4 1074 QETH_DBF_TEXT(TRACE , 2, "strthrd");
4a71df50
FB		 1075
1076 if (card->read.state != CH_STATE_UP &&
1077 card->write.state != CH_STATE_UP)
1078 return;
1079 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1080 kthread_run(card->discipline.recover, (void *) card,
1081 "qeth_recover");
1082}
1083
1084static int qeth_setup_card(struct qeth_card *card)
1085{
1086
d11ba0c4
PT		 1087 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1088 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1089
1090 card->read.state = CH_STATE_DOWN;
1091 card->write.state = CH_STATE_DOWN;
1092 card->data.state = CH_STATE_DOWN;
1093 card->state = CARD_STATE_DOWN;
1094 card->lan_online = 0;
1095 card->use_hard_stop = 0;
1096 card->dev = NULL;
1097 spin_lock_init(&card->vlanlock);
1098 spin_lock_init(&card->mclock);
1099 card->vlangrp = NULL;
1100 spin_lock_init(&card->lock);
1101 spin_lock_init(&card->ip_lock);
1102 spin_lock_init(&card->thread_mask_lock);
1103 card->thread_start_mask = 0;
1104 card->thread_allowed_mask = 0;
1105 card->thread_running_mask = 0;
1106 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1107 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1108 INIT_LIST_HEAD(card->ip_tbd_list);
1109 INIT_LIST_HEAD(&card->cmd_waiter_list);
1110 init_waitqueue_head(&card->wait_q);
1111 /* intial options */
1112 qeth_set_intial_options(card);
1113 /* IP address takeover */
1114 INIT_LIST_HEAD(&card->ipato.entries);
1115 card->ipato.enabled = 0;
1116 card->ipato.invert4 = 0;
1117 card->ipato.invert6 = 0;
1118 /* init QDIO stuff */
1119 qeth_init_qdio_info(card);
1120 return 0;
1121}
1122
6bcac508
MS		 1123static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1124{
1125 struct qeth_card *card = container_of(slr, struct qeth_card,
1126 qeth_service_level);
0d788c7d
KDW		 1127 if (card->info.mcl_level[0])
1128 seq_printf(m, "qeth: %s firmware level %s\n",
1129 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1130}
1131
4a71df50
FB		 1132static struct qeth_card *qeth_alloc_card(void)
1133{
1134 struct qeth_card *card;
1135
d11ba0c4 1136 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1137 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1138 if (!card)
76b11f8e 1139 goto out;
d11ba0c4 1140 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1141 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1142 if (!card->ip_tbd_list) {
1143 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1144 goto out_card;
4a71df50 1145 }
76b11f8e
UB		 1146 if (qeth_setup_channel(&card->read))
1147 goto out_ip;
1148 if (qeth_setup_channel(&card->write))
1149 goto out_channel;
4a71df50 1150 card->options.layer2 = -1;
6bcac508
MS		 1151 card->qeth_service_level.seq_print = qeth_core_sl_print;
1152 register_service_level(&card->qeth_service_level);
4a71df50 1153 return card;
76b11f8e
UB		 1154
1155out_channel:
1156 qeth_clean_channel(&card->read);
1157out_ip:
1158 kfree(card->ip_tbd_list);
1159out_card:
1160 kfree(card);
1161out:
1162 return NULL;
4a71df50
FB		 1163}
1164
1165static int qeth_determine_card_type(struct qeth_card *card)
1166{
1167 int i = 0;
1168
d11ba0c4 1169 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1170
1171 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1172 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1173 while (known_devices[i][4]) {
1174 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1175 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1176 card->info.type = known_devices[i][4];
1177 card->qdio.no_out_queues = known_devices[i][8];
1178 card->info.is_multicast_different = known_devices[i][9];
1179 if (qeth_is_1920_device(card)) {
74eacdb9
FB		 1180 dev_info(&card->gdev->dev,
1181 "Priority Queueing not supported\n");
4a71df50
FB		 1182 card->qdio.no_out_queues = 1;
1183 card->qdio.default_out_queue = 0;
1184 }
1185 return 0;
1186 }
1187 i++;
1188 }
1189 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1190 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1191 "unknown type\n");
4a71df50
FB		 1192 return -ENOENT;
1193}
1194
1195static int qeth_clear_channel(struct qeth_channel *channel)
1196{
1197 unsigned long flags;
1198 struct qeth_card *card;
1199 int rc;
1200
d11ba0c4 1201 QETH_DBF_TEXT(TRACE, 3, "clearch");
4a71df50
FB		 1202 card = CARD_FROM_CDEV(channel->ccwdev);
1203 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1204 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1205 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1206
1207 if (rc)
1208 return rc;
1209 rc = wait_event_interruptible_timeout(card->wait_q,
1210 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1211 if (rc == -ERESTARTSYS)
1212 return rc;
1213 if (channel->state != CH_STATE_STOPPED)
1214 return -ETIME;
1215 channel->state = CH_STATE_DOWN;
1216 return 0;
1217}
1218
1219static int qeth_halt_channel(struct qeth_channel *channel)
1220{
1221 unsigned long flags;
1222 struct qeth_card *card;
1223 int rc;
1224
d11ba0c4 1225 QETH_DBF_TEXT(TRACE, 3, "haltch");
4a71df50
FB		 1226 card = CARD_FROM_CDEV(channel->ccwdev);
1227 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1228 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1229 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1230
1231 if (rc)
1232 return rc;
1233 rc = wait_event_interruptible_timeout(card->wait_q,
1234 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1235 if (rc == -ERESTARTSYS)
1236 return rc;
1237 if (channel->state != CH_STATE_HALTED)
1238 return -ETIME;
1239 return 0;
1240}
1241
1242static int qeth_halt_channels(struct qeth_card *card)
1243{
1244 int rc1 = 0, rc2 = 0, rc3 = 0;
1245
d11ba0c4 1246 QETH_DBF_TEXT(TRACE, 3, "haltchs");
4a71df50
FB		 1247 rc1 = qeth_halt_channel(&card->read);
1248 rc2 = qeth_halt_channel(&card->write);
1249 rc3 = qeth_halt_channel(&card->data);
1250 if (rc1)
1251 return rc1;
1252 if (rc2)
1253 return rc2;
1254 return rc3;
1255}
1256
1257static int qeth_clear_channels(struct qeth_card *card)
1258{
1259 int rc1 = 0, rc2 = 0, rc3 = 0;
1260
d11ba0c4 1261 QETH_DBF_TEXT(TRACE, 3, "clearchs");
4a71df50
FB		 1262 rc1 = qeth_clear_channel(&card->read);
1263 rc2 = qeth_clear_channel(&card->write);
1264 rc3 = qeth_clear_channel(&card->data);
1265 if (rc1)
1266 return rc1;
1267 if (rc2)
1268 return rc2;
1269 return rc3;
1270}
1271
1272static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1273{
1274 int rc = 0;
1275
d11ba0c4
PT		 1276 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1277 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
4a71df50
FB		 1278
1279 if (halt)
1280 rc = qeth_halt_channels(card);
1281 if (rc)
1282 return rc;
1283 return qeth_clear_channels(card);
1284}
1285
1286int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1287{
1288 int rc = 0;
1289
d11ba0c4 1290 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
4a71df50
FB		 1291 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1292 QETH_QDIO_CLEANING)) {
1293 case QETH_QDIO_ESTABLISHED:
1294 if (card->info.type == QETH_CARD_TYPE_IQD)
1295 rc = qdio_cleanup(CARD_DDEV(card),
1296 QDIO_FLAG_CLEANUP_USING_HALT);
1297 else
1298 rc = qdio_cleanup(CARD_DDEV(card),
1299 QDIO_FLAG_CLEANUP_USING_CLEAR);
1300 if (rc)
d11ba0c4 1301 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
4a71df50
FB		 1302 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1303 break;
1304 case QETH_QDIO_CLEANING:
1305 return rc;
1306 default:
1307 break;
1308 }
1309 rc = qeth_clear_halt_card(card, use_halt);
1310 if (rc)
d11ba0c4 1311 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
4a71df50
FB		 1312 card->state = CARD_STATE_DOWN;
1313 return rc;
1314}
1315EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1316
1317static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1318 int *length)
1319{
1320 struct ciw *ciw;
1321 char *rcd_buf;
1322 int ret;
1323 struct qeth_channel *channel = &card->data;
1324 unsigned long flags;
1325
1326 /*
1327 * scan for RCD command in extended SenseID data
1328 */
1329 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1330 if (!ciw || ciw->cmd == 0)
1331 return -EOPNOTSUPP;
1332 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1333 if (!rcd_buf)
1334 return -ENOMEM;
1335
1336 channel->ccw.cmd_code = ciw->cmd;
1337 channel->ccw.cda = (__u32) __pa(rcd_buf);
1338 channel->ccw.count = ciw->count;
1339 channel->ccw.flags = CCW_FLAG_SLI;
1340 channel->state = CH_STATE_RCD;
1341 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1342 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1343 QETH_RCD_PARM, LPM_ANYPATH, 0,
1344 QETH_RCD_TIMEOUT);
1345 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1346 if (!ret)
1347 wait_event(card->wait_q,
1348 (channel->state == CH_STATE_RCD_DONE ||
1349 channel->state == CH_STATE_DOWN));
1350 if (channel->state == CH_STATE_DOWN)
1351 ret = -EIO;
1352 else
1353 channel->state = CH_STATE_DOWN;
1354 if (ret) {
1355 kfree(rcd_buf);
1356 *buffer = NULL;
1357 *length = 0;
1358 } else {
1359 *length = ciw->count;
1360 *buffer = rcd_buf;
1361 }
1362 return ret;
1363}
1364
a60389ab 1365static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1366{
a60389ab 1367 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1368 card->info.chpid = prcd[30];
1369 card->info.unit_addr2 = prcd[31];
1370 card->info.cula = prcd[63];
1371 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1372 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1373}
1374
1375static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1376{
1377 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1378
1379 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1380 card->info.blkt.time_total = 250;
1381 card->info.blkt.inter_packet = 5;
1382 card->info.blkt.inter_packet_jumbo = 15;
1383 } else {
1384 card->info.blkt.time_total = 0;
1385 card->info.blkt.inter_packet = 0;
1386 card->info.blkt.inter_packet_jumbo = 0;
1387 }
4a71df50
FB		 1388}
1389
1390static void qeth_init_tokens(struct qeth_card *card)
1391{
1392 card->token.issuer_rm_w = 0x00010103UL;
1393 card->token.cm_filter_w = 0x00010108UL;
1394 card->token.cm_connection_w = 0x0001010aUL;
1395 card->token.ulp_filter_w = 0x0001010bUL;
1396 card->token.ulp_connection_w = 0x0001010dUL;
1397}
1398
1399static void qeth_init_func_level(struct qeth_card *card)
1400{
1401 if (card->ipato.enabled) {
1402 if (card->info.type == QETH_CARD_TYPE_IQD)
1403 card->info.func_level =
1404 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1405 else
1406 card->info.func_level =
1407 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1408 } else {
1409 if (card->info.type == QETH_CARD_TYPE_IQD)
1410 /*FIXME:why do we have same values for dis and ena for
1411 osae??? */
1412 card->info.func_level =
1413 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1414 else
1415 card->info.func_level =
1416 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1417 }
1418}
1419
4a71df50
FB		 1420static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1421 void (*idx_reply_cb)(struct qeth_channel *,
1422 struct qeth_cmd_buffer *))
1423{
1424 struct qeth_cmd_buffer *iob;
1425 unsigned long flags;
1426 int rc;
1427 struct qeth_card *card;
1428
d11ba0c4 1429 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1430 card = CARD_FROM_CDEV(channel->ccwdev);
1431 iob = qeth_get_buffer(channel);
1432 iob->callback = idx_reply_cb;
1433 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1434 channel->ccw.count = QETH_BUFSIZE;
1435 channel->ccw.cda = (__u32) __pa(iob->data);
1436
1437 wait_event(card->wait_q,
1438 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1439 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1440 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1441 rc = ccw_device_start(channel->ccwdev,
1442 &channel->ccw, (addr_t) iob, 0, 0);
1443 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1444
1445 if (rc) {
14cc21b6 1446 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1447 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1448 atomic_set(&channel->irq_pending, 0);
1449 wake_up(&card->wait_q);
1450 return rc;
1451 }
1452 rc = wait_event_interruptible_timeout(card->wait_q,
1453 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1454 if (rc == -ERESTARTSYS)
1455 return rc;
1456 if (channel->state != CH_STATE_UP) {
1457 rc = -ETIME;
d11ba0c4 1458 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1459 qeth_clear_cmd_buffers(channel);
1460 } else
1461 rc = 0;
1462 return rc;
1463}
1464
1465static int qeth_idx_activate_channel(struct qeth_channel *channel,
1466 void (*idx_reply_cb)(struct qeth_channel *,
1467 struct qeth_cmd_buffer *))
1468{
1469 struct qeth_card *card;
1470 struct qeth_cmd_buffer *iob;
1471 unsigned long flags;
1472 __u16 temp;
1473 __u8 tmp;
1474 int rc;
f06f6f32 1475 struct ccw_dev_id temp_devid;
4a71df50
FB		 1476
1477 card = CARD_FROM_CDEV(channel->ccwdev);
1478
d11ba0c4 1479 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1480
1481 iob = qeth_get_buffer(channel);
1482 iob->callback = idx_reply_cb;
1483 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1484 channel->ccw.count = IDX_ACTIVATE_SIZE;
1485 channel->ccw.cda = (__u32) __pa(iob->data);
1486 if (channel == &card->write) {
1487 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1488 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1489 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1490 card->seqno.trans_hdr++;
1491 } else {
1492 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1493 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1494 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1495 }
1496 tmp = ((__u8)card->info.portno) | 0x80;
1497 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1498 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1499 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1500 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1501 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1502 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1503 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1504 temp = (card->info.cula << 8) + card->info.unit_addr2;
1505 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1506
1507 wait_event(card->wait_q,
1508 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1509 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1510 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1511 rc = ccw_device_start(channel->ccwdev,
1512 &channel->ccw, (addr_t) iob, 0, 0);
1513 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1514
1515 if (rc) {
14cc21b6
FB		 1516 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1517 rc);
d11ba0c4 1518 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1519 atomic_set(&channel->irq_pending, 0);
1520 wake_up(&card->wait_q);
1521 return rc;
1522 }
1523 rc = wait_event_interruptible_timeout(card->wait_q,
1524 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1525 if (rc == -ERESTARTSYS)
1526 return rc;
1527 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1528 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1529 " failed to recover an error on the device\n");
1530 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1531 dev_name(&channel->ccwdev->dev));
d11ba0c4 1532 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1533 qeth_clear_cmd_buffers(channel);
1534 return -ETIME;
1535 }
1536 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1537}
1538
1539static int qeth_peer_func_level(int level)
1540{
1541 if ((level & 0xff) == 8)
1542 return (level & 0xff) + 0x400;
1543 if (((level >> 8) & 3) == 1)
1544 return (level & 0xff) + 0x200;
1545 return level;
1546}
1547
1548static void qeth_idx_write_cb(struct qeth_channel *channel,
1549 struct qeth_cmd_buffer *iob)
1550{
1551 struct qeth_card *card;
1552 __u16 temp;
1553
d11ba0c4 1554 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1555
1556 if (channel->state == CH_STATE_DOWN) {
1557 channel->state = CH_STATE_ACTIVATING;
1558 goto out;
1559 }
1560 card = CARD_FROM_CDEV(channel->ccwdev);
1561
1562 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1563 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
74eacdb9
FB		 1564 dev_err(&card->write.ccwdev->dev,
1565 "The adapter is used exclusively by another "
1566 "host\n");
4a71df50 1567 else
74eacdb9
FB		 1568 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1569 " negative reply\n",
1570 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1571 goto out;
1572 }
1573 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1574 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1575 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1576 "function level mismatch (sent: 0x%x, received: "
1577 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1578 card->info.func_level, temp);
4a71df50
FB		 1579 goto out;
1580 }
1581 channel->state = CH_STATE_UP;
1582out:
1583 qeth_release_buffer(channel, iob);
1584}
1585
1586static void qeth_idx_read_cb(struct qeth_channel *channel,
1587 struct qeth_cmd_buffer *iob)
1588{
1589 struct qeth_card *card;
1590 __u16 temp;
1591
d11ba0c4 1592 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1593 if (channel->state == CH_STATE_DOWN) {
1594 channel->state = CH_STATE_ACTIVATING;
1595 goto out;
1596 }
1597
1598 card = CARD_FROM_CDEV(channel->ccwdev);
1599 if (qeth_check_idx_response(iob->data))
1600 goto out;
1601
1602 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1603 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
74eacdb9
FB		 1604 dev_err(&card->write.ccwdev->dev,
1605 "The adapter is used exclusively by another "
1606 "host\n");
4a71df50 1607 else
74eacdb9
FB		 1608 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1609 " negative reply\n",
1610 dev_name(&card->read.ccwdev->dev));
4a71df50
FB		 1611 goto out;
1612 }
1613
1614/**
1615 * temporary fix for microcode bug
1616 * to revert it,replace OR by AND
1617 */
1618 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1619 (card->info.type == QETH_CARD_TYPE_OSAE))
1620 card->info.portname_required = 1;
1621
1622 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1623 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1624 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1625 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1626 dev_name(&card->read.ccwdev->dev),
1627 card->info.func_level, temp);
4a71df50
FB		 1628 goto out;
1629 }
1630 memcpy(&card->token.issuer_rm_r,
1631 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1632 QETH_MPC_TOKEN_LENGTH);
1633 memcpy(&card->info.mcl_level[0],
1634 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1635 channel->state = CH_STATE_UP;
1636out:
1637 qeth_release_buffer(channel, iob);
1638}
1639
1640void qeth_prepare_control_data(struct qeth_card *card, int len,
1641 struct qeth_cmd_buffer *iob)
1642{
1643 qeth_setup_ccw(&card->write, iob->data, len);
1644 iob->callback = qeth_release_buffer;
1645
1646 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1647 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1648 card->seqno.trans_hdr++;
1649 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1650 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1651 card->seqno.pdu_hdr++;
1652 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1653 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1654 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1655}
1656EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1657
1658int qeth_send_control_data(struct qeth_card *card, int len,
1659 struct qeth_cmd_buffer *iob,
1660 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1661 unsigned long),
1662 void *reply_param)
1663{
1664 int rc;
1665 unsigned long flags;
1666 struct qeth_reply *reply = NULL;
7834cd5a 1667 unsigned long timeout, event_timeout;
5b54e16f 1668 struct qeth_ipa_cmd *cmd;
4a71df50 1669
d11ba0c4 1670 QETH_DBF_TEXT(TRACE, 2, "sendctl");
4a71df50
FB		 1671
1672 reply = qeth_alloc_reply(card);
1673 if (!reply) {
4a71df50
FB		 1674 return -ENOMEM;
1675 }
1676 reply->callback = reply_cb;
1677 reply->param = reply_param;
1678 if (card->state == CARD_STATE_DOWN)
1679 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1680 else
1681 reply->seqno = card->seqno.ipa++;
1682 init_waitqueue_head(&reply->wait_q);
1683 spin_lock_irqsave(&card->lock, flags);
1684 list_add_tail(&reply->list, &card->cmd_waiter_list);
1685 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1686 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1687
1688 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1689 qeth_prepare_control_data(card, len, iob);
1690
1691 if (IS_IPA(iob->data))
7834cd5a 1692 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 1693 else
7834cd5a
HC		 1694 event_timeout = QETH_TIMEOUT;
1695 timeout = jiffies + event_timeout;
4a71df50 1696
d11ba0c4 1697 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 1698 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1699 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1700 (addr_t) iob, 0, 0);
1701 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1702 if (rc) {
74eacdb9
FB		 1703 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1704 "ccw_device_start rc = %i\n",
1705 dev_name(&card->write.ccwdev->dev), rc);
d11ba0c4 1706 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
4a71df50
FB		 1707 spin_lock_irqsave(&card->lock, flags);
1708 list_del_init(&reply->list);
1709 qeth_put_reply(reply);
1710 spin_unlock_irqrestore(&card->lock, flags);
1711 qeth_release_buffer(iob->channel, iob);
1712 atomic_set(&card->write.irq_pending, 0);
1713 wake_up(&card->wait_q);
1714 return rc;
1715 }
5b54e16f
FB		 1716
1717 /* we have only one long running ipassist, since we can ensure
1718 process context of this command we can sleep */
1719 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1720 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1721 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1722 if (!wait_event_timeout(reply->wait_q,
7834cd5a 1723 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 1724 goto time_err;
1725 } else {
1726 while (!atomic_read(&reply->received)) {
1727 if (time_after(jiffies, timeout))
1728 goto time_err;
1729 cpu_relax();
1730 };
1731 }
1732
1733 rc = reply->rc;
1734 qeth_put_reply(reply);
1735 return rc;
1736
1737time_err:
1738 spin_lock_irqsave(&reply->card->lock, flags);
1739 list_del_init(&reply->list);
1740 spin_unlock_irqrestore(&reply->card->lock, flags);
1741 reply->rc = -ETIME;
1742 atomic_inc(&reply->received);
1743 wake_up(&reply->wait_q);
4a71df50
FB		 1744 rc = reply->rc;
1745 qeth_put_reply(reply);
1746 return rc;
1747}
1748EXPORT_SYMBOL_GPL(qeth_send_control_data);
1749
1750static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1751 unsigned long data)
1752{
1753 struct qeth_cmd_buffer *iob;
1754
d11ba0c4 1755 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 1756
1757 iob = (struct qeth_cmd_buffer *) data;
1758 memcpy(&card->token.cm_filter_r,
1759 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1760 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1761 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1762 return 0;
1763}
1764
1765static int qeth_cm_enable(struct qeth_card *card)
1766{
1767 int rc;
1768 struct qeth_cmd_buffer *iob;
1769
d11ba0c4 1770 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 1771
1772 iob = qeth_wait_for_buffer(&card->write);
1773 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1774 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1775 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1776 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1777 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1778
1779 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1780 qeth_cm_enable_cb, NULL);
1781 return rc;
1782}
1783
1784static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1785 unsigned long data)
1786{
1787
1788 struct qeth_cmd_buffer *iob;
1789
d11ba0c4 1790 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 1791
1792 iob = (struct qeth_cmd_buffer *) data;
1793 memcpy(&card->token.cm_connection_r,
1794 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1795 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1796 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1797 return 0;
1798}
1799
1800static int qeth_cm_setup(struct qeth_card *card)
1801{
1802 int rc;
1803 struct qeth_cmd_buffer *iob;
1804
d11ba0c4 1805 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 1806
1807 iob = qeth_wait_for_buffer(&card->write);
1808 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1809 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1810 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1811 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1812 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1813 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1814 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1815 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1816 qeth_cm_setup_cb, NULL);
1817 return rc;
1818
1819}
1820
1821static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1822{
1823 switch (card->info.type) {
1824 case QETH_CARD_TYPE_UNKNOWN:
1825 return 1500;
1826 case QETH_CARD_TYPE_IQD:
1827 return card->info.max_mtu;
1828 case QETH_CARD_TYPE_OSAE:
1829 switch (card->info.link_type) {
1830 case QETH_LINK_TYPE_HSTR:
1831 case QETH_LINK_TYPE_LANE_TR:
1832 return 2000;
1833 default:
1834 return 1492;
1835 }
1836 default:
1837 return 1500;
1838 }
1839}
1840
1841static inline int qeth_get_max_mtu_for_card(int cardtype)
1842{
1843 switch (cardtype) {
1844
1845 case QETH_CARD_TYPE_UNKNOWN:
1846 case QETH_CARD_TYPE_OSAE:
1847 case QETH_CARD_TYPE_OSN:
1848 return 61440;
1849 case QETH_CARD_TYPE_IQD:
1850 return 57344;
1851 default:
1852 return 1500;
1853 }
1854}
1855
1856static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1857{
1858 switch (cardtype) {
1859 case QETH_CARD_TYPE_IQD:
1860 return 1;
1861 default:
1862 return 0;
1863 }
1864}
1865
1866static inline int qeth_get_mtu_outof_framesize(int framesize)
1867{
1868 switch (framesize) {
1869 case 0x4000:
1870 return 8192;
1871 case 0x6000:
1872 return 16384;
1873 case 0xa000:
1874 return 32768;
1875 case 0xffff:
1876 return 57344;
1877 default:
1878 return 0;
1879 }
1880}
1881
1882static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1883{
1884 switch (card->info.type) {
1885 case QETH_CARD_TYPE_OSAE:
1886 return ((mtu >= 576) && (mtu <= 61440));
1887 case QETH_CARD_TYPE_IQD:
1888 return ((mtu >= 576) &&
1889 (mtu <= card->info.max_mtu + 4096 - 32));
1890 case QETH_CARD_TYPE_OSN:
1891 case QETH_CARD_TYPE_UNKNOWN:
1892 default:
1893 return 1;
1894 }
1895}
1896
1897static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1898 unsigned long data)
1899{
1900
1901 __u16 mtu, framesize;
1902 __u16 len;
1903 __u8 link_type;
1904 struct qeth_cmd_buffer *iob;
1905
d11ba0c4 1906 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 1907
1908 iob = (struct qeth_cmd_buffer *) data;
1909 memcpy(&card->token.ulp_filter_r,
1910 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1911 QETH_MPC_TOKEN_LENGTH);
1912 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1913 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1914 mtu = qeth_get_mtu_outof_framesize(framesize);
1915 if (!mtu) {
1916 iob->rc = -EINVAL;
d11ba0c4 1917 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1918 return 0;
1919 }
1920 card->info.max_mtu = mtu;
1921 card->info.initial_mtu = mtu;
1922 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1923 } else {
1924 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1925 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1926 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1927 }
1928
1929 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1930 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1931 memcpy(&link_type,
1932 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1933 card->info.link_type = link_type;
1934 } else
1935 card->info.link_type = 0;
d11ba0c4 1936 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1937 return 0;
1938}
1939
1940static int qeth_ulp_enable(struct qeth_card *card)
1941{
1942 int rc;
1943 char prot_type;
1944 struct qeth_cmd_buffer *iob;
1945
1946 /*FIXME: trace view callbacks*/
d11ba0c4 1947 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 1948
1949 iob = qeth_wait_for_buffer(&card->write);
1950 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1951
1952 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1953 (__u8) card->info.portno;
1954 if (card->options.layer2)
1955 if (card->info.type == QETH_CARD_TYPE_OSN)
1956 prot_type = QETH_PROT_OSN2;
1957 else
1958 prot_type = QETH_PROT_LAYER2;
1959 else
1960 prot_type = QETH_PROT_TCPIP;
1961
1962 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1963 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1964 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1965 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1966 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1967 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1968 card->info.portname, 9);
1969 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1970 qeth_ulp_enable_cb, NULL);
1971 return rc;
1972
1973}
1974
1975static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1976 unsigned long data)
1977{
1978 struct qeth_cmd_buffer *iob;
1979
d11ba0c4 1980 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 1981
1982 iob = (struct qeth_cmd_buffer *) data;
1983 memcpy(&card->token.ulp_connection_r,
1984 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1985 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1986 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1987 return 0;
1988}
1989
1990static int qeth_ulp_setup(struct qeth_card *card)
1991{
1992 int rc;
1993 __u16 temp;
1994 struct qeth_cmd_buffer *iob;
1995 struct ccw_dev_id dev_id;
1996
d11ba0c4 1997 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 1998
1999 iob = qeth_wait_for_buffer(&card->write);
2000 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2001
2002 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2003 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2004 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2005 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2006 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2007 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2008
2009 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2010 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2011 temp = (card->info.cula << 8) + card->info.unit_addr2;
2012 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2013 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2014 qeth_ulp_setup_cb, NULL);
2015 return rc;
2016}
2017
2018static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2019{
2020 int i, j;
2021
d11ba0c4 2022 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2023
2024 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2025 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2026 return 0;
2027
2028 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
508b3c4f 2029 GFP_KERNEL);
4a71df50
FB		 2030 if (!card->qdio.in_q)
2031 goto out_nomem;
d11ba0c4
PT		 2032 QETH_DBF_TEXT(SETUP, 2, "inq");
2033 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2034 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2035 /* give inbound qeth_qdio_buffers their qdio_buffers */
2036 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2037 card->qdio.in_q->bufs[i].buffer =
2038 &card->qdio.in_q->qdio_bufs[i];
2039 /* inbound buffer pool */
2040 if (qeth_alloc_buffer_pool(card))
2041 goto out_freeinq;
2042 /* outbound */
2043 card->qdio.out_qs =
2044 kmalloc(card->qdio.no_out_queues *
2045 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2046 if (!card->qdio.out_qs)
2047 goto out_freepool;
2048 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2049 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2050 GFP_KERNEL);
4a71df50
FB		 2051 if (!card->qdio.out_qs[i])
2052 goto out_freeoutq;
d11ba0c4
PT		 2053 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2054 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2055 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2056 card->qdio.out_qs[i]->queue_no = i;
2057 /* give outbound qeth_qdio_buffers their qdio_buffers */
2058 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2059 card->qdio.out_qs[i]->bufs[j].buffer =
2060 &card->qdio.out_qs[i]->qdio_bufs[j];
2061 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2062 skb_list);
2063 lockdep_set_class(
2064 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2065 &qdio_out_skb_queue_key);
2066 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2067 }
2068 }
2069 return 0;
2070
2071out_freeoutq:
2072 while (i > 0)
2073 kfree(card->qdio.out_qs[--i]);
2074 kfree(card->qdio.out_qs);
2075 card->qdio.out_qs = NULL;
2076out_freepool:
2077 qeth_free_buffer_pool(card);
2078out_freeinq:
2079 kfree(card->qdio.in_q);
2080 card->qdio.in_q = NULL;
2081out_nomem:
2082 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2083 return -ENOMEM;
2084}
2085
2086static void qeth_create_qib_param_field(struct qeth_card *card,
2087 char *param_field)
2088{
2089
2090 param_field[0] = _ascebc['P'];
2091 param_field[1] = _ascebc['C'];
2092 param_field[2] = _ascebc['I'];
2093 param_field[3] = _ascebc['T'];
2094 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2095 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2096 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2097}
2098
2099static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2100 char *param_field)
2101{
2102 param_field[16] = _ascebc['B'];
2103 param_field[17] = _ascebc['L'];
2104 param_field[18] = _ascebc['K'];
2105 param_field[19] = _ascebc['T'];
2106 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2107 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2108 *((unsigned int *) (&param_field[28])) =
2109 card->info.blkt.inter_packet_jumbo;
2110}
2111
2112static int qeth_qdio_activate(struct qeth_card *card)
2113{
d11ba0c4 2114 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2115 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2116}
2117
2118static int qeth_dm_act(struct qeth_card *card)
2119{
2120 int rc;
2121 struct qeth_cmd_buffer *iob;
2122
d11ba0c4 2123 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2124
2125 iob = qeth_wait_for_buffer(&card->write);
2126 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2127
2128 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2129 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2130 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2131 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2132 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2133 return rc;
2134}
2135
2136static int qeth_mpc_initialize(struct qeth_card *card)
2137{
2138 int rc;
2139
d11ba0c4 2140 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2141
2142 rc = qeth_issue_next_read(card);
2143 if (rc) {
d11ba0c4 2144 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2145 return rc;
2146 }
2147 rc = qeth_cm_enable(card);
2148 if (rc) {
d11ba0c4 2149 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2150 goto out_qdio;
2151 }
2152 rc = qeth_cm_setup(card);
2153 if (rc) {
d11ba0c4 2154 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2155 goto out_qdio;
2156 }
2157 rc = qeth_ulp_enable(card);
2158 if (rc) {
d11ba0c4 2159 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2160 goto out_qdio;
2161 }
2162 rc = qeth_ulp_setup(card);
2163 if (rc) {
d11ba0c4 2164 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2165 goto out_qdio;
2166 }
2167 rc = qeth_alloc_qdio_buffers(card);
2168 if (rc) {
d11ba0c4 2169 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2170 goto out_qdio;
2171 }
2172 rc = qeth_qdio_establish(card);
2173 if (rc) {
d11ba0c4 2174 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2175 qeth_free_qdio_buffers(card);
2176 goto out_qdio;
2177 }
2178 rc = qeth_qdio_activate(card);
2179 if (rc) {
d11ba0c4 2180 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2181 goto out_qdio;
2182 }
2183 rc = qeth_dm_act(card);
2184 if (rc) {
d11ba0c4 2185 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2186 goto out_qdio;
2187 }
2188
2189 return 0;
2190out_qdio:
2191 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2192 return rc;
2193}
2194
2195static void qeth_print_status_with_portname(struct qeth_card *card)
2196{
2197 char dbf_text[15];
2198 int i;
2199
2200 sprintf(dbf_text, "%s", card->info.portname + 1);
2201 for (i = 0; i < 8; i++)
2202 dbf_text[i] =
2203 (char) _ebcasc[(__u8) dbf_text[i]];
2204 dbf_text[8] = 0;
74eacdb9 2205 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2206 "with link type %s (portname: %s)\n",
4a71df50
FB		 2207 qeth_get_cardname(card),
2208 (card->info.mcl_level[0]) ? " (level: " : "",
2209 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2210 (card->info.mcl_level[0]) ? ")" : "",
2211 qeth_get_cardname_short(card),
2212 dbf_text);
2213
2214}
2215
2216static void qeth_print_status_no_portname(struct qeth_card *card)
2217{
2218 if (card->info.portname[0])
74eacdb9 2219 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2220 "card%s%s%s\nwith link type %s "
2221 "(no portname needed by interface).\n",
4a71df50
FB		 2222 qeth_get_cardname(card),
2223 (card->info.mcl_level[0]) ? " (level: " : "",
2224 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2225 (card->info.mcl_level[0]) ? ")" : "",
2226 qeth_get_cardname_short(card));
2227 else
74eacdb9 2228 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2229 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2230 qeth_get_cardname(card),
2231 (card->info.mcl_level[0]) ? " (level: " : "",
2232 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2233 (card->info.mcl_level[0]) ? ")" : "",
2234 qeth_get_cardname_short(card));
2235}
2236
2237void qeth_print_status_message(struct qeth_card *card)
2238{
2239 switch (card->info.type) {
2240 case QETH_CARD_TYPE_OSAE:
2241 /* VM will use a non-zero first character
2242 * to indicate a HiperSockets like reporting
2243 * of the level OSA sets the first character to zero
2244 * */
2245 if (!card->info.mcl_level[0]) {
2246 sprintf(card->info.mcl_level, "%02x%02x",
2247 card->info.mcl_level[2],
2248 card->info.mcl_level[3]);
2249
2250 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2251 break;
2252 }
2253 /* fallthrough */
2254 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2255 if ((card->info.guestlan) ||
2256 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2257 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2258 card->info.mcl_level[0]];
2259 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2260 card->info.mcl_level[1]];
2261 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2262 card->info.mcl_level[2]];
2263 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2264 card->info.mcl_level[3]];
2265 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2266 }
2267 break;
2268 default:
2269 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2270 }
2271 if (card->info.portname_required)
2272 qeth_print_status_with_portname(card);
2273 else
2274 qeth_print_status_no_portname(card);
2275}
2276EXPORT_SYMBOL_GPL(qeth_print_status_message);
2277
4a71df50
FB		 2278static void qeth_initialize_working_pool_list(struct qeth_card *card)
2279{
2280 struct qeth_buffer_pool_entry *entry;
2281
d11ba0c4 2282 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
4a71df50
FB		 2283
2284 list_for_each_entry(entry,
2285 &card->qdio.init_pool.entry_list, init_list) {
2286 qeth_put_buffer_pool_entry(card, entry);
2287 }
2288}
2289
2290static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2291 struct qeth_card *card)
2292{
2293 struct list_head *plh;
2294 struct qeth_buffer_pool_entry *entry;
2295 int i, free;
2296 struct page *page;
2297
2298 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2299 return NULL;
2300
2301 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2302 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2303 free = 1;
2304 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2305 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2306 free = 0;
2307 break;
2308 }
2309 }
2310 if (free) {
2311 list_del_init(&entry->list);
2312 return entry;
2313 }
2314 }
2315
2316 /* no free buffer in pool so take first one and swap pages */
2317 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2318 struct qeth_buffer_pool_entry, list);
2319 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2320 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2321 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2322 if (!page) {
2323 return NULL;
2324 } else {
2325 free_page((unsigned long)entry->elements[i]);
2326 entry->elements[i] = page_address(page);
2327 if (card->options.performance_stats)
2328 card->perf_stats.sg_alloc_page_rx++;
2329 }
2330 }
2331 }
2332 list_del_init(&entry->list);
2333 return entry;
2334}
2335
2336static int qeth_init_input_buffer(struct qeth_card *card,
2337 struct qeth_qdio_buffer *buf)
2338{
2339 struct qeth_buffer_pool_entry *pool_entry;
2340 int i;
2341
2342 pool_entry = qeth_find_free_buffer_pool_entry(card);
2343 if (!pool_entry)
2344 return 1;
2345
2346 /*
2347 * since the buffer is accessed only from the input_tasklet
2348 * there shouldn't be a need to synchronize; also, since we use
2349 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2350 * buffers
2351 */
4a71df50
FB		 2352
2353 buf->pool_entry = pool_entry;
2354 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2355 buf->buffer->element[i].length = PAGE_SIZE;
2356 buf->buffer->element[i].addr = pool_entry->elements[i];
2357 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2358 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2359 else
2360 buf->buffer->element[i].flags = 0;
2361 }
2362 return 0;
2363}
2364
2365int qeth_init_qdio_queues(struct qeth_card *card)
2366{
2367 int i, j;
2368 int rc;
2369
d11ba0c4 2370 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2371
2372 /* inbound queue */
2373 memset(card->qdio.in_q->qdio_bufs, 0,
2374 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2375 qeth_initialize_working_pool_list(card);
2376 /*give only as many buffers to hardware as we have buffer pool entries*/
2377 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2378 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2379 card->qdio.in_q->next_buf_to_init =
2380 card->qdio.in_buf_pool.buf_count - 1;
2381 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2382 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2383 if (rc) {
d11ba0c4 2384 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2385 return rc;
2386 }
4a71df50
FB		 2387 /* outbound queue */
2388 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2389 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2390 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2391 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2392 qeth_clear_output_buffer(card->qdio.out_qs[i],
2393 &card->qdio.out_qs[i]->bufs[j]);
2394 }
2395 card->qdio.out_qs[i]->card = card;
2396 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2397 card->qdio.out_qs[i]->do_pack = 0;
2398 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2399 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2400 atomic_set(&card->qdio.out_qs[i]->state,
2401 QETH_OUT_Q_UNLOCKED);
2402 }
2403 return 0;
2404}
2405EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2406
2407static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2408{
2409 switch (link_type) {
2410 case QETH_LINK_TYPE_HSTR:
2411 return 2;
2412 default:
2413 return 1;
2414 }
2415}
2416
2417static void qeth_fill_ipacmd_header(struct qeth_card *card,
2418 struct qeth_ipa_cmd *cmd, __u8 command,
2419 enum qeth_prot_versions prot)
2420{
2421 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2422 cmd->hdr.command = command;
2423 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2424 cmd->hdr.seqno = card->seqno.ipa;
2425 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2426 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2427 if (card->options.layer2)
2428 cmd->hdr.prim_version_no = 2;
2429 else
2430 cmd->hdr.prim_version_no = 1;
2431 cmd->hdr.param_count = 1;
2432 cmd->hdr.prot_version = prot;
2433 cmd->hdr.ipa_supported = 0;
2434 cmd->hdr.ipa_enabled = 0;
2435}
2436
2437struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2438 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2439{
2440 struct qeth_cmd_buffer *iob;
2441 struct qeth_ipa_cmd *cmd;
2442
2443 iob = qeth_wait_for_buffer(&card->write);
2444 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2445 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2446
2447 return iob;
2448}
2449EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2450
2451void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2452 char prot_type)
2453{
2454 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2455 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2456 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2457 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2458}
2459EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2460
2461int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2462 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2463 unsigned long),
2464 void *reply_param)
2465{
2466 int rc;
2467 char prot_type;
4a71df50 2468
d11ba0c4 2469 QETH_DBF_TEXT(TRACE, 4, "sendipa");
4a71df50
FB		 2470
2471 if (card->options.layer2)
2472 if (card->info.type == QETH_CARD_TYPE_OSN)
2473 prot_type = QETH_PROT_OSN2;
2474 else
2475 prot_type = QETH_PROT_LAYER2;
2476 else
2477 prot_type = QETH_PROT_TCPIP;
2478 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2479 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2480 iob, reply_cb, reply_param);
4a71df50
FB		 2481 return rc;
2482}
2483EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2484
2485static int qeth_send_startstoplan(struct qeth_card *card,
2486 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2487{
2488 int rc;
2489 struct qeth_cmd_buffer *iob;
2490
2491 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2492 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2493
2494 return rc;
2495}
2496
2497int qeth_send_startlan(struct qeth_card *card)
2498{
2499 int rc;
2500
d11ba0c4 2501 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50
FB		 2502
2503 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2504 return rc;
2505}
2506EXPORT_SYMBOL_GPL(qeth_send_startlan);
2507
2508int qeth_send_stoplan(struct qeth_card *card)
2509{
2510 int rc = 0;
2511
2512 /*
2513 * TODO: according to the IPA format document page 14,
2514 * TCP/IP (we!) never issue a STOPLAN
2515 * is this right ?!?
2516 */
d11ba0c4 2517 QETH_DBF_TEXT(SETUP, 2, "stoplan");
4a71df50
FB		 2518
2519 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2520 return rc;
2521}
2522EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2523
2524int qeth_default_setadapterparms_cb(struct qeth_card *card,
2525 struct qeth_reply *reply, unsigned long data)
2526{
2527 struct qeth_ipa_cmd *cmd;
2528
d11ba0c4 2529 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
4a71df50
FB		 2530
2531 cmd = (struct qeth_ipa_cmd *) data;
2532 if (cmd->hdr.return_code == 0)
2533 cmd->hdr.return_code =
2534 cmd->data.setadapterparms.hdr.return_code;
2535 return 0;
2536}
2537EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2538
2539static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2540 struct qeth_reply *reply, unsigned long data)
2541{
2542 struct qeth_ipa_cmd *cmd;
2543
d11ba0c4 2544 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
4a71df50
FB		 2545
2546 cmd = (struct qeth_ipa_cmd *) data;
2547 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2548 card->info.link_type =
2549 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2550 card->options.adp.supported_funcs =
2551 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2552 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2553}
2554
2555struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2556 __u32 command, __u32 cmdlen)
2557{
2558 struct qeth_cmd_buffer *iob;
2559 struct qeth_ipa_cmd *cmd;
2560
2561 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2562 QETH_PROT_IPV4);
2563 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2564 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2565 cmd->data.setadapterparms.hdr.command_code = command;
2566 cmd->data.setadapterparms.hdr.used_total = 1;
2567 cmd->data.setadapterparms.hdr.seq_no = 1;
2568
2569 return iob;
2570}
2571EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2572
2573int qeth_query_setadapterparms(struct qeth_card *card)
2574{
2575 int rc;
2576 struct qeth_cmd_buffer *iob;
2577
d11ba0c4 2578 QETH_DBF_TEXT(TRACE, 3, "queryadp");
4a71df50
FB		 2579 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2580 sizeof(struct qeth_ipacmd_setadpparms));
2581 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2582 return rc;
2583}
2584EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2585
76b11f8e
UB		 2586int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2587 unsigned int qdio_error, const char *dbftext)
4a71df50 2588{
779e6e1c 2589 if (qdio_error) {
d11ba0c4
PT		 2590 QETH_DBF_TEXT(TRACE, 2, dbftext);
2591 QETH_DBF_TEXT(QERR, 2, dbftext);
2592 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
4a71df50 2593 buf->element[15].flags & 0xff);
d11ba0c4 2594 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
4a71df50 2595 buf->element[14].flags & 0xff);
d11ba0c4 2596 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
76b11f8e
UB		 2597 if ((buf->element[15].flags & 0xff) == 0x12) {
2598 card->stats.rx_dropped++;
2599 return 0;
2600 } else
2601 return 1;
4a71df50
FB		 2602 }
2603 return 0;
2604}
2605EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2606
2607void qeth_queue_input_buffer(struct qeth_card *card, int index)
2608{
2609 struct qeth_qdio_q *queue = card->qdio.in_q;
2610 int count;
2611 int i;
2612 int rc;
2613 int newcount = 0;
2614
4a71df50
FB		 2615 count = (index < queue->next_buf_to_init)?
2616 card->qdio.in_buf_pool.buf_count -
2617 (queue->next_buf_to_init - index) :
2618 card->qdio.in_buf_pool.buf_count -
2619 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2620 /* only requeue at a certain threshold to avoid SIGAs */
2621 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2622 for (i = queue->next_buf_to_init;
2623 i < queue->next_buf_to_init + count; ++i) {
2624 if (qeth_init_input_buffer(card,
2625 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2626 break;
2627 } else {
2628 newcount++;
2629 }
2630 }
2631
2632 if (newcount < count) {
2633 /* we are in memory shortage so we switch back to
2634 traditional skb allocation and drop packages */
4a71df50
FB		 2635 atomic_set(&card->force_alloc_skb, 3);
2636 count = newcount;
2637 } else {
4a71df50
FB		 2638 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2639 }
2640
2641 /*
2642 * according to old code it should be avoided to requeue all
2643 * 128 buffers in order to benefit from PCI avoidance.
2644 * this function keeps at least one buffer (the buffer at
2645 * 'index') un-requeued -> this buffer is the first buffer that
2646 * will be requeued the next time
2647 */
2648 if (card->options.performance_stats) {
2649 card->perf_stats.inbound_do_qdio_cnt++;
2650 card->perf_stats.inbound_do_qdio_start_time =
2651 qeth_get_micros();
2652 }
779e6e1c
JG		 2653 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2654 queue->next_buf_to_init, count);
4a71df50
FB		 2655 if (card->options.performance_stats)
2656 card->perf_stats.inbound_do_qdio_time +=
2657 qeth_get_micros() -
2658 card->perf_stats.inbound_do_qdio_start_time;
2659 if (rc) {
74eacdb9
FB		 2660 dev_warn(&card->gdev->dev,
2661 "QDIO reported an error, rc=%i\n", rc);
d11ba0c4
PT		 2662 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2663 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2664 }
2665 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2666 QDIO_MAX_BUFFERS_PER_Q;
2667 }
2668}
2669EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2670
2671static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 2672 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50
FB		 2673{
2674 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
4a71df50 2675
d11ba0c4 2676 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
58490f18
KDW		 2677 if (card->info.type == QETH_CARD_TYPE_IQD) {
2678 if (sbalf15 == 0) {
2679 qdio_err = 0;
2680 } else {
2681 qdio_err = 1;
2682 }
2683 }
76b11f8e 2684 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 2685
2686 if (!qdio_err)
4a71df50 2687 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 2688
2689 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2690 return QETH_SEND_ERROR_RETRY;
2691
2692 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2693 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2694 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2695 (u16)qdio_err, (u8)sbalf15);
2696 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 2697}
2698
2699/*
2700 * Switched to packing state if the number of used buffers on a queue
2701 * reaches a certain limit.
2702 */
2703static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2704{
2705 if (!queue->do_pack) {
2706 if (atomic_read(&queue->used_buffers)
2707 >= QETH_HIGH_WATERMARK_PACK){
2708 /* switch non-PACKING -> PACKING */
d11ba0c4 2709 QETH_DBF_TEXT(TRACE, 6, "np->pack");
4a71df50
FB		 2710 if (queue->card->options.performance_stats)
2711 queue->card->perf_stats.sc_dp_p++;
2712 queue->do_pack = 1;
2713 }
2714 }
2715}
2716
2717/*
2718 * Switches from packing to non-packing mode. If there is a packing
2719 * buffer on the queue this buffer will be prepared to be flushed.
2720 * In that case 1 is returned to inform the caller. If no buffer
2721 * has to be flushed, zero is returned.
2722 */
2723static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2724{
2725 struct qeth_qdio_out_buffer *buffer;
2726 int flush_count = 0;
2727
2728 if (queue->do_pack) {
2729 if (atomic_read(&queue->used_buffers)
2730 <= QETH_LOW_WATERMARK_PACK) {
2731 /* switch PACKING -> non-PACKING */
d11ba0c4 2732 QETH_DBF_TEXT(TRACE, 6, "pack->np");
4a71df50
FB		 2733 if (queue->card->options.performance_stats)
2734 queue->card->perf_stats.sc_p_dp++;
2735 queue->do_pack = 0;
2736 /* flush packing buffers */
2737 buffer = &queue->bufs[queue->next_buf_to_fill];
2738 if ((atomic_read(&buffer->state) ==
2739 QETH_QDIO_BUF_EMPTY) &&
2740 (buffer->next_element_to_fill > 0)) {
2741 atomic_set(&buffer->state,
2742 QETH_QDIO_BUF_PRIMED);
2743 flush_count++;
2744 queue->next_buf_to_fill =
2745 (queue->next_buf_to_fill + 1) %
2746 QDIO_MAX_BUFFERS_PER_Q;
2747 }
2748 }
2749 }
2750 return flush_count;
2751}
2752
2753/*
2754 * Called to flush a packing buffer if no more pci flags are on the queue.
2755 * Checks if there is a packing buffer and prepares it to be flushed.
2756 * In that case returns 1, otherwise zero.
2757 */
2758static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2759{
2760 struct qeth_qdio_out_buffer *buffer;
2761
2762 buffer = &queue->bufs[queue->next_buf_to_fill];
2763 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2764 (buffer->next_element_to_fill > 0)) {
2765 /* it's a packing buffer */
2766 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2767 queue->next_buf_to_fill =
2768 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2769 return 1;
2770 }
2771 return 0;
2772}
2773
779e6e1c
JG		 2774static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2775 int count)
4a71df50
FB		 2776{
2777 struct qeth_qdio_out_buffer *buf;
2778 int rc;
2779 int i;
2780 unsigned int qdio_flags;
2781
4a71df50
FB		 2782 for (i = index; i < index + count; ++i) {
2783 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2784 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2785 SBAL_FLAGS_LAST_ENTRY;
2786
2787 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2788 continue;
2789
2790 if (!queue->do_pack) {
2791 if ((atomic_read(&queue->used_buffers) >=
2792 (QETH_HIGH_WATERMARK_PACK -
2793 QETH_WATERMARK_PACK_FUZZ)) &&
2794 !atomic_read(&queue->set_pci_flags_count)) {
2795 /* it's likely that we'll go to packing
2796 * mode soon */
2797 atomic_inc(&queue->set_pci_flags_count);
2798 buf->buffer->element[0].flags |= 0x40;
2799 }
2800 } else {
2801 if (!atomic_read(&queue->set_pci_flags_count)) {
2802 /*
2803 * there's no outstanding PCI any more, so we
2804 * have to request a PCI to be sure the the PCI
2805 * will wake at some time in the future then we
2806 * can flush packed buffers that might still be
2807 * hanging around, which can happen if no
2808 * further send was requested by the stack
2809 */
2810 atomic_inc(&queue->set_pci_flags_count);
2811 buf->buffer->element[0].flags |= 0x40;
2812 }
2813 }
2814 }
2815
58490f18 2816 queue->sync_iqdio_error = 0;
4a71df50
FB		 2817 queue->card->dev->trans_start = jiffies;
2818 if (queue->card->options.performance_stats) {
2819 queue->card->perf_stats.outbound_do_qdio_cnt++;
2820 queue->card->perf_stats.outbound_do_qdio_start_time =
2821 qeth_get_micros();
2822 }
2823 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 2824 if (atomic_read(&queue->set_pci_flags_count))
2825 qdio_flags |= QDIO_FLAG_PCI_OUT;
2826 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 2827 queue->queue_no, index, count);
4a71df50
FB		 2828 if (queue->card->options.performance_stats)
2829 queue->card->perf_stats.outbound_do_qdio_time +=
2830 qeth_get_micros() -
2831 queue->card->perf_stats.outbound_do_qdio_start_time;
58490f18
KDW		 2832 if (rc > 0) {
2833 if (!(rc & QDIO_ERROR_SIGA_BUSY))
2834 queue->sync_iqdio_error = rc & 3;
2835 }
4a71df50 2836 if (rc) {
d303b6fd
JG		 2837 queue->card->stats.tx_errors += count;
2838 /* ignore temporary SIGA errors without busy condition */
2839 if (rc == QDIO_ERROR_SIGA_TARGET)
2840 return;
d11ba0c4
PT		 2841 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2842 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2843 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
d303b6fd 2844
4a71df50
FB		 2845 /* this must not happen under normal circumstances. if it
2846 * happens something is really wrong -> recover */
2847 qeth_schedule_recovery(queue->card);
2848 return;
2849 }
2850 atomic_add(count, &queue->used_buffers);
2851 if (queue->card->options.performance_stats)
2852 queue->card->perf_stats.bufs_sent += count;
2853}
2854
2855static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2856{
2857 int index;
2858 int flush_cnt = 0;
2859 int q_was_packing = 0;
2860
2861 /*
2862 * check if weed have to switch to non-packing mode or if
2863 * we have to get a pci flag out on the queue
2864 */
2865 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2866 !atomic_read(&queue->set_pci_flags_count)) {
2867 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2868 QETH_OUT_Q_UNLOCKED) {
2869 /*
2870 * If we get in here, there was no action in
2871 * do_send_packet. So, we check if there is a
2872 * packing buffer to be flushed here.
2873 */
2874 netif_stop_queue(queue->card->dev);
2875 index = queue->next_buf_to_fill;
2876 q_was_packing = queue->do_pack;
2877 /* queue->do_pack may change */
2878 barrier();
2879 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2880 if (!flush_cnt &&
2881 !atomic_read(&queue->set_pci_flags_count))
2882 flush_cnt +=
2883 qeth_flush_buffers_on_no_pci(queue);
2884 if (queue->card->options.performance_stats &&
2885 q_was_packing)
2886 queue->card->perf_stats.bufs_sent_pack +=
2887 flush_cnt;
2888 if (flush_cnt)
779e6e1c 2889 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 2890 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2891 }
2892 }
2893}
2894
779e6e1c
JG		 2895void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2896 unsigned int qdio_error, int __queue, int first_element,
2897 int count, unsigned long card_ptr)
4a71df50
FB		 2898{
2899 struct qeth_card *card = (struct qeth_card *) card_ptr;
2900 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2901 struct qeth_qdio_out_buffer *buffer;
2902 int i;
58490f18 2903 unsigned qeth_send_err;
4a71df50 2904
d11ba0c4 2905 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
779e6e1c
JG		 2906 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2907 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2908 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2909 netif_stop_queue(card->dev);
2910 qeth_schedule_recovery(card);
2911 return;
4a71df50
FB		 2912 }
2913 if (card->options.performance_stats) {
2914 card->perf_stats.outbound_handler_cnt++;
2915 card->perf_stats.outbound_handler_start_time =
2916 qeth_get_micros();
2917 }
2918 for (i = first_element; i < (first_element + count); ++i) {
2919 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
58490f18
KDW		 2920 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error);
2921 __qeth_clear_output_buffer(queue, buffer,
2922 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0);
4a71df50
FB		 2923 }
2924 atomic_sub(count, &queue->used_buffers);
2925 /* check if we need to do something on this outbound queue */
2926 if (card->info.type != QETH_CARD_TYPE_IQD)
2927 qeth_check_outbound_queue(queue);
2928
2929 netif_wake_queue(queue->card->dev);
2930 if (card->options.performance_stats)
2931 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2932 card->perf_stats.outbound_handler_start_time;
2933}
2934EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2935
4a71df50
FB		 2936int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2937 int ipv, int cast_type)
2938{
2939 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2940 return card->qdio.default_out_queue;
2941 switch (card->qdio.no_out_queues) {
2942 case 4:
2943 if (cast_type && card->info.is_multicast_different)
2944 return card->info.is_multicast_different &
2945 (card->qdio.no_out_queues - 1);
2946 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2947 const u8 tos = ip_hdr(skb)->tos;
2948
2949 if (card->qdio.do_prio_queueing ==
2950 QETH_PRIO_Q_ING_TOS) {
2951 if (tos & IP_TOS_NOTIMPORTANT)
2952 return 3;
2953 if (tos & IP_TOS_HIGHRELIABILITY)
2954 return 2;
2955 if (tos & IP_TOS_HIGHTHROUGHPUT)
2956 return 1;
2957 if (tos & IP_TOS_LOWDELAY)
2958 return 0;
2959 }
2960 if (card->qdio.do_prio_queueing ==
2961 QETH_PRIO_Q_ING_PREC)
2962 return 3 - (tos >> 6);
2963 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2964 /* TODO: IPv6!!! */
2965 }
2966 return card->qdio.default_out_queue;
2967 case 1: /* fallthrough for single-out-queue 1920-device */
2968 default:
2969 return card->qdio.default_out_queue;
2970 }
2971}
2972EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
2973
4a71df50
FB		 2974int qeth_get_elements_no(struct qeth_card *card, void *hdr,
2975 struct sk_buff *skb, int elems)
2976{
2977 int elements_needed = 0;
2978
2979 if (skb_shinfo(skb)->nr_frags > 0)
2980 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
2981 if (elements_needed == 0)
683d718a
FB		 2982 elements_needed = 1 + (((((unsigned long) skb->data) %
2983 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
4a71df50 2984 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 2985 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 2986 "(Number=%d / Length=%d). Discarded.\n",
2987 (elements_needed+elems), skb->len);
2988 return 0;
2989 }
2990 return elements_needed;
2991}
2992EXPORT_SYMBOL_GPL(qeth_get_elements_no);
2993
f90b744e 2994static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 2995 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
2996 int offset)
4a71df50 2997{
e1f03ae8 2998 int length = skb->len;
4a71df50
FB		 2999 int length_here;
3000 int element;
3001 char *data;
3002 int first_lap ;
3003
3004 element = *next_element_to_fill;
3005 data = skb->data;
3006 first_lap = (is_tso == 0 ? 1 : 0);
3007
683d718a
FB		 3008 if (offset >= 0) {
3009 data = skb->data + offset;
e1f03ae8 3010 length -= offset;
683d718a
FB		 3011 first_lap = 0;
3012 }
3013
4a71df50
FB		 3014 while (length > 0) {
3015 /* length_here is the remaining amount of data in this page */
3016 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3017 if (length < length_here)
3018 length_here = length;
3019
3020 buffer->element[element].addr = data;
3021 buffer->element[element].length = length_here;
3022 length -= length_here;
3023 if (!length) {
3024 if (first_lap)
3025 buffer->element[element].flags = 0;
3026 else
3027 buffer->element[element].flags =
3028 SBAL_FLAGS_LAST_FRAG;
3029 } else {
3030 if (first_lap)
3031 buffer->element[element].flags =
3032 SBAL_FLAGS_FIRST_FRAG;
3033 else
3034 buffer->element[element].flags =
3035 SBAL_FLAGS_MIDDLE_FRAG;
3036 }
3037 data += length_here;
3038 element++;
3039 first_lap = 0;
3040 }
3041 *next_element_to_fill = element;
3042}
3043
f90b744e 3044static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3045 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3046 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3047{
3048 struct qdio_buffer *buffer;
4a71df50
FB		 3049 int flush_cnt = 0, hdr_len, large_send = 0;
3050
4a71df50
FB		 3051 buffer = buf->buffer;
3052 atomic_inc(&skb->users);
3053 skb_queue_tail(&buf->skb_list, skb);
3054
4a71df50 3055 /*check first on TSO ....*/
683d718a 3056 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3057 int element = buf->next_element_to_fill;
3058
683d718a
FB		 3059 hdr_len = sizeof(struct qeth_hdr_tso) +
3060 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3061 /*fill first buffer entry only with header information */
3062 buffer->element[element].addr = skb->data;
3063 buffer->element[element].length = hdr_len;
3064 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3065 buf->next_element_to_fill++;
3066 skb->data += hdr_len;
3067 skb->len -= hdr_len;
3068 large_send = 1;
3069 }
683d718a
FB		 3070
3071 if (offset >= 0) {
3072 int element = buf->next_element_to_fill;
3073 buffer->element[element].addr = hdr;
3074 buffer->element[element].length = sizeof(struct qeth_hdr) +
3075 hd_len;
3076 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3077 buf->is_header[element] = 1;
3078 buf->next_element_to_fill++;
3079 }
3080
4a71df50
FB		 3081 if (skb_shinfo(skb)->nr_frags == 0)
3082 __qeth_fill_buffer(skb, buffer, large_send,
683d718a 3083 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3084 else
3085 __qeth_fill_buffer_frag(skb, buffer, large_send,
3086 (int *)&buf->next_element_to_fill);
3087
3088 if (!queue->do_pack) {
d11ba0c4 3089 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
4a71df50
FB		 3090 /* set state to PRIMED -> will be flushed */
3091 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3092 flush_cnt = 1;
3093 } else {
d11ba0c4 3094 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
4a71df50
FB		 3095 if (queue->card->options.performance_stats)
3096 queue->card->perf_stats.skbs_sent_pack++;
3097 if (buf->next_element_to_fill >=
3098 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3099 /*
3100 * packed buffer if full -> set state PRIMED
3101 * -> will be flushed
3102 */
3103 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3104 flush_cnt = 1;
3105 }
3106 }
3107 return flush_cnt;
3108}
3109
3110int qeth_do_send_packet_fast(struct qeth_card *card,
3111 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3112 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3113 int offset, int hd_len)
4a71df50
FB		 3114{
3115 struct qeth_qdio_out_buffer *buffer;
58490f18
KDW		 3116 struct sk_buff *skb1;
3117 struct qeth_skb_data *retry_ctrl;
4a71df50 3118 int index;
58490f18 3119 int rc;
4a71df50 3120
4a71df50
FB		 3121 /* spin until we get the queue ... */
3122 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3123 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3124 /* ... now we've got the queue */
3125 index = queue->next_buf_to_fill;
3126 buffer = &queue->bufs[queue->next_buf_to_fill];
3127 /*
3128 * check if buffer is empty to make sure that we do not 'overtake'
3129 * ourselves and try to fill a buffer that is already primed
3130 */
3131 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3132 goto out;
64ef8957 3133 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3134 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3135 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3136 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3137 qeth_flush_buffers(queue, index, 1);
58490f18
KDW		 3138 if (queue->sync_iqdio_error == 2) {
3139 skb1 = skb_dequeue(&buffer->skb_list);
3140 while (skb1) {
3141 atomic_dec(&skb1->users);
3142 skb1 = skb_dequeue(&buffer->skb_list);
3143 }
3144 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16];
3145 if (retry_ctrl->magic != QETH_SKB_MAGIC) {
3146 retry_ctrl->magic = QETH_SKB_MAGIC;
3147 retry_ctrl->count = 0;
3148 }
3149 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) {
3150 retry_ctrl->count++;
3151 rc = dev_queue_xmit(skb);
3152 } else {
3153 dev_kfree_skb_any(skb);
3154 QETH_DBF_TEXT(QERR, 2, "qrdrop");
3155 }
3156 }
4a71df50
FB		 3157 return 0;
3158out:
3159 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3160 return -EBUSY;
3161}
3162EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3163
3164int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3165 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3166 int elements_needed)
4a71df50
FB		 3167{
3168 struct qeth_qdio_out_buffer *buffer;
3169 int start_index;
3170 int flush_count = 0;
3171 int do_pack = 0;
3172 int tmp;
3173 int rc = 0;
3174
4a71df50
FB		 3175 /* spin until we get the queue ... */
3176 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3177 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3178 start_index = queue->next_buf_to_fill;
3179 buffer = &queue->bufs[queue->next_buf_to_fill];
3180 /*
3181 * check if buffer is empty to make sure that we do not 'overtake'
3182 * ourselves and try to fill a buffer that is already primed
3183 */
3184 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3185 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3186 return -EBUSY;
3187 }
3188 /* check if we need to switch packing state of this queue */
3189 qeth_switch_to_packing_if_needed(queue);
3190 if (queue->do_pack) {
3191 do_pack = 1;
64ef8957
FB		 3192 /* does packet fit in current buffer? */
3193 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3194 buffer->next_element_to_fill) < elements_needed) {
3195 /* ... no -> set state PRIMED */
3196 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3197 flush_count++;
3198 queue->next_buf_to_fill =
3199 (queue->next_buf_to_fill + 1) %
3200 QDIO_MAX_BUFFERS_PER_Q;
3201 buffer = &queue->bufs[queue->next_buf_to_fill];
3202 /* we did a step forward, so check buffer state
3203 * again */
3204 if (atomic_read(&buffer->state) !=
3205 QETH_QDIO_BUF_EMPTY) {
3206 qeth_flush_buffers(queue, start_index,
779e6e1c 3207 flush_count);
64ef8957 3208 atomic_set(&queue->state,
4a71df50 3209 QETH_OUT_Q_UNLOCKED);
64ef8957 3210 return -EBUSY;
4a71df50
FB		 3211 }
3212 }
3213 }
64ef8957 3214 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3215 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3216 QDIO_MAX_BUFFERS_PER_Q;
3217 flush_count += tmp;
4a71df50 3218 if (flush_count)
779e6e1c 3219 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3220 else if (!atomic_read(&queue->set_pci_flags_count))
3221 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3222 /*
3223 * queue->state will go from LOCKED -> UNLOCKED or from
3224 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3225 * (switch packing state or flush buffer to get another pci flag out).
3226 * In that case we will enter this loop
3227 */
3228 while (atomic_dec_return(&queue->state)) {
3229 flush_count = 0;
3230 start_index = queue->next_buf_to_fill;
3231 /* check if we can go back to non-packing state */
3232 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3233 /*
3234 * check if we need to flush a packing buffer to get a pci
3235 * flag out on the queue
3236 */
3237 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3238 flush_count += qeth_flush_buffers_on_no_pci(queue);
3239 if (flush_count)
779e6e1c 3240 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3241 }
3242 /* at this point the queue is UNLOCKED again */
3243 if (queue->card->options.performance_stats && do_pack)
3244 queue->card->perf_stats.bufs_sent_pack += flush_count;
3245
3246 return rc;
3247}
3248EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3249
3250static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3251 struct qeth_reply *reply, unsigned long data)
3252{
3253 struct qeth_ipa_cmd *cmd;
3254 struct qeth_ipacmd_setadpparms *setparms;
3255
d11ba0c4 3256 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
4a71df50
FB		 3257
3258 cmd = (struct qeth_ipa_cmd *) data;
3259 setparms = &(cmd->data.setadapterparms);
3260
3261 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3262 if (cmd->hdr.return_code) {
d11ba0c4 3263 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3264 setparms->data.mode = SET_PROMISC_MODE_OFF;
3265 }
3266 card->info.promisc_mode = setparms->data.mode;
3267 return 0;
3268}
3269
3270void qeth_setadp_promisc_mode(struct qeth_card *card)
3271{
3272 enum qeth_ipa_promisc_modes mode;
3273 struct net_device *dev = card->dev;
3274 struct qeth_cmd_buffer *iob;
3275 struct qeth_ipa_cmd *cmd;
3276
d11ba0c4 3277 QETH_DBF_TEXT(TRACE, 4, "setprom");
4a71df50
FB		 3278
3279 if (((dev->flags & IFF_PROMISC) &&
3280 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3281 (!(dev->flags & IFF_PROMISC) &&
3282 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3283 return;
3284 mode = SET_PROMISC_MODE_OFF;
3285 if (dev->flags & IFF_PROMISC)
3286 mode = SET_PROMISC_MODE_ON;
d11ba0c4 3287 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
4a71df50
FB		 3288
3289 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3290 sizeof(struct qeth_ipacmd_setadpparms));
3291 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3292 cmd->data.setadapterparms.data.mode = mode;
3293 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3294}
3295EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3296
3297int qeth_change_mtu(struct net_device *dev, int new_mtu)
3298{
3299 struct qeth_card *card;
3300 char dbf_text[15];
3301
509e2562 3302 card = dev->ml_priv;
4a71df50 3303
d11ba0c4 3304 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
4a71df50 3305 sprintf(dbf_text, "%8x", new_mtu);
d11ba0c4 3306 QETH_DBF_TEXT(TRACE, 4, dbf_text);
4a71df50
FB		 3307
3308 if (new_mtu < 64)
3309 return -EINVAL;
3310 if (new_mtu > 65535)
3311 return -EINVAL;
3312 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3313 (!qeth_mtu_is_valid(card, new_mtu)))
3314 return -EINVAL;
3315 dev->mtu = new_mtu;
3316 return 0;
3317}
3318EXPORT_SYMBOL_GPL(qeth_change_mtu);
3319
3320struct net_device_stats *qeth_get_stats(struct net_device *dev)
3321{
3322 struct qeth_card *card;
3323
509e2562 3324 card = dev->ml_priv;
4a71df50 3325
d11ba0c4 3326 QETH_DBF_TEXT(TRACE, 5, "getstat");
4a71df50
FB		 3327
3328 return &card->stats;
3329}
3330EXPORT_SYMBOL_GPL(qeth_get_stats);
3331
3332static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3333 struct qeth_reply *reply, unsigned long data)
3334{
3335 struct qeth_ipa_cmd *cmd;
3336
d11ba0c4 3337 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
4a71df50
FB		 3338
3339 cmd = (struct qeth_ipa_cmd *) data;
3340 if (!card->options.layer2 ||
3341 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3342 memcpy(card->dev->dev_addr,
3343 &cmd->data.setadapterparms.data.change_addr.addr,
3344 OSA_ADDR_LEN);
3345 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3346 }
3347 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3348 return 0;
3349}
3350
3351int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3352{
3353 int rc;
3354 struct qeth_cmd_buffer *iob;
3355 struct qeth_ipa_cmd *cmd;
3356
d11ba0c4 3357 QETH_DBF_TEXT(TRACE, 4, "chgmac");
4a71df50
FB		 3358
3359 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3360 sizeof(struct qeth_ipacmd_setadpparms));
3361 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3362 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3363 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3364 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3365 card->dev->dev_addr, OSA_ADDR_LEN);
3366 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3367 NULL);
3368 return rc;
3369}
3370EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3371
d64ecc22
EL		 3372static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3373 struct qeth_reply *reply, unsigned long data)
3374{
3375 struct qeth_ipa_cmd *cmd;
3376 struct qeth_set_access_ctrl *access_ctrl_req;
3377 int rc;
3378
3379 QETH_DBF_TEXT(TRACE, 4, "setaccb");
3380
3381 cmd = (struct qeth_ipa_cmd *) data;
3382 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3383 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3384 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3385 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3386 cmd->data.setadapterparms.hdr.return_code);
3387 switch (cmd->data.setadapterparms.hdr.return_code) {
3388 case SET_ACCESS_CTRL_RC_SUCCESS:
3389 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3390 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3391 {
3392 card->options.isolation = access_ctrl_req->subcmd_code;
3393 if (card->options.isolation == ISOLATION_MODE_NONE) {
3394 dev_info(&card->gdev->dev,
3395 "QDIO data connection isolation is deactivated\n");
3396 } else {
3397 dev_info(&card->gdev->dev,
3398 "QDIO data connection isolation is activated\n");
3399 }
3400 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3401 card->gdev->dev.kobj.name,
3402 access_ctrl_req->subcmd_code,
3403 cmd->data.setadapterparms.hdr.return_code);
3404 rc = 0;
3405 break;
3406 }
3407 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3408 {
3409 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3410 card->gdev->dev.kobj.name,
3411 access_ctrl_req->subcmd_code,
3412 cmd->data.setadapterparms.hdr.return_code);
3413 dev_err(&card->gdev->dev, "Adapter does not "
3414 "support QDIO data connection isolation\n");
3415
3416 /* ensure isolation mode is "none" */
3417 card->options.isolation = ISOLATION_MODE_NONE;
3418 rc = -EOPNOTSUPP;
3419 break;
3420 }
3421 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3422 {
3423 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3424 card->gdev->dev.kobj.name,
3425 access_ctrl_req->subcmd_code,
3426 cmd->data.setadapterparms.hdr.return_code);
3427 dev_err(&card->gdev->dev,
3428 "Adapter is dedicated. "
3429 "QDIO data connection isolation not supported\n");
3430
3431 /* ensure isolation mode is "none" */
3432 card->options.isolation = ISOLATION_MODE_NONE;
3433 rc = -EOPNOTSUPP;
3434 break;
3435 }
3436 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3437 {
3438 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3439 card->gdev->dev.kobj.name,
3440 access_ctrl_req->subcmd_code,
3441 cmd->data.setadapterparms.hdr.return_code);
3442 dev_err(&card->gdev->dev,
3443 "TSO does not permit QDIO data connection isolation\n");
3444
3445 /* ensure isolation mode is "none" */
3446 card->options.isolation = ISOLATION_MODE_NONE;
3447 rc = -EPERM;
3448 break;
3449 }
3450 default:
3451 {
3452 /* this should never happen */
3453 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3454 "==UNKNOWN\n",
3455 card->gdev->dev.kobj.name,
3456 access_ctrl_req->subcmd_code,
3457 cmd->data.setadapterparms.hdr.return_code);
3458
3459 /* ensure isolation mode is "none" */
3460 card->options.isolation = ISOLATION_MODE_NONE;
3461 rc = 0;
3462 break;
3463 }
3464 }
3465 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3466 return rc;
3467}
3468
3469static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3470 enum qeth_ipa_isolation_modes isolation)
3471{
3472 int rc;
3473 struct qeth_cmd_buffer *iob;
3474 struct qeth_ipa_cmd *cmd;
3475 struct qeth_set_access_ctrl *access_ctrl_req;
3476
3477 QETH_DBF_TEXT(TRACE, 4, "setacctl");
3478
3479 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3480 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3481
3482 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3483 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3484 sizeof(struct qeth_set_access_ctrl));
3485 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3486 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3487 access_ctrl_req->subcmd_code = isolation;
3488
3489 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3490 NULL);
3491 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3492 return rc;
3493}
3494
3495int qeth_set_access_ctrl_online(struct qeth_card *card)
3496{
3497 int rc = 0;
3498
3499 QETH_DBF_TEXT(TRACE, 4, "setactlo");
3500
3501 if (card->info.type == QETH_CARD_TYPE_OSAE &&
3502 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
3503 rc = qeth_setadpparms_set_access_ctrl(card,
3504 card->options.isolation);
3505 if (rc) {
3506 QETH_DBF_MESSAGE(3,
3507 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed",
3508 card->gdev->dev.kobj.name,
3509 rc);
3510 }
3511 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
3512 card->options.isolation = ISOLATION_MODE_NONE;
3513
3514 dev_err(&card->gdev->dev, "Adapter does not "
3515 "support QDIO data connection isolation\n");
3516 rc = -EOPNOTSUPP;
3517 }
3518 return rc;
3519}
3520EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
3521
4a71df50
FB		 3522void qeth_tx_timeout(struct net_device *dev)
3523{
3524 struct qeth_card *card;
3525
76b11f8e 3526 QETH_DBF_TEXT(TRACE, 4, "txtimeo");
509e2562 3527 card = dev->ml_priv;
4a71df50
FB		 3528 card->stats.tx_errors++;
3529 qeth_schedule_recovery(card);
3530}
3531EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3532
3533int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3534{
509e2562 3535 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 3536 int rc = 0;
3537
3538 switch (regnum) {
3539 case MII_BMCR: /* Basic mode control register */
3540 rc = BMCR_FULLDPLX;
3541 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3542 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3543 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3544 rc |= BMCR_SPEED100;
3545 break;
3546 case MII_BMSR: /* Basic mode status register */
3547 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3548 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3549 BMSR_100BASE4;
3550 break;
3551 case MII_PHYSID1: /* PHYS ID 1 */
3552 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3553 dev->dev_addr[2];
3554 rc = (rc >> 5) & 0xFFFF;
3555 break;
3556 case MII_PHYSID2: /* PHYS ID 2 */
3557 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3558 break;
3559 case MII_ADVERTISE: /* Advertisement control reg */
3560 rc = ADVERTISE_ALL;
3561 break;
3562 case MII_LPA: /* Link partner ability reg */
3563 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3564 LPA_100BASE4 | LPA_LPACK;
3565 break;
3566 case MII_EXPANSION: /* Expansion register */
3567 break;
3568 case MII_DCOUNTER: /* disconnect counter */
3569 break;
3570 case MII_FCSCOUNTER: /* false carrier counter */
3571 break;
3572 case MII_NWAYTEST: /* N-way auto-neg test register */
3573 break;
3574 case MII_RERRCOUNTER: /* rx error counter */
3575 rc = card->stats.rx_errors;
3576 break;
3577 case MII_SREVISION: /* silicon revision */
3578 break;
3579 case MII_RESV1: /* reserved 1 */
3580 break;
3581 case MII_LBRERROR: /* loopback, rx, bypass error */
3582 break;
3583 case MII_PHYADDR: /* physical address */
3584 break;
3585 case MII_RESV2: /* reserved 2 */
3586 break;
3587 case MII_TPISTATUS: /* TPI status for 10mbps */
3588 break;
3589 case MII_NCONFIG: /* network interface config */
3590 break;
3591 default:
3592 break;
3593 }
3594 return rc;
3595}
3596EXPORT_SYMBOL_GPL(qeth_mdio_read);
3597
3598static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3599 struct qeth_cmd_buffer *iob, int len,
3600 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3601 unsigned long),
3602 void *reply_param)
3603{
3604 u16 s1, s2;
3605
d11ba0c4 3606 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
4a71df50
FB		 3607
3608 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3609 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3610 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3611 /* adjust PDU length fields in IPA_PDU_HEADER */
3612 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3613 s2 = (u32) len;
3614 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3615 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3616 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3617 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3618 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3619 reply_cb, reply_param);
3620}
3621
3622static int qeth_snmp_command_cb(struct qeth_card *card,
3623 struct qeth_reply *reply, unsigned long sdata)
3624{
3625 struct qeth_ipa_cmd *cmd;
3626 struct qeth_arp_query_info *qinfo;
3627 struct qeth_snmp_cmd *snmp;
3628 unsigned char *data;
3629 __u16 data_len;
3630
d11ba0c4 3631 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
4a71df50
FB		 3632
3633 cmd = (struct qeth_ipa_cmd *) sdata;
3634 data = (unsigned char *)((char *)cmd - reply->offset);
3635 qinfo = (struct qeth_arp_query_info *) reply->param;
3636 snmp = &cmd->data.setadapterparms.data.snmp;
3637
3638 if (cmd->hdr.return_code) {
d11ba0c4 3639 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 3640 return 0;
3641 }
3642 if (cmd->data.setadapterparms.hdr.return_code) {
3643 cmd->hdr.return_code =
3644 cmd->data.setadapterparms.hdr.return_code;
d11ba0c4 3645 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 3646 return 0;
3647 }
3648 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3649 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3650 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3651 else
3652 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3653
3654 /* check if there is enough room in userspace */
3655 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
d11ba0c4 3656 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 3657 cmd->hdr.return_code = -ENOMEM;
3658 return 0;
3659 }
d11ba0c4 3660 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
4a71df50 3661 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3662 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
4a71df50
FB		 3663 cmd->data.setadapterparms.hdr.seq_no);
3664 /*copy entries to user buffer*/
3665 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3666 memcpy(qinfo->udata + qinfo->udata_offset,
3667 (char *)snmp,
3668 data_len + offsetof(struct qeth_snmp_cmd, data));
3669 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3670 } else {
3671 memcpy(qinfo->udata + qinfo->udata_offset,
3672 (char *)&snmp->request, data_len);
3673 }
3674 qinfo->udata_offset += data_len;
3675 /* check if all replies received ... */
d11ba0c4 3676 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
4a71df50 3677 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3678 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
4a71df50
FB		 3679 cmd->data.setadapterparms.hdr.seq_no);
3680 if (cmd->data.setadapterparms.hdr.seq_no <
3681 cmd->data.setadapterparms.hdr.used_total)
3682 return 1;
3683 return 0;
3684}
3685
3686int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3687{
3688 struct qeth_cmd_buffer *iob;
3689 struct qeth_ipa_cmd *cmd;
3690 struct qeth_snmp_ureq *ureq;
3691 int req_len;
3692 struct qeth_arp_query_info qinfo = {0, };
3693 int rc = 0;
3694
d11ba0c4 3695 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
4a71df50
FB		 3696
3697 if (card->info.guestlan)
3698 return -EOPNOTSUPP;
3699
3700 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3701 (!card->options.layer2)) {
4a71df50
FB		 3702 return -EOPNOTSUPP;
3703 }
3704 /* skip 4 bytes (data_len struct member) to get req_len */
3705 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3706 return -EFAULT;
3707 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3708 if (!ureq) {
d11ba0c4 3709 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
4a71df50
FB		 3710 return -ENOMEM;
3711 }
3712 if (copy_from_user(ureq, udata,
3713 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3714 kfree(ureq);
3715 return -EFAULT;
3716 }
3717 qinfo.udata_len = ureq->hdr.data_len;
3718 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3719 if (!qinfo.udata) {
3720 kfree(ureq);
3721 return -ENOMEM;
3722 }
3723 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3724
3725 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3726 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3727 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3728 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3729 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3730 qeth_snmp_command_cb, (void *)&qinfo);
3731 if (rc)
14cc21b6 3732 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 3733 QETH_CARD_IFNAME(card), rc);
3734 else {
3735 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3736 rc = -EFAULT;
3737 }
3738
3739 kfree(ureq);
3740 kfree(qinfo.udata);
3741 return rc;
3742}
3743EXPORT_SYMBOL_GPL(qeth_snmp_command);
3744
3745static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3746{
3747 switch (card->info.type) {
3748 case QETH_CARD_TYPE_IQD:
3749 return 2;
3750 default:
3751 return 0;
3752 }
3753}
3754
3755static int qeth_qdio_establish(struct qeth_card *card)
3756{
3757 struct qdio_initialize init_data;
3758 char *qib_param_field;
3759 struct qdio_buffer **in_sbal_ptrs;
3760 struct qdio_buffer **out_sbal_ptrs;
3761 int i, j, k;
3762 int rc = 0;
3763
d11ba0c4 3764 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 3765
3766 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3767 GFP_KERNEL);
3768 if (!qib_param_field)
3769 return -ENOMEM;
3770
3771 qeth_create_qib_param_field(card, qib_param_field);
3772 qeth_create_qib_param_field_blkt(card, qib_param_field);
3773
3774 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3775 GFP_KERNEL);
3776 if (!in_sbal_ptrs) {
3777 kfree(qib_param_field);
3778 return -ENOMEM;
3779 }
3780 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3781 in_sbal_ptrs[i] = (struct qdio_buffer *)
3782 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3783
3784 out_sbal_ptrs =
3785 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3786 sizeof(void *), GFP_KERNEL);
3787 if (!out_sbal_ptrs) {
3788 kfree(in_sbal_ptrs);
3789 kfree(qib_param_field);
3790 return -ENOMEM;
3791 }
3792 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3793 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3794 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3795 card->qdio.out_qs[i]->bufs[j].buffer);
3796 }
3797
3798 memset(&init_data, 0, sizeof(struct qdio_initialize));
3799 init_data.cdev = CARD_DDEV(card);
3800 init_data.q_format = qeth_get_qdio_q_format(card);
3801 init_data.qib_param_field_format = 0;
3802 init_data.qib_param_field = qib_param_field;
4a71df50
FB		 3803 init_data.no_input_qs = 1;
3804 init_data.no_output_qs = card->qdio.no_out_queues;
3805 init_data.input_handler = card->discipline.input_handler;
3806 init_data.output_handler = card->discipline.output_handler;
3807 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 3808 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3809 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3810
3811 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3812 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3813 rc = qdio_initialize(&init_data);
3814 if (rc)
3815 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3816 }
3817 kfree(out_sbal_ptrs);
3818 kfree(in_sbal_ptrs);
3819 kfree(qib_param_field);
3820 return rc;
3821}
3822
3823static void qeth_core_free_card(struct qeth_card *card)
3824{
3825
d11ba0c4
PT		 3826 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3827 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 3828 qeth_clean_channel(&card->read);
3829 qeth_clean_channel(&card->write);
3830 if (card->dev)
3831 free_netdev(card->dev);
3832 kfree(card->ip_tbd_list);
3833 qeth_free_qdio_buffers(card);
6bcac508 3834 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 3835 kfree(card);
3836}
3837
3838static struct ccw_device_id qeth_ids[] = {
3839 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3840 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3841 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3842 {},
3843};
3844MODULE_DEVICE_TABLE(ccw, qeth_ids);
3845
3846static struct ccw_driver qeth_ccw_driver = {
3847 .name = "qeth",
3848 .ids = qeth_ids,
3849 .probe = ccwgroup_probe_ccwdev,
3850 .remove = ccwgroup_remove_ccwdev,
3851};
3852
3853static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3854 unsigned long driver_id)
3855{
022b660a
UB		 3856 return ccwgroup_create_from_string(root_dev, driver_id,
3857 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 3858}
3859
3860int qeth_core_hardsetup_card(struct qeth_card *card)
3861{
aa909224 3862 int retries = 0;
4a71df50
FB		 3863 int rc;
3864
d11ba0c4 3865 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50
FB		 3866 atomic_set(&card->force_alloc_skb, 0);
3867retry:
aa909224 3868 if (retries)
74eacdb9
FB		 3869 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3870 dev_name(&card->gdev->dev));
aa909224
UB		 3871 ccw_device_set_offline(CARD_DDEV(card));
3872 ccw_device_set_offline(CARD_WDEV(card));
3873 ccw_device_set_offline(CARD_RDEV(card));
3874 rc = ccw_device_set_online(CARD_RDEV(card));
3875 if (rc)
3876 goto retriable;
3877 rc = ccw_device_set_online(CARD_WDEV(card));
3878 if (rc)
3879 goto retriable;
3880 rc = ccw_device_set_online(CARD_DDEV(card));
3881 if (rc)
3882 goto retriable;
4a71df50 3883 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 3884retriable:
4a71df50 3885 if (rc == -ERESTARTSYS) {
d11ba0c4 3886 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 3887 return rc;
3888 } else if (rc) {
d11ba0c4 3889 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
aa909224 3890 if (++retries > 3)
4a71df50
FB		 3891 goto out;
3892 else
3893 goto retry;
3894 }
4a71df50
FB		 3895 qeth_init_tokens(card);
3896 qeth_init_func_level(card);
3897 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3898 if (rc == -ERESTARTSYS) {
d11ba0c4 3899 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 3900 return rc;
3901 } else if (rc) {
d11ba0c4 3902 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 3903 if (--retries < 0)
3904 goto out;
3905 else
3906 goto retry;
3907 }
3908 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3909 if (rc == -ERESTARTSYS) {
d11ba0c4 3910 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 3911 return rc;
3912 } else if (rc) {
d11ba0c4 3913 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 3914 if (--retries < 0)
3915 goto out;
3916 else
3917 goto retry;
3918 }
3919 rc = qeth_mpc_initialize(card);
3920 if (rc) {
d11ba0c4 3921 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 3922 goto out;
3923 }
3924 return 0;
3925out:
74eacdb9
FB		 3926 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3927 "an error on the device\n");
3928 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3929 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 3930 return rc;
3931}
3932EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3933
3934static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3935 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3936{
3937 struct page *page = virt_to_page(element->addr);
3938 if (*pskb == NULL) {
3939 /* the upper protocol layers assume that there is data in the
3940 * skb itself. Copy a small amount (64 bytes) to make them
3941 * happy. */
3942 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3943 if (!(*pskb))
3944 return -ENOMEM;
3945 skb_reserve(*pskb, ETH_HLEN);
3946 if (data_len <= 64) {
3947 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3948 data_len);
3949 } else {
3950 get_page(page);
3951 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3952 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3953 data_len - 64);
3954 (*pskb)->data_len += data_len - 64;
3955 (*pskb)->len += data_len - 64;
3956 (*pskb)->truesize += data_len - 64;
3957 (*pfrag)++;
3958 }
3959 } else {
3960 get_page(page);
3961 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3962 (*pskb)->data_len += data_len;
3963 (*pskb)->len += data_len;
3964 (*pskb)->truesize += data_len;
3965 (*pfrag)++;
3966 }
3967 return 0;
3968}
3969
3970struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3971 struct qdio_buffer *buffer,
3972 struct qdio_buffer_element **__element, int *__offset,
3973 struct qeth_hdr **hdr)
3974{
3975 struct qdio_buffer_element *element = *__element;
3976 int offset = *__offset;
3977 struct sk_buff *skb = NULL;
76b11f8e 3978 int skb_len = 0;
4a71df50
FB		 3979 void *data_ptr;
3980 int data_len;
3981 int headroom = 0;
3982 int use_rx_sg = 0;
3983 int frag = 0;
3984
4a71df50
FB		 3985 /* qeth_hdr must not cross element boundaries */
3986 if (element->length < offset + sizeof(struct qeth_hdr)) {
3987 if (qeth_is_last_sbale(element))
3988 return NULL;
3989 element++;
3990 offset = 0;
3991 if (element->length < sizeof(struct qeth_hdr))
3992 return NULL;
3993 }
3994 *hdr = element->addr + offset;
3995
3996 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 3997 switch ((*hdr)->hdr.l2.id) {
3998 case QETH_HEADER_TYPE_LAYER2:
3999 skb_len = (*hdr)->hdr.l2.pkt_length;
4000 break;
4001 case QETH_HEADER_TYPE_LAYER3:
4a71df50 4002 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 4003 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4004 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4005 headroom = TR_HLEN;
4006 else
4007 headroom = ETH_HLEN;
76b11f8e
UB		 4008 break;
4009 case QETH_HEADER_TYPE_OSN:
4010 skb_len = (*hdr)->hdr.osn.pdu_length;
4011 headroom = sizeof(struct qeth_hdr);
4012 break;
4013 default:
4014 break;
4a71df50
FB		 4015 }
4016
4017 if (!skb_len)
4018 return NULL;
4019
4020 if ((skb_len >= card->options.rx_sg_cb) &&
4021 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4022 (!atomic_read(&card->force_alloc_skb))) {
4023 use_rx_sg = 1;
4024 } else {
4025 skb = dev_alloc_skb(skb_len + headroom);
4026 if (!skb)
4027 goto no_mem;
4028 if (headroom)
4029 skb_reserve(skb, headroom);
4030 }
4031
4032 data_ptr = element->addr + offset;
4033 while (skb_len) {
4034 data_len = min(skb_len, (int)(element->length - offset));
4035 if (data_len) {
4036 if (use_rx_sg) {
4037 if (qeth_create_skb_frag(element, &skb, offset,
4038 &frag, data_len))
4039 goto no_mem;
4040 } else {
4041 memcpy(skb_put(skb, data_len), data_ptr,
4042 data_len);
4043 }
4044 }
4045 skb_len -= data_len;
4046 if (skb_len) {
4047 if (qeth_is_last_sbale(element)) {
d11ba0c4
PT		 4048 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4049 QETH_DBF_TEXT_(TRACE, 4, "%s",
4a71df50 4050 CARD_BUS_ID(card));
d11ba0c4
PT		 4051 QETH_DBF_TEXT(QERR, 2, "unexeob");
4052 QETH_DBF_TEXT_(QERR, 2, "%s",
4a71df50 4053 CARD_BUS_ID(card));
d11ba0c4 4054 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4a71df50
FB		 4055 dev_kfree_skb_any(skb);
4056 card->stats.rx_errors++;
4057 return NULL;
4058 }
4059 element++;
4060 offset = 0;
4061 data_ptr = element->addr;
4062 } else {
4063 offset += data_len;
4064 }
4065 }
4066 *__element = element;
4067 *__offset = offset;
4068 if (use_rx_sg && card->options.performance_stats) {
4069 card->perf_stats.sg_skbs_rx++;
4070 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4071 }
4072 return skb;
4073no_mem:
4074 if (net_ratelimit()) {
d11ba0c4
PT		 4075 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4076 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 4077 }
4078 card->stats.rx_dropped++;
4079 return NULL;
4080}
4081EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4082
4083static void qeth_unregister_dbf_views(void)
4084{
d11ba0c4
PT		 4085 int x;
4086 for (x = 0; x < QETH_DBF_INFOS; x++) {
4087 debug_unregister(qeth_dbf[x].id);
4088 qeth_dbf[x].id = NULL;
4089 }
4a71df50
FB		 4090}
4091
345aa66e 4092void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
cd023216
PT		 4093{
4094 char dbf_txt_buf[32];
345aa66e 4095 va_list args;
cd023216
PT		 4096
4097 if (level > (qeth_dbf[dbf_nix].id)->level)
4098 return;
345aa66e
PT		 4099 va_start(args, fmt);
4100 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4101 va_end(args);
cd023216 4102 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
cd023216
PT		 4103}
4104EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4105
4a71df50
FB		 4106static int qeth_register_dbf_views(void)
4107{
d11ba0c4
PT		 4108 int ret;
4109 int x;
4110
4111 for (x = 0; x < QETH_DBF_INFOS; x++) {
4112 /* register the areas */
4113 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4114 qeth_dbf[x].pages,
4115 qeth_dbf[x].areas,
4116 qeth_dbf[x].len);
4117 if (qeth_dbf[x].id == NULL) {
4118 qeth_unregister_dbf_views();
4119 return -ENOMEM;
4120 }
4a71df50 4121
d11ba0c4
PT		 4122 /* register a view */
4123 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4124 if (ret) {
4125 qeth_unregister_dbf_views();
4126 return ret;
4127 }
4a71df50 4128
d11ba0c4
PT		 4129 /* set a passing level */
4130 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4131 }
4a71df50
FB		 4132
4133 return 0;
4134}
4135
4136int qeth_core_load_discipline(struct qeth_card *card,
4137 enum qeth_discipline_id discipline)
4138{
4139 int rc = 0;
4140 switch (discipline) {
4141 case QETH_DISCIPLINE_LAYER3:
4142 card->discipline.ccwgdriver = try_then_request_module(
4143 symbol_get(qeth_l3_ccwgroup_driver),
4144 "qeth_l3");
4145 break;
4146 case QETH_DISCIPLINE_LAYER2:
4147 card->discipline.ccwgdriver = try_then_request_module(
4148 symbol_get(qeth_l2_ccwgroup_driver),
4149 "qeth_l2");
4150 break;
4151 }
4152 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 4153 dev_err(&card->gdev->dev, "There is no kernel module to "
4154 "support discipline %d\n", discipline);
4a71df50
FB		 4155 rc = -EINVAL;
4156 }
4157 return rc;
4158}
4159
4160void qeth_core_free_discipline(struct qeth_card *card)
4161{
4162 if (card->options.layer2)
4163 symbol_put(qeth_l2_ccwgroup_driver);
4164 else
4165 symbol_put(qeth_l3_ccwgroup_driver);
4166 card->discipline.ccwgdriver = NULL;
4167}
4168
76b11f8e
UB		 4169static void qeth_determine_capabilities(struct qeth_card *card)
4170{
4171 int rc;
a60389ab
EL		 4172 int length;
4173 char *prcd;
76b11f8e
UB		 4174
4175 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4176 rc = ccw_device_set_online(CARD_DDEV(card));
4177 if (rc) {
4178 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4179 goto out;
4180 }
4181
a60389ab
EL		 4182
4183 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
76b11f8e 4184 if (rc) {
a60389ab
EL		 4185 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4186 dev_name(&card->gdev->dev), rc);
76b11f8e
UB		 4187 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4188 goto out_offline;
4189 }
a60389ab
EL		 4190 qeth_configure_unitaddr(card, prcd);
4191 qeth_configure_blkt_default(card, prcd);
4192 kfree(prcd);
76b11f8e
UB		 4193
4194 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd);
4195 if (rc)
4196 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4197
4198out_offline:
4199 ccw_device_set_offline(CARD_DDEV(card));
4200out:
4201 return;
4202}
4203
4a71df50
FB		 4204static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4205{
4206 struct qeth_card *card;
4207 struct device *dev;
4208 int rc;
4209 unsigned long flags;
4210
d11ba0c4 4211 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4212
4213 dev = &gdev->dev;
4214 if (!get_device(dev))
4215 return -ENODEV;
4216
2a0217d5 4217 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 4218
4219 card = qeth_alloc_card();
4220 if (!card) {
d11ba0c4 4221 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4222 rc = -ENOMEM;
4223 goto err_dev;
4224 }
4225 card->read.ccwdev = gdev->cdev[0];
4226 card->write.ccwdev = gdev->cdev[1];
4227 card->data.ccwdev = gdev->cdev[2];
4228 dev_set_drvdata(&gdev->dev, card);
4229 card->gdev = gdev;
4230 gdev->cdev[0]->handler = qeth_irq;
4231 gdev->cdev[1]->handler = qeth_irq;
4232 gdev->cdev[2]->handler = qeth_irq;
4233
4234 rc = qeth_determine_card_type(card);
4235 if (rc) {
d11ba0c4 4236 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4237 goto err_card;
4238 }
4239 rc = qeth_setup_card(card);
4240 if (rc) {
d11ba0c4 4241 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 4242 goto err_card;
4243 }
4244
4245 if (card->info.type == QETH_CARD_TYPE_OSN) {
4246 rc = qeth_core_create_osn_attributes(dev);
4247 if (rc)
4248 goto err_card;
4249 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4250 if (rc) {
4251 qeth_core_remove_osn_attributes(dev);
4252 goto err_card;
4253 }
4254 rc = card->discipline.ccwgdriver->probe(card->gdev);
4255 if (rc) {
4256 qeth_core_free_discipline(card);
4257 qeth_core_remove_osn_attributes(dev);
4258 goto err_card;
4259 }
4260 } else {
4261 rc = qeth_core_create_device_attributes(dev);
4262 if (rc)
4263 goto err_card;
4264 }
4265
4266 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4267 list_add_tail(&card->list, &qeth_core_card_list.list);
4268 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 4269
4270 qeth_determine_capabilities(card);
4a71df50
FB		 4271 return 0;
4272
4273err_card:
4274 qeth_core_free_card(card);
4275err_dev:
4276 put_device(dev);
4277 return rc;
4278}
4279
4280static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4281{
4282 unsigned long flags;
4283 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4284
28a7e4c9 4285 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 4286 if (card->discipline.ccwgdriver) {
4287 card->discipline.ccwgdriver->remove(gdev);
4288 qeth_core_free_discipline(card);
4289 }
4290
4291 if (card->info.type == QETH_CARD_TYPE_OSN) {
4292 qeth_core_remove_osn_attributes(&gdev->dev);
4293 } else {
4294 qeth_core_remove_device_attributes(&gdev->dev);
4295 }
4296 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4297 list_del(&card->list);
4298 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4299 qeth_core_free_card(card);
4300 dev_set_drvdata(&gdev->dev, NULL);
4301 put_device(&gdev->dev);
4302 return;
4303}
4304
4305static int qeth_core_set_online(struct ccwgroup_device *gdev)
4306{
4307 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4308 int rc = 0;
4309 int def_discipline;
4310
4311 if (!card->discipline.ccwgdriver) {
4312 if (card->info.type == QETH_CARD_TYPE_IQD)
4313 def_discipline = QETH_DISCIPLINE_LAYER3;
4314 else
4315 def_discipline = QETH_DISCIPLINE_LAYER2;
4316 rc = qeth_core_load_discipline(card, def_discipline);
4317 if (rc)
4318 goto err;
4319 rc = card->discipline.ccwgdriver->probe(card->gdev);
4320 if (rc)
4321 goto err;
4322 }
4323 rc = card->discipline.ccwgdriver->set_online(gdev);
4324err:
4325 return rc;
4326}
4327
4328static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4329{
4330 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4331 return card->discipline.ccwgdriver->set_offline(gdev);
4332}
4333
4334static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4335{
4336 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4337 if (card->discipline.ccwgdriver &&
4338 card->discipline.ccwgdriver->shutdown)
4339 card->discipline.ccwgdriver->shutdown(gdev);
4340}
4341
bbcfcdc8
FB		 4342static int qeth_core_prepare(struct ccwgroup_device *gdev)
4343{
4344 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4345 if (card->discipline.ccwgdriver &&
4346 card->discipline.ccwgdriver->prepare)
4347 return card->discipline.ccwgdriver->prepare(gdev);
4348 return 0;
4349}
4350
4351static void qeth_core_complete(struct ccwgroup_device *gdev)
4352{
4353 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4354 if (card->discipline.ccwgdriver &&
4355 card->discipline.ccwgdriver->complete)
4356 card->discipline.ccwgdriver->complete(gdev);
4357}
4358
4359static int qeth_core_freeze(struct ccwgroup_device *gdev)
4360{
4361 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4362 if (card->discipline.ccwgdriver &&
4363 card->discipline.ccwgdriver->freeze)
4364 return card->discipline.ccwgdriver->freeze(gdev);
4365 return 0;
4366}
4367
4368static int qeth_core_thaw(struct ccwgroup_device *gdev)
4369{
4370 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4371 if (card->discipline.ccwgdriver &&
4372 card->discipline.ccwgdriver->thaw)
4373 return card->discipline.ccwgdriver->thaw(gdev);
4374 return 0;
4375}
4376
4377static int qeth_core_restore(struct ccwgroup_device *gdev)
4378{
4379 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4380 if (card->discipline.ccwgdriver &&
4381 card->discipline.ccwgdriver->restore)
4382 return card->discipline.ccwgdriver->restore(gdev);
4383 return 0;
4384}
4385
4a71df50
FB		 4386static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4387 .owner = THIS_MODULE,
4388 .name = "qeth",
4389 .driver_id = 0xD8C5E3C8,
4390 .probe = qeth_core_probe_device,
4391 .remove = qeth_core_remove_device,
4392 .set_online = qeth_core_set_online,
4393 .set_offline = qeth_core_set_offline,
4394 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 4395 .prepare = qeth_core_prepare,
4396 .complete = qeth_core_complete,
4397 .freeze = qeth_core_freeze,
4398 .thaw = qeth_core_thaw,
4399 .restore = qeth_core_restore,
4a71df50
FB		 4400};
4401
4402static ssize_t
4403qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4404 size_t count)
4405{
4406 int err;
4407 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4408 qeth_core_ccwgroup_driver.driver_id);
4409 if (err)
4410 return err;
4411 else
4412 return count;
4413}
4414
4415static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4416
4417static struct {
4418 const char str[ETH_GSTRING_LEN];
4419} qeth_ethtool_stats_keys[] = {
4420/* 0 */{"rx skbs"},
4421 {"rx buffers"},
4422 {"tx skbs"},
4423 {"tx buffers"},
4424 {"tx skbs no packing"},
4425 {"tx buffers no packing"},
4426 {"tx skbs packing"},
4427 {"tx buffers packing"},
4428 {"tx sg skbs"},
4429 {"tx sg frags"},
4430/* 10 */{"rx sg skbs"},
4431 {"rx sg frags"},
4432 {"rx sg page allocs"},
4433 {"tx large kbytes"},
4434 {"tx large count"},
4435 {"tx pk state ch n->p"},
4436 {"tx pk state ch p->n"},
4437 {"tx pk watermark low"},
4438 {"tx pk watermark high"},
4439 {"queue 0 buffer usage"},
4440/* 20 */{"queue 1 buffer usage"},
4441 {"queue 2 buffer usage"},
4442 {"queue 3 buffer usage"},
4443 {"rx handler time"},
4444 {"rx handler count"},
4445 {"rx do_QDIO time"},
4446 {"rx do_QDIO count"},
4447 {"tx handler time"},
4448 {"tx handler count"},
4449 {"tx time"},
4450/* 30 */{"tx count"},
4451 {"tx do_QDIO time"},
4452 {"tx do_QDIO count"},
f61a0d05 4453 {"tx csum"},
c3b4a740 4454 {"tx lin"},
4a71df50
FB		 4455};
4456
df8b4ec8 4457int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 4458{
df8b4ec8
BH		 4459 switch (stringset) {
4460 case ETH_SS_STATS:
4461 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4462 default:
4463 return -EINVAL;
4464 }
4a71df50 4465}
df8b4ec8 4466EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 4467
4468void qeth_core_get_ethtool_stats(struct net_device *dev,
4469 struct ethtool_stats *stats, u64 *data)
4470{
509e2562 4471 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4472 data[0] = card->stats.rx_packets -
4473 card->perf_stats.initial_rx_packets;
4474 data[1] = card->perf_stats.bufs_rec;
4475 data[2] = card->stats.tx_packets -
4476 card->perf_stats.initial_tx_packets;
4477 data[3] = card->perf_stats.bufs_sent;
4478 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4479 - card->perf_stats.skbs_sent_pack;
4480 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4481 data[6] = card->perf_stats.skbs_sent_pack;
4482 data[7] = card->perf_stats.bufs_sent_pack;
4483 data[8] = card->perf_stats.sg_skbs_sent;
4484 data[9] = card->perf_stats.sg_frags_sent;
4485 data[10] = card->perf_stats.sg_skbs_rx;
4486 data[11] = card->perf_stats.sg_frags_rx;
4487 data[12] = card->perf_stats.sg_alloc_page_rx;
4488 data[13] = (card->perf_stats.large_send_bytes >> 10);
4489 data[14] = card->perf_stats.large_send_cnt;
4490 data[15] = card->perf_stats.sc_dp_p;
4491 data[16] = card->perf_stats.sc_p_dp;
4492 data[17] = QETH_LOW_WATERMARK_PACK;
4493 data[18] = QETH_HIGH_WATERMARK_PACK;
4494 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4495 data[20] = (card->qdio.no_out_queues > 1) ?
4496 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4497 data[21] = (card->qdio.no_out_queues > 2) ?
4498 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4499 data[22] = (card->qdio.no_out_queues > 3) ?
4500 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4501 data[23] = card->perf_stats.inbound_time;
4502 data[24] = card->perf_stats.inbound_cnt;
4503 data[25] = card->perf_stats.inbound_do_qdio_time;
4504 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4505 data[27] = card->perf_stats.outbound_handler_time;
4506 data[28] = card->perf_stats.outbound_handler_cnt;
4507 data[29] = card->perf_stats.outbound_time;
4508 data[30] = card->perf_stats.outbound_cnt;
4509 data[31] = card->perf_stats.outbound_do_qdio_time;
4510 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 4511 data[33] = card->perf_stats.tx_csum;
c3b4a740 4512 data[34] = card->perf_stats.tx_lin;
4a71df50
FB		 4513}
4514EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4515
4516void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4517{
4518 switch (stringset) {
4519 case ETH_SS_STATS:
4520 memcpy(data, &qeth_ethtool_stats_keys,
4521 sizeof(qeth_ethtool_stats_keys));
4522 break;
4523 default:
4524 WARN_ON(1);
4525 break;
4526 }
4527}
4528EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4529
4530void qeth_core_get_drvinfo(struct net_device *dev,
4531 struct ethtool_drvinfo *info)
4532{
509e2562 4533 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4534 if (card->options.layer2)
4535 strcpy(info->driver, "qeth_l2");
4536 else
4537 strcpy(info->driver, "qeth_l3");
4538
4539 strcpy(info->version, "1.0");
4540 strcpy(info->fw_version, card->info.mcl_level);
4541 sprintf(info->bus_info, "%s/%s/%s",
4542 CARD_RDEV_ID(card),
4543 CARD_WDEV_ID(card),
4544 CARD_DDEV_ID(card));
4545}
4546EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4547
3f9975aa
FB		 4548int qeth_core_ethtool_get_settings(struct net_device *netdev,
4549 struct ethtool_cmd *ecmd)
4550{
509e2562 4551 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 4552 enum qeth_link_types link_type;
4553
4554 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4555 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4556 else
4557 link_type = card->info.link_type;
4558
4559 ecmd->transceiver = XCVR_INTERNAL;
4560 ecmd->supported = SUPPORTED_Autoneg;
4561 ecmd->advertising = ADVERTISED_Autoneg;
4562 ecmd->duplex = DUPLEX_FULL;
4563 ecmd->autoneg = AUTONEG_ENABLE;
4564
4565 switch (link_type) {
4566 case QETH_LINK_TYPE_FAST_ETH:
4567 case QETH_LINK_TYPE_LANE_ETH100:
4568 ecmd->supported |= SUPPORTED_10baseT_Half |
4569 SUPPORTED_10baseT_Full |
4570 SUPPORTED_100baseT_Half |
4571 SUPPORTED_100baseT_Full |
4572 SUPPORTED_TP;
4573 ecmd->advertising |= ADVERTISED_10baseT_Half |
4574 ADVERTISED_10baseT_Full |
4575 ADVERTISED_100baseT_Half |
4576 ADVERTISED_100baseT_Full |
4577 ADVERTISED_TP;
4578 ecmd->speed = SPEED_100;
4579 ecmd->port = PORT_TP;
4580 break;
4581
4582 case QETH_LINK_TYPE_GBIT_ETH:
4583 case QETH_LINK_TYPE_LANE_ETH1000:
4584 ecmd->supported |= SUPPORTED_10baseT_Half |
4585 SUPPORTED_10baseT_Full |
4586 SUPPORTED_100baseT_Half |
4587 SUPPORTED_100baseT_Full |
4588 SUPPORTED_1000baseT_Half |
4589 SUPPORTED_1000baseT_Full |
4590 SUPPORTED_FIBRE;
4591 ecmd->advertising |= ADVERTISED_10baseT_Half |
4592 ADVERTISED_10baseT_Full |
4593 ADVERTISED_100baseT_Half |
4594 ADVERTISED_100baseT_Full |
4595 ADVERTISED_1000baseT_Half |
4596 ADVERTISED_1000baseT_Full |
4597 ADVERTISED_FIBRE;
4598 ecmd->speed = SPEED_1000;
4599 ecmd->port = PORT_FIBRE;
4600 break;
4601
4602 case QETH_LINK_TYPE_10GBIT_ETH:
4603 ecmd->supported |= SUPPORTED_10baseT_Half |
4604 SUPPORTED_10baseT_Full |
4605 SUPPORTED_100baseT_Half |
4606 SUPPORTED_100baseT_Full |
4607 SUPPORTED_1000baseT_Half |
4608 SUPPORTED_1000baseT_Full |
4609 SUPPORTED_10000baseT_Full |
4610 SUPPORTED_FIBRE;
4611 ecmd->advertising |= ADVERTISED_10baseT_Half |
4612 ADVERTISED_10baseT_Full |
4613 ADVERTISED_100baseT_Half |
4614 ADVERTISED_100baseT_Full |
4615 ADVERTISED_1000baseT_Half |
4616 ADVERTISED_1000baseT_Full |
4617 ADVERTISED_10000baseT_Full |
4618 ADVERTISED_FIBRE;
4619 ecmd->speed = SPEED_10000;
4620 ecmd->port = PORT_FIBRE;
4621 break;
4622
4623 default:
4624 ecmd->supported |= SUPPORTED_10baseT_Half |
4625 SUPPORTED_10baseT_Full |
4626 SUPPORTED_TP;
4627 ecmd->advertising |= ADVERTISED_10baseT_Half |
4628 ADVERTISED_10baseT_Full |
4629 ADVERTISED_TP;
4630 ecmd->speed = SPEED_10;
4631 ecmd->port = PORT_TP;
4632 }
4633
4634 return 0;
4635}
4636EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4637
4a71df50
FB		 4638static int __init qeth_core_init(void)
4639{
4640 int rc;
4641
74eacdb9 4642 pr_info("loading core functions\n");
4a71df50
FB		 4643 INIT_LIST_HEAD(&qeth_core_card_list.list);
4644 rwlock_init(&qeth_core_card_list.rwlock);
4645
4646 rc = qeth_register_dbf_views();
4647 if (rc)
4648 goto out_err;
4649 rc = ccw_driver_register(&qeth_ccw_driver);
4650 if (rc)
4651 goto ccw_err;
4652 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4653 if (rc)
4654 goto ccwgroup_err;
4655 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4656 &driver_attr_group);
4657 if (rc)
4658 goto driver_err;
035da16f 4659 qeth_core_root_dev = root_device_register("qeth");
4a71df50
FB		 4660 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4661 if (rc)
4662 goto register_err;
4a71df50 4663
683d718a
FB		 4664 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4665 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4666 if (!qeth_core_header_cache) {
4667 rc = -ENOMEM;
4668 goto slab_err;
4669 }
4670
4671 return 0;
4672slab_err:
035da16f 4673 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 4674register_err:
4675 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4676 &driver_attr_group);
4677driver_err:
4678 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4679ccwgroup_err:
4680 ccw_driver_unregister(&qeth_ccw_driver);
4681ccw_err:
74eacdb9 4682 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 4683 qeth_unregister_dbf_views();
4684out_err:
74eacdb9 4685 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 4686 return rc;
4687}
4688
4689static void __exit qeth_core_exit(void)
4690{
035da16f 4691 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 4692 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4693 &driver_attr_group);
4694 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4695 ccw_driver_unregister(&qeth_ccw_driver);
683d718a 4696 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 4697 qeth_unregister_dbf_views();
74eacdb9 4698 pr_info("core functions removed\n");
4a71df50
FB		 4699}
4700
4701module_init(qeth_core_init);
4702module_exit(qeth_core_exit);
4703MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4704MODULE_DESCRIPTION("qeth core functions");
4705MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)