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s390/qdio: bridgeport support - CHSC part
[linux-block.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
4a71df50 23
ab4227cb
MS		 24#include <asm/ebcdic.h>
25#include <asm/io.h>
1da74b1c 26#include <asm/sysinfo.h>
c3ab96f3 27#include <asm/compat.h>
4a71df50
FB		 28
29#include "qeth_core.h"
4a71df50 30
d11ba0c4
PT		 31struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 /* N P A M L V H */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
d11ba0c4
PT		 36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
d11ba0c4
PT		 38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40};
41EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 42
43struct qeth_card_list_struct qeth_core_card_list;
44EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 45struct kmem_cache *qeth_core_header_cache;
46EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 47static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 48
49static struct device *qeth_core_root_dev;
5113fec0 50static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 51static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 52static struct mutex qeth_mod_mutex;
4a71df50
FB		 53
54static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56static int qeth_issue_next_read(struct qeth_card *);
57static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59static void qeth_free_buffer_pool(struct qeth_card *);
60static int qeth_qdio_establish(struct qeth_card *);
0da9581d 61static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 62static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 66static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
72861ae7 69static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 70
b4d72c08 71struct workqueue_struct *qeth_wq;
0f54761d
SR		 72
73static void qeth_close_dev_handler(struct work_struct *work)
74{
75 struct qeth_card *card;
76
77 card = container_of(work, struct qeth_card, close_dev_work);
78 QETH_CARD_TEXT(card, 2, "cldevhdl");
79 rtnl_lock();
80 dev_close(card->dev);
81 rtnl_unlock();
82 ccwgroup_set_offline(card->gdev);
83}
84
85void qeth_close_dev(struct qeth_card *card)
86{
87 QETH_CARD_TEXT(card, 2, "cldevsubm");
88 queue_work(qeth_wq, &card->close_dev_work);
89}
90EXPORT_SYMBOL_GPL(qeth_close_dev);
91
4a71df50
FB		 92static inline const char *qeth_get_cardname(struct qeth_card *card)
93{
94 if (card->info.guestlan) {
95 switch (card->info.type) {
5113fec0 96 case QETH_CARD_TYPE_OSD:
7096b187 97 return " Virtual NIC QDIO";
4a71df50 98 case QETH_CARD_TYPE_IQD:
7096b187 99 return " Virtual NIC Hiper";
5113fec0 100 case QETH_CARD_TYPE_OSM:
7096b187 101 return " Virtual NIC QDIO - OSM";
5113fec0 102 case QETH_CARD_TYPE_OSX:
7096b187 103 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 104 default:
105 return " unknown";
106 }
107 } else {
108 switch (card->info.type) {
5113fec0 109 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 110 return " OSD Express";
111 case QETH_CARD_TYPE_IQD:
112 return " HiperSockets";
113 case QETH_CARD_TYPE_OSN:
114 return " OSN QDIO";
5113fec0
UB		 115 case QETH_CARD_TYPE_OSM:
116 return " OSM QDIO";
117 case QETH_CARD_TYPE_OSX:
118 return " OSX QDIO";
4a71df50
FB		 119 default:
120 return " unknown";
121 }
122 }
123 return " n/a";
124}
125
126/* max length to be returned: 14 */
127const char *qeth_get_cardname_short(struct qeth_card *card)
128{
129 if (card->info.guestlan) {
130 switch (card->info.type) {
5113fec0 131 case QETH_CARD_TYPE_OSD:
7096b187 132 return "Virt.NIC QDIO";
4a71df50 133 case QETH_CARD_TYPE_IQD:
7096b187 134 return "Virt.NIC Hiper";
5113fec0 135 case QETH_CARD_TYPE_OSM:
7096b187 136 return "Virt.NIC OSM";
5113fec0 137 case QETH_CARD_TYPE_OSX:
7096b187 138 return "Virt.NIC OSX";
4a71df50
FB		 139 default:
140 return "unknown";
141 }
142 } else {
143 switch (card->info.type) {
5113fec0 144 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 145 switch (card->info.link_type) {
146 case QETH_LINK_TYPE_FAST_ETH:
147 return "OSD_100";
148 case QETH_LINK_TYPE_HSTR:
149 return "HSTR";
150 case QETH_LINK_TYPE_GBIT_ETH:
151 return "OSD_1000";
152 case QETH_LINK_TYPE_10GBIT_ETH:
153 return "OSD_10GIG";
154 case QETH_LINK_TYPE_LANE_ETH100:
155 return "OSD_FE_LANE";
156 case QETH_LINK_TYPE_LANE_TR:
157 return "OSD_TR_LANE";
158 case QETH_LINK_TYPE_LANE_ETH1000:
159 return "OSD_GbE_LANE";
160 case QETH_LINK_TYPE_LANE:
161 return "OSD_ATM_LANE";
162 default:
163 return "OSD_Express";
164 }
165 case QETH_CARD_TYPE_IQD:
166 return "HiperSockets";
167 case QETH_CARD_TYPE_OSN:
168 return "OSN";
5113fec0
UB		 169 case QETH_CARD_TYPE_OSM:
170 return "OSM_1000";
171 case QETH_CARD_TYPE_OSX:
172 return "OSX_10GIG";
4a71df50
FB		 173 default:
174 return "unknown";
175 }
176 }
177 return "n/a";
178}
179
65d8013c
SR		 180void qeth_set_recovery_task(struct qeth_card *card)
181{
182 card->recovery_task = current;
183}
184EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
185
186void qeth_clear_recovery_task(struct qeth_card *card)
187{
188 card->recovery_task = NULL;
189}
190EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
191
192static bool qeth_is_recovery_task(const struct qeth_card *card)
193{
194 return card->recovery_task == current;
195}
196
4a71df50
FB		 197void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
198 int clear_start_mask)
199{
200 unsigned long flags;
201
202 spin_lock_irqsave(&card->thread_mask_lock, flags);
203 card->thread_allowed_mask = threads;
204 if (clear_start_mask)
205 card->thread_start_mask &= threads;
206 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
207 wake_up(&card->wait_q);
208}
209EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
210
211int qeth_threads_running(struct qeth_card *card, unsigned long threads)
212{
213 unsigned long flags;
214 int rc = 0;
215
216 spin_lock_irqsave(&card->thread_mask_lock, flags);
217 rc = (card->thread_running_mask & threads);
218 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
219 return rc;
220}
221EXPORT_SYMBOL_GPL(qeth_threads_running);
222
223int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
224{
65d8013c
SR		 225 if (qeth_is_recovery_task(card))
226 return 0;
4a71df50
FB		 227 return wait_event_interruptible(card->wait_q,
228 qeth_threads_running(card, threads) == 0);
229}
230EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
231
232void qeth_clear_working_pool_list(struct qeth_card *card)
233{
234 struct qeth_buffer_pool_entry *pool_entry, *tmp;
235
847a50fd 236 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 237 list_for_each_entry_safe(pool_entry, tmp,
238 &card->qdio.in_buf_pool.entry_list, list){
239 list_del(&pool_entry->list);
240 }
241}
242EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
243
244static int qeth_alloc_buffer_pool(struct qeth_card *card)
245{
246 struct qeth_buffer_pool_entry *pool_entry;
247 void *ptr;
248 int i, j;
249
847a50fd 250 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 251 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 252 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 253 if (!pool_entry) {
254 qeth_free_buffer_pool(card);
255 return -ENOMEM;
256 }
257 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 258 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 259 if (!ptr) {
260 while (j > 0)
261 free_page((unsigned long)
262 pool_entry->elements[--j]);
263 kfree(pool_entry);
264 qeth_free_buffer_pool(card);
265 return -ENOMEM;
266 }
267 pool_entry->elements[j] = ptr;
268 }
269 list_add(&pool_entry->init_list,
270 &card->qdio.init_pool.entry_list);
271 }
272 return 0;
273}
274
275int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
276{
847a50fd 277 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 278
279 if ((card->state != CARD_STATE_DOWN) &&
280 (card->state != CARD_STATE_RECOVER))
281 return -EPERM;
282
283 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
284 qeth_clear_working_pool_list(card);
285 qeth_free_buffer_pool(card);
286 card->qdio.in_buf_pool.buf_count = bufcnt;
287 card->qdio.init_pool.buf_count = bufcnt;
288 return qeth_alloc_buffer_pool(card);
289}
76b11f8e 290EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 291
0da9581d
EL		 292static inline int qeth_cq_init(struct qeth_card *card)
293{
294 int rc;
295
296 if (card->options.cq == QETH_CQ_ENABLED) {
297 QETH_DBF_TEXT(SETUP, 2, "cqinit");
298 memset(card->qdio.c_q->qdio_bufs, 0,
299 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
300 card->qdio.c_q->next_buf_to_init = 127;
301 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
302 card->qdio.no_in_queues - 1, 0,
303 127);
304 if (rc) {
305 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
306 goto out;
307 }
308 }
309 rc = 0;
310out:
311 return rc;
312}
313
314static inline int qeth_alloc_cq(struct qeth_card *card)
315{
316 int rc;
317
318 if (card->options.cq == QETH_CQ_ENABLED) {
319 int i;
320 struct qdio_outbuf_state *outbuf_states;
321
322 QETH_DBF_TEXT(SETUP, 2, "cqon");
323 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
324 GFP_KERNEL);
325 if (!card->qdio.c_q) {
326 rc = -1;
327 goto kmsg_out;
328 }
329 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
330
331 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
332 card->qdio.c_q->bufs[i].buffer =
333 &card->qdio.c_q->qdio_bufs[i];
334 }
335
336 card->qdio.no_in_queues = 2;
337
4a912f98 338 card->qdio.out_bufstates =
0da9581d
EL		 339 kzalloc(card->qdio.no_out_queues *
340 QDIO_MAX_BUFFERS_PER_Q *
341 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
342 outbuf_states = card->qdio.out_bufstates;
343 if (outbuf_states == NULL) {
344 rc = -1;
345 goto free_cq_out;
346 }
347 for (i = 0; i < card->qdio.no_out_queues; ++i) {
348 card->qdio.out_qs[i]->bufstates = outbuf_states;
349 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
350 }
351 } else {
352 QETH_DBF_TEXT(SETUP, 2, "nocq");
353 card->qdio.c_q = NULL;
354 card->qdio.no_in_queues = 1;
355 }
356 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
357 rc = 0;
358out:
359 return rc;
360free_cq_out:
361 kfree(card->qdio.c_q);
362 card->qdio.c_q = NULL;
363kmsg_out:
364 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
365 goto out;
366}
367
368static inline void qeth_free_cq(struct qeth_card *card)
369{
370 if (card->qdio.c_q) {
371 --card->qdio.no_in_queues;
372 kfree(card->qdio.c_q);
373 card->qdio.c_q = NULL;
374 }
375 kfree(card->qdio.out_bufstates);
376 card->qdio.out_bufstates = NULL;
377}
378
b3332930
FB		 379static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
380 int delayed) {
381 enum iucv_tx_notify n;
382
383 switch (sbalf15) {
384 case 0:
385 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
386 break;
387 case 4:
388 case 16:
389 case 17:
390 case 18:
391 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
392 TX_NOTIFY_UNREACHABLE;
393 break;
394 default:
395 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
396 TX_NOTIFY_GENERALERROR;
397 break;
398 }
399
400 return n;
401}
402
0da9581d
EL		 403static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
404 int bidx, int forced_cleanup)
405{
72861ae7
EL		 406 if (q->card->options.cq != QETH_CQ_ENABLED)
407 return;
408
0da9581d
EL		 409 if (q->bufs[bidx]->next_pending != NULL) {
410 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
411 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
412
413 while (c) {
414 if (forced_cleanup ||
415 atomic_read(&c->state) ==
416 QETH_QDIO_BUF_HANDLED_DELAYED) {
417 struct qeth_qdio_out_buffer *f = c;
418 QETH_CARD_TEXT(f->q->card, 5, "fp");
419 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 420 /* release here to avoid interleaving between
421 outbound tasklet and inbound tasklet
422 regarding notifications and lifecycle */
423 qeth_release_skbs(c);
424
0da9581d 425 c = f->next_pending;
18af5c17 426 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 427 head->next_pending = c;
428 kmem_cache_free(qeth_qdio_outbuf_cache, f);
429 } else {
430 head = c;
431 c = c->next_pending;
432 }
433
434 }
435 }
72861ae7
EL		 436 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
437 QETH_QDIO_BUF_HANDLED_DELAYED)) {
438 /* for recovery situations */
439 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
440 qeth_init_qdio_out_buf(q, bidx);
441 QETH_CARD_TEXT(q->card, 2, "clprecov");
442 }
0da9581d
EL		 443}
444
445
446static inline void qeth_qdio_handle_aob(struct qeth_card *card,
447 unsigned long phys_aob_addr) {
448 struct qaob *aob;
449 struct qeth_qdio_out_buffer *buffer;
b3332930 450 enum iucv_tx_notify notification;
0da9581d
EL		 451
452 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
453 QETH_CARD_TEXT(card, 5, "haob");
454 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
455 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
456 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
457
b3332930
FB		 458 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
459 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
460 notification = TX_NOTIFY_OK;
461 } else {
18af5c17
SR		 462 WARN_ON_ONCE(atomic_read(&buffer->state) !=
463 QETH_QDIO_BUF_PENDING);
b3332930
FB		 464 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
465 notification = TX_NOTIFY_DELAYED_OK;
466 }
467
468 if (aob->aorc != 0) {
469 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
470 notification = qeth_compute_cq_notification(aob->aorc, 1);
471 }
472 qeth_notify_skbs(buffer->q, buffer, notification);
473
0da9581d
EL		 474 buffer->aob = NULL;
475 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 476 QETH_QDIO_BUF_HANDLED_DELAYED);
477
0da9581d
EL		 478 /* from here on: do not touch buffer anymore */
479 qdio_release_aob(aob);
480}
481
482static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
483{
484 return card->options.cq == QETH_CQ_ENABLED &&
485 card->qdio.c_q != NULL &&
486 queue != 0 &&
487 queue == card->qdio.no_in_queues - 1;
488}
489
490
4a71df50
FB		 491static int qeth_issue_next_read(struct qeth_card *card)
492{
493 int rc;
494 struct qeth_cmd_buffer *iob;
495
847a50fd 496 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 497 if (card->read.state != CH_STATE_UP)
498 return -EIO;
499 iob = qeth_get_buffer(&card->read);
500 if (!iob) {
74eacdb9
FB		 501 dev_warn(&card->gdev->dev, "The qeth device driver "
502 "failed to recover an error on the device\n");
503 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
504 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 505 return -ENOMEM;
506 }
507 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 508 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 509 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
510 (addr_t) iob, 0, 0);
511 if (rc) {
74eacdb9
FB		 512 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
513 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 514 atomic_set(&card->read.irq_pending, 0);
908abbb5 515 card->read_or_write_problem = 1;
4a71df50
FB		 516 qeth_schedule_recovery(card);
517 wake_up(&card->wait_q);
518 }
519 return rc;
520}
521
522static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
523{
524 struct qeth_reply *reply;
525
526 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
527 if (reply) {
528 atomic_set(&reply->refcnt, 1);
529 atomic_set(&reply->received, 0);
530 reply->card = card;
6531084c 531 }
4a71df50
FB		 532 return reply;
533}
534
535static void qeth_get_reply(struct qeth_reply *reply)
536{
537 WARN_ON(atomic_read(&reply->refcnt) <= 0);
538 atomic_inc(&reply->refcnt);
539}
540
541static void qeth_put_reply(struct qeth_reply *reply)
542{
543 WARN_ON(atomic_read(&reply->refcnt) <= 0);
544 if (atomic_dec_and_test(&reply->refcnt))
545 kfree(reply);
546}
547
d11ba0c4 548static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 549 struct qeth_card *card)
550{
4a71df50 551 char *ipa_name;
d11ba0c4 552 int com = cmd->hdr.command;
4a71df50 553 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 554 if (rc)
70919e23
UB		 555 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
556 "x%X \"%s\"\n",
557 ipa_name, com, dev_name(&card->gdev->dev),
558 QETH_CARD_IFNAME(card), rc,
559 qeth_get_ipa_msg(rc));
d11ba0c4 560 else
70919e23
UB		 561 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
562 ipa_name, com, dev_name(&card->gdev->dev),
563 QETH_CARD_IFNAME(card));
4a71df50
FB		 564}
565
566static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
567 struct qeth_cmd_buffer *iob)
568{
569 struct qeth_ipa_cmd *cmd = NULL;
570
847a50fd 571 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 572 if (IS_IPA(iob->data)) {
573 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
574 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 575 if (cmd->hdr.command != IPA_CMD_SETCCID &&
576 cmd->hdr.command != IPA_CMD_DELCCID &&
577 cmd->hdr.command != IPA_CMD_MODCCID &&
578 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 579 qeth_issue_ipa_msg(cmd,
580 cmd->hdr.return_code, card);
4a71df50
FB		 581 return cmd;
582 } else {
583 switch (cmd->hdr.command) {
584 case IPA_CMD_STOPLAN:
0f54761d
SR		 585 if (cmd->hdr.return_code ==
586 IPA_RC_VEPA_TO_VEB_TRANSITION) {
587 dev_err(&card->gdev->dev,
588 "Interface %s is down because the "
589 "adjacent port is no longer in "
590 "reflective relay mode\n",
591 QETH_CARD_IFNAME(card));
592 qeth_close_dev(card);
593 } else {
594 dev_warn(&card->gdev->dev,
74eacdb9
FB		 595 "The link for interface %s on CHPID"
596 " 0x%X failed\n",
4a71df50
FB		 597 QETH_CARD_IFNAME(card),
598 card->info.chpid);
0f54761d
SR		 599 qeth_issue_ipa_msg(cmd,
600 cmd->hdr.return_code, card);
601 }
4a71df50
FB		 602 card->lan_online = 0;
603 if (card->dev && netif_carrier_ok(card->dev))
604 netif_carrier_off(card->dev);
605 return NULL;
606 case IPA_CMD_STARTLAN:
74eacdb9
FB		 607 dev_info(&card->gdev->dev,
608 "The link for %s on CHPID 0x%X has"
609 " been restored\n",
4a71df50
FB		 610 QETH_CARD_IFNAME(card),
611 card->info.chpid);
612 netif_carrier_on(card->dev);
922dc062 613 card->lan_online = 1;
1da74b1c
FB		 614 if (card->info.hwtrap)
615 card->info.hwtrap = 2;
4a71df50
FB		 616 qeth_schedule_recovery(card);
617 return NULL;
b4d72c08
EC		 618 case IPA_CMD_SETBRIDGEPORT:
619 if (cmd->data.sbp.hdr.command_code ==
620 IPA_SBP_BRIDGE_PORT_STATE_CHANGE) {
621 qeth_bridge_state_change(card, cmd);
622 return NULL;
623 } else
624 return cmd;
4a71df50
FB		 625 case IPA_CMD_MODCCID:
626 return cmd;
627 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 628 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 629 break;
630 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 631 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 632 break;
633 default:
c4cef07c 634 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 635 "but not a reply!\n");
636 break;
637 }
638 }
639 }
640 return cmd;
641}
642
643void qeth_clear_ipacmd_list(struct qeth_card *card)
644{
645 struct qeth_reply *reply, *r;
646 unsigned long flags;
647
847a50fd 648 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 649
650 spin_lock_irqsave(&card->lock, flags);
651 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
652 qeth_get_reply(reply);
653 reply->rc = -EIO;
654 atomic_inc(&reply->received);
655 list_del_init(&reply->list);
656 wake_up(&reply->wait_q);
657 qeth_put_reply(reply);
658 }
659 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 660 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 661}
662EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
663
5113fec0
UB		 664static int qeth_check_idx_response(struct qeth_card *card,
665 unsigned char *buffer)
4a71df50
FB		 666{
667 if (!buffer)
668 return 0;
669
d11ba0c4 670 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 671 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 672 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 673 "with cause code 0x%02x%s\n",
674 buffer[4],
675 ((buffer[4] == 0x22) ?
676 " -- try another portname" : ""));
847a50fd
CO		 677 QETH_CARD_TEXT(card, 2, "ckidxres");
678 QETH_CARD_TEXT(card, 2, " idxterm");
679 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 680 if (buffer[4] == 0xf6) {
681 dev_err(&card->gdev->dev,
682 "The qeth device is not configured "
683 "for the OSI layer required by z/VM\n");
684 return -EPERM;
685 }
4a71df50
FB		 686 return -EIO;
687 }
688 return 0;
689}
690
691static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
692 __u32 len)
693{
694 struct qeth_card *card;
695
4a71df50 696 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 697 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 698 if (channel == &card->read)
699 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
700 else
701 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
702 channel->ccw.count = len;
703 channel->ccw.cda = (__u32) __pa(iob);
704}
705
706static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
707{
708 __u8 index;
709
847a50fd 710 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 711 index = channel->io_buf_no;
712 do {
713 if (channel->iob[index].state == BUF_STATE_FREE) {
714 channel->iob[index].state = BUF_STATE_LOCKED;
715 channel->io_buf_no = (channel->io_buf_no + 1) %
716 QETH_CMD_BUFFER_NO;
717 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
718 return channel->iob + index;
719 }
720 index = (index + 1) % QETH_CMD_BUFFER_NO;
721 } while (index != channel->io_buf_no);
722
723 return NULL;
724}
725
726void qeth_release_buffer(struct qeth_channel *channel,
727 struct qeth_cmd_buffer *iob)
728{
729 unsigned long flags;
730
847a50fd 731 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 732 spin_lock_irqsave(&channel->iob_lock, flags);
733 memset(iob->data, 0, QETH_BUFSIZE);
734 iob->state = BUF_STATE_FREE;
735 iob->callback = qeth_send_control_data_cb;
736 iob->rc = 0;
737 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 738 wake_up(&channel->wait_q);
4a71df50
FB		 739}
740EXPORT_SYMBOL_GPL(qeth_release_buffer);
741
742static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
743{
744 struct qeth_cmd_buffer *buffer = NULL;
745 unsigned long flags;
746
747 spin_lock_irqsave(&channel->iob_lock, flags);
748 buffer = __qeth_get_buffer(channel);
749 spin_unlock_irqrestore(&channel->iob_lock, flags);
750 return buffer;
751}
752
753struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
754{
755 struct qeth_cmd_buffer *buffer;
756 wait_event(channel->wait_q,
757 ((buffer = qeth_get_buffer(channel)) != NULL));
758 return buffer;
759}
760EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
761
762void qeth_clear_cmd_buffers(struct qeth_channel *channel)
763{
764 int cnt;
765
766 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
767 qeth_release_buffer(channel, &channel->iob[cnt]);
768 channel->buf_no = 0;
769 channel->io_buf_no = 0;
770}
771EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
772
773static void qeth_send_control_data_cb(struct qeth_channel *channel,
774 struct qeth_cmd_buffer *iob)
775{
776 struct qeth_card *card;
777 struct qeth_reply *reply, *r;
778 struct qeth_ipa_cmd *cmd;
779 unsigned long flags;
780 int keep_reply;
5113fec0 781 int rc = 0;
4a71df50 782
4a71df50 783 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 784 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 785 rc = qeth_check_idx_response(card, iob->data);
786 switch (rc) {
787 case 0:
788 break;
789 case -EIO:
4a71df50 790 qeth_clear_ipacmd_list(card);
5113fec0 791 qeth_schedule_recovery(card);
01fc3e86 792 /* fall through */
5113fec0 793 default:
4a71df50
FB		 794 goto out;
795 }
796
797 cmd = qeth_check_ipa_data(card, iob);
798 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
799 goto out;
800 /*in case of OSN : check if cmd is set */
801 if (card->info.type == QETH_CARD_TYPE_OSN &&
802 cmd &&
803 cmd->hdr.command != IPA_CMD_STARTLAN &&
804 card->osn_info.assist_cb != NULL) {
805 card->osn_info.assist_cb(card->dev, cmd);
806 goto out;
807 }
808
809 spin_lock_irqsave(&card->lock, flags);
810 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
811 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
812 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
813 qeth_get_reply(reply);
814 list_del_init(&reply->list);
815 spin_unlock_irqrestore(&card->lock, flags);
816 keep_reply = 0;
817 if (reply->callback != NULL) {
818 if (cmd) {
819 reply->offset = (__u16)((char *)cmd -
820 (char *)iob->data);
821 keep_reply = reply->callback(card,
822 reply,
823 (unsigned long)cmd);
824 } else
825 keep_reply = reply->callback(card,
826 reply,
827 (unsigned long)iob);
828 }
829 if (cmd)
830 reply->rc = (u16) cmd->hdr.return_code;
831 else if (iob->rc)
832 reply->rc = iob->rc;
833 if (keep_reply) {
834 spin_lock_irqsave(&card->lock, flags);
835 list_add_tail(&reply->list,
836 &card->cmd_waiter_list);
837 spin_unlock_irqrestore(&card->lock, flags);
838 } else {
839 atomic_inc(&reply->received);
840 wake_up(&reply->wait_q);
841 }
842 qeth_put_reply(reply);
843 goto out;
844 }
845 }
846 spin_unlock_irqrestore(&card->lock, flags);
847out:
848 memcpy(&card->seqno.pdu_hdr_ack,
849 QETH_PDU_HEADER_SEQ_NO(iob->data),
850 QETH_SEQ_NO_LENGTH);
851 qeth_release_buffer(channel, iob);
852}
853
854static int qeth_setup_channel(struct qeth_channel *channel)
855{
856 int cnt;
857
d11ba0c4 858 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 859 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 860 channel->iob[cnt].data =
b3332930 861 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 862 if (channel->iob[cnt].data == NULL)
863 break;
864 channel->iob[cnt].state = BUF_STATE_FREE;
865 channel->iob[cnt].channel = channel;
866 channel->iob[cnt].callback = qeth_send_control_data_cb;
867 channel->iob[cnt].rc = 0;
868 }
869 if (cnt < QETH_CMD_BUFFER_NO) {
870 while (cnt-- > 0)
871 kfree(channel->iob[cnt].data);
872 return -ENOMEM;
873 }
874 channel->buf_no = 0;
875 channel->io_buf_no = 0;
876 atomic_set(&channel->irq_pending, 0);
877 spin_lock_init(&channel->iob_lock);
878
879 init_waitqueue_head(&channel->wait_q);
880 return 0;
881}
882
883static int qeth_set_thread_start_bit(struct qeth_card *card,
884 unsigned long thread)
885{
886 unsigned long flags;
887
888 spin_lock_irqsave(&card->thread_mask_lock, flags);
889 if (!(card->thread_allowed_mask & thread) ||
890 (card->thread_start_mask & thread)) {
891 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
892 return -EPERM;
893 }
894 card->thread_start_mask |= thread;
895 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
896 return 0;
897}
898
899void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
900{
901 unsigned long flags;
902
903 spin_lock_irqsave(&card->thread_mask_lock, flags);
904 card->thread_start_mask &= ~thread;
905 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
906 wake_up(&card->wait_q);
907}
908EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
909
910void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
911{
912 unsigned long flags;
913
914 spin_lock_irqsave(&card->thread_mask_lock, flags);
915 card->thread_running_mask &= ~thread;
916 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
917 wake_up(&card->wait_q);
918}
919EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
920
921static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
922{
923 unsigned long flags;
924 int rc = 0;
925
926 spin_lock_irqsave(&card->thread_mask_lock, flags);
927 if (card->thread_start_mask & thread) {
928 if ((card->thread_allowed_mask & thread) &&
929 !(card->thread_running_mask & thread)) {
930 rc = 1;
931 card->thread_start_mask &= ~thread;
932 card->thread_running_mask |= thread;
933 } else
934 rc = -EPERM;
935 }
936 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
937 return rc;
938}
939
940int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
941{
942 int rc = 0;
943
944 wait_event(card->wait_q,
945 (rc = __qeth_do_run_thread(card, thread)) >= 0);
946 return rc;
947}
948EXPORT_SYMBOL_GPL(qeth_do_run_thread);
949
950void qeth_schedule_recovery(struct qeth_card *card)
951{
847a50fd 952 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 953 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
954 schedule_work(&card->kernel_thread_starter);
955}
956EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
957
958static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
959{
960 int dstat, cstat;
961 char *sense;
847a50fd 962 struct qeth_card *card;
4a71df50
FB		 963
964 sense = (char *) irb->ecw;
23d805b6
PO		 965 cstat = irb->scsw.cmd.cstat;
966 dstat = irb->scsw.cmd.dstat;
847a50fd 967 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 968
969 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
970 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
971 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 972 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 973 dev_warn(&cdev->dev, "The qeth device driver "
974 "failed to recover an error on the device\n");
5113fec0 975 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 976 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 977 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
978 16, 1, irb, 64, 1);
979 return 1;
980 }
981
982 if (dstat & DEV_STAT_UNIT_CHECK) {
983 if (sense[SENSE_RESETTING_EVENT_BYTE] &
984 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 985 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 986 return 1;
987 }
988 if (sense[SENSE_COMMAND_REJECT_BYTE] &
989 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 990 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 991 return 1;
4a71df50
FB		 992 }
993 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 994 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 995 return 1;
996 }
997 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 998 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 999 return 0;
1000 }
847a50fd 1001 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1002 return 1;
1003 }
1004 return 0;
1005}
1006
1007static long __qeth_check_irb_error(struct ccw_device *cdev,
1008 unsigned long intparm, struct irb *irb)
1009{
847a50fd
CO		 1010 struct qeth_card *card;
1011
1012 card = CARD_FROM_CDEV(cdev);
1013
4a71df50
FB		 1014 if (!IS_ERR(irb))
1015 return 0;
1016
1017 switch (PTR_ERR(irb)) {
1018 case -EIO:
74eacdb9
FB		 1019 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1020 dev_name(&cdev->dev));
847a50fd
CO		 1021 QETH_CARD_TEXT(card, 2, "ckirberr");
1022 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1023 break;
1024 case -ETIMEDOUT:
74eacdb9
FB		 1025 dev_warn(&cdev->dev, "A hardware operation timed out"
1026 " on the device\n");
847a50fd
CO		 1027 QETH_CARD_TEXT(card, 2, "ckirberr");
1028 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1029 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 1030 if (card && (card->data.ccwdev == cdev)) {
1031 card->data.state = CH_STATE_DOWN;
1032 wake_up(&card->wait_q);
1033 }
1034 }
1035 break;
1036 default:
74eacdb9
FB		 1037 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1038 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1039 QETH_CARD_TEXT(card, 2, "ckirberr");
1040 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1041 }
1042 return PTR_ERR(irb);
1043}
1044
1045static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1046 struct irb *irb)
1047{
1048 int rc;
1049 int cstat, dstat;
1050 struct qeth_cmd_buffer *buffer;
1051 struct qeth_channel *channel;
1052 struct qeth_card *card;
1053 struct qeth_cmd_buffer *iob;
1054 __u8 index;
1055
4a71df50
FB		 1056 if (__qeth_check_irb_error(cdev, intparm, irb))
1057 return;
23d805b6
PO		 1058 cstat = irb->scsw.cmd.cstat;
1059 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1060
1061 card = CARD_FROM_CDEV(cdev);
1062 if (!card)
1063 return;
1064
847a50fd
CO		 1065 QETH_CARD_TEXT(card, 5, "irq");
1066
4a71df50
FB		 1067 if (card->read.ccwdev == cdev) {
1068 channel = &card->read;
847a50fd 1069 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1070 } else if (card->write.ccwdev == cdev) {
1071 channel = &card->write;
847a50fd 1072 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1073 } else {
1074 channel = &card->data;
847a50fd 1075 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1076 }
1077 atomic_set(&channel->irq_pending, 0);
1078
23d805b6 1079 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1080 channel->state = CH_STATE_STOPPED;
1081
23d805b6 1082 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1083 channel->state = CH_STATE_HALTED;
1084
1085 /*let's wake up immediately on data channel*/
1086 if ((channel == &card->data) && (intparm != 0) &&
1087 (intparm != QETH_RCD_PARM))
1088 goto out;
1089
1090 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1091 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1092 /* we don't have to handle this further */
1093 intparm = 0;
1094 }
1095 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1096 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1097 /* we don't have to handle this further */
1098 intparm = 0;
1099 }
1100 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1101 (dstat & DEV_STAT_UNIT_CHECK) ||
1102 (cstat)) {
1103 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1104 dev_warn(&channel->ccwdev->dev,
1105 "The qeth device driver failed to recover "
1106 "an error on the device\n");
1107 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1108 "0x%X dstat 0x%X\n",
1109 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1110 print_hex_dump(KERN_WARNING, "qeth: irb ",
1111 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1112 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1113 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1114 }
1115 if (intparm == QETH_RCD_PARM) {
1116 channel->state = CH_STATE_DOWN;
1117 goto out;
1118 }
1119 rc = qeth_get_problem(cdev, irb);
1120 if (rc) {
28a7e4c9 1121 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1122 qeth_schedule_recovery(card);
1123 goto out;
1124 }
1125 }
1126
1127 if (intparm == QETH_RCD_PARM) {
1128 channel->state = CH_STATE_RCD_DONE;
1129 goto out;
1130 }
1131 if (intparm) {
1132 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1133 buffer->state = BUF_STATE_PROCESSED;
1134 }
1135 if (channel == &card->data)
1136 return;
1137 if (channel == &card->read &&
1138 channel->state == CH_STATE_UP)
1139 qeth_issue_next_read(card);
1140
1141 iob = channel->iob;
1142 index = channel->buf_no;
1143 while (iob[index].state == BUF_STATE_PROCESSED) {
1144 if (iob[index].callback != NULL)
1145 iob[index].callback(channel, iob + index);
1146
1147 index = (index + 1) % QETH_CMD_BUFFER_NO;
1148 }
1149 channel->buf_no = index;
1150out:
1151 wake_up(&card->wait_q);
1152 return;
1153}
1154
b3332930 1155static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1156 struct qeth_qdio_out_buffer *buf,
b3332930 1157 enum iucv_tx_notify notification)
4a71df50 1158{
4a71df50
FB		 1159 struct sk_buff *skb;
1160
b3332930
FB		 1161 if (skb_queue_empty(&buf->skb_list))
1162 goto out;
1163 skb = skb_peek(&buf->skb_list);
1164 while (skb) {
1165 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1166 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1167 if (skb->protocol == ETH_P_AF_IUCV) {
1168 if (skb->sk) {
1169 struct iucv_sock *iucv = iucv_sk(skb->sk);
1170 iucv->sk_txnotify(skb, notification);
1171 }
1172 }
1173 if (skb_queue_is_last(&buf->skb_list, skb))
1174 skb = NULL;
1175 else
1176 skb = skb_queue_next(&buf->skb_list, skb);
1177 }
1178out:
1179 return;
1180}
1181
1182static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1183{
1184 struct sk_buff *skb;
72861ae7
EL		 1185 struct iucv_sock *iucv;
1186 int notify_general_error = 0;
1187
1188 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1189 notify_general_error = 1;
1190
1191 /* release may never happen from within CQ tasklet scope */
18af5c17 1192 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1193
b67d801f
UB		 1194 skb = skb_dequeue(&buf->skb_list);
1195 while (skb) {
b3332930
FB		 1196 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1197 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1198 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1199 if (skb->sk) {
1200 iucv = iucv_sk(skb->sk);
1201 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1202 }
1203 }
b67d801f
UB		 1204 atomic_dec(&skb->users);
1205 dev_kfree_skb_any(skb);
4a71df50
FB		 1206 skb = skb_dequeue(&buf->skb_list);
1207 }
b3332930
FB		 1208}
1209
1210static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1211 struct qeth_qdio_out_buffer *buf,
1212 enum qeth_qdio_buffer_states newbufstate)
1213{
1214 int i;
1215
1216 /* is PCI flag set on buffer? */
1217 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1218 atomic_dec(&queue->set_pci_flags_count);
1219
1220 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1221 qeth_release_skbs(buf);
1222 }
4a71df50 1223 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1224 if (buf->buffer->element[i].addr && buf->is_header[i])
1225 kmem_cache_free(qeth_core_header_cache,
1226 buf->buffer->element[i].addr);
1227 buf->is_header[i] = 0;
4a71df50
FB		 1228 buf->buffer->element[i].length = 0;
1229 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1230 buf->buffer->element[i].eflags = 0;
1231 buf->buffer->element[i].sflags = 0;
4a71df50 1232 }
3ec90878
JG		 1233 buf->buffer->element[15].eflags = 0;
1234 buf->buffer->element[15].sflags = 0;
4a71df50 1235 buf->next_element_to_fill = 0;
0da9581d
EL		 1236 atomic_set(&buf->state, newbufstate);
1237}
1238
1239static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1240{
1241 int j;
1242
1243 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1244 if (!q->bufs[j])
1245 continue;
72861ae7 1246 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1247 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1248 if (free) {
1249 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1250 q->bufs[j] = NULL;
1251 }
1252 }
4a71df50
FB		 1253}
1254
1255void qeth_clear_qdio_buffers(struct qeth_card *card)
1256{
0da9581d 1257 int i;
4a71df50 1258
847a50fd 1259 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1260 /* clear outbound buffers to free skbs */
0da9581d 1261 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1262 if (card->qdio.out_qs[i]) {
0da9581d 1263 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1264 }
0da9581d 1265 }
4a71df50
FB		 1266}
1267EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1268
1269static void qeth_free_buffer_pool(struct qeth_card *card)
1270{
1271 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1272 int i = 0;
4a71df50
FB		 1273 list_for_each_entry_safe(pool_entry, tmp,
1274 &card->qdio.init_pool.entry_list, init_list){
1275 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1276 free_page((unsigned long)pool_entry->elements[i]);
1277 list_del(&pool_entry->init_list);
1278 kfree(pool_entry);
1279 }
1280}
1281
1282static void qeth_free_qdio_buffers(struct qeth_card *card)
1283{
b3332930 1284 int i, j;
4a71df50 1285
4a71df50
FB		 1286 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1287 QETH_QDIO_UNINITIALIZED)
1288 return;
0da9581d
EL		 1289
1290 qeth_free_cq(card);
b3332930 1291 cancel_delayed_work_sync(&card->buffer_reclaim_work);
ede88671
SR		 1292 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1293 if (card->qdio.in_q->bufs[j].rx_skb)
1294 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
1295 }
4a71df50
FB		 1296 kfree(card->qdio.in_q);
1297 card->qdio.in_q = NULL;
1298 /* inbound buffer pool */
1299 qeth_free_buffer_pool(card);
1300 /* free outbound qdio_qs */
1301 if (card->qdio.out_qs) {
1302 for (i = 0; i < card->qdio.no_out_queues; ++i) {
0da9581d 1303 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
4a71df50
FB		 1304 kfree(card->qdio.out_qs[i]);
1305 }
1306 kfree(card->qdio.out_qs);
1307 card->qdio.out_qs = NULL;
1308 }
1309}
1310
1311static void qeth_clean_channel(struct qeth_channel *channel)
1312{
1313 int cnt;
1314
d11ba0c4 1315 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1316 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1317 kfree(channel->iob[cnt].data);
1318}
1319
725b9c04
SO		 1320static void qeth_set_single_write_queues(struct qeth_card *card)
1321{
1322 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1323 (card->qdio.no_out_queues == 4))
1324 qeth_free_qdio_buffers(card);
1325
1326 card->qdio.no_out_queues = 1;
1327 if (card->qdio.default_out_queue != 0)
1328 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1329
1330 card->qdio.default_out_queue = 0;
1331}
1332
1333static void qeth_set_multiple_write_queues(struct qeth_card *card)
1334{
1335 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1336 (card->qdio.no_out_queues == 1)) {
1337 qeth_free_qdio_buffers(card);
1338 card->qdio.default_out_queue = 2;
1339 }
1340 card->qdio.no_out_queues = 4;
1341}
1342
1343static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1344{
4a71df50
FB		 1345 struct ccw_device *ccwdev;
1346 struct channelPath_dsc {
1347 u8 flags;
1348 u8 lsn;
1349 u8 desc;
1350 u8 chpid;
1351 u8 swla;
1352 u8 zeroes;
1353 u8 chla;
1354 u8 chpp;
1355 } *chp_dsc;
1356
5113fec0 1357 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1358
1359 ccwdev = card->data.ccwdev;
725b9c04
SO		 1360 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1361 if (!chp_dsc)
1362 goto out;
1363
1364 card->info.func_level = 0x4100 + chp_dsc->desc;
1365 if (card->info.type == QETH_CARD_TYPE_IQD)
1366 goto out;
1367
1368 /* CHPP field bit 6 == 1 -> single queue */
1369 if ((chp_dsc->chpp & 0x02) == 0x02)
1370 qeth_set_single_write_queues(card);
1371 else
1372 qeth_set_multiple_write_queues(card);
1373out:
1374 kfree(chp_dsc);
5113fec0
UB		 1375 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1376 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1377}
1378
1379static void qeth_init_qdio_info(struct qeth_card *card)
1380{
d11ba0c4 1381 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1382 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1383 /* inbound */
1384 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1385 if (card->info.type == QETH_CARD_TYPE_IQD)
1386 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1387 else
1388 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1389 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1390 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1391 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1392}
1393
1394static void qeth_set_intial_options(struct qeth_card *card)
1395{
1396 card->options.route4.type = NO_ROUTER;
1397 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1398 card->options.fake_broadcast = 0;
1399 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1400 card->options.performance_stats = 0;
1401 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1402 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1403 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1404}
1405
1406static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1407{
1408 unsigned long flags;
1409 int rc = 0;
1410
1411 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1412 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1413 (u8) card->thread_start_mask,
1414 (u8) card->thread_allowed_mask,
1415 (u8) card->thread_running_mask);
1416 rc = (card->thread_start_mask & thread);
1417 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1418 return rc;
1419}
1420
1421static void qeth_start_kernel_thread(struct work_struct *work)
1422{
3f36b890 1423 struct task_struct *ts;
4a71df50
FB		 1424 struct qeth_card *card = container_of(work, struct qeth_card,
1425 kernel_thread_starter);
847a50fd 1426 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1427
1428 if (card->read.state != CH_STATE_UP &&
1429 card->write.state != CH_STATE_UP)
1430 return;
3f36b890 1431 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1432 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1433 "qeth_recover");
3f36b890
FB		 1434 if (IS_ERR(ts)) {
1435 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1436 qeth_clear_thread_running_bit(card,
1437 QETH_RECOVER_THREAD);
1438 }
1439 }
4a71df50
FB		 1440}
1441
1442static int qeth_setup_card(struct qeth_card *card)
1443{
1444
d11ba0c4
PT		 1445 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1446 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1447
1448 card->read.state = CH_STATE_DOWN;
1449 card->write.state = CH_STATE_DOWN;
1450 card->data.state = CH_STATE_DOWN;
1451 card->state = CARD_STATE_DOWN;
1452 card->lan_online = 0;
908abbb5 1453 card->read_or_write_problem = 0;
4a71df50
FB		 1454 card->dev = NULL;
1455 spin_lock_init(&card->vlanlock);
1456 spin_lock_init(&card->mclock);
4a71df50
FB		 1457 spin_lock_init(&card->lock);
1458 spin_lock_init(&card->ip_lock);
1459 spin_lock_init(&card->thread_mask_lock);
c4949f07 1460 mutex_init(&card->conf_mutex);
9dc48ccc 1461 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1462 card->thread_start_mask = 0;
1463 card->thread_allowed_mask = 0;
1464 card->thread_running_mask = 0;
1465 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1466 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1467 INIT_LIST_HEAD(card->ip_tbd_list);
1468 INIT_LIST_HEAD(&card->cmd_waiter_list);
1469 init_waitqueue_head(&card->wait_q);
25985edc 1470 /* initial options */
4a71df50
FB		 1471 qeth_set_intial_options(card);
1472 /* IP address takeover */
1473 INIT_LIST_HEAD(&card->ipato.entries);
1474 card->ipato.enabled = 0;
1475 card->ipato.invert4 = 0;
1476 card->ipato.invert6 = 0;
1477 /* init QDIO stuff */
1478 qeth_init_qdio_info(card);
b3332930 1479 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1480 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1481 return 0;
1482}
1483
6bcac508
MS		 1484static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1485{
1486 struct qeth_card *card = container_of(slr, struct qeth_card,
1487 qeth_service_level);
0d788c7d
KDW		 1488 if (card->info.mcl_level[0])
1489 seq_printf(m, "qeth: %s firmware level %s\n",
1490 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1491}
1492
4a71df50
FB		 1493static struct qeth_card *qeth_alloc_card(void)
1494{
1495 struct qeth_card *card;
1496
d11ba0c4 1497 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1498 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1499 if (!card)
76b11f8e 1500 goto out;
d11ba0c4 1501 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1502 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1503 if (!card->ip_tbd_list) {
1504 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1505 goto out_card;
4a71df50 1506 }
76b11f8e
UB		 1507 if (qeth_setup_channel(&card->read))
1508 goto out_ip;
1509 if (qeth_setup_channel(&card->write))
1510 goto out_channel;
4a71df50 1511 card->options.layer2 = -1;
6bcac508
MS		 1512 card->qeth_service_level.seq_print = qeth_core_sl_print;
1513 register_service_level(&card->qeth_service_level);
4a71df50 1514 return card;
76b11f8e
UB		 1515
1516out_channel:
1517 qeth_clean_channel(&card->read);
1518out_ip:
1519 kfree(card->ip_tbd_list);
1520out_card:
1521 kfree(card);
1522out:
1523 return NULL;
4a71df50
FB		 1524}
1525
1526static int qeth_determine_card_type(struct qeth_card *card)
1527{
1528 int i = 0;
1529
d11ba0c4 1530 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1531
1532 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1533 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1534 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1535 if ((CARD_RDEV(card)->id.dev_type ==
1536 known_devices[i][QETH_DEV_TYPE_IND]) &&
1537 (CARD_RDEV(card)->id.dev_model ==
1538 known_devices[i][QETH_DEV_MODEL_IND])) {
1539 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1540 card->qdio.no_out_queues =
1541 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1542 card->qdio.no_in_queues = 1;
5113fec0
UB		 1543 card->info.is_multicast_different =
1544 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1545 qeth_update_from_chp_desc(card);
4a71df50
FB		 1546 return 0;
1547 }
1548 i++;
1549 }
1550 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1551 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1552 "unknown type\n");
4a71df50
FB		 1553 return -ENOENT;
1554}
1555
1556static int qeth_clear_channel(struct qeth_channel *channel)
1557{
1558 unsigned long flags;
1559 struct qeth_card *card;
1560 int rc;
1561
4a71df50 1562 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1563 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1564 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1565 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1566 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1567
1568 if (rc)
1569 return rc;
1570 rc = wait_event_interruptible_timeout(card->wait_q,
1571 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1572 if (rc == -ERESTARTSYS)
1573 return rc;
1574 if (channel->state != CH_STATE_STOPPED)
1575 return -ETIME;
1576 channel->state = CH_STATE_DOWN;
1577 return 0;
1578}
1579
1580static int qeth_halt_channel(struct qeth_channel *channel)
1581{
1582 unsigned long flags;
1583 struct qeth_card *card;
1584 int rc;
1585
4a71df50 1586 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1587 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1588 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1589 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1590 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1591
1592 if (rc)
1593 return rc;
1594 rc = wait_event_interruptible_timeout(card->wait_q,
1595 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1596 if (rc == -ERESTARTSYS)
1597 return rc;
1598 if (channel->state != CH_STATE_HALTED)
1599 return -ETIME;
1600 return 0;
1601}
1602
1603static int qeth_halt_channels(struct qeth_card *card)
1604{
1605 int rc1 = 0, rc2 = 0, rc3 = 0;
1606
847a50fd 1607 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1608 rc1 = qeth_halt_channel(&card->read);
1609 rc2 = qeth_halt_channel(&card->write);
1610 rc3 = qeth_halt_channel(&card->data);
1611 if (rc1)
1612 return rc1;
1613 if (rc2)
1614 return rc2;
1615 return rc3;
1616}
1617
1618static int qeth_clear_channels(struct qeth_card *card)
1619{
1620 int rc1 = 0, rc2 = 0, rc3 = 0;
1621
847a50fd 1622 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1623 rc1 = qeth_clear_channel(&card->read);
1624 rc2 = qeth_clear_channel(&card->write);
1625 rc3 = qeth_clear_channel(&card->data);
1626 if (rc1)
1627 return rc1;
1628 if (rc2)
1629 return rc2;
1630 return rc3;
1631}
1632
1633static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1634{
1635 int rc = 0;
1636
847a50fd 1637 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1638
1639 if (halt)
1640 rc = qeth_halt_channels(card);
1641 if (rc)
1642 return rc;
1643 return qeth_clear_channels(card);
1644}
1645
1646int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1647{
1648 int rc = 0;
1649
847a50fd 1650 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1651 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1652 QETH_QDIO_CLEANING)) {
1653 case QETH_QDIO_ESTABLISHED:
1654 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1655 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1656 QDIO_FLAG_CLEANUP_USING_HALT);
1657 else
cc961d40 1658 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1659 QDIO_FLAG_CLEANUP_USING_CLEAR);
1660 if (rc)
847a50fd 1661 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
cc961d40 1662 qdio_free(CARD_DDEV(card));
4a71df50
FB		 1663 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1664 break;
1665 case QETH_QDIO_CLEANING:
1666 return rc;
1667 default:
1668 break;
1669 }
1670 rc = qeth_clear_halt_card(card, use_halt);
1671 if (rc)
847a50fd 1672 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1673 card->state = CARD_STATE_DOWN;
1674 return rc;
1675}
1676EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1677
1678static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1679 int *length)
1680{
1681 struct ciw *ciw;
1682 char *rcd_buf;
1683 int ret;
1684 struct qeth_channel *channel = &card->data;
1685 unsigned long flags;
1686
1687 /*
1688 * scan for RCD command in extended SenseID data
1689 */
1690 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1691 if (!ciw || ciw->cmd == 0)
1692 return -EOPNOTSUPP;
1693 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1694 if (!rcd_buf)
1695 return -ENOMEM;
1696
1697 channel->ccw.cmd_code = ciw->cmd;
1698 channel->ccw.cda = (__u32) __pa(rcd_buf);
1699 channel->ccw.count = ciw->count;
1700 channel->ccw.flags = CCW_FLAG_SLI;
1701 channel->state = CH_STATE_RCD;
1702 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1703 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1704 QETH_RCD_PARM, LPM_ANYPATH, 0,
1705 QETH_RCD_TIMEOUT);
1706 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1707 if (!ret)
1708 wait_event(card->wait_q,
1709 (channel->state == CH_STATE_RCD_DONE ||
1710 channel->state == CH_STATE_DOWN));
1711 if (channel->state == CH_STATE_DOWN)
1712 ret = -EIO;
1713 else
1714 channel->state = CH_STATE_DOWN;
1715 if (ret) {
1716 kfree(rcd_buf);
1717 *buffer = NULL;
1718 *length = 0;
1719 } else {
1720 *length = ciw->count;
1721 *buffer = rcd_buf;
1722 }
1723 return ret;
1724}
1725
a60389ab 1726static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1727{
a60389ab 1728 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1729 card->info.chpid = prcd[30];
1730 card->info.unit_addr2 = prcd[31];
1731 card->info.cula = prcd[63];
1732 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1733 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1734}
1735
1736static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1737{
1738 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1739
e6e056ba 1740 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1741 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1742 card->info.blkt.time_total = 0;
1743 card->info.blkt.inter_packet = 0;
1744 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1745 } else {
1746 card->info.blkt.time_total = 250;
1747 card->info.blkt.inter_packet = 5;
1748 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1749 }
4a71df50
FB		 1750}
1751
1752static void qeth_init_tokens(struct qeth_card *card)
1753{
1754 card->token.issuer_rm_w = 0x00010103UL;
1755 card->token.cm_filter_w = 0x00010108UL;
1756 card->token.cm_connection_w = 0x0001010aUL;
1757 card->token.ulp_filter_w = 0x0001010bUL;
1758 card->token.ulp_connection_w = 0x0001010dUL;
1759}
1760
1761static void qeth_init_func_level(struct qeth_card *card)
1762{
5113fec0
UB		 1763 switch (card->info.type) {
1764 case QETH_CARD_TYPE_IQD:
6298263a 1765 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1766 break;
1767 case QETH_CARD_TYPE_OSD:
0132951e 1768 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1769 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1770 break;
1771 default:
1772 break;
4a71df50
FB		 1773 }
1774}
1775
4a71df50
FB		 1776static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1777 void (*idx_reply_cb)(struct qeth_channel *,
1778 struct qeth_cmd_buffer *))
1779{
1780 struct qeth_cmd_buffer *iob;
1781 unsigned long flags;
1782 int rc;
1783 struct qeth_card *card;
1784
d11ba0c4 1785 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1786 card = CARD_FROM_CDEV(channel->ccwdev);
1787 iob = qeth_get_buffer(channel);
1788 iob->callback = idx_reply_cb;
1789 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1790 channel->ccw.count = QETH_BUFSIZE;
1791 channel->ccw.cda = (__u32) __pa(iob->data);
1792
1793 wait_event(card->wait_q,
1794 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1795 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1796 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1797 rc = ccw_device_start(channel->ccwdev,
1798 &channel->ccw, (addr_t) iob, 0, 0);
1799 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1800
1801 if (rc) {
14cc21b6 1802 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1803 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1804 atomic_set(&channel->irq_pending, 0);
1805 wake_up(&card->wait_q);
1806 return rc;
1807 }
1808 rc = wait_event_interruptible_timeout(card->wait_q,
1809 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1810 if (rc == -ERESTARTSYS)
1811 return rc;
1812 if (channel->state != CH_STATE_UP) {
1813 rc = -ETIME;
d11ba0c4 1814 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1815 qeth_clear_cmd_buffers(channel);
1816 } else
1817 rc = 0;
1818 return rc;
1819}
1820
1821static int qeth_idx_activate_channel(struct qeth_channel *channel,
1822 void (*idx_reply_cb)(struct qeth_channel *,
1823 struct qeth_cmd_buffer *))
1824{
1825 struct qeth_card *card;
1826 struct qeth_cmd_buffer *iob;
1827 unsigned long flags;
1828 __u16 temp;
1829 __u8 tmp;
1830 int rc;
f06f6f32 1831 struct ccw_dev_id temp_devid;
4a71df50
FB		 1832
1833 card = CARD_FROM_CDEV(channel->ccwdev);
1834
d11ba0c4 1835 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1836
1837 iob = qeth_get_buffer(channel);
1838 iob->callback = idx_reply_cb;
1839 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1840 channel->ccw.count = IDX_ACTIVATE_SIZE;
1841 channel->ccw.cda = (__u32) __pa(iob->data);
1842 if (channel == &card->write) {
1843 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1844 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1845 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1846 card->seqno.trans_hdr++;
1847 } else {
1848 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1849 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1850 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1851 }
1852 tmp = ((__u8)card->info.portno) | 0x80;
1853 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1854 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1855 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1856 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1857 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1858 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1859 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1860 temp = (card->info.cula << 8) + card->info.unit_addr2;
1861 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1862
1863 wait_event(card->wait_q,
1864 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1865 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1866 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1867 rc = ccw_device_start(channel->ccwdev,
1868 &channel->ccw, (addr_t) iob, 0, 0);
1869 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1870
1871 if (rc) {
14cc21b6
FB		 1872 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1873 rc);
d11ba0c4 1874 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1875 atomic_set(&channel->irq_pending, 0);
1876 wake_up(&card->wait_q);
1877 return rc;
1878 }
1879 rc = wait_event_interruptible_timeout(card->wait_q,
1880 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1881 if (rc == -ERESTARTSYS)
1882 return rc;
1883 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1884 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1885 " failed to recover an error on the device\n");
1886 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1887 dev_name(&channel->ccwdev->dev));
d11ba0c4 1888 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1889 qeth_clear_cmd_buffers(channel);
1890 return -ETIME;
1891 }
1892 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1893}
1894
1895static int qeth_peer_func_level(int level)
1896{
1897 if ((level & 0xff) == 8)
1898 return (level & 0xff) + 0x400;
1899 if (((level >> 8) & 3) == 1)
1900 return (level & 0xff) + 0x200;
1901 return level;
1902}
1903
1904static void qeth_idx_write_cb(struct qeth_channel *channel,
1905 struct qeth_cmd_buffer *iob)
1906{
1907 struct qeth_card *card;
1908 __u16 temp;
1909
d11ba0c4 1910 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1911
1912 if (channel->state == CH_STATE_DOWN) {
1913 channel->state = CH_STATE_ACTIVATING;
1914 goto out;
1915 }
1916 card = CARD_FROM_CDEV(channel->ccwdev);
1917
1918 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1919 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1920 dev_err(&card->write.ccwdev->dev,
1921 "The adapter is used exclusively by another "
1922 "host\n");
4a71df50 1923 else
74eacdb9
FB		 1924 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1925 " negative reply\n",
1926 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1927 goto out;
1928 }
1929 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1930 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1931 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1932 "function level mismatch (sent: 0x%x, received: "
1933 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1934 card->info.func_level, temp);
4a71df50
FB		 1935 goto out;
1936 }
1937 channel->state = CH_STATE_UP;
1938out:
1939 qeth_release_buffer(channel, iob);
1940}
1941
1942static void qeth_idx_read_cb(struct qeth_channel *channel,
1943 struct qeth_cmd_buffer *iob)
1944{
1945 struct qeth_card *card;
1946 __u16 temp;
1947
d11ba0c4 1948 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1949 if (channel->state == CH_STATE_DOWN) {
1950 channel->state = CH_STATE_ACTIVATING;
1951 goto out;
1952 }
1953
1954 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1955 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1956 goto out;
1957
1958 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1959 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1960 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1961 dev_err(&card->write.ccwdev->dev,
1962 "The adapter is used exclusively by another "
1963 "host\n");
5113fec0
UB		 1964 break;
1965 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1966 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1967 dev_err(&card->read.ccwdev->dev,
1968 "Setting the device online failed because of "
01fc3e86 1969 "insufficient authorization\n");
5113fec0
UB		 1970 break;
1971 default:
74eacdb9
FB		 1972 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1973 " negative reply\n",
1974 dev_name(&card->read.ccwdev->dev));
5113fec0 1975 }
01fc3e86
UB		 1976 QETH_CARD_TEXT_(card, 2, "idxread%c",
1977 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1978 goto out;
1979 }
1980
1981/**
5113fec0
UB		 1982 * * temporary fix for microcode bug
1983 * * to revert it,replace OR by AND
1984 * */
4a71df50 1985 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1986 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1987 card->info.portname_required = 1;
1988
1989 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1990 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1991 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1992 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1993 dev_name(&card->read.ccwdev->dev),
1994 card->info.func_level, temp);
4a71df50
FB		 1995 goto out;
1996 }
1997 memcpy(&card->token.issuer_rm_r,
1998 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1999 QETH_MPC_TOKEN_LENGTH);
2000 memcpy(&card->info.mcl_level[0],
2001 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2002 channel->state = CH_STATE_UP;
2003out:
2004 qeth_release_buffer(channel, iob);
2005}
2006
2007void qeth_prepare_control_data(struct qeth_card *card, int len,
2008 struct qeth_cmd_buffer *iob)
2009{
2010 qeth_setup_ccw(&card->write, iob->data, len);
2011 iob->callback = qeth_release_buffer;
2012
2013 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2014 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2015 card->seqno.trans_hdr++;
2016 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2017 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2018 card->seqno.pdu_hdr++;
2019 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2020 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2021 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2022}
2023EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2024
2025int qeth_send_control_data(struct qeth_card *card, int len,
2026 struct qeth_cmd_buffer *iob,
2027 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
2028 unsigned long),
2029 void *reply_param)
2030{
2031 int rc;
2032 unsigned long flags;
2033 struct qeth_reply *reply = NULL;
7834cd5a 2034 unsigned long timeout, event_timeout;
5b54e16f 2035 struct qeth_ipa_cmd *cmd;
4a71df50 2036
847a50fd 2037 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2038
908abbb5
UB		 2039 if (card->read_or_write_problem) {
2040 qeth_release_buffer(iob->channel, iob);
2041 return -EIO;
2042 }
4a71df50
FB		 2043 reply = qeth_alloc_reply(card);
2044 if (!reply) {
4a71df50
FB		 2045 return -ENOMEM;
2046 }
2047 reply->callback = reply_cb;
2048 reply->param = reply_param;
2049 if (card->state == CARD_STATE_DOWN)
2050 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2051 else
2052 reply->seqno = card->seqno.ipa++;
2053 init_waitqueue_head(&reply->wait_q);
2054 spin_lock_irqsave(&card->lock, flags);
2055 list_add_tail(&reply->list, &card->cmd_waiter_list);
2056 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 2057 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2058
2059 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2060 qeth_prepare_control_data(card, len, iob);
2061
2062 if (IS_IPA(iob->data))
7834cd5a 2063 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2064 else
7834cd5a
HC		 2065 event_timeout = QETH_TIMEOUT;
2066 timeout = jiffies + event_timeout;
4a71df50 2067
847a50fd 2068 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2069 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2070 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2071 (addr_t) iob, 0, 0);
2072 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2073 if (rc) {
74eacdb9
FB		 2074 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2075 "ccw_device_start rc = %i\n",
2076 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2077 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2078 spin_lock_irqsave(&card->lock, flags);
2079 list_del_init(&reply->list);
2080 qeth_put_reply(reply);
2081 spin_unlock_irqrestore(&card->lock, flags);
2082 qeth_release_buffer(iob->channel, iob);
2083 atomic_set(&card->write.irq_pending, 0);
2084 wake_up(&card->wait_q);
2085 return rc;
2086 }
5b54e16f
FB		 2087
2088 /* we have only one long running ipassist, since we can ensure
2089 process context of this command we can sleep */
2090 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2091 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2092 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2093 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2094 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2095 goto time_err;
2096 } else {
2097 while (!atomic_read(&reply->received)) {
2098 if (time_after(jiffies, timeout))
2099 goto time_err;
2100 cpu_relax();
6531084c 2101 }
5b54e16f
FB		 2102 }
2103
70919e23
UB		 2104 if (reply->rc == -EIO)
2105 goto error;
5b54e16f
FB		 2106 rc = reply->rc;
2107 qeth_put_reply(reply);
2108 return rc;
2109
2110time_err:
70919e23 2111 reply->rc = -ETIME;
5b54e16f
FB		 2112 spin_lock_irqsave(&reply->card->lock, flags);
2113 list_del_init(&reply->list);
2114 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2115 atomic_inc(&reply->received);
70919e23 2116error:
908abbb5
UB		 2117 atomic_set(&card->write.irq_pending, 0);
2118 qeth_release_buffer(iob->channel, iob);
2119 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2120 rc = reply->rc;
2121 qeth_put_reply(reply);
2122 return rc;
2123}
2124EXPORT_SYMBOL_GPL(qeth_send_control_data);
2125
2126static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2127 unsigned long data)
2128{
2129 struct qeth_cmd_buffer *iob;
2130
d11ba0c4 2131 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2132
2133 iob = (struct qeth_cmd_buffer *) data;
2134 memcpy(&card->token.cm_filter_r,
2135 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2136 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2137 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2138 return 0;
2139}
2140
2141static int qeth_cm_enable(struct qeth_card *card)
2142{
2143 int rc;
2144 struct qeth_cmd_buffer *iob;
2145
d11ba0c4 2146 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2147
2148 iob = qeth_wait_for_buffer(&card->write);
2149 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2150 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2151 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2152 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2153 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2154
2155 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2156 qeth_cm_enable_cb, NULL);
2157 return rc;
2158}
2159
2160static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2161 unsigned long data)
2162{
2163
2164 struct qeth_cmd_buffer *iob;
2165
d11ba0c4 2166 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2167
2168 iob = (struct qeth_cmd_buffer *) data;
2169 memcpy(&card->token.cm_connection_r,
2170 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2171 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2172 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2173 return 0;
2174}
2175
2176static int qeth_cm_setup(struct qeth_card *card)
2177{
2178 int rc;
2179 struct qeth_cmd_buffer *iob;
2180
d11ba0c4 2181 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2182
2183 iob = qeth_wait_for_buffer(&card->write);
2184 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2185 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2186 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2187 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2188 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2189 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2190 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2191 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2192 qeth_cm_setup_cb, NULL);
2193 return rc;
2194
2195}
2196
2197static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2198{
2199 switch (card->info.type) {
2200 case QETH_CARD_TYPE_UNKNOWN:
2201 return 1500;
2202 case QETH_CARD_TYPE_IQD:
2203 return card->info.max_mtu;
5113fec0 2204 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2205 switch (card->info.link_type) {
2206 case QETH_LINK_TYPE_HSTR:
2207 case QETH_LINK_TYPE_LANE_TR:
2208 return 2000;
2209 default:
fe44014a 2210 return card->options.layer2 ? 1500 : 1492;
4a71df50 2211 }
5113fec0
UB		 2212 case QETH_CARD_TYPE_OSM:
2213 case QETH_CARD_TYPE_OSX:
fe44014a 2214 return card->options.layer2 ? 1500 : 1492;
4a71df50
FB		 2215 default:
2216 return 1500;
2217 }
2218}
2219
4a71df50
FB		 2220static inline int qeth_get_mtu_outof_framesize(int framesize)
2221{
2222 switch (framesize) {
2223 case 0x4000:
2224 return 8192;
2225 case 0x6000:
2226 return 16384;
2227 case 0xa000:
2228 return 32768;
2229 case 0xffff:
2230 return 57344;
2231 default:
2232 return 0;
2233 }
2234}
2235
2236static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2237{
2238 switch (card->info.type) {
5113fec0
UB		 2239 case QETH_CARD_TYPE_OSD:
2240 case QETH_CARD_TYPE_OSM:
2241 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2242 case QETH_CARD_TYPE_IQD:
2243 return ((mtu >= 576) &&
9853b97b 2244 (mtu <= card->info.max_mtu));
4a71df50
FB		 2245 case QETH_CARD_TYPE_OSN:
2246 case QETH_CARD_TYPE_UNKNOWN:
2247 default:
2248 return 1;
2249 }
2250}
2251
2252static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2253 unsigned long data)
2254{
2255
2256 __u16 mtu, framesize;
2257 __u16 len;
2258 __u8 link_type;
2259 struct qeth_cmd_buffer *iob;
2260
d11ba0c4 2261 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2262
2263 iob = (struct qeth_cmd_buffer *) data;
2264 memcpy(&card->token.ulp_filter_r,
2265 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2266 QETH_MPC_TOKEN_LENGTH);
9853b97b 2267 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2268 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2269 mtu = qeth_get_mtu_outof_framesize(framesize);
2270 if (!mtu) {
2271 iob->rc = -EINVAL;
d11ba0c4 2272 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2273 return 0;
2274 }
8b2e18f6
UB		 2275 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2276 /* frame size has changed */
2277 if (card->dev &&
2278 ((card->dev->mtu == card->info.initial_mtu) ||
2279 (card->dev->mtu > mtu)))
2280 card->dev->mtu = mtu;
2281 qeth_free_qdio_buffers(card);
2282 }
4a71df50 2283 card->info.initial_mtu = mtu;
8b2e18f6 2284 card->info.max_mtu = mtu;
4a71df50
FB		 2285 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2286 } else {
9853b97b
FB		 2287 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2288 iob->data);
fe44014a
SR		 2289 card->info.initial_mtu = min(card->info.max_mtu,
2290 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2291 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2292 }
2293
2294 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2295 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2296 memcpy(&link_type,
2297 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2298 card->info.link_type = link_type;
2299 } else
2300 card->info.link_type = 0;
01fc3e86 2301 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2302 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2303 return 0;
2304}
2305
2306static int qeth_ulp_enable(struct qeth_card *card)
2307{
2308 int rc;
2309 char prot_type;
2310 struct qeth_cmd_buffer *iob;
2311
2312 /*FIXME: trace view callbacks*/
d11ba0c4 2313 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2314
2315 iob = qeth_wait_for_buffer(&card->write);
2316 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2317
2318 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2319 (__u8) card->info.portno;
2320 if (card->options.layer2)
2321 if (card->info.type == QETH_CARD_TYPE_OSN)
2322 prot_type = QETH_PROT_OSN2;
2323 else
2324 prot_type = QETH_PROT_LAYER2;
2325 else
2326 prot_type = QETH_PROT_TCPIP;
2327
2328 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2329 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2330 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2331 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2332 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2333 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2334 card->info.portname, 9);
2335 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2336 qeth_ulp_enable_cb, NULL);
2337 return rc;
2338
2339}
2340
2341static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2342 unsigned long data)
2343{
2344 struct qeth_cmd_buffer *iob;
2345
d11ba0c4 2346 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2347
2348 iob = (struct qeth_cmd_buffer *) data;
2349 memcpy(&card->token.ulp_connection_r,
2350 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2351 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2352 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2353 3)) {
2354 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2355 dev_err(&card->gdev->dev, "A connection could not be "
2356 "established because of an OLM limit\n");
bbb822a8 2357 iob->rc = -EMLINK;
65a1f898 2358 }
d11ba0c4 2359 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2360 return 0;
4a71df50
FB		 2361}
2362
2363static int qeth_ulp_setup(struct qeth_card *card)
2364{
2365 int rc;
2366 __u16 temp;
2367 struct qeth_cmd_buffer *iob;
2368 struct ccw_dev_id dev_id;
2369
d11ba0c4 2370 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2371
2372 iob = qeth_wait_for_buffer(&card->write);
2373 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2374
2375 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2376 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2377 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2378 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2379 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2380 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2381
2382 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2383 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2384 temp = (card->info.cula << 8) + card->info.unit_addr2;
2385 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2386 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2387 qeth_ulp_setup_cb, NULL);
2388 return rc;
2389}
2390
0da9581d
EL		 2391static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2392{
2393 int rc;
2394 struct qeth_qdio_out_buffer *newbuf;
2395
2396 rc = 0;
2397 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2398 if (!newbuf) {
2399 rc = -ENOMEM;
2400 goto out;
2401 }
2402 newbuf->buffer = &q->qdio_bufs[bidx];
2403 skb_queue_head_init(&newbuf->skb_list);
2404 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2405 newbuf->q = q;
2406 newbuf->aob = NULL;
2407 newbuf->next_pending = q->bufs[bidx];
2408 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2409 q->bufs[bidx] = newbuf;
2410 if (q->bufstates) {
2411 q->bufstates[bidx].user = newbuf;
2412 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2413 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2414 QETH_CARD_TEXT_(q->card, 2, "%lx",
2415 (long) newbuf->next_pending);
2416 }
2417out:
2418 return rc;
2419}
2420
2421
4a71df50
FB		 2422static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2423{
2424 int i, j;
2425
d11ba0c4 2426 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2427
2428 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2429 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2430 return 0;
2431
b3332930 2432 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
0da9581d 2433 GFP_KERNEL);
4a71df50
FB		 2434 if (!card->qdio.in_q)
2435 goto out_nomem;
d11ba0c4
PT		 2436 QETH_DBF_TEXT(SETUP, 2, "inq");
2437 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2438 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2439 /* give inbound qeth_qdio_buffers their qdio_buffers */
b3332930 2440 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 2441 card->qdio.in_q->bufs[i].buffer =
2442 &card->qdio.in_q->qdio_bufs[i];
b3332930
FB		 2443 card->qdio.in_q->bufs[i].rx_skb = NULL;
2444 }
4a71df50
FB		 2445 /* inbound buffer pool */
2446 if (qeth_alloc_buffer_pool(card))
2447 goto out_freeinq;
0da9581d 2448
4a71df50
FB		 2449 /* outbound */
2450 card->qdio.out_qs =
b3332930 2451 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2452 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2453 if (!card->qdio.out_qs)
2454 goto out_freepool;
2455 for (i = 0; i < card->qdio.no_out_queues; ++i) {
b3332930 2456 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2457 GFP_KERNEL);
4a71df50
FB		 2458 if (!card->qdio.out_qs[i])
2459 goto out_freeoutq;
d11ba0c4
PT		 2460 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2461 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2462 card->qdio.out_qs[i]->queue_no = i;
2463 /* give outbound qeth_qdio_buffers their qdio_buffers */
2464 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2465 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2466 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2467 goto out_freeoutqbufs;
4a71df50
FB		 2468 }
2469 }
0da9581d
EL		 2470
2471 /* completion */
2472 if (qeth_alloc_cq(card))
2473 goto out_freeoutq;
2474
4a71df50
FB		 2475 return 0;
2476
0da9581d
EL		 2477out_freeoutqbufs:
2478 while (j > 0) {
2479 --j;
2480 kmem_cache_free(qeth_qdio_outbuf_cache,
2481 card->qdio.out_qs[i]->bufs[j]);
2482 card->qdio.out_qs[i]->bufs[j] = NULL;
2483 }
4a71df50 2484out_freeoutq:
0da9581d 2485 while (i > 0) {
4a71df50 2486 kfree(card->qdio.out_qs[--i]);
0da9581d
EL		 2487 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2488 }
4a71df50
FB		 2489 kfree(card->qdio.out_qs);
2490 card->qdio.out_qs = NULL;
2491out_freepool:
2492 qeth_free_buffer_pool(card);
2493out_freeinq:
2494 kfree(card->qdio.in_q);
2495 card->qdio.in_q = NULL;
2496out_nomem:
2497 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2498 return -ENOMEM;
2499}
2500
2501static void qeth_create_qib_param_field(struct qeth_card *card,
2502 char *param_field)
2503{
2504
2505 param_field[0] = _ascebc['P'];
2506 param_field[1] = _ascebc['C'];
2507 param_field[2] = _ascebc['I'];
2508 param_field[3] = _ascebc['T'];
2509 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2510 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2511 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2512}
2513
2514static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2515 char *param_field)
2516{
2517 param_field[16] = _ascebc['B'];
2518 param_field[17] = _ascebc['L'];
2519 param_field[18] = _ascebc['K'];
2520 param_field[19] = _ascebc['T'];
2521 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2522 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2523 *((unsigned int *) (&param_field[28])) =
2524 card->info.blkt.inter_packet_jumbo;
2525}
2526
2527static int qeth_qdio_activate(struct qeth_card *card)
2528{
d11ba0c4 2529 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2530 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2531}
2532
2533static int qeth_dm_act(struct qeth_card *card)
2534{
2535 int rc;
2536 struct qeth_cmd_buffer *iob;
2537
d11ba0c4 2538 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2539
2540 iob = qeth_wait_for_buffer(&card->write);
2541 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2542
2543 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2544 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2545 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2546 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2547 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2548 return rc;
2549}
2550
2551static int qeth_mpc_initialize(struct qeth_card *card)
2552{
2553 int rc;
2554
d11ba0c4 2555 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2556
2557 rc = qeth_issue_next_read(card);
2558 if (rc) {
d11ba0c4 2559 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2560 return rc;
2561 }
2562 rc = qeth_cm_enable(card);
2563 if (rc) {
d11ba0c4 2564 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2565 goto out_qdio;
2566 }
2567 rc = qeth_cm_setup(card);
2568 if (rc) {
d11ba0c4 2569 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2570 goto out_qdio;
2571 }
2572 rc = qeth_ulp_enable(card);
2573 if (rc) {
d11ba0c4 2574 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2575 goto out_qdio;
2576 }
2577 rc = qeth_ulp_setup(card);
2578 if (rc) {
d11ba0c4 2579 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2580 goto out_qdio;
2581 }
2582 rc = qeth_alloc_qdio_buffers(card);
2583 if (rc) {
d11ba0c4 2584 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2585 goto out_qdio;
2586 }
2587 rc = qeth_qdio_establish(card);
2588 if (rc) {
d11ba0c4 2589 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2590 qeth_free_qdio_buffers(card);
2591 goto out_qdio;
2592 }
2593 rc = qeth_qdio_activate(card);
2594 if (rc) {
d11ba0c4 2595 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2596 goto out_qdio;
2597 }
2598 rc = qeth_dm_act(card);
2599 if (rc) {
d11ba0c4 2600 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2601 goto out_qdio;
2602 }
2603
2604 return 0;
2605out_qdio:
2606 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2607 return rc;
2608}
2609
2610static void qeth_print_status_with_portname(struct qeth_card *card)
2611{
2612 char dbf_text[15];
2613 int i;
2614
2615 sprintf(dbf_text, "%s", card->info.portname + 1);
2616 for (i = 0; i < 8; i++)
2617 dbf_text[i] =
2618 (char) _ebcasc[(__u8) dbf_text[i]];
2619 dbf_text[8] = 0;
74eacdb9 2620 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2621 "with link type %s (portname: %s)\n",
4a71df50
FB		 2622 qeth_get_cardname(card),
2623 (card->info.mcl_level[0]) ? " (level: " : "",
2624 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2625 (card->info.mcl_level[0]) ? ")" : "",
2626 qeth_get_cardname_short(card),
2627 dbf_text);
2628
2629}
2630
2631static void qeth_print_status_no_portname(struct qeth_card *card)
2632{
2633 if (card->info.portname[0])
74eacdb9 2634 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2635 "card%s%s%s\nwith link type %s "
2636 "(no portname needed by interface).\n",
4a71df50
FB		 2637 qeth_get_cardname(card),
2638 (card->info.mcl_level[0]) ? " (level: " : "",
2639 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2640 (card->info.mcl_level[0]) ? ")" : "",
2641 qeth_get_cardname_short(card));
2642 else
74eacdb9 2643 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2644 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2645 qeth_get_cardname(card),
2646 (card->info.mcl_level[0]) ? " (level: " : "",
2647 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2648 (card->info.mcl_level[0]) ? ")" : "",
2649 qeth_get_cardname_short(card));
2650}
2651
2652void qeth_print_status_message(struct qeth_card *card)
2653{
2654 switch (card->info.type) {
5113fec0
UB		 2655 case QETH_CARD_TYPE_OSD:
2656 case QETH_CARD_TYPE_OSM:
2657 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2658 /* VM will use a non-zero first character
2659 * to indicate a HiperSockets like reporting
2660 * of the level OSA sets the first character to zero
2661 * */
2662 if (!card->info.mcl_level[0]) {
2663 sprintf(card->info.mcl_level, "%02x%02x",
2664 card->info.mcl_level[2],
2665 card->info.mcl_level[3]);
2666
2667 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2668 break;
2669 }
2670 /* fallthrough */
2671 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2672 if ((card->info.guestlan) ||
2673 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2674 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2675 card->info.mcl_level[0]];
2676 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2677 card->info.mcl_level[1]];
2678 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2679 card->info.mcl_level[2]];
2680 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2681 card->info.mcl_level[3]];
2682 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2683 }
2684 break;
2685 default:
2686 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2687 }
2688 if (card->info.portname_required)
2689 qeth_print_status_with_portname(card);
2690 else
2691 qeth_print_status_no_portname(card);
2692}
2693EXPORT_SYMBOL_GPL(qeth_print_status_message);
2694
4a71df50
FB		 2695static void qeth_initialize_working_pool_list(struct qeth_card *card)
2696{
2697 struct qeth_buffer_pool_entry *entry;
2698
847a50fd 2699 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2700
2701 list_for_each_entry(entry,
2702 &card->qdio.init_pool.entry_list, init_list) {
2703 qeth_put_buffer_pool_entry(card, entry);
2704 }
2705}
2706
2707static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2708 struct qeth_card *card)
2709{
2710 struct list_head *plh;
2711 struct qeth_buffer_pool_entry *entry;
2712 int i, free;
2713 struct page *page;
2714
2715 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2716 return NULL;
2717
2718 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2719 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2720 free = 1;
2721 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2722 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2723 free = 0;
2724 break;
2725 }
2726 }
2727 if (free) {
2728 list_del_init(&entry->list);
2729 return entry;
2730 }
2731 }
2732
2733 /* no free buffer in pool so take first one and swap pages */
2734 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2735 struct qeth_buffer_pool_entry, list);
2736 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2737 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2738 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2739 if (!page) {
2740 return NULL;
2741 } else {
2742 free_page((unsigned long)entry->elements[i]);
2743 entry->elements[i] = page_address(page);
2744 if (card->options.performance_stats)
2745 card->perf_stats.sg_alloc_page_rx++;
2746 }
2747 }
2748 }
2749 list_del_init(&entry->list);
2750 return entry;
2751}
2752
2753static int qeth_init_input_buffer(struct qeth_card *card,
2754 struct qeth_qdio_buffer *buf)
2755{
2756 struct qeth_buffer_pool_entry *pool_entry;
2757 int i;
2758
b3332930
FB		 2759 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2760 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2761 if (!buf->rx_skb)
2762 return 1;
2763 }
2764
4a71df50
FB		 2765 pool_entry = qeth_find_free_buffer_pool_entry(card);
2766 if (!pool_entry)
2767 return 1;
2768
2769 /*
2770 * since the buffer is accessed only from the input_tasklet
2771 * there shouldn't be a need to synchronize; also, since we use
2772 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2773 * buffers
2774 */
4a71df50
FB		 2775
2776 buf->pool_entry = pool_entry;
2777 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2778 buf->buffer->element[i].length = PAGE_SIZE;
2779 buf->buffer->element[i].addr = pool_entry->elements[i];
2780 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2781 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2782 else
3ec90878
JG		 2783 buf->buffer->element[i].eflags = 0;
2784 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2785 }
2786 return 0;
2787}
2788
2789int qeth_init_qdio_queues(struct qeth_card *card)
2790{
2791 int i, j;
2792 int rc;
2793
d11ba0c4 2794 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2795
2796 /* inbound queue */
2797 memset(card->qdio.in_q->qdio_bufs, 0,
2798 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2799 qeth_initialize_working_pool_list(card);
2800 /*give only as many buffers to hardware as we have buffer pool entries*/
2801 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2802 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2803 card->qdio.in_q->next_buf_to_init =
2804 card->qdio.in_buf_pool.buf_count - 1;
2805 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2806 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2807 if (rc) {
d11ba0c4 2808 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2809 return rc;
2810 }
0da9581d
EL		 2811
2812 /* completion */
2813 rc = qeth_cq_init(card);
2814 if (rc) {
2815 return rc;
2816 }
2817
4a71df50
FB		 2818 /* outbound queue */
2819 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2820 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2821 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2822 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2823 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2824 card->qdio.out_qs[i]->bufs[j],
2825 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2826 }
2827 card->qdio.out_qs[i]->card = card;
2828 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2829 card->qdio.out_qs[i]->do_pack = 0;
2830 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2831 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2832 atomic_set(&card->qdio.out_qs[i]->state,
2833 QETH_OUT_Q_UNLOCKED);
2834 }
2835 return 0;
2836}
2837EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2838
2839static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2840{
2841 switch (link_type) {
2842 case QETH_LINK_TYPE_HSTR:
2843 return 2;
2844 default:
2845 return 1;
2846 }
2847}
2848
2849static void qeth_fill_ipacmd_header(struct qeth_card *card,
2850 struct qeth_ipa_cmd *cmd, __u8 command,
2851 enum qeth_prot_versions prot)
2852{
2853 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2854 cmd->hdr.command = command;
2855 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2856 cmd->hdr.seqno = card->seqno.ipa;
2857 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2858 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2859 if (card->options.layer2)
2860 cmd->hdr.prim_version_no = 2;
2861 else
2862 cmd->hdr.prim_version_no = 1;
2863 cmd->hdr.param_count = 1;
2864 cmd->hdr.prot_version = prot;
2865 cmd->hdr.ipa_supported = 0;
2866 cmd->hdr.ipa_enabled = 0;
2867}
2868
2869struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2870 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2871{
2872 struct qeth_cmd_buffer *iob;
2873 struct qeth_ipa_cmd *cmd;
2874
2875 iob = qeth_wait_for_buffer(&card->write);
2876 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2877 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2878
2879 return iob;
2880}
2881EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2882
2883void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2884 char prot_type)
2885{
2886 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2887 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2888 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2889 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2890}
2891EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2892
2893int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2894 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2895 unsigned long),
2896 void *reply_param)
2897{
2898 int rc;
2899 char prot_type;
4a71df50 2900
847a50fd 2901 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2902
2903 if (card->options.layer2)
2904 if (card->info.type == QETH_CARD_TYPE_OSN)
2905 prot_type = QETH_PROT_OSN2;
2906 else
2907 prot_type = QETH_PROT_LAYER2;
2908 else
2909 prot_type = QETH_PROT_TCPIP;
2910 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2911 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2912 iob, reply_cb, reply_param);
908abbb5
UB		 2913 if (rc == -ETIME) {
2914 qeth_clear_ipacmd_list(card);
2915 qeth_schedule_recovery(card);
2916 }
4a71df50
FB		 2917 return rc;
2918}
2919EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2920
4a71df50
FB		 2921int qeth_send_startlan(struct qeth_card *card)
2922{
2923 int rc;
70919e23 2924 struct qeth_cmd_buffer *iob;
4a71df50 2925
d11ba0c4 2926 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2927
70919e23
UB		 2928 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2929 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2930 return rc;
2931}
2932EXPORT_SYMBOL_GPL(qeth_send_startlan);
2933
eb3fb0ba 2934static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2935 struct qeth_reply *reply, unsigned long data)
2936{
2937 struct qeth_ipa_cmd *cmd;
2938
847a50fd 2939 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2940
2941 cmd = (struct qeth_ipa_cmd *) data;
2942 if (cmd->hdr.return_code == 0)
2943 cmd->hdr.return_code =
2944 cmd->data.setadapterparms.hdr.return_code;
2945 return 0;
2946}
4a71df50
FB		 2947
2948static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2949 struct qeth_reply *reply, unsigned long data)
2950{
2951 struct qeth_ipa_cmd *cmd;
2952
847a50fd 2953 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2954
2955 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2956 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2957 card->info.link_type =
2958 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2959 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2960 }
4a71df50
FB		 2961 card->options.adp.supported_funcs =
2962 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2963 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2964}
2965
eb3fb0ba 2966static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2967 __u32 command, __u32 cmdlen)
2968{
2969 struct qeth_cmd_buffer *iob;
2970 struct qeth_ipa_cmd *cmd;
2971
2972 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2973 QETH_PROT_IPV4);
2974 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2975 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2976 cmd->data.setadapterparms.hdr.command_code = command;
2977 cmd->data.setadapterparms.hdr.used_total = 1;
2978 cmd->data.setadapterparms.hdr.seq_no = 1;
2979
2980 return iob;
2981}
4a71df50
FB		 2982
2983int qeth_query_setadapterparms(struct qeth_card *card)
2984{
2985 int rc;
2986 struct qeth_cmd_buffer *iob;
2987
847a50fd 2988 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2989 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2990 sizeof(struct qeth_ipacmd_setadpparms));
2991 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2992 return rc;
2993}
2994EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2995
1da74b1c
FB		 2996static int qeth_query_ipassists_cb(struct qeth_card *card,
2997 struct qeth_reply *reply, unsigned long data)
2998{
2999 struct qeth_ipa_cmd *cmd;
3000
3001 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3002
3003 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3004
3005 switch (cmd->hdr.return_code) {
3006 case IPA_RC_NOTSUPP:
3007 case IPA_RC_L2_UNSUPPORTED_CMD:
3008 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3009 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3010 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3011 return -0;
3012 default:
3013 if (cmd->hdr.return_code) {
3014 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3015 "rc=%d\n",
3016 dev_name(&card->gdev->dev),
3017 cmd->hdr.return_code);
3018 return 0;
3019 }
3020 }
3021
1da74b1c
FB		 3022 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3023 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3024 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3025 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3026 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3027 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3028 } else
3029 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3030 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3031 return 0;
3032}
3033
3034int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3035{
3036 int rc;
3037 struct qeth_cmd_buffer *iob;
3038
3039 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3040 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
3041 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3042 return rc;
3043}
3044EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3045
3046static int qeth_query_setdiagass_cb(struct qeth_card *card,
3047 struct qeth_reply *reply, unsigned long data)
3048{
3049 struct qeth_ipa_cmd *cmd;
3050 __u16 rc;
3051
3052 cmd = (struct qeth_ipa_cmd *)data;
3053 rc = cmd->hdr.return_code;
3054 if (rc)
3055 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3056 else
3057 card->info.diagass_support = cmd->data.diagass.ext;
3058 return 0;
3059}
3060
3061static int qeth_query_setdiagass(struct qeth_card *card)
3062{
3063 struct qeth_cmd_buffer *iob;
3064 struct qeth_ipa_cmd *cmd;
3065
3066 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3067 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3068 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3069 cmd->data.diagass.subcmd_len = 16;
3070 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3071 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3072}
3073
3074static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3075{
3076 unsigned long info = get_zeroed_page(GFP_KERNEL);
3077 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3078 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3079 struct ccw_dev_id ccwid;
caf757c6 3080 int level;
1da74b1c
FB		 3081
3082 tid->chpid = card->info.chpid;
3083 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3084 tid->ssid = ccwid.ssid;
3085 tid->devno = ccwid.devno;
3086 if (!info)
3087 return;
caf757c6
HC		 3088 level = stsi(NULL, 0, 0, 0);
3089 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3090 tid->lparnr = info222->lpar_number;
caf757c6 3091 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3092 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3093 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3094 }
3095 free_page(info);
3096 return;
3097}
3098
3099static int qeth_hw_trap_cb(struct qeth_card *card,
3100 struct qeth_reply *reply, unsigned long data)
3101{
3102 struct qeth_ipa_cmd *cmd;
3103 __u16 rc;
3104
3105 cmd = (struct qeth_ipa_cmd *)data;
3106 rc = cmd->hdr.return_code;
3107 if (rc)
3108 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3109 return 0;
3110}
3111
3112int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3113{
3114 struct qeth_cmd_buffer *iob;
3115 struct qeth_ipa_cmd *cmd;
3116
3117 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3118 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3119 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3120 cmd->data.diagass.subcmd_len = 80;
3121 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3122 cmd->data.diagass.type = 1;
3123 cmd->data.diagass.action = action;
3124 switch (action) {
3125 case QETH_DIAGS_TRAP_ARM:
3126 cmd->data.diagass.options = 0x0003;
3127 cmd->data.diagass.ext = 0x00010000 +
3128 sizeof(struct qeth_trap_id);
3129 qeth_get_trap_id(card,
3130 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3131 break;
3132 case QETH_DIAGS_TRAP_DISARM:
3133 cmd->data.diagass.options = 0x0001;
3134 break;
3135 case QETH_DIAGS_TRAP_CAPTURE:
3136 break;
3137 }
3138 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3139}
3140EXPORT_SYMBOL_GPL(qeth_hw_trap);
3141
76b11f8e
UB		 3142int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3143 unsigned int qdio_error, const char *dbftext)
4a71df50 3144{
779e6e1c 3145 if (qdio_error) {
847a50fd 3146 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3147 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3148 buf->element[15].sflags);
38593d01 3149 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3150 buf->element[14].sflags);
38593d01 3151 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3152 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3153 card->stats.rx_dropped++;
3154 return 0;
3155 } else
3156 return 1;
4a71df50
FB		 3157 }
3158 return 0;
3159}
3160EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3161
b3332930
FB		 3162void qeth_buffer_reclaim_work(struct work_struct *work)
3163{
3164 struct qeth_card *card = container_of(work, struct qeth_card,
3165 buffer_reclaim_work.work);
3166
3167 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3168 qeth_queue_input_buffer(card, card->reclaim_index);
3169}
3170
4a71df50
FB		 3171void qeth_queue_input_buffer(struct qeth_card *card, int index)
3172{
3173 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3174 struct list_head *lh;
4a71df50
FB		 3175 int count;
3176 int i;
3177 int rc;
3178 int newcount = 0;
3179
4a71df50
FB		 3180 count = (index < queue->next_buf_to_init)?
3181 card->qdio.in_buf_pool.buf_count -
3182 (queue->next_buf_to_init - index) :
3183 card->qdio.in_buf_pool.buf_count -
3184 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3185 /* only requeue at a certain threshold to avoid SIGAs */
3186 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3187 for (i = queue->next_buf_to_init;
3188 i < queue->next_buf_to_init + count; ++i) {
3189 if (qeth_init_input_buffer(card,
3190 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3191 break;
3192 } else {
3193 newcount++;
3194 }
3195 }
3196
3197 if (newcount < count) {
3198 /* we are in memory shortage so we switch back to
3199 traditional skb allocation and drop packages */
4a71df50
FB		 3200 atomic_set(&card->force_alloc_skb, 3);
3201 count = newcount;
3202 } else {
4a71df50
FB		 3203 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3204 }
3205
b3332930
FB		 3206 if (!count) {
3207 i = 0;
3208 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3209 i++;
3210 if (i == card->qdio.in_buf_pool.buf_count) {
3211 QETH_CARD_TEXT(card, 2, "qsarbw");
3212 card->reclaim_index = index;
3213 schedule_delayed_work(
3214 &card->buffer_reclaim_work,
3215 QETH_RECLAIM_WORK_TIME);
3216 }
3217 return;
3218 }
3219
4a71df50
FB		 3220 /*
3221 * according to old code it should be avoided to requeue all
3222 * 128 buffers in order to benefit from PCI avoidance.
3223 * this function keeps at least one buffer (the buffer at
3224 * 'index') un-requeued -> this buffer is the first buffer that
3225 * will be requeued the next time
3226 */
3227 if (card->options.performance_stats) {
3228 card->perf_stats.inbound_do_qdio_cnt++;
3229 card->perf_stats.inbound_do_qdio_start_time =
3230 qeth_get_micros();
3231 }
779e6e1c
JG		 3232 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3233 queue->next_buf_to_init, count);
4a71df50
FB		 3234 if (card->options.performance_stats)
3235 card->perf_stats.inbound_do_qdio_time +=
3236 qeth_get_micros() -
3237 card->perf_stats.inbound_do_qdio_start_time;
3238 if (rc) {
847a50fd 3239 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3240 }
3241 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3242 QDIO_MAX_BUFFERS_PER_Q;
3243 }
3244}
3245EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3246
3247static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3248 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3249{
3ec90878 3250 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3251
847a50fd 3252 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3253 if (card->info.type == QETH_CARD_TYPE_IQD) {
3254 if (sbalf15 == 0) {
3255 qdio_err = 0;
3256 } else {
3257 qdio_err = 1;
3258 }
3259 }
76b11f8e 3260 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3261
3262 if (!qdio_err)
4a71df50 3263 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3264
3265 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3266 return QETH_SEND_ERROR_RETRY;
3267
847a50fd
CO		 3268 QETH_CARD_TEXT(card, 1, "lnkfail");
3269 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3270 (u16)qdio_err, (u8)sbalf15);
3271 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3272}
3273
3274/*
3275 * Switched to packing state if the number of used buffers on a queue
3276 * reaches a certain limit.
3277 */
3278static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3279{
3280 if (!queue->do_pack) {
3281 if (atomic_read(&queue->used_buffers)
3282 >= QETH_HIGH_WATERMARK_PACK){
3283 /* switch non-PACKING -> PACKING */
847a50fd 3284 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3285 if (queue->card->options.performance_stats)
3286 queue->card->perf_stats.sc_dp_p++;
3287 queue->do_pack = 1;
3288 }
3289 }
3290}
3291
3292/*
3293 * Switches from packing to non-packing mode. If there is a packing
3294 * buffer on the queue this buffer will be prepared to be flushed.
3295 * In that case 1 is returned to inform the caller. If no buffer
3296 * has to be flushed, zero is returned.
3297 */
3298static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3299{
3300 struct qeth_qdio_out_buffer *buffer;
3301 int flush_count = 0;
3302
3303 if (queue->do_pack) {
3304 if (atomic_read(&queue->used_buffers)
3305 <= QETH_LOW_WATERMARK_PACK) {
3306 /* switch PACKING -> non-PACKING */
847a50fd 3307 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3308 if (queue->card->options.performance_stats)
3309 queue->card->perf_stats.sc_p_dp++;
3310 queue->do_pack = 0;
3311 /* flush packing buffers */
0da9581d 3312 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3313 if ((atomic_read(&buffer->state) ==
3314 QETH_QDIO_BUF_EMPTY) &&
3315 (buffer->next_element_to_fill > 0)) {
3316 atomic_set(&buffer->state,
0da9581d 3317 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3318 flush_count++;
3319 queue->next_buf_to_fill =
3320 (queue->next_buf_to_fill + 1) %
3321 QDIO_MAX_BUFFERS_PER_Q;
3322 }
3323 }
3324 }
3325 return flush_count;
3326}
3327
0da9581d 3328
4a71df50
FB		 3329/*
3330 * Called to flush a packing buffer if no more pci flags are on the queue.
3331 * Checks if there is a packing buffer and prepares it to be flushed.
3332 * In that case returns 1, otherwise zero.
3333 */
3334static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3335{
3336 struct qeth_qdio_out_buffer *buffer;
3337
0da9581d 3338 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3339 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3340 (buffer->next_element_to_fill > 0)) {
3341 /* it's a packing buffer */
3342 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3343 queue->next_buf_to_fill =
3344 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3345 return 1;
3346 }
3347 return 0;
3348}
3349
779e6e1c
JG		 3350static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3351 int count)
4a71df50
FB		 3352{
3353 struct qeth_qdio_out_buffer *buf;
3354 int rc;
3355 int i;
3356 unsigned int qdio_flags;
3357
4a71df50 3358 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3359 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3360 buf = queue->bufs[bidx];
3ec90878
JG		 3361 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3362 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3363
0da9581d
EL		 3364 if (queue->bufstates)
3365 queue->bufstates[bidx].user = buf;
3366
4a71df50
FB		 3367 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3368 continue;
3369
3370 if (!queue->do_pack) {
3371 if ((atomic_read(&queue->used_buffers) >=
3372 (QETH_HIGH_WATERMARK_PACK -
3373 QETH_WATERMARK_PACK_FUZZ)) &&
3374 !atomic_read(&queue->set_pci_flags_count)) {
3375 /* it's likely that we'll go to packing
3376 * mode soon */
3377 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3378 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3379 }
3380 } else {
3381 if (!atomic_read(&queue->set_pci_flags_count)) {
3382 /*
3383 * there's no outstanding PCI any more, so we
3384 * have to request a PCI to be sure the the PCI
3385 * will wake at some time in the future then we
3386 * can flush packed buffers that might still be
3387 * hanging around, which can happen if no
3388 * further send was requested by the stack
3389 */
3390 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3391 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3392 }
3393 }
3394 }
3395
3396 queue->card->dev->trans_start = jiffies;
3397 if (queue->card->options.performance_stats) {
3398 queue->card->perf_stats.outbound_do_qdio_cnt++;
3399 queue->card->perf_stats.outbound_do_qdio_start_time =
3400 qeth_get_micros();
3401 }
3402 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3403 if (atomic_read(&queue->set_pci_flags_count))
3404 qdio_flags |= QDIO_FLAG_PCI_OUT;
3405 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3406 queue->queue_no, index, count);
4a71df50
FB		 3407 if (queue->card->options.performance_stats)
3408 queue->card->perf_stats.outbound_do_qdio_time +=
3409 qeth_get_micros() -
3410 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3411 atomic_add(count, &queue->used_buffers);
4a71df50 3412 if (rc) {
d303b6fd
JG		 3413 queue->card->stats.tx_errors += count;
3414 /* ignore temporary SIGA errors without busy condition */
1549d13f 3415 if (rc == -ENOBUFS)
d303b6fd 3416 return;
847a50fd 3417 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3418 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3419 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3420 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3421 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3422
4a71df50
FB		 3423 /* this must not happen under normal circumstances. if it
3424 * happens something is really wrong -> recover */
3425 qeth_schedule_recovery(queue->card);
3426 return;
3427 }
4a71df50
FB		 3428 if (queue->card->options.performance_stats)
3429 queue->card->perf_stats.bufs_sent += count;
3430}
3431
3432static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3433{
3434 int index;
3435 int flush_cnt = 0;
3436 int q_was_packing = 0;
3437
3438 /*
3439 * check if weed have to switch to non-packing mode or if
3440 * we have to get a pci flag out on the queue
3441 */
3442 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3443 !atomic_read(&queue->set_pci_flags_count)) {
3444 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3445 QETH_OUT_Q_UNLOCKED) {
3446 /*
3447 * If we get in here, there was no action in
3448 * do_send_packet. So, we check if there is a
3449 * packing buffer to be flushed here.
3450 */
3451 netif_stop_queue(queue->card->dev);
3452 index = queue->next_buf_to_fill;
3453 q_was_packing = queue->do_pack;
3454 /* queue->do_pack may change */
3455 barrier();
3456 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3457 if (!flush_cnt &&
3458 !atomic_read(&queue->set_pci_flags_count))
3459 flush_cnt +=
3460 qeth_flush_buffers_on_no_pci(queue);
3461 if (queue->card->options.performance_stats &&
3462 q_was_packing)
3463 queue->card->perf_stats.bufs_sent_pack +=
3464 flush_cnt;
3465 if (flush_cnt)
779e6e1c 3466 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3467 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3468 }
3469 }
3470}
3471
a1c3ed4c
FB		 3472void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3473 unsigned long card_ptr)
3474{
3475 struct qeth_card *card = (struct qeth_card *)card_ptr;
3476
0cffef48 3477 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3478 napi_schedule(&card->napi);
3479}
3480EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3481
0da9581d
EL		 3482int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3483{
3484 int rc;
3485
3486 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3487 rc = -1;
3488 goto out;
3489 } else {
3490 if (card->options.cq == cq) {
3491 rc = 0;
3492 goto out;
3493 }
3494
3495 if (card->state != CARD_STATE_DOWN &&
3496 card->state != CARD_STATE_RECOVER) {
3497 rc = -1;
3498 goto out;
3499 }
3500
3501 qeth_free_qdio_buffers(card);
3502 card->options.cq = cq;
3503 rc = 0;
3504 }
3505out:
3506 return rc;
3507
3508}
3509EXPORT_SYMBOL_GPL(qeth_configure_cq);
3510
3511
3512static void qeth_qdio_cq_handler(struct qeth_card *card,
3513 unsigned int qdio_err,
3514 unsigned int queue, int first_element, int count) {
3515 struct qeth_qdio_q *cq = card->qdio.c_q;
3516 int i;
3517 int rc;
3518
3519 if (!qeth_is_cq(card, queue))
3520 goto out;
3521
3522 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3523 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3524 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3525
3526 if (qdio_err) {
3527 netif_stop_queue(card->dev);
3528 qeth_schedule_recovery(card);
3529 goto out;
3530 }
3531
3532 if (card->options.performance_stats) {
3533 card->perf_stats.cq_cnt++;
3534 card->perf_stats.cq_start_time = qeth_get_micros();
3535 }
3536
3537 for (i = first_element; i < first_element + count; ++i) {
3538 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3539 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3540 int e;
3541
3542 e = 0;
3543 while (buffer->element[e].addr) {
3544 unsigned long phys_aob_addr;
3545
3546 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3547 qeth_qdio_handle_aob(card, phys_aob_addr);
3548 buffer->element[e].addr = NULL;
3549 buffer->element[e].eflags = 0;
3550 buffer->element[e].sflags = 0;
3551 buffer->element[e].length = 0;
3552
3553 ++e;
3554 }
3555
3556 buffer->element[15].eflags = 0;
3557 buffer->element[15].sflags = 0;
3558 }
3559 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3560 card->qdio.c_q->next_buf_to_init,
3561 count);
3562 if (rc) {
3563 dev_warn(&card->gdev->dev,
3564 "QDIO reported an error, rc=%i\n", rc);
3565 QETH_CARD_TEXT(card, 2, "qcqherr");
3566 }
3567 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3568 + count) % QDIO_MAX_BUFFERS_PER_Q;
3569
3570 netif_wake_queue(card->dev);
3571
3572 if (card->options.performance_stats) {
3573 int delta_t = qeth_get_micros();
3574 delta_t -= card->perf_stats.cq_start_time;
3575 card->perf_stats.cq_time += delta_t;
3576 }
3577out:
3578 return;
3579}
3580
a1c3ed4c 3581void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3582 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3583 unsigned long card_ptr)
3584{
3585 struct qeth_card *card = (struct qeth_card *)card_ptr;
3586
0da9581d
EL		 3587 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3588 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3589
3590 if (qeth_is_cq(card, queue))
3591 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3592 else if (qdio_err)
a1c3ed4c 3593 qeth_schedule_recovery(card);
0da9581d
EL		 3594
3595
a1c3ed4c
FB		 3596}
3597EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3598
779e6e1c
JG		 3599void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3600 unsigned int qdio_error, int __queue, int first_element,
3601 int count, unsigned long card_ptr)
4a71df50
FB		 3602{
3603 struct qeth_card *card = (struct qeth_card *) card_ptr;
3604 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3605 struct qeth_qdio_out_buffer *buffer;
3606 int i;
3607
847a50fd 3608 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3609 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3610 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3611 netif_stop_queue(card->dev);
3612 qeth_schedule_recovery(card);
3613 return;
4a71df50
FB		 3614 }
3615 if (card->options.performance_stats) {
3616 card->perf_stats.outbound_handler_cnt++;
3617 card->perf_stats.outbound_handler_start_time =
3618 qeth_get_micros();
3619 }
3620 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3621 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3622 buffer = queue->bufs[bidx];
b67d801f 3623 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3624
3625 if (queue->bufstates &&
3626 (queue->bufstates[bidx].flags &
3627 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3628 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3629
3630 if (atomic_cmpxchg(&buffer->state,
3631 QETH_QDIO_BUF_PRIMED,
3632 QETH_QDIO_BUF_PENDING) ==
3633 QETH_QDIO_BUF_PRIMED) {
3634 qeth_notify_skbs(queue, buffer,
3635 TX_NOTIFY_PENDING);
3636 }
0da9581d
EL		 3637 buffer->aob = queue->bufstates[bidx].aob;
3638 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3639 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3640 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3641 virt_to_phys(buffer->aob));
b3332930
FB		 3642 if (qeth_init_qdio_out_buf(queue, bidx)) {
3643 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3644 qeth_schedule_recovery(card);
b3332930 3645 }
0da9581d 3646 } else {
b3332930
FB		 3647 if (card->options.cq == QETH_CQ_ENABLED) {
3648 enum iucv_tx_notify n;
3649
3650 n = qeth_compute_cq_notification(
3651 buffer->buffer->element[15].sflags, 0);
3652 qeth_notify_skbs(queue, buffer, n);
3653 }
3654
0da9581d
EL		 3655 qeth_clear_output_buffer(queue, buffer,
3656 QETH_QDIO_BUF_EMPTY);
3657 }
3658 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3659 }
3660 atomic_sub(count, &queue->used_buffers);
3661 /* check if we need to do something on this outbound queue */
3662 if (card->info.type != QETH_CARD_TYPE_IQD)
3663 qeth_check_outbound_queue(queue);
3664
3665 netif_wake_queue(queue->card->dev);
3666 if (card->options.performance_stats)
3667 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3668 card->perf_stats.outbound_handler_start_time;
3669}
3670EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3671
4a71df50
FB		 3672int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3673 int ipv, int cast_type)
3674{
5113fec0
UB		 3675 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3676 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50
FB		 3677 return card->qdio.default_out_queue;
3678 switch (card->qdio.no_out_queues) {
3679 case 4:
3680 if (cast_type && card->info.is_multicast_different)
3681 return card->info.is_multicast_different &
3682 (card->qdio.no_out_queues - 1);
3683 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3684 const u8 tos = ip_hdr(skb)->tos;
3685
3686 if (card->qdio.do_prio_queueing ==
3687 QETH_PRIO_Q_ING_TOS) {
3688 if (tos & IP_TOS_NOTIMPORTANT)
3689 return 3;
3690 if (tos & IP_TOS_HIGHRELIABILITY)
3691 return 2;
3692 if (tos & IP_TOS_HIGHTHROUGHPUT)
3693 return 1;
3694 if (tos & IP_TOS_LOWDELAY)
3695 return 0;
3696 }
3697 if (card->qdio.do_prio_queueing ==
3698 QETH_PRIO_Q_ING_PREC)
3699 return 3 - (tos >> 6);
3700 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3701 /* TODO: IPv6!!! */
3702 }
3703 return card->qdio.default_out_queue;
3704 case 1: /* fallthrough for single-out-queue 1920-device */
3705 default:
3706 return card->qdio.default_out_queue;
3707 }
3708}
3709EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3710
271648b4
FB		 3711int qeth_get_elements_for_frags(struct sk_buff *skb)
3712{
3713 int cnt, length, e, elements = 0;
3714 struct skb_frag_struct *frag;
3715 char *data;
3716
3717 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3718 frag = &skb_shinfo(skb)->frags[cnt];
3719 data = (char *)page_to_phys(skb_frag_page(frag)) +
3720 frag->page_offset;
3721 length = frag->size;
3722 e = PFN_UP((unsigned long)data + length - 1) -
3723 PFN_DOWN((unsigned long)data);
3724 elements += e;
3725 }
3726 return elements;
3727}
3728EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3729
065cc782 3730int qeth_get_elements_no(struct qeth_card *card,
4a71df50
FB		 3731 struct sk_buff *skb, int elems)
3732{
51aa165c
FB		 3733 int dlen = skb->len - skb->data_len;
3734 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3735 PFN_DOWN((unsigned long)skb->data);
4a71df50 3736
271648b4
FB		 3737 elements_needed += qeth_get_elements_for_frags(skb);
3738
4a71df50 3739 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3740 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3741 "(Number=%d / Length=%d). Discarded.\n",
3742 (elements_needed+elems), skb->len);
3743 return 0;
3744 }
3745 return elements_needed;
3746}
3747EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3748
d4ae1f5e 3749int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3750{
3751 int hroom, inpage, rest;
3752
3753 if (((unsigned long)skb->data & PAGE_MASK) !=
3754 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3755 hroom = skb_headroom(skb);
3756 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3757 rest = len - inpage;
3758 if (rest > hroom)
3759 return 1;
3760 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3761 skb->data -= rest;
d4ae1f5e
SR		 3762 skb->tail -= rest;
3763 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3764 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3765 }
3766 return 0;
3767}
3768EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3769
f90b744e 3770static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3771 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3772 int offset)
4a71df50 3773{
51aa165c 3774 int length = skb->len - skb->data_len;
4a71df50
FB		 3775 int length_here;
3776 int element;
3777 char *data;
51aa165c
FB		 3778 int first_lap, cnt;
3779 struct skb_frag_struct *frag;
4a71df50
FB		 3780
3781 element = *next_element_to_fill;
3782 data = skb->data;
3783 first_lap = (is_tso == 0 ? 1 : 0);
3784
683d718a
FB		 3785 if (offset >= 0) {
3786 data = skb->data + offset;
e1f03ae8 3787 length -= offset;
683d718a
FB		 3788 first_lap = 0;
3789 }
3790
4a71df50
FB		 3791 while (length > 0) {
3792 /* length_here is the remaining amount of data in this page */
3793 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3794 if (length < length_here)
3795 length_here = length;
3796
3797 buffer->element[element].addr = data;
3798 buffer->element[element].length = length_here;
3799 length -= length_here;
3800 if (!length) {
3801 if (first_lap)
51aa165c 3802 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3803 buffer->element[element].eflags =
3804 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3805 else
3ec90878 3806 buffer->element[element].eflags = 0;
4a71df50 3807 else
3ec90878
JG		 3808 buffer->element[element].eflags =
3809 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3810 } else {
3811 if (first_lap)
3ec90878
JG		 3812 buffer->element[element].eflags =
3813 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3814 else
3ec90878
JG		 3815 buffer->element[element].eflags =
3816 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3817 }
3818 data += length_here;
3819 element++;
3820 first_lap = 0;
3821 }
51aa165c
FB		 3822
3823 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3824 frag = &skb_shinfo(skb)->frags[cnt];
271648b4
FB		 3825 data = (char *)page_to_phys(skb_frag_page(frag)) +
3826 frag->page_offset;
3827 length = frag->size;
3828 while (length > 0) {
3829 length_here = PAGE_SIZE -
3830 ((unsigned long) data % PAGE_SIZE);
3831 if (length < length_here)
3832 length_here = length;
3833
3834 buffer->element[element].addr = data;
3835 buffer->element[element].length = length_here;
3836 buffer->element[element].eflags =
3837 SBAL_EFLAGS_MIDDLE_FRAG;
3838 length -= length_here;
3839 data += length_here;
3840 element++;
3841 }
51aa165c
FB		 3842 }
3843
3ec90878
JG		 3844 if (buffer->element[element - 1].eflags)
3845 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3846 *next_element_to_fill = element;
3847}
3848
f90b744e 3849static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3850 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3851 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3852{
3853 struct qdio_buffer *buffer;
4a71df50
FB		 3854 int flush_cnt = 0, hdr_len, large_send = 0;
3855
4a71df50
FB		 3856 buffer = buf->buffer;
3857 atomic_inc(&skb->users);
3858 skb_queue_tail(&buf->skb_list, skb);
3859
4a71df50 3860 /*check first on TSO ....*/
683d718a 3861 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3862 int element = buf->next_element_to_fill;
3863
683d718a
FB		 3864 hdr_len = sizeof(struct qeth_hdr_tso) +
3865 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3866 /*fill first buffer entry only with header information */
3867 buffer->element[element].addr = skb->data;
3868 buffer->element[element].length = hdr_len;
3ec90878 3869 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3870 buf->next_element_to_fill++;
3871 skb->data += hdr_len;
3872 skb->len -= hdr_len;
3873 large_send = 1;
3874 }
683d718a
FB		 3875
3876 if (offset >= 0) {
3877 int element = buf->next_element_to_fill;
3878 buffer->element[element].addr = hdr;
3879 buffer->element[element].length = sizeof(struct qeth_hdr) +
3880 hd_len;
3ec90878 3881 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3882 buf->is_header[element] = 1;
3883 buf->next_element_to_fill++;
3884 }
3885
51aa165c
FB		 3886 __qeth_fill_buffer(skb, buffer, large_send,
3887 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3888
3889 if (!queue->do_pack) {
847a50fd 3890 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3891 /* set state to PRIMED -> will be flushed */
3892 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3893 flush_cnt = 1;
3894 } else {
847a50fd 3895 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3896 if (queue->card->options.performance_stats)
3897 queue->card->perf_stats.skbs_sent_pack++;
3898 if (buf->next_element_to_fill >=
3899 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3900 /*
3901 * packed buffer if full -> set state PRIMED
3902 * -> will be flushed
3903 */
3904 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3905 flush_cnt = 1;
3906 }
3907 }
3908 return flush_cnt;
3909}
3910
3911int qeth_do_send_packet_fast(struct qeth_card *card,
3912 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3913 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3914 int offset, int hd_len)
4a71df50
FB		 3915{
3916 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3917 int index;
3918
4a71df50
FB		 3919 /* spin until we get the queue ... */
3920 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3921 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3922 /* ... now we've got the queue */
3923 index = queue->next_buf_to_fill;
0da9581d 3924 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3925 /*
3926 * check if buffer is empty to make sure that we do not 'overtake'
3927 * ourselves and try to fill a buffer that is already primed
3928 */
3929 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3930 goto out;
64ef8957 3931 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3932 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3933 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3934 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3935 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3936 return 0;
3937out:
3938 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3939 return -EBUSY;
3940}
3941EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3942
3943int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3944 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3945 int elements_needed)
4a71df50
FB		 3946{
3947 struct qeth_qdio_out_buffer *buffer;
3948 int start_index;
3949 int flush_count = 0;
3950 int do_pack = 0;
3951 int tmp;
3952 int rc = 0;
3953
4a71df50
FB		 3954 /* spin until we get the queue ... */
3955 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3956 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3957 start_index = queue->next_buf_to_fill;
0da9581d 3958 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3959 /*
3960 * check if buffer is empty to make sure that we do not 'overtake'
3961 * ourselves and try to fill a buffer that is already primed
3962 */
3963 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3964 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3965 return -EBUSY;
3966 }
3967 /* check if we need to switch packing state of this queue */
3968 qeth_switch_to_packing_if_needed(queue);
3969 if (queue->do_pack) {
3970 do_pack = 1;
64ef8957
FB		 3971 /* does packet fit in current buffer? */
3972 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3973 buffer->next_element_to_fill) < elements_needed) {
3974 /* ... no -> set state PRIMED */
3975 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3976 flush_count++;
3977 queue->next_buf_to_fill =
3978 (queue->next_buf_to_fill + 1) %
3979 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3980 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3981 /* we did a step forward, so check buffer state
3982 * again */
3983 if (atomic_read(&buffer->state) !=
3984 QETH_QDIO_BUF_EMPTY) {
3985 qeth_flush_buffers(queue, start_index,
779e6e1c 3986 flush_count);
64ef8957 3987 atomic_set(&queue->state,
4a71df50 3988 QETH_OUT_Q_UNLOCKED);
64ef8957 3989 return -EBUSY;
4a71df50
FB		 3990 }
3991 }
3992 }
64ef8957 3993 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3994 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3995 QDIO_MAX_BUFFERS_PER_Q;
3996 flush_count += tmp;
4a71df50 3997 if (flush_count)
779e6e1c 3998 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3999 else if (!atomic_read(&queue->set_pci_flags_count))
4000 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4001 /*
4002 * queue->state will go from LOCKED -> UNLOCKED or from
4003 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4004 * (switch packing state or flush buffer to get another pci flag out).
4005 * In that case we will enter this loop
4006 */
4007 while (atomic_dec_return(&queue->state)) {
4008 flush_count = 0;
4009 start_index = queue->next_buf_to_fill;
4010 /* check if we can go back to non-packing state */
4011 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4012 /*
4013 * check if we need to flush a packing buffer to get a pci
4014 * flag out on the queue
4015 */
4016 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4017 flush_count += qeth_flush_buffers_on_no_pci(queue);
4018 if (flush_count)
779e6e1c 4019 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4020 }
4021 /* at this point the queue is UNLOCKED again */
4022 if (queue->card->options.performance_stats && do_pack)
4023 queue->card->perf_stats.bufs_sent_pack += flush_count;
4024
4025 return rc;
4026}
4027EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4028
4029static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4030 struct qeth_reply *reply, unsigned long data)
4031{
4032 struct qeth_ipa_cmd *cmd;
4033 struct qeth_ipacmd_setadpparms *setparms;
4034
847a50fd 4035 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4036
4037 cmd = (struct qeth_ipa_cmd *) data;
4038 setparms = &(cmd->data.setadapterparms);
4039
4040 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4041 if (cmd->hdr.return_code) {
847a50fd 4042 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 4043 setparms->data.mode = SET_PROMISC_MODE_OFF;
4044 }
4045 card->info.promisc_mode = setparms->data.mode;
4046 return 0;
4047}
4048
4049void qeth_setadp_promisc_mode(struct qeth_card *card)
4050{
4051 enum qeth_ipa_promisc_modes mode;
4052 struct net_device *dev = card->dev;
4053 struct qeth_cmd_buffer *iob;
4054 struct qeth_ipa_cmd *cmd;
4055
847a50fd 4056 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4057
4058 if (((dev->flags & IFF_PROMISC) &&
4059 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4060 (!(dev->flags & IFF_PROMISC) &&
4061 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4062 return;
4063 mode = SET_PROMISC_MODE_OFF;
4064 if (dev->flags & IFF_PROMISC)
4065 mode = SET_PROMISC_MODE_ON;
847a50fd 4066 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4067
4068 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
4069 sizeof(struct qeth_ipacmd_setadpparms));
4070 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4071 cmd->data.setadapterparms.data.mode = mode;
4072 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4073}
4074EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4075
4076int qeth_change_mtu(struct net_device *dev, int new_mtu)
4077{
4078 struct qeth_card *card;
4079 char dbf_text[15];
4080
509e2562 4081 card = dev->ml_priv;
4a71df50 4082
847a50fd 4083 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4084 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4085 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 4086
4087 if (new_mtu < 64)
4088 return -EINVAL;
4089 if (new_mtu > 65535)
4090 return -EINVAL;
4091 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4092 (!qeth_mtu_is_valid(card, new_mtu)))
4093 return -EINVAL;
4094 dev->mtu = new_mtu;
4095 return 0;
4096}
4097EXPORT_SYMBOL_GPL(qeth_change_mtu);
4098
4099struct net_device_stats *qeth_get_stats(struct net_device *dev)
4100{
4101 struct qeth_card *card;
4102
509e2562 4103 card = dev->ml_priv;
4a71df50 4104
847a50fd 4105 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4106
4107 return &card->stats;
4108}
4109EXPORT_SYMBOL_GPL(qeth_get_stats);
4110
4111static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4112 struct qeth_reply *reply, unsigned long data)
4113{
4114 struct qeth_ipa_cmd *cmd;
4115
847a50fd 4116 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4117
4118 cmd = (struct qeth_ipa_cmd *) data;
4119 if (!card->options.layer2 ||
4120 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4121 memcpy(card->dev->dev_addr,
4122 &cmd->data.setadapterparms.data.change_addr.addr,
4123 OSA_ADDR_LEN);
4124 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4125 }
4126 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4127 return 0;
4128}
4129
4130int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4131{
4132 int rc;
4133 struct qeth_cmd_buffer *iob;
4134 struct qeth_ipa_cmd *cmd;
4135
847a50fd 4136 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4137
4138 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4139 sizeof(struct qeth_ipacmd_setadpparms));
4140 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4141 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4142 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4143 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4144 card->dev->dev_addr, OSA_ADDR_LEN);
4145 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4146 NULL);
4147 return rc;
4148}
4149EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4150
d64ecc22
EL		 4151static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4152 struct qeth_reply *reply, unsigned long data)
4153{
4154 struct qeth_ipa_cmd *cmd;
4155 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4156 int fallback = *(int *)reply->param;
d64ecc22 4157
847a50fd 4158 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4159
4160 cmd = (struct qeth_ipa_cmd *) data;
4161 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4162 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4163 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4164 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4165 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4166 if (cmd->data.setadapterparms.hdr.return_code !=
4167 SET_ACCESS_CTRL_RC_SUCCESS)
4168 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4169 card->gdev->dev.kobj.name,
4170 access_ctrl_req->subcmd_code,
4171 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4172 switch (cmd->data.setadapterparms.hdr.return_code) {
4173 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4174 if (card->options.isolation == ISOLATION_MODE_NONE) {
4175 dev_info(&card->gdev->dev,
4176 "QDIO data connection isolation is deactivated\n");
4177 } else {
4178 dev_info(&card->gdev->dev,
4179 "QDIO data connection isolation is activated\n");
4180 }
d64ecc22 4181 break;
0f54761d
SR		 4182 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4183 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4184 "deactivated\n", dev_name(&card->gdev->dev));
4185 if (fallback)
4186 card->options.isolation = card->options.prev_isolation;
4187 break;
4188 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4189 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4190 " activated\n", dev_name(&card->gdev->dev));
4191 if (fallback)
4192 card->options.isolation = card->options.prev_isolation;
4193 break;
d64ecc22 4194 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4195 dev_err(&card->gdev->dev, "Adapter does not "
4196 "support QDIO data connection isolation\n");
d64ecc22 4197 break;
d64ecc22 4198 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4199 dev_err(&card->gdev->dev,
4200 "Adapter is dedicated. "
4201 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4202 if (fallback)
4203 card->options.isolation = card->options.prev_isolation;
d64ecc22 4204 break;
d64ecc22 4205 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4206 dev_err(&card->gdev->dev,
4207 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4208 if (fallback)
4209 card->options.isolation = card->options.prev_isolation;
4210 break;
4211 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4212 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4213 "support reflective relay mode\n");
4214 if (fallback)
4215 card->options.isolation = card->options.prev_isolation;
4216 break;
4217 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4218 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4219 "enabled at the adjacent switch port");
4220 if (fallback)
4221 card->options.isolation = card->options.prev_isolation;
4222 break;
4223 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4224 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4225 "at the adjacent switch failed\n");
d64ecc22 4226 break;
d64ecc22 4227 default:
d64ecc22 4228 /* this should never happen */
0f54761d
SR		 4229 if (fallback)
4230 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4231 break;
4232 }
d64ecc22 4233 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4234 return 0;
d64ecc22
EL		 4235}
4236
4237static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4238 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4239{
4240 int rc;
4241 struct qeth_cmd_buffer *iob;
4242 struct qeth_ipa_cmd *cmd;
4243 struct qeth_set_access_ctrl *access_ctrl_req;
4244
847a50fd 4245 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4246
4247 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4248 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4249
4250 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4251 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4252 sizeof(struct qeth_set_access_ctrl));
4253 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4254 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4255 access_ctrl_req->subcmd_code = isolation;
4256
4257 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4258 &fallback);
d64ecc22
EL		 4259 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4260 return rc;
4261}
4262
0f54761d 4263int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4264{
4265 int rc = 0;
4266
847a50fd 4267 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4268
5113fec0
UB		 4269 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4270 card->info.type == QETH_CARD_TYPE_OSX) &&
4271 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4272 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4273 card->options.isolation, fallback);
d64ecc22
EL		 4274 if (rc) {
4275 QETH_DBF_MESSAGE(3,
5113fec0 4276 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4277 card->gdev->dev.kobj.name,
4278 rc);
0f54761d 4279 rc = -EOPNOTSUPP;
d64ecc22
EL		 4280 }
4281 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4282 card->options.isolation = ISOLATION_MODE_NONE;
4283
4284 dev_err(&card->gdev->dev, "Adapter does not "
4285 "support QDIO data connection isolation\n");
4286 rc = -EOPNOTSUPP;
4287 }
4288 return rc;
4289}
4290EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4291
4a71df50
FB		 4292void qeth_tx_timeout(struct net_device *dev)
4293{
4294 struct qeth_card *card;
4295
509e2562 4296 card = dev->ml_priv;
847a50fd 4297 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4298 card->stats.tx_errors++;
4299 qeth_schedule_recovery(card);
4300}
4301EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4302
4303int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4304{
509e2562 4305 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4306 int rc = 0;
4307
4308 switch (regnum) {
4309 case MII_BMCR: /* Basic mode control register */
4310 rc = BMCR_FULLDPLX;
4311 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4312 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4313 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4314 rc |= BMCR_SPEED100;
4315 break;
4316 case MII_BMSR: /* Basic mode status register */
4317 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4318 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4319 BMSR_100BASE4;
4320 break;
4321 case MII_PHYSID1: /* PHYS ID 1 */
4322 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4323 dev->dev_addr[2];
4324 rc = (rc >> 5) & 0xFFFF;
4325 break;
4326 case MII_PHYSID2: /* PHYS ID 2 */
4327 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4328 break;
4329 case MII_ADVERTISE: /* Advertisement control reg */
4330 rc = ADVERTISE_ALL;
4331 break;
4332 case MII_LPA: /* Link partner ability reg */
4333 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4334 LPA_100BASE4 | LPA_LPACK;
4335 break;
4336 case MII_EXPANSION: /* Expansion register */
4337 break;
4338 case MII_DCOUNTER: /* disconnect counter */
4339 break;
4340 case MII_FCSCOUNTER: /* false carrier counter */
4341 break;
4342 case MII_NWAYTEST: /* N-way auto-neg test register */
4343 break;
4344 case MII_RERRCOUNTER: /* rx error counter */
4345 rc = card->stats.rx_errors;
4346 break;
4347 case MII_SREVISION: /* silicon revision */
4348 break;
4349 case MII_RESV1: /* reserved 1 */
4350 break;
4351 case MII_LBRERROR: /* loopback, rx, bypass error */
4352 break;
4353 case MII_PHYADDR: /* physical address */
4354 break;
4355 case MII_RESV2: /* reserved 2 */
4356 break;
4357 case MII_TPISTATUS: /* TPI status for 10mbps */
4358 break;
4359 case MII_NCONFIG: /* network interface config */
4360 break;
4361 default:
4362 break;
4363 }
4364 return rc;
4365}
4366EXPORT_SYMBOL_GPL(qeth_mdio_read);
4367
4368static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4369 struct qeth_cmd_buffer *iob, int len,
4370 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4371 unsigned long),
4372 void *reply_param)
4373{
4374 u16 s1, s2;
4375
847a50fd 4376 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4377
4378 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4379 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4380 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4381 /* adjust PDU length fields in IPA_PDU_HEADER */
4382 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4383 s2 = (u32) len;
4384 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4385 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4386 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4387 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4388 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4389 reply_cb, reply_param);
4390}
4391
4392static int qeth_snmp_command_cb(struct qeth_card *card,
4393 struct qeth_reply *reply, unsigned long sdata)
4394{
4395 struct qeth_ipa_cmd *cmd;
4396 struct qeth_arp_query_info *qinfo;
4397 struct qeth_snmp_cmd *snmp;
4398 unsigned char *data;
4399 __u16 data_len;
4400
847a50fd 4401 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4402
4403 cmd = (struct qeth_ipa_cmd *) sdata;
4404 data = (unsigned char *)((char *)cmd - reply->offset);
4405 qinfo = (struct qeth_arp_query_info *) reply->param;
4406 snmp = &cmd->data.setadapterparms.data.snmp;
4407
4408 if (cmd->hdr.return_code) {
847a50fd 4409 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4410 return 0;
4411 }
4412 if (cmd->data.setadapterparms.hdr.return_code) {
4413 cmd->hdr.return_code =
4414 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4415 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4416 return 0;
4417 }
4418 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4419 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4420 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4421 else
4422 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4423
4424 /* check if there is enough room in userspace */
4425 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4426 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4427 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4428 return 0;
4429 }
847a50fd 4430 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4431 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4432 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4433 cmd->data.setadapterparms.hdr.seq_no);
4434 /*copy entries to user buffer*/
4435 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4436 memcpy(qinfo->udata + qinfo->udata_offset,
4437 (char *)snmp,
4438 data_len + offsetof(struct qeth_snmp_cmd, data));
4439 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4440 } else {
4441 memcpy(qinfo->udata + qinfo->udata_offset,
4442 (char *)&snmp->request, data_len);
4443 }
4444 qinfo->udata_offset += data_len;
4445 /* check if all replies received ... */
847a50fd 4446 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4447 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4448 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4449 cmd->data.setadapterparms.hdr.seq_no);
4450 if (cmd->data.setadapterparms.hdr.seq_no <
4451 cmd->data.setadapterparms.hdr.used_total)
4452 return 1;
4453 return 0;
4454}
4455
4456int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4457{
4458 struct qeth_cmd_buffer *iob;
4459 struct qeth_ipa_cmd *cmd;
4460 struct qeth_snmp_ureq *ureq;
6fb392b1 4461 unsigned int req_len;
4a71df50
FB		 4462 struct qeth_arp_query_info qinfo = {0, };
4463 int rc = 0;
4464
847a50fd 4465 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4466
4467 if (card->info.guestlan)
4468 return -EOPNOTSUPP;
4469
4470 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4471 (!card->options.layer2)) {
4a71df50
FB		 4472 return -EOPNOTSUPP;
4473 }
4474 /* skip 4 bytes (data_len struct member) to get req_len */
4475 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4476 return -EFAULT;
6fb392b1
UB		 4477 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4478 sizeof(struct qeth_ipacmd_hdr) -
4479 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4480 return -EINVAL;
4986f3f0
JL		 4481 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4482 if (IS_ERR(ureq)) {
847a50fd 4483 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4484 return PTR_ERR(ureq);
4a71df50
FB		 4485 }
4486 qinfo.udata_len = ureq->hdr.data_len;
4487 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4488 if (!qinfo.udata) {
4489 kfree(ureq);
4490 return -ENOMEM;
4491 }
4492 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4493
4494 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4495 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4496 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4497 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4498 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4499 qeth_snmp_command_cb, (void *)&qinfo);
4500 if (rc)
14cc21b6 4501 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4502 QETH_CARD_IFNAME(card), rc);
4503 else {
4504 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4505 rc = -EFAULT;
4506 }
4507
4508 kfree(ureq);
4509 kfree(qinfo.udata);
4510 return rc;
4511}
4512EXPORT_SYMBOL_GPL(qeth_snmp_command);
4513
c3ab96f3
FB		 4514static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4515 struct qeth_reply *reply, unsigned long data)
4516{
4517 struct qeth_ipa_cmd *cmd;
4518 struct qeth_qoat_priv *priv;
4519 char *resdata;
4520 int resdatalen;
4521
4522 QETH_CARD_TEXT(card, 3, "qoatcb");
4523
4524 cmd = (struct qeth_ipa_cmd *)data;
4525 priv = (struct qeth_qoat_priv *)reply->param;
4526 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4527 resdata = (char *)data + 28;
4528
4529 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4530 cmd->hdr.return_code = IPA_RC_FFFF;
4531 return 0;
4532 }
4533
4534 memcpy((priv->buffer + priv->response_len), resdata,
4535 resdatalen);
4536 priv->response_len += resdatalen;
4537
4538 if (cmd->data.setadapterparms.hdr.seq_no <
4539 cmd->data.setadapterparms.hdr.used_total)
4540 return 1;
4541 return 0;
4542}
4543
4544int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4545{
4546 int rc = 0;
4547 struct qeth_cmd_buffer *iob;
4548 struct qeth_ipa_cmd *cmd;
4549 struct qeth_query_oat *oat_req;
4550 struct qeth_query_oat_data oat_data;
4551 struct qeth_qoat_priv priv;
4552 void __user *tmp;
4553
4554 QETH_CARD_TEXT(card, 3, "qoatcmd");
4555
4556 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4557 rc = -EOPNOTSUPP;
4558 goto out;
4559 }
4560
4561 if (copy_from_user(&oat_data, udata,
4562 sizeof(struct qeth_query_oat_data))) {
4563 rc = -EFAULT;
4564 goto out;
4565 }
4566
4567 priv.buffer_len = oat_data.buffer_len;
4568 priv.response_len = 0;
4569 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4570 if (!priv.buffer) {
4571 rc = -ENOMEM;
4572 goto out;
4573 }
4574
4575 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4576 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4577 sizeof(struct qeth_query_oat));
4578 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4579 oat_req = &cmd->data.setadapterparms.data.query_oat;
4580 oat_req->subcmd_code = oat_data.command;
4581
4582 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4583 &priv);
4584 if (!rc) {
4585 if (is_compat_task())
4586 tmp = compat_ptr(oat_data.ptr);
4587 else
4588 tmp = (void __user *)(unsigned long)oat_data.ptr;
4589
4590 if (copy_to_user(tmp, priv.buffer,
4591 priv.response_len)) {
4592 rc = -EFAULT;
4593 goto out_free;
4594 }
4595
4596 oat_data.response_len = priv.response_len;
4597
4598 if (copy_to_user(udata, &oat_data,
4599 sizeof(struct qeth_query_oat_data)))
4600 rc = -EFAULT;
4601 } else
4602 if (rc == IPA_RC_FFFF)
4603 rc = -EFAULT;
4604
4605out_free:
4606 kfree(priv.buffer);
4607out:
4608 return rc;
4609}
4610EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4611
02d5cb5b
EC		 4612int qeth_query_card_info_cb(struct qeth_card *card,
4613 struct qeth_reply *reply, unsigned long data)
4614{
4615 struct qeth_ipa_cmd *cmd;
4616 struct qeth_query_card_info *card_info;
4617 struct carrier_info *carrier_info;
4618
4619 QETH_CARD_TEXT(card, 2, "qcrdincb");
4620 carrier_info = (struct carrier_info *)reply->param;
4621 cmd = (struct qeth_ipa_cmd *)data;
4622 card_info = &cmd->data.setadapterparms.data.card_info;
4623 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4624 carrier_info->card_type = card_info->card_type;
4625 carrier_info->port_mode = card_info->port_mode;
4626 carrier_info->port_speed = card_info->port_speed;
4627 }
4628
4629 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4630 return 0;
4631}
4632
4633int qeth_query_card_info(struct qeth_card *card,
4634 struct carrier_info *carrier_info)
4635{
4636 struct qeth_cmd_buffer *iob;
4637
4638 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4639 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4640 return -EOPNOTSUPP;
4641 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4642 sizeof(struct qeth_ipacmd_setadpparms_hdr));
4643 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4644 (void *)carrier_info);
4645}
4646EXPORT_SYMBOL_GPL(qeth_query_card_info);
4647
4a71df50
FB		 4648static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4649{
4650 switch (card->info.type) {
4651 case QETH_CARD_TYPE_IQD:
4652 return 2;
4653 default:
4654 return 0;
4655 }
4656}
4657
d0ff1f52
UB		 4658static void qeth_determine_capabilities(struct qeth_card *card)
4659{
4660 int rc;
4661 int length;
4662 char *prcd;
4663 struct ccw_device *ddev;
4664 int ddev_offline = 0;
4665
4666 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4667 ddev = CARD_DDEV(card);
4668 if (!ddev->online) {
4669 ddev_offline = 1;
4670 rc = ccw_device_set_online(ddev);
4671 if (rc) {
4672 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4673 goto out;
4674 }
4675 }
4676
4677 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4678 if (rc) {
4679 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4680 dev_name(&card->gdev->dev), rc);
4681 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4682 goto out_offline;
4683 }
4684 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4685 if (ddev_offline)
4686 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4687 kfree(prcd);
4688
4689 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4690 if (rc)
4691 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4692
0da9581d
EL		 4693 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4694 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4695 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4696 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4697 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4698 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4699 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4700 dev_info(&card->gdev->dev,
4701 "Completion Queueing supported\n");
4702 } else {
4703 card->options.cq = QETH_CQ_NOTAVAILABLE;
4704 }
4705
4706
d0ff1f52
UB		 4707out_offline:
4708 if (ddev_offline == 1)
4709 ccw_device_set_offline(ddev);
4710out:
4711 return;
4712}
4713
0da9581d
EL		 4714static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4715 struct qdio_buffer **in_sbal_ptrs,
4716 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4717 int i;
4718
4719 if (card->options.cq == QETH_CQ_ENABLED) {
4720 int offset = QDIO_MAX_BUFFERS_PER_Q *
4721 (card->qdio.no_in_queues - 1);
4722 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4723 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4724 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4725 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4726 }
4727
4728 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4729 }
4730}
4731
4a71df50
FB		 4732static int qeth_qdio_establish(struct qeth_card *card)
4733{
4734 struct qdio_initialize init_data;
4735 char *qib_param_field;
4736 struct qdio_buffer **in_sbal_ptrs;
104ea556 4737 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4738 struct qdio_buffer **out_sbal_ptrs;
4739 int i, j, k;
4740 int rc = 0;
4741
d11ba0c4 4742 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4743
4744 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4745 GFP_KERNEL);
104ea556 4746 if (!qib_param_field) {
4747 rc = -ENOMEM;
4748 goto out_free_nothing;
4749 }
4a71df50
FB		 4750
4751 qeth_create_qib_param_field(card, qib_param_field);
4752 qeth_create_qib_param_field_blkt(card, qib_param_field);
4753
b3332930 4754 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4755 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4756 GFP_KERNEL);
4757 if (!in_sbal_ptrs) {
104ea556 4758 rc = -ENOMEM;
4759 goto out_free_qib_param;
4a71df50 4760 }
0da9581d 4761 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4762 in_sbal_ptrs[i] = (struct qdio_buffer *)
4763 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4764 }
4a71df50 4765
0da9581d
EL		 4766 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4767 GFP_KERNEL);
104ea556 4768 if (!queue_start_poll) {
4769 rc = -ENOMEM;
4770 goto out_free_in_sbals;
4771 }
0da9581d 4772 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4773 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4774
4775 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4776
4a71df50 4777 out_sbal_ptrs =
b3332930 4778 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4779 sizeof(void *), GFP_KERNEL);
4780 if (!out_sbal_ptrs) {
104ea556 4781 rc = -ENOMEM;
4782 goto out_free_queue_start_poll;
4a71df50
FB		 4783 }
4784 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4785 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4786 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4787 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4788 }
4789
4790 memset(&init_data, 0, sizeof(struct qdio_initialize));
4791 init_data.cdev = CARD_DDEV(card);
4792 init_data.q_format = qeth_get_qdio_q_format(card);
4793 init_data.qib_param_field_format = 0;
4794 init_data.qib_param_field = qib_param_field;
0da9581d 4795 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4796 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4797 init_data.input_handler = card->discipline->input_handler;
4798 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4799 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4800 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4801 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4802 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4803 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4804 init_data.scan_threshold =
0fa81cd4 4805 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4806
4807 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4808 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4809 rc = qdio_allocate(&init_data);
4810 if (rc) {
4811 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4812 goto out;
4813 }
4814 rc = qdio_establish(&init_data);
4815 if (rc) {
4a71df50 4816 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4817 qdio_free(CARD_DDEV(card));
4818 }
4a71df50 4819 }
0da9581d
EL		 4820
4821 switch (card->options.cq) {
4822 case QETH_CQ_ENABLED:
4823 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4824 break;
4825 case QETH_CQ_DISABLED:
4826 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4827 break;
4828 default:
4829 break;
4830 }
cc961d40 4831out:
4a71df50 4832 kfree(out_sbal_ptrs);
104ea556 4833out_free_queue_start_poll:
4834 kfree(queue_start_poll);
4835out_free_in_sbals:
4a71df50 4836 kfree(in_sbal_ptrs);
104ea556 4837out_free_qib_param:
4a71df50 4838 kfree(qib_param_field);
104ea556 4839out_free_nothing:
4a71df50
FB		 4840 return rc;
4841}
4842
4843static void qeth_core_free_card(struct qeth_card *card)
4844{
4845
d11ba0c4
PT		 4846 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4847 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4848 qeth_clean_channel(&card->read);
4849 qeth_clean_channel(&card->write);
4850 if (card->dev)
4851 free_netdev(card->dev);
4852 kfree(card->ip_tbd_list);
4853 qeth_free_qdio_buffers(card);
6bcac508 4854 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4855 kfree(card);
4856}
4857
395672e0
SR		 4858void qeth_trace_features(struct qeth_card *card)
4859{
4860 QETH_CARD_TEXT(card, 2, "features");
4861 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
4862 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
4863 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
4864 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
4865 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
4866 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
4867 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
4868}
4869EXPORT_SYMBOL_GPL(qeth_trace_features);
4870
4a71df50 4871static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4872 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4873 .driver_info = QETH_CARD_TYPE_OSD},
4874 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4875 .driver_info = QETH_CARD_TYPE_IQD},
4876 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4877 .driver_info = QETH_CARD_TYPE_OSN},
4878 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4879 .driver_info = QETH_CARD_TYPE_OSM},
4880 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4881 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4882 {},
4883};
4884MODULE_DEVICE_TABLE(ccw, qeth_ids);
4885
4886static struct ccw_driver qeth_ccw_driver = {
3bda058b 4887 .driver = {
3e70b3b8 4888 .owner = THIS_MODULE,
3bda058b
SO		 4889 .name = "qeth",
4890 },
4a71df50
FB		 4891 .ids = qeth_ids,
4892 .probe = ccwgroup_probe_ccwdev,
4893 .remove = ccwgroup_remove_ccwdev,
4894};
4895
4a71df50
FB		 4896int qeth_core_hardsetup_card(struct qeth_card *card)
4897{
6ebb7f8d 4898 int retries = 3;
4a71df50
FB		 4899 int rc;
4900
d11ba0c4 4901 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4902 atomic_set(&card->force_alloc_skb, 0);
725b9c04 4903 qeth_update_from_chp_desc(card);
4a71df50 4904retry:
6ebb7f8d 4905 if (retries < 3)
74eacdb9
FB		 4906 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4907 dev_name(&card->gdev->dev));
aa909224
UB		 4908 ccw_device_set_offline(CARD_DDEV(card));
4909 ccw_device_set_offline(CARD_WDEV(card));
4910 ccw_device_set_offline(CARD_RDEV(card));
4911 rc = ccw_device_set_online(CARD_RDEV(card));
4912 if (rc)
4913 goto retriable;
4914 rc = ccw_device_set_online(CARD_WDEV(card));
4915 if (rc)
4916 goto retriable;
4917 rc = ccw_device_set_online(CARD_DDEV(card));
4918 if (rc)
4919 goto retriable;
4a71df50 4920 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 4921retriable:
4a71df50 4922 if (rc == -ERESTARTSYS) {
d11ba0c4 4923 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 4924 return rc;
4925 } else if (rc) {
d11ba0c4 4926 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 4927 if (--retries < 0)
4a71df50
FB		 4928 goto out;
4929 else
4930 goto retry;
4931 }
d0ff1f52 4932 qeth_determine_capabilities(card);
4a71df50
FB		 4933 qeth_init_tokens(card);
4934 qeth_init_func_level(card);
4935 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4936 if (rc == -ERESTARTSYS) {
d11ba0c4 4937 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 4938 return rc;
4939 } else if (rc) {
d11ba0c4 4940 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4941 if (--retries < 0)
4942 goto out;
4943 else
4944 goto retry;
4945 }
4946 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4947 if (rc == -ERESTARTSYS) {
d11ba0c4 4948 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 4949 return rc;
4950 } else if (rc) {
d11ba0c4 4951 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 4952 if (--retries < 0)
4953 goto out;
4954 else
4955 goto retry;
4956 }
908abbb5 4957 card->read_or_write_problem = 0;
4a71df50
FB		 4958 rc = qeth_mpc_initialize(card);
4959 if (rc) {
d11ba0c4 4960 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 4961 goto out;
4962 }
1da74b1c
FB		 4963
4964 card->options.ipa4.supported_funcs = 0;
4965 card->options.adp.supported_funcs = 0;
b4d72c08 4966 card->options.sbp.supported_funcs = 0;
1da74b1c
FB		 4967 card->info.diagass_support = 0;
4968 qeth_query_ipassists(card, QETH_PROT_IPV4);
4969 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4970 qeth_query_setadapterparms(card);
4971 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4972 qeth_query_setdiagass(card);
b4d72c08
EC		 4973 qeth_bridgeport_query_support(card);
4974 if (card->options.sbp.supported_funcs)
4975 dev_info(&card->gdev->dev,
4976 "The device represents a HiperSockets Bridge Capable Port\n");
4a71df50
FB		 4977 return 0;
4978out:
74eacdb9
FB		 4979 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4980 "an error on the device\n");
4981 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4982 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 4983 return rc;
4984}
4985EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4986
b3332930
FB		 4987static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4988 struct qdio_buffer_element *element,
4a71df50
FB		 4989 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4990{
4991 struct page *page = virt_to_page(element->addr);
4992 if (*pskb == NULL) {
b3332930
FB		 4993 if (qethbuffer->rx_skb) {
4994 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4995 *pskb = qethbuffer->rx_skb;
4996 qethbuffer->rx_skb = NULL;
4997 } else {
4998 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4999 if (!(*pskb))
5000 return -ENOMEM;
5001 }
5002
4a71df50 5003 skb_reserve(*pskb, ETH_HLEN);
b3332930 5004 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 5005 memcpy(skb_put(*pskb, data_len), element->addr + offset,
5006 data_len);
5007 } else {
5008 get_page(page);
b3332930
FB		 5009 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
5010 element->addr + offset, QETH_RX_PULL_LEN);
5011 skb_fill_page_desc(*pskb, *pfrag, page,
5012 offset + QETH_RX_PULL_LEN,
5013 data_len - QETH_RX_PULL_LEN);
5014 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
5015 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
5016 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 5017 (*pfrag)++;
5018 }
5019 } else {
5020 get_page(page);
5021 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
5022 (*pskb)->data_len += data_len;
5023 (*pskb)->len += data_len;
5024 (*pskb)->truesize += data_len;
5025 (*pfrag)++;
5026 }
0da9581d
EL		 5027
5028
4a71df50
FB		 5029 return 0;
5030}
5031
5032struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5033 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5034 struct qdio_buffer_element **__element, int *__offset,
5035 struct qeth_hdr **hdr)
5036{
5037 struct qdio_buffer_element *element = *__element;
b3332930 5038 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 5039 int offset = *__offset;
5040 struct sk_buff *skb = NULL;
76b11f8e 5041 int skb_len = 0;
4a71df50
FB		 5042 void *data_ptr;
5043 int data_len;
5044 int headroom = 0;
5045 int use_rx_sg = 0;
5046 int frag = 0;
5047
4a71df50
FB		 5048 /* qeth_hdr must not cross element boundaries */
5049 if (element->length < offset + sizeof(struct qeth_hdr)) {
5050 if (qeth_is_last_sbale(element))
5051 return NULL;
5052 element++;
5053 offset = 0;
5054 if (element->length < sizeof(struct qeth_hdr))
5055 return NULL;
5056 }
5057 *hdr = element->addr + offset;
5058
5059 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5060 switch ((*hdr)->hdr.l2.id) {
5061 case QETH_HEADER_TYPE_LAYER2:
5062 skb_len = (*hdr)->hdr.l2.pkt_length;
5063 break;
5064 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5065 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5066 headroom = ETH_HLEN;
76b11f8e
UB		 5067 break;
5068 case QETH_HEADER_TYPE_OSN:
5069 skb_len = (*hdr)->hdr.osn.pdu_length;
5070 headroom = sizeof(struct qeth_hdr);
5071 break;
5072 default:
5073 break;
4a71df50
FB		 5074 }
5075
5076 if (!skb_len)
5077 return NULL;
5078
b3332930
FB		 5079 if (((skb_len >= card->options.rx_sg_cb) &&
5080 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5081 (!atomic_read(&card->force_alloc_skb))) ||
5082 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 5083 use_rx_sg = 1;
5084 } else {
5085 skb = dev_alloc_skb(skb_len + headroom);
5086 if (!skb)
5087 goto no_mem;
5088 if (headroom)
5089 skb_reserve(skb, headroom);
5090 }
5091
5092 data_ptr = element->addr + offset;
5093 while (skb_len) {
5094 data_len = min(skb_len, (int)(element->length - offset));
5095 if (data_len) {
5096 if (use_rx_sg) {
b3332930
FB		 5097 if (qeth_create_skb_frag(qethbuffer, element,
5098 &skb, offset, &frag, data_len))
4a71df50
FB		 5099 goto no_mem;
5100 } else {
5101 memcpy(skb_put(skb, data_len), data_ptr,
5102 data_len);
5103 }
5104 }
5105 skb_len -= data_len;
5106 if (skb_len) {
5107 if (qeth_is_last_sbale(element)) {
847a50fd 5108 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5109 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5110 dev_kfree_skb_any(skb);
5111 card->stats.rx_errors++;
5112 return NULL;
5113 }
5114 element++;
5115 offset = 0;
5116 data_ptr = element->addr;
5117 } else {
5118 offset += data_len;
5119 }
5120 }
5121 *__element = element;
5122 *__offset = offset;
5123 if (use_rx_sg && card->options.performance_stats) {
5124 card->perf_stats.sg_skbs_rx++;
5125 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5126 }
5127 return skb;
5128no_mem:
5129 if (net_ratelimit()) {
847a50fd 5130 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5131 }
5132 card->stats.rx_dropped++;
5133 return NULL;
5134}
5135EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5136
5137static void qeth_unregister_dbf_views(void)
5138{
d11ba0c4
PT		 5139 int x;
5140 for (x = 0; x < QETH_DBF_INFOS; x++) {
5141 debug_unregister(qeth_dbf[x].id);
5142 qeth_dbf[x].id = NULL;
5143 }
4a71df50
FB		 5144}
5145
8e96c51c 5146void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5147{
5148 char dbf_txt_buf[32];
345aa66e 5149 va_list args;
cd023216 5150
8e6a8285 5151 if (!debug_level_enabled(id, level))
cd023216 5152 return;
345aa66e
PT		 5153 va_start(args, fmt);
5154 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5155 va_end(args);
8e96c51c 5156 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5157}
5158EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5159
4a71df50
FB		 5160static int qeth_register_dbf_views(void)
5161{
d11ba0c4
PT		 5162 int ret;
5163 int x;
5164
5165 for (x = 0; x < QETH_DBF_INFOS; x++) {
5166 /* register the areas */
5167 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5168 qeth_dbf[x].pages,
5169 qeth_dbf[x].areas,
5170 qeth_dbf[x].len);
5171 if (qeth_dbf[x].id == NULL) {
5172 qeth_unregister_dbf_views();
5173 return -ENOMEM;
5174 }
4a71df50 5175
d11ba0c4
PT		 5176 /* register a view */
5177 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5178 if (ret) {
5179 qeth_unregister_dbf_views();
5180 return ret;
5181 }
4a71df50 5182
d11ba0c4
PT		 5183 /* set a passing level */
5184 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5185 }
4a71df50
FB		 5186
5187 return 0;
5188}
5189
5190int qeth_core_load_discipline(struct qeth_card *card,
5191 enum qeth_discipline_id discipline)
5192{
5193 int rc = 0;
2022e00c 5194 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5195 switch (discipline) {
5196 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5197 card->discipline = try_then_request_module(
5198 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5199 break;
5200 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5201 card->discipline = try_then_request_module(
5202 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50
FB		 5203 break;
5204 }
c041f2d4 5205 if (!card->discipline) {
74eacdb9
FB		 5206 dev_err(&card->gdev->dev, "There is no kernel module to "
5207 "support discipline %d\n", discipline);
4a71df50
FB		 5208 rc = -EINVAL;
5209 }
2022e00c 5210 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5211 return rc;
5212}
5213
5214void qeth_core_free_discipline(struct qeth_card *card)
5215{
5216 if (card->options.layer2)
c041f2d4 5217 symbol_put(qeth_l2_discipline);
4a71df50 5218 else
c041f2d4
SO		 5219 symbol_put(qeth_l3_discipline);
5220 card->discipline = NULL;
4a71df50
FB		 5221}
5222
b7169c51
SO		 5223static const struct device_type qeth_generic_devtype = {
5224 .name = "qeth_generic",
5225 .groups = qeth_generic_attr_groups,
5226};
5227static const struct device_type qeth_osn_devtype = {
5228 .name = "qeth_osn",
5229 .groups = qeth_osn_attr_groups,
5230};
5231
819dc537
SR		 5232#define DBF_NAME_LEN 20
5233
5234struct qeth_dbf_entry {
5235 char dbf_name[DBF_NAME_LEN];
5236 debug_info_t *dbf_info;
5237 struct list_head dbf_list;
5238};
5239
5240static LIST_HEAD(qeth_dbf_list);
5241static DEFINE_MUTEX(qeth_dbf_list_mutex);
5242
5243static debug_info_t *qeth_get_dbf_entry(char *name)
5244{
5245 struct qeth_dbf_entry *entry;
5246 debug_info_t *rc = NULL;
5247
5248 mutex_lock(&qeth_dbf_list_mutex);
5249 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5250 if (strcmp(entry->dbf_name, name) == 0) {
5251 rc = entry->dbf_info;
5252 break;
5253 }
5254 }
5255 mutex_unlock(&qeth_dbf_list_mutex);
5256 return rc;
5257}
5258
5259static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5260{
5261 struct qeth_dbf_entry *new_entry;
5262
5263 card->debug = debug_register(name, 2, 1, 8);
5264 if (!card->debug) {
5265 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5266 goto err;
5267 }
5268 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5269 goto err_dbg;
5270 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5271 if (!new_entry)
5272 goto err_dbg;
5273 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5274 new_entry->dbf_info = card->debug;
5275 mutex_lock(&qeth_dbf_list_mutex);
5276 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5277 mutex_unlock(&qeth_dbf_list_mutex);
5278
5279 return 0;
5280
5281err_dbg:
5282 debug_unregister(card->debug);
5283err:
5284 return -ENOMEM;
5285}
5286
5287static void qeth_clear_dbf_list(void)
5288{
5289 struct qeth_dbf_entry *entry, *tmp;
5290
5291 mutex_lock(&qeth_dbf_list_mutex);
5292 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5293 list_del(&entry->dbf_list);
5294 debug_unregister(entry->dbf_info);
5295 kfree(entry);
5296 }
5297 mutex_unlock(&qeth_dbf_list_mutex);
5298}
5299
4a71df50
FB		 5300static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5301{
5302 struct qeth_card *card;
5303 struct device *dev;
5304 int rc;
5305 unsigned long flags;
819dc537 5306 char dbf_name[DBF_NAME_LEN];
4a71df50 5307
d11ba0c4 5308 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5309
5310 dev = &gdev->dev;
5311 if (!get_device(dev))
5312 return -ENODEV;
5313
2a0217d5 5314 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5315
5316 card = qeth_alloc_card();
5317 if (!card) {
d11ba0c4 5318 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5319 rc = -ENOMEM;
5320 goto err_dev;
5321 }
af039068
CO		 5322
5323 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5324 dev_name(&gdev->dev));
819dc537 5325 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5326 if (!card->debug) {
819dc537
SR		 5327 rc = qeth_add_dbf_entry(card, dbf_name);
5328 if (rc)
5329 goto err_card;
af039068 5330 }
af039068 5331
4a71df50
FB		 5332 card->read.ccwdev = gdev->cdev[0];
5333 card->write.ccwdev = gdev->cdev[1];
5334 card->data.ccwdev = gdev->cdev[2];
5335 dev_set_drvdata(&gdev->dev, card);
5336 card->gdev = gdev;
5337 gdev->cdev[0]->handler = qeth_irq;
5338 gdev->cdev[1]->handler = qeth_irq;
5339 gdev->cdev[2]->handler = qeth_irq;
5340
5341 rc = qeth_determine_card_type(card);
5342 if (rc) {
d11ba0c4 5343 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
819dc537 5344 goto err_card;
4a71df50
FB		 5345 }
5346 rc = qeth_setup_card(card);
5347 if (rc) {
d11ba0c4 5348 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5349 goto err_card;
4a71df50
FB		 5350 }
5351
5113fec0 5352 if (card->info.type == QETH_CARD_TYPE_OSN)
b7169c51 5353 gdev->dev.type = &qeth_osn_devtype;
5113fec0 5354 else
b7169c51
SO		 5355 gdev->dev.type = &qeth_generic_devtype;
5356
5113fec0
UB		 5357 switch (card->info.type) {
5358 case QETH_CARD_TYPE_OSN:
5359 case QETH_CARD_TYPE_OSM:
4a71df50 5360 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0 5361 if (rc)
819dc537 5362 goto err_card;
c041f2d4 5363 rc = card->discipline->setup(card->gdev);
4a71df50 5364 if (rc)
5113fec0
UB		 5365 goto err_disc;
5366 case QETH_CARD_TYPE_OSD:
5367 case QETH_CARD_TYPE_OSX:
5368 default:
5369 break;
4a71df50
FB		 5370 }
5371
5372 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5373 list_add_tail(&card->list, &qeth_core_card_list.list);
5374 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5375
5376 qeth_determine_capabilities(card);
4a71df50
FB		 5377 return 0;
5378
5113fec0
UB		 5379err_disc:
5380 qeth_core_free_discipline(card);
4a71df50
FB		 5381err_card:
5382 qeth_core_free_card(card);
5383err_dev:
5384 put_device(dev);
5385 return rc;
5386}
5387
5388static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5389{
5390 unsigned long flags;
5391 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5392
28a7e4c9 5393 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5394
c041f2d4
SO		 5395 if (card->discipline) {
5396 card->discipline->remove(gdev);
9dc48ccc
UB		 5397 qeth_core_free_discipline(card);
5398 }
5399
4a71df50
FB		 5400 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5401 list_del(&card->list);
5402 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5403 qeth_core_free_card(card);
5404 dev_set_drvdata(&gdev->dev, NULL);
5405 put_device(&gdev->dev);
5406 return;
5407}
5408
5409static int qeth_core_set_online(struct ccwgroup_device *gdev)
5410{
5411 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5412 int rc = 0;
5413 int def_discipline;
5414
c041f2d4 5415 if (!card->discipline) {
4a71df50
FB		 5416 if (card->info.type == QETH_CARD_TYPE_IQD)
5417 def_discipline = QETH_DISCIPLINE_LAYER3;
5418 else
5419 def_discipline = QETH_DISCIPLINE_LAYER2;
5420 rc = qeth_core_load_discipline(card, def_discipline);
5421 if (rc)
5422 goto err;
c041f2d4 5423 rc = card->discipline->setup(card->gdev);
4a71df50
FB		 5424 if (rc)
5425 goto err;
5426 }
c041f2d4 5427 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5428err:
5429 return rc;
5430}
5431
5432static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5433{
5434 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5435 return card->discipline->set_offline(gdev);
4a71df50
FB		 5436}
5437
5438static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5439{
5440 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5441 if (card->discipline && card->discipline->shutdown)
5442 card->discipline->shutdown(gdev);
4a71df50
FB		 5443}
5444
bbcfcdc8
FB		 5445static int qeth_core_prepare(struct ccwgroup_device *gdev)
5446{
5447 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5448 if (card->discipline && card->discipline->prepare)
5449 return card->discipline->prepare(gdev);
bbcfcdc8
FB		 5450 return 0;
5451}
5452
5453static void qeth_core_complete(struct ccwgroup_device *gdev)
5454{
5455 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5456 if (card->discipline && card->discipline->complete)
5457 card->discipline->complete(gdev);
bbcfcdc8
FB		 5458}
5459
5460static int qeth_core_freeze(struct ccwgroup_device *gdev)
5461{
5462 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5463 if (card->discipline && card->discipline->freeze)
5464 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5465 return 0;
5466}
5467
5468static int qeth_core_thaw(struct ccwgroup_device *gdev)
5469{
5470 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5471 if (card->discipline && card->discipline->thaw)
5472 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5473 return 0;
5474}
5475
5476static int qeth_core_restore(struct ccwgroup_device *gdev)
5477{
5478 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5479 if (card->discipline && card->discipline->restore)
5480 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5481 return 0;
5482}
5483
4a71df50 5484static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5485 .driver = {
5486 .owner = THIS_MODULE,
5487 .name = "qeth",
5488 },
b7169c51 5489 .setup = qeth_core_probe_device,
4a71df50
FB		 5490 .remove = qeth_core_remove_device,
5491 .set_online = qeth_core_set_online,
5492 .set_offline = qeth_core_set_offline,
5493 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5494 .prepare = qeth_core_prepare,
5495 .complete = qeth_core_complete,
5496 .freeze = qeth_core_freeze,
5497 .thaw = qeth_core_thaw,
5498 .restore = qeth_core_restore,
4a71df50
FB		 5499};
5500
b7169c51
SO		 5501static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5502 const char *buf, size_t count)
4a71df50
FB		 5503{
5504 int err;
4a71df50 5505
b7169c51 5506 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5507 &qeth_core_ccwgroup_driver, 3, buf);
5508
5509 return err ? err : count;
5510}
4a71df50
FB		 5511static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5512
f47e2256
SO		 5513static struct attribute *qeth_drv_attrs[] = {
5514 &driver_attr_group.attr,
5515 NULL,
5516};
5517static struct attribute_group qeth_drv_attr_group = {
5518 .attrs = qeth_drv_attrs,
5519};
5520static const struct attribute_group *qeth_drv_attr_groups[] = {
5521 &qeth_drv_attr_group,
5522 NULL,
5523};
5524
4a71df50
FB		 5525static struct {
5526 const char str[ETH_GSTRING_LEN];
5527} qeth_ethtool_stats_keys[] = {
5528/* 0 */{"rx skbs"},
5529 {"rx buffers"},
5530 {"tx skbs"},
5531 {"tx buffers"},
5532 {"tx skbs no packing"},
5533 {"tx buffers no packing"},
5534 {"tx skbs packing"},
5535 {"tx buffers packing"},
5536 {"tx sg skbs"},
5537 {"tx sg frags"},
5538/* 10 */{"rx sg skbs"},
5539 {"rx sg frags"},
5540 {"rx sg page allocs"},
5541 {"tx large kbytes"},
5542 {"tx large count"},
5543 {"tx pk state ch n->p"},
5544 {"tx pk state ch p->n"},
5545 {"tx pk watermark low"},
5546 {"tx pk watermark high"},
5547 {"queue 0 buffer usage"},
5548/* 20 */{"queue 1 buffer usage"},
5549 {"queue 2 buffer usage"},
5550 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5551 {"rx poll time"},
5552 {"rx poll count"},
4a71df50
FB		 5553 {"rx do_QDIO time"},
5554 {"rx do_QDIO count"},
5555 {"tx handler time"},
5556 {"tx handler count"},
5557 {"tx time"},
5558/* 30 */{"tx count"},
5559 {"tx do_QDIO time"},
5560 {"tx do_QDIO count"},
f61a0d05 5561 {"tx csum"},
c3b4a740 5562 {"tx lin"},
0da9581d
EL		 5563 {"cq handler count"},
5564 {"cq handler time"}
4a71df50
FB		 5565};
5566
df8b4ec8 5567int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5568{
df8b4ec8
BH		 5569 switch (stringset) {
5570 case ETH_SS_STATS:
5571 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5572 default:
5573 return -EINVAL;
5574 }
4a71df50 5575}
df8b4ec8 5576EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5577
5578void qeth_core_get_ethtool_stats(struct net_device *dev,
5579 struct ethtool_stats *stats, u64 *data)
5580{
509e2562 5581 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5582 data[0] = card->stats.rx_packets -
5583 card->perf_stats.initial_rx_packets;
5584 data[1] = card->perf_stats.bufs_rec;
5585 data[2] = card->stats.tx_packets -
5586 card->perf_stats.initial_tx_packets;
5587 data[3] = card->perf_stats.bufs_sent;
5588 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5589 - card->perf_stats.skbs_sent_pack;
5590 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5591 data[6] = card->perf_stats.skbs_sent_pack;
5592 data[7] = card->perf_stats.bufs_sent_pack;
5593 data[8] = card->perf_stats.sg_skbs_sent;
5594 data[9] = card->perf_stats.sg_frags_sent;
5595 data[10] = card->perf_stats.sg_skbs_rx;
5596 data[11] = card->perf_stats.sg_frags_rx;
5597 data[12] = card->perf_stats.sg_alloc_page_rx;
5598 data[13] = (card->perf_stats.large_send_bytes >> 10);
5599 data[14] = card->perf_stats.large_send_cnt;
5600 data[15] = card->perf_stats.sc_dp_p;
5601 data[16] = card->perf_stats.sc_p_dp;
5602 data[17] = QETH_LOW_WATERMARK_PACK;
5603 data[18] = QETH_HIGH_WATERMARK_PACK;
5604 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5605 data[20] = (card->qdio.no_out_queues > 1) ?
5606 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5607 data[21] = (card->qdio.no_out_queues > 2) ?
5608 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5609 data[22] = (card->qdio.no_out_queues > 3) ?
5610 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5611 data[23] = card->perf_stats.inbound_time;
5612 data[24] = card->perf_stats.inbound_cnt;
5613 data[25] = card->perf_stats.inbound_do_qdio_time;
5614 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5615 data[27] = card->perf_stats.outbound_handler_time;
5616 data[28] = card->perf_stats.outbound_handler_cnt;
5617 data[29] = card->perf_stats.outbound_time;
5618 data[30] = card->perf_stats.outbound_cnt;
5619 data[31] = card->perf_stats.outbound_do_qdio_time;
5620 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5621 data[33] = card->perf_stats.tx_csum;
c3b4a740 5622 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5623 data[35] = card->perf_stats.cq_cnt;
5624 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5625}
5626EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5627
5628void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5629{
5630 switch (stringset) {
5631 case ETH_SS_STATS:
5632 memcpy(data, &qeth_ethtool_stats_keys,
5633 sizeof(qeth_ethtool_stats_keys));
5634 break;
5635 default:
5636 WARN_ON(1);
5637 break;
5638 }
5639}
5640EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5641
5642void qeth_core_get_drvinfo(struct net_device *dev,
5643 struct ethtool_drvinfo *info)
5644{
509e2562 5645 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 5646
5647 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5648 sizeof(info->driver));
5649 strlcpy(info->version, "1.0", sizeof(info->version));
5650 strlcpy(info->fw_version, card->info.mcl_level,
5651 sizeof(info->fw_version));
5652 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5653 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 5654}
5655EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5656
02d5cb5b
EC		 5657/* Helper function to fill 'advertizing' and 'supported' which are the same. */
5658/* Autoneg and full-duplex are supported and advertized uncondionally. */
5659/* Always advertize and support all speeds up to specified, and only one */
5660/* specified port type. */
5661static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
5662 int maxspeed, int porttype)
5663{
5664 int port_sup, port_adv, spd_sup, spd_adv;
5665
5666 switch (porttype) {
5667 case PORT_TP:
5668 port_sup = SUPPORTED_TP;
5669 port_adv = ADVERTISED_TP;
5670 break;
5671 case PORT_FIBRE:
5672 port_sup = SUPPORTED_FIBRE;
5673 port_adv = ADVERTISED_FIBRE;
5674 break;
5675 default:
5676 port_sup = SUPPORTED_TP;
5677 port_adv = ADVERTISED_TP;
5678 WARN_ON_ONCE(1);
5679 }
5680
5681 /* "Fallthrough" case'es ordered from high to low result in setting */
5682 /* flags cumulatively, starting from the specified speed and down to */
5683 /* the lowest possible. */
5684 spd_sup = 0;
5685 spd_adv = 0;
5686 switch (maxspeed) {
5687 case SPEED_10000:
5688 spd_sup |= SUPPORTED_10000baseT_Full;
5689 spd_adv |= ADVERTISED_10000baseT_Full;
5690 case SPEED_1000:
5691 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
5692 spd_adv |= ADVERTISED_1000baseT_Half |
5693 ADVERTISED_1000baseT_Full;
5694 case SPEED_100:
5695 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
5696 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
5697 case SPEED_10:
5698 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5699 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5700 break;
5701 default:
5702 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5703 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5704 WARN_ON_ONCE(1);
5705 }
5706 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
5707 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
5708}
5709
3f9975aa
FB		 5710int qeth_core_ethtool_get_settings(struct net_device *netdev,
5711 struct ethtool_cmd *ecmd)
5712{
509e2562 5713 struct qeth_card *card = netdev->ml_priv;
3f9975aa 5714 enum qeth_link_types link_type;
02d5cb5b 5715 struct carrier_info carrier_info;
3f9975aa
FB		 5716
5717 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5718 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5719 else
5720 link_type = card->info.link_type;
5721
5722 ecmd->transceiver = XCVR_INTERNAL;
3f9975aa
FB		 5723 ecmd->duplex = DUPLEX_FULL;
5724 ecmd->autoneg = AUTONEG_ENABLE;
5725
5726 switch (link_type) {
5727 case QETH_LINK_TYPE_FAST_ETH:
5728 case QETH_LINK_TYPE_LANE_ETH100:
02d5cb5b 5729 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
3f9975aa
FB		 5730 ecmd->speed = SPEED_100;
5731 ecmd->port = PORT_TP;
5732 break;
5733
5734 case QETH_LINK_TYPE_GBIT_ETH:
5735 case QETH_LINK_TYPE_LANE_ETH1000:
02d5cb5b 5736 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
3f9975aa
FB		 5737 ecmd->speed = SPEED_1000;
5738 ecmd->port = PORT_FIBRE;
5739 break;
5740
5741 case QETH_LINK_TYPE_10GBIT_ETH:
02d5cb5b 5742 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
3f9975aa
FB		 5743 ecmd->speed = SPEED_10000;
5744 ecmd->port = PORT_FIBRE;
5745 break;
5746
5747 default:
02d5cb5b 5748 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
3f9975aa
FB		 5749 ecmd->speed = SPEED_10;
5750 ecmd->port = PORT_TP;
5751 }
5752
02d5cb5b
EC		 5753 /* Check if we can obtain more accurate information. */
5754 /* If QUERY_CARD_INFO command is not supported or fails, */
5755 /* just return the heuristics that was filled above. */
5756 if (qeth_query_card_info(card, &carrier_info) != 0)
5757 return 0;
5758
5759 netdev_dbg(netdev,
5760 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
5761 carrier_info.card_type,
5762 carrier_info.port_mode,
5763 carrier_info.port_speed);
5764
5765 /* Update attributes for which we've obtained more authoritative */
5766 /* information, leave the rest the way they where filled above. */
5767 switch (carrier_info.card_type) {
5768 case CARD_INFO_TYPE_1G_COPPER_A:
5769 case CARD_INFO_TYPE_1G_COPPER_B:
5770 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
5771 ecmd->port = PORT_TP;
5772 break;
5773 case CARD_INFO_TYPE_1G_FIBRE_A:
5774 case CARD_INFO_TYPE_1G_FIBRE_B:
5775 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
5776 ecmd->port = PORT_FIBRE;
5777 break;
5778 case CARD_INFO_TYPE_10G_FIBRE_A:
5779 case CARD_INFO_TYPE_10G_FIBRE_B:
5780 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
5781 ecmd->port = PORT_FIBRE;
5782 break;
5783 }
5784
5785 switch (carrier_info.port_mode) {
5786 case CARD_INFO_PORTM_FULLDUPLEX:
5787 ecmd->duplex = DUPLEX_FULL;
5788 break;
5789 case CARD_INFO_PORTM_HALFDUPLEX:
5790 ecmd->duplex = DUPLEX_HALF;
5791 break;
5792 }
5793
5794 switch (carrier_info.port_speed) {
5795 case CARD_INFO_PORTS_10M:
5796 ecmd->speed = SPEED_10;
5797 break;
5798 case CARD_INFO_PORTS_100M:
5799 ecmd->speed = SPEED_100;
5800 break;
5801 case CARD_INFO_PORTS_1G:
5802 ecmd->speed = SPEED_1000;
5803 break;
5804 case CARD_INFO_PORTS_10G:
5805 ecmd->speed = SPEED_10000;
5806 break;
5807 }
5808
3f9975aa
FB		 5809 return 0;
5810}
5811EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5812
4a71df50
FB		 5813static int __init qeth_core_init(void)
5814{
5815 int rc;
5816
74eacdb9 5817 pr_info("loading core functions\n");
4a71df50 5818 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 5819 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 5820 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 5821 mutex_init(&qeth_mod_mutex);
4a71df50 5822
0f54761d
SR		 5823 qeth_wq = create_singlethread_workqueue("qeth_wq");
5824
4a71df50
FB		 5825 rc = qeth_register_dbf_views();
5826 if (rc)
5827 goto out_err;
035da16f 5828 qeth_core_root_dev = root_device_register("qeth");
735e849f 5829 rc = PTR_RET(qeth_core_root_dev);
4a71df50
FB		 5830 if (rc)
5831 goto register_err;
683d718a
FB		 5832 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5833 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5834 if (!qeth_core_header_cache) {
5835 rc = -ENOMEM;
5836 goto slab_err;
5837 }
0da9581d
EL		 5838 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5839 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5840 if (!qeth_qdio_outbuf_cache) {
5841 rc = -ENOMEM;
5842 goto cqslab_err;
5843 }
afb6ac59
SO		 5844 rc = ccw_driver_register(&qeth_ccw_driver);
5845 if (rc)
5846 goto ccw_err;
5847 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5848 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5849 if (rc)
5850 goto ccwgroup_err;
0da9581d 5851
683d718a 5852 return 0;
afb6ac59
SO		 5853
5854ccwgroup_err:
5855 ccw_driver_unregister(&qeth_ccw_driver);
5856ccw_err:
5857 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 5858cqslab_err:
5859 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5860slab_err:
035da16f 5861 root_device_unregister(qeth_core_root_dev);
4a71df50 5862register_err:
4a71df50
FB		 5863 qeth_unregister_dbf_views();
5864out_err:
74eacdb9 5865 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5866 return rc;
5867}
5868
5869static void __exit qeth_core_exit(void)
5870{
819dc537 5871 qeth_clear_dbf_list();
0f54761d 5872 destroy_workqueue(qeth_wq);
4a71df50
FB		 5873 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5874 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5875 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5876 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 5877 root_device_unregister(qeth_core_root_dev);
4a71df50 5878 qeth_unregister_dbf_views();
74eacdb9 5879 pr_info("core functions removed\n");
4a71df50
FB		 5880}
5881
5882module_init(qeth_core_init);
5883module_exit(qeth_core_exit);
5884MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5885MODULE_DESCRIPTION("qeth core functions");
5886MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)