projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
s390/qeth: reduce ethtool statistics
[linux-block.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
ab9953ff 1// SPDX-License-Identifier: GPL-2.0
4a71df50 2/*
bbcfcdc8 3 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
74eacdb9
FB		 10#define KMSG_COMPONENT "qeth"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
0d55303c 13#include <linux/compat.h>
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
55494264 19#include <linux/log2.h>
4a71df50 20#include <linux/ip.h>
4a71df50
FB		 21#include <linux/tcp.h>
22#include <linux/mii.h>
23#include <linux/kthread.h>
5a0e3ad6 24#include <linux/slab.h>
6d69b1f1
JW		 25#include <linux/if_vlan.h>
26#include <linux/netdevice.h>
27#include <linux/netdev_features.h>
28#include <linux/skbuff.h>
aec45e85 29#include <linux/vmalloc.h>
6d69b1f1 30
b3332930 31#include <net/iucv/af_iucv.h>
290b8348 32#include <net/dsfield.h>
4a71df50 33
ab4227cb 34#include <asm/ebcdic.h>
2bf29df7 35#include <asm/chpid.h>
ab4227cb 36#include <asm/io.h>
1da74b1c 37#include <asm/sysinfo.h>
ec61bd2f
JW		 38#include <asm/diag.h>
39#include <asm/cio.h>
40#include <asm/ccwdev.h>
615dff22 41#include <asm/cpcmd.h>
4a71df50
FB		 42
43#include "qeth_core.h"
4a71df50 44
d11ba0c4
PT		 45struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
46 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
47 /* N P A M L V H */
48 [QETH_DBF_SETUP] = {"qeth_setup",
49 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 50 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
51 &debug_sprintf_view, NULL},
d11ba0c4
PT		 52 [QETH_DBF_CTRL] = {"qeth_control",
53 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
54};
55EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50 56
683d718a
FB		 57struct kmem_cache *qeth_core_header_cache;
58EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 59static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 60
61static struct device *qeth_core_root_dev;
4a71df50 62static struct lock_class_key qdio_out_skb_queue_key;
4a71df50 63
8f6637b8
JW		 64static void qeth_send_control_data_cb(struct qeth_card *card,
65 struct qeth_channel *channel,
66 struct qeth_cmd_buffer *iob);
4a71df50 67static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
4a71df50
FB		 68static void qeth_free_buffer_pool(struct qeth_card *);
69static int qeth_qdio_establish(struct qeth_card *);
0da9581d 70static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 71static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
72 struct qeth_qdio_out_buffer *buf,
73 enum iucv_tx_notify notification);
74static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
72861ae7 75static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 76
c0a2e4d1 77static struct workqueue_struct *qeth_wq;
0f54761d 78
511c2445
EC		 79int qeth_card_hw_is_reachable(struct qeth_card *card)
80{
81 return (card->state == CARD_STATE_SOFTSETUP) ||
82 (card->state == CARD_STATE_UP);
83}
84EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
85
0f54761d
SR		 86static void qeth_close_dev_handler(struct work_struct *work)
87{
88 struct qeth_card *card;
89
90 card = container_of(work, struct qeth_card, close_dev_work);
91 QETH_CARD_TEXT(card, 2, "cldevhdl");
92 rtnl_lock();
93 dev_close(card->dev);
94 rtnl_unlock();
95 ccwgroup_set_offline(card->gdev);
96}
97
98void qeth_close_dev(struct qeth_card *card)
99{
100 QETH_CARD_TEXT(card, 2, "cldevsubm");
101 queue_work(qeth_wq, &card->close_dev_work);
102}
103EXPORT_SYMBOL_GPL(qeth_close_dev);
104
cef6ff22 105static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 106{
107 if (card->info.guestlan) {
108 switch (card->info.type) {
5113fec0 109 case QETH_CARD_TYPE_OSD:
7096b187 110 return " Virtual NIC QDIO";
4a71df50 111 case QETH_CARD_TYPE_IQD:
7096b187 112 return " Virtual NIC Hiper";
5113fec0 113 case QETH_CARD_TYPE_OSM:
7096b187 114 return " Virtual NIC QDIO - OSM";
5113fec0 115 case QETH_CARD_TYPE_OSX:
7096b187 116 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 117 default:
118 return " unknown";
119 }
120 } else {
121 switch (card->info.type) {
5113fec0 122 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 123 return " OSD Express";
124 case QETH_CARD_TYPE_IQD:
125 return " HiperSockets";
126 case QETH_CARD_TYPE_OSN:
127 return " OSN QDIO";
5113fec0
UB		 128 case QETH_CARD_TYPE_OSM:
129 return " OSM QDIO";
130 case QETH_CARD_TYPE_OSX:
131 return " OSX QDIO";
4a71df50
FB		 132 default:
133 return " unknown";
134 }
135 }
136 return " n/a";
137}
138
139/* max length to be returned: 14 */
140const char *qeth_get_cardname_short(struct qeth_card *card)
141{
142 if (card->info.guestlan) {
143 switch (card->info.type) {
5113fec0 144 case QETH_CARD_TYPE_OSD:
7096b187 145 return "Virt.NIC QDIO";
4a71df50 146 case QETH_CARD_TYPE_IQD:
7096b187 147 return "Virt.NIC Hiper";
5113fec0 148 case QETH_CARD_TYPE_OSM:
7096b187 149 return "Virt.NIC OSM";
5113fec0 150 case QETH_CARD_TYPE_OSX:
7096b187 151 return "Virt.NIC OSX";
4a71df50
FB		 152 default:
153 return "unknown";
154 }
155 } else {
156 switch (card->info.type) {
5113fec0 157 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 158 switch (card->info.link_type) {
159 case QETH_LINK_TYPE_FAST_ETH:
160 return "OSD_100";
161 case QETH_LINK_TYPE_HSTR:
162 return "HSTR";
163 case QETH_LINK_TYPE_GBIT_ETH:
164 return "OSD_1000";
165 case QETH_LINK_TYPE_10GBIT_ETH:
166 return "OSD_10GIG";
54e049c2
JW		 167 case QETH_LINK_TYPE_25GBIT_ETH:
168 return "OSD_25GIG";
4a71df50
FB		 169 case QETH_LINK_TYPE_LANE_ETH100:
170 return "OSD_FE_LANE";
171 case QETH_LINK_TYPE_LANE_TR:
172 return "OSD_TR_LANE";
173 case QETH_LINK_TYPE_LANE_ETH1000:
174 return "OSD_GbE_LANE";
175 case QETH_LINK_TYPE_LANE:
176 return "OSD_ATM_LANE";
177 default:
178 return "OSD_Express";
179 }
180 case QETH_CARD_TYPE_IQD:
181 return "HiperSockets";
182 case QETH_CARD_TYPE_OSN:
183 return "OSN";
5113fec0
UB		 184 case QETH_CARD_TYPE_OSM:
185 return "OSM_1000";
186 case QETH_CARD_TYPE_OSX:
187 return "OSX_10GIG";
4a71df50
FB		 188 default:
189 return "unknown";
190 }
191 }
192 return "n/a";
193}
194
195void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
196 int clear_start_mask)
197{
198 unsigned long flags;
199
200 spin_lock_irqsave(&card->thread_mask_lock, flags);
201 card->thread_allowed_mask = threads;
202 if (clear_start_mask)
203 card->thread_start_mask &= threads;
204 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
205 wake_up(&card->wait_q);
206}
207EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
208
209int qeth_threads_running(struct qeth_card *card, unsigned long threads)
210{
211 unsigned long flags;
212 int rc = 0;
213
214 spin_lock_irqsave(&card->thread_mask_lock, flags);
215 rc = (card->thread_running_mask & threads);
216 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
217 return rc;
218}
219EXPORT_SYMBOL_GPL(qeth_threads_running);
220
4a71df50
FB		 221void qeth_clear_working_pool_list(struct qeth_card *card)
222{
223 struct qeth_buffer_pool_entry *pool_entry, *tmp;
224
847a50fd 225 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 226 list_for_each_entry_safe(pool_entry, tmp,
227 &card->qdio.in_buf_pool.entry_list, list){
228 list_del(&pool_entry->list);
229 }
230}
231EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
232
233static int qeth_alloc_buffer_pool(struct qeth_card *card)
234{
235 struct qeth_buffer_pool_entry *pool_entry;
236 void *ptr;
237 int i, j;
238
847a50fd 239 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 240 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 241 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 242 if (!pool_entry) {
243 qeth_free_buffer_pool(card);
244 return -ENOMEM;
245 }
246 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 247 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 248 if (!ptr) {
249 while (j > 0)
250 free_page((unsigned long)
251 pool_entry->elements[--j]);
252 kfree(pool_entry);
253 qeth_free_buffer_pool(card);
254 return -ENOMEM;
255 }
256 pool_entry->elements[j] = ptr;
257 }
258 list_add(&pool_entry->init_list,
259 &card->qdio.init_pool.entry_list);
260 }
261 return 0;
262}
263
264int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
265{
847a50fd 266 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 267
268 if ((card->state != CARD_STATE_DOWN) &&
269 (card->state != CARD_STATE_RECOVER))
270 return -EPERM;
271
272 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
273 qeth_clear_working_pool_list(card);
274 qeth_free_buffer_pool(card);
275 card->qdio.in_buf_pool.buf_count = bufcnt;
276 card->qdio.init_pool.buf_count = bufcnt;
277 return qeth_alloc_buffer_pool(card);
278}
76b11f8e 279EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 280
4601ba6c
SO		 281static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
282{
6d284bde
SO		 283 if (!q)
284 return;
285
286 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 287 kfree(q);
288}
289
290static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
291{
292 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
293 int i;
294
295 if (!q)
296 return NULL;
297
6d284bde
SO		 298 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
299 kfree(q);
300 return NULL;
301 }
302
4601ba6c 303 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 304 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 305
306 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
307 return q;
308}
309
cef6ff22 310static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 311{
312 int rc;
313
314 if (card->options.cq == QETH_CQ_ENABLED) {
315 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 316 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
317 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 318 card->qdio.c_q->next_buf_to_init = 127;
319 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
320 card->qdio.no_in_queues - 1, 0,
321 127);
322 if (rc) {
323 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
324 goto out;
325 }
326 }
327 rc = 0;
328out:
329 return rc;
330}
331
cef6ff22 332static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 333{
334 int rc;
335
336 if (card->options.cq == QETH_CQ_ENABLED) {
337 int i;
338 struct qdio_outbuf_state *outbuf_states;
339
340 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 341 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 342 if (!card->qdio.c_q) {
343 rc = -1;
344 goto kmsg_out;
345 }
0da9581d 346 card->qdio.no_in_queues = 2;
4a912f98 347 card->qdio.out_bufstates =
6396bb22
KC		 348 kcalloc(card->qdio.no_out_queues *
349 QDIO_MAX_BUFFERS_PER_Q,
350 sizeof(struct qdio_outbuf_state),
351 GFP_KERNEL);
0da9581d
EL		 352 outbuf_states = card->qdio.out_bufstates;
353 if (outbuf_states == NULL) {
354 rc = -1;
355 goto free_cq_out;
356 }
357 for (i = 0; i < card->qdio.no_out_queues; ++i) {
358 card->qdio.out_qs[i]->bufstates = outbuf_states;
359 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
360 }
361 } else {
362 QETH_DBF_TEXT(SETUP, 2, "nocq");
363 card->qdio.c_q = NULL;
364 card->qdio.no_in_queues = 1;
365 }
366 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
367 rc = 0;
368out:
369 return rc;
370free_cq_out:
4601ba6c 371 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 372 card->qdio.c_q = NULL;
373kmsg_out:
374 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
375 goto out;
376}
377
cef6ff22 378static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 379{
380 if (card->qdio.c_q) {
381 --card->qdio.no_in_queues;
4601ba6c 382 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 383 card->qdio.c_q = NULL;
384 }
385 kfree(card->qdio.out_bufstates);
386 card->qdio.out_bufstates = NULL;
387}
388
cef6ff22
JW		 389static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
390 int delayed)
391{
b3332930
FB		 392 enum iucv_tx_notify n;
393
394 switch (sbalf15) {
395 case 0:
396 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
397 break;
398 case 4:
399 case 16:
400 case 17:
401 case 18:
402 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
403 TX_NOTIFY_UNREACHABLE;
404 break;
405 default:
406 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
407 TX_NOTIFY_GENERALERROR;
408 break;
409 }
410
411 return n;
412}
413
cef6ff22
JW		 414static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
415 int forced_cleanup)
0da9581d 416{
72861ae7
EL		 417 if (q->card->options.cq != QETH_CQ_ENABLED)
418 return;
419
0da9581d
EL		 420 if (q->bufs[bidx]->next_pending != NULL) {
421 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
422 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
423
424 while (c) {
425 if (forced_cleanup ||
426 atomic_read(&c->state) ==
427 QETH_QDIO_BUF_HANDLED_DELAYED) {
428 struct qeth_qdio_out_buffer *f = c;
429 QETH_CARD_TEXT(f->q->card, 5, "fp");
430 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 431 /* release here to avoid interleaving between
432 outbound tasklet and inbound tasklet
433 regarding notifications and lifecycle */
434 qeth_release_skbs(c);
435
0da9581d 436 c = f->next_pending;
18af5c17 437 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 438 head->next_pending = c;
439 kmem_cache_free(qeth_qdio_outbuf_cache, f);
440 } else {
441 head = c;
442 c = c->next_pending;
443 }
444
445 }
446 }
72861ae7
EL		 447 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
448 QETH_QDIO_BUF_HANDLED_DELAYED)) {
449 /* for recovery situations */
72861ae7
EL		 450 qeth_init_qdio_out_buf(q, bidx);
451 QETH_CARD_TEXT(q->card, 2, "clprecov");
452 }
0da9581d
EL		 453}
454
455
cef6ff22
JW		 456static void qeth_qdio_handle_aob(struct qeth_card *card,
457 unsigned long phys_aob_addr)
458{
0da9581d
EL		 459 struct qaob *aob;
460 struct qeth_qdio_out_buffer *buffer;
b3332930 461 enum iucv_tx_notify notification;
ce28867f 462 unsigned int i;
0da9581d
EL		 463
464 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
465 QETH_CARD_TEXT(card, 5, "haob");
466 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
467 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
468 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
469
b3332930
FB		 470 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
471 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
472 notification = TX_NOTIFY_OK;
473 } else {
18af5c17
SR		 474 WARN_ON_ONCE(atomic_read(&buffer->state) !=
475 QETH_QDIO_BUF_PENDING);
b3332930
FB		 476 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
477 notification = TX_NOTIFY_DELAYED_OK;
478 }
479
480 if (aob->aorc != 0) {
481 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
482 notification = qeth_compute_cq_notification(aob->aorc, 1);
483 }
484 qeth_notify_skbs(buffer->q, buffer, notification);
485
ce28867f
JW		 486 /* Free dangling allocations. The attached skbs are handled by
487 * qeth_cleanup_handled_pending().
488 */
489 for (i = 0;
490 i < aob->sb_count && i < QETH_MAX_BUFFER_ELEMENTS(card);
491 i++) {
492 if (aob->sba[i] && buffer->is_header[i])
493 kmem_cache_free(qeth_core_header_cache,
494 (void *) aob->sba[i]);
495 }
496 atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
72861ae7 497
0da9581d
EL		 498 qdio_release_aob(aob);
499}
500
501static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
502{
503 return card->options.cq == QETH_CQ_ENABLED &&
504 card->qdio.c_q != NULL &&
505 queue != 0 &&
506 queue == card->qdio.no_in_queues - 1;
507}
508
45ca2fd6
JW		 509static void qeth_setup_ccw(struct ccw1 *ccw, u8 cmd_code, u32 len, void *data)
510{
511 ccw->cmd_code = cmd_code;
512 ccw->flags = CCW_FLAG_SLI;
513 ccw->count = len;
514 ccw->cda = (__u32) __pa(data);
515}
516
17bf8c9b 517static int __qeth_issue_next_read(struct qeth_card *card)
4a71df50 518{
750b1625 519 struct qeth_channel *channel = &card->read;
4a71df50 520 struct qeth_cmd_buffer *iob;
750b1625 521 int rc;
4a71df50 522
847a50fd 523 QETH_CARD_TEXT(card, 5, "issnxrd");
750b1625 524 if (channel->state != CH_STATE_UP)
4a71df50 525 return -EIO;
750b1625 526 iob = qeth_get_buffer(channel);
4a71df50 527 if (!iob) {
74eacdb9
FB		 528 dev_warn(&card->gdev->dev, "The qeth device driver "
529 "failed to recover an error on the device\n");
e19e5be8
JW		 530 QETH_DBF_MESSAGE(2, "issue_next_read on device %x failed: no iob available\n",
531 CARD_DEVID(card));
4a71df50
FB		 532 return -ENOMEM;
533 }
f15cdaf2 534 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
847a50fd 535 QETH_CARD_TEXT(card, 6, "noirqpnd");
f15cdaf2 536 rc = ccw_device_start(channel->ccwdev, channel->ccw,
4a71df50
FB		 537 (addr_t) iob, 0, 0);
538 if (rc) {
e19e5be8
JW		 539 QETH_DBF_MESSAGE(2, "error %i on device %x when starting next read ccw!\n",
540 rc, CARD_DEVID(card));
750b1625 541 atomic_set(&channel->irq_pending, 0);
5065b2dd 542 qeth_release_buffer(channel, iob);
908abbb5 543 card->read_or_write_problem = 1;
4a71df50
FB		 544 qeth_schedule_recovery(card);
545 wake_up(&card->wait_q);
546 }
547 return rc;
548}
549
17bf8c9b
JW		 550static int qeth_issue_next_read(struct qeth_card *card)
551{
552 int ret;
553
554 spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
555 ret = __qeth_issue_next_read(card);
556 spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
557
558 return ret;
559}
560
4a71df50
FB		 561static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
562{
563 struct qeth_reply *reply;
564
565 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
566 if (reply) {
ae695927 567 refcount_set(&reply->refcnt, 1);
4a71df50 568 atomic_set(&reply->received, 0);
0951c6ba 569 init_waitqueue_head(&reply->wait_q);
6531084c 570 }
4a71df50
FB		 571 return reply;
572}
573
574static void qeth_get_reply(struct qeth_reply *reply)
575{
ae695927 576 refcount_inc(&reply->refcnt);
4a71df50
FB		 577}
578
579static void qeth_put_reply(struct qeth_reply *reply)
580{
ae695927 581 if (refcount_dec_and_test(&reply->refcnt))
4a71df50
FB		 582 kfree(reply);
583}
584
0951c6ba
JW		 585static void qeth_enqueue_reply(struct qeth_card *card, struct qeth_reply *reply)
586{
587 spin_lock_irq(&card->lock);
588 list_add_tail(&reply->list, &card->cmd_waiter_list);
589 spin_unlock_irq(&card->lock);
590}
591
592static void qeth_dequeue_reply(struct qeth_card *card, struct qeth_reply *reply)
593{
594 spin_lock_irq(&card->lock);
595 list_del(&reply->list);
596 spin_unlock_irq(&card->lock);
597}
598
599static void qeth_notify_reply(struct qeth_reply *reply)
600{
601 atomic_inc(&reply->received);
602 wake_up(&reply->wait_q);
603}
604
d11ba0c4 605static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 606 struct qeth_card *card)
607{
048a7f8b 608 const char *ipa_name;
d11ba0c4 609 int com = cmd->hdr.command;
4a71df50 610 ipa_name = qeth_get_ipa_cmd_name(com);
e19e5be8 611
d11ba0c4 612 if (rc)
e19e5be8
JW		 613 QETH_DBF_MESSAGE(2, "IPA: %s(%#x) for device %x returned %#x \"%s\"\n",
614 ipa_name, com, CARD_DEVID(card), rc,
615 qeth_get_ipa_msg(rc));
d11ba0c4 616 else
e19e5be8
JW		 617 QETH_DBF_MESSAGE(5, "IPA: %s(%#x) for device %x succeeded\n",
618 ipa_name, com, CARD_DEVID(card));
4a71df50
FB		 619}
620
621static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
d19b93f4 622 struct qeth_ipa_cmd *cmd)
4a71df50 623{
847a50fd 624 QETH_CARD_TEXT(card, 5, "chkipad");
d19b93f4
JW		 625
626 if (IS_IPA_REPLY(cmd)) {
627 if (cmd->hdr.command != IPA_CMD_SETCCID &&
628 cmd->hdr.command != IPA_CMD_DELCCID &&
629 cmd->hdr.command != IPA_CMD_MODCCID &&
630 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
631 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
632 return cmd;
633 }
634
635 /* handle unsolicited event: */
636 switch (cmd->hdr.command) {
637 case IPA_CMD_STOPLAN:
638 if (cmd->hdr.return_code == IPA_RC_VEPA_TO_VEB_TRANSITION) {
639 dev_err(&card->gdev->dev,
640 "Interface %s is down because the adjacent port is no longer in reflective relay mode\n",
641 QETH_CARD_IFNAME(card));
642 qeth_close_dev(card);
4a71df50 643 } else {
d19b93f4
JW		 644 dev_warn(&card->gdev->dev,
645 "The link for interface %s on CHPID 0x%X failed\n",
646 QETH_CARD_IFNAME(card), card->info.chpid);
647 qeth_issue_ipa_msg(cmd, cmd->hdr.return_code, card);
91cc98f5 648 netif_carrier_off(card->dev);
4a71df50 649 }
d19b93f4
JW		 650 return NULL;
651 case IPA_CMD_STARTLAN:
652 dev_info(&card->gdev->dev,
653 "The link for %s on CHPID 0x%X has been restored\n",
654 QETH_CARD_IFNAME(card), card->info.chpid);
d19b93f4
JW		 655 if (card->info.hwtrap)
656 card->info.hwtrap = 2;
657 qeth_schedule_recovery(card);
658 return NULL;
659 case IPA_CMD_SETBRIDGEPORT_IQD:
660 case IPA_CMD_SETBRIDGEPORT_OSA:
661 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
662 if (card->discipline->control_event_handler(card, cmd))
663 return cmd;
664 return NULL;
665 case IPA_CMD_MODCCID:
666 return cmd;
667 case IPA_CMD_REGISTER_LOCAL_ADDR:
668 QETH_CARD_TEXT(card, 3, "irla");
669 return NULL;
670 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
671 QETH_CARD_TEXT(card, 3, "urla");
672 return NULL;
673 default:
674 QETH_DBF_MESSAGE(2, "Received data is IPA but not a reply!\n");
675 return cmd;
4a71df50 676 }
4a71df50
FB		 677}
678
679void qeth_clear_ipacmd_list(struct qeth_card *card)
680{
0951c6ba 681 struct qeth_reply *reply;
4a71df50
FB		 682 unsigned long flags;
683
847a50fd 684 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 685
686 spin_lock_irqsave(&card->lock, flags);
0951c6ba 687 list_for_each_entry(reply, &card->cmd_waiter_list, list) {
4a71df50 688 reply->rc = -EIO;
0951c6ba 689 qeth_notify_reply(reply);
4a71df50
FB		 690 }
691 spin_unlock_irqrestore(&card->lock, flags);
692}
693EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
694
5113fec0
UB		 695static int qeth_check_idx_response(struct qeth_card *card,
696 unsigned char *buffer)
4a71df50
FB		 697{
698 if (!buffer)
699 return 0;
700
d11ba0c4 701 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 702 if ((buffer[2] & 0xc0) == 0xc0) {
e19e5be8 703 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#04x\n",
d857e111 704 buffer[4]);
847a50fd
CO		 705 QETH_CARD_TEXT(card, 2, "ckidxres");
706 QETH_CARD_TEXT(card, 2, " idxterm");
707 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 708 if (buffer[4] == 0xf6) {
709 dev_err(&card->gdev->dev,
710 "The qeth device is not configured "
711 "for the OSI layer required by z/VM\n");
712 return -EPERM;
713 }
4a71df50
FB		 714 return -EIO;
715 }
716 return 0;
717}
718
4a71df50
FB		 719static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
720{
721 __u8 index;
722
4a71df50
FB		 723 index = channel->io_buf_no;
724 do {
725 if (channel->iob[index].state == BUF_STATE_FREE) {
726 channel->iob[index].state = BUF_STATE_LOCKED;
727 channel->io_buf_no = (channel->io_buf_no + 1) %
728 QETH_CMD_BUFFER_NO;
729 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
730 return channel->iob + index;
731 }
732 index = (index + 1) % QETH_CMD_BUFFER_NO;
733 } while (index != channel->io_buf_no);
734
735 return NULL;
736}
737
738void qeth_release_buffer(struct qeth_channel *channel,
739 struct qeth_cmd_buffer *iob)
740{
741 unsigned long flags;
742
4a71df50 743 spin_lock_irqsave(&channel->iob_lock, flags);
4a71df50
FB		 744 iob->state = BUF_STATE_FREE;
745 iob->callback = qeth_send_control_data_cb;
54daaca7
JW		 746 if (iob->reply) {
747 qeth_put_reply(iob->reply);
748 iob->reply = NULL;
749 }
4a71df50 750 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 751 wake_up(&channel->wait_q);
4a71df50
FB		 752}
753EXPORT_SYMBOL_GPL(qeth_release_buffer);
754
8f6637b8
JW		 755static void qeth_release_buffer_cb(struct qeth_card *card,
756 struct qeth_channel *channel,
757 struct qeth_cmd_buffer *iob)
758{
759 qeth_release_buffer(channel, iob);
760}
761
54daaca7
JW		 762static void qeth_cancel_cmd(struct qeth_cmd_buffer *iob, int rc)
763{
764 struct qeth_reply *reply = iob->reply;
765
766 if (reply) {
767 reply->rc = rc;
768 qeth_notify_reply(reply);
769 }
770 qeth_release_buffer(iob->channel, iob);
771}
772
4a71df50
FB		 773static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
774{
775 struct qeth_cmd_buffer *buffer = NULL;
776 unsigned long flags;
777
778 spin_lock_irqsave(&channel->iob_lock, flags);
779 buffer = __qeth_get_buffer(channel);
780 spin_unlock_irqrestore(&channel->iob_lock, flags);
781 return buffer;
782}
783
784struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
785{
786 struct qeth_cmd_buffer *buffer;
787 wait_event(channel->wait_q,
788 ((buffer = qeth_get_buffer(channel)) != NULL));
789 return buffer;
790}
791EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
792
793void qeth_clear_cmd_buffers(struct qeth_channel *channel)
794{
795 int cnt;
796
797 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
798 qeth_release_buffer(channel, &channel->iob[cnt]);
4a71df50
FB		 799 channel->io_buf_no = 0;
800}
801EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
802
8f6637b8
JW		 803static void qeth_send_control_data_cb(struct qeth_card *card,
804 struct qeth_channel *channel,
805 struct qeth_cmd_buffer *iob)
4a71df50 806{
d19b93f4 807 struct qeth_ipa_cmd *cmd = NULL;
0951c6ba
JW		 808 struct qeth_reply *reply = NULL;
809 struct qeth_reply *r;
4a71df50 810 unsigned long flags;
5113fec0 811 int rc = 0;
4a71df50 812
847a50fd 813 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 814 rc = qeth_check_idx_response(card, iob->data);
815 switch (rc) {
816 case 0:
817 break;
818 case -EIO:
4a71df50 819 qeth_clear_ipacmd_list(card);
5113fec0 820 qeth_schedule_recovery(card);
01fc3e86 821 /* fall through */
5113fec0 822 default:
4a71df50
FB		 823 goto out;
824 }
825
d19b93f4
JW		 826 if (IS_IPA(iob->data)) {
827 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
828 cmd = qeth_check_ipa_data(card, cmd);
d782d80f
JW		 829 if (!cmd)
830 goto out;
831 if (IS_OSN(card) && card->osn_info.assist_cb &&
832 cmd->hdr.command != IPA_CMD_STARTLAN) {
833 card->osn_info.assist_cb(card->dev, cmd);
834 goto out;
835 }
836 } else {
837 /* non-IPA commands should only flow during initialization */
838 if (card->state != CARD_STATE_DOWN)
839 goto out;
4a71df50
FB		 840 }
841
0951c6ba 842 /* match against pending cmd requests */
4a71df50 843 spin_lock_irqsave(&card->lock, flags);
0951c6ba
JW		 844 list_for_each_entry(r, &card->cmd_waiter_list, list) {
845 if ((r->seqno == QETH_IDX_COMMAND_SEQNO) ||
846 (cmd && (r->seqno == cmd->hdr.seqno))) {
847 reply = r;
848 /* take the object outside the lock */
4a71df50 849 qeth_get_reply(reply);
0951c6ba 850 break;
4a71df50
FB		 851 }
852 }
853 spin_unlock_irqrestore(&card->lock, flags);
0951c6ba
JW		 854
855 if (!reply)
856 goto out;
857
4b7ae122
JW		 858 if (!reply->callback) {
859 rc = 0;
860 } else {
0951c6ba
JW		 861 if (cmd) {
862 reply->offset = (u16)((char *)cmd - (char *)iob->data);
4b7ae122
JW		 863 rc = reply->callback(card, reply, (unsigned long)cmd);
864 } else {
865 rc = reply->callback(card, reply, (unsigned long)iob);
866 }
0951c6ba 867 }
0951c6ba 868
4b7ae122 869 if (rc <= 0) {
742d4d40 870 reply->rc = rc;
0951c6ba 871 qeth_notify_reply(reply);
4b7ae122
JW		 872 }
873
0951c6ba
JW		 874 qeth_put_reply(reply);
875
4a71df50
FB		 876out:
877 memcpy(&card->seqno.pdu_hdr_ack,
878 QETH_PDU_HEADER_SEQ_NO(iob->data),
879 QETH_SEQ_NO_LENGTH);
880 qeth_release_buffer(channel, iob);
881}
882
4a71df50
FB		 883static int qeth_set_thread_start_bit(struct qeth_card *card,
884 unsigned long thread)
885{
886 unsigned long flags;
887
888 spin_lock_irqsave(&card->thread_mask_lock, flags);
889 if (!(card->thread_allowed_mask & thread) ||
890 (card->thread_start_mask & thread)) {
891 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
892 return -EPERM;
893 }
894 card->thread_start_mask |= thread;
895 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
896 return 0;
897}
898
899void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
900{
901 unsigned long flags;
902
903 spin_lock_irqsave(&card->thread_mask_lock, flags);
904 card->thread_start_mask &= ~thread;
905 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
906 wake_up(&card->wait_q);
907}
908EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
909
910void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
911{
912 unsigned long flags;
913
914 spin_lock_irqsave(&card->thread_mask_lock, flags);
915 card->thread_running_mask &= ~thread;
916 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1063e432 917 wake_up_all(&card->wait_q);
4a71df50
FB		 918}
919EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
920
921static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
922{
923 unsigned long flags;
924 int rc = 0;
925
926 spin_lock_irqsave(&card->thread_mask_lock, flags);
927 if (card->thread_start_mask & thread) {
928 if ((card->thread_allowed_mask & thread) &&
929 !(card->thread_running_mask & thread)) {
930 rc = 1;
931 card->thread_start_mask &= ~thread;
932 card->thread_running_mask |= thread;
933 } else
934 rc = -EPERM;
935 }
936 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
937 return rc;
938}
939
940int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
941{
942 int rc = 0;
943
944 wait_event(card->wait_q,
945 (rc = __qeth_do_run_thread(card, thread)) >= 0);
946 return rc;
947}
948EXPORT_SYMBOL_GPL(qeth_do_run_thread);
949
950void qeth_schedule_recovery(struct qeth_card *card)
951{
847a50fd 952 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 953 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
954 schedule_work(&card->kernel_thread_starter);
955}
956EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
957
8d908eb0
JW		 958static int qeth_get_problem(struct qeth_card *card, struct ccw_device *cdev,
959 struct irb *irb)
4a71df50
FB		 960{
961 int dstat, cstat;
962 char *sense;
963
964 sense = (char *) irb->ecw;
23d805b6
PO		 965 cstat = irb->scsw.cmd.cstat;
966 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 967
968 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
969 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
970 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 971 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 972 dev_warn(&cdev->dev, "The qeth device driver "
973 "failed to recover an error on the device\n");
e19e5be8
JW		 974 QETH_DBF_MESSAGE(2, "check on channel %x with dstat=%#x, cstat=%#x\n",
975 CCW_DEVID(cdev), dstat, cstat);
4a71df50
FB		 976 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
977 16, 1, irb, 64, 1);
978 return 1;
979 }
980
981 if (dstat & DEV_STAT_UNIT_CHECK) {
982 if (sense[SENSE_RESETTING_EVENT_BYTE] &
983 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 984 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 985 return 1;
986 }
987 if (sense[SENSE_COMMAND_REJECT_BYTE] &
988 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 989 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 990 return 1;
4a71df50
FB		 991 }
992 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 993 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 994 return 1;
995 }
996 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 997 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 998 return 0;
999 }
847a50fd 1000 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1001 return 1;
1002 }
1003 return 0;
1004}
1005
54daaca7
JW		 1006static int qeth_check_irb_error(struct qeth_card *card, struct ccw_device *cdev,
1007 unsigned long intparm, struct irb *irb)
4a71df50 1008{
8d908eb0 1009 if (!IS_ERR(irb))
4a71df50
FB		 1010 return 0;
1011
1012 switch (PTR_ERR(irb)) {
1013 case -EIO:
e19e5be8
JW		 1014 QETH_DBF_MESSAGE(2, "i/o-error on channel %x\n",
1015 CCW_DEVID(cdev));
847a50fd
CO		 1016 QETH_CARD_TEXT(card, 2, "ckirberr");
1017 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
54daaca7 1018 return -EIO;
4a71df50 1019 case -ETIMEDOUT:
74eacdb9
FB		 1020 dev_warn(&cdev->dev, "A hardware operation timed out"
1021 " on the device\n");
847a50fd
CO		 1022 QETH_CARD_TEXT(card, 2, "ckirberr");
1023 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1024 if (intparm == QETH_RCD_PARM) {
e95051ff 1025 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1026 card->data.state = CH_STATE_DOWN;
1027 wake_up(&card->wait_q);
1028 }
1029 }
54daaca7 1030 return -ETIMEDOUT;
4a71df50 1031 default:
e19e5be8
JW		 1032 QETH_DBF_MESSAGE(2, "unknown error %ld on channel %x\n",
1033 PTR_ERR(irb), CCW_DEVID(cdev));
847a50fd
CO		 1034 QETH_CARD_TEXT(card, 2, "ckirberr");
1035 QETH_CARD_TEXT(card, 2, " rc???");
54daaca7 1036 return PTR_ERR(irb);
4a71df50 1037 }
4a71df50
FB		 1038}
1039
1040static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1041 struct irb *irb)
1042{
1043 int rc;
1044 int cstat, dstat;
db71bbbd 1045 struct qeth_cmd_buffer *iob = NULL;
8d908eb0 1046 struct ccwgroup_device *gdev;
4a71df50
FB		 1047 struct qeth_channel *channel;
1048 struct qeth_card *card;
4a71df50 1049
8d908eb0
JW		 1050 /* while we hold the ccwdev lock, this stays valid: */
1051 gdev = dev_get_drvdata(&cdev->dev);
1052 card = dev_get_drvdata(&gdev->dev);
4a71df50
FB		 1053 if (!card)
1054 return;
1055
847a50fd
CO		 1056 QETH_CARD_TEXT(card, 5, "irq");
1057
4a71df50
FB		 1058 if (card->read.ccwdev == cdev) {
1059 channel = &card->read;
847a50fd 1060 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1061 } else if (card->write.ccwdev == cdev) {
1062 channel = &card->write;
847a50fd 1063 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1064 } else {
1065 channel = &card->data;
847a50fd 1066 QETH_CARD_TEXT(card, 5, "data");
4a71df50 1067 }
db71bbbd
JW		 1068
1069 if (qeth_intparm_is_iob(intparm))
1070 iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1071
54daaca7
JW		 1072 rc = qeth_check_irb_error(card, cdev, intparm, irb);
1073 if (rc) {
db71bbbd
JW		 1074 /* IO was terminated, free its resources. */
1075 if (iob)
54daaca7 1076 qeth_cancel_cmd(iob, rc);
db71bbbd
JW		 1077 atomic_set(&channel->irq_pending, 0);
1078 wake_up(&card->wait_q);
1079 return;
1080 }
1081
4a71df50
FB		 1082 atomic_set(&channel->irq_pending, 0);
1083
23d805b6 1084 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1085 channel->state = CH_STATE_STOPPED;
1086
23d805b6 1087 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1088 channel->state = CH_STATE_HALTED;
1089
1090 /*let's wake up immediately on data channel*/
1091 if ((channel == &card->data) && (intparm != 0) &&
1092 (intparm != QETH_RCD_PARM))
1093 goto out;
1094
1095 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1096 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1097 /* we don't have to handle this further */
1098 intparm = 0;
1099 }
1100 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1101 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1102 /* we don't have to handle this further */
1103 intparm = 0;
1104 }
db71bbbd
JW		 1105
1106 cstat = irb->scsw.cmd.cstat;
1107 dstat = irb->scsw.cmd.dstat;
1108
4a71df50
FB		 1109 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1110 (dstat & DEV_STAT_UNIT_CHECK) ||
1111 (cstat)) {
1112 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1113 dev_warn(&channel->ccwdev->dev,
1114 "The qeth device driver failed to recover "
1115 "an error on the device\n");
e19e5be8
JW		 1116 QETH_DBF_MESSAGE(2, "sense data available on channel %x: cstat %#X dstat %#X\n",
1117 CCW_DEVID(channel->ccwdev), cstat,
1118 dstat);
4a71df50
FB		 1119 print_hex_dump(KERN_WARNING, "qeth: irb ",
1120 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1121 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1122 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1123 }
1124 if (intparm == QETH_RCD_PARM) {
1125 channel->state = CH_STATE_DOWN;
1126 goto out;
1127 }
8d908eb0 1128 rc = qeth_get_problem(card, cdev, irb);
4a71df50 1129 if (rc) {
a6c3d939 1130 card->read_or_write_problem = 1;
5065b2dd 1131 if (iob)
54daaca7 1132 qeth_cancel_cmd(iob, rc);
28a7e4c9 1133 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1134 qeth_schedule_recovery(card);
1135 goto out;
1136 }
1137 }
1138
1139 if (intparm == QETH_RCD_PARM) {
1140 channel->state = CH_STATE_RCD_DONE;
1141 goto out;
1142 }
4a71df50
FB		 1143 if (channel == &card->data)
1144 return;
1145 if (channel == &card->read &&
1146 channel->state == CH_STATE_UP)
17bf8c9b 1147 __qeth_issue_next_read(card);
4a71df50 1148
db71bbbd 1149 if (iob && iob->callback)
8f6637b8 1150 iob->callback(card, iob->channel, iob);
4a71df50 1151
4a71df50
FB		 1152out:
1153 wake_up(&card->wait_q);
1154 return;
1155}
1156
b3332930 1157static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1158 struct qeth_qdio_out_buffer *buf,
b3332930 1159 enum iucv_tx_notify notification)
4a71df50 1160{
4a71df50
FB		 1161 struct sk_buff *skb;
1162
dc149e37 1163 skb_queue_walk(&buf->skb_list, skb) {
b3332930
FB		 1164 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1165 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6a3123d0
JW		 1166 if (skb->protocol == htons(ETH_P_AF_IUCV) && skb->sk)
1167 iucv_sk(skb->sk)->sk_txnotify(skb, notification);
b3332930 1168 }
b3332930
FB		 1169}
1170
1171static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1172{
72861ae7 1173 /* release may never happen from within CQ tasklet scope */
18af5c17 1174 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1175
6a3123d0
JW		 1176 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1177 qeth_notify_skbs(buf->q, buf, TX_NOTIFY_GENERALERROR);
1178
dc149e37 1179 __skb_queue_purge(&buf->skb_list);
b3332930
FB		 1180}
1181
1182static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
3b346c18 1183 struct qeth_qdio_out_buffer *buf)
b3332930
FB		 1184{
1185 int i;
1186
1187 /* is PCI flag set on buffer? */
1188 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1189 atomic_dec(&queue->set_pci_flags_count);
1190
3b346c18
JW		 1191 qeth_release_skbs(buf);
1192
4a71df50 1193 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1194 if (buf->buffer->element[i].addr && buf->is_header[i])
1195 kmem_cache_free(qeth_core_header_cache,
1196 buf->buffer->element[i].addr);
1197 buf->is_header[i] = 0;
4a71df50 1198 }
3b346c18
JW		 1199
1200 qeth_scrub_qdio_buffer(buf->buffer,
1201 QETH_MAX_BUFFER_ELEMENTS(queue->card));
4a71df50 1202 buf->next_element_to_fill = 0;
3b346c18 1203 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
0da9581d
EL		 1204}
1205
1206static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1207{
1208 int j;
1209
1210 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1211 if (!q->bufs[j])
1212 continue;
72861ae7 1213 qeth_cleanup_handled_pending(q, j, 1);
3b346c18 1214 qeth_clear_output_buffer(q, q->bufs[j]);
0da9581d
EL		 1215 if (free) {
1216 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1217 q->bufs[j] = NULL;
1218 }
1219 }
4a71df50
FB		 1220}
1221
1222void qeth_clear_qdio_buffers(struct qeth_card *card)
1223{
0da9581d 1224 int i;
4a71df50 1225
847a50fd 1226 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1227 /* clear outbound buffers to free skbs */
0da9581d 1228 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1229 if (card->qdio.out_qs[i]) {
0da9581d 1230 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1231 }
0da9581d 1232 }
4a71df50
FB		 1233}
1234EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1235
1236static void qeth_free_buffer_pool(struct qeth_card *card)
1237{
1238 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1239 int i = 0;
4a71df50
FB		 1240 list_for_each_entry_safe(pool_entry, tmp,
1241 &card->qdio.init_pool.entry_list, init_list){
1242 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1243 free_page((unsigned long)pool_entry->elements[i]);
1244 list_del(&pool_entry->init_list);
1245 kfree(pool_entry);
1246 }
1247}
1248
4a71df50
FB		 1249static void qeth_clean_channel(struct qeth_channel *channel)
1250{
121ca39a 1251 struct ccw_device *cdev = channel->ccwdev;
4a71df50
FB		 1252 int cnt;
1253
d11ba0c4 1254 QETH_DBF_TEXT(SETUP, 2, "freech");
121ca39a
JW		 1255
1256 spin_lock_irq(get_ccwdev_lock(cdev));
1257 cdev->handler = NULL;
1258 spin_unlock_irq(get_ccwdev_lock(cdev));
1259
4a71df50
FB		 1260 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1261 kfree(channel->iob[cnt].data);
f15cdaf2 1262 kfree(channel->ccw);
4a71df50
FB		 1263}
1264
121ca39a
JW		 1265static int qeth_setup_channel(struct qeth_channel *channel, bool alloc_buffers)
1266{
1267 struct ccw_device *cdev = channel->ccwdev;
1268 int cnt;
1269
1270 QETH_DBF_TEXT(SETUP, 2, "setupch");
1271
1272 channel->ccw = kmalloc(sizeof(struct ccw1), GFP_KERNEL | GFP_DMA);
1273 if (!channel->ccw)
1274 return -ENOMEM;
1275 channel->state = CH_STATE_DOWN;
1276 atomic_set(&channel->irq_pending, 0);
1277 init_waitqueue_head(&channel->wait_q);
1278
1279 spin_lock_irq(get_ccwdev_lock(cdev));
1280 cdev->handler = qeth_irq;
1281 spin_unlock_irq(get_ccwdev_lock(cdev));
1282
1283 if (!alloc_buffers)
1284 return 0;
1285
1286 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
500abbf0
JW		 1287 channel->iob[cnt].data = kmalloc(QETH_BUFSIZE,
1288 GFP_KERNEL | GFP_DMA);
121ca39a
JW		 1289 if (channel->iob[cnt].data == NULL)
1290 break;
1291 channel->iob[cnt].state = BUF_STATE_FREE;
1292 channel->iob[cnt].channel = channel;
1293 channel->iob[cnt].callback = qeth_send_control_data_cb;
121ca39a
JW		 1294 }
1295 if (cnt < QETH_CMD_BUFFER_NO) {
1296 qeth_clean_channel(channel);
1297 return -ENOMEM;
1298 }
1299 channel->io_buf_no = 0;
1300 spin_lock_init(&channel->iob_lock);
1301
1302 return 0;
1303}
1304
725b9c04
SO		 1305static void qeth_set_single_write_queues(struct qeth_card *card)
1306{
1307 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1308 (card->qdio.no_out_queues == 4))
1309 qeth_free_qdio_buffers(card);
1310
1311 card->qdio.no_out_queues = 1;
1312 if (card->qdio.default_out_queue != 0)
1313 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1314
1315 card->qdio.default_out_queue = 0;
1316}
1317
1318static void qeth_set_multiple_write_queues(struct qeth_card *card)
1319{
1320 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1321 (card->qdio.no_out_queues == 1)) {
1322 qeth_free_qdio_buffers(card);
1323 card->qdio.default_out_queue = 2;
1324 }
1325 card->qdio.no_out_queues = 4;
1326}
1327
1328static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1329{
4a71df50 1330 struct ccw_device *ccwdev;
ded27d8d 1331 struct channel_path_desc_fmt0 *chp_dsc;
4a71df50 1332
5113fec0 1333 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1334
1335 ccwdev = card->data.ccwdev;
725b9c04
SO		 1336 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1337 if (!chp_dsc)
1338 goto out;
1339
1340 card->info.func_level = 0x4100 + chp_dsc->desc;
1341 if (card->info.type == QETH_CARD_TYPE_IQD)
1342 goto out;
1343
1344 /* CHPP field bit 6 == 1 -> single queue */
1345 if ((chp_dsc->chpp & 0x02) == 0x02)
1346 qeth_set_single_write_queues(card);
1347 else
1348 qeth_set_multiple_write_queues(card);
1349out:
1350 kfree(chp_dsc);
5113fec0
UB		 1351 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1352 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1353}
1354
1355static void qeth_init_qdio_info(struct qeth_card *card)
1356{
d11ba0c4 1357 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50 1358 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
95f4d8b7
JW		 1359 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1360 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1361 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1362
4a71df50 1363 /* inbound */
ed2e93ef 1364 card->qdio.no_in_queues = 1;
4a71df50 1365 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1366 if (card->info.type == QETH_CARD_TYPE_IQD)
1367 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1368 else
1369 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1370 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1371 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1372 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1373}
1374
95f4d8b7 1375static void qeth_set_initial_options(struct qeth_card *card)
4a71df50
FB		 1376{
1377 card->options.route4.type = NO_ROUTER;
1378 card->options.route6.type = NO_ROUTER;
4a71df50 1379 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1380 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1381 card->options.cq = QETH_CQ_DISABLED;
4fda3354 1382 card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
4a71df50
FB		 1383}
1384
1385static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1386{
1387 unsigned long flags;
1388 int rc = 0;
1389
1390 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1391 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1392 (u8) card->thread_start_mask,
1393 (u8) card->thread_allowed_mask,
1394 (u8) card->thread_running_mask);
1395 rc = (card->thread_start_mask & thread);
1396 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1397 return rc;
1398}
1399
1400static void qeth_start_kernel_thread(struct work_struct *work)
1401{
3f36b890 1402 struct task_struct *ts;
4a71df50
FB		 1403 struct qeth_card *card = container_of(work, struct qeth_card,
1404 kernel_thread_starter);
847a50fd 1405 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1406
1407 if (card->read.state != CH_STATE_UP &&
1408 card->write.state != CH_STATE_UP)
1409 return;
3f36b890 1410 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1411 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1412 "qeth_recover");
3f36b890
FB		 1413 if (IS_ERR(ts)) {
1414 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1415 qeth_clear_thread_running_bit(card,
1416 QETH_RECOVER_THREAD);
1417 }
1418 }
4a71df50
FB		 1419}
1420
bca51650 1421static void qeth_buffer_reclaim_work(struct work_struct *);
95f4d8b7 1422static void qeth_setup_card(struct qeth_card *card)
4a71df50 1423{
d11ba0c4
PT		 1424 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1425 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50 1426
95f4d8b7 1427 card->info.type = CARD_RDEV(card)->id.driver_info;
4a71df50 1428 card->state = CARD_STATE_DOWN;
4a71df50 1429 spin_lock_init(&card->mclock);
4a71df50
FB		 1430 spin_lock_init(&card->lock);
1431 spin_lock_init(&card->ip_lock);
1432 spin_lock_init(&card->thread_mask_lock);
c4949f07 1433 mutex_init(&card->conf_mutex);
9dc48ccc 1434 mutex_init(&card->discipline_mutex);
4a71df50 1435 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1436 INIT_LIST_HEAD(&card->cmd_waiter_list);
1437 init_waitqueue_head(&card->wait_q);
95f4d8b7 1438 qeth_set_initial_options(card);
4a71df50
FB		 1439 /* IP address takeover */
1440 INIT_LIST_HEAD(&card->ipato.entries);
4a71df50 1441 qeth_init_qdio_info(card);
b3332930 1442 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1443 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1444}
1445
6bcac508
MS		 1446static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1447{
1448 struct qeth_card *card = container_of(slr, struct qeth_card,
1449 qeth_service_level);
0d788c7d
KDW		 1450 if (card->info.mcl_level[0])
1451 seq_printf(m, "qeth: %s firmware level %s\n",
1452 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1453}
1454
121ca39a 1455static struct qeth_card *qeth_alloc_card(struct ccwgroup_device *gdev)
4a71df50
FB		 1456{
1457 struct qeth_card *card;
1458
d11ba0c4 1459 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
f15cdaf2 1460 card = kzalloc(sizeof(*card), GFP_KERNEL);
4a71df50 1461 if (!card)
76b11f8e 1462 goto out;
d11ba0c4 1463 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
121ca39a
JW		 1464
1465 card->gdev = gdev;
a2eb0ad5 1466 dev_set_drvdata(&gdev->dev, card);
121ca39a
JW		 1467 CARD_RDEV(card) = gdev->cdev[0];
1468 CARD_WDEV(card) = gdev->cdev[1];
1469 CARD_DDEV(card) = gdev->cdev[2];
c0a2e4d1
JW		 1470
1471 card->event_wq = alloc_ordered_workqueue("%s", 0, dev_name(&gdev->dev));
1472 if (!card->event_wq)
1473 goto out_wq;
24142fd8 1474 if (qeth_setup_channel(&card->read, true))
76b11f8e 1475 goto out_ip;
24142fd8 1476 if (qeth_setup_channel(&card->write, true))
76b11f8e 1477 goto out_channel;
24142fd8
JW		 1478 if (qeth_setup_channel(&card->data, false))
1479 goto out_data;
6bcac508
MS		 1480 card->qeth_service_level.seq_print = qeth_core_sl_print;
1481 register_service_level(&card->qeth_service_level);
4a71df50 1482 return card;
76b11f8e 1483
24142fd8
JW		 1484out_data:
1485 qeth_clean_channel(&card->write);
76b11f8e
UB		 1486out_channel:
1487 qeth_clean_channel(&card->read);
1488out_ip:
c0a2e4d1
JW		 1489 destroy_workqueue(card->event_wq);
1490out_wq:
a2eb0ad5 1491 dev_set_drvdata(&gdev->dev, NULL);
76b11f8e
UB		 1492 kfree(card);
1493out:
1494 return NULL;
4a71df50
FB		 1495}
1496
8d908eb0
JW		 1497static int qeth_clear_channel(struct qeth_card *card,
1498 struct qeth_channel *channel)
4a71df50 1499{
4a71df50
FB		 1500 int rc;
1501
847a50fd 1502 QETH_CARD_TEXT(card, 3, "clearch");
ed47155b 1503 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 1504 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
ed47155b 1505 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1506
1507 if (rc)
1508 return rc;
1509 rc = wait_event_interruptible_timeout(card->wait_q,
1510 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1511 if (rc == -ERESTARTSYS)
1512 return rc;
1513 if (channel->state != CH_STATE_STOPPED)
1514 return -ETIME;
1515 channel->state = CH_STATE_DOWN;
1516 return 0;
1517}
1518
8d908eb0
JW		 1519static int qeth_halt_channel(struct qeth_card *card,
1520 struct qeth_channel *channel)
4a71df50 1521{
4a71df50
FB		 1522 int rc;
1523
847a50fd 1524 QETH_CARD_TEXT(card, 3, "haltch");
ed47155b 1525 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 1526 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
ed47155b 1527 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1528
1529 if (rc)
1530 return rc;
1531 rc = wait_event_interruptible_timeout(card->wait_q,
1532 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1533 if (rc == -ERESTARTSYS)
1534 return rc;
1535 if (channel->state != CH_STATE_HALTED)
1536 return -ETIME;
1537 return 0;
1538}
1539
1540static int qeth_halt_channels(struct qeth_card *card)
1541{
1542 int rc1 = 0, rc2 = 0, rc3 = 0;
1543
847a50fd 1544 QETH_CARD_TEXT(card, 3, "haltchs");
8d908eb0
JW		 1545 rc1 = qeth_halt_channel(card, &card->read);
1546 rc2 = qeth_halt_channel(card, &card->write);
1547 rc3 = qeth_halt_channel(card, &card->data);
4a71df50
FB		 1548 if (rc1)
1549 return rc1;
1550 if (rc2)
1551 return rc2;
1552 return rc3;
1553}
1554
1555static int qeth_clear_channels(struct qeth_card *card)
1556{
1557 int rc1 = 0, rc2 = 0, rc3 = 0;
1558
847a50fd 1559 QETH_CARD_TEXT(card, 3, "clearchs");
8d908eb0
JW		 1560 rc1 = qeth_clear_channel(card, &card->read);
1561 rc2 = qeth_clear_channel(card, &card->write);
1562 rc3 = qeth_clear_channel(card, &card->data);
4a71df50
FB		 1563 if (rc1)
1564 return rc1;
1565 if (rc2)
1566 return rc2;
1567 return rc3;
1568}
1569
1570static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1571{
1572 int rc = 0;
1573
847a50fd 1574 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1575
1576 if (halt)
1577 rc = qeth_halt_channels(card);
1578 if (rc)
1579 return rc;
1580 return qeth_clear_channels(card);
1581}
1582
1583int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1584{
1585 int rc = 0;
1586
847a50fd 1587 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1588 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1589 QETH_QDIO_CLEANING)) {
1590 case QETH_QDIO_ESTABLISHED:
1591 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1592 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1593 QDIO_FLAG_CLEANUP_USING_HALT);
1594 else
cc961d40 1595 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1596 QDIO_FLAG_CLEANUP_USING_CLEAR);
1597 if (rc)
847a50fd 1598 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1599 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1600 break;
1601 case QETH_QDIO_CLEANING:
1602 return rc;
1603 default:
1604 break;
1605 }
1606 rc = qeth_clear_halt_card(card, use_halt);
1607 if (rc)
847a50fd 1608 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1609 card->state = CARD_STATE_DOWN;
1610 return rc;
1611}
1612EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1613
1614static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1615 int *length)
1616{
1617 struct ciw *ciw;
1618 char *rcd_buf;
1619 int ret;
1620 struct qeth_channel *channel = &card->data;
4a71df50
FB		 1621
1622 /*
1623 * scan for RCD command in extended SenseID data
1624 */
1625 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1626 if (!ciw || ciw->cmd == 0)
1627 return -EOPNOTSUPP;
1628 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1629 if (!rcd_buf)
1630 return -ENOMEM;
1631
f15cdaf2 1632 qeth_setup_ccw(channel->ccw, ciw->cmd, ciw->count, rcd_buf);
4a71df50 1633 channel->state = CH_STATE_RCD;
ed47155b 1634 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1635 ret = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
4a71df50
FB		 1636 QETH_RCD_PARM, LPM_ANYPATH, 0,
1637 QETH_RCD_TIMEOUT);
ed47155b 1638 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1639 if (!ret)
1640 wait_event(card->wait_q,
1641 (channel->state == CH_STATE_RCD_DONE ||
1642 channel->state == CH_STATE_DOWN));
1643 if (channel->state == CH_STATE_DOWN)
1644 ret = -EIO;
1645 else
1646 channel->state = CH_STATE_DOWN;
1647 if (ret) {
1648 kfree(rcd_buf);
1649 *buffer = NULL;
1650 *length = 0;
1651 } else {
1652 *length = ciw->count;
1653 *buffer = rcd_buf;
1654 }
1655 return ret;
1656}
1657
a60389ab 1658static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1659{
a60389ab 1660 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1661 card->info.chpid = prcd[30];
1662 card->info.unit_addr2 = prcd[31];
1663 card->info.cula = prcd[63];
1664 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1665 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1666}
1667
615dff22
JW		 1668static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
1669{
1670 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1671 struct diag26c_vnic_resp *response = NULL;
1672 struct diag26c_vnic_req *request = NULL;
1673 struct ccw_dev_id id;
1674 char userid[80];
1675 int rc = 0;
1676
1677 QETH_DBF_TEXT(SETUP, 2, "vmlayer");
1678
1679 cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
1680 if (rc)
1681 goto out;
1682
1683 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
1684 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
1685 if (!request || !response) {
1686 rc = -ENOMEM;
1687 goto out;
1688 }
1689
1690 ccw_device_get_id(CARD_RDEV(card), &id);
1691 request->resp_buf_len = sizeof(*response);
1692 request->resp_version = DIAG26C_VERSION6_VM65918;
1693 request->req_format = DIAG26C_VNIC_INFO;
1694 ASCEBC(userid, 8);
1695 memcpy(&request->sys_name, userid, 8);
1696 request->devno = id.devno;
1697
1698 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1699 rc = diag26c(request, response, DIAG26C_PORT_VNIC);
1700 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
1701 if (rc)
1702 goto out;
1703 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
1704
1705 if (request->resp_buf_len < sizeof(*response) ||
1706 response->version != request->resp_version) {
1707 rc = -EIO;
1708 goto out;
1709 }
1710
1711 if (response->protocol == VNIC_INFO_PROT_L2)
1712 disc = QETH_DISCIPLINE_LAYER2;
1713 else if (response->protocol == VNIC_INFO_PROT_L3)
1714 disc = QETH_DISCIPLINE_LAYER3;
1715
1716out:
1717 kfree(response);
1718 kfree(request);
1719 if (rc)
1720 QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
1721 return disc;
1722}
1723
c70eb09d
JW		 1724/* Determine whether the device requires a specific layer discipline */
1725static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1726{
615dff22
JW		 1727 enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
1728
c70eb09d 1729 if (card->info.type == QETH_CARD_TYPE_OSM ||
615dff22
JW		 1730 card->info.type == QETH_CARD_TYPE_OSN)
1731 disc = QETH_DISCIPLINE_LAYER2;
1732 else if (card->info.guestlan)
1733 disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
1734 QETH_DISCIPLINE_LAYER3 :
1735 qeth_vm_detect_layer(card);
1736
1737 switch (disc) {
1738 case QETH_DISCIPLINE_LAYER2:
c70eb09d 1739 QETH_DBF_TEXT(SETUP, 3, "force l2");
615dff22
JW		 1740 break;
1741 case QETH_DISCIPLINE_LAYER3:
c70eb09d 1742 QETH_DBF_TEXT(SETUP, 3, "force l3");
615dff22
JW		 1743 break;
1744 default:
1745 QETH_DBF_TEXT(SETUP, 3, "force no");
c70eb09d
JW		 1746 }
1747
615dff22 1748 return disc;
c70eb09d
JW		 1749}
1750
a60389ab
EL		 1751static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1752{
1753 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1754
e6e056ba 1755 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1756 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1757 card->info.blkt.time_total = 0;
1758 card->info.blkt.inter_packet = 0;
1759 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1760 } else {
1761 card->info.blkt.time_total = 250;
1762 card->info.blkt.inter_packet = 5;
1763 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1764 }
4a71df50
FB		 1765}
1766
1767static void qeth_init_tokens(struct qeth_card *card)
1768{
1769 card->token.issuer_rm_w = 0x00010103UL;
1770 card->token.cm_filter_w = 0x00010108UL;
1771 card->token.cm_connection_w = 0x0001010aUL;
1772 card->token.ulp_filter_w = 0x0001010bUL;
1773 card->token.ulp_connection_w = 0x0001010dUL;
1774}
1775
1776static void qeth_init_func_level(struct qeth_card *card)
1777{
5113fec0
UB		 1778 switch (card->info.type) {
1779 case QETH_CARD_TYPE_IQD:
6298263a 1780 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1781 break;
1782 case QETH_CARD_TYPE_OSD:
0132951e 1783 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1784 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1785 break;
1786 default:
1787 break;
4a71df50
FB		 1788 }
1789}
1790
8d908eb0
JW		 1791static int qeth_idx_activate_get_answer(struct qeth_card *card,
1792 struct qeth_channel *channel,
8f6637b8
JW		 1793 void (*reply_cb)(struct qeth_card *,
1794 struct qeth_channel *,
1795 struct qeth_cmd_buffer *))
4a71df50
FB		 1796{
1797 struct qeth_cmd_buffer *iob;
4a71df50 1798 int rc;
4a71df50 1799
d11ba0c4 1800 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50 1801 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1802 if (!iob)
1803 return -ENOMEM;
8f6637b8 1804 iob->callback = reply_cb;
f15cdaf2 1805 qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
4a71df50
FB		 1806
1807 wait_event(card->wait_q,
1808 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1809 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
ed47155b 1810 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1811 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 1812 (addr_t) iob, 0, 0, QETH_TIMEOUT);
ed47155b 1813 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1814
1815 if (rc) {
14cc21b6 1816 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1817 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50 1818 atomic_set(&channel->irq_pending, 0);
5065b2dd 1819 qeth_release_buffer(channel, iob);
4a71df50
FB		 1820 wake_up(&card->wait_q);
1821 return rc;
1822 }
1823 rc = wait_event_interruptible_timeout(card->wait_q,
1824 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1825 if (rc == -ERESTARTSYS)
1826 return rc;
1827 if (channel->state != CH_STATE_UP) {
1828 rc = -ETIME;
d11ba0c4 1829 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1830 } else
1831 rc = 0;
1832 return rc;
1833}
1834
8d908eb0
JW		 1835static int qeth_idx_activate_channel(struct qeth_card *card,
1836 struct qeth_channel *channel,
8f6637b8
JW		 1837 void (*reply_cb)(struct qeth_card *,
1838 struct qeth_channel *,
1839 struct qeth_cmd_buffer *))
4a71df50 1840{
4a71df50 1841 struct qeth_cmd_buffer *iob;
4a71df50
FB		 1842 __u16 temp;
1843 __u8 tmp;
1844 int rc;
f06f6f32 1845 struct ccw_dev_id temp_devid;
4a71df50 1846
d11ba0c4 1847 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1848
1849 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1850 if (!iob)
1851 return -ENOMEM;
8f6637b8 1852 iob->callback = reply_cb;
f15cdaf2 1853 qeth_setup_ccw(channel->ccw, CCW_CMD_WRITE, IDX_ACTIVATE_SIZE,
45ca2fd6 1854 iob->data);
4a71df50
FB		 1855 if (channel == &card->write) {
1856 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1857 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1858 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1859 card->seqno.trans_hdr++;
1860 } else {
1861 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1862 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1863 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1864 }
92d27209 1865 tmp = ((u8)card->dev->dev_port) | 0x80;
4a71df50
FB		 1866 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1867 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1868 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1869 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1870 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1871 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1872 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1873 temp = (card->info.cula << 8) + card->info.unit_addr2;
1874 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1875
1876 wait_event(card->wait_q,
1877 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1878 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
ed47155b 1879 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 1880 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 1881 (addr_t) iob, 0, 0, QETH_TIMEOUT);
ed47155b 1882 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50
FB		 1883
1884 if (rc) {
14cc21b6
FB		 1885 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1886 rc);
d11ba0c4 1887 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50 1888 atomic_set(&channel->irq_pending, 0);
5065b2dd 1889 qeth_release_buffer(channel, iob);
4a71df50
FB		 1890 wake_up(&card->wait_q);
1891 return rc;
1892 }
1893 rc = wait_event_interruptible_timeout(card->wait_q,
1894 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1895 if (rc == -ERESTARTSYS)
1896 return rc;
1897 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1898 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1899 " failed to recover an error on the device\n");
e19e5be8
JW		 1900 QETH_DBF_MESSAGE(2, "IDX activate timed out on channel %x\n",
1901 CCW_DEVID(channel->ccwdev));
d11ba0c4 1902 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1903 return -ETIME;
1904 }
8d908eb0 1905 return qeth_idx_activate_get_answer(card, channel, reply_cb);
4a71df50
FB		 1906}
1907
1908static int qeth_peer_func_level(int level)
1909{
1910 if ((level & 0xff) == 8)
1911 return (level & 0xff) + 0x400;
1912 if (((level >> 8) & 3) == 1)
1913 return (level & 0xff) + 0x200;
1914 return level;
1915}
1916
8f6637b8
JW		 1917static void qeth_idx_write_cb(struct qeth_card *card,
1918 struct qeth_channel *channel,
1919 struct qeth_cmd_buffer *iob)
4a71df50 1920{
4a71df50
FB		 1921 __u16 temp;
1922
d11ba0c4 1923 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1924
1925 if (channel->state == CH_STATE_DOWN) {
1926 channel->state = CH_STATE_ACTIVATING;
1927 goto out;
1928 }
4a71df50
FB		 1929
1930 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1931 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
750b1625 1932 dev_err(&channel->ccwdev->dev,
74eacdb9
FB		 1933 "The adapter is used exclusively by another "
1934 "host\n");
4a71df50 1935 else
e19e5be8
JW		 1936 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: negative reply\n",
1937 CCW_DEVID(channel->ccwdev));
4a71df50
FB		 1938 goto out;
1939 }
1940 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1941 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
e19e5be8
JW		 1942 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: function level mismatch (sent: %#x, received: %#x)\n",
1943 CCW_DEVID(channel->ccwdev),
1944 card->info.func_level, temp);
4a71df50
FB		 1945 goto out;
1946 }
1947 channel->state = CH_STATE_UP;
1948out:
1949 qeth_release_buffer(channel, iob);
1950}
1951
8f6637b8
JW		 1952static void qeth_idx_read_cb(struct qeth_card *card,
1953 struct qeth_channel *channel,
1954 struct qeth_cmd_buffer *iob)
4a71df50 1955{
4a71df50
FB		 1956 __u16 temp;
1957
d11ba0c4 1958 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1959 if (channel->state == CH_STATE_DOWN) {
1960 channel->state = CH_STATE_ACTIVATING;
1961 goto out;
1962 }
1963
5113fec0 1964 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1965 goto out;
1966
1967 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1968 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1969 case QETH_IDX_ACT_ERR_EXCL:
750b1625 1970 dev_err(&channel->ccwdev->dev,
74eacdb9
FB		 1971 "The adapter is used exclusively by another "
1972 "host\n");
5113fec0
UB		 1973 break;
1974 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1975 case QETH_IDX_ACT_ERR_AUTH_USER:
750b1625 1976 dev_err(&channel->ccwdev->dev,
5113fec0 1977 "Setting the device online failed because of "
01fc3e86 1978 "insufficient authorization\n");
5113fec0
UB		 1979 break;
1980 default:
e19e5be8
JW		 1981 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: negative reply\n",
1982 CCW_DEVID(channel->ccwdev));
5113fec0 1983 }
01fc3e86
UB		 1984 QETH_CARD_TEXT_(card, 2, "idxread%c",
1985 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1986 goto out;
1987 }
1988
4a71df50
FB		 1989 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1990 if (temp != qeth_peer_func_level(card->info.func_level)) {
e19e5be8
JW		 1991 QETH_DBF_MESSAGE(2, "IDX_ACTIVATE on channel %x: function level mismatch (sent: %#x, received: %#x)\n",
1992 CCW_DEVID(channel->ccwdev),
1993 card->info.func_level, temp);
4a71df50
FB		 1994 goto out;
1995 }
1996 memcpy(&card->token.issuer_rm_r,
1997 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1998 QETH_MPC_TOKEN_LENGTH);
1999 memcpy(&card->info.mcl_level[0],
2000 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2001 channel->state = CH_STATE_UP;
2002out:
2003 qeth_release_buffer(channel, iob);
2004}
2005
2006void qeth_prepare_control_data(struct qeth_card *card, int len,
2007 struct qeth_cmd_buffer *iob)
2008{
f15cdaf2 2009 qeth_setup_ccw(iob->channel->ccw, CCW_CMD_WRITE, len, iob->data);
8f6637b8 2010 iob->callback = qeth_release_buffer_cb;
4a71df50
FB		 2011
2012 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2013 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2014 card->seqno.trans_hdr++;
2015 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2016 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2017 card->seqno.pdu_hdr++;
2018 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2019 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
51581fd0 2020 QETH_DBF_HEX(CTRL, 2, iob->data, min(len, QETH_DBF_CTRL_LEN));
4a71df50
FB		 2021}
2022EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2023
efbbc1d5
EC		 2024/**
2025 * qeth_send_control_data() - send control command to the card
2026 * @card: qeth_card structure pointer
2027 * @len: size of the command buffer
2028 * @iob: qeth_cmd_buffer pointer
2029 * @reply_cb: callback function pointer
2030 * @cb_card: pointer to the qeth_card structure
2031 * @cb_reply: pointer to the qeth_reply structure
2032 * @cb_cmd: pointer to the original iob for non-IPA
2033 * commands, or to the qeth_ipa_cmd structure
2034 * for the IPA commands.
2035 * @reply_param: private pointer passed to the callback
2036 *
efbbc1d5
EC		 2037 * Callback function gets called one or more times, with cb_cmd
2038 * pointing to the response returned by the hardware. Callback
742d4d40
JW		 2039 * function must return
2040 * > 0 if more reply blocks are expected,
2041 * 0 if the last or only reply block is received, and
2042 * < 0 on error.
2043 * Callback function can get the value of the reply_param pointer from the
efbbc1d5
EC		 2044 * field 'param' of the structure qeth_reply.
2045 */
2046
84dbea46
JW		 2047static int qeth_send_control_data(struct qeth_card *card, int len,
2048 struct qeth_cmd_buffer *iob,
2049 int (*reply_cb)(struct qeth_card *cb_card,
2050 struct qeth_reply *cb_reply,
2051 unsigned long cb_cmd),
2052 void *reply_param)
4a71df50 2053{
750b1625 2054 struct qeth_channel *channel = iob->channel;
4a71df50 2055 int rc;
4a71df50 2056 struct qeth_reply *reply = NULL;
7834cd5a 2057 unsigned long timeout, event_timeout;
1c5b2216 2058 struct qeth_ipa_cmd *cmd = NULL;
4a71df50 2059
847a50fd 2060 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2061
908abbb5 2062 if (card->read_or_write_problem) {
750b1625 2063 qeth_release_buffer(channel, iob);
908abbb5
UB		 2064 return -EIO;
2065 }
4a71df50
FB		 2066 reply = qeth_alloc_reply(card);
2067 if (!reply) {
5065b2dd 2068 qeth_release_buffer(channel, iob);
4a71df50
FB		 2069 return -ENOMEM;
2070 }
2071 reply->callback = reply_cb;
2072 reply->param = reply_param;
d22ffb5a 2073
54daaca7
JW		 2074 /* pairs with qeth_release_buffer(): */
2075 qeth_get_reply(reply);
2076 iob->reply = reply;
2077
750b1625 2078 while (atomic_cmpxchg(&channel->irq_pending, 0, 1)) ;
4a71df50 2079
1c5b2216
JW		 2080 if (IS_IPA(iob->data)) {
2081 cmd = __ipa_cmd(iob);
d22ffb5a
JW		 2082 cmd->hdr.seqno = card->seqno.ipa++;
2083 reply->seqno = cmd->hdr.seqno;
7834cd5a 2084 event_timeout = QETH_IPA_TIMEOUT;
1c5b2216 2085 } else {
d22ffb5a 2086 reply->seqno = QETH_IDX_COMMAND_SEQNO;
7834cd5a 2087 event_timeout = QETH_TIMEOUT;
1c5b2216 2088 }
d22ffb5a
JW		 2089 qeth_prepare_control_data(card, len, iob);
2090
0951c6ba 2091 qeth_enqueue_reply(card, reply);
1c5b2216 2092
7834cd5a 2093 timeout = jiffies + event_timeout;
4a71df50 2094
847a50fd 2095 QETH_CARD_TEXT(card, 6, "noirqpnd");
ed47155b 2096 spin_lock_irq(get_ccwdev_lock(channel->ccwdev));
f15cdaf2 2097 rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
db71bbbd 2098 (addr_t) iob, 0, 0, event_timeout);
ed47155b 2099 spin_unlock_irq(get_ccwdev_lock(channel->ccwdev));
4a71df50 2100 if (rc) {
e19e5be8
JW		 2101 QETH_DBF_MESSAGE(2, "qeth_send_control_data on device %x: ccw_device_start rc = %i\n",
2102 CARD_DEVID(card), rc);
847a50fd 2103 QETH_CARD_TEXT_(card, 2, " err%d", rc);
0951c6ba 2104 qeth_dequeue_reply(card, reply);
4a71df50 2105 qeth_put_reply(reply);
750b1625
JW		 2106 qeth_release_buffer(channel, iob);
2107 atomic_set(&channel->irq_pending, 0);
4a71df50
FB		 2108 wake_up(&card->wait_q);
2109 return rc;
2110 }
5b54e16f
FB		 2111
2112 /* we have only one long running ipassist, since we can ensure
2113 process context of this command we can sleep */
1c5b2216
JW		 2114 if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
2115 cmd->hdr.prot_version == QETH_PROT_IPV4) {
5b54e16f 2116 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2117 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2118 goto time_err;
2119 } else {
2120 while (!atomic_read(&reply->received)) {
2121 if (time_after(jiffies, timeout))
2122 goto time_err;
2123 cpu_relax();
6531084c 2124 }
5b54e16f
FB		 2125 }
2126
0951c6ba 2127 qeth_dequeue_reply(card, reply);
5b54e16f
FB		 2128 rc = reply->rc;
2129 qeth_put_reply(reply);
2130 return rc;
2131
2132time_err:
0951c6ba 2133 qeth_dequeue_reply(card, reply);
4a71df50 2134 qeth_put_reply(reply);
0951c6ba 2135 return -ETIME;
4a71df50 2136}
4a71df50
FB		 2137
2138static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2139 unsigned long data)
2140{
2141 struct qeth_cmd_buffer *iob;
2142
d11ba0c4 2143 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2144
2145 iob = (struct qeth_cmd_buffer *) data;
2146 memcpy(&card->token.cm_filter_r,
2147 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2148 QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2149 return 0;
2150}
2151
2152static int qeth_cm_enable(struct qeth_card *card)
2153{
2154 int rc;
2155 struct qeth_cmd_buffer *iob;
2156
d11ba0c4 2157 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2158
2159 iob = qeth_wait_for_buffer(&card->write);
2160 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2161 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2162 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2163 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2164 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2165
2166 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2167 qeth_cm_enable_cb, NULL);
2168 return rc;
2169}
2170
2171static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2172 unsigned long data)
2173{
4a71df50
FB		 2174 struct qeth_cmd_buffer *iob;
2175
d11ba0c4 2176 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2177
2178 iob = (struct qeth_cmd_buffer *) data;
2179 memcpy(&card->token.cm_connection_r,
2180 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2181 QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2182 return 0;
2183}
2184
2185static int qeth_cm_setup(struct qeth_card *card)
2186{
2187 int rc;
2188 struct qeth_cmd_buffer *iob;
2189
d11ba0c4 2190 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2191
2192 iob = qeth_wait_for_buffer(&card->write);
2193 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2194 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2195 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2196 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2197 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2198 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2199 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2200 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2201 qeth_cm_setup_cb, NULL);
2202 return rc;
4a71df50
FB		 2203}
2204
8ce7a9e0 2205static int qeth_update_max_mtu(struct qeth_card *card, unsigned int max_mtu)
4a71df50 2206{
8ce7a9e0
JW		 2207 struct net_device *dev = card->dev;
2208 unsigned int new_mtu;
2209
2210 if (!max_mtu) {
2211 /* IQD needs accurate max MTU to set up its RX buffers: */
2212 if (IS_IQD(card))
2213 return -EINVAL;
2214 /* tolerate quirky HW: */
2215 max_mtu = ETH_MAX_MTU;
2216 }
2217
2218 rtnl_lock();
2219 if (IS_IQD(card)) {
2220 /* move any device with default MTU to new max MTU: */
2221 new_mtu = (dev->mtu == dev->max_mtu) ? max_mtu : dev->mtu;
2222
2223 /* adjust RX buffer size to new max MTU: */
2224 card->qdio.in_buf_size = max_mtu + 2 * PAGE_SIZE;
2225 if (dev->max_mtu && dev->max_mtu != max_mtu)
2226 qeth_free_qdio_buffers(card);
2227 } else {
2228 if (dev->mtu)
2229 new_mtu = dev->mtu;
2230 /* default MTUs for first setup: */
4fda3354 2231 else if (IS_LAYER2(card))
8ce7a9e0
JW		 2232 new_mtu = ETH_DATA_LEN;
2233 else
2234 new_mtu = ETH_DATA_LEN - 8; /* allow for LLC + SNAP */
4a71df50 2235 }
8ce7a9e0
JW		 2236
2237 dev->max_mtu = max_mtu;
2238 dev->mtu = min(new_mtu, max_mtu);
2239 rtnl_unlock();
2240 return 0;
4a71df50
FB		 2241}
2242
cef6ff22 2243static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2244{
2245 switch (framesize) {
2246 case 0x4000:
2247 return 8192;
2248 case 0x6000:
2249 return 16384;
2250 case 0xa000:
2251 return 32768;
2252 case 0xffff:
2253 return 57344;
2254 default:
2255 return 0;
2256 }
2257}
2258
4a71df50
FB		 2259static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2260 unsigned long data)
2261{
4a71df50
FB		 2262 __u16 mtu, framesize;
2263 __u16 len;
2264 __u8 link_type;
2265 struct qeth_cmd_buffer *iob;
2266
d11ba0c4 2267 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2268
2269 iob = (struct qeth_cmd_buffer *) data;
2270 memcpy(&card->token.ulp_filter_r,
2271 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2272 QETH_MPC_TOKEN_LENGTH);
9853b97b 2273 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2274 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2275 mtu = qeth_get_mtu_outof_framesize(framesize);
4a71df50 2276 } else {
8ce7a9e0 2277 mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data);
4a71df50 2278 }
8ce7a9e0 2279 *(u16 *)reply->param = mtu;
4a71df50
FB		 2280
2281 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2282 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2283 memcpy(&link_type,
2284 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2285 card->info.link_type = link_type;
2286 } else
2287 card->info.link_type = 0;
01fc3e86 2288 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
4a71df50
FB		 2289 return 0;
2290}
2291
73657a3e
JW		 2292static u8 qeth_mpc_select_prot_type(struct qeth_card *card)
2293{
2294 if (IS_OSN(card))
2295 return QETH_PROT_OSN2;
4fda3354 2296 return IS_LAYER2(card) ? QETH_PROT_LAYER2 : QETH_PROT_TCPIP;
73657a3e
JW		 2297}
2298
4a71df50
FB		 2299static int qeth_ulp_enable(struct qeth_card *card)
2300{
73657a3e 2301 u8 prot_type = qeth_mpc_select_prot_type(card);
4a71df50 2302 struct qeth_cmd_buffer *iob;
8ce7a9e0 2303 u16 max_mtu;
73657a3e 2304 int rc;
4a71df50
FB		 2305
2306 /*FIXME: trace view callbacks*/
d11ba0c4 2307 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2308
2309 iob = qeth_wait_for_buffer(&card->write);
2310 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2311
92d27209 2312 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = (u8) card->dev->dev_port;
4a71df50
FB		 2313 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2314 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2315 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2316 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2317 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50 2318 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
8ce7a9e0
JW		 2319 qeth_ulp_enable_cb, &max_mtu);
2320 if (rc)
2321 return rc;
2322 return qeth_update_max_mtu(card, max_mtu);
4a71df50
FB		 2323}
2324
2325static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2326 unsigned long data)
2327{
2328 struct qeth_cmd_buffer *iob;
2329
d11ba0c4 2330 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2331
2332 iob = (struct qeth_cmd_buffer *) data;
2333 memcpy(&card->token.ulp_connection_r,
2334 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2335 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2336 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2337 3)) {
2338 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2339 dev_err(&card->gdev->dev, "A connection could not be "
2340 "established because of an OLM limit\n");
4b7ae122 2341 return -EMLINK;
65a1f898 2342 }
7bf9bcff 2343 return 0;
4a71df50
FB		 2344}
2345
2346static int qeth_ulp_setup(struct qeth_card *card)
2347{
2348 int rc;
2349 __u16 temp;
2350 struct qeth_cmd_buffer *iob;
2351 struct ccw_dev_id dev_id;
2352
d11ba0c4 2353 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2354
2355 iob = qeth_wait_for_buffer(&card->write);
2356 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2357
2358 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2359 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2360 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2361 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2362 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2363 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2364
2365 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2366 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2367 temp = (card->info.cula << 8) + card->info.unit_addr2;
2368 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2369 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2370 qeth_ulp_setup_cb, NULL);
2371 return rc;
2372}
2373
0da9581d
EL		 2374static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2375{
0da9581d
EL		 2376 struct qeth_qdio_out_buffer *newbuf;
2377
0da9581d 2378 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
3b346c18
JW		 2379 if (!newbuf)
2380 return -ENOMEM;
2381
d445a4e2 2382 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2383 skb_queue_head_init(&newbuf->skb_list);
2384 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2385 newbuf->q = q;
0da9581d
EL		 2386 newbuf->next_pending = q->bufs[bidx];
2387 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2388 q->bufs[bidx] = newbuf;
3b346c18 2389 return 0;
0da9581d
EL		 2390}
2391
afa0c590 2392static void qeth_free_output_queue(struct qeth_qdio_out_q *q)
d445a4e2
SO		 2393{
2394 if (!q)
2395 return;
2396
afa0c590 2397 qeth_clear_outq_buffers(q, 1);
d445a4e2
SO		 2398 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2399 kfree(q);
2400}
2401
2402static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2403{
2404 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2405
2406 if (!q)
2407 return NULL;
2408
2409 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2410 kfree(q);
2411 return NULL;
2412 }
2413 return q;
2414}
0da9581d 2415
4a71df50
FB		 2416static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2417{
2418 int i, j;
2419
d11ba0c4 2420 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2421
2422 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2423 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2424 return 0;
2425
4601ba6c
SO		 2426 QETH_DBF_TEXT(SETUP, 2, "inq");
2427 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2428 if (!card->qdio.in_q)
2429 goto out_nomem;
4601ba6c 2430
4a71df50
FB		 2431 /* inbound buffer pool */
2432 if (qeth_alloc_buffer_pool(card))
2433 goto out_freeinq;
0da9581d 2434
4a71df50 2435 /* outbound */
4a71df50 2436 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2437 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2438 if (!card->qdio.out_qs[i])
2439 goto out_freeoutq;
d11ba0c4
PT		 2440 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2441 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2442 card->qdio.out_qs[i]->queue_no = i;
2443 /* give outbound qeth_qdio_buffers their qdio_buffers */
2444 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2445 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2446 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2447 goto out_freeoutqbufs;
4a71df50
FB		 2448 }
2449 }
0da9581d
EL		 2450
2451 /* completion */
2452 if (qeth_alloc_cq(card))
2453 goto out_freeoutq;
2454
4a71df50
FB		 2455 return 0;
2456
0da9581d
EL		 2457out_freeoutqbufs:
2458 while (j > 0) {
2459 --j;
2460 kmem_cache_free(qeth_qdio_outbuf_cache,
2461 card->qdio.out_qs[i]->bufs[j]);
2462 card->qdio.out_qs[i]->bufs[j] = NULL;
2463 }
4a71df50 2464out_freeoutq:
bb92d3f8 2465 while (i > 0) {
afa0c590 2466 qeth_free_output_queue(card->qdio.out_qs[--i]);
bb92d3f8
JW		 2467 card->qdio.out_qs[i] = NULL;
2468 }
4a71df50
FB		 2469 qeth_free_buffer_pool(card);
2470out_freeinq:
4601ba6c 2471 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2472 card->qdio.in_q = NULL;
2473out_nomem:
2474 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2475 return -ENOMEM;
2476}
2477
d445a4e2
SO		 2478static void qeth_free_qdio_buffers(struct qeth_card *card)
2479{
2480 int i, j;
2481
2482 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2483 QETH_QDIO_UNINITIALIZED)
2484 return;
2485
2486 qeth_free_cq(card);
2487 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2488 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2489 if (card->qdio.in_q->bufs[j].rx_skb)
2490 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2491 }
2492 qeth_free_qdio_queue(card->qdio.in_q);
2493 card->qdio.in_q = NULL;
2494 /* inbound buffer pool */
2495 qeth_free_buffer_pool(card);
2496 /* free outbound qdio_qs */
bb92d3f8
JW		 2497 for (i = 0; i < card->qdio.no_out_queues; i++) {
2498 qeth_free_output_queue(card->qdio.out_qs[i]);
2499 card->qdio.out_qs[i] = NULL;
d445a4e2
SO		 2500 }
2501}
2502
4a71df50
FB		 2503static void qeth_create_qib_param_field(struct qeth_card *card,
2504 char *param_field)
2505{
2506
2507 param_field[0] = _ascebc['P'];
2508 param_field[1] = _ascebc['C'];
2509 param_field[2] = _ascebc['I'];
2510 param_field[3] = _ascebc['T'];
2511 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2512 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2513 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2514}
2515
2516static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2517 char *param_field)
2518{
2519 param_field[16] = _ascebc['B'];
2520 param_field[17] = _ascebc['L'];
2521 param_field[18] = _ascebc['K'];
2522 param_field[19] = _ascebc['T'];
2523 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2524 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2525 *((unsigned int *) (&param_field[28])) =
2526 card->info.blkt.inter_packet_jumbo;
2527}
2528
2529static int qeth_qdio_activate(struct qeth_card *card)
2530{
d11ba0c4 2531 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2532 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2533}
2534
2535static int qeth_dm_act(struct qeth_card *card)
2536{
2537 int rc;
2538 struct qeth_cmd_buffer *iob;
2539
d11ba0c4 2540 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2541
2542 iob = qeth_wait_for_buffer(&card->write);
2543 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2544
2545 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2546 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2547 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2548 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2549 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2550 return rc;
2551}
2552
2553static int qeth_mpc_initialize(struct qeth_card *card)
2554{
2555 int rc;
2556
d11ba0c4 2557 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2558
2559 rc = qeth_issue_next_read(card);
2560 if (rc) {
d11ba0c4 2561 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2562 return rc;
2563 }
2564 rc = qeth_cm_enable(card);
2565 if (rc) {
d11ba0c4 2566 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2567 goto out_qdio;
2568 }
2569 rc = qeth_cm_setup(card);
2570 if (rc) {
d11ba0c4 2571 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2572 goto out_qdio;
2573 }
2574 rc = qeth_ulp_enable(card);
2575 if (rc) {
d11ba0c4 2576 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2577 goto out_qdio;
2578 }
2579 rc = qeth_ulp_setup(card);
2580 if (rc) {
d11ba0c4 2581 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2582 goto out_qdio;
2583 }
2584 rc = qeth_alloc_qdio_buffers(card);
2585 if (rc) {
d11ba0c4 2586 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2587 goto out_qdio;
2588 }
2589 rc = qeth_qdio_establish(card);
2590 if (rc) {
d11ba0c4 2591 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2592 qeth_free_qdio_buffers(card);
2593 goto out_qdio;
2594 }
2595 rc = qeth_qdio_activate(card);
2596 if (rc) {
d11ba0c4 2597 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2598 goto out_qdio;
2599 }
2600 rc = qeth_dm_act(card);
2601 if (rc) {
d11ba0c4 2602 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2603 goto out_qdio;
2604 }
2605
2606 return 0;
2607out_qdio:
2608 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2609 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2610 return rc;
2611}
2612
4a71df50
FB		 2613void qeth_print_status_message(struct qeth_card *card)
2614{
2615 switch (card->info.type) {
5113fec0
UB		 2616 case QETH_CARD_TYPE_OSD:
2617 case QETH_CARD_TYPE_OSM:
2618 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2619 /* VM will use a non-zero first character
2620 * to indicate a HiperSockets like reporting
2621 * of the level OSA sets the first character to zero
2622 * */
2623 if (!card->info.mcl_level[0]) {
2624 sprintf(card->info.mcl_level, "%02x%02x",
2625 card->info.mcl_level[2],
2626 card->info.mcl_level[3]);
4a71df50
FB		 2627 break;
2628 }
2629 /* fallthrough */
2630 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2631 if ((card->info.guestlan) ||
2632 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2633 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2634 card->info.mcl_level[0]];
2635 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2636 card->info.mcl_level[1]];
2637 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2638 card->info.mcl_level[2]];
2639 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2640 card->info.mcl_level[3]];
2641 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2642 }
2643 break;
2644 default:
2645 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2646 }
239ff408
UB		 2647 dev_info(&card->gdev->dev,
2648 "Device is a%s card%s%s%s\nwith link type %s.\n",
2649 qeth_get_cardname(card),
2650 (card->info.mcl_level[0]) ? " (level: " : "",
2651 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2652 (card->info.mcl_level[0]) ? ")" : "",
2653 qeth_get_cardname_short(card));
4a71df50
FB		 2654}
2655EXPORT_SYMBOL_GPL(qeth_print_status_message);
2656
4a71df50
FB		 2657static void qeth_initialize_working_pool_list(struct qeth_card *card)
2658{
2659 struct qeth_buffer_pool_entry *entry;
2660
847a50fd 2661 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2662
2663 list_for_each_entry(entry,
2664 &card->qdio.init_pool.entry_list, init_list) {
2665 qeth_put_buffer_pool_entry(card, entry);
2666 }
2667}
2668
cef6ff22
JW		 2669static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2670 struct qeth_card *card)
4a71df50
FB		 2671{
2672 struct list_head *plh;
2673 struct qeth_buffer_pool_entry *entry;
2674 int i, free;
2675 struct page *page;
2676
2677 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2678 return NULL;
2679
2680 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2681 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2682 free = 1;
2683 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2684 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2685 free = 0;
2686 break;
2687 }
2688 }
2689 if (free) {
2690 list_del_init(&entry->list);
2691 return entry;
2692 }
2693 }
2694
2695 /* no free buffer in pool so take first one and swap pages */
2696 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2697 struct qeth_buffer_pool_entry, list);
2698 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2699 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2700 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2701 if (!page) {
2702 return NULL;
2703 } else {
2704 free_page((unsigned long)entry->elements[i]);
2705 entry->elements[i] = page_address(page);
2706 if (card->options.performance_stats)
2707 card->perf_stats.sg_alloc_page_rx++;
2708 }
2709 }
2710 }
2711 list_del_init(&entry->list);
2712 return entry;
2713}
2714
2715static int qeth_init_input_buffer(struct qeth_card *card,
2716 struct qeth_qdio_buffer *buf)
2717{
2718 struct qeth_buffer_pool_entry *pool_entry;
2719 int i;
2720
b3332930 2721 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
37cf05d2
JW		 2722 buf->rx_skb = netdev_alloc_skb(card->dev,
2723 QETH_RX_PULL_LEN + ETH_HLEN);
b3332930
FB		 2724 if (!buf->rx_skb)
2725 return 1;
2726 }
2727
4a71df50
FB		 2728 pool_entry = qeth_find_free_buffer_pool_entry(card);
2729 if (!pool_entry)
2730 return 1;
2731
2732 /*
2733 * since the buffer is accessed only from the input_tasklet
2734 * there shouldn't be a need to synchronize; also, since we use
2735 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2736 * buffers
2737 */
4a71df50
FB		 2738
2739 buf->pool_entry = pool_entry;
2740 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2741 buf->buffer->element[i].length = PAGE_SIZE;
2742 buf->buffer->element[i].addr = pool_entry->elements[i];
2743 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2744 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2745 else
3ec90878
JG		 2746 buf->buffer->element[i].eflags = 0;
2747 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2748 }
2749 return 0;
2750}
2751
2752int qeth_init_qdio_queues(struct qeth_card *card)
2753{
2754 int i, j;
2755 int rc;
2756
d11ba0c4 2757 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2758
2759 /* inbound queue */
1b45c80b
JW		 2760 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2761 memset(&card->rx, 0, sizeof(struct qeth_rx));
4a71df50
FB		 2762 qeth_initialize_working_pool_list(card);
2763 /*give only as many buffers to hardware as we have buffer pool entries*/
2764 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2765 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2766 card->qdio.in_q->next_buf_to_init =
2767 card->qdio.in_buf_pool.buf_count - 1;
2768 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2769 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2770 if (rc) {
d11ba0c4 2771 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2772 return rc;
2773 }
0da9581d
EL		 2774
2775 /* completion */
2776 rc = qeth_cq_init(card);
2777 if (rc) {
2778 return rc;
2779 }
2780
4a71df50
FB		 2781 /* outbound queue */
2782 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2783 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2784 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2785 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2786 qeth_clear_output_buffer(card->qdio.out_qs[i],
3b346c18 2787 card->qdio.out_qs[i]->bufs[j]);
4a71df50
FB		 2788 }
2789 card->qdio.out_qs[i]->card = card;
2790 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2791 card->qdio.out_qs[i]->do_pack = 0;
2792 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2793 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2794 atomic_set(&card->qdio.out_qs[i]->state,
2795 QETH_OUT_Q_UNLOCKED);
2796 }
2797 return 0;
2798}
2799EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2800
cef6ff22 2801static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2802{
2803 switch (link_type) {
2804 case QETH_LINK_TYPE_HSTR:
2805 return 2;
2806 default:
2807 return 1;
2808 }
2809}
2810
2811static void qeth_fill_ipacmd_header(struct qeth_card *card,
500abbf0
JW		 2812 struct qeth_ipa_cmd *cmd,
2813 enum qeth_ipa_cmds command,
2814 enum qeth_prot_versions prot)
4a71df50 2815{
4a71df50
FB		 2816 cmd->hdr.command = command;
2817 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
d22ffb5a 2818 /* cmd->hdr.seqno is set by qeth_send_control_data() */
4a71df50 2819 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
92d27209 2820 cmd->hdr.rel_adapter_no = (u8) card->dev->dev_port;
4fda3354 2821 cmd->hdr.prim_version_no = IS_LAYER2(card) ? 2 : 1;
4a71df50
FB		 2822 cmd->hdr.param_count = 1;
2823 cmd->hdr.prot_version = prot;
4a71df50
FB		 2824}
2825
c2153277
JW		 2826void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2827 u16 cmd_length)
605c9d5f 2828{
c2153277 2829 u16 total_length = IPA_PDU_HEADER_SIZE + cmd_length;
605c9d5f
JW		 2830 u8 prot_type = qeth_mpc_select_prot_type(card);
2831
2832 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
c2153277 2833 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &total_length, 2);
605c9d5f 2834 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
c2153277
JW		 2835 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &cmd_length, 2);
2836 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &cmd_length, 2);
605c9d5f
JW		 2837 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2838 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
c2153277 2839 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &cmd_length, 2);
605c9d5f
JW		 2840}
2841EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2842
4a71df50
FB		 2843struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2844 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2845{
2846 struct qeth_cmd_buffer *iob;
4a71df50 2847
1aec42bc
TR		 2848 iob = qeth_get_buffer(&card->write);
2849 if (iob) {
c2153277 2850 qeth_prepare_ipa_cmd(card, iob, sizeof(struct qeth_ipa_cmd));
ff5caa7a 2851 qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
1aec42bc
TR		 2852 } else {
2853 dev_warn(&card->gdev->dev,
2854 "The qeth driver ran out of channel command buffers\n");
e19e5be8
JW		 2855 QETH_DBF_MESSAGE(1, "device %x ran out of channel command buffers",
2856 CARD_DEVID(card));
1aec42bc 2857 }
4a71df50
FB		 2858
2859 return iob;
2860}
2861EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2862
742d4d40
JW		 2863static int qeth_send_ipa_cmd_cb(struct qeth_card *card,
2864 struct qeth_reply *reply, unsigned long data)
2865{
2866 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
2867
2868 return (cmd->hdr.return_code) ? -EIO : 0;
2869}
2870
efbbc1d5
EC		 2871/**
2872 * qeth_send_ipa_cmd() - send an IPA command
2873 *
2874 * See qeth_send_control_data() for explanation of the arguments.
2875 */
2876
4a71df50
FB		 2877int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2878 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2879 unsigned long),
2880 void *reply_param)
2881{
c2153277 2882 u16 length;
4a71df50 2883 int rc;
4a71df50 2884
847a50fd 2885 QETH_CARD_TEXT(card, 4, "sendipa");
742d4d40
JW		 2886
2887 if (reply_cb == NULL)
2888 reply_cb = qeth_send_ipa_cmd_cb;
c2153277
JW		 2889 memcpy(&length, QETH_IPA_PDU_LEN_TOTAL(iob->data), 2);
2890 rc = qeth_send_control_data(card, length, iob, reply_cb, reply_param);
908abbb5
UB		 2891 if (rc == -ETIME) {
2892 qeth_clear_ipacmd_list(card);
2893 qeth_schedule_recovery(card);
2894 }
4a71df50
FB		 2895 return rc;
2896}
2897EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2898
4b7ae122
JW		 2899static int qeth_send_startlan_cb(struct qeth_card *card,
2900 struct qeth_reply *reply, unsigned long data)
2901{
2902 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
2903
2904 if (cmd->hdr.return_code == IPA_RC_LAN_OFFLINE)
2905 return -ENETDOWN;
2906
2907 return (cmd->hdr.return_code) ? -EIO : 0;
2908}
2909
10340510 2910static int qeth_send_startlan(struct qeth_card *card)
4a71df50 2911{
70919e23 2912 struct qeth_cmd_buffer *iob;
4a71df50 2913
d11ba0c4 2914 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2915
70919e23 2916 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2917 if (!iob)
2918 return -ENOMEM;
4b7ae122 2919 return qeth_send_ipa_cmd(card, iob, qeth_send_startlan_cb, NULL);
4a71df50 2920}
4a71df50 2921
686c97ee 2922static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
4a71df50 2923{
686c97ee 2924 if (!cmd->hdr.return_code)
4a71df50
FB		 2925 cmd->hdr.return_code =
2926 cmd->data.setadapterparms.hdr.return_code;
686c97ee 2927 return cmd->hdr.return_code;
4a71df50 2928}
4a71df50
FB		 2929
2930static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2931 struct qeth_reply *reply, unsigned long data)
2932{
686c97ee 2933 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50 2934
847a50fd 2935 QETH_CARD_TEXT(card, 3, "quyadpcb");
686c97ee 2936 if (qeth_setadpparms_inspect_rc(cmd))
742d4d40 2937 return -EIO;
4a71df50 2938
5113fec0 2939 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2940 card->info.link_type =
2941 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2942 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2943 }
4a71df50
FB		 2944 card->options.adp.supported_funcs =
2945 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
686c97ee 2946 return 0;
4a71df50
FB		 2947}
2948
eb3fb0ba 2949static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2950 __u32 command, __u32 cmdlen)
2951{
2952 struct qeth_cmd_buffer *iob;
2953 struct qeth_ipa_cmd *cmd;
2954
2955 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2956 QETH_PROT_IPV4);
1aec42bc 2957 if (iob) {
ff5caa7a 2958 cmd = __ipa_cmd(iob);
1aec42bc
TR		 2959 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2960 cmd->data.setadapterparms.hdr.command_code = command;
2961 cmd->data.setadapterparms.hdr.used_total = 1;
2962 cmd->data.setadapterparms.hdr.seq_no = 1;
2963 }
4a71df50
FB		 2964
2965 return iob;
2966}
4a71df50 2967
09960b3a 2968static int qeth_query_setadapterparms(struct qeth_card *card)
4a71df50
FB		 2969{
2970 int rc;
2971 struct qeth_cmd_buffer *iob;
2972
847a50fd 2973 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2974 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2975 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 2976 if (!iob)
2977 return -ENOMEM;
4a71df50
FB		 2978 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2979 return rc;
2980}
4a71df50 2981
1da74b1c
FB		 2982static int qeth_query_ipassists_cb(struct qeth_card *card,
2983 struct qeth_reply *reply, unsigned long data)
2984{
2985 struct qeth_ipa_cmd *cmd;
2986
2987 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2988
2989 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 2990
2991 switch (cmd->hdr.return_code) {
742d4d40
JW		 2992 case IPA_RC_SUCCESS:
2993 break;
a134884a
SR		 2994 case IPA_RC_NOTSUPP:
2995 case IPA_RC_L2_UNSUPPORTED_CMD:
2996 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2997 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2998 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
742d4d40 2999 return -EOPNOTSUPP;
a134884a 3000 default:
742d4d40
JW		 3001 QETH_DBF_MESSAGE(1, "IPA_CMD_QIPASSIST on device %x: Unhandled rc=%#x\n",
3002 CARD_DEVID(card), cmd->hdr.return_code);
3003 return -EIO;
a134884a
SR		 3004 }
3005
1da74b1c
FB		 3006 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3007 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3008 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3009 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3010 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3011 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3012 } else
e19e5be8
JW		 3013 QETH_DBF_MESSAGE(1, "IPA_CMD_QIPASSIST on device %x: Flawed LIC detected\n",
3014 CARD_DEVID(card));
1da74b1c
FB		 3015 return 0;
3016}
3017
09960b3a
JW		 3018static int qeth_query_ipassists(struct qeth_card *card,
3019 enum qeth_prot_versions prot)
1da74b1c
FB		 3020{
3021 int rc;
3022 struct qeth_cmd_buffer *iob;
3023
3024 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3025 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3026 if (!iob)
3027 return -ENOMEM;
1da74b1c
FB		 3028 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3029 return rc;
3030}
1da74b1c 3031
45cbb2e4
SR		 3032static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3033 struct qeth_reply *reply, unsigned long data)
3034{
686c97ee 3035 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
45cbb2e4 3036 struct qeth_query_switch_attributes *attrs;
686c97ee 3037 struct qeth_switch_info *sw_info;
45cbb2e4
SR		 3038
3039 QETH_CARD_TEXT(card, 2, "qswiatcb");
686c97ee 3040 if (qeth_setadpparms_inspect_rc(cmd))
742d4d40 3041 return -EIO;
45cbb2e4 3042
686c97ee
JW		 3043 sw_info = (struct qeth_switch_info *)reply->param;
3044 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3045 sw_info->capabilities = attrs->capabilities;
3046 sw_info->settings = attrs->settings;
3047 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3048 sw_info->settings);
45cbb2e4
SR		 3049 return 0;
3050}
3051
3052int qeth_query_switch_attributes(struct qeth_card *card,
3053 struct qeth_switch_info *sw_info)
3054{
3055 struct qeth_cmd_buffer *iob;
3056
3057 QETH_CARD_TEXT(card, 2, "qswiattr");
3058 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3059 return -EOPNOTSUPP;
3060 if (!netif_carrier_ok(card->dev))
3061 return -ENOMEDIUM;
3062 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3063 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3064 if (!iob)
3065 return -ENOMEM;
45cbb2e4
SR		 3066 return qeth_send_ipa_cmd(card, iob,
3067 qeth_query_switch_attributes_cb, sw_info);
3068}
45cbb2e4 3069
1da74b1c
FB		 3070static int qeth_query_setdiagass_cb(struct qeth_card *card,
3071 struct qeth_reply *reply, unsigned long data)
3072{
742d4d40
JW		 3073 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
3074 u16 rc = cmd->hdr.return_code;
1da74b1c 3075
742d4d40 3076 if (rc) {
1da74b1c 3077 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
742d4d40
JW		 3078 return -EIO;
3079 }
3080
3081 card->info.diagass_support = cmd->data.diagass.ext;
1da74b1c
FB		 3082 return 0;
3083}
3084
3085static int qeth_query_setdiagass(struct qeth_card *card)
3086{
3087 struct qeth_cmd_buffer *iob;
3088 struct qeth_ipa_cmd *cmd;
3089
3090 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3091 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3092 if (!iob)
3093 return -ENOMEM;
ff5caa7a 3094 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3095 cmd->data.diagass.subcmd_len = 16;
3096 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3097 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3098}
3099
3100static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3101{
3102 unsigned long info = get_zeroed_page(GFP_KERNEL);
3103 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3104 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3105 struct ccw_dev_id ccwid;
caf757c6 3106 int level;
1da74b1c
FB		 3107
3108 tid->chpid = card->info.chpid;
3109 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3110 tid->ssid = ccwid.ssid;
3111 tid->devno = ccwid.devno;
3112 if (!info)
3113 return;
caf757c6
HC		 3114 level = stsi(NULL, 0, 0, 0);
3115 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3116 tid->lparnr = info222->lpar_number;
caf757c6 3117 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3118 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3119 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3120 }
3121 free_page(info);
3122 return;
3123}
3124
3125static int qeth_hw_trap_cb(struct qeth_card *card,
3126 struct qeth_reply *reply, unsigned long data)
3127{
742d4d40
JW		 3128 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
3129 u16 rc = cmd->hdr.return_code;
1da74b1c 3130
742d4d40 3131 if (rc) {
1da74b1c 3132 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
742d4d40
JW		 3133 return -EIO;
3134 }
1da74b1c
FB		 3135 return 0;
3136}
3137
3138int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3139{
3140 struct qeth_cmd_buffer *iob;
3141 struct qeth_ipa_cmd *cmd;
3142
3143 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3144 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3145 if (!iob)
3146 return -ENOMEM;
ff5caa7a 3147 cmd = __ipa_cmd(iob);
1da74b1c
FB		 3148 cmd->data.diagass.subcmd_len = 80;
3149 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3150 cmd->data.diagass.type = 1;
3151 cmd->data.diagass.action = action;
3152 switch (action) {
3153 case QETH_DIAGS_TRAP_ARM:
3154 cmd->data.diagass.options = 0x0003;
3155 cmd->data.diagass.ext = 0x00010000 +
3156 sizeof(struct qeth_trap_id);
3157 qeth_get_trap_id(card,
3158 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3159 break;
3160 case QETH_DIAGS_TRAP_DISARM:
3161 cmd->data.diagass.options = 0x0001;
3162 break;
3163 case QETH_DIAGS_TRAP_CAPTURE:
3164 break;
3165 }
3166 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3167}
3168EXPORT_SYMBOL_GPL(qeth_hw_trap);
3169
d73ef324
JW		 3170static int qeth_check_qdio_errors(struct qeth_card *card,
3171 struct qdio_buffer *buf,
3172 unsigned int qdio_error,
3173 const char *dbftext)
4a71df50 3174{
779e6e1c 3175 if (qdio_error) {
847a50fd 3176 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3177 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3178 buf->element[15].sflags);
38593d01 3179 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3180 buf->element[14].sflags);
38593d01 3181 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3182 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3183 card->stats.rx_dropped++;
3184 return 0;
3185 } else
3186 return 1;
4a71df50
FB		 3187 }
3188 return 0;
3189}
4a71df50 3190
d73ef324 3191static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3192{
3193 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3194 struct list_head *lh;
4a71df50
FB		 3195 int count;
3196 int i;
3197 int rc;
3198 int newcount = 0;
3199
4a71df50
FB		 3200 count = (index < queue->next_buf_to_init)?
3201 card->qdio.in_buf_pool.buf_count -
3202 (queue->next_buf_to_init - index) :
3203 card->qdio.in_buf_pool.buf_count -
3204 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3205 /* only requeue at a certain threshold to avoid SIGAs */
3206 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3207 for (i = queue->next_buf_to_init;
3208 i < queue->next_buf_to_init + count; ++i) {
3209 if (qeth_init_input_buffer(card,
3210 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3211 break;
3212 } else {
3213 newcount++;
3214 }
3215 }
3216
3217 if (newcount < count) {
3218 /* we are in memory shortage so we switch back to
3219 traditional skb allocation and drop packages */
4a71df50
FB		 3220 atomic_set(&card->force_alloc_skb, 3);
3221 count = newcount;
3222 } else {
4a71df50
FB		 3223 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3224 }
3225
b3332930
FB		 3226 if (!count) {
3227 i = 0;
3228 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3229 i++;
3230 if (i == card->qdio.in_buf_pool.buf_count) {
3231 QETH_CARD_TEXT(card, 2, "qsarbw");
3232 card->reclaim_index = index;
3233 schedule_delayed_work(
3234 &card->buffer_reclaim_work,
3235 QETH_RECLAIM_WORK_TIME);
3236 }
3237 return;
3238 }
3239
4a71df50
FB		 3240 /*
3241 * according to old code it should be avoided to requeue all
3242 * 128 buffers in order to benefit from PCI avoidance.
3243 * this function keeps at least one buffer (the buffer at
3244 * 'index') un-requeued -> this buffer is the first buffer that
3245 * will be requeued the next time
3246 */
779e6e1c
JG		 3247 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3248 queue->next_buf_to_init, count);
4a71df50 3249 if (rc) {
847a50fd 3250 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3251 }
3252 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3253 QDIO_MAX_BUFFERS_PER_Q;
3254 }
3255}
d73ef324
JW		 3256
3257static void qeth_buffer_reclaim_work(struct work_struct *work)
3258{
3259 struct qeth_card *card = container_of(work, struct qeth_card,
3260 buffer_reclaim_work.work);
3261
3262 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3263 qeth_queue_input_buffer(card, card->reclaim_index);
3264}
4a71df50 3265
d7a39937 3266static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3267 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3268{
3ec90878 3269 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3270
847a50fd 3271 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3272 if (card->info.type == QETH_CARD_TYPE_IQD) {
3273 if (sbalf15 == 0) {
3274 qdio_err = 0;
3275 } else {
3276 qdio_err = 1;
3277 }
3278 }
76b11f8e 3279 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3280
3281 if (!qdio_err)
d7a39937 3282 return;
d303b6fd
JG		 3283
3284 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3285 return;
d303b6fd 3286
847a50fd
CO		 3287 QETH_CARD_TEXT(card, 1, "lnkfail");
3288 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3289 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3290}
3291
664e42ac
JW		 3292/**
3293 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3294 * @queue: queue to check for packing buffer
3295 *
3296 * Returns number of buffers that were prepared for flush.
3297 */
3298static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3299{
3300 struct qeth_qdio_out_buffer *buffer;
3301
3302 buffer = queue->bufs[queue->next_buf_to_fill];
3303 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3304 (buffer->next_element_to_fill > 0)) {
3305 /* it's a packing buffer */
3306 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3307 queue->next_buf_to_fill =
3308 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3309 return 1;
3310 }
3311 return 0;
3312}
3313
4a71df50
FB		 3314/*
3315 * Switched to packing state if the number of used buffers on a queue
3316 * reaches a certain limit.
3317 */
3318static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3319{
3320 if (!queue->do_pack) {
3321 if (atomic_read(&queue->used_buffers)
3322 >= QETH_HIGH_WATERMARK_PACK){
3323 /* switch non-PACKING -> PACKING */
847a50fd 3324 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3325 if (queue->card->options.performance_stats)
3326 queue->card->perf_stats.sc_dp_p++;
3327 queue->do_pack = 1;
3328 }
3329 }
3330}
3331
3332/*
3333 * Switches from packing to non-packing mode. If there is a packing
3334 * buffer on the queue this buffer will be prepared to be flushed.
3335 * In that case 1 is returned to inform the caller. If no buffer
3336 * has to be flushed, zero is returned.
3337 */
3338static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3339{
4a71df50
FB		 3340 if (queue->do_pack) {
3341 if (atomic_read(&queue->used_buffers)
3342 <= QETH_LOW_WATERMARK_PACK) {
3343 /* switch PACKING -> non-PACKING */
847a50fd 3344 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3345 if (queue->card->options.performance_stats)
3346 queue->card->perf_stats.sc_p_dp++;
3347 queue->do_pack = 0;
664e42ac 3348 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3349 }
3350 }
4a71df50
FB		 3351 return 0;
3352}
3353
779e6e1c
JG		 3354static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3355 int count)
4a71df50
FB		 3356{
3357 struct qeth_qdio_out_buffer *buf;
3358 int rc;
3359 int i;
3360 unsigned int qdio_flags;
3361
4a71df50 3362 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3363 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3364 buf = queue->bufs[bidx];
3ec90878
JG		 3365 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3366 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3367
0da9581d
EL		 3368 if (queue->bufstates)
3369 queue->bufstates[bidx].user = buf;
3370
4a71df50
FB		 3371 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3372 continue;
3373
3374 if (!queue->do_pack) {
3375 if ((atomic_read(&queue->used_buffers) >=
3376 (QETH_HIGH_WATERMARK_PACK -
3377 QETH_WATERMARK_PACK_FUZZ)) &&
3378 !atomic_read(&queue->set_pci_flags_count)) {
3379 /* it's likely that we'll go to packing
3380 * mode soon */
3381 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3382 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3383 }
3384 } else {
3385 if (!atomic_read(&queue->set_pci_flags_count)) {
3386 /*
3387 * there's no outstanding PCI any more, so we
3388 * have to request a PCI to be sure the the PCI
3389 * will wake at some time in the future then we
3390 * can flush packed buffers that might still be
3391 * hanging around, which can happen if no
3392 * further send was requested by the stack
3393 */
3394 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3395 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3396 }
3397 }
3398 }
3399
3e66bab3 3400 netif_trans_update(queue->card->dev);
4a71df50 3401 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3402 if (atomic_read(&queue->set_pci_flags_count))
3403 qdio_flags |= QDIO_FLAG_PCI_OUT;
a702349a 3404 atomic_add(count, &queue->used_buffers);
4a71df50 3405 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3406 queue->queue_no, index, count);
4a71df50 3407 if (rc) {
d303b6fd
JG		 3408 queue->card->stats.tx_errors += count;
3409 /* ignore temporary SIGA errors without busy condition */
1549d13f 3410 if (rc == -ENOBUFS)
d303b6fd 3411 return;
847a50fd 3412 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3413 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3414 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3415 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3416 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3417
4a71df50
FB		 3418 /* this must not happen under normal circumstances. if it
3419 * happens something is really wrong -> recover */
3420 qeth_schedule_recovery(queue->card);
3421 return;
3422 }
4a71df50
FB		 3423 if (queue->card->options.performance_stats)
3424 queue->card->perf_stats.bufs_sent += count;
3425}
3426
3427static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3428{
3429 int index;
3430 int flush_cnt = 0;
3431 int q_was_packing = 0;
3432
3433 /*
3434 * check if weed have to switch to non-packing mode or if
3435 * we have to get a pci flag out on the queue
3436 */
3437 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3438 !atomic_read(&queue->set_pci_flags_count)) {
3439 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3440 QETH_OUT_Q_UNLOCKED) {
3441 /*
3442 * If we get in here, there was no action in
3443 * do_send_packet. So, we check if there is a
3444 * packing buffer to be flushed here.
3445 */
3446 netif_stop_queue(queue->card->dev);
3447 index = queue->next_buf_to_fill;
3448 q_was_packing = queue->do_pack;
3449 /* queue->do_pack may change */
3450 barrier();
3451 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3452 if (!flush_cnt &&
3453 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3454 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3455 if (queue->card->options.performance_stats &&
3456 q_was_packing)
3457 queue->card->perf_stats.bufs_sent_pack +=
3458 flush_cnt;
3459 if (flush_cnt)
779e6e1c 3460 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3461 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3462 }
3463 }
3464}
3465
7bcd64eb
JW		 3466static void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3467 unsigned long card_ptr)
a1c3ed4c
FB		 3468{
3469 struct qeth_card *card = (struct qeth_card *)card_ptr;
3470
d3d1b205 3471 if (card->dev->flags & IFF_UP)
a1c3ed4c
FB		 3472 napi_schedule(&card->napi);
3473}
a1c3ed4c 3474
0da9581d
EL		 3475int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3476{
3477 int rc;
3478
3479 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3480 rc = -1;
3481 goto out;
3482 } else {
3483 if (card->options.cq == cq) {
3484 rc = 0;
3485 goto out;
3486 }
3487
3488 if (card->state != CARD_STATE_DOWN &&
3489 card->state != CARD_STATE_RECOVER) {
3490 rc = -1;
3491 goto out;
3492 }
3493
3494 qeth_free_qdio_buffers(card);
3495 card->options.cq = cq;
3496 rc = 0;
3497 }
3498out:
3499 return rc;
3500
3501}
3502EXPORT_SYMBOL_GPL(qeth_configure_cq);
3503
3b346c18
JW		 3504static void qeth_qdio_cq_handler(struct qeth_card *card, unsigned int qdio_err,
3505 unsigned int queue, int first_element,
3506 int count)
3507{
0da9581d
EL		 3508 struct qeth_qdio_q *cq = card->qdio.c_q;
3509 int i;
3510 int rc;
3511
3512 if (!qeth_is_cq(card, queue))
4326b5b4 3513 return;
0da9581d
EL		 3514
3515 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3516 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3517 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3518
3519 if (qdio_err) {
3520 netif_stop_queue(card->dev);
3521 qeth_schedule_recovery(card);
4326b5b4 3522 return;
0da9581d
EL		 3523 }
3524
3525 for (i = first_element; i < first_element + count; ++i) {
3526 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3527 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
3b346c18 3528 int e = 0;
0da9581d 3529
903e4853
UB		 3530 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3531 buffer->element[e].addr) {
0da9581d
EL		 3532 unsigned long phys_aob_addr;
3533
3534 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3535 qeth_qdio_handle_aob(card, phys_aob_addr);
0da9581d
EL		 3536 ++e;
3537 }
3b346c18 3538 qeth_scrub_qdio_buffer(buffer, QDIO_MAX_ELEMENTS_PER_BUFFER);
0da9581d
EL		 3539 }
3540 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3541 card->qdio.c_q->next_buf_to_init,
3542 count);
3543 if (rc) {
3544 dev_warn(&card->gdev->dev,
3545 "QDIO reported an error, rc=%i\n", rc);
3546 QETH_CARD_TEXT(card, 2, "qcqherr");
3547 }
3548 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3549 + count) % QDIO_MAX_BUFFERS_PER_Q;
0da9581d
EL		 3550}
3551
7bcd64eb
JW		 3552static void qeth_qdio_input_handler(struct ccw_device *ccwdev,
3553 unsigned int qdio_err, int queue,
3554 int first_elem, int count,
3555 unsigned long card_ptr)
a1c3ed4c
FB		 3556{
3557 struct qeth_card *card = (struct qeth_card *)card_ptr;
3558
0da9581d
EL		 3559 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3560 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3561
3562 if (qeth_is_cq(card, queue))
3563 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3564 else if (qdio_err)
a1c3ed4c
FB		 3565 qeth_schedule_recovery(card);
3566}
a1c3ed4c 3567
7bcd64eb
JW		 3568static void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3569 unsigned int qdio_error, int __queue,
3570 int first_element, int count,
3571 unsigned long card_ptr)
4a71df50
FB		 3572{
3573 struct qeth_card *card = (struct qeth_card *) card_ptr;
3574 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3575 struct qeth_qdio_out_buffer *buffer;
3576 int i;
3577
847a50fd 3578 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3579 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3580 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3581 netif_stop_queue(card->dev);
3582 qeth_schedule_recovery(card);
3583 return;
4a71df50 3584 }
4326b5b4 3585
4a71df50 3586 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3587 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3588 buffer = queue->bufs[bidx];
b67d801f 3589 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3590
3591 if (queue->bufstates &&
3592 (queue->bufstates[bidx].flags &
3593 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3594 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3595
3596 if (atomic_cmpxchg(&buffer->state,
3597 QETH_QDIO_BUF_PRIMED,
3598 QETH_QDIO_BUF_PENDING) ==
3599 QETH_QDIO_BUF_PRIMED) {
3600 qeth_notify_skbs(queue, buffer,
3601 TX_NOTIFY_PENDING);
3602 }
0da9581d 3603 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
ce28867f
JW		 3604
3605 /* prepare the queue slot for re-use: */
3606 qeth_scrub_qdio_buffer(buffer->buffer,
3607 QETH_MAX_BUFFER_ELEMENTS(card));
b3332930
FB		 3608 if (qeth_init_qdio_out_buf(queue, bidx)) {
3609 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3610 qeth_schedule_recovery(card);
b3332930 3611 }
0da9581d 3612 } else {
b3332930
FB		 3613 if (card->options.cq == QETH_CQ_ENABLED) {
3614 enum iucv_tx_notify n;
3615
3616 n = qeth_compute_cq_notification(
3617 buffer->buffer->element[15].sflags, 0);
3618 qeth_notify_skbs(queue, buffer, n);
3619 }
3620
3b346c18 3621 qeth_clear_output_buffer(queue, buffer);
0da9581d
EL		 3622 }
3623 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3624 }
3625 atomic_sub(count, &queue->used_buffers);
3626 /* check if we need to do something on this outbound queue */
3627 if (card->info.type != QETH_CARD_TYPE_IQD)
3628 qeth_check_outbound_queue(queue);
3629
3630 netif_wake_queue(queue->card->dev);
4a71df50 3631}
4a71df50 3632
70deb016
HW		 3633/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3634static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3635{
3636 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3637 return 2;
3638 return queue_num;
3639}
3640
290b8348
SR		 3641/**
3642 * Note: Function assumes that we have 4 outbound queues.
3643 */
4a71df50 3644int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
86c0cdb9 3645 int ipv)
4a71df50 3646{
d66cb37e 3647 __be16 *tci;
290b8348
SR		 3648 u8 tos;
3649
290b8348
SR		 3650 switch (card->qdio.do_prio_queueing) {
3651 case QETH_PRIO_Q_ING_TOS:
3652 case QETH_PRIO_Q_ING_PREC:
3653 switch (ipv) {
3654 case 4:
3655 tos = ipv4_get_dsfield(ip_hdr(skb));
3656 break;
3657 case 6:
3658 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3659 break;
3660 default:
3661 return card->qdio.default_out_queue;
4a71df50 3662 }
290b8348 3663 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3664 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3665 if (tos & IPTOS_MINCOST)
70deb016 3666 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3667 if (tos & IPTOS_RELIABILITY)
3668 return 2;
3669 if (tos & IPTOS_THROUGHPUT)
3670 return 1;
3671 if (tos & IPTOS_LOWDELAY)
3672 return 0;
d66cb37e
SR		 3673 break;
3674 case QETH_PRIO_Q_ING_SKB:
3675 if (skb->priority > 5)
3676 return 0;
70deb016 3677 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3678 case QETH_PRIO_Q_ING_VLAN:
3679 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3680 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3681 return qeth_cut_iqd_prio(card,
3682 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3683 break;
4a71df50 3684 default:
290b8348 3685 break;
4a71df50 3686 }
290b8348 3687 return card->qdio.default_out_queue;
4a71df50
FB		 3688}
3689EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3690
2863c613
EC		 3691/**
3692 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3693 * @skb: SKB address
3694 *
3695 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3696 * fragmented part of the SKB. Returns zero for linear SKB.
3697 */
356156b6 3698static int qeth_get_elements_for_frags(struct sk_buff *skb)
271648b4 3699{
2863c613 3700 int cnt, elements = 0;
271648b4
FB		 3701
3702 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3703 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3704
3705 elements += qeth_get_elements_for_range(
3706 (addr_t)skb_frag_address(frag),
3707 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3708 }
3709 return elements;
3710}
271648b4 3711
40e6a225
JW		 3712/**
3713 * qeth_count_elements() - Counts the number of QDIO buffer elements needed
3714 * to transmit an skb.
3715 * @skb: the skb to operate on.
3716 * @data_offset: skip this part of the skb's linear data
3717 *
3718 * Returns the number of pages, and thus QDIO buffer elements, needed to map the
3719 * skb's data (both its linear part and paged fragments).
3720 */
3721unsigned int qeth_count_elements(struct sk_buff *skb, unsigned int data_offset)
ba86ceee
JW		 3722{
3723 unsigned int elements = qeth_get_elements_for_frags(skb);
3724 addr_t end = (addr_t)skb->data + skb_headlen(skb);
3725 addr_t start = (addr_t)skb->data + data_offset;
3726
3727 if (start != end)
3728 elements += qeth_get_elements_for_range(start, end);
3729 return elements;
3730}
40e6a225 3731EXPORT_SYMBOL_GPL(qeth_count_elements);
4a71df50 3732
e517b649
JW		 3733#define QETH_HDR_CACHE_OBJ_SIZE (sizeof(struct qeth_hdr_tso) + \
3734 MAX_TCP_HEADER)
55494264 3735
0d6f02d3 3736/**
ba86ceee
JW		 3737 * qeth_add_hw_header() - add a HW header to an skb.
3738 * @skb: skb that the HW header should be added to.
0d6f02d3
JW		 3739 * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
3740 * it contains a valid pointer to a qeth_hdr.
a7c2f4a3
JW		 3741 * @hdr_len: length of the HW header.
3742 * @proto_len: length of protocol headers that need to be in same page as the
3743 * HW header.
0d6f02d3
JW		 3744 *
3745 * Returns the pushed length. If the header can't be pushed on
3746 * (eg. because it would cross a page boundary), it is allocated from
3747 * the cache instead and 0 is returned.
ba86ceee 3748 * The number of needed buffer elements is returned in @elements.
0d6f02d3
JW		 3749 * Error to create the hdr is indicated by returning with < 0.
3750 */
81ec5439
JW		 3751static int qeth_add_hw_header(struct qeth_card *card, struct sk_buff *skb,
3752 struct qeth_hdr **hdr, unsigned int hdr_len,
3753 unsigned int proto_len, unsigned int *elements)
ba86ceee
JW		 3754{
3755 const unsigned int max_elements = QETH_MAX_BUFFER_ELEMENTS(card);
a7c2f4a3 3756 const unsigned int contiguous = proto_len ? proto_len : 1;
ba86ceee
JW		 3757 unsigned int __elements;
3758 addr_t start, end;
3759 bool push_ok;
3760 int rc;
3761
3762check_layout:
a7c2f4a3 3763 start = (addr_t)skb->data - hdr_len;
ba86ceee
JW		 3764 end = (addr_t)skb->data;
3765
a7c2f4a3 3766 if (qeth_get_elements_for_range(start, end + contiguous) == 1) {
ba86ceee
JW		 3767 /* Push HW header into same page as first protocol header. */
3768 push_ok = true;
e517b649
JW		 3769 /* ... but TSO always needs a separate element for headers: */
3770 if (skb_is_gso(skb))
3771 __elements = 1 + qeth_count_elements(skb, proto_len);
3772 else
3773 __elements = qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3774 } else if (!proto_len && qeth_get_elements_for_range(start, end) == 1) {
3775 /* Push HW header into a new page. */
3776 push_ok = true;
ba86ceee 3777 __elements = 1 + qeth_count_elements(skb, 0);
a7c2f4a3
JW		 3778 } else {
3779 /* Use header cache, copy protocol headers up. */
3780 push_ok = false;
3781 __elements = 1 + qeth_count_elements(skb, proto_len);
ba86ceee
JW		 3782 }
3783
3784 /* Compress skb to fit into one IO buffer: */
3785 if (__elements > max_elements) {
3786 if (!skb_is_nonlinear(skb)) {
3787 /* Drop it, no easy way of shrinking it further. */
3788 QETH_DBF_MESSAGE(2, "Dropped an oversized skb (Max Elements=%u / Actual=%u / Length=%u).\n",
3789 max_elements, __elements, skb->len);
3790 return -E2BIG;
3791 }
3792
3793 rc = skb_linearize(skb);
3794 if (card->options.performance_stats) {
3795 if (rc)
3796 card->perf_stats.tx_linfail++;
3797 else
3798 card->perf_stats.tx_lin++;
3799 }
3800 if (rc)
3801 return rc;
3802
3803 /* Linearization changed the layout, re-evaluate: */
3804 goto check_layout;
3805 }
3806
3807 *elements = __elements;
3808 /* Add the header: */
3809 if (push_ok) {
a7c2f4a3
JW		 3810 *hdr = skb_push(skb, hdr_len);
3811 return hdr_len;
0d6f02d3
JW		 3812 }
3813 /* fall back */
55494264
JW		 3814 if (hdr_len + proto_len > QETH_HDR_CACHE_OBJ_SIZE)
3815 return -E2BIG;
0d6f02d3
JW		 3816 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3817 if (!*hdr)
3818 return -ENOMEM;
a7c2f4a3
JW		 3819 /* Copy protocol headers behind HW header: */
3820 skb_copy_from_linear_data(skb, ((char *)*hdr) + hdr_len, proto_len);
0d6f02d3
JW		 3821 return 0;
3822}
0d6f02d3 3823
cef6ff22
JW		 3824static void __qeth_fill_buffer(struct sk_buff *skb,
3825 struct qeth_qdio_out_buffer *buf,
3826 bool is_first_elem, unsigned int offset)
4a71df50 3827{
384d2ef1
JW		 3828 struct qdio_buffer *buffer = buf->buffer;
3829 int element = buf->next_element_to_fill;
cc309f83
JW		 3830 int length = skb_headlen(skb) - offset;
3831 char *data = skb->data + offset;
384d2ef1 3832 int length_here, cnt;
4a71df50 3833
cc309f83 3834 /* map linear part into buffer element(s) */
4a71df50
FB		 3835 while (length > 0) {
3836 /* length_here is the remaining amount of data in this page */
3837 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3838 if (length < length_here)
3839 length_here = length;
3840
3841 buffer->element[element].addr = data;
3842 buffer->element[element].length = length_here;
3843 length -= length_here;
384d2ef1
JW		 3844 if (is_first_elem) {
3845 is_first_elem = false;
5258830b
JW		 3846 if (length || skb_is_nonlinear(skb))
3847 /* skb needs additional elements */
3ec90878 3848 buffer->element[element].eflags =
5258830b 3849 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3850 else
5258830b
JW		 3851 buffer->element[element].eflags = 0;
3852 } else {
3853 buffer->element[element].eflags =
3854 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3855 }
3856 data += length_here;
3857 element++;
4a71df50 3858 }
51aa165c 3859
cc309f83 3860 /* map page frags into buffer element(s) */
51aa165c 3861 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3862 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3863
3864 data = skb_frag_address(frag);
3865 length = skb_frag_size(frag);
271648b4
FB		 3866 while (length > 0) {
3867 length_here = PAGE_SIZE -
3868 ((unsigned long) data % PAGE_SIZE);
3869 if (length < length_here)
3870 length_here = length;
3871
3872 buffer->element[element].addr = data;
3873 buffer->element[element].length = length_here;
3874 buffer->element[element].eflags =
3875 SBAL_EFLAGS_MIDDLE_FRAG;
3876 length -= length_here;
3877 data += length_here;
3878 element++;
3879 }
51aa165c
FB		 3880 }
3881
3ec90878
JG		 3882 if (buffer->element[element - 1].eflags)
3883 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 3884 buf->next_element_to_fill = element;
4a71df50
FB		 3885}
3886
eaf3cc08
JW		 3887/**
3888 * qeth_fill_buffer() - map skb into an output buffer
3889 * @queue: QDIO queue to submit the buffer on
3890 * @buf: buffer to transport the skb
3891 * @skb: skb to map into the buffer
3892 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
3893 * from qeth_core_header_cache.
3894 * @offset: when mapping the skb, start at skb->data + offset
3895 * @hd_len: if > 0, build a dedicated header element of this size
3896 */
cef6ff22
JW		 3897static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3898 struct qeth_qdio_out_buffer *buf,
3899 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 3900 unsigned int offset, unsigned int hd_len)
4a71df50 3901{
eaf3cc08 3902 struct qdio_buffer *buffer = buf->buffer;
384d2ef1 3903 bool is_first_elem = true;
4a71df50 3904
dc149e37 3905 __skb_queue_tail(&buf->skb_list, skb);
4a71df50 3906
eaf3cc08
JW		 3907 /* build dedicated header element */
3908 if (hd_len) {
683d718a 3909 int element = buf->next_element_to_fill;
384d2ef1
JW		 3910 is_first_elem = false;
3911
683d718a 3912 buffer->element[element].addr = hdr;
f1588177 3913 buffer->element[element].length = hd_len;
3ec90878 3914 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
eaf3cc08
JW		 3915 /* remember to free cache-allocated qeth_hdr: */
3916 buf->is_header[element] = ((void *)hdr != skb->data);
683d718a
FB		 3917 buf->next_element_to_fill++;
3918 }
3919
384d2ef1 3920 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 3921
3922 if (!queue->do_pack) {
847a50fd 3923 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50 3924 } else {
847a50fd 3925 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3926 if (queue->card->options.performance_stats)
3927 queue->card->perf_stats.skbs_sent_pack++;
f72b4644
JW		 3928
3929 /* If the buffer still has free elements, keep using it. */
3930 if (buf->next_element_to_fill <
3931 QETH_MAX_BUFFER_ELEMENTS(queue->card))
3932 return 0;
4a71df50 3933 }
f72b4644
JW		 3934
3935 /* flush out the buffer */
3936 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3937 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3938 QDIO_MAX_BUFFERS_PER_Q;
3939 return 1;
4a71df50
FB		 3940}
3941
81ec5439
JW		 3942static int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue,
3943 struct sk_buff *skb, struct qeth_hdr *hdr,
3944 unsigned int offset, unsigned int hd_len)
4a71df50 3945{
7c2e9ba3
JW		 3946 int index = queue->next_buf_to_fill;
3947 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4a71df50 3948
4a71df50
FB		 3949 /*
3950 * check if buffer is empty to make sure that we do not 'overtake'
3951 * ourselves and try to fill a buffer that is already primed
3952 */
3953 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
7c2e9ba3 3954 return -EBUSY;
64ef8957
FB		 3955 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3956 qeth_flush_buffers(queue, index, 1);
4a71df50 3957 return 0;
4a71df50 3958}
4a71df50
FB		 3959
3960int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 3961 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 3962 unsigned int offset, unsigned int hd_len,
3963 int elements_needed)
4a71df50
FB		 3964{
3965 struct qeth_qdio_out_buffer *buffer;
3966 int start_index;
3967 int flush_count = 0;
3968 int do_pack = 0;
3969 int tmp;
3970 int rc = 0;
3971
4a71df50
FB		 3972 /* spin until we get the queue ... */
3973 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3974 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3975 start_index = queue->next_buf_to_fill;
0da9581d 3976 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3977 /*
3978 * check if buffer is empty to make sure that we do not 'overtake'
3979 * ourselves and try to fill a buffer that is already primed
3980 */
3981 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3982 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3983 return -EBUSY;
3984 }
3985 /* check if we need to switch packing state of this queue */
3986 qeth_switch_to_packing_if_needed(queue);
3987 if (queue->do_pack) {
3988 do_pack = 1;
64ef8957
FB		 3989 /* does packet fit in current buffer? */
3990 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3991 buffer->next_element_to_fill) < elements_needed) {
3992 /* ... no -> set state PRIMED */
3993 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3994 flush_count++;
3995 queue->next_buf_to_fill =
3996 (queue->next_buf_to_fill + 1) %
3997 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3998 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3999 /* we did a step forward, so check buffer state
4000 * again */
4001 if (atomic_read(&buffer->state) !=
4002 QETH_QDIO_BUF_EMPTY) {
4003 qeth_flush_buffers(queue, start_index,
779e6e1c 4004 flush_count);
64ef8957 4005 atomic_set(&queue->state,
4a71df50 4006 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4007 rc = -EBUSY;
4008 goto out;
4a71df50
FB		 4009 }
4010 }
4011 }
f72b4644
JW		 4012
4013 flush_count += qeth_fill_buffer(queue, buffer, skb, hdr, offset,
4014 hd_len);
4a71df50 4015 if (flush_count)
779e6e1c 4016 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4017 else if (!atomic_read(&queue->set_pci_flags_count))
4018 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4019 /*
4020 * queue->state will go from LOCKED -> UNLOCKED or from
4021 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4022 * (switch packing state or flush buffer to get another pci flag out).
4023 * In that case we will enter this loop
4024 */
4025 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4026 start_index = queue->next_buf_to_fill;
4027 /* check if we can go back to non-packing state */
3cdc8a25 4028 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4029 /*
4030 * check if we need to flush a packing buffer to get a pci
4031 * flag out on the queue
4032 */
3cdc8a25
JW		 4033 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4034 tmp = qeth_prep_flush_pack_buffer(queue);
4035 if (tmp) {
4036 qeth_flush_buffers(queue, start_index, tmp);
4037 flush_count += tmp;
4038 }
4a71df50 4039 }
3cdc8a25 4040out:
4a71df50
FB		 4041 /* at this point the queue is UNLOCKED again */
4042 if (queue->card->options.performance_stats && do_pack)
4043 queue->card->perf_stats.bufs_sent_pack += flush_count;
4044
4045 return rc;
4046}
4047EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4048
81ec5439
JW		 4049static void qeth_fill_tso_ext(struct qeth_hdr_tso *hdr,
4050 unsigned int payload_len, struct sk_buff *skb,
4051 unsigned int proto_len)
82bf5c08
JW		 4052{
4053 struct qeth_hdr_ext_tso *ext = &hdr->ext;
4054
4055 ext->hdr_tot_len = sizeof(*ext);
4056 ext->imb_hdr_no = 1;
4057 ext->hdr_type = 1;
4058 ext->hdr_version = 1;
4059 ext->hdr_len = 28;
4060 ext->payload_len = payload_len;
4061 ext->mss = skb_shinfo(skb)->gso_size;
4062 ext->dg_hdr_len = proto_len;
4063}
82bf5c08 4064
fc69660b
JW		 4065int qeth_xmit(struct qeth_card *card, struct sk_buff *skb,
4066 struct qeth_qdio_out_q *queue, int ipv, int cast_type,
4067 void (*fill_header)(struct qeth_card *card, struct qeth_hdr *hdr,
4068 struct sk_buff *skb, int ipv, int cast_type,
4069 unsigned int data_len))
4070{
82bf5c08 4071 unsigned int proto_len, hw_hdr_len;
fc69660b 4072 unsigned int frame_len = skb->len;
82bf5c08 4073 bool is_tso = skb_is_gso(skb);
fc69660b
JW		 4074 unsigned int data_offset = 0;
4075 struct qeth_hdr *hdr = NULL;
4076 unsigned int hd_len = 0;
4077 unsigned int elements;
4078 int push_len, rc;
4079 bool is_sg;
4080
82bf5c08
JW		 4081 if (is_tso) {
4082 hw_hdr_len = sizeof(struct qeth_hdr_tso);
4083 proto_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4084 } else {
4085 hw_hdr_len = sizeof(struct qeth_hdr);
81ec5439 4086 proto_len = (IS_IQD(card) && IS_LAYER2(card)) ? ETH_HLEN : 0;
82bf5c08
JW		 4087 }
4088
fc69660b
JW		 4089 rc = skb_cow_head(skb, hw_hdr_len);
4090 if (rc)
4091 return rc;
4092
4093 push_len = qeth_add_hw_header(card, skb, &hdr, hw_hdr_len, proto_len,
4094 &elements);
4095 if (push_len < 0)
4096 return push_len;
82bf5c08 4097 if (is_tso || !push_len) {
fc69660b
JW		 4098 /* HW header needs its own buffer element. */
4099 hd_len = hw_hdr_len + proto_len;
82bf5c08 4100 data_offset = push_len + proto_len;
fc69660b 4101 }
e517b649 4102 memset(hdr, 0, hw_hdr_len);
fc69660b 4103 fill_header(card, hdr, skb, ipv, cast_type, frame_len);
82bf5c08
JW		 4104 if (is_tso)
4105 qeth_fill_tso_ext((struct qeth_hdr_tso *) hdr,
4106 frame_len - proto_len, skb, proto_len);
fc69660b
JW		 4107
4108 is_sg = skb_is_nonlinear(skb);
4109 if (IS_IQD(card)) {
4110 rc = qeth_do_send_packet_fast(queue, skb, hdr, data_offset,
4111 hd_len);
4112 } else {
4113 /* TODO: drop skb_orphan() once TX completion is fast enough */
4114 skb_orphan(skb);
4115 rc = qeth_do_send_packet(card, queue, skb, hdr, data_offset,
4116 hd_len, elements);
4117 }
4118
4119 if (!rc) {
4120 if (card->options.performance_stats) {
4121 card->perf_stats.buf_elements_sent += elements;
4122 if (is_sg)
4123 card->perf_stats.sg_skbs_sent++;
82bf5c08
JW		 4124 if (is_tso) {
4125 card->perf_stats.large_send_bytes += frame_len;
4126 card->perf_stats.large_send_cnt++;
4127 }
fc69660b
JW		 4128 }
4129 } else {
4130 if (!push_len)
4131 kmem_cache_free(qeth_core_header_cache, hdr);
4132 if (rc == -EBUSY)
4133 /* roll back to ETH header */
4134 skb_pull(skb, push_len);
4135 }
4136 return rc;
4137}
4138EXPORT_SYMBOL_GPL(qeth_xmit);
4139
4a71df50
FB		 4140static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4141 struct qeth_reply *reply, unsigned long data)
4142{
686c97ee 4143 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4a71df50
FB		 4144 struct qeth_ipacmd_setadpparms *setparms;
4145
847a50fd 4146 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50 4147
4a71df50 4148 setparms = &(cmd->data.setadapterparms);
686c97ee 4149 if (qeth_setadpparms_inspect_rc(cmd)) {
8a593148 4150 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4151 setparms->data.mode = SET_PROMISC_MODE_OFF;
4152 }
4153 card->info.promisc_mode = setparms->data.mode;
742d4d40 4154 return (cmd->hdr.return_code) ? -EIO : 0;
4a71df50
FB		 4155}
4156
4157void qeth_setadp_promisc_mode(struct qeth_card *card)
4158{
4159 enum qeth_ipa_promisc_modes mode;
4160 struct net_device *dev = card->dev;
4161 struct qeth_cmd_buffer *iob;
4162 struct qeth_ipa_cmd *cmd;
4163
847a50fd 4164 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4165
4166 if (((dev->flags & IFF_PROMISC) &&
4167 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4168 (!(dev->flags & IFF_PROMISC) &&
4169 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4170 return;
4171 mode = SET_PROMISC_MODE_OFF;
4172 if (dev->flags & IFF_PROMISC)
4173 mode = SET_PROMISC_MODE_ON;
847a50fd 4174 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4175
4176 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4177 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4178 if (!iob)
4179 return;
ff5caa7a 4180 cmd = __ipa_cmd(iob);
4a71df50
FB		 4181 cmd->data.setadapterparms.data.mode = mode;
4182 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4183}
4184EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4185
4a71df50
FB		 4186struct net_device_stats *qeth_get_stats(struct net_device *dev)
4187{
4188 struct qeth_card *card;
4189
509e2562 4190 card = dev->ml_priv;
4a71df50 4191
847a50fd 4192 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4193
4194 return &card->stats;
4195}
4196EXPORT_SYMBOL_GPL(qeth_get_stats);
4197
4198static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4199 struct qeth_reply *reply, unsigned long data)
4200{
686c97ee 4201 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
b144b99f 4202 struct qeth_ipacmd_setadpparms *adp_cmd;
4a71df50 4203
847a50fd 4204 QETH_CARD_TEXT(card, 4, "chgmaccb");
686c97ee 4205 if (qeth_setadpparms_inspect_rc(cmd))
4b7ae122 4206 return -EIO;
4a71df50 4207
b144b99f 4208 adp_cmd = &cmd->data.setadapterparms;
4b7ae122
JW		 4209 if (!is_valid_ether_addr(adp_cmd->data.change_addr.addr))
4210 return -EADDRNOTAVAIL;
4211
b144b99f
JW		 4212 if (IS_LAYER2(card) && IS_OSD(card) && !IS_VM_NIC(card) &&
4213 !(adp_cmd->hdr.flags & QETH_SETADP_FLAGS_VIRTUAL_MAC))
4b7ae122 4214 return -EADDRNOTAVAIL;
b144b99f
JW		 4215
4216 ether_addr_copy(card->dev->dev_addr, adp_cmd->data.change_addr.addr);
4a71df50
FB		 4217 return 0;
4218}
4219
4220int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4221{
4222 int rc;
4223 struct qeth_cmd_buffer *iob;
4224 struct qeth_ipa_cmd *cmd;
4225
847a50fd 4226 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4227
4228 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4229 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4230 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4231 if (!iob)
4232 return -ENOMEM;
ff5caa7a 4233 cmd = __ipa_cmd(iob);
4a71df50 4234 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
99f0b85d
JW		 4235 cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
4236 ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
4237 card->dev->dev_addr);
4a71df50
FB		 4238 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4239 NULL);
4240 return rc;
4241}
4242EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4243
d64ecc22
EL		 4244static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4245 struct qeth_reply *reply, unsigned long data)
4246{
686c97ee 4247 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
d64ecc22 4248 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4249 int fallback = *(int *)reply->param;
d64ecc22 4250
847a50fd 4251 QETH_CARD_TEXT(card, 4, "setaccb");
686c97ee 4252 if (cmd->hdr.return_code)
742d4d40 4253 return -EIO;
686c97ee 4254 qeth_setadpparms_inspect_rc(cmd);
d64ecc22 4255
d64ecc22
EL		 4256 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4257 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4258 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4259 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4260 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4261 if (cmd->data.setadapterparms.hdr.return_code !=
4262 SET_ACCESS_CTRL_RC_SUCCESS)
e19e5be8
JW		 4263 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%#x) on device %x: %#x\n",
4264 access_ctrl_req->subcmd_code, CARD_DEVID(card),
4265 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4266 switch (cmd->data.setadapterparms.hdr.return_code) {
4267 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4268 if (card->options.isolation == ISOLATION_MODE_NONE) {
4269 dev_info(&card->gdev->dev,
4270 "QDIO data connection isolation is deactivated\n");
4271 } else {
4272 dev_info(&card->gdev->dev,
4273 "QDIO data connection isolation is activated\n");
4274 }
d64ecc22 4275 break;
0f54761d 4276 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
e19e5be8
JW		 4277 QETH_DBF_MESSAGE(2, "QDIO data connection isolation on device %x already deactivated\n",
4278 CARD_DEVID(card));
0f54761d
SR		 4279 if (fallback)
4280 card->options.isolation = card->options.prev_isolation;
4281 break;
4282 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
e19e5be8
JW		 4283 QETH_DBF_MESSAGE(2, "QDIO data connection isolation on device %x already activated\n",
4284 CARD_DEVID(card));
0f54761d
SR		 4285 if (fallback)
4286 card->options.isolation = card->options.prev_isolation;
4287 break;
d64ecc22 4288 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4289 dev_err(&card->gdev->dev, "Adapter does not "
4290 "support QDIO data connection isolation\n");
d64ecc22 4291 break;
d64ecc22 4292 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4293 dev_err(&card->gdev->dev,
4294 "Adapter is dedicated. "
4295 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4296 if (fallback)
4297 card->options.isolation = card->options.prev_isolation;
d64ecc22 4298 break;
d64ecc22 4299 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4300 dev_err(&card->gdev->dev,
4301 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4302 if (fallback)
4303 card->options.isolation = card->options.prev_isolation;
4304 break;
4305 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4306 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4307 "support reflective relay mode\n");
4308 if (fallback)
4309 card->options.isolation = card->options.prev_isolation;
4310 break;
4311 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4312 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4313 "enabled at the adjacent switch port");
4314 if (fallback)
4315 card->options.isolation = card->options.prev_isolation;
4316 break;
4317 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4318 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4319 "at the adjacent switch failed\n");
d64ecc22 4320 break;
d64ecc22 4321 default:
d64ecc22 4322 /* this should never happen */
0f54761d
SR		 4323 if (fallback)
4324 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4325 break;
4326 }
742d4d40 4327 return (cmd->hdr.return_code) ? -EIO : 0;
d64ecc22
EL		 4328}
4329
4330static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4331 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4332{
4333 int rc;
4334 struct qeth_cmd_buffer *iob;
4335 struct qeth_ipa_cmd *cmd;
4336 struct qeth_set_access_ctrl *access_ctrl_req;
4337
847a50fd 4338 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4339
4340 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4341 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4342
4343 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4344 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4345 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4346 if (!iob)
4347 return -ENOMEM;
ff5caa7a 4348 cmd = __ipa_cmd(iob);
d64ecc22
EL		 4349 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4350 access_ctrl_req->subcmd_code = isolation;
4351
4352 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4353 &fallback);
d64ecc22
EL		 4354 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4355 return rc;
4356}
4357
0f54761d 4358int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4359{
4360 int rc = 0;
4361
847a50fd 4362 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4363
5113fec0
UB		 4364 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4365 card->info.type == QETH_CARD_TYPE_OSX) &&
4366 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4367 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4368 card->options.isolation, fallback);
d64ecc22 4369 if (rc) {
e19e5be8
JW		 4370 QETH_DBF_MESSAGE(3, "IPA(SET_ACCESS_CTRL(%d) on device %x: sent failed\n",
4371 rc, CARD_DEVID(card));
0f54761d 4372 rc = -EOPNOTSUPP;
d64ecc22
EL		 4373 }
4374 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4375 card->options.isolation = ISOLATION_MODE_NONE;
4376
4377 dev_err(&card->gdev->dev, "Adapter does not "
4378 "support QDIO data connection isolation\n");
4379 rc = -EOPNOTSUPP;
4380 }
4381 return rc;
4382}
4383EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4384
4a71df50
FB		 4385void qeth_tx_timeout(struct net_device *dev)
4386{
4387 struct qeth_card *card;
4388
509e2562 4389 card = dev->ml_priv;
847a50fd 4390 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4391 card->stats.tx_errors++;
4392 qeth_schedule_recovery(card);
4393}
4394EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4395
942d6984 4396static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4397{
509e2562 4398 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4399 int rc = 0;
4400
4401 switch (regnum) {
4402 case MII_BMCR: /* Basic mode control register */
4403 rc = BMCR_FULLDPLX;
4404 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4405 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
54e049c2
JW		 4406 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH) &&
4407 (card->info.link_type != QETH_LINK_TYPE_25GBIT_ETH))
4a71df50
FB		 4408 rc |= BMCR_SPEED100;
4409 break;
4410 case MII_BMSR: /* Basic mode status register */
4411 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4412 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4413 BMSR_100BASE4;
4414 break;
4415 case MII_PHYSID1: /* PHYS ID 1 */
4416 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4417 dev->dev_addr[2];
4418 rc = (rc >> 5) & 0xFFFF;
4419 break;
4420 case MII_PHYSID2: /* PHYS ID 2 */
4421 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4422 break;
4423 case MII_ADVERTISE: /* Advertisement control reg */
4424 rc = ADVERTISE_ALL;
4425 break;
4426 case MII_LPA: /* Link partner ability reg */
4427 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4428 LPA_100BASE4 | LPA_LPACK;
4429 break;
4430 case MII_EXPANSION: /* Expansion register */
4431 break;
4432 case MII_DCOUNTER: /* disconnect counter */
4433 break;
4434 case MII_FCSCOUNTER: /* false carrier counter */
4435 break;
4436 case MII_NWAYTEST: /* N-way auto-neg test register */
4437 break;
4438 case MII_RERRCOUNTER: /* rx error counter */
4439 rc = card->stats.rx_errors;
4440 break;
4441 case MII_SREVISION: /* silicon revision */
4442 break;
4443 case MII_RESV1: /* reserved 1 */
4444 break;
4445 case MII_LBRERROR: /* loopback, rx, bypass error */
4446 break;
4447 case MII_PHYADDR: /* physical address */
4448 break;
4449 case MII_RESV2: /* reserved 2 */
4450 break;
4451 case MII_TPISTATUS: /* TPI status for 10mbps */
4452 break;
4453 case MII_NCONFIG: /* network interface config */
4454 break;
4455 default:
4456 break;
4457 }
4458 return rc;
4459}
4a71df50 4460
4a71df50
FB		 4461static int qeth_snmp_command_cb(struct qeth_card *card,
4462 struct qeth_reply *reply, unsigned long sdata)
4463{
4464 struct qeth_ipa_cmd *cmd;
4465 struct qeth_arp_query_info *qinfo;
4a71df50 4466 unsigned char *data;
9a764c1e 4467 void *snmp_data;
4a71df50
FB		 4468 __u16 data_len;
4469
847a50fd 4470 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4471
4472 cmd = (struct qeth_ipa_cmd *) sdata;
4473 data = (unsigned char *)((char *)cmd - reply->offset);
4474 qinfo = (struct qeth_arp_query_info *) reply->param;
4a71df50
FB		 4475
4476 if (cmd->hdr.return_code) {
8a593148 4477 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4b7ae122 4478 return -EIO;
4a71df50
FB		 4479 }
4480 if (cmd->data.setadapterparms.hdr.return_code) {
4481 cmd->hdr.return_code =
4482 cmd->data.setadapterparms.hdr.return_code;
8a593148 4483 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4b7ae122 4484 return -EIO;
4a71df50
FB		 4485 }
4486 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
9a764c1e
JW		 4487 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4488 snmp_data = &cmd->data.setadapterparms.data.snmp;
4489 data_len -= offsetof(struct qeth_ipa_cmd,
4490 data.setadapterparms.data.snmp);
4491 } else {
4492 snmp_data = &cmd->data.setadapterparms.data.snmp.request;
4493 data_len -= offsetof(struct qeth_ipa_cmd,
4494 data.setadapterparms.data.snmp.request);
4495 }
4a71df50
FB		 4496
4497 /* check if there is enough room in userspace */
4498 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4b7ae122
JW		 4499 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOSPC);
4500 return -ENOSPC;
4a71df50 4501 }
847a50fd 4502 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4503 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4504 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4505 cmd->data.setadapterparms.hdr.seq_no);
4506 /*copy entries to user buffer*/
9a764c1e 4507 memcpy(qinfo->udata + qinfo->udata_offset, snmp_data, data_len);
4a71df50 4508 qinfo->udata_offset += data_len;
9a764c1e 4509
4a71df50 4510 /* check if all replies received ... */
847a50fd 4511 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4512 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4513 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4514 cmd->data.setadapterparms.hdr.seq_no);
4515 if (cmd->data.setadapterparms.hdr.seq_no <
4516 cmd->data.setadapterparms.hdr.used_total)
4517 return 1;
4518 return 0;
4519}
4520
942d6984 4521static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4522{
4523 struct qeth_cmd_buffer *iob;
4524 struct qeth_ipa_cmd *cmd;
4525 struct qeth_snmp_ureq *ureq;
6fb392b1 4526 unsigned int req_len;
4a71df50
FB		 4527 struct qeth_arp_query_info qinfo = {0, };
4528 int rc = 0;
4529
847a50fd 4530 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4531
4532 if (card->info.guestlan)
4533 return -EOPNOTSUPP;
4534
4535 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4fda3354 4536 IS_LAYER3(card))
4a71df50 4537 return -EOPNOTSUPP;
4fda3354 4538
4a71df50
FB		 4539 /* skip 4 bytes (data_len struct member) to get req_len */
4540 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4541 return -EFAULT;
6fb392b1
UB		 4542 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4543 sizeof(struct qeth_ipacmd_hdr) -
4544 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4545 return -EINVAL;
4986f3f0
JL		 4546 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4547 if (IS_ERR(ureq)) {
847a50fd 4548 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4549 return PTR_ERR(ureq);
4a71df50
FB		 4550 }
4551 qinfo.udata_len = ureq->hdr.data_len;
4552 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4553 if (!qinfo.udata) {
4554 kfree(ureq);
4555 return -ENOMEM;
4556 }
4557 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4558
4559 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4560 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4561 if (!iob) {
4562 rc = -ENOMEM;
4563 goto out;
4564 }
c2153277
JW		 4565
4566 /* for large requests, fix-up the length fields: */
4567 qeth_prepare_ipa_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len);
4568
ff5caa7a 4569 cmd = __ipa_cmd(iob);
4a71df50 4570 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
c2153277 4571 rc = qeth_send_ipa_cmd(card, iob, qeth_snmp_command_cb, &qinfo);
4a71df50 4572 if (rc)
e19e5be8
JW		 4573 QETH_DBF_MESSAGE(2, "SNMP command failed on device %x: (%#x)\n",
4574 CARD_DEVID(card), rc);
4a71df50
FB		 4575 else {
4576 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4577 rc = -EFAULT;
4578 }
1aec42bc 4579out:
4a71df50
FB		 4580 kfree(ureq);
4581 kfree(qinfo.udata);
4582 return rc;
4583}
4a71df50 4584
c3ab96f3
FB		 4585static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4586 struct qeth_reply *reply, unsigned long data)
4587{
686c97ee 4588 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
c3ab96f3
FB		 4589 struct qeth_qoat_priv *priv;
4590 char *resdata;
4591 int resdatalen;
4592
4593 QETH_CARD_TEXT(card, 3, "qoatcb");
686c97ee 4594 if (qeth_setadpparms_inspect_rc(cmd))
4b7ae122 4595 return -EIO;
c3ab96f3 4596
c3ab96f3
FB		 4597 priv = (struct qeth_qoat_priv *)reply->param;
4598 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4599 resdata = (char *)data + 28;
4600
4b7ae122
JW		 4601 if (resdatalen > (priv->buffer_len - priv->response_len))
4602 return -ENOSPC;
c3ab96f3
FB		 4603
4604 memcpy((priv->buffer + priv->response_len), resdata,
4605 resdatalen);
4606 priv->response_len += resdatalen;
4607
4608 if (cmd->data.setadapterparms.hdr.seq_no <
4609 cmd->data.setadapterparms.hdr.used_total)
4610 return 1;
4611 return 0;
4612}
4613
942d6984 4614static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4615{
4616 int rc = 0;
4617 struct qeth_cmd_buffer *iob;
4618 struct qeth_ipa_cmd *cmd;
4619 struct qeth_query_oat *oat_req;
4620 struct qeth_query_oat_data oat_data;
4621 struct qeth_qoat_priv priv;
4622 void __user *tmp;
4623
4624 QETH_CARD_TEXT(card, 3, "qoatcmd");
4625
4626 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4627 rc = -EOPNOTSUPP;
4628 goto out;
4629 }
4630
4631 if (copy_from_user(&oat_data, udata,
4632 sizeof(struct qeth_query_oat_data))) {
4633 rc = -EFAULT;
4634 goto out;
4635 }
4636
4637 priv.buffer_len = oat_data.buffer_len;
4638 priv.response_len = 0;
aec45e85 4639 priv.buffer = vzalloc(oat_data.buffer_len);
c3ab96f3
FB		 4640 if (!priv.buffer) {
4641 rc = -ENOMEM;
4642 goto out;
4643 }
4644
4645 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4646 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4647 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4648 if (!iob) {
4649 rc = -ENOMEM;
4650 goto out_free;
4651 }
ff5caa7a 4652 cmd = __ipa_cmd(iob);
c3ab96f3
FB		 4653 oat_req = &cmd->data.setadapterparms.data.query_oat;
4654 oat_req->subcmd_code = oat_data.command;
4655
4656 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4657 &priv);
4658 if (!rc) {
4659 if (is_compat_task())
4660 tmp = compat_ptr(oat_data.ptr);
4661 else
4662 tmp = (void __user *)(unsigned long)oat_data.ptr;
4663
4664 if (copy_to_user(tmp, priv.buffer,
4665 priv.response_len)) {
4666 rc = -EFAULT;
4667 goto out_free;
4668 }
4669
4670 oat_data.response_len = priv.response_len;
4671
4672 if (copy_to_user(udata, &oat_data,
4673 sizeof(struct qeth_query_oat_data)))
4674 rc = -EFAULT;
4b7ae122 4675 }
c3ab96f3
FB		 4676
4677out_free:
aec45e85 4678 vfree(priv.buffer);
c3ab96f3
FB		 4679out:
4680 return rc;
4681}
c3ab96f3 4682
e71e4072
HC		 4683static int qeth_query_card_info_cb(struct qeth_card *card,
4684 struct qeth_reply *reply, unsigned long data)
02d5cb5b 4685{
686c97ee
JW		 4686 struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
4687 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
02d5cb5b 4688 struct qeth_query_card_info *card_info;
02d5cb5b
EC		 4689
4690 QETH_CARD_TEXT(card, 2, "qcrdincb");
686c97ee 4691 if (qeth_setadpparms_inspect_rc(cmd))
742d4d40 4692 return -EIO;
02d5cb5b 4693
686c97ee
JW		 4694 card_info = &cmd->data.setadapterparms.data.card_info;
4695 carrier_info->card_type = card_info->card_type;
4696 carrier_info->port_mode = card_info->port_mode;
4697 carrier_info->port_speed = card_info->port_speed;
02d5cb5b
EC		 4698 return 0;
4699}
4700
bca51650 4701static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4702 struct carrier_info *carrier_info)
4703{
4704 struct qeth_cmd_buffer *iob;
4705
4706 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4707 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4708 return -EOPNOTSUPP;
4709 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4710 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4711 if (!iob)
4712 return -ENOMEM;
02d5cb5b
EC		 4713 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4714 (void *)carrier_info);
4715}
02d5cb5b 4716
ec61bd2f
JW		 4717/**
4718 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4719 * @card: pointer to a qeth_card
4720 *
4721 * Returns
4722 * 0, if a MAC address has been set for the card's netdevice
4723 * a return code, for various error conditions
4724 */
4725int qeth_vm_request_mac(struct qeth_card *card)
4726{
4727 struct diag26c_mac_resp *response;
4728 struct diag26c_mac_req *request;
4729 struct ccw_dev_id id;
4730 int rc;
4731
4732 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4733
ec61bd2f
JW		 4734 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4735 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4736 if (!request || !response) {
4737 rc = -ENOMEM;
4738 goto out;
4739 }
4740
46646105 4741 ccw_device_get_id(CARD_DDEV(card), &id);
ec61bd2f
JW		 4742 request->resp_buf_len = sizeof(*response);
4743 request->resp_version = DIAG26C_VERSION2;
4744 request->op_code = DIAG26C_GET_MAC;
4745 request->devno = id.devno;
4746
615dff22 4747 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f 4748 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
615dff22 4749 QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
ec61bd2f
JW		 4750 if (rc)
4751 goto out;
615dff22 4752 QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
ec61bd2f
JW		 4753
4754 if (request->resp_buf_len < sizeof(*response) ||
4755 response->version != request->resp_version) {
4756 rc = -EIO;
4757 QETH_DBF_TEXT(SETUP, 2, "badresp");
4758 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4759 sizeof(request->resp_buf_len));
4760 } else if (!is_valid_ether_addr(response->mac)) {
4761 rc = -EINVAL;
4762 QETH_DBF_TEXT(SETUP, 2, "badmac");
4763 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4764 } else {
4765 ether_addr_copy(card->dev->dev_addr, response->mac);
4766 }
4767
4768out:
4769 kfree(response);
4770 kfree(request);
4771 return rc;
4772}
4773EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4774
cef6ff22 4775static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4776{
aa59004b
JW		 4777 if (card->info.type == QETH_CARD_TYPE_IQD)
4778 return QDIO_IQDIO_QFMT;
4779 else
4780 return QDIO_QETH_QFMT;
4a71df50
FB		 4781}
4782
d0ff1f52
UB		 4783static void qeth_determine_capabilities(struct qeth_card *card)
4784{
4785 int rc;
4786 int length;
4787 char *prcd;
4788 struct ccw_device *ddev;
4789 int ddev_offline = 0;
4790
4791 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4792 ddev = CARD_DDEV(card);
4793 if (!ddev->online) {
4794 ddev_offline = 1;
4795 rc = ccw_device_set_online(ddev);
4796 if (rc) {
4797 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4798 goto out;
4799 }
4800 }
4801
4802 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4803 if (rc) {
e19e5be8
JW		 4804 QETH_DBF_MESSAGE(2, "qeth_read_conf_data on device %x returned %i\n",
4805 CARD_DEVID(card), rc);
d0ff1f52
UB		 4806 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4807 goto out_offline;
4808 }
4809 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4810 if (ddev_offline)
4811 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4812 kfree(prcd);
4813
4814 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4815 if (rc)
4816 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4817
0da9581d 4818 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4819 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4820 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4821 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4822 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4823 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4824 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4825 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4826 dev_info(&card->gdev->dev,
4827 "Completion Queueing supported\n");
4828 } else {
4829 card->options.cq = QETH_CQ_NOTAVAILABLE;
4830 }
4831
4832
d0ff1f52
UB		 4833out_offline:
4834 if (ddev_offline == 1)
4835 ccw_device_set_offline(ddev);
4836out:
4837 return;
4838}
4839
cef6ff22
JW		 4840static void qeth_qdio_establish_cq(struct qeth_card *card,
4841 struct qdio_buffer **in_sbal_ptrs,
4842 void (**queue_start_poll)
4843 (struct ccw_device *, int,
4844 unsigned long))
4845{
0da9581d
EL		 4846 int i;
4847
4848 if (card->options.cq == QETH_CQ_ENABLED) {
4849 int offset = QDIO_MAX_BUFFERS_PER_Q *
4850 (card->qdio.no_in_queues - 1);
0da9581d
EL		 4851 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4852 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4853 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4854 }
4855
4856 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4857 }
4858}
4859
4a71df50
FB		 4860static int qeth_qdio_establish(struct qeth_card *card)
4861{
4862 struct qdio_initialize init_data;
4863 char *qib_param_field;
4864 struct qdio_buffer **in_sbal_ptrs;
104ea556 4865 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4866 struct qdio_buffer **out_sbal_ptrs;
4867 int i, j, k;
4868 int rc = 0;
4869
d11ba0c4 4870 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50 4871
6396bb22
KC		 4872 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q,
4873 GFP_KERNEL);
104ea556 4874 if (!qib_param_field) {
4875 rc = -ENOMEM;
4876 goto out_free_nothing;
4877 }
4a71df50
FB		 4878
4879 qeth_create_qib_param_field(card, qib_param_field);
4880 qeth_create_qib_param_field_blkt(card, qib_param_field);
4881
6396bb22
KC		 4882 in_sbal_ptrs = kcalloc(card->qdio.no_in_queues * QDIO_MAX_BUFFERS_PER_Q,
4883 sizeof(void *),
4a71df50
FB		 4884 GFP_KERNEL);
4885 if (!in_sbal_ptrs) {
104ea556 4886 rc = -ENOMEM;
4887 goto out_free_qib_param;
4a71df50 4888 }
0da9581d 4889 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4890 in_sbal_ptrs[i] = (struct qdio_buffer *)
4891 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4892 }
4a71df50 4893
6396bb22 4894 queue_start_poll = kcalloc(card->qdio.no_in_queues, sizeof(void *),
0da9581d 4895 GFP_KERNEL);
104ea556 4896 if (!queue_start_poll) {
4897 rc = -ENOMEM;
4898 goto out_free_in_sbals;
4899 }
0da9581d 4900 for (i = 0; i < card->qdio.no_in_queues; ++i)
7bcd64eb 4901 queue_start_poll[i] = qeth_qdio_start_poll;
0da9581d
EL		 4902
4903 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4904
4a71df50 4905 out_sbal_ptrs =
6396bb22
KC		 4906 kcalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q,
4907 sizeof(void *),
4908 GFP_KERNEL);
4a71df50 4909 if (!out_sbal_ptrs) {
104ea556 4910 rc = -ENOMEM;
4911 goto out_free_queue_start_poll;
4a71df50
FB		 4912 }
4913 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4914 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4915 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4916 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4917 }
4918
4919 memset(&init_data, 0, sizeof(struct qdio_initialize));
4920 init_data.cdev = CARD_DDEV(card);
4921 init_data.q_format = qeth_get_qdio_q_format(card);
4922 init_data.qib_param_field_format = 0;
4923 init_data.qib_param_field = qib_param_field;
0da9581d 4924 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4925 init_data.no_output_qs = card->qdio.no_out_queues;
7bcd64eb
JW		 4926 init_data.input_handler = qeth_qdio_input_handler;
4927 init_data.output_handler = qeth_qdio_output_handler;
e58b0d90 4928 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4929 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4930 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4931 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4932 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4933 init_data.scan_threshold =
0fa81cd4 4934 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4935
4936 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4937 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4938 rc = qdio_allocate(&init_data);
4939 if (rc) {
4940 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4941 goto out;
4942 }
4943 rc = qdio_establish(&init_data);
4944 if (rc) {
4a71df50 4945 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4946 qdio_free(CARD_DDEV(card));
4947 }
4a71df50 4948 }
0da9581d
EL		 4949
4950 switch (card->options.cq) {
4951 case QETH_CQ_ENABLED:
4952 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4953 break;
4954 case QETH_CQ_DISABLED:
4955 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4956 break;
4957 default:
4958 break;
4959 }
cc961d40 4960out:
4a71df50 4961 kfree(out_sbal_ptrs);
104ea556 4962out_free_queue_start_poll:
4963 kfree(queue_start_poll);
4964out_free_in_sbals:
4a71df50 4965 kfree(in_sbal_ptrs);
104ea556 4966out_free_qib_param:
4a71df50 4967 kfree(qib_param_field);
104ea556 4968out_free_nothing:
4a71df50
FB		 4969 return rc;
4970}
4971
4972static void qeth_core_free_card(struct qeth_card *card)
4973{
d11ba0c4
PT		 4974 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4975 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4976 qeth_clean_channel(&card->read);
4977 qeth_clean_channel(&card->write);
f15cdaf2 4978 qeth_clean_channel(&card->data);
c0a2e4d1 4979 destroy_workqueue(card->event_wq);
4a71df50 4980 qeth_free_qdio_buffers(card);
6bcac508 4981 unregister_service_level(&card->qeth_service_level);
a2eb0ad5 4982 dev_set_drvdata(&card->gdev->dev, NULL);
4a71df50
FB		 4983 kfree(card);
4984}
4985
395672e0
SR		 4986void qeth_trace_features(struct qeth_card *card)
4987{
4988 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 4989 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
4990 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
4991 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
4992 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
4993 sizeof(card->info.diagass_support));
395672e0
SR		 4994}
4995EXPORT_SYMBOL_GPL(qeth_trace_features);
4996
4a71df50 4997static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4998 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4999 .driver_info = QETH_CARD_TYPE_OSD},
5000 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5001 .driver_info = QETH_CARD_TYPE_IQD},
5002 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5003 .driver_info = QETH_CARD_TYPE_OSN},
5004 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5005 .driver_info = QETH_CARD_TYPE_OSM},
5006 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5007 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5008 {},
5009};
5010MODULE_DEVICE_TABLE(ccw, qeth_ids);
5011
5012static struct ccw_driver qeth_ccw_driver = {
3bda058b 5013 .driver = {
3e70b3b8 5014 .owner = THIS_MODULE,
3bda058b
SO		 5015 .name = "qeth",
5016 },
4a71df50
FB		 5017 .ids = qeth_ids,
5018 .probe = ccwgroup_probe_ccwdev,
5019 .remove = ccwgroup_remove_ccwdev,
5020};
5021
9fae5c3b 5022int qeth_core_hardsetup_card(struct qeth_card *card, bool *carrier_ok)
4a71df50 5023{
6ebb7f8d 5024 int retries = 3;
4a71df50
FB		 5025 int rc;
5026
d11ba0c4 5027 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5028 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5029 qeth_update_from_chp_desc(card);
4a71df50 5030retry:
6ebb7f8d 5031 if (retries < 3)
e19e5be8
JW		 5032 QETH_DBF_MESSAGE(2, "Retrying to do IDX activates on device %x.\n",
5033 CARD_DEVID(card));
22ae2790 5034 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5035 ccw_device_set_offline(CARD_DDEV(card));
5036 ccw_device_set_offline(CARD_WDEV(card));
5037 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5038 qdio_free(CARD_DDEV(card));
aa909224
UB		 5039 rc = ccw_device_set_online(CARD_RDEV(card));
5040 if (rc)
5041 goto retriable;
5042 rc = ccw_device_set_online(CARD_WDEV(card));
5043 if (rc)
5044 goto retriable;
5045 rc = ccw_device_set_online(CARD_DDEV(card));
5046 if (rc)
5047 goto retriable;
aa909224 5048retriable:
4a71df50 5049 if (rc == -ERESTARTSYS) {
d11ba0c4 5050 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5051 return rc;
5052 } else if (rc) {
d11ba0c4 5053 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5054 if (--retries < 0)
4a71df50
FB		 5055 goto out;
5056 else
5057 goto retry;
5058 }
d0ff1f52 5059 qeth_determine_capabilities(card);
4a71df50
FB		 5060 qeth_init_tokens(card);
5061 qeth_init_func_level(card);
8d908eb0 5062 rc = qeth_idx_activate_channel(card, &card->read, qeth_idx_read_cb);
4a71df50 5063 if (rc == -ERESTARTSYS) {
d11ba0c4 5064 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5065 return rc;
5066 } else if (rc) {
d11ba0c4 5067 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5068 if (--retries < 0)
5069 goto out;
5070 else
5071 goto retry;
5072 }
8d908eb0 5073 rc = qeth_idx_activate_channel(card, &card->write, qeth_idx_write_cb);
4a71df50 5074 if (rc == -ERESTARTSYS) {
d11ba0c4 5075 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5076 return rc;
5077 } else if (rc) {
d11ba0c4 5078 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5079 if (--retries < 0)
5080 goto out;
5081 else
5082 goto retry;
5083 }
908abbb5 5084 card->read_or_write_problem = 0;
4a71df50
FB		 5085 rc = qeth_mpc_initialize(card);
5086 if (rc) {
d11ba0c4 5087 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5088 goto out;
5089 }
1da74b1c 5090
10340510
JW		 5091 rc = qeth_send_startlan(card);
5092 if (rc) {
5093 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4b7ae122
JW		 5094 if (rc == -ENETDOWN) {
5095 dev_warn(&card->gdev->dev, "The LAN is offline\n");
9fae5c3b 5096 *carrier_ok = false;
10340510 5097 } else {
10340510
JW		 5098 goto out;
5099 }
91cc98f5 5100 } else {
9fae5c3b
JW		 5101 *carrier_ok = true;
5102 }
5103
1da74b1c 5104 card->options.ipa4.supported_funcs = 0;
4d7def2a 5105 card->options.ipa6.supported_funcs = 0;
1da74b1c 5106 card->options.adp.supported_funcs = 0;
b4d72c08 5107 card->options.sbp.supported_funcs = 0;
1da74b1c 5108 card->info.diagass_support = 0;
1aec42bc
TR		 5109 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5110 if (rc == -ENOMEM)
5111 goto out;
ee75fb86
KM		 5112 if (qeth_is_supported(card, IPA_IPV6)) {
5113 rc = qeth_query_ipassists(card, QETH_PROT_IPV6);
5114 if (rc == -ENOMEM)
5115 goto out;
5116 }
1aec42bc
TR		 5117 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5118 rc = qeth_query_setadapterparms(card);
5119 if (rc < 0) {
10340510 5120 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5121 goto out;
5122 }
5123 }
5124 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5125 rc = qeth_query_setdiagass(card);
5126 if (rc < 0) {
10340510 5127 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5128 goto out;
5129 }
5130 }
4a71df50
FB		 5131 return 0;
5132out:
74eacdb9
FB		 5133 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5134 "an error on the device\n");
e19e5be8
JW		 5135 QETH_DBF_MESSAGE(2, "Initialization for device %x failed in hardsetup! rc=%d\n",
5136 CARD_DEVID(card), rc);
4a71df50
FB		 5137 return rc;
5138}
5139EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5140
8d68af6a
JW		 5141static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5142 struct sk_buff *skb, int offset, int data_len)
4a71df50
FB		 5143{
5144 struct page *page = virt_to_page(element->addr);
b6f72f96 5145 unsigned int next_frag;
b3332930 5146
8d68af6a
JW		 5147 /* first fill the linear space */
5148 if (!skb->len) {
5149 unsigned int linear = min(data_len, skb_tailroom(skb));
0da9581d 5150
8d68af6a
JW		 5151 skb_put_data(skb, element->addr + offset, linear);
5152 data_len -= linear;
5153 if (!data_len)
5154 return;
5155 offset += linear;
5156 /* fall through to add page frag for remaining data */
4a71df50 5157 }
0da9581d 5158
8d68af6a 5159 next_frag = skb_shinfo(skb)->nr_frags;
b6f72f96 5160 get_page(page);
8d68af6a 5161 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
4a71df50
FB		 5162}
5163
bca51650
TR		 5164static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5165{
5166 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5167}
5168
4a71df50 5169struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5170 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5171 struct qdio_buffer_element **__element, int *__offset,
5172 struct qeth_hdr **hdr)
5173{
5174 struct qdio_buffer_element *element = *__element;
b3332930 5175 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50 5176 int offset = *__offset;
8d68af6a 5177 struct sk_buff *skb;
76b11f8e 5178 int skb_len = 0;
4a71df50
FB		 5179 void *data_ptr;
5180 int data_len;
5181 int headroom = 0;
5182 int use_rx_sg = 0;
4a71df50 5183
4a71df50 5184 /* qeth_hdr must not cross element boundaries */
864c17c3 5185 while (element->length < offset + sizeof(struct qeth_hdr)) {
4a71df50
FB		 5186 if (qeth_is_last_sbale(element))
5187 return NULL;
5188 element++;
5189 offset = 0;
4a71df50
FB		 5190 }
5191 *hdr = element->addr + offset;
5192
5193 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5194 switch ((*hdr)->hdr.l2.id) {
5195 case QETH_HEADER_TYPE_LAYER2:
5196 skb_len = (*hdr)->hdr.l2.pkt_length;
5197 break;
5198 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5199 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5200 headroom = ETH_HLEN;
76b11f8e
UB		 5201 break;
5202 case QETH_HEADER_TYPE_OSN:
5203 skb_len = (*hdr)->hdr.osn.pdu_length;
5204 headroom = sizeof(struct qeth_hdr);
5205 break;
5206 default:
5207 break;
4a71df50
FB		 5208 }
5209
5210 if (!skb_len)
5211 return NULL;
5212
b3332930
FB		 5213 if (((skb_len >= card->options.rx_sg_cb) &&
5214 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5215 (!atomic_read(&card->force_alloc_skb))) ||
8d68af6a 5216 (card->options.cq == QETH_CQ_ENABLED))
4a71df50 5217 use_rx_sg = 1;
8d68af6a
JW		 5218
5219 if (use_rx_sg && qethbuffer->rx_skb) {
5220 /* QETH_CQ_ENABLED only: */
5221 skb = qethbuffer->rx_skb;
5222 qethbuffer->rx_skb = NULL;
4a71df50 5223 } else {
8d68af6a
JW		 5224 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5225
37cf05d2 5226 skb = napi_alloc_skb(&card->napi, linear + headroom);
4a71df50 5227 }
8d68af6a
JW		 5228 if (!skb)
5229 goto no_mem;
5230 if (headroom)
5231 skb_reserve(skb, headroom);
4a71df50
FB		 5232
5233 data_ptr = element->addr + offset;
5234 while (skb_len) {
5235 data_len = min(skb_len, (int)(element->length - offset));
5236 if (data_len) {
8d68af6a
JW		 5237 if (use_rx_sg)
5238 qeth_create_skb_frag(element, skb, offset,
5239 data_len);
5240 else
59ae1d12 5241 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5242 }
5243 skb_len -= data_len;
5244 if (skb_len) {
5245 if (qeth_is_last_sbale(element)) {
847a50fd 5246 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5247 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5248 dev_kfree_skb_any(skb);
5249 card->stats.rx_errors++;
5250 return NULL;
5251 }
5252 element++;
5253 offset = 0;
5254 data_ptr = element->addr;
5255 } else {
5256 offset += data_len;
5257 }
5258 }
5259 *__element = element;
5260 *__offset = offset;
5261 if (use_rx_sg && card->options.performance_stats) {
5262 card->perf_stats.sg_skbs_rx++;
5263 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5264 }
5265 return skb;
5266no_mem:
5267 if (net_ratelimit()) {
847a50fd 5268 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5269 }
5270 card->stats.rx_dropped++;
5271 return NULL;
5272}
5273EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5274
d73ef324
JW		 5275int qeth_poll(struct napi_struct *napi, int budget)
5276{
5277 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5278 int work_done = 0;
5279 struct qeth_qdio_buffer *buffer;
5280 int done;
5281 int new_budget = budget;
5282
d73ef324
JW		 5283 while (1) {
5284 if (!card->rx.b_count) {
5285 card->rx.qdio_err = 0;
5286 card->rx.b_count = qdio_get_next_buffers(
5287 card->data.ccwdev, 0, &card->rx.b_index,
5288 &card->rx.qdio_err);
5289 if (card->rx.b_count <= 0) {
5290 card->rx.b_count = 0;
5291 break;
5292 }
5293 card->rx.b_element =
5294 &card->qdio.in_q->bufs[card->rx.b_index]
5295 .buffer->element[0];
5296 card->rx.e_offset = 0;
5297 }
5298
5299 while (card->rx.b_count) {
5300 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5301 if (!(card->rx.qdio_err &&
5302 qeth_check_qdio_errors(card, buffer->buffer,
5303 card->rx.qdio_err, "qinerr")))
5304 work_done +=
5305 card->discipline->process_rx_buffer(
5306 card, new_budget, &done);
5307 else
5308 done = 1;
5309
5310 if (done) {
5311 if (card->options.performance_stats)
5312 card->perf_stats.bufs_rec++;
5313 qeth_put_buffer_pool_entry(card,
5314 buffer->pool_entry);
5315 qeth_queue_input_buffer(card, card->rx.b_index);
5316 card->rx.b_count--;
5317 if (card->rx.b_count) {
5318 card->rx.b_index =
5319 (card->rx.b_index + 1) %
5320 QDIO_MAX_BUFFERS_PER_Q;
5321 card->rx.b_element =
5322 &card->qdio.in_q
5323 ->bufs[card->rx.b_index]
5324 .buffer->element[0];
5325 card->rx.e_offset = 0;
5326 }
5327 }
5328
5329 if (work_done >= budget)
5330 goto out;
5331 else
5332 new_budget = budget - work_done;
5333 }
5334 }
5335
978759e8 5336 napi_complete_done(napi, work_done);
d73ef324
JW		 5337 if (qdio_start_irq(card->data.ccwdev, 0))
5338 napi_schedule(&card->napi);
5339out:
d73ef324
JW		 5340 return work_done;
5341}
5342EXPORT_SYMBOL_GPL(qeth_poll);
5343
ad3cbf61
JW		 5344static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
5345{
5346 if (!cmd->hdr.return_code)
5347 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5348 return cmd->hdr.return_code;
5349}
5350
4666d7fb
JW		 5351static int qeth_setassparms_get_caps_cb(struct qeth_card *card,
5352 struct qeth_reply *reply,
5353 unsigned long data)
5354{
5355 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
5356 struct qeth_ipa_caps *caps = reply->param;
5357
5358 if (qeth_setassparms_inspect_rc(cmd))
742d4d40 5359 return -EIO;
4666d7fb
JW		 5360
5361 caps->supported = cmd->data.setassparms.data.caps.supported;
5362 caps->enabled = cmd->data.setassparms.data.caps.enabled;
5363 return 0;
5364}
5365
8f43fb00
TR		 5366int qeth_setassparms_cb(struct qeth_card *card,
5367 struct qeth_reply *reply, unsigned long data)
4d7def2a 5368{
742d4d40 5369 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4d7def2a
TR		 5370
5371 QETH_CARD_TEXT(card, 4, "defadpcb");
5372
742d4d40
JW		 5373 if (cmd->hdr.return_code)
5374 return -EIO;
5375
5376 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5377 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5378 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5379 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5380 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
4d7def2a
TR		 5381 return 0;
5382}
8f43fb00 5383EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5384
b475e316
TR		 5385struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5386 enum qeth_ipa_funcs ipa_func,
5387 __u16 cmd_code, __u16 len,
5388 enum qeth_prot_versions prot)
4d7def2a
TR		 5389{
5390 struct qeth_cmd_buffer *iob;
5391 struct qeth_ipa_cmd *cmd;
5392
5393 QETH_CARD_TEXT(card, 4, "getasscm");
5394 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5395
5396 if (iob) {
ff5caa7a 5397 cmd = __ipa_cmd(iob);
4d7def2a
TR		 5398 cmd->data.setassparms.hdr.assist_no = ipa_func;
5399 cmd->data.setassparms.hdr.length = 8 + len;
5400 cmd->data.setassparms.hdr.command_code = cmd_code;
4d7def2a
TR		 5401 }
5402
5403 return iob;
5404}
b475e316 5405EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a 5406
a8155b00
KM		 5407int qeth_send_simple_setassparms_prot(struct qeth_card *card,
5408 enum qeth_ipa_funcs ipa_func,
5409 u16 cmd_code, long data,
5410 enum qeth_prot_versions prot)
4d7def2a 5411{
4d7def2a
TR		 5412 int length = 0;
5413 struct qeth_cmd_buffer *iob;
5414
a8155b00 5415 QETH_CARD_TEXT_(card, 4, "simassp%i", prot);
4d7def2a
TR		 5416 if (data)
5417 length = sizeof(__u32);
a8155b00 5418 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, length, prot);
4d7def2a
TR		 5419 if (!iob)
5420 return -ENOMEM;
4fa55fa9
JW		 5421
5422 __ipa_cmd(iob)->data.setassparms.data.flags_32bit = (__u32) data;
5423 return qeth_send_ipa_cmd(card, iob, qeth_setassparms_cb, NULL);
4d7def2a 5424}
a8155b00 5425EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms_prot);
4d7def2a 5426
4a71df50
FB		 5427static void qeth_unregister_dbf_views(void)
5428{
d11ba0c4
PT		 5429 int x;
5430 for (x = 0; x < QETH_DBF_INFOS; x++) {
5431 debug_unregister(qeth_dbf[x].id);
5432 qeth_dbf[x].id = NULL;
5433 }
4a71df50
FB		 5434}
5435
8e96c51c 5436void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5437{
5438 char dbf_txt_buf[32];
345aa66e 5439 va_list args;
cd023216 5440
8e6a8285 5441 if (!debug_level_enabled(id, level))
cd023216 5442 return;
345aa66e
PT		 5443 va_start(args, fmt);
5444 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5445 va_end(args);
8e96c51c 5446 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5447}
5448EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5449
4a71df50
FB		 5450static int qeth_register_dbf_views(void)
5451{
d11ba0c4
PT		 5452 int ret;
5453 int x;
5454
5455 for (x = 0; x < QETH_DBF_INFOS; x++) {
5456 /* register the areas */
5457 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5458 qeth_dbf[x].pages,
5459 qeth_dbf[x].areas,
5460 qeth_dbf[x].len);
5461 if (qeth_dbf[x].id == NULL) {
5462 qeth_unregister_dbf_views();
5463 return -ENOMEM;
5464 }
4a71df50 5465
d11ba0c4
PT		 5466 /* register a view */
5467 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5468 if (ret) {
5469 qeth_unregister_dbf_views();
5470 return ret;
5471 }
4a71df50 5472
d11ba0c4
PT		 5473 /* set a passing level */
5474 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5475 }
4a71df50
FB		 5476
5477 return 0;
5478}
5479
a70fee3b
JW		 5480static DEFINE_MUTEX(qeth_mod_mutex); /* for synchronized module loading */
5481
4a71df50
FB		 5482int qeth_core_load_discipline(struct qeth_card *card,
5483 enum qeth_discipline_id discipline)
5484{
2022e00c 5485 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5486 switch (discipline) {
5487 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5488 card->discipline = try_then_request_module(
5489 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5490 break;
5491 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5492 card->discipline = try_then_request_module(
5493 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5494 break;
c70eb09d
JW		 5495 default:
5496 break;
4a71df50 5497 }
a70fee3b 5498 mutex_unlock(&qeth_mod_mutex);
c70eb09d 5499
c041f2d4 5500 if (!card->discipline) {
74eacdb9
FB		 5501 dev_err(&card->gdev->dev, "There is no kernel module to "
5502 "support discipline %d\n", discipline);
a70fee3b 5503 return -EINVAL;
4a71df50 5504 }
a70fee3b 5505
c1a935f6 5506 card->options.layer = discipline;
a70fee3b 5507 return 0;
4a71df50
FB		 5508}
5509
5510void qeth_core_free_discipline(struct qeth_card *card)
5511{
4fda3354 5512 if (IS_LAYER2(card))
c041f2d4 5513 symbol_put(qeth_l2_discipline);
4a71df50 5514 else
c041f2d4 5515 symbol_put(qeth_l3_discipline);
c1a935f6 5516 card->options.layer = QETH_DISCIPLINE_UNDETERMINED;
c041f2d4 5517 card->discipline = NULL;
4a71df50
FB		 5518}
5519
2d2ebb3e 5520const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5521 .name = "qeth_generic",
5522 .groups = qeth_generic_attr_groups,
5523};
2d2ebb3e
JW		 5524EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5525
b7169c51
SO		 5526static const struct device_type qeth_osn_devtype = {
5527 .name = "qeth_osn",
5528 .groups = qeth_osn_attr_groups,
5529};
5530
819dc537
SR		 5531#define DBF_NAME_LEN 20
5532
5533struct qeth_dbf_entry {
5534 char dbf_name[DBF_NAME_LEN];
5535 debug_info_t *dbf_info;
5536 struct list_head dbf_list;
5537};
5538
5539static LIST_HEAD(qeth_dbf_list);
5540static DEFINE_MUTEX(qeth_dbf_list_mutex);
5541
5542static debug_info_t *qeth_get_dbf_entry(char *name)
5543{
5544 struct qeth_dbf_entry *entry;
5545 debug_info_t *rc = NULL;
5546
5547 mutex_lock(&qeth_dbf_list_mutex);
5548 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5549 if (strcmp(entry->dbf_name, name) == 0) {
5550 rc = entry->dbf_info;
5551 break;
5552 }
5553 }
5554 mutex_unlock(&qeth_dbf_list_mutex);
5555 return rc;
5556}
5557
5558static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5559{
5560 struct qeth_dbf_entry *new_entry;
5561
5562 card->debug = debug_register(name, 2, 1, 8);
5563 if (!card->debug) {
5564 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5565 goto err;
5566 }
5567 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5568 goto err_dbg;
5569 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5570 if (!new_entry)
5571 goto err_dbg;
5572 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5573 new_entry->dbf_info = card->debug;
5574 mutex_lock(&qeth_dbf_list_mutex);
5575 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5576 mutex_unlock(&qeth_dbf_list_mutex);
5577
5578 return 0;
5579
5580err_dbg:
5581 debug_unregister(card->debug);
5582err:
5583 return -ENOMEM;
5584}
5585
5586static void qeth_clear_dbf_list(void)
5587{
5588 struct qeth_dbf_entry *entry, *tmp;
5589
5590 mutex_lock(&qeth_dbf_list_mutex);
5591 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5592 list_del(&entry->dbf_list);
5593 debug_unregister(entry->dbf_info);
5594 kfree(entry);
5595 }
5596 mutex_unlock(&qeth_dbf_list_mutex);
5597}
5598
d3d1b205
JW		 5599static struct net_device *qeth_alloc_netdev(struct qeth_card *card)
5600{
5601 struct net_device *dev;
5602
5603 switch (card->info.type) {
5604 case QETH_CARD_TYPE_IQD:
5605 dev = alloc_netdev(0, "hsi%d", NET_NAME_UNKNOWN, ether_setup);
5606 break;
5607 case QETH_CARD_TYPE_OSN:
5608 dev = alloc_netdev(0, "osn%d", NET_NAME_UNKNOWN, ether_setup);
5609 break;
5610 default:
5611 dev = alloc_etherdev(0);
5612 }
5613
5614 if (!dev)
5615 return NULL;
5616
5617 dev->ml_priv = card;
5618 dev->watchdog_timeo = QETH_TX_TIMEOUT;
72f219da 5619 dev->min_mtu = IS_OSN(card) ? 64 : 576;
8ce7a9e0
JW		 5620 /* initialized when device first goes online: */
5621 dev->max_mtu = 0;
5622 dev->mtu = 0;
d3d1b205
JW		 5623 SET_NETDEV_DEV(dev, &card->gdev->dev);
5624 netif_carrier_off(dev);
5f89eca5
JW		 5625
5626 if (!IS_OSN(card)) {
5627 dev->priv_flags &= ~IFF_TX_SKB_SHARING;
5628 dev->hw_features |= NETIF_F_SG;
5629 dev->vlan_features |= NETIF_F_SG;
04db741d
JW		 5630 if (IS_IQD(card))
5631 dev->features |= NETIF_F_SG;
5f89eca5
JW		 5632 }
5633
d3d1b205
JW		 5634 return dev;
5635}
5636
5637struct net_device *qeth_clone_netdev(struct net_device *orig)
5638{
5639 struct net_device *clone = qeth_alloc_netdev(orig->ml_priv);
5640
5641 if (!clone)
5642 return NULL;
5643
5644 clone->dev_port = orig->dev_port;
5645 return clone;
5646}
5647
4a71df50
FB		 5648static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5649{
5650 struct qeth_card *card;
5651 struct device *dev;
5652 int rc;
c70eb09d 5653 enum qeth_discipline_id enforced_disc;
819dc537 5654 char dbf_name[DBF_NAME_LEN];
4a71df50 5655
d11ba0c4 5656 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5657
5658 dev = &gdev->dev;
5659 if (!get_device(dev))
5660 return -ENODEV;
5661
2a0217d5 5662 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50 5663
121ca39a 5664 card = qeth_alloc_card(gdev);
4a71df50 5665 if (!card) {
d11ba0c4 5666 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5667 rc = -ENOMEM;
5668 goto err_dev;
5669 }
af039068
CO		 5670
5671 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5672 dev_name(&gdev->dev));
819dc537 5673 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5674 if (!card->debug) {
819dc537
SR		 5675 rc = qeth_add_dbf_entry(card, dbf_name);
5676 if (rc)
5677 goto err_card;
af039068 5678 }
af039068 5679
95f4d8b7
JW		 5680 qeth_setup_card(card);
5681 qeth_update_from_chp_desc(card);
4a71df50 5682
d3d1b205 5683 card->dev = qeth_alloc_netdev(card);
778b1ac7
JW		 5684 if (!card->dev) {
5685 rc = -ENOMEM;
d3d1b205 5686 goto err_card;
778b1ac7 5687 }
d3d1b205 5688
c70eb09d
JW		 5689 qeth_determine_capabilities(card);
5690 enforced_disc = qeth_enforce_discipline(card);
5691 switch (enforced_disc) {
5692 case QETH_DISCIPLINE_UNDETERMINED:
5693 gdev->dev.type = &qeth_generic_devtype;
5694 break;
5695 default:
5696 card->info.layer_enforced = true;
5697 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5698 if (rc)
d3d1b205 5699 goto err_load;
2d2ebb3e
JW		 5700
5701 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5702 ? card->discipline->devtype
5703 : &qeth_osn_devtype;
c041f2d4 5704 rc = card->discipline->setup(card->gdev);
4a71df50 5705 if (rc)
5113fec0 5706 goto err_disc;
2d2ebb3e 5707 break;
4a71df50
FB		 5708 }
5709
4a71df50
FB		 5710 return 0;
5711
5113fec0
UB		 5712err_disc:
5713 qeth_core_free_discipline(card);
d3d1b205
JW		 5714err_load:
5715 free_netdev(card->dev);
4a71df50
FB		 5716err_card:
5717 qeth_core_free_card(card);
5718err_dev:
5719 put_device(dev);
5720 return rc;
5721}
5722
5723static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5724{
4a71df50
FB		 5725 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5726
28a7e4c9 5727 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5728
c041f2d4
SO		 5729 if (card->discipline) {
5730 card->discipline->remove(gdev);
9dc48ccc
UB		 5731 qeth_core_free_discipline(card);
5732 }
5733
d3d1b205 5734 free_netdev(card->dev);
4a71df50 5735 qeth_core_free_card(card);
4a71df50 5736 put_device(&gdev->dev);
4a71df50
FB		 5737}
5738
5739static int qeth_core_set_online(struct ccwgroup_device *gdev)
5740{
5741 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5742 int rc = 0;
c70eb09d 5743 enum qeth_discipline_id def_discipline;
4a71df50 5744
c041f2d4 5745 if (!card->discipline) {
4a71df50
FB		 5746 if (card->info.type == QETH_CARD_TYPE_IQD)
5747 def_discipline = QETH_DISCIPLINE_LAYER3;
5748 else
5749 def_discipline = QETH_DISCIPLINE_LAYER2;
5750 rc = qeth_core_load_discipline(card, def_discipline);
5751 if (rc)
5752 goto err;
c041f2d4 5753 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5754 if (rc) {
5755 qeth_core_free_discipline(card);
4a71df50 5756 goto err;
9111e788 5757 }
4a71df50 5758 }
c041f2d4 5759 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5760err:
5761 return rc;
5762}
5763
5764static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5765{
5766 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5767 return card->discipline->set_offline(gdev);
4a71df50
FB		 5768}
5769
5770static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5771{
5772 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5773 qeth_set_allowed_threads(card, 0, 1);
5774 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5775 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5776 qeth_qdio_clear_card(card, 0);
5777 qeth_clear_qdio_buffers(card);
5778 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5779}
5780
bbcfcdc8
FB		 5781static int qeth_core_freeze(struct ccwgroup_device *gdev)
5782{
5783 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5784 if (card->discipline && card->discipline->freeze)
5785 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5786 return 0;
5787}
5788
5789static int qeth_core_thaw(struct ccwgroup_device *gdev)
5790{
5791 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5792 if (card->discipline && card->discipline->thaw)
5793 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5794 return 0;
5795}
5796
5797static int qeth_core_restore(struct ccwgroup_device *gdev)
5798{
5799 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5800 if (card->discipline && card->discipline->restore)
5801 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5802 return 0;
5803}
5804
36369569
GKH		 5805static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5806 size_t count)
4a71df50
FB		 5807{
5808 int err;
4a71df50 5809
6d8769ab
JW		 5810 err = ccwgroup_create_dev(qeth_core_root_dev, to_ccwgroupdrv(ddrv), 3,
5811 buf);
b7169c51
SO		 5812
5813 return err ? err : count;
5814}
36369569 5815static DRIVER_ATTR_WO(group);
4a71df50 5816
f47e2256
SO		 5817static struct attribute *qeth_drv_attrs[] = {
5818 &driver_attr_group.attr,
5819 NULL,
5820};
5821static struct attribute_group qeth_drv_attr_group = {
5822 .attrs = qeth_drv_attrs,
5823};
5824static const struct attribute_group *qeth_drv_attr_groups[] = {
5825 &qeth_drv_attr_group,
5826 NULL,
5827};
5828
6d8769ab
JW		 5829static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5830 .driver = {
5831 .groups = qeth_drv_attr_groups,
5832 .owner = THIS_MODULE,
5833 .name = "qeth",
5834 },
5835 .ccw_driver = &qeth_ccw_driver,
5836 .setup = qeth_core_probe_device,
5837 .remove = qeth_core_remove_device,
5838 .set_online = qeth_core_set_online,
5839 .set_offline = qeth_core_set_offline,
5840 .shutdown = qeth_core_shutdown,
5841 .prepare = NULL,
5842 .complete = NULL,
5843 .freeze = qeth_core_freeze,
5844 .thaw = qeth_core_thaw,
5845 .restore = qeth_core_restore,
5846};
5847
d7d18da1
JW		 5848struct qeth_card *qeth_get_card_by_busid(char *bus_id)
5849{
5850 struct ccwgroup_device *gdev;
5851 struct qeth_card *card;
5852
5853 gdev = get_ccwgroupdev_by_busid(&qeth_core_ccwgroup_driver, bus_id);
5854 if (!gdev)
5855 return NULL;
5856
5857 card = dev_get_drvdata(&gdev->dev);
5858 put_device(&gdev->dev);
5859 return card;
5860}
5861EXPORT_SYMBOL_GPL(qeth_get_card_by_busid);
5862
942d6984
JW		 5863int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5864{
5865 struct qeth_card *card = dev->ml_priv;
5866 struct mii_ioctl_data *mii_data;
5867 int rc = 0;
5868
5869 if (!card)
5870 return -ENODEV;
5871
942d6984
JW		 5872 if (card->info.type == QETH_CARD_TYPE_OSN)
5873 return -EPERM;
5874
5875 switch (cmd) {
5876 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5877 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5878 break;
5879 case SIOC_QETH_GET_CARD_TYPE:
5880 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5881 card->info.type == QETH_CARD_TYPE_OSM ||
5882 card->info.type == QETH_CARD_TYPE_OSX) &&
5883 !card->info.guestlan)
5884 return 1;
5885 else
5886 return 0;
5887 case SIOCGMIIPHY:
5888 mii_data = if_mii(rq);
5889 mii_data->phy_id = 0;
5890 break;
5891 case SIOCGMIIREG:
5892 mii_data = if_mii(rq);
5893 if (mii_data->phy_id != 0)
5894 rc = -EINVAL;
5895 else
5896 mii_data->val_out = qeth_mdio_read(dev,
5897 mii_data->phy_id, mii_data->reg_num);
5898 break;
5899 case SIOC_QETH_QUERY_OAT:
5900 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5901 break;
5902 default:
5903 if (card->discipline->do_ioctl)
5904 rc = card->discipline->do_ioctl(dev, rq, cmd);
5905 else
5906 rc = -EOPNOTSUPP;
5907 }
5908 if (rc)
5909 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5910 return rc;
5911}
5912EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5913
4a71df50
FB		 5914static struct {
5915 const char str[ETH_GSTRING_LEN];
5916} qeth_ethtool_stats_keys[] = {
5917/* 0 */{"rx skbs"},
5918 {"rx buffers"},
5919 {"tx skbs"},
5920 {"tx buffers"},
5921 {"tx skbs no packing"},
5922 {"tx buffers no packing"},
5923 {"tx skbs packing"},
5924 {"tx buffers packing"},
5925 {"tx sg skbs"},
d2a274b2 5926 {"tx buffer elements"},
4a71df50
FB		 5927/* 10 */{"rx sg skbs"},
5928 {"rx sg frags"},
5929 {"rx sg page allocs"},
5930 {"tx large kbytes"},
5931 {"tx large count"},
5932 {"tx pk state ch n->p"},
5933 {"tx pk state ch p->n"},
5934 {"tx pk watermark low"},
5935 {"tx pk watermark high"},
5936 {"queue 0 buffer usage"},
5937/* 20 */{"queue 1 buffer usage"},
5938 {"queue 2 buffer usage"},
5939 {"queue 3 buffer usage"},
f61a0d05 5940 {"tx csum"},
c3b4a740 5941 {"tx lin"},
6059c905 5942 {"tx linfail"},
3aade31b 5943 {"rx csum"}
4a71df50
FB		 5944};
5945
df8b4ec8 5946int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5947{
df8b4ec8
BH		 5948 switch (stringset) {
5949 case ETH_SS_STATS:
5950 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5951 default:
5952 return -EINVAL;
5953 }
4a71df50 5954}
df8b4ec8 5955EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5956
5957void qeth_core_get_ethtool_stats(struct net_device *dev,
5958 struct ethtool_stats *stats, u64 *data)
5959{
509e2562 5960 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5961 data[0] = card->stats.rx_packets -
5962 card->perf_stats.initial_rx_packets;
5963 data[1] = card->perf_stats.bufs_rec;
5964 data[2] = card->stats.tx_packets -
5965 card->perf_stats.initial_tx_packets;
5966 data[3] = card->perf_stats.bufs_sent;
5967 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5968 - card->perf_stats.skbs_sent_pack;
5969 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5970 data[6] = card->perf_stats.skbs_sent_pack;
5971 data[7] = card->perf_stats.bufs_sent_pack;
5972 data[8] = card->perf_stats.sg_skbs_sent;
d2a274b2 5973 data[9] = card->perf_stats.buf_elements_sent;
4a71df50
FB		 5974 data[10] = card->perf_stats.sg_skbs_rx;
5975 data[11] = card->perf_stats.sg_frags_rx;
5976 data[12] = card->perf_stats.sg_alloc_page_rx;
5977 data[13] = (card->perf_stats.large_send_bytes >> 10);
5978 data[14] = card->perf_stats.large_send_cnt;
5979 data[15] = card->perf_stats.sc_dp_p;
5980 data[16] = card->perf_stats.sc_p_dp;
5981 data[17] = QETH_LOW_WATERMARK_PACK;
5982 data[18] = QETH_HIGH_WATERMARK_PACK;
5983 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5984 data[20] = (card->qdio.no_out_queues > 1) ?
5985 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5986 data[21] = (card->qdio.no_out_queues > 2) ?
5987 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5988 data[22] = (card->qdio.no_out_queues > 3) ?
5989 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4326b5b4
JW		 5990 data[23] = card->perf_stats.tx_csum;
5991 data[24] = card->perf_stats.tx_lin;
5992 data[25] = card->perf_stats.tx_linfail;
5993 data[26] = card->perf_stats.rx_csum;
4a71df50
FB		 5994}
5995EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5996
5997void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5998{
5999 switch (stringset) {
6000 case ETH_SS_STATS:
6001 memcpy(data, &qeth_ethtool_stats_keys,
6002 sizeof(qeth_ethtool_stats_keys));
6003 break;
6004 default:
6005 WARN_ON(1);
6006 break;
6007 }
6008}
6009EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6010
6011void qeth_core_get_drvinfo(struct net_device *dev,
6012 struct ethtool_drvinfo *info)
6013{
509e2562 6014 struct qeth_card *card = dev->ml_priv;
7826d43f 6015
4fda3354 6016 strlcpy(info->driver, IS_LAYER2(card) ? "qeth_l2" : "qeth_l3",
7826d43f
JP		 6017 sizeof(info->driver));
6018 strlcpy(info->version, "1.0", sizeof(info->version));
6019 strlcpy(info->fw_version, card->info.mcl_level,
6020 sizeof(info->fw_version));
6021 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6022 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6023}
6024EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6025
774afb8e
JW		 6026/* Helper function to fill 'advertising' and 'supported' which are the same. */
6027/* Autoneg and full-duplex are supported and advertised unconditionally. */
6028/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6029/* specified port type. */
993e19c0 6030static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6031 int maxspeed, int porttype)
6032{
41fc3b65
JW		 6033 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6034 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6035 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6036
41fc3b65
JW		 6037 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6038 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6039
6040 switch (porttype) {
6041 case PORT_TP:
41fc3b65
JW		 6042 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6043 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6044 break;
6045 case PORT_FIBRE:
41fc3b65
JW		 6046 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6047 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6048 break;
6049 default:
41fc3b65
JW		 6050 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6051 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6052 WARN_ON_ONCE(1);
6053 }
6054
54e049c2 6055 /* partially does fall through, to also select lower speeds */
02d5cb5b 6056 switch (maxspeed) {
54e049c2
JW		 6057 case SPEED_25000:
6058 ethtool_link_ksettings_add_link_mode(cmd, supported,
6059 25000baseSR_Full);
6060 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6061 25000baseSR_Full);
6062 break;
02d5cb5b 6063 case SPEED_10000:
41fc3b65
JW		 6064 ethtool_link_ksettings_add_link_mode(cmd, supported,
6065 10000baseT_Full);
6066 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6067 10000baseT_Full);
02d5cb5b 6068 case SPEED_1000:
41fc3b65
JW		 6069 ethtool_link_ksettings_add_link_mode(cmd, supported,
6070 1000baseT_Full);
6071 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6072 1000baseT_Full);
6073 ethtool_link_ksettings_add_link_mode(cmd, supported,
6074 1000baseT_Half);
6075 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6076 1000baseT_Half);
02d5cb5b 6077 case SPEED_100:
41fc3b65
JW		 6078 ethtool_link_ksettings_add_link_mode(cmd, supported,
6079 100baseT_Full);
6080 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6081 100baseT_Full);
6082 ethtool_link_ksettings_add_link_mode(cmd, supported,
6083 100baseT_Half);
6084 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6085 100baseT_Half);
02d5cb5b 6086 case SPEED_10:
41fc3b65
JW		 6087 ethtool_link_ksettings_add_link_mode(cmd, supported,
6088 10baseT_Full);
6089 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6090 10baseT_Full);
6091 ethtool_link_ksettings_add_link_mode(cmd, supported,
6092 10baseT_Half);
6093 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6094 10baseT_Half);
774afb8e
JW		 6095 /* end fallthrough */
6096 break;
02d5cb5b 6097 default:
41fc3b65
JW		 6098 ethtool_link_ksettings_add_link_mode(cmd, supported,
6099 10baseT_Full);
6100 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6101 10baseT_Full);
6102 ethtool_link_ksettings_add_link_mode(cmd, supported,
6103 10baseT_Half);
6104 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6105 10baseT_Half);
02d5cb5b
EC		 6106 WARN_ON_ONCE(1);
6107 }
02d5cb5b
EC		 6108}
6109
993e19c0
JW		 6110int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6111 struct ethtool_link_ksettings *cmd)
3f9975aa 6112{
509e2562 6113 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6114 enum qeth_link_types link_type;
02d5cb5b 6115 struct carrier_info carrier_info;
511c2445 6116 int rc;
3f9975aa
FB		 6117
6118 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6119 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6120 else
6121 link_type = card->info.link_type;
6122
993e19c0
JW		 6123 cmd->base.duplex = DUPLEX_FULL;
6124 cmd->base.autoneg = AUTONEG_ENABLE;
6125 cmd->base.phy_address = 0;
6126 cmd->base.mdio_support = 0;
6127 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6128 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6129
6130 switch (link_type) {
6131 case QETH_LINK_TYPE_FAST_ETH:
6132 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6133 cmd->base.speed = SPEED_100;
6134 cmd->base.port = PORT_TP;
3f9975aa 6135 break;
3f9975aa
FB		 6136 case QETH_LINK_TYPE_GBIT_ETH:
6137 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6138 cmd->base.speed = SPEED_1000;
6139 cmd->base.port = PORT_FIBRE;
3f9975aa 6140 break;
3f9975aa 6141 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6142 cmd->base.speed = SPEED_10000;
6143 cmd->base.port = PORT_FIBRE;
3f9975aa 6144 break;
54e049c2
JW		 6145 case QETH_LINK_TYPE_25GBIT_ETH:
6146 cmd->base.speed = SPEED_25000;
6147 cmd->base.port = PORT_FIBRE;
6148 break;
3f9975aa 6149 default:
993e19c0
JW		 6150 cmd->base.speed = SPEED_10;
6151 cmd->base.port = PORT_TP;
3f9975aa 6152 }
993e19c0 6153 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6154
02d5cb5b
EC		 6155 /* Check if we can obtain more accurate information. */
6156 /* If QUERY_CARD_INFO command is not supported or fails, */
6157 /* just return the heuristics that was filled above. */
511c2445
EC		 6158 rc = qeth_query_card_info(card, &carrier_info);
6159 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6160 return 0;
511c2445
EC		 6161 if (rc) /* report error from the hardware operation */
6162 return rc;
6163 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6164
6165 netdev_dbg(netdev,
6166 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6167 carrier_info.card_type,
6168 carrier_info.port_mode,
6169 carrier_info.port_speed);
6170
6171 /* Update attributes for which we've obtained more authoritative */
6172 /* information, leave the rest the way they where filled above. */
6173 switch (carrier_info.card_type) {
6174 case CARD_INFO_TYPE_1G_COPPER_A:
6175 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6176 cmd->base.port = PORT_TP;
6177 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6178 break;
6179 case CARD_INFO_TYPE_1G_FIBRE_A:
6180 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6181 cmd->base.port = PORT_FIBRE;
6182 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6183 break;
6184 case CARD_INFO_TYPE_10G_FIBRE_A:
6185 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6186 cmd->base.port = PORT_FIBRE;
6187 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6188 break;
6189 }
6190
6191 switch (carrier_info.port_mode) {
6192 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6193 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6194 break;
6195 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6196 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6197 break;
6198 }
6199
6200 switch (carrier_info.port_speed) {
6201 case CARD_INFO_PORTS_10M:
993e19c0 6202 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6203 break;
6204 case CARD_INFO_PORTS_100M:
993e19c0 6205 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6206 break;
6207 case CARD_INFO_PORTS_1G:
993e19c0 6208 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6209 break;
6210 case CARD_INFO_PORTS_10G:
993e19c0 6211 cmd->base.speed = SPEED_10000;
02d5cb5b 6212 break;
54e049c2
JW		 6213 case CARD_INFO_PORTS_25G:
6214 cmd->base.speed = SPEED_25000;
6215 break;
02d5cb5b
EC		 6216 }
6217
3f9975aa
FB		 6218 return 0;
6219}
993e19c0 6220EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6221
4386e34f
JW		 6222static int qeth_start_csum_cb(struct qeth_card *card, struct qeth_reply *reply,
6223 unsigned long data)
c9475369
TR		 6224{
6225 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
4386e34f 6226 u32 *features = reply->param;
c9475369 6227
ad3cbf61 6228 if (qeth_setassparms_inspect_rc(cmd))
742d4d40 6229 return -EIO;
c9475369 6230
4386e34f 6231 *features = cmd->data.setassparms.data.flags_32bit;
c9475369
TR		 6232 return 0;
6233}
6234
4386e34f
JW		 6235static int qeth_set_csum_off(struct qeth_card *card, enum qeth_ipa_funcs cstype,
6236 enum qeth_prot_versions prot)
c9475369 6237{
4386e34f
JW		 6238 return qeth_send_simple_setassparms_prot(card, cstype,
6239 IPA_CMD_ASS_STOP, 0, prot);
c9475369
TR		 6240}
6241
4386e34f
JW		 6242static int qeth_set_csum_on(struct qeth_card *card, enum qeth_ipa_funcs cstype,
6243 enum qeth_prot_versions prot)
4d7def2a 6244{
571f9dd8 6245 u32 required_features = QETH_IPA_CHECKSUM_UDP | QETH_IPA_CHECKSUM_TCP;
4386e34f
JW		 6246 struct qeth_cmd_buffer *iob;
6247 struct qeth_ipa_caps caps;
6248 u32 features;
4d7def2a
TR		 6249 int rc;
6250
7e83747d
JW		 6251 /* some L3 HW requires combined L3+L4 csum offload: */
6252 if (IS_LAYER3(card) && prot == QETH_PROT_IPV4 &&
6253 cstype == IPA_OUTBOUND_CHECKSUM)
571f9dd8 6254 required_features |= QETH_IPA_CHECKSUM_IP_HDR;
7e83747d 6255
4386e34f
JW		 6256 iob = qeth_get_setassparms_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6257 prot);
6258 if (!iob)
6259 return -ENOMEM;
6260
6261 rc = qeth_send_ipa_cmd(card, iob, qeth_start_csum_cb, &features);
6262 if (rc)
4d7def2a 6263 return rc;
7e83747d 6264
4386e34f
JW		 6265 if ((required_features & features) != required_features) {
6266 qeth_set_csum_off(card, cstype, prot);
6267 return -EOPNOTSUPP;
6268 }
7e83747d 6269
4386e34f 6270 iob = qeth_get_setassparms_cmd(card, cstype, IPA_CMD_ASS_ENABLE, 4,
a8155b00 6271 prot);
4386e34f
JW		 6272 if (!iob) {
6273 qeth_set_csum_off(card, cstype, prot);
6274 return -ENOMEM;
f9d8e6dc 6275 }
4386e34f
JW		 6276
6277 if (features & QETH_IPA_CHECKSUM_LP2LP)
6278 required_features |= QETH_IPA_CHECKSUM_LP2LP;
6279 __ipa_cmd(iob)->data.setassparms.data.flags_32bit = required_features;
6280 rc = qeth_send_ipa_cmd(card, iob, qeth_setassparms_get_caps_cb, &caps);
4d7def2a 6281 if (rc) {
4386e34f 6282 qeth_set_csum_off(card, cstype, prot);
4d7def2a
TR		 6283 return rc;
6284 }
8f43fb00 6285
4386e34f
JW		 6286 if (!qeth_ipa_caps_supported(&caps, required_features) ||
6287 !qeth_ipa_caps_enabled(&caps, required_features)) {
6288 qeth_set_csum_off(card, cstype, prot);
6289 return -EOPNOTSUPP;
6290 }
6291
a8155b00
KM		 6292 dev_info(&card->gdev->dev, "HW Checksumming (%sbound IPv%d) enabled\n",
6293 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out", prot);
4386e34f
JW		 6294 if (!qeth_ipa_caps_enabled(&caps, QETH_IPA_CHECKSUM_LP2LP) &&
6295 cstype == IPA_OUTBOUND_CHECKSUM)
6296 dev_warn(&card->gdev->dev,
6297 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6298 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6299 return 0;
6300}
6301
a8155b00
KM		 6302static int qeth_set_ipa_csum(struct qeth_card *card, bool on, int cstype,
6303 enum qeth_prot_versions prot)
4d7def2a 6304{
742d4d40
JW		 6305 return on ? qeth_set_csum_on(card, cstype, prot) :
6306 qeth_set_csum_off(card, cstype, prot);
4d7def2a 6307}
4d7def2a 6308
4666d7fb
JW		 6309static int qeth_start_tso_cb(struct qeth_card *card, struct qeth_reply *reply,
6310 unsigned long data)
6311{
6312 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6313 struct qeth_tso_start_data *tso_data = reply->param;
6314
6315 if (qeth_setassparms_inspect_rc(cmd))
742d4d40 6316 return -EIO;
4666d7fb
JW		 6317
6318 tso_data->mss = cmd->data.setassparms.data.tso.mss;
6319 tso_data->supported = cmd->data.setassparms.data.tso.supported;
6320 return 0;
6321}
6322
1f83b817
JW		 6323static int qeth_set_tso_off(struct qeth_card *card,
6324 enum qeth_prot_versions prot)
4d7def2a 6325{
1f83b817
JW		 6326 return qeth_send_simple_setassparms_prot(card, IPA_OUTBOUND_TSO,
6327 IPA_CMD_ASS_STOP, 0, prot);
6328}
4d7def2a 6329
1f83b817
JW		 6330static int qeth_set_tso_on(struct qeth_card *card,
6331 enum qeth_prot_versions prot)
6332{
4666d7fb
JW		 6333 struct qeth_tso_start_data tso_data;
6334 struct qeth_cmd_buffer *iob;
6335 struct qeth_ipa_caps caps;
6336 int rc;
6337
6338 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
6339 IPA_CMD_ASS_START, 0, prot);
6340 if (!iob)
6341 return -ENOMEM;
6342
4fa55fa9 6343 rc = qeth_send_ipa_cmd(card, iob, qeth_start_tso_cb, &tso_data);
4666d7fb
JW		 6344 if (rc)
6345 return rc;
6346
6347 if (!tso_data.mss || !(tso_data.supported & QETH_IPA_LARGE_SEND_TCP)) {
6348 qeth_set_tso_off(card, prot);
6349 return -EOPNOTSUPP;
6350 }
6351
6352 iob = qeth_get_setassparms_cmd(card, IPA_OUTBOUND_TSO,
6353 IPA_CMD_ASS_ENABLE, sizeof(caps), prot);
6354 if (!iob) {
6355 qeth_set_tso_off(card, prot);
6356 return -ENOMEM;
6357 }
6358
6359 /* enable TSO capability */
4fa55fa9
JW		 6360 __ipa_cmd(iob)->data.setassparms.data.caps.enabled =
6361 QETH_IPA_LARGE_SEND_TCP;
6362 rc = qeth_send_ipa_cmd(card, iob, qeth_setassparms_get_caps_cb, &caps);
4666d7fb
JW		 6363 if (rc) {
6364 qeth_set_tso_off(card, prot);
6365 return rc;
6366 }
6367
6368 if (!qeth_ipa_caps_supported(&caps, QETH_IPA_LARGE_SEND_TCP) ||
6369 !qeth_ipa_caps_enabled(&caps, QETH_IPA_LARGE_SEND_TCP)) {
6370 qeth_set_tso_off(card, prot);
6371 return -EOPNOTSUPP;
6372 }
6373
6374 dev_info(&card->gdev->dev, "TSOv%u enabled (MSS: %u)\n", prot,
6375 tso_data.mss);
6376 return 0;
1f83b817 6377}
4d7def2a 6378
1f83b817
JW		 6379static int qeth_set_ipa_tso(struct qeth_card *card, bool on,
6380 enum qeth_prot_versions prot)
6381{
742d4d40 6382 return on ? qeth_set_tso_on(card, prot) : qeth_set_tso_off(card, prot);
4d7def2a 6383}
8f43fb00 6384
d7e6ed97
KM		 6385static int qeth_set_ipa_rx_csum(struct qeth_card *card, bool on)
6386{
6387 int rc_ipv4 = (on) ? -EOPNOTSUPP : 0;
6388 int rc_ipv6;
6389
6390 if (qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6391 rc_ipv4 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6392 QETH_PROT_IPV4);
6393 if (!qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
6394 /* no/one Offload Assist available, so the rc is trivial */
6395 return rc_ipv4;
ce344356 6396
d7e6ed97
KM		 6397 rc_ipv6 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
6398 QETH_PROT_IPV6);
6399
6400 if (on)
6401 /* enable: success if any Assist is active */
6402 return (rc_ipv6) ? rc_ipv4 : 0;
6403
6404 /* disable: failure if any Assist is still active */
6405 return (rc_ipv6) ? rc_ipv6 : rc_ipv4;
6406}
6407
ce344356 6408/**
d025da9e
JW		 6409 * qeth_enable_hw_features() - (Re-)Enable HW functions for device features
6410 * @dev: a net_device
ce344356 6411 */
d025da9e 6412void qeth_enable_hw_features(struct net_device *dev)
e830baa9
HW		 6413{
6414 struct qeth_card *card = dev->ml_priv;
d025da9e 6415 netdev_features_t features;
e830baa9 6416
d025da9e 6417 features = dev->features;
5fc692a7 6418 /* force-off any feature that might need an IPA sequence.
ce344356
JW		 6419 * netdev_update_features() will restart them.
6420 */
5fc692a7
JW		 6421 dev->features &= ~dev->hw_features;
6422 /* toggle VLAN filter, so that VIDs are re-programmed: */
6423 if (IS_LAYER2(card) && IS_VM_NIC(card)) {
6424 dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
6425 dev->wanted_features |= NETIF_F_HW_VLAN_CTAG_FILTER;
6426 }
ce344356 6427 netdev_update_features(dev);
d025da9e
JW		 6428 if (features != dev->features)
6429 dev_warn(&card->gdev->dev,
6430 "Device recovery failed to restore all offload features\n");
e830baa9 6431}
d025da9e 6432EXPORT_SYMBOL_GPL(qeth_enable_hw_features);
e830baa9 6433
8f43fb00
TR		 6434int qeth_set_features(struct net_device *dev, netdev_features_t features)
6435{
6436 struct qeth_card *card = dev->ml_priv;
6c7cd712 6437 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6438 int rc = 0;
6439
6440 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6441 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6442
6c7cd712 6443 if ((changed & NETIF_F_IP_CSUM)) {
a8155b00
KM		 6444 rc = qeth_set_ipa_csum(card, features & NETIF_F_IP_CSUM,
6445 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV4);
6c7cd712
HW		 6446 if (rc)
6447 changed ^= NETIF_F_IP_CSUM;
6448 }
571f9dd8
KM		 6449 if (changed & NETIF_F_IPV6_CSUM) {
6450 rc = qeth_set_ipa_csum(card, features & NETIF_F_IPV6_CSUM,
6451 IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV6);
6452 if (rc)
6453 changed ^= NETIF_F_IPV6_CSUM;
6454 }
d7e6ed97
KM		 6455 if (changed & NETIF_F_RXCSUM) {
6456 rc = qeth_set_ipa_rx_csum(card, features & NETIF_F_RXCSUM);
6c7cd712
HW		 6457 if (rc)
6458 changed ^= NETIF_F_RXCSUM;
6459 }
1f83b817
JW		 6460 if (changed & NETIF_F_TSO) {
6461 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO,
6462 QETH_PROT_IPV4);
6c7cd712
HW		 6463 if (rc)
6464 changed ^= NETIF_F_TSO;
6465 }
82bf5c08
JW		 6466 if (changed & NETIF_F_TSO6) {
6467 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO6,
6468 QETH_PROT_IPV6);
6469 if (rc)
6470 changed ^= NETIF_F_TSO6;
6471 }
6c7cd712
HW		 6472
6473 /* everything changed successfully? */
6474 if ((dev->features ^ features) == changed)
6475 return 0;
6476 /* something went wrong. save changed features and return error */
6477 dev->features ^= changed;
6478 return -EIO;
8f43fb00
TR		 6479}
6480EXPORT_SYMBOL_GPL(qeth_set_features);
6481
6482netdev_features_t qeth_fix_features(struct net_device *dev,
6483 netdev_features_t features)
6484{
6485 struct qeth_card *card = dev->ml_priv;
6486
6487 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6488 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6489 features &= ~NETIF_F_IP_CSUM;
571f9dd8
KM		 6490 if (!qeth_is_supported6(card, IPA_OUTBOUND_CHECKSUM_V6))
6491 features &= ~NETIF_F_IPV6_CSUM;
d7e6ed97
KM		 6492 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM) &&
6493 !qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
8f43fb00 6494 features &= ~NETIF_F_RXCSUM;
cf536ffe 6495 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6496 features &= ~NETIF_F_TSO;
82bf5c08
JW		 6497 if (!qeth_is_supported6(card, IPA_OUTBOUND_TSO))
6498 features &= ~NETIF_F_TSO6;
e6e771b3 6499
8f43fb00
TR		 6500 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6501 return features;
6502}
6503EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6504
6d69b1f1
JW		 6505netdev_features_t qeth_features_check(struct sk_buff *skb,
6506 struct net_device *dev,
6507 netdev_features_t features)
6508{
6509 /* GSO segmentation builds skbs with
6510 * a (small) linear part for the headers, and
6511 * page frags for the data.
6512 * Compared to a linear skb, the header-only part consumes an
6513 * additional buffer element. This reduces buffer utilization, and
6514 * hurts throughput. So compress small segments into one element.
6515 */
6516 if (netif_needs_gso(skb, features)) {
6517 /* match skb_segment(): */
6518 unsigned int doffset = skb->data - skb_mac_header(skb);
6519 unsigned int hsize = skb_shinfo(skb)->gso_size;
6520 unsigned int hroom = skb_headroom(skb);
6521
6522 /* linearize only if resulting skb allocations are order-0: */
6523 if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
6524 features &= ~NETIF_F_SG;
6525 }
6526
6527 return vlan_features_check(skb, features);
6528}
6529EXPORT_SYMBOL_GPL(qeth_features_check);
6530
e6e771b3 6531int qeth_open(struct net_device *dev)
e22355ea
JW		 6532{
6533 struct qeth_card *card = dev->ml_priv;
6534
6535 QETH_CARD_TEXT(card, 4, "qethopen");
6536 if (card->state == CARD_STATE_UP)
6537 return 0;
6538 if (card->state != CARD_STATE_SOFTSETUP)
6539 return -ENODEV;
6540
6541 if (qdio_stop_irq(CARD_DDEV(card), 0) < 0)
6542 return -EIO;
6543
6544 card->data.state = CH_STATE_UP;
6545 card->state = CARD_STATE_UP;
6546 netif_start_queue(dev);
6547
6548 napi_enable(&card->napi);
6549 local_bh_disable();
6550 napi_schedule(&card->napi);
6551 /* kick-start the NAPI softirq: */
6552 local_bh_enable();
6553 return 0;
6554}
e22355ea
JW		 6555EXPORT_SYMBOL_GPL(qeth_open);
6556
6557int qeth_stop(struct net_device *dev)
6558{
6559 struct qeth_card *card = dev->ml_priv;
6560
6561 QETH_CARD_TEXT(card, 4, "qethstop");
6562 netif_tx_disable(dev);
6563 if (card->state == CARD_STATE_UP) {
6564 card->state = CARD_STATE_SOFTSETUP;
6565 napi_disable(&card->napi);
6566 }
6567 return 0;
6568}
6569EXPORT_SYMBOL_GPL(qeth_stop);
6570
4a71df50
FB		 6571static int __init qeth_core_init(void)
6572{
6573 int rc;
6574
74eacdb9 6575 pr_info("loading core functions\n");
4a71df50 6576
0f54761d 6577 qeth_wq = create_singlethread_workqueue("qeth_wq");
a936b1ef
JW		 6578 if (!qeth_wq) {
6579 rc = -ENOMEM;
6580 goto out_err;
6581 }
0f54761d 6582
4a71df50
FB		 6583 rc = qeth_register_dbf_views();
6584 if (rc)
a936b1ef 6585 goto dbf_err;
035da16f 6586 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6587 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6588 if (rc)
6589 goto register_err;
55494264
JW		 6590 qeth_core_header_cache =
6591 kmem_cache_create("qeth_hdr", QETH_HDR_CACHE_OBJ_SIZE,
6592 roundup_pow_of_two(QETH_HDR_CACHE_OBJ_SIZE),
6593 0, NULL);
683d718a
FB		 6594 if (!qeth_core_header_cache) {
6595 rc = -ENOMEM;
6596 goto slab_err;
6597 }
0da9581d
EL		 6598 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6599 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6600 if (!qeth_qdio_outbuf_cache) {
6601 rc = -ENOMEM;
6602 goto cqslab_err;
6603 }
afb6ac59
SO		 6604 rc = ccw_driver_register(&qeth_ccw_driver);
6605 if (rc)
6606 goto ccw_err;
afb6ac59
SO		 6607 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6608 if (rc)
6609 goto ccwgroup_err;
0da9581d 6610
683d718a 6611 return 0;
afb6ac59
SO		 6612
6613ccwgroup_err:
6614 ccw_driver_unregister(&qeth_ccw_driver);
6615ccw_err:
6616 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6617cqslab_err:
6618 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6619slab_err:
035da16f 6620 root_device_unregister(qeth_core_root_dev);
4a71df50 6621register_err:
4a71df50 6622 qeth_unregister_dbf_views();
a936b1ef
JW		 6623dbf_err:
6624 destroy_workqueue(qeth_wq);
4a71df50 6625out_err:
74eacdb9 6626 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6627 return rc;
6628}
6629
6630static void __exit qeth_core_exit(void)
6631{
819dc537 6632 qeth_clear_dbf_list();
0f54761d 6633 destroy_workqueue(qeth_wq);
4a71df50
FB		 6634 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6635 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6636 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6637 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6638 root_device_unregister(qeth_core_root_dev);
4a71df50 6639 qeth_unregister_dbf_views();
74eacdb9 6640 pr_info("core functions removed\n");
4a71df50
FB		 6641}
6642
6643module_init(qeth_core_init);
6644module_exit(qeth_core_exit);
6645MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6646MODULE_DESCRIPTION("qeth core functions");
6647MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)