Commit | Line | Data |
---|---|---|
4a71df50 | 1 | /* |
4a71df50 FB |
2 | * Copyright IBM Corp. 2007 |
3 | * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, | |
4 | * Frank Pavlic <fpavlic@de.ibm.com>, | |
5 | * Thomas Spatzier <tspat@de.ibm.com>, | |
6 | * Frank Blaschka <frank.blaschka@de.ibm.com> | |
7 | */ | |
8 | ||
9 | #ifndef __QETH_CORE_H__ | |
10 | #define __QETH_CORE_H__ | |
11 | ||
12 | #include <linux/if.h> | |
13 | #include <linux/if_arp.h> | |
4a71df50 FB |
14 | #include <linux/etherdevice.h> |
15 | #include <linux/if_vlan.h> | |
16 | #include <linux/ctype.h> | |
17 | #include <linux/in6.h> | |
18 | #include <linux/bitops.h> | |
19 | #include <linux/seq_file.h> | |
20 | #include <linux/ethtool.h> | |
21 | ||
22 | #include <net/ipv6.h> | |
23 | #include <net/if_inet6.h> | |
24 | #include <net/addrconf.h> | |
25 | ||
26 | #include <asm/debug.h> | |
27 | #include <asm/qdio.h> | |
28 | #include <asm/ccwdev.h> | |
29 | #include <asm/ccwgroup.h> | |
6bcac508 | 30 | #include <asm/sysinfo.h> |
4a71df50 FB |
31 | |
32 | #include "qeth_core_mpc.h" | |
33 | ||
34 | /** | |
35 | * Debug Facility stuff | |
36 | */ | |
d11ba0c4 PT |
37 | enum qeth_dbf_names { |
38 | QETH_DBF_SETUP, | |
d11ba0c4 | 39 | QETH_DBF_MSG, |
d11ba0c4 PT |
40 | QETH_DBF_CTRL, |
41 | QETH_DBF_INFOS /* must be last element */ | |
42 | }; | |
43 | ||
44 | struct qeth_dbf_info { | |
45 | char name[DEBUG_MAX_NAME_LEN]; | |
46 | int pages; | |
47 | int areas; | |
48 | int len; | |
49 | int level; | |
50 | struct debug_view *view; | |
51 | debug_info_t *id; | |
52 | }; | |
53 | ||
54 | #define QETH_DBF_CTRL_LEN 256 | |
4a71df50 FB |
55 | |
56 | #define QETH_DBF_TEXT(name, level, text) \ | |
d11ba0c4 | 57 | debug_text_event(qeth_dbf[QETH_DBF_##name].id, level, text) |
4a71df50 FB |
58 | |
59 | #define QETH_DBF_HEX(name, level, addr, len) \ | |
d11ba0c4 PT |
60 | debug_event(qeth_dbf[QETH_DBF_##name].id, level, (void *)(addr), len) |
61 | ||
62 | #define QETH_DBF_MESSAGE(level, text...) \ | |
63 | debug_sprintf_event(qeth_dbf[QETH_DBF_MSG].id, level, text) | |
64 | ||
65 | #define QETH_DBF_TEXT_(name, level, text...) \ | |
8e96c51c | 66 | qeth_dbf_longtext(qeth_dbf[QETH_DBF_##name].id, level, text) |
4a71df50 | 67 | |
af039068 CO |
68 | #define QETH_CARD_TEXT(card, level, text) \ |
69 | debug_text_event(card->debug, level, text) | |
70 | ||
71 | #define QETH_CARD_HEX(card, level, addr, len) \ | |
72 | debug_event(card->debug, level, (void *)(addr), len) | |
73 | ||
74 | #define QETH_CARD_MESSAGE(card, text...) \ | |
75 | debug_sprintf_event(card->debug, level, text) | |
76 | ||
77 | #define QETH_CARD_TEXT_(card, level, text...) \ | |
78 | qeth_dbf_longtext(card->debug, level, text) | |
79 | ||
4a71df50 FB |
80 | #define SENSE_COMMAND_REJECT_BYTE 0 |
81 | #define SENSE_COMMAND_REJECT_FLAG 0x80 | |
82 | #define SENSE_RESETTING_EVENT_BYTE 1 | |
83 | #define SENSE_RESETTING_EVENT_FLAG 0x80 | |
84 | ||
85 | /* | |
86 | * Common IO related definitions | |
87 | */ | |
88 | #define CARD_RDEV(card) card->read.ccwdev | |
89 | #define CARD_WDEV(card) card->write.ccwdev | |
90 | #define CARD_DDEV(card) card->data.ccwdev | |
2a0217d5 KS |
91 | #define CARD_BUS_ID(card) dev_name(&card->gdev->dev) |
92 | #define CARD_RDEV_ID(card) dev_name(&card->read.ccwdev->dev) | |
93 | #define CARD_WDEV_ID(card) dev_name(&card->write.ccwdev->dev) | |
94 | #define CARD_DDEV_ID(card) dev_name(&card->data.ccwdev->dev) | |
95 | #define CHANNEL_ID(channel) dev_name(&channel->ccwdev->dev) | |
4a71df50 FB |
96 | |
97 | /** | |
98 | * card stuff | |
99 | */ | |
100 | struct qeth_perf_stats { | |
101 | unsigned int bufs_rec; | |
102 | unsigned int bufs_sent; | |
103 | ||
104 | unsigned int skbs_sent_pack; | |
105 | unsigned int bufs_sent_pack; | |
106 | ||
107 | unsigned int sc_dp_p; | |
108 | unsigned int sc_p_dp; | |
0da9581d EL |
109 | /* qdio_cq_handler: number of times called, time spent in */ |
110 | __u64 cq_start_time; | |
111 | unsigned int cq_cnt; | |
112 | unsigned int cq_time; | |
4a71df50 FB |
113 | /* qdio_input_handler: number of times called, time spent in */ |
114 | __u64 inbound_start_time; | |
115 | unsigned int inbound_cnt; | |
116 | unsigned int inbound_time; | |
117 | /* qeth_send_packet: number of times called, time spent in */ | |
118 | __u64 outbound_start_time; | |
119 | unsigned int outbound_cnt; | |
120 | unsigned int outbound_time; | |
121 | /* qdio_output_handler: number of times called, time spent in */ | |
122 | __u64 outbound_handler_start_time; | |
123 | unsigned int outbound_handler_cnt; | |
124 | unsigned int outbound_handler_time; | |
125 | /* number of calls to and time spent in do_QDIO for inbound queue */ | |
126 | __u64 inbound_do_qdio_start_time; | |
127 | unsigned int inbound_do_qdio_cnt; | |
128 | unsigned int inbound_do_qdio_time; | |
129 | /* number of calls to and time spent in do_QDIO for outbound queues */ | |
130 | __u64 outbound_do_qdio_start_time; | |
131 | unsigned int outbound_do_qdio_cnt; | |
132 | unsigned int outbound_do_qdio_time; | |
4a71df50 FB |
133 | unsigned int large_send_bytes; |
134 | unsigned int large_send_cnt; | |
135 | unsigned int sg_skbs_sent; | |
136 | unsigned int sg_frags_sent; | |
137 | /* initial values when measuring starts */ | |
138 | unsigned long initial_rx_packets; | |
139 | unsigned long initial_tx_packets; | |
140 | /* inbound scatter gather data */ | |
141 | unsigned int sg_skbs_rx; | |
142 | unsigned int sg_frags_rx; | |
143 | unsigned int sg_alloc_page_rx; | |
f61a0d05 | 144 | unsigned int tx_csum; |
c3b4a740 | 145 | unsigned int tx_lin; |
4a71df50 FB |
146 | }; |
147 | ||
148 | /* Routing stuff */ | |
149 | struct qeth_routing_info { | |
150 | enum qeth_routing_types type; | |
151 | }; | |
152 | ||
153 | /* IPA stuff */ | |
154 | struct qeth_ipa_info { | |
155 | __u32 supported_funcs; | |
156 | __u32 enabled_funcs; | |
157 | }; | |
158 | ||
b4d72c08 EC |
159 | /* SETBRIDGEPORT stuff */ |
160 | enum qeth_sbp_roles { | |
161 | QETH_SBP_ROLE_NONE = 0, | |
162 | QETH_SBP_ROLE_PRIMARY = 1, | |
163 | QETH_SBP_ROLE_SECONDARY = 2, | |
164 | }; | |
165 | ||
166 | enum qeth_sbp_states { | |
167 | QETH_SBP_STATE_INACTIVE = 0, | |
168 | QETH_SBP_STATE_STANDBY = 1, | |
169 | QETH_SBP_STATE_ACTIVE = 2, | |
170 | }; | |
171 | ||
9f48b9db EC |
172 | #define QETH_SBP_HOST_NOTIFICATION 1 |
173 | ||
b4d72c08 EC |
174 | struct qeth_sbp_info { |
175 | __u32 supported_funcs; | |
176 | enum qeth_sbp_roles role; | |
9f48b9db | 177 | __u32 hostnotification:1; |
b4d72c08 EC |
178 | }; |
179 | ||
4a71df50 FB |
180 | static inline int qeth_is_ipa_supported(struct qeth_ipa_info *ipa, |
181 | enum qeth_ipa_funcs func) | |
182 | { | |
183 | return (ipa->supported_funcs & func); | |
184 | } | |
185 | ||
186 | static inline int qeth_is_ipa_enabled(struct qeth_ipa_info *ipa, | |
187 | enum qeth_ipa_funcs func) | |
188 | { | |
189 | return (ipa->supported_funcs & ipa->enabled_funcs & func); | |
190 | } | |
191 | ||
192 | #define qeth_adp_supported(c, f) \ | |
193 | qeth_is_ipa_supported(&c->options.adp, f) | |
194 | #define qeth_adp_enabled(c, f) \ | |
195 | qeth_is_ipa_enabled(&c->options.adp, f) | |
196 | #define qeth_is_supported(c, f) \ | |
197 | qeth_is_ipa_supported(&c->options.ipa4, f) | |
198 | #define qeth_is_enabled(c, f) \ | |
199 | qeth_is_ipa_enabled(&c->options.ipa4, f) | |
200 | #define qeth_is_supported6(c, f) \ | |
201 | qeth_is_ipa_supported(&c->options.ipa6, f) | |
202 | #define qeth_is_enabled6(c, f) \ | |
203 | qeth_is_ipa_enabled(&c->options.ipa6, f) | |
204 | #define qeth_is_ipafunc_supported(c, prot, f) \ | |
205 | ((prot == QETH_PROT_IPV6) ? \ | |
206 | qeth_is_supported6(c, f) : qeth_is_supported(c, f)) | |
207 | #define qeth_is_ipafunc_enabled(c, prot, f) \ | |
208 | ((prot == QETH_PROT_IPV6) ? \ | |
209 | qeth_is_enabled6(c, f) : qeth_is_enabled(c, f)) | |
210 | ||
5113fec0 | 211 | #define QETH_IDX_FUNC_LEVEL_OSD 0x0101 |
6298263a | 212 | #define QETH_IDX_FUNC_LEVEL_IQD 0x4108 |
4a71df50 FB |
213 | |
214 | #define QETH_MODELLIST_ARRAY \ | |
5113fec0 UB |
215 | {{0x1731, 0x01, 0x1732, QETH_CARD_TYPE_OSD, QETH_MAX_QUEUES, 0}, \ |
216 | {0x1731, 0x05, 0x1732, QETH_CARD_TYPE_IQD, QETH_MAX_QUEUES, 0x103}, \ | |
217 | {0x1731, 0x06, 0x1732, QETH_CARD_TYPE_OSN, QETH_MAX_QUEUES, 0}, \ | |
218 | {0x1731, 0x02, 0x1732, QETH_CARD_TYPE_OSM, QETH_MAX_QUEUES, 0}, \ | |
219 | {0x1731, 0x02, 0x1732, QETH_CARD_TYPE_OSX, QETH_MAX_QUEUES, 0}, \ | |
220 | {0, 0, 0, 0, 0, 0} } | |
221 | #define QETH_CU_TYPE_IND 0 | |
222 | #define QETH_CU_MODEL_IND 1 | |
223 | #define QETH_DEV_TYPE_IND 2 | |
224 | #define QETH_DEV_MODEL_IND 3 | |
225 | #define QETH_QUEUE_NO_IND 4 | |
226 | #define QETH_MULTICAST_IND 5 | |
4a71df50 FB |
227 | |
228 | #define QETH_REAL_CARD 1 | |
229 | #define QETH_VLAN_CARD 2 | |
230 | #define QETH_BUFSIZE 4096 | |
231 | ||
232 | /** | |
233 | * some more defs | |
234 | */ | |
235 | #define QETH_TX_TIMEOUT 100 * HZ | |
236 | #define QETH_RCD_TIMEOUT 60 * HZ | |
b3332930 | 237 | #define QETH_RECLAIM_WORK_TIME HZ |
4a71df50 FB |
238 | #define QETH_HEADER_SIZE 32 |
239 | #define QETH_MAX_PORTNO 15 | |
240 | ||
241 | /*IPv6 address autoconfiguration stuff*/ | |
242 | #define UNIQUE_ID_IF_CREATE_ADDR_FAILED 0xfffe | |
243 | #define UNIQUE_ID_NOT_BY_CARD 0x10000 | |
244 | ||
245 | /*****************************************************************************/ | |
246 | /* QDIO queue and buffer handling */ | |
247 | /*****************************************************************************/ | |
248 | #define QETH_MAX_QUEUES 4 | |
249 | #define QETH_IN_BUF_SIZE_DEFAULT 65536 | |
dcf4ae2d FB |
250 | #define QETH_IN_BUF_COUNT_DEFAULT 64 |
251 | #define QETH_IN_BUF_COUNT_HSDEFAULT 128 | |
4a71df50 FB |
252 | #define QETH_IN_BUF_COUNT_MIN 8 |
253 | #define QETH_IN_BUF_COUNT_MAX 128 | |
254 | #define QETH_MAX_BUFFER_ELEMENTS(card) ((card)->qdio.in_buf_size >> 12) | |
255 | #define QETH_IN_BUF_REQUEUE_THRESHOLD(card) \ | |
0284a0fd | 256 | ((card)->qdio.in_buf_pool.buf_count / 2) |
4a71df50 FB |
257 | |
258 | /* buffers we have to be behind before we get a PCI */ | |
259 | #define QETH_PCI_THRESHOLD_A(card) ((card)->qdio.in_buf_pool.buf_count+1) | |
260 | /*enqueued free buffers left before we get a PCI*/ | |
261 | #define QETH_PCI_THRESHOLD_B(card) 0 | |
262 | /*not used unless the microcode gets patched*/ | |
263 | #define QETH_PCI_TIMER_VALUE(card) 3 | |
264 | ||
4a71df50 FB |
265 | /* priority queing */ |
266 | #define QETH_PRIOQ_DEFAULT QETH_NO_PRIO_QUEUEING | |
267 | #define QETH_DEFAULT_QUEUE 2 | |
268 | #define QETH_NO_PRIO_QUEUEING 0 | |
269 | #define QETH_PRIO_Q_ING_PREC 1 | |
270 | #define QETH_PRIO_Q_ING_TOS 2 | |
d66cb37e SR |
271 | #define QETH_PRIO_Q_ING_SKB 3 |
272 | #define QETH_PRIO_Q_ING_VLAN 4 | |
4a71df50 FB |
273 | |
274 | /* Packing */ | |
275 | #define QETH_LOW_WATERMARK_PACK 2 | |
276 | #define QETH_HIGH_WATERMARK_PACK 5 | |
277 | #define QETH_WATERMARK_PACK_FUZZ 1 | |
278 | ||
279 | #define QETH_IP_HEADER_SIZE 40 | |
280 | ||
281 | /* large receive scatter gather copy break */ | |
282 | #define QETH_RX_SG_CB (PAGE_SIZE >> 1) | |
b3332930 | 283 | #define QETH_RX_PULL_LEN 256 |
4a71df50 FB |
284 | |
285 | struct qeth_hdr_layer3 { | |
286 | __u8 id; | |
287 | __u8 flags; | |
288 | __u16 inbound_checksum; /*TSO:__u16 seqno */ | |
289 | __u32 token; /*TSO: __u32 reserved */ | |
290 | __u16 length; | |
291 | __u8 vlan_prio; | |
292 | __u8 ext_flags; | |
293 | __u16 vlan_id; | |
294 | __u16 frame_offset; | |
295 | __u8 dest_addr[16]; | |
296 | } __attribute__ ((packed)); | |
297 | ||
298 | struct qeth_hdr_layer2 { | |
299 | __u8 id; | |
300 | __u8 flags[3]; | |
301 | __u8 port_no; | |
302 | __u8 hdr_length; | |
303 | __u16 pkt_length; | |
304 | __u16 seq_no; | |
305 | __u16 vlan_id; | |
306 | __u32 reserved; | |
307 | __u8 reserved2[16]; | |
308 | } __attribute__ ((packed)); | |
309 | ||
310 | struct qeth_hdr_osn { | |
311 | __u8 id; | |
312 | __u8 reserved; | |
313 | __u16 seq_no; | |
314 | __u16 reserved2; | |
315 | __u16 control_flags; | |
316 | __u16 pdu_length; | |
317 | __u8 reserved3[18]; | |
318 | __u32 ccid; | |
319 | } __attribute__ ((packed)); | |
320 | ||
321 | struct qeth_hdr { | |
322 | union { | |
323 | struct qeth_hdr_layer2 l2; | |
324 | struct qeth_hdr_layer3 l3; | |
325 | struct qeth_hdr_osn osn; | |
326 | } hdr; | |
327 | } __attribute__ ((packed)); | |
328 | ||
329 | /*TCP Segmentation Offload header*/ | |
330 | struct qeth_hdr_ext_tso { | |
331 | __u16 hdr_tot_len; | |
332 | __u8 imb_hdr_no; | |
333 | __u8 reserved; | |
334 | __u8 hdr_type; | |
335 | __u8 hdr_version; | |
336 | __u16 hdr_len; | |
337 | __u32 payload_len; | |
338 | __u16 mss; | |
339 | __u16 dg_hdr_len; | |
340 | __u8 padding[16]; | |
341 | } __attribute__ ((packed)); | |
342 | ||
343 | struct qeth_hdr_tso { | |
344 | struct qeth_hdr hdr; /*hdr->hdr.l3.xxx*/ | |
345 | struct qeth_hdr_ext_tso ext; | |
346 | } __attribute__ ((packed)); | |
347 | ||
348 | ||
349 | /* flags for qeth_hdr.flags */ | |
350 | #define QETH_HDR_PASSTHRU 0x10 | |
351 | #define QETH_HDR_IPV6 0x80 | |
352 | #define QETH_HDR_CAST_MASK 0x07 | |
353 | enum qeth_cast_flags { | |
354 | QETH_CAST_UNICAST = 0x06, | |
355 | QETH_CAST_MULTICAST = 0x04, | |
356 | QETH_CAST_BROADCAST = 0x05, | |
357 | QETH_CAST_ANYCAST = 0x07, | |
358 | QETH_CAST_NOCAST = 0x00, | |
359 | }; | |
360 | ||
361 | enum qeth_layer2_frame_flags { | |
362 | QETH_LAYER2_FLAG_MULTICAST = 0x01, | |
363 | QETH_LAYER2_FLAG_BROADCAST = 0x02, | |
364 | QETH_LAYER2_FLAG_UNICAST = 0x04, | |
365 | QETH_LAYER2_FLAG_VLAN = 0x10, | |
366 | }; | |
367 | ||
368 | enum qeth_header_ids { | |
369 | QETH_HEADER_TYPE_LAYER3 = 0x01, | |
370 | QETH_HEADER_TYPE_LAYER2 = 0x02, | |
371 | QETH_HEADER_TYPE_TSO = 0x03, | |
372 | QETH_HEADER_TYPE_OSN = 0x04, | |
373 | }; | |
374 | /* flags for qeth_hdr.ext_flags */ | |
375 | #define QETH_HDR_EXT_VLAN_FRAME 0x01 | |
376 | #define QETH_HDR_EXT_TOKEN_ID 0x02 | |
377 | #define QETH_HDR_EXT_INCLUDE_VLAN_TAG 0x04 | |
378 | #define QETH_HDR_EXT_SRC_MAC_ADDR 0x08 | |
379 | #define QETH_HDR_EXT_CSUM_HDR_REQ 0x10 | |
380 | #define QETH_HDR_EXT_CSUM_TRANSP_REQ 0x20 | |
f6b85b6c | 381 | #define QETH_HDR_EXT_UDP 0x40 /*bit off for TCP*/ |
4a71df50 FB |
382 | |
383 | static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale) | |
384 | { | |
3ec90878 | 385 | return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY); |
4a71df50 FB |
386 | } |
387 | ||
388 | enum qeth_qdio_buffer_states { | |
389 | /* | |
390 | * inbound: read out by driver; owned by hardware in order to be filled | |
391 | * outbound: owned by driver in order to be filled | |
392 | */ | |
393 | QETH_QDIO_BUF_EMPTY, | |
394 | /* | |
395 | * inbound: filled by hardware; owned by driver in order to be read out | |
396 | * outbound: filled by driver; owned by hardware in order to be sent | |
397 | */ | |
398 | QETH_QDIO_BUF_PRIMED, | |
b3332930 FB |
399 | /* |
400 | * inbound: not applicable | |
401 | * outbound: identified to be pending in TPQ | |
402 | */ | |
403 | QETH_QDIO_BUF_PENDING, | |
404 | /* | |
405 | * inbound: not applicable | |
406 | * outbound: found in completion queue | |
407 | */ | |
408 | QETH_QDIO_BUF_IN_CQ, | |
0da9581d EL |
409 | /* |
410 | * inbound: not applicable | |
411 | * outbound: handled via transfer pending / completion queue | |
412 | */ | |
413 | QETH_QDIO_BUF_HANDLED_DELAYED, | |
4a71df50 FB |
414 | }; |
415 | ||
416 | enum qeth_qdio_info_states { | |
417 | QETH_QDIO_UNINITIALIZED, | |
418 | QETH_QDIO_ALLOCATED, | |
419 | QETH_QDIO_ESTABLISHED, | |
420 | QETH_QDIO_CLEANING | |
421 | }; | |
422 | ||
423 | struct qeth_buffer_pool_entry { | |
424 | struct list_head list; | |
425 | struct list_head init_list; | |
426 | void *elements[QDIO_MAX_ELEMENTS_PER_BUFFER]; | |
427 | }; | |
428 | ||
429 | struct qeth_qdio_buffer_pool { | |
430 | struct list_head entry_list; | |
431 | int buf_count; | |
432 | }; | |
433 | ||
434 | struct qeth_qdio_buffer { | |
435 | struct qdio_buffer *buffer; | |
436 | /* the buffer pool entry currently associated to this buffer */ | |
437 | struct qeth_buffer_pool_entry *pool_entry; | |
b3332930 | 438 | struct sk_buff *rx_skb; |
4a71df50 FB |
439 | }; |
440 | ||
441 | struct qeth_qdio_q { | |
6d284bde | 442 | struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q]; |
4a71df50 FB |
443 | struct qeth_qdio_buffer bufs[QDIO_MAX_BUFFERS_PER_Q]; |
444 | int next_buf_to_init; | |
6d284bde | 445 | }; |
4a71df50 | 446 | |
4a71df50 FB |
447 | struct qeth_qdio_out_buffer { |
448 | struct qdio_buffer *buffer; | |
449 | atomic_t state; | |
450 | int next_element_to_fill; | |
451 | struct sk_buff_head skb_list; | |
683d718a | 452 | int is_header[16]; |
0da9581d EL |
453 | |
454 | struct qaob *aob; | |
455 | struct qeth_qdio_out_q *q; | |
456 | struct qeth_qdio_out_buffer *next_pending; | |
4a71df50 FB |
457 | }; |
458 | ||
459 | struct qeth_card; | |
460 | ||
461 | enum qeth_out_q_states { | |
462 | QETH_OUT_Q_UNLOCKED, | |
463 | QETH_OUT_Q_LOCKED, | |
464 | QETH_OUT_Q_LOCKED_FLUSH, | |
465 | }; | |
466 | ||
467 | struct qeth_qdio_out_q { | |
d445a4e2 | 468 | struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q]; |
0da9581d EL |
469 | struct qeth_qdio_out_buffer *bufs[QDIO_MAX_BUFFERS_PER_Q]; |
470 | struct qdio_outbuf_state *bufstates; /* convenience pointer */ | |
4a71df50 FB |
471 | int queue_no; |
472 | struct qeth_card *card; | |
473 | atomic_t state; | |
474 | int do_pack; | |
475 | /* | |
476 | * index of buffer to be filled by driver; state EMPTY or PACKING | |
477 | */ | |
478 | int next_buf_to_fill; | |
479 | /* | |
480 | * number of buffers that are currently filled (PRIMED) | |
481 | * -> these buffers are hardware-owned | |
482 | */ | |
483 | atomic_t used_buffers; | |
484 | /* indicates whether PCI flag must be set (or if one is outstanding) */ | |
485 | atomic_t set_pci_flags_count; | |
d445a4e2 | 486 | }; |
4a71df50 FB |
487 | |
488 | struct qeth_qdio_info { | |
489 | atomic_t state; | |
490 | /* input */ | |
0da9581d | 491 | int no_in_queues; |
4a71df50 | 492 | struct qeth_qdio_q *in_q; |
0da9581d | 493 | struct qeth_qdio_q *c_q; |
4a71df50 FB |
494 | struct qeth_qdio_buffer_pool in_buf_pool; |
495 | struct qeth_qdio_buffer_pool init_pool; | |
496 | int in_buf_size; | |
497 | ||
498 | /* output */ | |
499 | int no_out_queues; | |
500 | struct qeth_qdio_out_q **out_qs; | |
0da9581d | 501 | struct qdio_outbuf_state *out_bufstates; |
4a71df50 FB |
502 | |
503 | /* priority queueing */ | |
504 | int do_prio_queueing; | |
505 | int default_out_queue; | |
506 | }; | |
507 | ||
508 | enum qeth_send_errors { | |
509 | QETH_SEND_ERROR_NONE, | |
510 | QETH_SEND_ERROR_LINK_FAILURE, | |
511 | QETH_SEND_ERROR_RETRY, | |
512 | QETH_SEND_ERROR_KICK_IT, | |
513 | }; | |
514 | ||
515 | #define QETH_ETH_MAC_V4 0x0100 /* like v4 */ | |
516 | #define QETH_ETH_MAC_V6 0x3333 /* like v6 */ | |
517 | /* tr mc mac is longer, but that will be enough to detect mc frames */ | |
518 | #define QETH_TR_MAC_NC 0xc000 /* non-canonical */ | |
519 | #define QETH_TR_MAC_C 0x0300 /* canonical */ | |
520 | ||
521 | #define DEFAULT_ADD_HHLEN 0 | |
522 | #define MAX_ADD_HHLEN 1024 | |
523 | ||
524 | /** | |
525 | * buffer stuff for read channel | |
526 | */ | |
527 | #define QETH_CMD_BUFFER_NO 8 | |
528 | ||
529 | /** | |
530 | * channel state machine | |
531 | */ | |
532 | enum qeth_channel_states { | |
533 | CH_STATE_UP, | |
534 | CH_STATE_DOWN, | |
535 | CH_STATE_ACTIVATING, | |
536 | CH_STATE_HALTED, | |
537 | CH_STATE_STOPPED, | |
538 | CH_STATE_RCD, | |
539 | CH_STATE_RCD_DONE, | |
540 | }; | |
541 | /** | |
542 | * card state machine | |
543 | */ | |
544 | enum qeth_card_states { | |
545 | CARD_STATE_DOWN, | |
546 | CARD_STATE_HARDSETUP, | |
547 | CARD_STATE_SOFTSETUP, | |
548 | CARD_STATE_UP, | |
549 | CARD_STATE_RECOVER, | |
550 | }; | |
551 | ||
552 | /** | |
553 | * Protocol versions | |
554 | */ | |
555 | enum qeth_prot_versions { | |
556 | QETH_PROT_IPV4 = 0x0004, | |
557 | QETH_PROT_IPV6 = 0x0006, | |
558 | }; | |
559 | ||
560 | enum qeth_ip_types { | |
561 | QETH_IP_TYPE_NORMAL, | |
562 | QETH_IP_TYPE_VIPA, | |
563 | QETH_IP_TYPE_RXIP, | |
564 | QETH_IP_TYPE_DEL_ALL_MC, | |
565 | }; | |
566 | ||
567 | enum qeth_cmd_buffer_state { | |
568 | BUF_STATE_FREE, | |
569 | BUF_STATE_LOCKED, | |
570 | BUF_STATE_PROCESSED, | |
571 | }; | |
572 | ||
0da9581d EL |
573 | enum qeth_cq { |
574 | QETH_CQ_DISABLED = 0, | |
575 | QETH_CQ_ENABLED = 1, | |
576 | QETH_CQ_NOTAVAILABLE = 2, | |
577 | }; | |
578 | ||
4a71df50 FB |
579 | struct qeth_ipato { |
580 | int enabled; | |
581 | int invert4; | |
582 | int invert6; | |
583 | struct list_head entries; | |
584 | }; | |
585 | ||
586 | struct qeth_channel; | |
587 | ||
588 | struct qeth_cmd_buffer { | |
589 | enum qeth_cmd_buffer_state state; | |
590 | struct qeth_channel *channel; | |
591 | unsigned char *data; | |
592 | int rc; | |
593 | void (*callback) (struct qeth_channel *, struct qeth_cmd_buffer *); | |
594 | }; | |
595 | ||
596 | /** | |
597 | * definition of a qeth channel, used for read and write | |
598 | */ | |
599 | struct qeth_channel { | |
600 | enum qeth_channel_states state; | |
601 | struct ccw1 ccw; | |
602 | spinlock_t iob_lock; | |
603 | wait_queue_head_t wait_q; | |
604 | struct tasklet_struct irq_tasklet; | |
605 | struct ccw_device *ccwdev; | |
606 | /*command buffer for control data*/ | |
607 | struct qeth_cmd_buffer iob[QETH_CMD_BUFFER_NO]; | |
608 | atomic_t irq_pending; | |
609 | int io_buf_no; | |
610 | int buf_no; | |
611 | }; | |
612 | ||
613 | /** | |
614 | * OSA card related definitions | |
615 | */ | |
616 | struct qeth_token { | |
617 | __u32 issuer_rm_w; | |
618 | __u32 issuer_rm_r; | |
619 | __u32 cm_filter_w; | |
620 | __u32 cm_filter_r; | |
621 | __u32 cm_connection_w; | |
622 | __u32 cm_connection_r; | |
623 | __u32 ulp_filter_w; | |
624 | __u32 ulp_filter_r; | |
625 | __u32 ulp_connection_w; | |
626 | __u32 ulp_connection_r; | |
627 | }; | |
628 | ||
629 | struct qeth_seqno { | |
630 | __u32 trans_hdr; | |
631 | __u32 pdu_hdr; | |
632 | __u32 pdu_hdr_ack; | |
633 | __u16 ipa; | |
634 | __u32 pkt_seqno; | |
635 | }; | |
636 | ||
637 | struct qeth_reply { | |
638 | struct list_head list; | |
639 | wait_queue_head_t wait_q; | |
640 | int (*callback)(struct qeth_card *, struct qeth_reply *, | |
641 | unsigned long); | |
642 | u32 seqno; | |
643 | unsigned long offset; | |
644 | atomic_t received; | |
645 | int rc; | |
646 | void *param; | |
647 | struct qeth_card *card; | |
648 | atomic_t refcnt; | |
649 | }; | |
650 | ||
651 | ||
652 | struct qeth_card_blkt { | |
653 | int time_total; | |
654 | int inter_packet; | |
655 | int inter_packet_jumbo; | |
656 | }; | |
657 | ||
658 | #define QETH_BROADCAST_WITH_ECHO 0x01 | |
659 | #define QETH_BROADCAST_WITHOUT_ECHO 0x02 | |
660 | #define QETH_LAYER2_MAC_READ 0x01 | |
661 | #define QETH_LAYER2_MAC_REGISTERED 0x02 | |
662 | struct qeth_card_info { | |
663 | unsigned short unit_addr2; | |
664 | unsigned short cula; | |
665 | unsigned short chpid; | |
666 | __u16 func_level; | |
667 | char mcl_level[QETH_MCL_LENGTH + 1]; | |
668 | int guestlan; | |
669 | int mac_bits; | |
670 | int portname_required; | |
671 | int portno; | |
672 | char portname[9]; | |
673 | enum qeth_card_types type; | |
674 | enum qeth_link_types link_type; | |
675 | int is_multicast_different; | |
676 | int initial_mtu; | |
677 | int max_mtu; | |
678 | int broadcast_capable; | |
679 | int unique_id; | |
680 | struct qeth_card_blkt blkt; | |
681 | __u32 csum_mask; | |
f6b85b6c | 682 | __u32 tx_csum_mask; |
4a71df50 | 683 | enum qeth_ipa_promisc_modes promisc_mode; |
1da74b1c FB |
684 | __u32 diagass_support; |
685 | __u32 hwtrap; | |
4a71df50 FB |
686 | }; |
687 | ||
688 | struct qeth_card_options { | |
689 | struct qeth_routing_info route4; | |
690 | struct qeth_ipa_info ipa4; | |
691 | struct qeth_ipa_info adp; /*Adapter parameters*/ | |
692 | struct qeth_routing_info route6; | |
693 | struct qeth_ipa_info ipa6; | |
b4d72c08 | 694 | struct qeth_sbp_info sbp; /* SETBRIDGEPORT options */ |
4a71df50 FB |
695 | int fake_broadcast; |
696 | int add_hhlen; | |
4a71df50 | 697 | int layer2; |
4a71df50 FB |
698 | int performance_stats; |
699 | int rx_sg_cb; | |
d64ecc22 | 700 | enum qeth_ipa_isolation_modes isolation; |
0f54761d | 701 | enum qeth_ipa_isolation_modes prev_isolation; |
76b11f8e | 702 | int sniffer; |
0da9581d | 703 | enum qeth_cq cq; |
b3332930 | 704 | char hsuid[9]; |
4a71df50 FB |
705 | }; |
706 | ||
707 | /* | |
708 | * thread bits for qeth_card thread masks | |
709 | */ | |
710 | enum qeth_threads { | |
711 | QETH_RECOVER_THREAD = 1, | |
712 | }; | |
713 | ||
714 | struct qeth_osn_info { | |
715 | int (*assist_cb)(struct net_device *dev, void *data); | |
716 | int (*data_cb)(struct sk_buff *skb); | |
717 | }; | |
718 | ||
719 | enum qeth_discipline_id { | |
720 | QETH_DISCIPLINE_LAYER3 = 0, | |
721 | QETH_DISCIPLINE_LAYER2 = 1, | |
722 | }; | |
723 | ||
724 | struct qeth_discipline { | |
a1c3ed4c | 725 | void (*start_poll)(struct ccw_device *, int, unsigned long); |
4a71df50 FB |
726 | qdio_handler_t *input_handler; |
727 | qdio_handler_t *output_handler; | |
728 | int (*recover)(void *ptr); | |
c041f2d4 SO |
729 | int (*setup) (struct ccwgroup_device *); |
730 | void (*remove) (struct ccwgroup_device *); | |
731 | int (*set_online) (struct ccwgroup_device *); | |
732 | int (*set_offline) (struct ccwgroup_device *); | |
733 | void (*shutdown)(struct ccwgroup_device *); | |
734 | int (*prepare) (struct ccwgroup_device *); | |
735 | void (*complete) (struct ccwgroup_device *); | |
736 | int (*freeze)(struct ccwgroup_device *); | |
737 | int (*thaw) (struct ccwgroup_device *); | |
738 | int (*restore)(struct ccwgroup_device *); | |
c044dc21 EC |
739 | int (*control_event_handler)(struct qeth_card *card, |
740 | struct qeth_ipa_cmd *cmd); | |
4a71df50 FB |
741 | }; |
742 | ||
743 | struct qeth_vlan_vid { | |
744 | struct list_head list; | |
745 | unsigned short vid; | |
746 | }; | |
747 | ||
748 | struct qeth_mc_mac { | |
749 | struct list_head list; | |
750 | __u8 mc_addr[MAX_ADDR_LEN]; | |
751 | unsigned char mc_addrlen; | |
7db2266a | 752 | int is_vmac; |
4a71df50 FB |
753 | }; |
754 | ||
a1c3ed4c FB |
755 | struct qeth_rx { |
756 | int b_count; | |
757 | int b_index; | |
758 | struct qdio_buffer_element *b_element; | |
759 | int e_offset; | |
760 | int qdio_err; | |
761 | }; | |
762 | ||
02d5cb5b EC |
763 | struct carrier_info { |
764 | __u8 card_type; | |
765 | __u16 port_mode; | |
766 | __u32 port_speed; | |
767 | }; | |
768 | ||
45cbb2e4 SR |
769 | struct qeth_switch_info { |
770 | __u32 capabilities; | |
771 | __u32 settings; | |
772 | }; | |
773 | ||
6541aa52 | 774 | #define QETH_NAPI_WEIGHT NAPI_POLL_WEIGHT |
a1c3ed4c | 775 | |
4a71df50 FB |
776 | struct qeth_card { |
777 | struct list_head list; | |
778 | enum qeth_card_states state; | |
779 | int lan_online; | |
780 | spinlock_t lock; | |
781 | struct ccwgroup_device *gdev; | |
782 | struct qeth_channel read; | |
783 | struct qeth_channel write; | |
784 | struct qeth_channel data; | |
785 | ||
786 | struct net_device *dev; | |
787 | struct net_device_stats stats; | |
788 | ||
789 | struct qeth_card_info info; | |
790 | struct qeth_token token; | |
791 | struct qeth_seqno seqno; | |
792 | struct qeth_card_options options; | |
793 | ||
794 | wait_queue_head_t wait_q; | |
795 | spinlock_t vlanlock; | |
796 | spinlock_t mclock; | |
7ff0bcf6 | 797 | unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; |
4a71df50 FB |
798 | struct list_head vid_list; |
799 | struct list_head mc_list; | |
800 | struct work_struct kernel_thread_starter; | |
801 | spinlock_t thread_mask_lock; | |
802 | unsigned long thread_start_mask; | |
803 | unsigned long thread_allowed_mask; | |
804 | unsigned long thread_running_mask; | |
65d8013c | 805 | struct task_struct *recovery_task; |
4a71df50 FB |
806 | spinlock_t ip_lock; |
807 | struct list_head ip_list; | |
808 | struct list_head *ip_tbd_list; | |
809 | struct qeth_ipato ipato; | |
810 | struct list_head cmd_waiter_list; | |
811 | /* QDIO buffer handling */ | |
812 | struct qeth_qdio_info qdio; | |
813 | struct qeth_perf_stats perf_stats; | |
908abbb5 | 814 | int read_or_write_problem; |
4a71df50 | 815 | struct qeth_osn_info osn_info; |
c041f2d4 | 816 | struct qeth_discipline *discipline; |
4a71df50 | 817 | atomic_t force_alloc_skb; |
6bcac508 | 818 | struct service_level qeth_service_level; |
76b11f8e | 819 | struct qdio_ssqd_desc ssqd; |
af039068 | 820 | debug_info_t *debug; |
c4949f07 | 821 | struct mutex conf_mutex; |
9dc48ccc | 822 | struct mutex discipline_mutex; |
a1c3ed4c FB |
823 | struct napi_struct napi; |
824 | struct qeth_rx rx; | |
b3332930 FB |
825 | struct delayed_work buffer_reclaim_work; |
826 | int reclaim_index; | |
0f54761d | 827 | struct work_struct close_dev_work; |
4a71df50 FB |
828 | }; |
829 | ||
830 | struct qeth_card_list_struct { | |
831 | struct list_head list; | |
832 | rwlock_t rwlock; | |
833 | }; | |
834 | ||
1da74b1c FB |
835 | struct qeth_trap_id { |
836 | __u16 lparnr; | |
837 | char vmname[8]; | |
838 | __u8 chpid; | |
839 | __u8 ssid; | |
840 | __u16 devno; | |
841 | } __packed; | |
842 | ||
4a71df50 FB |
843 | /*some helper functions*/ |
844 | #define QETH_CARD_IFNAME(card) (((card)->dev)? (card)->dev->name : "") | |
845 | ||
846 | static inline struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev) | |
847 | { | |
848 | struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *) | |
849 | dev_get_drvdata(&cdev->dev))->dev); | |
850 | return card; | |
851 | } | |
852 | ||
853 | static inline int qeth_get_micros(void) | |
854 | { | |
1aae0560 | 855 | return (int) (get_tod_clock() >> 12); |
4a71df50 FB |
856 | } |
857 | ||
4a71df50 FB |
858 | static inline int qeth_get_ip_version(struct sk_buff *skb) |
859 | { | |
a9baf10a SR |
860 | __be16 *p = &((struct ethhdr *)skb->data)->h_proto; |
861 | ||
862 | if (*p == ETH_P_8021Q) | |
863 | p += 2; | |
864 | switch (*p) { | |
4a71df50 FB |
865 | case ETH_P_IPV6: |
866 | return 6; | |
867 | case ETH_P_IP: | |
868 | return 4; | |
869 | default: | |
870 | return 0; | |
871 | } | |
872 | } | |
873 | ||
f90b744e FB |
874 | static inline void qeth_put_buffer_pool_entry(struct qeth_card *card, |
875 | struct qeth_buffer_pool_entry *entry) | |
876 | { | |
877 | list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list); | |
878 | } | |
879 | ||
1da74b1c FB |
880 | static inline int qeth_is_diagass_supported(struct qeth_card *card, |
881 | enum qeth_diags_cmds cmd) | |
882 | { | |
883 | return card->info.diagass_support & (__u32)cmd; | |
884 | } | |
885 | ||
c041f2d4 SO |
886 | extern struct qeth_discipline qeth_l2_discipline; |
887 | extern struct qeth_discipline qeth_l3_discipline; | |
b7169c51 SO |
888 | extern const struct attribute_group *qeth_generic_attr_groups[]; |
889 | extern const struct attribute_group *qeth_osn_attr_groups[]; | |
b4d72c08 | 890 | extern struct workqueue_struct *qeth_wq; |
b7169c51 | 891 | |
511c2445 | 892 | int qeth_card_hw_is_reachable(struct qeth_card *); |
4a71df50 FB |
893 | const char *qeth_get_cardname_short(struct qeth_card *); |
894 | int qeth_realloc_buffer_pool(struct qeth_card *, int); | |
895 | int qeth_core_load_discipline(struct qeth_card *, enum qeth_discipline_id); | |
896 | void qeth_core_free_discipline(struct qeth_card *); | |
b3332930 | 897 | void qeth_buffer_reclaim_work(struct work_struct *); |
4a71df50 FB |
898 | |
899 | /* exports for qeth discipline device drivers */ | |
900 | extern struct qeth_card_list_struct qeth_core_card_list; | |
683d718a | 901 | extern struct kmem_cache *qeth_core_header_cache; |
d11ba0c4 | 902 | extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS]; |
4a71df50 | 903 | |
65d8013c SR |
904 | void qeth_set_recovery_task(struct qeth_card *); |
905 | void qeth_clear_recovery_task(struct qeth_card *); | |
4a71df50 FB |
906 | void qeth_set_allowed_threads(struct qeth_card *, unsigned long , int); |
907 | int qeth_threads_running(struct qeth_card *, unsigned long); | |
908 | int qeth_wait_for_threads(struct qeth_card *, unsigned long); | |
909 | int qeth_do_run_thread(struct qeth_card *, unsigned long); | |
910 | void qeth_clear_thread_start_bit(struct qeth_card *, unsigned long); | |
911 | void qeth_clear_thread_running_bit(struct qeth_card *, unsigned long); | |
912 | int qeth_core_hardsetup_card(struct qeth_card *); | |
913 | void qeth_print_status_message(struct qeth_card *); | |
914 | int qeth_init_qdio_queues(struct qeth_card *); | |
915 | int qeth_send_startlan(struct qeth_card *); | |
916 | int qeth_send_stoplan(struct qeth_card *); | |
917 | int qeth_send_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *, | |
918 | int (*reply_cb) | |
919 | (struct qeth_card *, struct qeth_reply *, unsigned long), | |
920 | void *); | |
921 | struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *, | |
922 | enum qeth_ipa_cmds, enum qeth_prot_versions); | |
923 | int qeth_query_setadapterparms(struct qeth_card *); | |
76b11f8e UB |
924 | int qeth_check_qdio_errors(struct qeth_card *, struct qdio_buffer *, |
925 | unsigned int, const char *); | |
4a71df50 FB |
926 | void qeth_queue_input_buffer(struct qeth_card *, int); |
927 | struct sk_buff *qeth_core_get_next_skb(struct qeth_card *, | |
b3332930 | 928 | struct qeth_qdio_buffer *, struct qdio_buffer_element **, int *, |
4a71df50 FB |
929 | struct qeth_hdr **); |
930 | void qeth_schedule_recovery(struct qeth_card *); | |
a1c3ed4c FB |
931 | void qeth_qdio_start_poll(struct ccw_device *, int, unsigned long); |
932 | void qeth_qdio_input_handler(struct ccw_device *, | |
933 | unsigned int, unsigned int, int, | |
934 | int, unsigned long); | |
4a71df50 | 935 | void qeth_qdio_output_handler(struct ccw_device *, unsigned int, |
779e6e1c | 936 | int, int, int, unsigned long); |
4a71df50 FB |
937 | void qeth_clear_ipacmd_list(struct qeth_card *); |
938 | int qeth_qdio_clear_card(struct qeth_card *, int); | |
939 | void qeth_clear_working_pool_list(struct qeth_card *); | |
940 | void qeth_clear_cmd_buffers(struct qeth_channel *); | |
941 | void qeth_clear_qdio_buffers(struct qeth_card *); | |
942 | void qeth_setadp_promisc_mode(struct qeth_card *); | |
943 | struct net_device_stats *qeth_get_stats(struct net_device *); | |
944 | int qeth_change_mtu(struct net_device *, int); | |
945 | int qeth_setadpparms_change_macaddr(struct qeth_card *); | |
946 | void qeth_tx_timeout(struct net_device *); | |
947 | void qeth_prepare_control_data(struct qeth_card *, int, | |
948 | struct qeth_cmd_buffer *); | |
949 | void qeth_release_buffer(struct qeth_channel *, struct qeth_cmd_buffer *); | |
950 | void qeth_prepare_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *, char); | |
951 | struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *); | |
952 | int qeth_mdio_read(struct net_device *, int, int); | |
953 | int qeth_snmp_command(struct qeth_card *, char __user *); | |
c3ab96f3 | 954 | int qeth_query_oat_command(struct qeth_card *, char __user *); |
45cbb2e4 SR |
955 | int qeth_query_switch_attributes(struct qeth_card *card, |
956 | struct qeth_switch_info *sw_info); | |
02d5cb5b EC |
957 | int qeth_query_card_info(struct qeth_card *card, |
958 | struct carrier_info *carrier_info); | |
4a71df50 FB |
959 | int qeth_send_control_data(struct qeth_card *, int, struct qeth_cmd_buffer *, |
960 | int (*reply_cb)(struct qeth_card *, struct qeth_reply*, unsigned long), | |
961 | void *reply_param); | |
b4d72c08 EC |
962 | int qeth_bridgeport_query_ports(struct qeth_card *card, |
963 | enum qeth_sbp_roles *role, enum qeth_sbp_states *state); | |
964 | int qeth_bridgeport_setrole(struct qeth_card *card, enum qeth_sbp_roles role); | |
9f48b9db | 965 | int qeth_bridgeport_an_set(struct qeth_card *card, int enable); |
4a71df50 | 966 | int qeth_get_priority_queue(struct qeth_card *, struct sk_buff *, int, int); |
065cc782 | 967 | int qeth_get_elements_no(struct qeth_card *, struct sk_buff *, int); |
271648b4 | 968 | int qeth_get_elements_for_frags(struct sk_buff *); |
4a71df50 | 969 | int qeth_do_send_packet_fast(struct qeth_card *, struct qeth_qdio_out_q *, |
64ef8957 | 970 | struct sk_buff *, struct qeth_hdr *, int, int, int); |
4a71df50 | 971 | int qeth_do_send_packet(struct qeth_card *, struct qeth_qdio_out_q *, |
64ef8957 | 972 | struct sk_buff *, struct qeth_hdr *, int); |
df8b4ec8 | 973 | int qeth_core_get_sset_count(struct net_device *, int); |
4a71df50 FB |
974 | void qeth_core_get_ethtool_stats(struct net_device *, |
975 | struct ethtool_stats *, u64 *); | |
976 | void qeth_core_get_strings(struct net_device *, u32, u8 *); | |
977 | void qeth_core_get_drvinfo(struct net_device *, struct ethtool_drvinfo *); | |
8e96c51c | 978 | void qeth_dbf_longtext(debug_info_t *id, int level, char *text, ...); |
3f9975aa | 979 | int qeth_core_ethtool_get_settings(struct net_device *, struct ethtool_cmd *); |
0f54761d | 980 | int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback); |
d4ae1f5e | 981 | int qeth_hdr_chk_and_bounce(struct sk_buff *, struct qeth_hdr **, int); |
0da9581d | 982 | int qeth_configure_cq(struct qeth_card *, enum qeth_cq); |
1da74b1c FB |
983 | int qeth_hw_trap(struct qeth_card *, enum qeth_diags_trap_action); |
984 | int qeth_query_ipassists(struct qeth_card *, enum qeth_prot_versions prot); | |
395672e0 | 985 | void qeth_trace_features(struct qeth_card *); |
0f54761d | 986 | void qeth_close_dev(struct qeth_card *); |
4a71df50 FB |
987 | |
988 | /* exports for OSN */ | |
989 | int qeth_osn_assist(struct net_device *, void *, int); | |
990 | int qeth_osn_register(unsigned char *read_dev_no, struct net_device **, | |
991 | int (*assist_cb)(struct net_device *, void *), | |
992 | int (*data_cb)(struct sk_buff *)); | |
993 | void qeth_osn_deregister(struct net_device *); | |
994 | ||
995 | #endif /* __QETH_CORE_H__ */ |