Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
4a71df50 | 2 | /* |
4a71df50 FB |
3 | * Copyright IBM Corp. 2007 |
4 | * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, | |
5 | * Frank Pavlic <fpavlic@de.ibm.com>, | |
6 | * Thomas Spatzier <tspat@de.ibm.com>, | |
7 | * Frank Blaschka <frank.blaschka@de.ibm.com> | |
8 | */ | |
9 | ||
10 | #ifndef __QETH_CORE_H__ | |
11 | #define __QETH_CORE_H__ | |
12 | ||
13 | #include <linux/if.h> | |
14 | #include <linux/if_arp.h> | |
4a71df50 FB |
15 | #include <linux/etherdevice.h> |
16 | #include <linux/if_vlan.h> | |
17 | #include <linux/ctype.h> | |
18 | #include <linux/in6.h> | |
19 | #include <linux/bitops.h> | |
20 | #include <linux/seq_file.h> | |
fe5c8028 | 21 | #include <linux/hashtable.h> |
41aeed58 | 22 | #include <linux/ip.h> |
ae695927 | 23 | #include <linux/refcount.h> |
c2780c1a | 24 | #include <linux/workqueue.h> |
4a71df50 FB |
25 | |
26 | #include <net/ipv6.h> | |
27 | #include <net/if_inet6.h> | |
28 | #include <net/addrconf.h> | |
e517b649 | 29 | #include <net/tcp.h> |
4a71df50 FB |
30 | |
31 | #include <asm/debug.h> | |
32 | #include <asm/qdio.h> | |
33 | #include <asm/ccwdev.h> | |
34 | #include <asm/ccwgroup.h> | |
6bcac508 | 35 | #include <asm/sysinfo.h> |
4a71df50 | 36 | |
b0abc4f5 JW |
37 | #include <uapi/linux/if_link.h> |
38 | ||
4a71df50 FB |
39 | #include "qeth_core_mpc.h" |
40 | ||
41 | /** | |
42 | * Debug Facility stuff | |
43 | */ | |
d11ba0c4 PT |
44 | enum qeth_dbf_names { |
45 | QETH_DBF_SETUP, | |
d11ba0c4 | 46 | QETH_DBF_MSG, |
d11ba0c4 PT |
47 | QETH_DBF_CTRL, |
48 | QETH_DBF_INFOS /* must be last element */ | |
49 | }; | |
50 | ||
51 | struct qeth_dbf_info { | |
52 | char name[DEBUG_MAX_NAME_LEN]; | |
53 | int pages; | |
54 | int areas; | |
55 | int len; | |
56 | int level; | |
57 | struct debug_view *view; | |
58 | debug_info_t *id; | |
59 | }; | |
60 | ||
61 | #define QETH_DBF_CTRL_LEN 256 | |
4a71df50 FB |
62 | |
63 | #define QETH_DBF_TEXT(name, level, text) \ | |
d11ba0c4 | 64 | debug_text_event(qeth_dbf[QETH_DBF_##name].id, level, text) |
4a71df50 FB |
65 | |
66 | #define QETH_DBF_HEX(name, level, addr, len) \ | |
d11ba0c4 PT |
67 | debug_event(qeth_dbf[QETH_DBF_##name].id, level, (void *)(addr), len) |
68 | ||
69 | #define QETH_DBF_MESSAGE(level, text...) \ | |
70 | debug_sprintf_event(qeth_dbf[QETH_DBF_MSG].id, level, text) | |
71 | ||
72 | #define QETH_DBF_TEXT_(name, level, text...) \ | |
8e96c51c | 73 | qeth_dbf_longtext(qeth_dbf[QETH_DBF_##name].id, level, text) |
4a71df50 | 74 | |
af039068 CO |
75 | #define QETH_CARD_TEXT(card, level, text) \ |
76 | debug_text_event(card->debug, level, text) | |
77 | ||
78 | #define QETH_CARD_HEX(card, level, addr, len) \ | |
79 | debug_event(card->debug, level, (void *)(addr), len) | |
80 | ||
81 | #define QETH_CARD_MESSAGE(card, text...) \ | |
82 | debug_sprintf_event(card->debug, level, text) | |
83 | ||
84 | #define QETH_CARD_TEXT_(card, level, text...) \ | |
85 | qeth_dbf_longtext(card->debug, level, text) | |
86 | ||
4a71df50 FB |
87 | #define SENSE_COMMAND_REJECT_BYTE 0 |
88 | #define SENSE_COMMAND_REJECT_FLAG 0x80 | |
89 | #define SENSE_RESETTING_EVENT_BYTE 1 | |
90 | #define SENSE_RESETTING_EVENT_FLAG 0x80 | |
91 | ||
e19e5be8 JW |
92 | static inline u32 qeth_get_device_id(struct ccw_device *cdev) |
93 | { | |
94 | struct ccw_dev_id dev_id; | |
95 | u32 id; | |
96 | ||
97 | ccw_device_get_id(cdev, &dev_id); | |
98 | id = dev_id.devno; | |
99 | id |= (u32) (dev_id.ssid << 16); | |
100 | ||
101 | return id; | |
102 | } | |
103 | ||
4a71df50 FB |
104 | /* |
105 | * Common IO related definitions | |
106 | */ | |
107 | #define CARD_RDEV(card) card->read.ccwdev | |
108 | #define CARD_WDEV(card) card->write.ccwdev | |
109 | #define CARD_DDEV(card) card->data.ccwdev | |
2a0217d5 KS |
110 | #define CARD_BUS_ID(card) dev_name(&card->gdev->dev) |
111 | #define CARD_RDEV_ID(card) dev_name(&card->read.ccwdev->dev) | |
112 | #define CARD_WDEV_ID(card) dev_name(&card->write.ccwdev->dev) | |
113 | #define CARD_DDEV_ID(card) dev_name(&card->data.ccwdev->dev) | |
e19e5be8 JW |
114 | #define CCW_DEVID(cdev) (qeth_get_device_id(cdev)) |
115 | #define CARD_DEVID(card) (CCW_DEVID(CARD_RDEV(card))) | |
4a71df50 | 116 | |
4a71df50 FB |
117 | /* Routing stuff */ |
118 | struct qeth_routing_info { | |
119 | enum qeth_routing_types type; | |
120 | }; | |
121 | ||
122 | /* IPA stuff */ | |
123 | struct qeth_ipa_info { | |
124 | __u32 supported_funcs; | |
125 | __u32 enabled_funcs; | |
126 | }; | |
127 | ||
b4d72c08 EC |
128 | /* SETBRIDGEPORT stuff */ |
129 | enum qeth_sbp_roles { | |
130 | QETH_SBP_ROLE_NONE = 0, | |
131 | QETH_SBP_ROLE_PRIMARY = 1, | |
132 | QETH_SBP_ROLE_SECONDARY = 2, | |
133 | }; | |
134 | ||
135 | enum qeth_sbp_states { | |
136 | QETH_SBP_STATE_INACTIVE = 0, | |
137 | QETH_SBP_STATE_STANDBY = 1, | |
138 | QETH_SBP_STATE_ACTIVE = 2, | |
139 | }; | |
140 | ||
9f48b9db EC |
141 | #define QETH_SBP_HOST_NOTIFICATION 1 |
142 | ||
b4d72c08 EC |
143 | struct qeth_sbp_info { |
144 | __u32 supported_funcs; | |
145 | enum qeth_sbp_roles role; | |
9f48b9db | 146 | __u32 hostnotification:1; |
0db587b0 EC |
147 | __u32 reflect_promisc:1; |
148 | __u32 reflect_promisc_primary:1; | |
b4d72c08 EC |
149 | }; |
150 | ||
a45b3faf HW |
151 | struct qeth_vnicc_info { |
152 | /* supported/currently configured VNICCs; updated in IPA exchanges */ | |
153 | u32 sup_chars; | |
154 | u32 cur_chars; | |
caa1f0b1 HW |
155 | /* supported commands: bitmasks which VNICCs support respective cmd */ |
156 | u32 set_char_sup; | |
349d13d5 HW |
157 | u32 getset_timeout_sup; |
158 | /* timeout value for the learning characteristic */ | |
159 | u32 learning_timeout; | |
caa1f0b1 HW |
160 | /* characteristics wanted/configured by user */ |
161 | u32 wanted_chars; | |
162 | /* has user explicitly enabled rx_bcast while online? */ | |
163 | bool rx_bcast_enabled; | |
a45b3faf HW |
164 | }; |
165 | ||
4a71df50 FB |
166 | static inline int qeth_is_ipa_supported(struct qeth_ipa_info *ipa, |
167 | enum qeth_ipa_funcs func) | |
168 | { | |
169 | return (ipa->supported_funcs & func); | |
170 | } | |
171 | ||
172 | static inline int qeth_is_ipa_enabled(struct qeth_ipa_info *ipa, | |
173 | enum qeth_ipa_funcs func) | |
174 | { | |
175 | return (ipa->supported_funcs & ipa->enabled_funcs & func); | |
176 | } | |
177 | ||
178 | #define qeth_adp_supported(c, f) \ | |
179 | qeth_is_ipa_supported(&c->options.adp, f) | |
180 | #define qeth_adp_enabled(c, f) \ | |
181 | qeth_is_ipa_enabled(&c->options.adp, f) | |
182 | #define qeth_is_supported(c, f) \ | |
183 | qeth_is_ipa_supported(&c->options.ipa4, f) | |
184 | #define qeth_is_enabled(c, f) \ | |
185 | qeth_is_ipa_enabled(&c->options.ipa4, f) | |
186 | #define qeth_is_supported6(c, f) \ | |
187 | qeth_is_ipa_supported(&c->options.ipa6, f) | |
188 | #define qeth_is_enabled6(c, f) \ | |
189 | qeth_is_ipa_enabled(&c->options.ipa6, f) | |
190 | #define qeth_is_ipafunc_supported(c, prot, f) \ | |
191 | ((prot == QETH_PROT_IPV6) ? \ | |
192 | qeth_is_supported6(c, f) : qeth_is_supported(c, f)) | |
193 | #define qeth_is_ipafunc_enabled(c, prot, f) \ | |
194 | ((prot == QETH_PROT_IPV6) ? \ | |
195 | qeth_is_enabled6(c, f) : qeth_is_enabled(c, f)) | |
196 | ||
5113fec0 | 197 | #define QETH_IDX_FUNC_LEVEL_OSD 0x0101 |
6298263a | 198 | #define QETH_IDX_FUNC_LEVEL_IQD 0x4108 |
4a71df50 | 199 | |
4a71df50 | 200 | #define QETH_BUFSIZE 4096 |
45ca2fd6 JW |
201 | #define CCW_CMD_WRITE 0x01 |
202 | #define CCW_CMD_READ 0x02 | |
4a71df50 FB |
203 | |
204 | /** | |
205 | * some more defs | |
206 | */ | |
207 | #define QETH_TX_TIMEOUT 100 * HZ | |
208 | #define QETH_RCD_TIMEOUT 60 * HZ | |
b3332930 | 209 | #define QETH_RECLAIM_WORK_TIME HZ |
4a71df50 FB |
210 | #define QETH_MAX_PORTNO 15 |
211 | ||
212 | /*IPv6 address autoconfiguration stuff*/ | |
213 | #define UNIQUE_ID_IF_CREATE_ADDR_FAILED 0xfffe | |
214 | #define UNIQUE_ID_NOT_BY_CARD 0x10000 | |
215 | ||
216 | /*****************************************************************************/ | |
217 | /* QDIO queue and buffer handling */ | |
218 | /*****************************************************************************/ | |
219 | #define QETH_MAX_QUEUES 4 | |
220 | #define QETH_IN_BUF_SIZE_DEFAULT 65536 | |
dcf4ae2d FB |
221 | #define QETH_IN_BUF_COUNT_DEFAULT 64 |
222 | #define QETH_IN_BUF_COUNT_HSDEFAULT 128 | |
4a71df50 FB |
223 | #define QETH_IN_BUF_COUNT_MIN 8 |
224 | #define QETH_IN_BUF_COUNT_MAX 128 | |
225 | #define QETH_MAX_BUFFER_ELEMENTS(card) ((card)->qdio.in_buf_size >> 12) | |
226 | #define QETH_IN_BUF_REQUEUE_THRESHOLD(card) \ | |
0284a0fd | 227 | ((card)->qdio.in_buf_pool.buf_count / 2) |
4a71df50 FB |
228 | |
229 | /* buffers we have to be behind before we get a PCI */ | |
230 | #define QETH_PCI_THRESHOLD_A(card) ((card)->qdio.in_buf_pool.buf_count+1) | |
231 | /*enqueued free buffers left before we get a PCI*/ | |
232 | #define QETH_PCI_THRESHOLD_B(card) 0 | |
233 | /*not used unless the microcode gets patched*/ | |
234 | #define QETH_PCI_TIMER_VALUE(card) 3 | |
235 | ||
4a71df50 FB |
236 | /* priority queing */ |
237 | #define QETH_PRIOQ_DEFAULT QETH_NO_PRIO_QUEUEING | |
238 | #define QETH_DEFAULT_QUEUE 2 | |
239 | #define QETH_NO_PRIO_QUEUEING 0 | |
240 | #define QETH_PRIO_Q_ING_PREC 1 | |
241 | #define QETH_PRIO_Q_ING_TOS 2 | |
d66cb37e SR |
242 | #define QETH_PRIO_Q_ING_SKB 3 |
243 | #define QETH_PRIO_Q_ING_VLAN 4 | |
4a71df50 FB |
244 | |
245 | /* Packing */ | |
246 | #define QETH_LOW_WATERMARK_PACK 2 | |
247 | #define QETH_HIGH_WATERMARK_PACK 5 | |
248 | #define QETH_WATERMARK_PACK_FUZZ 1 | |
249 | ||
4a71df50 FB |
250 | /* large receive scatter gather copy break */ |
251 | #define QETH_RX_SG_CB (PAGE_SIZE >> 1) | |
b3332930 | 252 | #define QETH_RX_PULL_LEN 256 |
4a71df50 FB |
253 | |
254 | struct qeth_hdr_layer3 { | |
255 | __u8 id; | |
256 | __u8 flags; | |
257 | __u16 inbound_checksum; /*TSO:__u16 seqno */ | |
258 | __u32 token; /*TSO: __u32 reserved */ | |
259 | __u16 length; | |
260 | __u8 vlan_prio; | |
261 | __u8 ext_flags; | |
262 | __u16 vlan_id; | |
263 | __u16 frame_offset; | |
a843383a JW |
264 | union { |
265 | /* TX: */ | |
5a541f6d | 266 | struct in6_addr ipv6_addr; |
a843383a JW |
267 | struct ipv4 { |
268 | u8 res[12]; | |
269 | u32 addr; | |
270 | } ipv4; | |
271 | /* RX: */ | |
272 | struct rx { | |
273 | u8 res1[2]; | |
274 | u8 src_mac[6]; | |
275 | u8 res2[4]; | |
276 | u16 vlan_id; | |
277 | u8 res3[2]; | |
278 | } rx; | |
279 | } next_hop; | |
280 | }; | |
4a71df50 FB |
281 | |
282 | struct qeth_hdr_layer2 { | |
283 | __u8 id; | |
284 | __u8 flags[3]; | |
285 | __u8 port_no; | |
286 | __u8 hdr_length; | |
287 | __u16 pkt_length; | |
288 | __u16 seq_no; | |
289 | __u16 vlan_id; | |
290 | __u32 reserved; | |
291 | __u8 reserved2[16]; | |
292 | } __attribute__ ((packed)); | |
293 | ||
294 | struct qeth_hdr_osn { | |
295 | __u8 id; | |
296 | __u8 reserved; | |
297 | __u16 seq_no; | |
298 | __u16 reserved2; | |
299 | __u16 control_flags; | |
300 | __u16 pdu_length; | |
301 | __u8 reserved3[18]; | |
302 | __u32 ccid; | |
303 | } __attribute__ ((packed)); | |
304 | ||
305 | struct qeth_hdr { | |
306 | union { | |
307 | struct qeth_hdr_layer2 l2; | |
308 | struct qeth_hdr_layer3 l3; | |
309 | struct qeth_hdr_osn osn; | |
310 | } hdr; | |
311 | } __attribute__ ((packed)); | |
312 | ||
313 | /*TCP Segmentation Offload header*/ | |
314 | struct qeth_hdr_ext_tso { | |
315 | __u16 hdr_tot_len; | |
316 | __u8 imb_hdr_no; | |
317 | __u8 reserved; | |
318 | __u8 hdr_type; | |
319 | __u8 hdr_version; | |
320 | __u16 hdr_len; | |
321 | __u32 payload_len; | |
322 | __u16 mss; | |
323 | __u16 dg_hdr_len; | |
324 | __u8 padding[16]; | |
325 | } __attribute__ ((packed)); | |
326 | ||
327 | struct qeth_hdr_tso { | |
328 | struct qeth_hdr hdr; /*hdr->hdr.l3.xxx*/ | |
329 | struct qeth_hdr_ext_tso ext; | |
330 | } __attribute__ ((packed)); | |
331 | ||
332 | ||
333 | /* flags for qeth_hdr.flags */ | |
334 | #define QETH_HDR_PASSTHRU 0x10 | |
335 | #define QETH_HDR_IPV6 0x80 | |
336 | #define QETH_HDR_CAST_MASK 0x07 | |
337 | enum qeth_cast_flags { | |
338 | QETH_CAST_UNICAST = 0x06, | |
339 | QETH_CAST_MULTICAST = 0x04, | |
340 | QETH_CAST_BROADCAST = 0x05, | |
341 | QETH_CAST_ANYCAST = 0x07, | |
342 | QETH_CAST_NOCAST = 0x00, | |
343 | }; | |
344 | ||
345 | enum qeth_layer2_frame_flags { | |
346 | QETH_LAYER2_FLAG_MULTICAST = 0x01, | |
347 | QETH_LAYER2_FLAG_BROADCAST = 0x02, | |
348 | QETH_LAYER2_FLAG_UNICAST = 0x04, | |
349 | QETH_LAYER2_FLAG_VLAN = 0x10, | |
350 | }; | |
351 | ||
352 | enum qeth_header_ids { | |
353 | QETH_HEADER_TYPE_LAYER3 = 0x01, | |
354 | QETH_HEADER_TYPE_LAYER2 = 0x02, | |
0aef8392 | 355 | QETH_HEADER_TYPE_L3_TSO = 0x03, |
4a71df50 | 356 | QETH_HEADER_TYPE_OSN = 0x04, |
0aef8392 | 357 | QETH_HEADER_TYPE_L2_TSO = 0x06, |
4a71df50 FB |
358 | }; |
359 | /* flags for qeth_hdr.ext_flags */ | |
360 | #define QETH_HDR_EXT_VLAN_FRAME 0x01 | |
361 | #define QETH_HDR_EXT_TOKEN_ID 0x02 | |
362 | #define QETH_HDR_EXT_INCLUDE_VLAN_TAG 0x04 | |
363 | #define QETH_HDR_EXT_SRC_MAC_ADDR 0x08 | |
364 | #define QETH_HDR_EXT_CSUM_HDR_REQ 0x10 | |
365 | #define QETH_HDR_EXT_CSUM_TRANSP_REQ 0x20 | |
f6b85b6c | 366 | #define QETH_HDR_EXT_UDP 0x40 /*bit off for TCP*/ |
4a71df50 | 367 | |
4a71df50 FB |
368 | enum qeth_qdio_buffer_states { |
369 | /* | |
370 | * inbound: read out by driver; owned by hardware in order to be filled | |
371 | * outbound: owned by driver in order to be filled | |
372 | */ | |
373 | QETH_QDIO_BUF_EMPTY, | |
374 | /* | |
375 | * inbound: filled by hardware; owned by driver in order to be read out | |
376 | * outbound: filled by driver; owned by hardware in order to be sent | |
377 | */ | |
378 | QETH_QDIO_BUF_PRIMED, | |
b3332930 FB |
379 | /* |
380 | * inbound: not applicable | |
381 | * outbound: identified to be pending in TPQ | |
382 | */ | |
383 | QETH_QDIO_BUF_PENDING, | |
384 | /* | |
385 | * inbound: not applicable | |
386 | * outbound: found in completion queue | |
387 | */ | |
388 | QETH_QDIO_BUF_IN_CQ, | |
0da9581d EL |
389 | /* |
390 | * inbound: not applicable | |
391 | * outbound: handled via transfer pending / completion queue | |
392 | */ | |
393 | QETH_QDIO_BUF_HANDLED_DELAYED, | |
4a71df50 FB |
394 | }; |
395 | ||
396 | enum qeth_qdio_info_states { | |
397 | QETH_QDIO_UNINITIALIZED, | |
398 | QETH_QDIO_ALLOCATED, | |
399 | QETH_QDIO_ESTABLISHED, | |
400 | QETH_QDIO_CLEANING | |
401 | }; | |
402 | ||
403 | struct qeth_buffer_pool_entry { | |
404 | struct list_head list; | |
405 | struct list_head init_list; | |
406 | void *elements[QDIO_MAX_ELEMENTS_PER_BUFFER]; | |
407 | }; | |
408 | ||
409 | struct qeth_qdio_buffer_pool { | |
410 | struct list_head entry_list; | |
411 | int buf_count; | |
412 | }; | |
413 | ||
414 | struct qeth_qdio_buffer { | |
415 | struct qdio_buffer *buffer; | |
416 | /* the buffer pool entry currently associated to this buffer */ | |
417 | struct qeth_buffer_pool_entry *pool_entry; | |
b3332930 | 418 | struct sk_buff *rx_skb; |
4a71df50 FB |
419 | }; |
420 | ||
421 | struct qeth_qdio_q { | |
6d284bde | 422 | struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q]; |
4a71df50 FB |
423 | struct qeth_qdio_buffer bufs[QDIO_MAX_BUFFERS_PER_Q]; |
424 | int next_buf_to_init; | |
6d284bde | 425 | }; |
4a71df50 | 426 | |
4a71df50 FB |
427 | struct qeth_qdio_out_buffer { |
428 | struct qdio_buffer *buffer; | |
429 | atomic_t state; | |
430 | int next_element_to_fill; | |
431 | struct sk_buff_head skb_list; | |
2aedd56a | 432 | int is_header[QDIO_MAX_ELEMENTS_PER_BUFFER]; |
0da9581d | 433 | |
0da9581d EL |
434 | struct qeth_qdio_out_q *q; |
435 | struct qeth_qdio_out_buffer *next_pending; | |
4a71df50 FB |
436 | }; |
437 | ||
438 | struct qeth_card; | |
439 | ||
440 | enum qeth_out_q_states { | |
441 | QETH_OUT_Q_UNLOCKED, | |
442 | QETH_OUT_Q_LOCKED, | |
443 | QETH_OUT_Q_LOCKED_FLUSH, | |
444 | }; | |
445 | ||
b0abc4f5 JW |
446 | #define QETH_CARD_STAT_ADD(_c, _stat, _val) ((_c)->stats._stat += (_val)) |
447 | #define QETH_CARD_STAT_INC(_c, _stat) QETH_CARD_STAT_ADD(_c, _stat, 1) | |
448 | ||
449 | #define QETH_TXQ_STAT_ADD(_q, _stat, _val) ((_q)->stats._stat += (_val)) | |
450 | #define QETH_TXQ_STAT_INC(_q, _stat) QETH_TXQ_STAT_ADD(_q, _stat, 1) | |
451 | ||
452 | struct qeth_card_stats { | |
453 | u64 rx_bufs; | |
454 | u64 rx_skb_csum; | |
455 | u64 rx_sg_skbs; | |
456 | u64 rx_sg_frags; | |
457 | u64 rx_sg_alloc_page; | |
458 | ||
459 | /* rtnl_link_stats64 */ | |
460 | u64 rx_packets; | |
461 | u64 rx_bytes; | |
462 | u64 rx_errors; | |
463 | u64 rx_dropped; | |
464 | u64 rx_multicast; | |
465 | u64 tx_errors; | |
466 | }; | |
467 | ||
468 | struct qeth_out_q_stats { | |
469 | u64 bufs; | |
470 | u64 bufs_pack; | |
471 | u64 buf_elements; | |
472 | u64 skbs_pack; | |
473 | u64 skbs_sg; | |
474 | u64 skbs_csum; | |
475 | u64 skbs_tso; | |
476 | u64 skbs_linearized; | |
477 | u64 skbs_linearized_fail; | |
478 | u64 tso_bytes; | |
479 | u64 packing_mode_switch; | |
480 | ||
481 | /* rtnl_link_stats64 */ | |
482 | u64 tx_packets; | |
483 | u64 tx_bytes; | |
484 | u64 tx_errors; | |
485 | u64 tx_dropped; | |
486 | u64 tx_carrier_errors; | |
487 | }; | |
488 | ||
4a71df50 | 489 | struct qeth_qdio_out_q { |
d445a4e2 | 490 | struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q]; |
0da9581d EL |
491 | struct qeth_qdio_out_buffer *bufs[QDIO_MAX_BUFFERS_PER_Q]; |
492 | struct qdio_outbuf_state *bufstates; /* convenience pointer */ | |
b0abc4f5 | 493 | struct qeth_out_q_stats stats; |
4a71df50 FB |
494 | int queue_no; |
495 | struct qeth_card *card; | |
496 | atomic_t state; | |
497 | int do_pack; | |
498 | /* | |
499 | * index of buffer to be filled by driver; state EMPTY or PACKING | |
500 | */ | |
501 | int next_buf_to_fill; | |
502 | /* | |
503 | * number of buffers that are currently filled (PRIMED) | |
504 | * -> these buffers are hardware-owned | |
505 | */ | |
506 | atomic_t used_buffers; | |
507 | /* indicates whether PCI flag must be set (or if one is outstanding) */ | |
508 | atomic_t set_pci_flags_count; | |
d445a4e2 | 509 | }; |
4a71df50 FB |
510 | |
511 | struct qeth_qdio_info { | |
512 | atomic_t state; | |
513 | /* input */ | |
0da9581d | 514 | int no_in_queues; |
4a71df50 | 515 | struct qeth_qdio_q *in_q; |
0da9581d | 516 | struct qeth_qdio_q *c_q; |
4a71df50 FB |
517 | struct qeth_qdio_buffer_pool in_buf_pool; |
518 | struct qeth_qdio_buffer_pool init_pool; | |
519 | int in_buf_size; | |
520 | ||
521 | /* output */ | |
522 | int no_out_queues; | |
bb92d3f8 | 523 | struct qeth_qdio_out_q *out_qs[QETH_MAX_QUEUES]; |
0da9581d | 524 | struct qdio_outbuf_state *out_bufstates; |
4a71df50 FB |
525 | |
526 | /* priority queueing */ | |
527 | int do_prio_queueing; | |
528 | int default_out_queue; | |
529 | }; | |
530 | ||
4a71df50 FB |
531 | /** |
532 | * buffer stuff for read channel | |
533 | */ | |
534 | #define QETH_CMD_BUFFER_NO 8 | |
535 | ||
536 | /** | |
537 | * channel state machine | |
538 | */ | |
539 | enum qeth_channel_states { | |
540 | CH_STATE_UP, | |
541 | CH_STATE_DOWN, | |
542 | CH_STATE_ACTIVATING, | |
543 | CH_STATE_HALTED, | |
544 | CH_STATE_STOPPED, | |
545 | CH_STATE_RCD, | |
546 | CH_STATE_RCD_DONE, | |
547 | }; | |
548 | /** | |
549 | * card state machine | |
550 | */ | |
551 | enum qeth_card_states { | |
552 | CARD_STATE_DOWN, | |
553 | CARD_STATE_HARDSETUP, | |
554 | CARD_STATE_SOFTSETUP, | |
555 | CARD_STATE_UP, | |
556 | CARD_STATE_RECOVER, | |
557 | }; | |
558 | ||
559 | /** | |
560 | * Protocol versions | |
561 | */ | |
562 | enum qeth_prot_versions { | |
563 | QETH_PROT_IPV4 = 0x0004, | |
564 | QETH_PROT_IPV6 = 0x0006, | |
565 | }; | |
566 | ||
4a71df50 FB |
567 | enum qeth_cmd_buffer_state { |
568 | BUF_STATE_FREE, | |
569 | BUF_STATE_LOCKED, | |
4a71df50 FB |
570 | }; |
571 | ||
0da9581d EL |
572 | enum qeth_cq { |
573 | QETH_CQ_DISABLED = 0, | |
574 | QETH_CQ_ENABLED = 1, | |
575 | QETH_CQ_NOTAVAILABLE = 2, | |
576 | }; | |
577 | ||
4a71df50 | 578 | struct qeth_ipato { |
7fbd9493 | 579 | bool enabled; |
02f510f3 JW |
580 | bool invert4; |
581 | bool invert6; | |
4a71df50 FB |
582 | struct list_head entries; |
583 | }; | |
584 | ||
585 | struct qeth_channel; | |
586 | ||
587 | struct qeth_cmd_buffer { | |
588 | enum qeth_cmd_buffer_state state; | |
589 | struct qeth_channel *channel; | |
54daaca7 | 590 | struct qeth_reply *reply; |
4a71df50 | 591 | unsigned char *data; |
8f6637b8 JW |
592 | void (*callback)(struct qeth_card *card, struct qeth_channel *channel, |
593 | struct qeth_cmd_buffer *iob); | |
4a71df50 FB |
594 | }; |
595 | ||
1c5b2216 JW |
596 | static inline struct qeth_ipa_cmd *__ipa_cmd(struct qeth_cmd_buffer *iob) |
597 | { | |
598 | return (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); | |
599 | } | |
600 | ||
4a71df50 FB |
601 | /** |
602 | * definition of a qeth channel, used for read and write | |
603 | */ | |
604 | struct qeth_channel { | |
605 | enum qeth_channel_states state; | |
f15cdaf2 | 606 | struct ccw1 *ccw; |
4a71df50 FB |
607 | spinlock_t iob_lock; |
608 | wait_queue_head_t wait_q; | |
4a71df50 FB |
609 | struct ccw_device *ccwdev; |
610 | /*command buffer for control data*/ | |
611 | struct qeth_cmd_buffer iob[QETH_CMD_BUFFER_NO]; | |
612 | atomic_t irq_pending; | |
613 | int io_buf_no; | |
4a71df50 FB |
614 | }; |
615 | ||
616 | /** | |
617 | * OSA card related definitions | |
618 | */ | |
619 | struct qeth_token { | |
620 | __u32 issuer_rm_w; | |
621 | __u32 issuer_rm_r; | |
622 | __u32 cm_filter_w; | |
623 | __u32 cm_filter_r; | |
624 | __u32 cm_connection_w; | |
625 | __u32 cm_connection_r; | |
626 | __u32 ulp_filter_w; | |
627 | __u32 ulp_filter_r; | |
628 | __u32 ulp_connection_w; | |
629 | __u32 ulp_connection_r; | |
630 | }; | |
631 | ||
632 | struct qeth_seqno { | |
633 | __u32 trans_hdr; | |
634 | __u32 pdu_hdr; | |
635 | __u32 pdu_hdr_ack; | |
636 | __u16 ipa; | |
637 | __u32 pkt_seqno; | |
638 | }; | |
639 | ||
640 | struct qeth_reply { | |
641 | struct list_head list; | |
642 | wait_queue_head_t wait_q; | |
643 | int (*callback)(struct qeth_card *, struct qeth_reply *, | |
644 | unsigned long); | |
645 | u32 seqno; | |
646 | unsigned long offset; | |
647 | atomic_t received; | |
648 | int rc; | |
649 | void *param; | |
ae695927 | 650 | refcount_t refcnt; |
4a71df50 FB |
651 | }; |
652 | ||
4a71df50 FB |
653 | struct qeth_card_blkt { |
654 | int time_total; | |
655 | int inter_packet; | |
656 | int inter_packet_jumbo; | |
657 | }; | |
658 | ||
659 | #define QETH_BROADCAST_WITH_ECHO 0x01 | |
660 | #define QETH_BROADCAST_WITHOUT_ECHO 0x02 | |
4a71df50 FB |
661 | #define QETH_LAYER2_MAC_REGISTERED 0x02 |
662 | struct qeth_card_info { | |
663 | unsigned short unit_addr2; | |
664 | unsigned short cula; | |
665 | unsigned short chpid; | |
666 | __u16 func_level; | |
667 | char mcl_level[QETH_MCL_LENGTH + 1]; | |
668 | int guestlan; | |
669 | int mac_bits; | |
4a71df50 FB |
670 | enum qeth_card_types type; |
671 | enum qeth_link_types link_type; | |
4a71df50 FB |
672 | int broadcast_capable; |
673 | int unique_id; | |
c70eb09d | 674 | bool layer_enforced; |
4a71df50 | 675 | struct qeth_card_blkt blkt; |
4a71df50 | 676 | enum qeth_ipa_promisc_modes promisc_mode; |
1da74b1c FB |
677 | __u32 diagass_support; |
678 | __u32 hwtrap; | |
4a71df50 FB |
679 | }; |
680 | ||
4fda3354 JW |
681 | enum qeth_discipline_id { |
682 | QETH_DISCIPLINE_UNDETERMINED = -1, | |
683 | QETH_DISCIPLINE_LAYER3 = 0, | |
684 | QETH_DISCIPLINE_LAYER2 = 1, | |
685 | }; | |
686 | ||
4a71df50 FB |
687 | struct qeth_card_options { |
688 | struct qeth_routing_info route4; | |
689 | struct qeth_ipa_info ipa4; | |
690 | struct qeth_ipa_info adp; /*Adapter parameters*/ | |
691 | struct qeth_routing_info route6; | |
692 | struct qeth_ipa_info ipa6; | |
b4d72c08 | 693 | struct qeth_sbp_info sbp; /* SETBRIDGEPORT options */ |
a45b3faf | 694 | struct qeth_vnicc_info vnicc; /* VNICC options */ |
4a71df50 | 695 | int fake_broadcast; |
4fda3354 | 696 | enum qeth_discipline_id layer; |
4a71df50 | 697 | int rx_sg_cb; |
d64ecc22 | 698 | enum qeth_ipa_isolation_modes isolation; |
0f54761d | 699 | enum qeth_ipa_isolation_modes prev_isolation; |
76b11f8e | 700 | int sniffer; |
0da9581d | 701 | enum qeth_cq cq; |
b3332930 | 702 | char hsuid[9]; |
4a71df50 FB |
703 | }; |
704 | ||
4fda3354 JW |
705 | #define IS_LAYER2(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER2) |
706 | #define IS_LAYER3(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER3) | |
707 | ||
4a71df50 FB |
708 | /* |
709 | * thread bits for qeth_card thread masks | |
710 | */ | |
711 | enum qeth_threads { | |
712 | QETH_RECOVER_THREAD = 1, | |
713 | }; | |
714 | ||
715 | struct qeth_osn_info { | |
716 | int (*assist_cb)(struct net_device *dev, void *data); | |
717 | int (*data_cb)(struct sk_buff *skb); | |
718 | }; | |
719 | ||
4a71df50 | 720 | struct qeth_discipline { |
2d2ebb3e | 721 | const struct device_type *devtype; |
d73ef324 | 722 | int (*process_rx_buffer)(struct qeth_card *card, int budget, int *done); |
4a71df50 | 723 | int (*recover)(void *ptr); |
c041f2d4 SO |
724 | int (*setup) (struct ccwgroup_device *); |
725 | void (*remove) (struct ccwgroup_device *); | |
726 | int (*set_online) (struct ccwgroup_device *); | |
727 | int (*set_offline) (struct ccwgroup_device *); | |
c041f2d4 SO |
728 | int (*freeze)(struct ccwgroup_device *); |
729 | int (*thaw) (struct ccwgroup_device *); | |
730 | int (*restore)(struct ccwgroup_device *); | |
942d6984 | 731 | int (*do_ioctl)(struct net_device *dev, struct ifreq *rq, int cmd); |
c044dc21 EC |
732 | int (*control_event_handler)(struct qeth_card *card, |
733 | struct qeth_ipa_cmd *cmd); | |
4a71df50 FB |
734 | }; |
735 | ||
5f78e29c LD |
736 | enum qeth_addr_disposition { |
737 | QETH_DISP_ADDR_DELETE = 0, | |
738 | QETH_DISP_ADDR_DO_NOTHING = 1, | |
739 | QETH_DISP_ADDR_ADD = 2, | |
4a71df50 FB |
740 | }; |
741 | ||
a1c3ed4c FB |
742 | struct qeth_rx { |
743 | int b_count; | |
744 | int b_index; | |
745 | struct qdio_buffer_element *b_element; | |
746 | int e_offset; | |
747 | int qdio_err; | |
748 | }; | |
749 | ||
02d5cb5b EC |
750 | struct carrier_info { |
751 | __u8 card_type; | |
752 | __u16 port_mode; | |
753 | __u32 port_speed; | |
754 | }; | |
755 | ||
45cbb2e4 SR |
756 | struct qeth_switch_info { |
757 | __u32 capabilities; | |
758 | __u32 settings; | |
759 | }; | |
760 | ||
6541aa52 | 761 | #define QETH_NAPI_WEIGHT NAPI_POLL_WEIGHT |
a1c3ed4c | 762 | |
4a71df50 | 763 | struct qeth_card { |
4a71df50 | 764 | enum qeth_card_states state; |
4a71df50 FB |
765 | spinlock_t lock; |
766 | struct ccwgroup_device *gdev; | |
767 | struct qeth_channel read; | |
768 | struct qeth_channel write; | |
769 | struct qeth_channel data; | |
770 | ||
771 | struct net_device *dev; | |
b0abc4f5 | 772 | struct qeth_card_stats stats; |
4a71df50 FB |
773 | struct qeth_card_info info; |
774 | struct qeth_token token; | |
775 | struct qeth_seqno seqno; | |
776 | struct qeth_card_options options; | |
777 | ||
c0a2e4d1 | 778 | struct workqueue_struct *event_wq; |
4a71df50 | 779 | wait_queue_head_t wait_q; |
4a71df50 | 780 | spinlock_t mclock; |
7ff0bcf6 | 781 | unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; |
fe5c8028 | 782 | DECLARE_HASHTABLE(mac_htable, 4); |
5f78e29c LD |
783 | DECLARE_HASHTABLE(ip_htable, 4); |
784 | DECLARE_HASHTABLE(ip_mc_htable, 4); | |
4a71df50 FB |
785 | struct work_struct kernel_thread_starter; |
786 | spinlock_t thread_mask_lock; | |
787 | unsigned long thread_start_mask; | |
788 | unsigned long thread_allowed_mask; | |
789 | unsigned long thread_running_mask; | |
790 | spinlock_t ip_lock; | |
4a71df50 FB |
791 | struct qeth_ipato ipato; |
792 | struct list_head cmd_waiter_list; | |
793 | /* QDIO buffer handling */ | |
794 | struct qeth_qdio_info qdio; | |
908abbb5 | 795 | int read_or_write_problem; |
4a71df50 | 796 | struct qeth_osn_info osn_info; |
c041f2d4 | 797 | struct qeth_discipline *discipline; |
4a71df50 | 798 | atomic_t force_alloc_skb; |
6bcac508 | 799 | struct service_level qeth_service_level; |
76b11f8e | 800 | struct qdio_ssqd_desc ssqd; |
af039068 | 801 | debug_info_t *debug; |
c4949f07 | 802 | struct mutex conf_mutex; |
9dc48ccc | 803 | struct mutex discipline_mutex; |
a1c3ed4c FB |
804 | struct napi_struct napi; |
805 | struct qeth_rx rx; | |
b3332930 FB |
806 | struct delayed_work buffer_reclaim_work; |
807 | int reclaim_index; | |
0f54761d | 808 | struct work_struct close_dev_work; |
4a71df50 FB |
809 | }; |
810 | ||
1da74b1c FB |
811 | struct qeth_trap_id { |
812 | __u16 lparnr; | |
813 | char vmname[8]; | |
814 | __u8 chpid; | |
815 | __u8 ssid; | |
816 | __u16 devno; | |
817 | } __packed; | |
818 | ||
4a71df50 FB |
819 | /*some helper functions*/ |
820 | #define QETH_CARD_IFNAME(card) (((card)->dev)? (card)->dev->name : "") | |
821 | ||
30356d08 JW |
822 | static inline bool qeth_netdev_is_registered(struct net_device *dev) |
823 | { | |
824 | return dev->netdev_ops != NULL; | |
825 | } | |
826 | ||
ce28867f JW |
827 | static inline void qeth_scrub_qdio_buffer(struct qdio_buffer *buf, |
828 | unsigned int elements) | |
829 | { | |
830 | unsigned int i; | |
831 | ||
832 | for (i = 0; i < elements; i++) | |
833 | memset(&buf->element[i], 0, sizeof(struct qdio_buffer_element)); | |
834 | buf->element[14].sflags = 0; | |
835 | buf->element[15].sflags = 0; | |
836 | } | |
837 | ||
2863c613 EC |
838 | /** |
839 | * qeth_get_elements_for_range() - find number of SBALEs to cover range. | |
840 | * @start: Start of the address range. | |
841 | * @end: Address after the end of the range. | |
842 | * | |
843 | * Returns the number of pages, and thus QDIO buffer elements, needed to cover | |
844 | * the specified address range. | |
845 | */ | |
846 | static inline int qeth_get_elements_for_range(addr_t start, addr_t end) | |
847 | { | |
89271c65 | 848 | return PFN_UP(end) - PFN_DOWN(start); |
2863c613 EC |
849 | } |
850 | ||
4a71df50 FB |
851 | static inline int qeth_get_ip_version(struct sk_buff *skb) |
852 | { | |
19e36da6 JW |
853 | struct vlan_ethhdr *veth = vlan_eth_hdr(skb); |
854 | __be16 prot = veth->h_vlan_proto; | |
a9baf10a | 855 | |
19e36da6 JW |
856 | if (prot == htons(ETH_P_8021Q)) |
857 | prot = veth->h_vlan_encapsulated_proto; | |
858 | ||
859 | switch (prot) { | |
860 | case htons(ETH_P_IPV6): | |
4a71df50 | 861 | return 6; |
19e36da6 | 862 | case htons(ETH_P_IP): |
4a71df50 FB |
863 | return 4; |
864 | default: | |
865 | return 0; | |
866 | } | |
867 | } | |
868 | ||
6195b936 JW |
869 | static inline void qeth_rx_csum(struct qeth_card *card, struct sk_buff *skb, |
870 | u8 flags) | |
871 | { | |
872 | if ((card->dev->features & NETIF_F_RXCSUM) && | |
3aade31b | 873 | (flags & QETH_HDR_EXT_CSUM_TRANSP_REQ)) { |
6195b936 | 874 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
b0abc4f5 | 875 | QETH_CARD_STAT_INC(card, rx_skb_csum); |
3aade31b | 876 | } else { |
6195b936 | 877 | skb->ip_summed = CHECKSUM_NONE; |
3aade31b | 878 | } |
6195b936 JW |
879 | } |
880 | ||
571f9dd8 | 881 | static inline void qeth_tx_csum(struct sk_buff *skb, u8 *flags, int ipv) |
6195b936 JW |
882 | { |
883 | *flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ; | |
571f9dd8 KM |
884 | if ((ipv == 4 && ip_hdr(skb)->protocol == IPPROTO_UDP) || |
885 | (ipv == 6 && ipv6_hdr(skb)->nexthdr == IPPROTO_UDP)) | |
6195b936 | 886 | *flags |= QETH_HDR_EXT_UDP; |
6195b936 JW |
887 | } |
888 | ||
f90b744e FB |
889 | static inline void qeth_put_buffer_pool_entry(struct qeth_card *card, |
890 | struct qeth_buffer_pool_entry *entry) | |
891 | { | |
892 | list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list); | |
893 | } | |
894 | ||
1da74b1c FB |
895 | static inline int qeth_is_diagass_supported(struct qeth_card *card, |
896 | enum qeth_diags_cmds cmd) | |
897 | { | |
898 | return card->info.diagass_support & (__u32)cmd; | |
899 | } | |
900 | ||
a8155b00 KM |
901 | int qeth_send_simple_setassparms_prot(struct qeth_card *card, |
902 | enum qeth_ipa_funcs ipa_func, | |
903 | u16 cmd_code, long data, | |
904 | enum qeth_prot_versions prot); | |
905 | /* IPv4 variant */ | |
906 | static inline int qeth_send_simple_setassparms(struct qeth_card *card, | |
907 | enum qeth_ipa_funcs ipa_func, | |
908 | u16 cmd_code, long data) | |
909 | { | |
910 | return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code, | |
911 | data, QETH_PROT_IPV4); | |
912 | } | |
913 | ||
914 | static inline int qeth_send_simple_setassparms_v6(struct qeth_card *card, | |
915 | enum qeth_ipa_funcs ipa_func, | |
916 | u16 cmd_code, long data) | |
917 | { | |
918 | return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code, | |
919 | data, QETH_PROT_IPV6); | |
920 | } | |
921 | ||
86c0cdb9 JW |
922 | int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, |
923 | int ipv); | |
924 | static inline struct qeth_qdio_out_q *qeth_get_tx_queue(struct qeth_card *card, | |
925 | struct sk_buff *skb, | |
926 | int ipv, int cast_type) | |
927 | { | |
928 | if (IS_IQD(card) && cast_type != RTN_UNICAST) | |
929 | return card->qdio.out_qs[card->qdio.no_out_queues - 1]; | |
930 | if (!card->qdio.do_prio_queueing) | |
931 | return card->qdio.out_qs[card->qdio.default_out_queue]; | |
932 | return card->qdio.out_qs[qeth_get_priority_queue(card, skb, ipv)]; | |
933 | } | |
934 | ||
c041f2d4 SO |
935 | extern struct qeth_discipline qeth_l2_discipline; |
936 | extern struct qeth_discipline qeth_l3_discipline; | |
d896ac62 JW |
937 | extern const struct ethtool_ops qeth_ethtool_ops; |
938 | extern const struct ethtool_ops qeth_osn_ethtool_ops; | |
b7169c51 SO |
939 | extern const struct attribute_group *qeth_generic_attr_groups[]; |
940 | extern const struct attribute_group *qeth_osn_attr_groups[]; | |
2d2ebb3e JW |
941 | extern const struct attribute_group qeth_device_attr_group; |
942 | extern const struct attribute_group qeth_device_blkt_group; | |
943 | extern const struct device_type qeth_generic_devtype; | |
b7169c51 | 944 | |
511c2445 | 945 | int qeth_card_hw_is_reachable(struct qeth_card *); |
4a71df50 FB |
946 | const char *qeth_get_cardname_short(struct qeth_card *); |
947 | int qeth_realloc_buffer_pool(struct qeth_card *, int); | |
948 | int qeth_core_load_discipline(struct qeth_card *, enum qeth_discipline_id); | |
949 | void qeth_core_free_discipline(struct qeth_card *); | |
4a71df50 FB |
950 | |
951 | /* exports for qeth discipline device drivers */ | |
683d718a | 952 | extern struct kmem_cache *qeth_core_header_cache; |
d11ba0c4 | 953 | extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS]; |
4a71df50 | 954 | |
d3d1b205 | 955 | struct net_device *qeth_clone_netdev(struct net_device *orig); |
d7d18da1 | 956 | struct qeth_card *qeth_get_card_by_busid(char *bus_id); |
4a71df50 FB |
957 | void qeth_set_allowed_threads(struct qeth_card *, unsigned long , int); |
958 | int qeth_threads_running(struct qeth_card *, unsigned long); | |
4a71df50 FB |
959 | int qeth_do_run_thread(struct qeth_card *, unsigned long); |
960 | void qeth_clear_thread_start_bit(struct qeth_card *, unsigned long); | |
961 | void qeth_clear_thread_running_bit(struct qeth_card *, unsigned long); | |
9fae5c3b | 962 | int qeth_core_hardsetup_card(struct qeth_card *card, bool *carrier_ok); |
4a71df50 FB |
963 | void qeth_print_status_message(struct qeth_card *); |
964 | int qeth_init_qdio_queues(struct qeth_card *); | |
4a71df50 FB |
965 | int qeth_send_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *, |
966 | int (*reply_cb) | |
967 | (struct qeth_card *, struct qeth_reply *, unsigned long), | |
968 | void *); | |
969 | struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *, | |
970 | enum qeth_ipa_cmds, enum qeth_prot_versions); | |
4a71df50 | 971 | struct sk_buff *qeth_core_get_next_skb(struct qeth_card *, |
b3332930 | 972 | struct qeth_qdio_buffer *, struct qdio_buffer_element **, int *, |
4a71df50 FB |
973 | struct qeth_hdr **); |
974 | void qeth_schedule_recovery(struct qeth_card *); | |
d73ef324 | 975 | int qeth_poll(struct napi_struct *napi, int budget); |
4a71df50 FB |
976 | void qeth_clear_ipacmd_list(struct qeth_card *); |
977 | int qeth_qdio_clear_card(struct qeth_card *, int); | |
978 | void qeth_clear_working_pool_list(struct qeth_card *); | |
979 | void qeth_clear_cmd_buffers(struct qeth_channel *); | |
980 | void qeth_clear_qdio_buffers(struct qeth_card *); | |
981 | void qeth_setadp_promisc_mode(struct qeth_card *); | |
4a71df50 FB |
982 | int qeth_setadpparms_change_macaddr(struct qeth_card *); |
983 | void qeth_tx_timeout(struct net_device *); | |
984 | void qeth_prepare_control_data(struct qeth_card *, int, | |
985 | struct qeth_cmd_buffer *); | |
986 | void qeth_release_buffer(struct qeth_channel *, struct qeth_cmd_buffer *); | |
c2153277 JW |
987 | void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, |
988 | u16 cmd_length); | |
4a71df50 | 989 | struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *); |
45cbb2e4 SR |
990 | int qeth_query_switch_attributes(struct qeth_card *card, |
991 | struct qeth_switch_info *sw_info); | |
d896ac62 JW |
992 | int qeth_query_card_info(struct qeth_card *card, |
993 | struct carrier_info *carrier_info); | |
40e6a225 | 994 | unsigned int qeth_count_elements(struct sk_buff *skb, unsigned int data_offset); |
13ddacb5 JW |
995 | int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, |
996 | struct sk_buff *skb, struct qeth_hdr *hdr, | |
e878c5e6 JR |
997 | unsigned int offset, unsigned int hd_len, |
998 | int elements_needed); | |
942d6984 | 999 | int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
8e96c51c | 1000 | void qeth_dbf_longtext(debug_info_t *id, int level, char *text, ...); |
0f54761d | 1001 | int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback); |
0da9581d | 1002 | int qeth_configure_cq(struct qeth_card *, enum qeth_cq); |
1da74b1c | 1003 | int qeth_hw_trap(struct qeth_card *, enum qeth_diags_trap_action); |
395672e0 | 1004 | void qeth_trace_features(struct qeth_card *); |
0f54761d | 1005 | void qeth_close_dev(struct qeth_card *); |
8f43fb00 | 1006 | int qeth_setassparms_cb(struct qeth_card *, struct qeth_reply *, unsigned long); |
b475e316 TR |
1007 | struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *, |
1008 | enum qeth_ipa_funcs, | |
1009 | __u16, __u16, | |
1010 | enum qeth_prot_versions); | |
8f43fb00 | 1011 | int qeth_set_features(struct net_device *, netdev_features_t); |
d025da9e | 1012 | void qeth_enable_hw_features(struct net_device *dev); |
8f43fb00 | 1013 | netdev_features_t qeth_fix_features(struct net_device *, netdev_features_t); |
6d69b1f1 JW |
1014 | netdev_features_t qeth_features_check(struct sk_buff *skb, |
1015 | struct net_device *dev, | |
1016 | netdev_features_t features); | |
b0abc4f5 | 1017 | void qeth_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats); |
e22355ea JW |
1018 | int qeth_open(struct net_device *dev); |
1019 | int qeth_stop(struct net_device *dev); | |
1020 | ||
ec61bd2f | 1021 | int qeth_vm_request_mac(struct qeth_card *card); |
fc69660b JW |
1022 | int qeth_xmit(struct qeth_card *card, struct sk_buff *skb, |
1023 | struct qeth_qdio_out_q *queue, int ipv, int cast_type, | |
b0abc4f5 JW |
1024 | void (*fill_header)(struct qeth_qdio_out_q *queue, |
1025 | struct qeth_hdr *hdr, struct sk_buff *skb, | |
1026 | int ipv, int cast_type, | |
fc69660b | 1027 | unsigned int data_len)); |
4a71df50 FB |
1028 | |
1029 | /* exports for OSN */ | |
1030 | int qeth_osn_assist(struct net_device *, void *, int); | |
1031 | int qeth_osn_register(unsigned char *read_dev_no, struct net_device **, | |
1032 | int (*assist_cb)(struct net_device *, void *), | |
1033 | int (*data_cb)(struct sk_buff *)); | |
1034 | void qeth_osn_deregister(struct net_device *); | |
1035 | ||
1036 | #endif /* __QETH_CORE_H__ */ |