s390/qeth: cleanup OAT code
[linux-2.6-block.git] / drivers / s390 / net / qeth_core.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
4a71df50 2/*
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3 * Copyright IBM Corp. 2007
4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
10#ifndef __QETH_CORE_H__
11#define __QETH_CORE_H__
12
782e4a79 13#include <linux/completion.h>
fb8d2580 14#include <linux/debugfs.h>
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15#include <linux/if.h>
16#include <linux/if_arp.h>
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17#include <linux/etherdevice.h>
18#include <linux/if_vlan.h>
19#include <linux/ctype.h>
20#include <linux/in6.h>
21#include <linux/bitops.h>
22#include <linux/seq_file.h>
fe5c8028 23#include <linux/hashtable.h>
41aeed58 24#include <linux/ip.h>
0d49c06b 25#include <linux/rcupdate.h>
ae695927 26#include <linux/refcount.h>
e53edf74 27#include <linux/timer.h>
0d49c06b 28#include <linux/types.h>
782e4a79 29#include <linux/wait.h>
c2780c1a 30#include <linux/workqueue.h>
4a71df50 31
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32#include <net/dst.h>
33#include <net/ip6_fib.h>
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34#include <net/ipv6.h>
35#include <net/if_inet6.h>
36#include <net/addrconf.h>
1d38c2e4 37#include <net/route.h>
eeac0e20 38#include <net/sch_generic.h>
e517b649 39#include <net/tcp.h>
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40
41#include <asm/debug.h>
42#include <asm/qdio.h>
43#include <asm/ccwdev.h>
44#include <asm/ccwgroup.h>
6bcac508 45#include <asm/sysinfo.h>
4a71df50 46
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47#include <uapi/linux/if_link.h>
48
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49#include "qeth_core_mpc.h"
50
51/**
52 * Debug Facility stuff
53 */
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54enum qeth_dbf_names {
55 QETH_DBF_SETUP,
d11ba0c4 56 QETH_DBF_MSG,
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57 QETH_DBF_CTRL,
58 QETH_DBF_INFOS /* must be last element */
59};
60
61struct qeth_dbf_info {
62 char name[DEBUG_MAX_NAME_LEN];
63 int pages;
64 int areas;
65 int len;
66 int level;
67 struct debug_view *view;
68 debug_info_t *id;
69};
70
c3b2218d 71#define QETH_DBF_CTRL_LEN 256U
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72
73#define QETH_DBF_TEXT(name, level, text) \
d11ba0c4 74 debug_text_event(qeth_dbf[QETH_DBF_##name].id, level, text)
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75
76#define QETH_DBF_HEX(name, level, addr, len) \
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77 debug_event(qeth_dbf[QETH_DBF_##name].id, level, (void *)(addr), len)
78
79#define QETH_DBF_MESSAGE(level, text...) \
80 debug_sprintf_event(qeth_dbf[QETH_DBF_MSG].id, level, text)
81
82#define QETH_DBF_TEXT_(name, level, text...) \
8e96c51c 83 qeth_dbf_longtext(qeth_dbf[QETH_DBF_##name].id, level, text)
4a71df50 84
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85#define QETH_CARD_TEXT(card, level, text) \
86 debug_text_event(card->debug, level, text)
87
88#define QETH_CARD_HEX(card, level, addr, len) \
89 debug_event(card->debug, level, (void *)(addr), len)
90
91#define QETH_CARD_MESSAGE(card, text...) \
92 debug_sprintf_event(card->debug, level, text)
93
94#define QETH_CARD_TEXT_(card, level, text...) \
95 qeth_dbf_longtext(card->debug, level, text)
96
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97#define SENSE_COMMAND_REJECT_BYTE 0
98#define SENSE_COMMAND_REJECT_FLAG 0x80
99#define SENSE_RESETTING_EVENT_BYTE 1
100#define SENSE_RESETTING_EVENT_FLAG 0x80
101
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102static inline u32 qeth_get_device_id(struct ccw_device *cdev)
103{
104 struct ccw_dev_id dev_id;
105 u32 id;
106
107 ccw_device_get_id(cdev, &dev_id);
108 id = dev_id.devno;
109 id |= (u32) (dev_id.ssid << 16);
110
111 return id;
112}
113
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114/*
115 * Common IO related definitions
116 */
117#define CARD_RDEV(card) card->read.ccwdev
118#define CARD_WDEV(card) card->write.ccwdev
119#define CARD_DDEV(card) card->data.ccwdev
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120#define CARD_BUS_ID(card) dev_name(&card->gdev->dev)
121#define CARD_RDEV_ID(card) dev_name(&card->read.ccwdev->dev)
122#define CARD_WDEV_ID(card) dev_name(&card->write.ccwdev->dev)
123#define CARD_DDEV_ID(card) dev_name(&card->data.ccwdev->dev)
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124#define CCW_DEVID(cdev) (qeth_get_device_id(cdev))
125#define CARD_DEVID(card) (CCW_DEVID(CARD_RDEV(card)))
4a71df50 126
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127/* Routing stuff */
128struct qeth_routing_info {
129 enum qeth_routing_types type;
130};
131
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132/* SETBRIDGEPORT stuff */
133enum qeth_sbp_roles {
134 QETH_SBP_ROLE_NONE = 0,
135 QETH_SBP_ROLE_PRIMARY = 1,
136 QETH_SBP_ROLE_SECONDARY = 2,
137};
138
139enum qeth_sbp_states {
140 QETH_SBP_STATE_INACTIVE = 0,
141 QETH_SBP_STATE_STANDBY = 1,
142 QETH_SBP_STATE_ACTIVE = 2,
143};
144
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145#define QETH_SBP_HOST_NOTIFICATION 1
146
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147struct qeth_sbp_info {
148 __u32 supported_funcs;
149 enum qeth_sbp_roles role;
9f48b9db 150 __u32 hostnotification:1;
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151 __u32 reflect_promisc:1;
152 __u32 reflect_promisc_primary:1;
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153};
154
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155struct qeth_vnicc_info {
156 /* supported/currently configured VNICCs; updated in IPA exchanges */
157 u32 sup_chars;
158 u32 cur_chars;
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159 /* supported commands: bitmasks which VNICCs support respective cmd */
160 u32 set_char_sup;
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161 u32 getset_timeout_sup;
162 /* timeout value for the learning characteristic */
163 u32 learning_timeout;
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164 /* characteristics wanted/configured by user */
165 u32 wanted_chars;
166 /* has user explicitly enabled rx_bcast while online? */
167 bool rx_bcast_enabled;
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168};
169
5113fec0 170#define QETH_IDX_FUNC_LEVEL_OSD 0x0101
6298263a 171#define QETH_IDX_FUNC_LEVEL_IQD 0x4108
4a71df50 172
4a71df50 173#define QETH_BUFSIZE 4096
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174#define CCW_CMD_WRITE 0x01
175#define CCW_CMD_READ 0x02
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176
177/**
178 * some more defs
179 */
180#define QETH_TX_TIMEOUT 100 * HZ
181#define QETH_RCD_TIMEOUT 60 * HZ
b3332930 182#define QETH_RECLAIM_WORK_TIME HZ
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183#define QETH_MAX_PORTNO 15
184
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185/*****************************************************************************/
186/* QDIO queue and buffer handling */
187/*****************************************************************************/
d8564e19 188#define QETH_MAX_OUT_QUEUES 4
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189#define QETH_IQD_MIN_TXQ 2 /* One for ucast, one for mcast. */
190#define QETH_IQD_MCAST_TXQ 0
191#define QETH_IQD_MIN_UCAST_TXQ 1
562cf773 192
d8564e19 193#define QETH_MAX_IN_QUEUES 2
562cf773 194#define QETH_RX_COPYBREAK (PAGE_SIZE >> 1)
4a71df50 195#define QETH_IN_BUF_SIZE_DEFAULT 65536
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196#define QETH_IN_BUF_COUNT_DEFAULT 64
197#define QETH_IN_BUF_COUNT_HSDEFAULT 128
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198#define QETH_IN_BUF_COUNT_MIN 8
199#define QETH_IN_BUF_COUNT_MAX 128
200#define QETH_MAX_BUFFER_ELEMENTS(card) ((card)->qdio.in_buf_size >> 12)
201#define QETH_IN_BUF_REQUEUE_THRESHOLD(card) \
0284a0fd 202 ((card)->qdio.in_buf_pool.buf_count / 2)
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203
204/* buffers we have to be behind before we get a PCI */
205#define QETH_PCI_THRESHOLD_A(card) ((card)->qdio.in_buf_pool.buf_count+1)
206/*enqueued free buffers left before we get a PCI*/
207#define QETH_PCI_THRESHOLD_B(card) 0
208/*not used unless the microcode gets patched*/
209#define QETH_PCI_TIMER_VALUE(card) 3
210
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211/* priority queing */
212#define QETH_PRIOQ_DEFAULT QETH_NO_PRIO_QUEUEING
213#define QETH_DEFAULT_QUEUE 2
214#define QETH_NO_PRIO_QUEUEING 0
215#define QETH_PRIO_Q_ING_PREC 1
216#define QETH_PRIO_Q_ING_TOS 2
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217#define QETH_PRIO_Q_ING_SKB 3
218#define QETH_PRIO_Q_ING_VLAN 4
c91a1fb7 219#define QETH_PRIO_Q_ING_FIXED 5
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220
221/* Packing */
222#define QETH_LOW_WATERMARK_PACK 2
223#define QETH_HIGH_WATERMARK_PACK 5
224#define QETH_WATERMARK_PACK_FUZZ 1
225
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226struct qeth_hdr_layer3 {
227 __u8 id;
228 __u8 flags;
229 __u16 inbound_checksum; /*TSO:__u16 seqno */
230 __u32 token; /*TSO: __u32 reserved */
231 __u16 length;
232 __u8 vlan_prio;
233 __u8 ext_flags;
234 __u16 vlan_id;
235 __u16 frame_offset;
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236 union {
237 /* TX: */
1d38c2e4 238 struct in6_addr addr;
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239 /* RX: */
240 struct rx {
241 u8 res1[2];
242 u8 src_mac[6];
243 u8 res2[4];
244 u16 vlan_id;
245 u8 res3[2];
246 } rx;
247 } next_hop;
248};
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249
250struct qeth_hdr_layer2 {
251 __u8 id;
252 __u8 flags[3];
253 __u8 port_no;
254 __u8 hdr_length;
255 __u16 pkt_length;
256 __u16 seq_no;
257 __u16 vlan_id;
258 __u32 reserved;
259 __u8 reserved2[16];
260} __attribute__ ((packed));
261
262struct qeth_hdr_osn {
263 __u8 id;
264 __u8 reserved;
265 __u16 seq_no;
266 __u16 reserved2;
267 __u16 control_flags;
268 __u16 pdu_length;
269 __u8 reserved3[18];
270 __u32 ccid;
271} __attribute__ ((packed));
272
273struct qeth_hdr {
274 union {
275 struct qeth_hdr_layer2 l2;
276 struct qeth_hdr_layer3 l3;
277 struct qeth_hdr_osn osn;
278 } hdr;
279} __attribute__ ((packed));
280
281/*TCP Segmentation Offload header*/
282struct qeth_hdr_ext_tso {
283 __u16 hdr_tot_len;
284 __u8 imb_hdr_no;
285 __u8 reserved;
286 __u8 hdr_type;
287 __u8 hdr_version;
288 __u16 hdr_len;
289 __u32 payload_len;
290 __u16 mss;
291 __u16 dg_hdr_len;
292 __u8 padding[16];
293} __attribute__ ((packed));
294
295struct qeth_hdr_tso {
296 struct qeth_hdr hdr; /*hdr->hdr.l3.xxx*/
297 struct qeth_hdr_ext_tso ext;
298} __attribute__ ((packed));
299
300
301/* flags for qeth_hdr.flags */
302#define QETH_HDR_PASSTHRU 0x10
303#define QETH_HDR_IPV6 0x80
304#define QETH_HDR_CAST_MASK 0x07
305enum qeth_cast_flags {
306 QETH_CAST_UNICAST = 0x06,
307 QETH_CAST_MULTICAST = 0x04,
308 QETH_CAST_BROADCAST = 0x05,
309 QETH_CAST_ANYCAST = 0x07,
310 QETH_CAST_NOCAST = 0x00,
311};
312
313enum qeth_layer2_frame_flags {
314 QETH_LAYER2_FLAG_MULTICAST = 0x01,
315 QETH_LAYER2_FLAG_BROADCAST = 0x02,
316 QETH_LAYER2_FLAG_UNICAST = 0x04,
317 QETH_LAYER2_FLAG_VLAN = 0x10,
318};
319
320enum qeth_header_ids {
321 QETH_HEADER_TYPE_LAYER3 = 0x01,
322 QETH_HEADER_TYPE_LAYER2 = 0x02,
0aef8392 323 QETH_HEADER_TYPE_L3_TSO = 0x03,
4a71df50 324 QETH_HEADER_TYPE_OSN = 0x04,
0aef8392 325 QETH_HEADER_TYPE_L2_TSO = 0x06,
5fd3fcbb 326 QETH_HEADER_MASK_INVAL = 0x80,
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327};
328/* flags for qeth_hdr.ext_flags */
329#define QETH_HDR_EXT_VLAN_FRAME 0x01
330#define QETH_HDR_EXT_TOKEN_ID 0x02
331#define QETH_HDR_EXT_INCLUDE_VLAN_TAG 0x04
332#define QETH_HDR_EXT_SRC_MAC_ADDR 0x08
333#define QETH_HDR_EXT_CSUM_HDR_REQ 0x10
334#define QETH_HDR_EXT_CSUM_TRANSP_REQ 0x20
f6b85b6c 335#define QETH_HDR_EXT_UDP 0x40 /*bit off for TCP*/
4a71df50 336
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337static inline bool qeth_l2_same_vlan(struct qeth_hdr_layer2 *h1,
338 struct qeth_hdr_layer2 *h2)
339{
340 return !((h1->flags[2] ^ h2->flags[2]) & QETH_LAYER2_FLAG_VLAN) &&
341 h1->vlan_id == h2->vlan_id;
342}
343
344static inline bool qeth_l3_iqd_same_vlan(struct qeth_hdr_layer3 *h1,
345 struct qeth_hdr_layer3 *h2)
346{
347 return !((h1->ext_flags ^ h2->ext_flags) & QETH_HDR_EXT_VLAN_FRAME) &&
348 h1->vlan_id == h2->vlan_id;
349}
350
351static inline bool qeth_l3_same_next_hop(struct qeth_hdr_layer3 *h1,
352 struct qeth_hdr_layer3 *h2)
353{
354 return !((h1->flags ^ h2->flags) & QETH_HDR_IPV6) &&
1d38c2e4 355 ipv6_addr_equal(&h1->next_hop.addr, &h2->next_hop.addr);
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356}
357
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358struct qeth_local_addr {
359 struct hlist_node hnode;
360 struct rcu_head rcu;
361 struct in6_addr addr;
362};
363
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364enum qeth_qdio_info_states {
365 QETH_QDIO_UNINITIALIZED,
366 QETH_QDIO_ALLOCATED,
367 QETH_QDIO_ESTABLISHED,
368 QETH_QDIO_CLEANING
369};
370
371struct qeth_buffer_pool_entry {
372 struct list_head list;
373 struct list_head init_list;
f81649df 374 struct page *elements[QDIO_MAX_ELEMENTS_PER_BUFFER];
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375};
376
377struct qeth_qdio_buffer_pool {
378 struct list_head entry_list;
379 int buf_count;
380};
381
382struct qeth_qdio_buffer {
383 struct qdio_buffer *buffer;
384 /* the buffer pool entry currently associated to this buffer */
385 struct qeth_buffer_pool_entry *pool_entry;
b3332930 386 struct sk_buff *rx_skb;
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387};
388
389struct qeth_qdio_q {
6d284bde 390 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
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391 struct qeth_qdio_buffer bufs[QDIO_MAX_BUFFERS_PER_Q];
392 int next_buf_to_init;
6d284bde 393};
4a71df50 394
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395enum qeth_qdio_out_buffer_state {
396 /* Owned by driver, in order to be filled. */
397 QETH_QDIO_BUF_EMPTY,
398 /* Filled by driver; owned by hardware in order to be sent. */
399 QETH_QDIO_BUF_PRIMED,
400 /* Identified to be pending in TPQ. */
401 QETH_QDIO_BUF_PENDING,
402 /* Found in completion queue. */
403 QETH_QDIO_BUF_IN_CQ,
404 /* Handled via transfer pending / completion queue. */
405 QETH_QDIO_BUF_HANDLED_DELAYED,
406};
407
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408struct qeth_qdio_out_buffer {
409 struct qdio_buffer *buffer;
410 atomic_t state;
411 int next_element_to_fill;
1ab2f8c6 412 unsigned int frames;
96bd6c94 413 unsigned int bytes;
4a71df50 414 struct sk_buff_head skb_list;
2aedd56a 415 int is_header[QDIO_MAX_ELEMENTS_PER_BUFFER];
0da9581d 416
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417 struct qeth_qdio_out_q *q;
418 struct qeth_qdio_out_buffer *next_pending;
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419};
420
421struct qeth_card;
422
423enum qeth_out_q_states {
424 QETH_OUT_Q_UNLOCKED,
425 QETH_OUT_Q_LOCKED,
426 QETH_OUT_Q_LOCKED_FLUSH,
427};
428
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429#define QETH_CARD_STAT_ADD(_c, _stat, _val) ((_c)->stats._stat += (_val))
430#define QETH_CARD_STAT_INC(_c, _stat) QETH_CARD_STAT_ADD(_c, _stat, 1)
431
432#define QETH_TXQ_STAT_ADD(_q, _stat, _val) ((_q)->stats._stat += (_val))
433#define QETH_TXQ_STAT_INC(_q, _stat) QETH_TXQ_STAT_ADD(_q, _stat, 1)
434
435struct qeth_card_stats {
436 u64 rx_bufs;
437 u64 rx_skb_csum;
438 u64 rx_sg_skbs;
439 u64 rx_sg_frags;
440 u64 rx_sg_alloc_page;
441
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442 u64 rx_dropped_nomem;
443 u64 rx_dropped_notsupp;
5b55633f 444 u64 rx_dropped_runt;
845ef904 445
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446 /* rtnl_link_stats64 */
447 u64 rx_packets;
448 u64 rx_bytes;
b0abc4f5 449 u64 rx_multicast;
845ef904 450 u64 rx_length_errors;
5fd3fcbb 451 u64 rx_frame_errors;
845ef904 452 u64 rx_fifo_errors;
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453};
454
455struct qeth_out_q_stats {
456 u64 bufs;
457 u64 bufs_pack;
458 u64 buf_elements;
459 u64 skbs_pack;
460 u64 skbs_sg;
461 u64 skbs_csum;
462 u64 skbs_tso;
463 u64 skbs_linearized;
464 u64 skbs_linearized_fail;
465 u64 tso_bytes;
466 u64 packing_mode_switch;
54a50941 467 u64 stopped;
1ab2f8c6 468 u64 doorbell;
ee1e52d1 469 u64 coal_frames;
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470 u64 completion_yield;
471 u64 completion_timer;
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472
473 /* rtnl_link_stats64 */
474 u64 tx_packets;
475 u64 tx_bytes;
476 u64 tx_errors;
477 u64 tx_dropped;
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478};
479
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480#define QETH_TX_MAX_COALESCED_FRAMES 1
481#define QETH_TX_COALESCE_USECS 25
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482#define QETH_TX_TIMER_USECS 500
483
4a71df50 484struct qeth_qdio_out_q {
d445a4e2 485 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
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486 struct qeth_qdio_out_buffer *bufs[QDIO_MAX_BUFFERS_PER_Q];
487 struct qdio_outbuf_state *bufstates; /* convenience pointer */
b0abc4f5 488 struct qeth_out_q_stats stats;
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489 u8 next_buf_to_fill;
490 u8 max_elements;
491 u8 queue_no;
492 u8 do_pack;
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493 struct qeth_card *card;
494 atomic_t state;
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495 /*
496 * number of buffers that are currently filled (PRIMED)
497 * -> these buffers are hardware-owned
498 */
499 atomic_t used_buffers;
500 /* indicates whether PCI flag must be set (or if one is outstanding) */
501 atomic_t set_pci_flags_count;
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502 struct napi_struct napi;
503 struct timer_list timer;
9549d70a 504 struct qeth_hdr *prev_hdr;
ee1e52d1 505 unsigned int coalesced_frames;
9549d70a 506 u8 bulk_start;
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507 u8 bulk_count;
508 u8 bulk_max;
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509
510 unsigned int coalesce_usecs;
511 unsigned int max_coalesced_frames;
d445a4e2 512};
4a71df50 513
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514#define qeth_for_each_output_queue(card, q, i) \
515 for (i = 0; i < card->qdio.no_out_queues && \
516 (q = card->qdio.out_qs[i]); i++)
517
518#define qeth_napi_to_out_queue(n) container_of(n, struct qeth_qdio_out_q, napi)
519
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520static inline void qeth_tx_arm_timer(struct qeth_qdio_out_q *queue,
521 unsigned long usecs)
e53edf74 522{
ee1e52d1 523 timer_reduce(&queue->timer, usecs_to_jiffies(usecs) + jiffies);
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524}
525
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526static inline bool qeth_out_queue_is_full(struct qeth_qdio_out_q *queue)
527{
528 return atomic_read(&queue->used_buffers) >= QDIO_MAX_BUFFERS_PER_Q;
529}
530
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531static inline bool qeth_out_queue_is_empty(struct qeth_qdio_out_q *queue)
532{
533 return atomic_read(&queue->used_buffers) == 0;
534}
535
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536struct qeth_qdio_info {
537 atomic_t state;
538 /* input */
0da9581d 539 int no_in_queues;
4a71df50 540 struct qeth_qdio_q *in_q;
0da9581d 541 struct qeth_qdio_q *c_q;
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542 struct qeth_qdio_buffer_pool in_buf_pool;
543 struct qeth_qdio_buffer_pool init_pool;
544 int in_buf_size;
545
546 /* output */
547 int no_out_queues;
d8564e19 548 struct qeth_qdio_out_q *out_qs[QETH_MAX_OUT_QUEUES];
0da9581d 549 struct qdio_outbuf_state *out_bufstates;
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550
551 /* priority queueing */
552 int do_prio_queueing;
553 int default_out_queue;
554};
555
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556/**
557 * channel state machine
558 */
559enum qeth_channel_states {
560 CH_STATE_UP,
561 CH_STATE_DOWN,
4a71df50
FB
562 CH_STATE_HALTED,
563 CH_STATE_STOPPED,
4a71df50
FB
564};
565/**
566 * card state machine
567 */
568enum qeth_card_states {
569 CARD_STATE_DOWN,
4a71df50 570 CARD_STATE_SOFTSETUP,
4a71df50
FB
571};
572
573/**
574 * Protocol versions
575 */
576enum qeth_prot_versions {
a59d121d 577 QETH_PROT_NONE = 0x0000,
4a71df50
FB
578 QETH_PROT_IPV4 = 0x0004,
579 QETH_PROT_IPV6 = 0x0006,
580};
581
0da9581d
EL
582enum qeth_cq {
583 QETH_CQ_DISABLED = 0,
584 QETH_CQ_ENABLED = 1,
585 QETH_CQ_NOTAVAILABLE = 2,
586};
587
4a71df50 588struct qeth_ipato {
7fbd9493 589 bool enabled;
02f510f3
JW
590 bool invert4;
591 bool invert6;
4a71df50
FB
592 struct list_head entries;
593};
594
c3b2218d
JW
595struct qeth_channel {
596 struct ccw_device *ccwdev;
f9e50b02 597 struct qeth_cmd_buffer *active_cmd;
c3b2218d
JW
598 enum qeth_channel_states state;
599 atomic_t irq_pending;
600};
4a71df50 601
308946b0
JW
602struct qeth_reply {
603 int (*callback)(struct qeth_card *card, struct qeth_reply *reply,
604 unsigned long data);
605 void *param;
606};
607
4a71df50 608struct qeth_cmd_buffer {
308946b0
JW
609 struct list_head list;
610 struct completion done;
611 spinlock_t lock;
40554895 612 unsigned int length;
d9b9f40b 613 refcount_t ref_count;
4a71df50 614 struct qeth_channel *channel;
308946b0 615 struct qeth_reply reply;
782e4a79 616 long timeout;
4a71df50 617 unsigned char *data;
c3b2218d 618 void (*finalize)(struct qeth_card *card, struct qeth_cmd_buffer *iob);
7f92316c
JW
619 bool (*match)(struct qeth_cmd_buffer *iob,
620 struct qeth_cmd_buffer *reply);
12fc286f
JW
621 void (*callback)(struct qeth_card *card, struct qeth_cmd_buffer *iob,
622 unsigned int data_length);
308946b0 623 int rc;
4a71df50
FB
624};
625
d9b9f40b
JW
626static inline void qeth_get_cmd(struct qeth_cmd_buffer *iob)
627{
628 refcount_inc(&iob->ref_count);
629}
630
7f92316c
JW
631static inline struct qeth_ipa_cmd *__ipa_reply(struct qeth_cmd_buffer *iob)
632{
633 if (!IS_IPA(iob->data))
634 return NULL;
635
636 return (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
637}
638
1c5b2216
JW
639static inline struct qeth_ipa_cmd *__ipa_cmd(struct qeth_cmd_buffer *iob)
640{
641 return (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
642}
643
40554895
JW
644static inline struct ccw1 *__ccw_from_cmd(struct qeth_cmd_buffer *iob)
645{
40554895
JW
646 return (struct ccw1 *)(iob->data + ALIGN(iob->length, 8));
647}
648
782e4a79
JW
649static inline bool qeth_trylock_channel(struct qeth_channel *channel)
650{
651 return atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0;
652}
653
4a71df50
FB
654/**
655 * OSA card related definitions
656 */
657struct qeth_token {
658 __u32 issuer_rm_w;
659 __u32 issuer_rm_r;
660 __u32 cm_filter_w;
661 __u32 cm_filter_r;
662 __u32 cm_connection_w;
663 __u32 cm_connection_r;
664 __u32 ulp_filter_w;
665 __u32 ulp_filter_r;
666 __u32 ulp_connection_w;
667 __u32 ulp_connection_r;
668};
669
670struct qeth_seqno {
671 __u32 trans_hdr;
672 __u32 pdu_hdr;
673 __u32 pdu_hdr_ack;
674 __u16 ipa;
4a71df50
FB
675};
676
4a71df50
FB
677struct qeth_card_blkt {
678 int time_total;
679 int inter_packet;
680 int inter_packet_jumbo;
681};
682
683#define QETH_BROADCAST_WITH_ECHO 0x01
684#define QETH_BROADCAST_WITHOUT_ECHO 0x02
4a71df50
FB
685struct qeth_card_info {
686 unsigned short unit_addr2;
687 unsigned short cula;
afc1f67b 688 u8 chpid;
4a71df50
FB
689 __u16 func_level;
690 char mcl_level[QETH_MCL_LENGTH + 1];
9de15117 691 u8 dev_addr_is_registered:1;
d7d543f2 692 u8 open_when_online:1;
59b757a9 693 u8 promisc_mode:1;
09ac887f 694 u8 use_v1_blkt:1;
379ac99e 695 u8 is_vm_nic:1;
3be83016
JW
696 /* no bitfield, we take a pointer on these two: */
697 u8 has_lp2lp_cso_v6;
698 u8 has_lp2lp_cso_v4;
4a71df50
FB
699 enum qeth_card_types type;
700 enum qeth_link_types link_type;
4a71df50 701 int broadcast_capable;
c70eb09d 702 bool layer_enforced;
4a71df50 703 struct qeth_card_blkt blkt;
1da74b1c
FB
704 __u32 diagass_support;
705 __u32 hwtrap;
4a71df50
FB
706};
707
4fda3354
JW
708enum qeth_discipline_id {
709 QETH_DISCIPLINE_UNDETERMINED = -1,
710 QETH_DISCIPLINE_LAYER3 = 0,
711 QETH_DISCIPLINE_LAYER2 = 1,
712};
713
4a71df50 714struct qeth_card_options {
52f82bf1
JW
715 struct qeth_ipa_caps ipa4;
716 struct qeth_ipa_caps ipa6;
4a71df50 717 struct qeth_routing_info route4;
4a71df50 718 struct qeth_routing_info route6;
52f82bf1 719 struct qeth_ipa_caps adp; /* Adapter parameters */
b4d72c08 720 struct qeth_sbp_info sbp; /* SETBRIDGEPORT options */
a45b3faf 721 struct qeth_vnicc_info vnicc; /* VNICC options */
4fda3354 722 enum qeth_discipline_id layer;
d64ecc22 723 enum qeth_ipa_isolation_modes isolation;
76b11f8e 724 int sniffer;
0da9581d 725 enum qeth_cq cq;
b3332930 726 char hsuid[9];
4a71df50
FB
727};
728
4fda3354
JW
729#define IS_LAYER2(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER2)
730#define IS_LAYER3(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER3)
731
4a71df50
FB
732/*
733 * thread bits for qeth_card thread masks
734 */
735enum qeth_threads {
736 QETH_RECOVER_THREAD = 1,
737};
738
739struct qeth_osn_info {
740 int (*assist_cb)(struct net_device *dev, void *data);
741 int (*data_cb)(struct sk_buff *skb);
742};
743
4a71df50 744struct qeth_discipline {
2d2ebb3e 745 const struct device_type *devtype;
c041f2d4
SO
746 int (*setup) (struct ccwgroup_device *);
747 void (*remove) (struct ccwgroup_device *);
91003f35
JW
748 int (*set_online)(struct qeth_card *card);
749 void (*set_offline)(struct qeth_card *card);
942d6984 750 int (*do_ioctl)(struct net_device *dev, struct ifreq *rq, int cmd);
c044dc21
EC
751 int (*control_event_handler)(struct qeth_card *card,
752 struct qeth_ipa_cmd *cmd);
4a71df50
FB
753};
754
5f78e29c
LD
755enum qeth_addr_disposition {
756 QETH_DISP_ADDR_DELETE = 0,
757 QETH_DISP_ADDR_DO_NOTHING = 1,
758 QETH_DISP_ADDR_ADD = 2,
4a71df50
FB
759};
760
a1c3ed4c
FB
761struct qeth_rx {
762 int b_count;
763 int b_index;
ed13615d 764 u8 buf_element;
a1c3ed4c
FB
765 int e_offset;
766 int qdio_err;
767};
768
02d5cb5b
EC
769struct carrier_info {
770 __u8 card_type;
771 __u16 port_mode;
772 __u32 port_speed;
773};
774
45cbb2e4
SR
775struct qeth_switch_info {
776 __u32 capabilities;
777 __u32 settings;
778};
779
562cf773
JW
780struct qeth_priv {
781 unsigned int rx_copybreak;
782};
783
6541aa52 784#define QETH_NAPI_WEIGHT NAPI_POLL_WEIGHT
a1c3ed4c 785
4a71df50 786struct qeth_card {
4a71df50 787 enum qeth_card_states state;
4a71df50
FB
788 spinlock_t lock;
789 struct ccwgroup_device *gdev;
d9b9f40b 790 struct qeth_cmd_buffer *read_cmd;
4a71df50
FB
791 struct qeth_channel read;
792 struct qeth_channel write;
793 struct qeth_channel data;
794
795 struct net_device *dev;
fb8d2580 796 struct dentry *debugfs;
b0abc4f5 797 struct qeth_card_stats stats;
4a71df50
FB
798 struct qeth_card_info info;
799 struct qeth_token token;
800 struct qeth_seqno seqno;
801 struct qeth_card_options options;
802
c0a2e4d1 803 struct workqueue_struct *event_wq;
7686e4b6 804 struct workqueue_struct *cmd_wq;
4a71df50 805 wait_queue_head_t wait_q;
fe5c8028 806 DECLARE_HASHTABLE(mac_htable, 4);
5f78e29c 807 DECLARE_HASHTABLE(ip_htable, 4);
0d49c06b
JW
808 DECLARE_HASHTABLE(local_addrs4, 4);
809 DECLARE_HASHTABLE(local_addrs6, 4);
810 spinlock_t local_addrs4_lock;
811 spinlock_t local_addrs6_lock;
df2a2a52 812 struct mutex ip_lock;
5f78e29c 813 DECLARE_HASHTABLE(ip_mc_htable, 4);
d0c74825 814 struct work_struct rx_mode_work;
4a71df50
FB
815 struct work_struct kernel_thread_starter;
816 spinlock_t thread_mask_lock;
817 unsigned long thread_start_mask;
818 unsigned long thread_allowed_mask;
819 unsigned long thread_running_mask;
4a71df50
FB
820 struct qeth_ipato ipato;
821 struct list_head cmd_waiter_list;
822 /* QDIO buffer handling */
823 struct qeth_qdio_info qdio;
908abbb5 824 int read_or_write_problem;
4a71df50 825 struct qeth_osn_info osn_info;
c041f2d4 826 struct qeth_discipline *discipline;
4a71df50 827 atomic_t force_alloc_skb;
6bcac508 828 struct service_level qeth_service_level;
76b11f8e 829 struct qdio_ssqd_desc ssqd;
af039068 830 debug_info_t *debug;
c8183f54 831 struct mutex sbp_lock;
c4949f07 832 struct mutex conf_mutex;
9dc48ccc 833 struct mutex discipline_mutex;
a1c3ed4c
FB
834 struct napi_struct napi;
835 struct qeth_rx rx;
b3332930
FB
836 struct delayed_work buffer_reclaim_work;
837 int reclaim_index;
0f54761d 838 struct work_struct close_dev_work;
4a71df50
FB
839};
840
0f7aedbd
JW
841static inline bool qeth_card_hw_is_reachable(struct qeth_card *card)
842{
843 return card->state == CARD_STATE_SOFTSETUP;
844}
845
7359393f
JW
846static inline void qeth_unlock_channel(struct qeth_card *card,
847 struct qeth_channel *channel)
848{
849 atomic_set(&channel->irq_pending, 0);
850 wake_up(&card->wait_q);
851}
852
1da74b1c
FB
853struct qeth_trap_id {
854 __u16 lparnr;
855 char vmname[8];
856 __u8 chpid;
857 __u8 ssid;
858 __u16 devno;
859} __packed;
860
4a71df50
FB
861/*some helper functions*/
862#define QETH_CARD_IFNAME(card) (((card)->dev)? (card)->dev->name : "")
863
3a18d754
JW
864static inline u16 qeth_iqd_translate_txq(struct net_device *dev, u16 txq)
865{
866 if (txq == QETH_IQD_MCAST_TXQ)
867 return dev->num_tx_queues - 1;
868 if (txq == dev->num_tx_queues - 1)
869 return QETH_IQD_MCAST_TXQ;
870 return txq;
871}
872
8b664cd1
JW
873static inline bool qeth_iqd_is_mcast_queue(struct qeth_card *card,
874 struct qeth_qdio_out_q *queue)
875{
876 return qeth_iqd_translate_txq(card->dev, queue->queue_no) ==
877 QETH_IQD_MCAST_TXQ;
878}
879
ce28867f
JW
880static inline void qeth_scrub_qdio_buffer(struct qdio_buffer *buf,
881 unsigned int elements)
882{
883 unsigned int i;
884
885 for (i = 0; i < elements; i++)
886 memset(&buf->element[i], 0, sizeof(struct qdio_buffer_element));
887 buf->element[14].sflags = 0;
888 buf->element[15].sflags = 0;
889}
890
2863c613
EC
891/**
892 * qeth_get_elements_for_range() - find number of SBALEs to cover range.
893 * @start: Start of the address range.
894 * @end: Address after the end of the range.
895 *
896 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
897 * the specified address range.
898 */
899static inline int qeth_get_elements_for_range(addr_t start, addr_t end)
900{
89271c65 901 return PFN_UP(end) - PFN_DOWN(start);
2863c613
EC
902}
903
4a71df50
FB
904static inline int qeth_get_ip_version(struct sk_buff *skb)
905{
19e36da6
JW
906 struct vlan_ethhdr *veth = vlan_eth_hdr(skb);
907 __be16 prot = veth->h_vlan_proto;
a9baf10a 908
19e36da6
JW
909 if (prot == htons(ETH_P_8021Q))
910 prot = veth->h_vlan_encapsulated_proto;
911
912 switch (prot) {
913 case htons(ETH_P_IPV6):
4a71df50 914 return 6;
19e36da6 915 case htons(ETH_P_IP):
4a71df50
FB
916 return 4;
917 default:
918 return 0;
919 }
920}
921
58aa2491
JW
922static inline int qeth_get_ether_cast_type(struct sk_buff *skb)
923{
924 u8 *addr = eth_hdr(skb)->h_dest;
925
926 if (is_multicast_ether_addr(addr))
927 return is_broadcast_ether_addr(addr) ? RTN_BROADCAST :
928 RTN_MULTICAST;
929 return RTN_UNICAST;
930}
931
980f4568
JW
932static inline struct dst_entry *qeth_dst_check_rcu(struct sk_buff *skb, int ipv)
933{
934 struct dst_entry *dst = skb_dst(skb);
935 struct rt6_info *rt;
936
937 rt = (struct rt6_info *) dst;
938 if (dst)
939 dst = dst_check(dst, (ipv == 6) ? rt6_get_cookie(rt) : 0);
940 return dst;
941}
942
1d38c2e4
JW
943static inline __be32 qeth_next_hop_v4_rcu(struct sk_buff *skb,
944 struct dst_entry *dst)
945{
946 struct rtable *rt = (struct rtable *) dst;
947
948 return (rt) ? rt_nexthop(rt, ip_hdr(skb)->daddr) : ip_hdr(skb)->daddr;
949}
950
951static inline struct in6_addr *qeth_next_hop_v6_rcu(struct sk_buff *skb,
952 struct dst_entry *dst)
953{
954 struct rt6_info *rt = (struct rt6_info *) dst;
955
956 if (rt && !ipv6_addr_any(&rt->rt6i_gateway))
957 return &rt->rt6i_gateway;
958 else
959 return &ipv6_hdr(skb)->daddr;
960}
961
571f9dd8 962static inline void qeth_tx_csum(struct sk_buff *skb, u8 *flags, int ipv)
6195b936
JW
963{
964 *flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ;
571f9dd8
KM
965 if ((ipv == 4 && ip_hdr(skb)->protocol == IPPROTO_UDP) ||
966 (ipv == 6 && ipv6_hdr(skb)->nexthdr == IPPROTO_UDP))
6195b936 967 *flags |= QETH_HDR_EXT_UDP;
6195b936
JW
968}
969
f90b744e
FB
970static inline void qeth_put_buffer_pool_entry(struct qeth_card *card,
971 struct qeth_buffer_pool_entry *entry)
972{
973 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
974}
975
1da74b1c
FB
976static inline int qeth_is_diagass_supported(struct qeth_card *card,
977 enum qeth_diags_cmds cmd)
978{
979 return card->info.diagass_support & (__u32)cmd;
980}
981
a8155b00
KM
982int qeth_send_simple_setassparms_prot(struct qeth_card *card,
983 enum qeth_ipa_funcs ipa_func,
1c696c89 984 u16 cmd_code, u32 *data,
a8155b00
KM
985 enum qeth_prot_versions prot);
986/* IPv4 variant */
987static inline int qeth_send_simple_setassparms(struct qeth_card *card,
988 enum qeth_ipa_funcs ipa_func,
1c696c89 989 u16 cmd_code, u32 *data)
a8155b00
KM
990{
991 return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code,
992 data, QETH_PROT_IPV4);
993}
994
995static inline int qeth_send_simple_setassparms_v6(struct qeth_card *card,
996 enum qeth_ipa_funcs ipa_func,
1c696c89 997 u16 cmd_code, u32 *data)
a8155b00
KM
998{
999 return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code,
1000 data, QETH_PROT_IPV6);
1001}
1002
73dc2daf 1003int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb);
86c0cdb9 1004
c041f2d4
SO
1005extern struct qeth_discipline qeth_l2_discipline;
1006extern struct qeth_discipline qeth_l3_discipline;
d896ac62
JW
1007extern const struct ethtool_ops qeth_ethtool_ops;
1008extern const struct ethtool_ops qeth_osn_ethtool_ops;
b7169c51
SO
1009extern const struct attribute_group *qeth_generic_attr_groups[];
1010extern const struct attribute_group *qeth_osn_attr_groups[];
2d2ebb3e
JW
1011extern const struct attribute_group qeth_device_attr_group;
1012extern const struct attribute_group qeth_device_blkt_group;
1013extern const struct device_type qeth_generic_devtype;
b7169c51 1014
4a71df50 1015const char *qeth_get_cardname_short(struct qeth_card *);
5d4f7856 1016int qeth_resize_buffer_pool(struct qeth_card *card, unsigned int count);
4a71df50
FB
1017int qeth_core_load_discipline(struct qeth_card *, enum qeth_discipline_id);
1018void qeth_core_free_discipline(struct qeth_card *);
4a71df50
FB
1019
1020/* exports for qeth discipline device drivers */
683d718a 1021extern struct kmem_cache *qeth_core_header_cache;
d11ba0c4 1022extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS];
4a71df50 1023
d3d1b205 1024struct net_device *qeth_clone_netdev(struct net_device *orig);
d7d18da1 1025struct qeth_card *qeth_get_card_by_busid(char *bus_id);
4a71df50
FB
1026void qeth_set_allowed_threads(struct qeth_card *, unsigned long , int);
1027int qeth_threads_running(struct qeth_card *, unsigned long);
9fae5c3b 1028int qeth_core_hardsetup_card(struct qeth_card *card, bool *carrier_ok);
f9e50b02 1029int qeth_stop_channel(struct qeth_channel *channel);
91003f35 1030int qeth_set_offline(struct qeth_card *card, bool resetting);
f9e50b02 1031
4a71df50 1032void qeth_print_status_message(struct qeth_card *);
4a71df50
FB
1033int qeth_send_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *,
1034 int (*reply_cb)
1035 (struct qeth_card *, struct qeth_reply *, unsigned long),
1036 void *);
a59d121d
JW
1037struct qeth_cmd_buffer *qeth_ipa_alloc_cmd(struct qeth_card *card,
1038 enum qeth_ipa_cmds cmd_code,
1039 enum qeth_prot_versions prot,
1040 unsigned int data_length);
1041struct qeth_cmd_buffer *qeth_alloc_cmd(struct qeth_channel *channel,
1042 unsigned int length, unsigned int ccws,
1043 long timeout);
b9150461
JW
1044struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
1045 enum qeth_ipa_funcs ipa_func,
1046 u16 cmd_code,
1047 unsigned int data_length,
1048 enum qeth_prot_versions prot);
5cfbe10a
JW
1049struct qeth_cmd_buffer *qeth_get_diag_cmd(struct qeth_card *card,
1050 enum qeth_diags_cmds sub_cmd,
1051 unsigned int data_length);
308946b0 1052void qeth_notify_cmd(struct qeth_cmd_buffer *iob, int reason);
c3b2218d 1053void qeth_put_cmd(struct qeth_cmd_buffer *iob);
a59d121d 1054
7005b754 1055int qeth_schedule_recovery(struct qeth_card *card);
0d49c06b 1056void qeth_flush_local_addrs(struct qeth_card *card);
d73ef324 1057int qeth_poll(struct napi_struct *napi, int budget);
4a71df50
FB
1058void qeth_clear_ipacmd_list(struct qeth_card *);
1059int qeth_qdio_clear_card(struct qeth_card *, int);
1060void qeth_clear_working_pool_list(struct qeth_card *);
41c47da3 1061void qeth_drain_output_queues(struct qeth_card *card);
59b757a9 1062void qeth_setadp_promisc_mode(struct qeth_card *card, bool enable);
4a71df50 1063int qeth_setadpparms_change_macaddr(struct qeth_card *);
0290bd29 1064void qeth_tx_timeout(struct net_device *, unsigned int txqueue);
c2153277 1065void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
7f92316c
JW
1066 u16 cmd_length,
1067 bool (*match)(struct qeth_cmd_buffer *iob,
1068 struct qeth_cmd_buffer *reply));
45cbb2e4
SR
1069int qeth_query_switch_attributes(struct qeth_card *card,
1070 struct qeth_switch_info *sw_info);
d896ac62
JW
1071int qeth_query_card_info(struct qeth_card *card,
1072 struct carrier_info *carrier_info);
65878fd9
JW
1073int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
1074 enum qeth_ipa_isolation_modes mode);
1075
40e6a225 1076unsigned int qeth_count_elements(struct sk_buff *skb, unsigned int data_offset);
13ddacb5
JW
1077int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
1078 struct sk_buff *skb, struct qeth_hdr *hdr,
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1079 unsigned int offset, unsigned int hd_len,
1080 int elements_needed);
942d6984 1081int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
8e96c51c 1082void qeth_dbf_longtext(debug_info_t *id, int level, char *text, ...);
0da9581d 1083int qeth_configure_cq(struct qeth_card *, enum qeth_cq);
1da74b1c 1084int qeth_hw_trap(struct qeth_card *, enum qeth_diags_trap_action);
395672e0 1085void qeth_trace_features(struct qeth_card *);
8f43fb00 1086int qeth_setassparms_cb(struct qeth_card *, struct qeth_reply *, unsigned long);
1c103cf8 1087int qeth_setup_netdev(struct qeth_card *card);
8f43fb00 1088int qeth_set_features(struct net_device *, netdev_features_t);
d025da9e 1089void qeth_enable_hw_features(struct net_device *dev);
8f43fb00 1090netdev_features_t qeth_fix_features(struct net_device *, netdev_features_t);
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1091netdev_features_t qeth_features_check(struct sk_buff *skb,
1092 struct net_device *dev,
1093 netdev_features_t features);
b0abc4f5 1094void qeth_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats);
5d8ce41c 1095int qeth_set_real_num_tx_queues(struct qeth_card *card, unsigned int count);
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1096u16 qeth_iqd_select_queue(struct net_device *dev, struct sk_buff *skb,
1097 u8 cast_type, struct net_device *sb_dev);
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1098int qeth_open(struct net_device *dev);
1099int qeth_stop(struct net_device *dev);
1100
ec61bd2f 1101int qeth_vm_request_mac(struct qeth_card *card);
fc69660b 1102int qeth_xmit(struct qeth_card *card, struct sk_buff *skb,
eca1d5c2 1103 struct qeth_qdio_out_q *queue, int ipv,
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1104 void (*fill_header)(struct qeth_qdio_out_q *queue,
1105 struct qeth_hdr *hdr, struct sk_buff *skb,
eca1d5c2 1106 int ipv, unsigned int data_len));
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1107
1108/* exports for OSN */
1109int qeth_osn_assist(struct net_device *, void *, int);
1110int qeth_osn_register(unsigned char *read_dev_no, struct net_device **,
1111 int (*assist_cb)(struct net_device *, void *),
1112 int (*data_cb)(struct sk_buff *));
1113void qeth_osn_deregister(struct net_device *);
1114
1115#endif /* __QETH_CORE_H__ */