Merge tag 'for-5.2-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave...
[linux-2.6-block.git] / drivers / s390 / net / qeth_core.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
4a71df50 2/*
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3 * Copyright IBM Corp. 2007
4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
10#ifndef __QETH_CORE_H__
11#define __QETH_CORE_H__
12
782e4a79 13#include <linux/completion.h>
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14#include <linux/if.h>
15#include <linux/if_arp.h>
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16#include <linux/etherdevice.h>
17#include <linux/if_vlan.h>
18#include <linux/ctype.h>
19#include <linux/in6.h>
20#include <linux/bitops.h>
21#include <linux/seq_file.h>
fe5c8028 22#include <linux/hashtable.h>
41aeed58 23#include <linux/ip.h>
ae695927 24#include <linux/refcount.h>
782e4a79 25#include <linux/wait.h>
c2780c1a 26#include <linux/workqueue.h>
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27
28#include <net/ipv6.h>
29#include <net/if_inet6.h>
30#include <net/addrconf.h>
e517b649 31#include <net/tcp.h>
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32
33#include <asm/debug.h>
34#include <asm/qdio.h>
35#include <asm/ccwdev.h>
36#include <asm/ccwgroup.h>
6bcac508 37#include <asm/sysinfo.h>
4a71df50 38
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39#include <uapi/linux/if_link.h>
40
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41#include "qeth_core_mpc.h"
42
43/**
44 * Debug Facility stuff
45 */
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46enum qeth_dbf_names {
47 QETH_DBF_SETUP,
d11ba0c4 48 QETH_DBF_MSG,
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49 QETH_DBF_CTRL,
50 QETH_DBF_INFOS /* must be last element */
51};
52
53struct qeth_dbf_info {
54 char name[DEBUG_MAX_NAME_LEN];
55 int pages;
56 int areas;
57 int len;
58 int level;
59 struct debug_view *view;
60 debug_info_t *id;
61};
62
63#define QETH_DBF_CTRL_LEN 256
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64
65#define QETH_DBF_TEXT(name, level, text) \
d11ba0c4 66 debug_text_event(qeth_dbf[QETH_DBF_##name].id, level, text)
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67
68#define QETH_DBF_HEX(name, level, addr, len) \
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69 debug_event(qeth_dbf[QETH_DBF_##name].id, level, (void *)(addr), len)
70
71#define QETH_DBF_MESSAGE(level, text...) \
72 debug_sprintf_event(qeth_dbf[QETH_DBF_MSG].id, level, text)
73
74#define QETH_DBF_TEXT_(name, level, text...) \
8e96c51c 75 qeth_dbf_longtext(qeth_dbf[QETH_DBF_##name].id, level, text)
4a71df50 76
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77#define QETH_CARD_TEXT(card, level, text) \
78 debug_text_event(card->debug, level, text)
79
80#define QETH_CARD_HEX(card, level, addr, len) \
81 debug_event(card->debug, level, (void *)(addr), len)
82
83#define QETH_CARD_MESSAGE(card, text...) \
84 debug_sprintf_event(card->debug, level, text)
85
86#define QETH_CARD_TEXT_(card, level, text...) \
87 qeth_dbf_longtext(card->debug, level, text)
88
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89#define SENSE_COMMAND_REJECT_BYTE 0
90#define SENSE_COMMAND_REJECT_FLAG 0x80
91#define SENSE_RESETTING_EVENT_BYTE 1
92#define SENSE_RESETTING_EVENT_FLAG 0x80
93
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94static inline u32 qeth_get_device_id(struct ccw_device *cdev)
95{
96 struct ccw_dev_id dev_id;
97 u32 id;
98
99 ccw_device_get_id(cdev, &dev_id);
100 id = dev_id.devno;
101 id |= (u32) (dev_id.ssid << 16);
102
103 return id;
104}
105
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106/*
107 * Common IO related definitions
108 */
109#define CARD_RDEV(card) card->read.ccwdev
110#define CARD_WDEV(card) card->write.ccwdev
111#define CARD_DDEV(card) card->data.ccwdev
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112#define CARD_BUS_ID(card) dev_name(&card->gdev->dev)
113#define CARD_RDEV_ID(card) dev_name(&card->read.ccwdev->dev)
114#define CARD_WDEV_ID(card) dev_name(&card->write.ccwdev->dev)
115#define CARD_DDEV_ID(card) dev_name(&card->data.ccwdev->dev)
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116#define CCW_DEVID(cdev) (qeth_get_device_id(cdev))
117#define CARD_DEVID(card) (CCW_DEVID(CARD_RDEV(card)))
4a71df50 118
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119/* Routing stuff */
120struct qeth_routing_info {
121 enum qeth_routing_types type;
122};
123
124/* IPA stuff */
125struct qeth_ipa_info {
126 __u32 supported_funcs;
127 __u32 enabled_funcs;
128};
129
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130/* SETBRIDGEPORT stuff */
131enum qeth_sbp_roles {
132 QETH_SBP_ROLE_NONE = 0,
133 QETH_SBP_ROLE_PRIMARY = 1,
134 QETH_SBP_ROLE_SECONDARY = 2,
135};
136
137enum qeth_sbp_states {
138 QETH_SBP_STATE_INACTIVE = 0,
139 QETH_SBP_STATE_STANDBY = 1,
140 QETH_SBP_STATE_ACTIVE = 2,
141};
142
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143#define QETH_SBP_HOST_NOTIFICATION 1
144
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145struct qeth_sbp_info {
146 __u32 supported_funcs;
147 enum qeth_sbp_roles role;
9f48b9db 148 __u32 hostnotification:1;
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149 __u32 reflect_promisc:1;
150 __u32 reflect_promisc_primary:1;
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151};
152
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153struct qeth_vnicc_info {
154 /* supported/currently configured VNICCs; updated in IPA exchanges */
155 u32 sup_chars;
156 u32 cur_chars;
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157 /* supported commands: bitmasks which VNICCs support respective cmd */
158 u32 set_char_sup;
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159 u32 getset_timeout_sup;
160 /* timeout value for the learning characteristic */
161 u32 learning_timeout;
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162 /* characteristics wanted/configured by user */
163 u32 wanted_chars;
164 /* has user explicitly enabled rx_bcast while online? */
165 bool rx_bcast_enabled;
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166};
167
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168static inline int qeth_is_adp_supported(struct qeth_ipa_info *ipa,
169 enum qeth_ipa_setadp_cmd func)
170{
171 return (ipa->supported_funcs & func);
172}
173
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174static inline int qeth_is_ipa_supported(struct qeth_ipa_info *ipa,
175 enum qeth_ipa_funcs func)
176{
177 return (ipa->supported_funcs & func);
178}
179
180static inline int qeth_is_ipa_enabled(struct qeth_ipa_info *ipa,
181 enum qeth_ipa_funcs func)
182{
183 return (ipa->supported_funcs & ipa->enabled_funcs & func);
184}
185
186#define qeth_adp_supported(c, f) \
46b83629 187 qeth_is_adp_supported(&c->options.adp, f)
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188#define qeth_is_supported(c, f) \
189 qeth_is_ipa_supported(&c->options.ipa4, f)
190#define qeth_is_enabled(c, f) \
191 qeth_is_ipa_enabled(&c->options.ipa4, f)
192#define qeth_is_supported6(c, f) \
193 qeth_is_ipa_supported(&c->options.ipa6, f)
194#define qeth_is_enabled6(c, f) \
195 qeth_is_ipa_enabled(&c->options.ipa6, f)
196#define qeth_is_ipafunc_supported(c, prot, f) \
197 ((prot == QETH_PROT_IPV6) ? \
198 qeth_is_supported6(c, f) : qeth_is_supported(c, f))
199#define qeth_is_ipafunc_enabled(c, prot, f) \
200 ((prot == QETH_PROT_IPV6) ? \
201 qeth_is_enabled6(c, f) : qeth_is_enabled(c, f))
202
5113fec0 203#define QETH_IDX_FUNC_LEVEL_OSD 0x0101
6298263a 204#define QETH_IDX_FUNC_LEVEL_IQD 0x4108
4a71df50 205
4a71df50 206#define QETH_BUFSIZE 4096
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207#define CCW_CMD_WRITE 0x01
208#define CCW_CMD_READ 0x02
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209
210/**
211 * some more defs
212 */
213#define QETH_TX_TIMEOUT 100 * HZ
214#define QETH_RCD_TIMEOUT 60 * HZ
b3332930 215#define QETH_RECLAIM_WORK_TIME HZ
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216#define QETH_MAX_PORTNO 15
217
218/*IPv6 address autoconfiguration stuff*/
219#define UNIQUE_ID_IF_CREATE_ADDR_FAILED 0xfffe
220#define UNIQUE_ID_NOT_BY_CARD 0x10000
221
222/*****************************************************************************/
223/* QDIO queue and buffer handling */
224/*****************************************************************************/
225#define QETH_MAX_QUEUES 4
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226#define QETH_IQD_MIN_TXQ 2 /* One for ucast, one for mcast. */
227#define QETH_IQD_MCAST_TXQ 0
228#define QETH_IQD_MIN_UCAST_TXQ 1
4a71df50 229#define QETH_IN_BUF_SIZE_DEFAULT 65536
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230#define QETH_IN_BUF_COUNT_DEFAULT 64
231#define QETH_IN_BUF_COUNT_HSDEFAULT 128
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232#define QETH_IN_BUF_COUNT_MIN 8
233#define QETH_IN_BUF_COUNT_MAX 128
234#define QETH_MAX_BUFFER_ELEMENTS(card) ((card)->qdio.in_buf_size >> 12)
235#define QETH_IN_BUF_REQUEUE_THRESHOLD(card) \
0284a0fd 236 ((card)->qdio.in_buf_pool.buf_count / 2)
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237
238/* buffers we have to be behind before we get a PCI */
239#define QETH_PCI_THRESHOLD_A(card) ((card)->qdio.in_buf_pool.buf_count+1)
240/*enqueued free buffers left before we get a PCI*/
241#define QETH_PCI_THRESHOLD_B(card) 0
242/*not used unless the microcode gets patched*/
243#define QETH_PCI_TIMER_VALUE(card) 3
244
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245/* priority queing */
246#define QETH_PRIOQ_DEFAULT QETH_NO_PRIO_QUEUEING
247#define QETH_DEFAULT_QUEUE 2
248#define QETH_NO_PRIO_QUEUEING 0
249#define QETH_PRIO_Q_ING_PREC 1
250#define QETH_PRIO_Q_ING_TOS 2
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251#define QETH_PRIO_Q_ING_SKB 3
252#define QETH_PRIO_Q_ING_VLAN 4
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253
254/* Packing */
255#define QETH_LOW_WATERMARK_PACK 2
256#define QETH_HIGH_WATERMARK_PACK 5
257#define QETH_WATERMARK_PACK_FUZZ 1
258
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259/* large receive scatter gather copy break */
260#define QETH_RX_SG_CB (PAGE_SIZE >> 1)
b3332930 261#define QETH_RX_PULL_LEN 256
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262
263struct qeth_hdr_layer3 {
264 __u8 id;
265 __u8 flags;
266 __u16 inbound_checksum; /*TSO:__u16 seqno */
267 __u32 token; /*TSO: __u32 reserved */
268 __u16 length;
269 __u8 vlan_prio;
270 __u8 ext_flags;
271 __u16 vlan_id;
272 __u16 frame_offset;
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273 union {
274 /* TX: */
5a541f6d 275 struct in6_addr ipv6_addr;
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276 struct ipv4 {
277 u8 res[12];
278 u32 addr;
279 } ipv4;
280 /* RX: */
281 struct rx {
282 u8 res1[2];
283 u8 src_mac[6];
284 u8 res2[4];
285 u16 vlan_id;
286 u8 res3[2];
287 } rx;
288 } next_hop;
289};
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290
291struct qeth_hdr_layer2 {
292 __u8 id;
293 __u8 flags[3];
294 __u8 port_no;
295 __u8 hdr_length;
296 __u16 pkt_length;
297 __u16 seq_no;
298 __u16 vlan_id;
299 __u32 reserved;
300 __u8 reserved2[16];
301} __attribute__ ((packed));
302
303struct qeth_hdr_osn {
304 __u8 id;
305 __u8 reserved;
306 __u16 seq_no;
307 __u16 reserved2;
308 __u16 control_flags;
309 __u16 pdu_length;
310 __u8 reserved3[18];
311 __u32 ccid;
312} __attribute__ ((packed));
313
314struct qeth_hdr {
315 union {
316 struct qeth_hdr_layer2 l2;
317 struct qeth_hdr_layer3 l3;
318 struct qeth_hdr_osn osn;
319 } hdr;
320} __attribute__ ((packed));
321
322/*TCP Segmentation Offload header*/
323struct qeth_hdr_ext_tso {
324 __u16 hdr_tot_len;
325 __u8 imb_hdr_no;
326 __u8 reserved;
327 __u8 hdr_type;
328 __u8 hdr_version;
329 __u16 hdr_len;
330 __u32 payload_len;
331 __u16 mss;
332 __u16 dg_hdr_len;
333 __u8 padding[16];
334} __attribute__ ((packed));
335
336struct qeth_hdr_tso {
337 struct qeth_hdr hdr; /*hdr->hdr.l3.xxx*/
338 struct qeth_hdr_ext_tso ext;
339} __attribute__ ((packed));
340
341
342/* flags for qeth_hdr.flags */
343#define QETH_HDR_PASSTHRU 0x10
344#define QETH_HDR_IPV6 0x80
345#define QETH_HDR_CAST_MASK 0x07
346enum qeth_cast_flags {
347 QETH_CAST_UNICAST = 0x06,
348 QETH_CAST_MULTICAST = 0x04,
349 QETH_CAST_BROADCAST = 0x05,
350 QETH_CAST_ANYCAST = 0x07,
351 QETH_CAST_NOCAST = 0x00,
352};
353
354enum qeth_layer2_frame_flags {
355 QETH_LAYER2_FLAG_MULTICAST = 0x01,
356 QETH_LAYER2_FLAG_BROADCAST = 0x02,
357 QETH_LAYER2_FLAG_UNICAST = 0x04,
358 QETH_LAYER2_FLAG_VLAN = 0x10,
359};
360
361enum qeth_header_ids {
362 QETH_HEADER_TYPE_LAYER3 = 0x01,
363 QETH_HEADER_TYPE_LAYER2 = 0x02,
0aef8392 364 QETH_HEADER_TYPE_L3_TSO = 0x03,
4a71df50 365 QETH_HEADER_TYPE_OSN = 0x04,
0aef8392 366 QETH_HEADER_TYPE_L2_TSO = 0x06,
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367};
368/* flags for qeth_hdr.ext_flags */
369#define QETH_HDR_EXT_VLAN_FRAME 0x01
370#define QETH_HDR_EXT_TOKEN_ID 0x02
371#define QETH_HDR_EXT_INCLUDE_VLAN_TAG 0x04
372#define QETH_HDR_EXT_SRC_MAC_ADDR 0x08
373#define QETH_HDR_EXT_CSUM_HDR_REQ 0x10
374#define QETH_HDR_EXT_CSUM_TRANSP_REQ 0x20
f6b85b6c 375#define QETH_HDR_EXT_UDP 0x40 /*bit off for TCP*/
4a71df50 376
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377enum qeth_qdio_info_states {
378 QETH_QDIO_UNINITIALIZED,
379 QETH_QDIO_ALLOCATED,
380 QETH_QDIO_ESTABLISHED,
381 QETH_QDIO_CLEANING
382};
383
384struct qeth_buffer_pool_entry {
385 struct list_head list;
386 struct list_head init_list;
387 void *elements[QDIO_MAX_ELEMENTS_PER_BUFFER];
388};
389
390struct qeth_qdio_buffer_pool {
391 struct list_head entry_list;
392 int buf_count;
393};
394
395struct qeth_qdio_buffer {
396 struct qdio_buffer *buffer;
397 /* the buffer pool entry currently associated to this buffer */
398 struct qeth_buffer_pool_entry *pool_entry;
b3332930 399 struct sk_buff *rx_skb;
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400};
401
402struct qeth_qdio_q {
6d284bde 403 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
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404 struct qeth_qdio_buffer bufs[QDIO_MAX_BUFFERS_PER_Q];
405 int next_buf_to_init;
6d284bde 406};
4a71df50 407
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408enum qeth_qdio_out_buffer_state {
409 /* Owned by driver, in order to be filled. */
410 QETH_QDIO_BUF_EMPTY,
411 /* Filled by driver; owned by hardware in order to be sent. */
412 QETH_QDIO_BUF_PRIMED,
413 /* Identified to be pending in TPQ. */
414 QETH_QDIO_BUF_PENDING,
415 /* Found in completion queue. */
416 QETH_QDIO_BUF_IN_CQ,
417 /* Handled via transfer pending / completion queue. */
418 QETH_QDIO_BUF_HANDLED_DELAYED,
419};
420
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421struct qeth_qdio_out_buffer {
422 struct qdio_buffer *buffer;
423 atomic_t state;
424 int next_element_to_fill;
425 struct sk_buff_head skb_list;
2aedd56a 426 int is_header[QDIO_MAX_ELEMENTS_PER_BUFFER];
0da9581d 427
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428 struct qeth_qdio_out_q *q;
429 struct qeth_qdio_out_buffer *next_pending;
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430};
431
432struct qeth_card;
433
434enum qeth_out_q_states {
435 QETH_OUT_Q_UNLOCKED,
436 QETH_OUT_Q_LOCKED,
437 QETH_OUT_Q_LOCKED_FLUSH,
438};
439
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440#define QETH_CARD_STAT_ADD(_c, _stat, _val) ((_c)->stats._stat += (_val))
441#define QETH_CARD_STAT_INC(_c, _stat) QETH_CARD_STAT_ADD(_c, _stat, 1)
442
443#define QETH_TXQ_STAT_ADD(_q, _stat, _val) ((_q)->stats._stat += (_val))
444#define QETH_TXQ_STAT_INC(_q, _stat) QETH_TXQ_STAT_ADD(_q, _stat, 1)
445
446struct qeth_card_stats {
447 u64 rx_bufs;
448 u64 rx_skb_csum;
449 u64 rx_sg_skbs;
450 u64 rx_sg_frags;
451 u64 rx_sg_alloc_page;
452
453 /* rtnl_link_stats64 */
454 u64 rx_packets;
455 u64 rx_bytes;
456 u64 rx_errors;
457 u64 rx_dropped;
458 u64 rx_multicast;
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459};
460
461struct qeth_out_q_stats {
462 u64 bufs;
463 u64 bufs_pack;
464 u64 buf_elements;
465 u64 skbs_pack;
466 u64 skbs_sg;
467 u64 skbs_csum;
468 u64 skbs_tso;
469 u64 skbs_linearized;
470 u64 skbs_linearized_fail;
471 u64 tso_bytes;
472 u64 packing_mode_switch;
54a50941 473 u64 stopped;
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474
475 /* rtnl_link_stats64 */
476 u64 tx_packets;
477 u64 tx_bytes;
478 u64 tx_errors;
479 u64 tx_dropped;
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480};
481
4a71df50 482struct qeth_qdio_out_q {
d445a4e2 483 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
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484 struct qeth_qdio_out_buffer *bufs[QDIO_MAX_BUFFERS_PER_Q];
485 struct qdio_outbuf_state *bufstates; /* convenience pointer */
b0abc4f5 486 struct qeth_out_q_stats stats;
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487 u8 next_buf_to_fill;
488 u8 max_elements;
489 u8 queue_no;
490 u8 do_pack;
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491 struct qeth_card *card;
492 atomic_t state;
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493 /*
494 * number of buffers that are currently filled (PRIMED)
495 * -> these buffers are hardware-owned
496 */
497 atomic_t used_buffers;
498 /* indicates whether PCI flag must be set (or if one is outstanding) */
499 atomic_t set_pci_flags_count;
d445a4e2 500};
4a71df50 501
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502static inline bool qeth_out_queue_is_full(struct qeth_qdio_out_q *queue)
503{
504 return atomic_read(&queue->used_buffers) >= QDIO_MAX_BUFFERS_PER_Q;
505}
506
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507struct qeth_qdio_info {
508 atomic_t state;
509 /* input */
0da9581d 510 int no_in_queues;
4a71df50 511 struct qeth_qdio_q *in_q;
0da9581d 512 struct qeth_qdio_q *c_q;
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513 struct qeth_qdio_buffer_pool in_buf_pool;
514 struct qeth_qdio_buffer_pool init_pool;
515 int in_buf_size;
516
517 /* output */
518 int no_out_queues;
bb92d3f8 519 struct qeth_qdio_out_q *out_qs[QETH_MAX_QUEUES];
0da9581d 520 struct qdio_outbuf_state *out_bufstates;
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521
522 /* priority queueing */
523 int do_prio_queueing;
524 int default_out_queue;
525};
526
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527/**
528 * buffer stuff for read channel
529 */
530#define QETH_CMD_BUFFER_NO 8
531
532/**
533 * channel state machine
534 */
535enum qeth_channel_states {
536 CH_STATE_UP,
537 CH_STATE_DOWN,
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538 CH_STATE_HALTED,
539 CH_STATE_STOPPED,
540 CH_STATE_RCD,
541 CH_STATE_RCD_DONE,
542};
543/**
544 * card state machine
545 */
546enum qeth_card_states {
547 CARD_STATE_DOWN,
548 CARD_STATE_HARDSETUP,
549 CARD_STATE_SOFTSETUP,
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550};
551
552/**
553 * Protocol versions
554 */
555enum qeth_prot_versions {
556 QETH_PROT_IPV4 = 0x0004,
557 QETH_PROT_IPV6 = 0x0006,
558};
559
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560enum qeth_cmd_buffer_state {
561 BUF_STATE_FREE,
562 BUF_STATE_LOCKED,
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563};
564
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565enum qeth_cq {
566 QETH_CQ_DISABLED = 0,
567 QETH_CQ_ENABLED = 1,
568 QETH_CQ_NOTAVAILABLE = 2,
569};
570
4a71df50 571struct qeth_ipato {
7fbd9493 572 bool enabled;
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573 bool invert4;
574 bool invert6;
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575 struct list_head entries;
576};
577
578struct qeth_channel;
579
580struct qeth_cmd_buffer {
581 enum qeth_cmd_buffer_state state;
582 struct qeth_channel *channel;
54daaca7 583 struct qeth_reply *reply;
782e4a79 584 long timeout;
4a71df50 585 unsigned char *data;
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586 void (*finalize)(struct qeth_card *card, struct qeth_cmd_buffer *iob,
587 unsigned int length);
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588 void (*callback)(struct qeth_card *card, struct qeth_channel *channel,
589 struct qeth_cmd_buffer *iob);
4a71df50
FB
590};
591
1c5b2216
JW
592static inline struct qeth_ipa_cmd *__ipa_cmd(struct qeth_cmd_buffer *iob)
593{
594 return (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
595}
596
4a71df50
FB
597/**
598 * definition of a qeth channel, used for read and write
599 */
600struct qeth_channel {
601 enum qeth_channel_states state;
f15cdaf2 602 struct ccw1 *ccw;
4a71df50
FB
603 spinlock_t iob_lock;
604 wait_queue_head_t wait_q;
4a71df50
FB
605 struct ccw_device *ccwdev;
606/*command buffer for control data*/
607 struct qeth_cmd_buffer iob[QETH_CMD_BUFFER_NO];
608 atomic_t irq_pending;
609 int io_buf_no;
4a71df50
FB
610};
611
782e4a79
JW
612static inline bool qeth_trylock_channel(struct qeth_channel *channel)
613{
614 return atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0;
615}
616
4a71df50
FB
617/**
618 * OSA card related definitions
619 */
620struct qeth_token {
621 __u32 issuer_rm_w;
622 __u32 issuer_rm_r;
623 __u32 cm_filter_w;
624 __u32 cm_filter_r;
625 __u32 cm_connection_w;
626 __u32 cm_connection_r;
627 __u32 ulp_filter_w;
628 __u32 ulp_filter_r;
629 __u32 ulp_connection_w;
630 __u32 ulp_connection_r;
631};
632
633struct qeth_seqno {
634 __u32 trans_hdr;
635 __u32 pdu_hdr;
636 __u32 pdu_hdr_ack;
637 __u16 ipa;
4a71df50
FB
638};
639
640struct qeth_reply {
641 struct list_head list;
782e4a79 642 struct completion received;
4a71df50
FB
643 int (*callback)(struct qeth_card *, struct qeth_reply *,
644 unsigned long);
645 u32 seqno;
646 unsigned long offset;
4a71df50
FB
647 int rc;
648 void *param;
ae695927 649 refcount_t refcnt;
4a71df50
FB
650};
651
4a71df50
FB
652struct qeth_card_blkt {
653 int time_total;
654 int inter_packet;
655 int inter_packet_jumbo;
656};
657
658#define QETH_BROADCAST_WITH_ECHO 0x01
659#define QETH_BROADCAST_WITHOUT_ECHO 0x02
4a71df50
FB
660#define QETH_LAYER2_MAC_REGISTERED 0x02
661struct qeth_card_info {
662 unsigned short unit_addr2;
663 unsigned short cula;
664 unsigned short chpid;
665 __u16 func_level;
666 char mcl_level[QETH_MCL_LENGTH + 1];
d7d543f2 667 u8 open_when_online:1;
379ac99e 668 u8 is_vm_nic:1;
4a71df50 669 int mac_bits;
4a71df50
FB
670 enum qeth_card_types type;
671 enum qeth_link_types link_type;
4a71df50
FB
672 int broadcast_capable;
673 int unique_id;
c70eb09d 674 bool layer_enforced;
4a71df50 675 struct qeth_card_blkt blkt;
4a71df50 676 enum qeth_ipa_promisc_modes promisc_mode;
1da74b1c
FB
677 __u32 diagass_support;
678 __u32 hwtrap;
4a71df50
FB
679};
680
4fda3354
JW
681enum qeth_discipline_id {
682 QETH_DISCIPLINE_UNDETERMINED = -1,
683 QETH_DISCIPLINE_LAYER3 = 0,
684 QETH_DISCIPLINE_LAYER2 = 1,
685};
686
4a71df50
FB
687struct qeth_card_options {
688 struct qeth_routing_info route4;
689 struct qeth_ipa_info ipa4;
690 struct qeth_ipa_info adp; /*Adapter parameters*/
691 struct qeth_routing_info route6;
692 struct qeth_ipa_info ipa6;
b4d72c08 693 struct qeth_sbp_info sbp; /* SETBRIDGEPORT options */
a45b3faf 694 struct qeth_vnicc_info vnicc; /* VNICC options */
4a71df50 695 int fake_broadcast;
4fda3354 696 enum qeth_discipline_id layer;
4a71df50 697 int rx_sg_cb;
d64ecc22 698 enum qeth_ipa_isolation_modes isolation;
0f54761d 699 enum qeth_ipa_isolation_modes prev_isolation;
76b11f8e 700 int sniffer;
0da9581d 701 enum qeth_cq cq;
b3332930 702 char hsuid[9];
4a71df50
FB
703};
704
4fda3354
JW
705#define IS_LAYER2(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER2)
706#define IS_LAYER3(card) ((card)->options.layer == QETH_DISCIPLINE_LAYER3)
707
4a71df50
FB
708/*
709 * thread bits for qeth_card thread masks
710 */
711enum qeth_threads {
712 QETH_RECOVER_THREAD = 1,
713};
714
715struct qeth_osn_info {
716 int (*assist_cb)(struct net_device *dev, void *data);
717 int (*data_cb)(struct sk_buff *skb);
718};
719
4a71df50 720struct qeth_discipline {
2d2ebb3e 721 const struct device_type *devtype;
d73ef324 722 int (*process_rx_buffer)(struct qeth_card *card, int budget, int *done);
4a71df50 723 int (*recover)(void *ptr);
c041f2d4
SO
724 int (*setup) (struct ccwgroup_device *);
725 void (*remove) (struct ccwgroup_device *);
726 int (*set_online) (struct ccwgroup_device *);
727 int (*set_offline) (struct ccwgroup_device *);
c041f2d4
SO
728 int (*freeze)(struct ccwgroup_device *);
729 int (*thaw) (struct ccwgroup_device *);
730 int (*restore)(struct ccwgroup_device *);
942d6984 731 int (*do_ioctl)(struct net_device *dev, struct ifreq *rq, int cmd);
c044dc21
EC
732 int (*control_event_handler)(struct qeth_card *card,
733 struct qeth_ipa_cmd *cmd);
4a71df50
FB
734};
735
5f78e29c
LD
736enum qeth_addr_disposition {
737 QETH_DISP_ADDR_DELETE = 0,
738 QETH_DISP_ADDR_DO_NOTHING = 1,
739 QETH_DISP_ADDR_ADD = 2,
4a71df50
FB
740};
741
a1c3ed4c
FB
742struct qeth_rx {
743 int b_count;
744 int b_index;
745 struct qdio_buffer_element *b_element;
746 int e_offset;
747 int qdio_err;
748};
749
02d5cb5b
EC
750struct carrier_info {
751 __u8 card_type;
752 __u16 port_mode;
753 __u32 port_speed;
754};
755
45cbb2e4
SR
756struct qeth_switch_info {
757 __u32 capabilities;
758 __u32 settings;
759};
760
6541aa52 761#define QETH_NAPI_WEIGHT NAPI_POLL_WEIGHT
a1c3ed4c 762
4a71df50 763struct qeth_card {
4a71df50 764 enum qeth_card_states state;
4a71df50
FB
765 spinlock_t lock;
766 struct ccwgroup_device *gdev;
767 struct qeth_channel read;
768 struct qeth_channel write;
769 struct qeth_channel data;
770
771 struct net_device *dev;
b0abc4f5 772 struct qeth_card_stats stats;
4a71df50
FB
773 struct qeth_card_info info;
774 struct qeth_token token;
775 struct qeth_seqno seqno;
776 struct qeth_card_options options;
777
c0a2e4d1 778 struct workqueue_struct *event_wq;
7686e4b6 779 struct workqueue_struct *cmd_wq;
4a71df50 780 wait_queue_head_t wait_q;
7ff0bcf6 781 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
fe5c8028 782 DECLARE_HASHTABLE(mac_htable, 4);
5f78e29c 783 DECLARE_HASHTABLE(ip_htable, 4);
df2a2a52 784 struct mutex ip_lock;
5f78e29c 785 DECLARE_HASHTABLE(ip_mc_htable, 4);
d0c74825 786 struct work_struct rx_mode_work;
4a71df50
FB
787 struct work_struct kernel_thread_starter;
788 spinlock_t thread_mask_lock;
789 unsigned long thread_start_mask;
790 unsigned long thread_allowed_mask;
791 unsigned long thread_running_mask;
4a71df50
FB
792 struct qeth_ipato ipato;
793 struct list_head cmd_waiter_list;
794 /* QDIO buffer handling */
795 struct qeth_qdio_info qdio;
908abbb5 796 int read_or_write_problem;
4a71df50 797 struct qeth_osn_info osn_info;
c041f2d4 798 struct qeth_discipline *discipline;
4a71df50 799 atomic_t force_alloc_skb;
6bcac508 800 struct service_level qeth_service_level;
76b11f8e 801 struct qdio_ssqd_desc ssqd;
af039068 802 debug_info_t *debug;
c4949f07 803 struct mutex conf_mutex;
9dc48ccc 804 struct mutex discipline_mutex;
a1c3ed4c
FB
805 struct napi_struct napi;
806 struct qeth_rx rx;
b3332930
FB
807 struct delayed_work buffer_reclaim_work;
808 int reclaim_index;
0f54761d 809 struct work_struct close_dev_work;
4a71df50
FB
810};
811
0f7aedbd
JW
812static inline bool qeth_card_hw_is_reachable(struct qeth_card *card)
813{
814 return card->state == CARD_STATE_SOFTSETUP;
815}
816
1da74b1c
FB
817struct qeth_trap_id {
818 __u16 lparnr;
819 char vmname[8];
820 __u8 chpid;
821 __u8 ssid;
822 __u16 devno;
823} __packed;
824
4a71df50
FB
825/*some helper functions*/
826#define QETH_CARD_IFNAME(card) (((card)->dev)? (card)->dev->name : "")
827
30356d08
JW
828static inline bool qeth_netdev_is_registered(struct net_device *dev)
829{
830 return dev->netdev_ops != NULL;
831}
832
3a18d754
JW
833static inline u16 qeth_iqd_translate_txq(struct net_device *dev, u16 txq)
834{
835 if (txq == QETH_IQD_MCAST_TXQ)
836 return dev->num_tx_queues - 1;
837 if (txq == dev->num_tx_queues - 1)
838 return QETH_IQD_MCAST_TXQ;
839 return txq;
840}
841
ce28867f
JW
842static inline void qeth_scrub_qdio_buffer(struct qdio_buffer *buf,
843 unsigned int elements)
844{
845 unsigned int i;
846
847 for (i = 0; i < elements; i++)
848 memset(&buf->element[i], 0, sizeof(struct qdio_buffer_element));
849 buf->element[14].sflags = 0;
850 buf->element[15].sflags = 0;
851}
852
2863c613
EC
853/**
854 * qeth_get_elements_for_range() - find number of SBALEs to cover range.
855 * @start: Start of the address range.
856 * @end: Address after the end of the range.
857 *
858 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
859 * the specified address range.
860 */
861static inline int qeth_get_elements_for_range(addr_t start, addr_t end)
862{
89271c65 863 return PFN_UP(end) - PFN_DOWN(start);
2863c613
EC
864}
865
4a71df50
FB
866static inline int qeth_get_ip_version(struct sk_buff *skb)
867{
19e36da6
JW
868 struct vlan_ethhdr *veth = vlan_eth_hdr(skb);
869 __be16 prot = veth->h_vlan_proto;
a9baf10a 870
19e36da6
JW
871 if (prot == htons(ETH_P_8021Q))
872 prot = veth->h_vlan_encapsulated_proto;
873
874 switch (prot) {
875 case htons(ETH_P_IPV6):
4a71df50 876 return 6;
19e36da6 877 case htons(ETH_P_IP):
4a71df50
FB
878 return 4;
879 default:
880 return 0;
881 }
882}
883
58aa2491
JW
884static inline int qeth_get_ether_cast_type(struct sk_buff *skb)
885{
886 u8 *addr = eth_hdr(skb)->h_dest;
887
888 if (is_multicast_ether_addr(addr))
889 return is_broadcast_ether_addr(addr) ? RTN_BROADCAST :
890 RTN_MULTICAST;
891 return RTN_UNICAST;
892}
893
6195b936
JW
894static inline void qeth_rx_csum(struct qeth_card *card, struct sk_buff *skb,
895 u8 flags)
896{
897 if ((card->dev->features & NETIF_F_RXCSUM) &&
3aade31b 898 (flags & QETH_HDR_EXT_CSUM_TRANSP_REQ)) {
6195b936 899 skb->ip_summed = CHECKSUM_UNNECESSARY;
b0abc4f5 900 QETH_CARD_STAT_INC(card, rx_skb_csum);
3aade31b 901 } else {
6195b936 902 skb->ip_summed = CHECKSUM_NONE;
3aade31b 903 }
6195b936
JW
904}
905
571f9dd8 906static inline void qeth_tx_csum(struct sk_buff *skb, u8 *flags, int ipv)
6195b936
JW
907{
908 *flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ;
571f9dd8
KM
909 if ((ipv == 4 && ip_hdr(skb)->protocol == IPPROTO_UDP) ||
910 (ipv == 6 && ipv6_hdr(skb)->nexthdr == IPPROTO_UDP))
6195b936 911 *flags |= QETH_HDR_EXT_UDP;
6195b936
JW
912}
913
f90b744e
FB
914static inline void qeth_put_buffer_pool_entry(struct qeth_card *card,
915 struct qeth_buffer_pool_entry *entry)
916{
917 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
918}
919
1da74b1c
FB
920static inline int qeth_is_diagass_supported(struct qeth_card *card,
921 enum qeth_diags_cmds cmd)
922{
923 return card->info.diagass_support & (__u32)cmd;
924}
925
a8155b00
KM
926int qeth_send_simple_setassparms_prot(struct qeth_card *card,
927 enum qeth_ipa_funcs ipa_func,
928 u16 cmd_code, long data,
929 enum qeth_prot_versions prot);
930/* IPv4 variant */
931static inline int qeth_send_simple_setassparms(struct qeth_card *card,
932 enum qeth_ipa_funcs ipa_func,
933 u16 cmd_code, long data)
934{
935 return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code,
936 data, QETH_PROT_IPV4);
937}
938
939static inline int qeth_send_simple_setassparms_v6(struct qeth_card *card,
940 enum qeth_ipa_funcs ipa_func,
941 u16 cmd_code, long data)
942{
943 return qeth_send_simple_setassparms_prot(card, ipa_func, cmd_code,
944 data, QETH_PROT_IPV6);
945}
946
73dc2daf 947int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb);
86c0cdb9 948
c041f2d4
SO
949extern struct qeth_discipline qeth_l2_discipline;
950extern struct qeth_discipline qeth_l3_discipline;
d896ac62
JW
951extern const struct ethtool_ops qeth_ethtool_ops;
952extern const struct ethtool_ops qeth_osn_ethtool_ops;
b7169c51
SO
953extern const struct attribute_group *qeth_generic_attr_groups[];
954extern const struct attribute_group *qeth_osn_attr_groups[];
2d2ebb3e
JW
955extern const struct attribute_group qeth_device_attr_group;
956extern const struct attribute_group qeth_device_blkt_group;
957extern const struct device_type qeth_generic_devtype;
b7169c51 958
4a71df50
FB
959const char *qeth_get_cardname_short(struct qeth_card *);
960int qeth_realloc_buffer_pool(struct qeth_card *, int);
961int qeth_core_load_discipline(struct qeth_card *, enum qeth_discipline_id);
962void qeth_core_free_discipline(struct qeth_card *);
4a71df50
FB
963
964/* exports for qeth discipline device drivers */
683d718a 965extern struct kmem_cache *qeth_core_header_cache;
d11ba0c4 966extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS];
4a71df50 967
d3d1b205 968struct net_device *qeth_clone_netdev(struct net_device *orig);
d7d18da1 969struct qeth_card *qeth_get_card_by_busid(char *bus_id);
4a71df50
FB
970void qeth_set_allowed_threads(struct qeth_card *, unsigned long , int);
971int qeth_threads_running(struct qeth_card *, unsigned long);
4a71df50
FB
972int qeth_do_run_thread(struct qeth_card *, unsigned long);
973void qeth_clear_thread_start_bit(struct qeth_card *, unsigned long);
974void qeth_clear_thread_running_bit(struct qeth_card *, unsigned long);
9fae5c3b 975int qeth_core_hardsetup_card(struct qeth_card *card, bool *carrier_ok);
4a71df50
FB
976void qeth_print_status_message(struct qeth_card *);
977int qeth_init_qdio_queues(struct qeth_card *);
4a71df50
FB
978int qeth_send_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *,
979 int (*reply_cb)
980 (struct qeth_card *, struct qeth_reply *, unsigned long),
981 void *);
982struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *,
983 enum qeth_ipa_cmds, enum qeth_prot_versions);
4a71df50 984struct sk_buff *qeth_core_get_next_skb(struct qeth_card *,
b3332930 985 struct qeth_qdio_buffer *, struct qdio_buffer_element **, int *,
4a71df50
FB
986 struct qeth_hdr **);
987void qeth_schedule_recovery(struct qeth_card *);
d73ef324 988int qeth_poll(struct napi_struct *napi, int budget);
4a71df50
FB
989void qeth_clear_ipacmd_list(struct qeth_card *);
990int qeth_qdio_clear_card(struct qeth_card *, int);
991void qeth_clear_working_pool_list(struct qeth_card *);
992void qeth_clear_cmd_buffers(struct qeth_channel *);
41c47da3 993void qeth_drain_output_queues(struct qeth_card *card);
4a71df50 994void qeth_setadp_promisc_mode(struct qeth_card *);
4a71df50
FB
995int qeth_setadpparms_change_macaddr(struct qeth_card *);
996void qeth_tx_timeout(struct net_device *);
4a71df50 997void qeth_release_buffer(struct qeth_channel *, struct qeth_cmd_buffer *);
c2153277
JW
998void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
999 u16 cmd_length);
4a71df50 1000struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *);
45cbb2e4
SR
1001int qeth_query_switch_attributes(struct qeth_card *card,
1002 struct qeth_switch_info *sw_info);
d896ac62
JW
1003int qeth_query_card_info(struct qeth_card *card,
1004 struct carrier_info *carrier_info);
40e6a225 1005unsigned int qeth_count_elements(struct sk_buff *skb, unsigned int data_offset);
13ddacb5
JW
1006int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
1007 struct sk_buff *skb, struct qeth_hdr *hdr,
e878c5e6
JR
1008 unsigned int offset, unsigned int hd_len,
1009 int elements_needed);
942d6984 1010int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
8e96c51c 1011void qeth_dbf_longtext(debug_info_t *id, int level, char *text, ...);
0f54761d 1012int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback);
0da9581d 1013int qeth_configure_cq(struct qeth_card *, enum qeth_cq);
1da74b1c 1014int qeth_hw_trap(struct qeth_card *, enum qeth_diags_trap_action);
395672e0 1015void qeth_trace_features(struct qeth_card *);
8f43fb00 1016int qeth_setassparms_cb(struct qeth_card *, struct qeth_reply *, unsigned long);
b475e316
TR
1017struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *,
1018 enum qeth_ipa_funcs,
1019 __u16, __u16,
1020 enum qeth_prot_versions);
8f43fb00 1021int qeth_set_features(struct net_device *, netdev_features_t);
d025da9e 1022void qeth_enable_hw_features(struct net_device *dev);
8f43fb00 1023netdev_features_t qeth_fix_features(struct net_device *, netdev_features_t);
6d69b1f1
JW
1024netdev_features_t qeth_features_check(struct sk_buff *skb,
1025 struct net_device *dev,
1026 netdev_features_t features);
b0abc4f5 1027void qeth_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats);
3a18d754
JW
1028u16 qeth_iqd_select_queue(struct net_device *dev, struct sk_buff *skb,
1029 u8 cast_type, struct net_device *sb_dev);
e22355ea
JW
1030int qeth_open(struct net_device *dev);
1031int qeth_stop(struct net_device *dev);
1032
ec61bd2f 1033int qeth_vm_request_mac(struct qeth_card *card);
fc69660b
JW
1034int qeth_xmit(struct qeth_card *card, struct sk_buff *skb,
1035 struct qeth_qdio_out_q *queue, int ipv, int cast_type,
b0abc4f5
JW
1036 void (*fill_header)(struct qeth_qdio_out_q *queue,
1037 struct qeth_hdr *hdr, struct sk_buff *skb,
1038 int ipv, int cast_type,
fc69660b 1039 unsigned int data_len));
4a71df50
FB
1040
1041/* exports for OSN */
1042int qeth_osn_assist(struct net_device *, void *, int);
1043int qeth_osn_register(unsigned char *read_dev_no, struct net_device **,
1044 int (*assist_cb)(struct net_device *, void *),
1045 int (*data_cb)(struct sk_buff *));
1046void qeth_osn_deregister(struct net_device *);
1047
1048#endif /* __QETH_CORE_H__ */