Merge branches 'amd-iommu/fixes' and 'dma-debug/fixes' into iommu/fixes
[linux-2.6-block.git] / drivers / s390 / cio / qdio.h
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1/*
2 * linux/drivers/s390/cio/qdio.h
3 *
3f09bb89 4 * Copyright 2000,2009 IBM Corp.
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5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 */
1da177e4
LT
8#ifndef _CIO_QDIO_H
9#define _CIO_QDIO_H
10
0b642ede 11#include <asm/page.h>
9d92a7e1 12#include <asm/schid.h>
22f99347 13#include <asm/debug.h>
779e6e1c 14#include "chsc.h"
a8237fc4 15
779e6e1c 16#define QDIO_BUSY_BIT_PATIENCE 100 /* 100 microseconds */
779e6e1c 17#define QDIO_INPUT_THRESHOLD 500 /* 500 microseconds */
1da177e4 18
4bcb3a37
UB
19/*
20 * if an asynchronous HiperSockets queue runs full, the 10 seconds timer wait
21 * till next initiative to give transmitted skbs back to the stack is too long.
22 * Therefore polling is started in case of multicast queue is filled more
23 * than 50 percent.
24 */
25#define QDIO_IQDIO_POLL_LVL 65 /* HS multicast queue */
26
1da177e4
LT
27enum qdio_irq_states {
28 QDIO_IRQ_STATE_INACTIVE,
29 QDIO_IRQ_STATE_ESTABLISHED,
30 QDIO_IRQ_STATE_ACTIVE,
31 QDIO_IRQ_STATE_STOPPED,
32 QDIO_IRQ_STATE_CLEANUP,
33 QDIO_IRQ_STATE_ERR,
34 NR_QDIO_IRQ_STATES,
35};
36
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37/* used as intparm in do_IO */
38#define QDIO_DOING_ESTABLISH 1
39#define QDIO_DOING_ACTIVATE 2
40#define QDIO_DOING_CLEANUP 3
41
42#define SLSB_STATE_NOT_INIT 0x0
43#define SLSB_STATE_EMPTY 0x1
44#define SLSB_STATE_PRIMED 0x2
45#define SLSB_STATE_HALTED 0xe
46#define SLSB_STATE_ERROR 0xf
47#define SLSB_TYPE_INPUT 0x0
48#define SLSB_TYPE_OUTPUT 0x20
49#define SLSB_OWNER_PROG 0x80
50#define SLSB_OWNER_CU 0x40
51
52#define SLSB_P_INPUT_NOT_INIT \
53 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT) /* 0x80 */
54#define SLSB_P_INPUT_ACK \
55 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x81 */
56#define SLSB_CU_INPUT_EMPTY \
57 (SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x41 */
58#define SLSB_P_INPUT_PRIMED \
59 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED) /* 0x82 */
60#define SLSB_P_INPUT_HALTED \
61 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED) /* 0x8e */
62#define SLSB_P_INPUT_ERROR \
63 (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR) /* 0x8f */
64#define SLSB_P_OUTPUT_NOT_INIT \
65 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */
66#define SLSB_P_OUTPUT_EMPTY \
67 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY) /* 0xa1 */
68#define SLSB_CU_OUTPUT_PRIMED \
69 (SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED) /* 0x62 */
70#define SLSB_P_OUTPUT_HALTED \
71 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED) /* 0xae */
72#define SLSB_P_OUTPUT_ERROR \
73 (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR) /* 0xaf */
74
75#define SLSB_ERROR_DURING_LOOKUP 0xff
76
77/* additional CIWs returned by extended Sense-ID */
78#define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */
79#define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */
1da177e4 80
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81/* flags for st qdio sch data */
82#define CHSC_FLAG_QDIO_CAPABILITY 0x80
83#define CHSC_FLAG_VALIDITY 0x40
84
85/* qdio adapter-characteristics-1 flag */
86#define AC1_SIGA_INPUT_NEEDED 0x40 /* process input queues */
87#define AC1_SIGA_OUTPUT_NEEDED 0x20 /* process output queues */
88#define AC1_SIGA_SYNC_NEEDED 0x10 /* ask hypervisor to sync */
89#define AC1_AUTOMATIC_SYNC_ON_THININT 0x08 /* set by hypervisor */
90#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI 0x04 /* set by hypervisor */
91#define AC1_SC_QEBSM_AVAILABLE 0x02 /* available for subchannel */
92#define AC1_SC_QEBSM_ENABLED 0x01 /* enabled for subchannel */
1da177e4 93
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94#ifdef CONFIG_64BIT
95static inline int do_sqbs(u64 token, unsigned char state, int queue,
96 int *start, int *count)
97{
98 register unsigned long _ccq asm ("0") = *count;
99 register unsigned long _token asm ("1") = token;
100 unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
1da177e4 101
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102 asm volatile(
103 " .insn rsy,0xeb000000008A,%1,0,0(%2)"
104 : "+d" (_ccq), "+d" (_queuestart)
105 : "d" ((unsigned long)state), "d" (_token)
106 : "memory", "cc");
107 *count = _ccq & 0xff;
108 *start = _queuestart & 0xff;
8129ee16 109
779e6e1c 110 return (_ccq >> 32) & 0xff;
8129ee16
FP
111}
112
779e6e1c 113static inline int do_eqbs(u64 token, unsigned char *state, int queue,
50f769df 114 int *start, int *count, int ack)
8129ee16 115{
8129ee16 116 register unsigned long _ccq asm ("0") = *count;
779e6e1c 117 register unsigned long _token asm ("1") = token;
8129ee16 118 unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
50f769df 119 unsigned long _state = (unsigned long)ack << 63;
8129ee16 120
94c12cc7
MS
121 asm volatile(
122 " .insn rrf,0xB99c0000,%1,%2,0,0"
123 : "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
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124 : "d" (_token)
125 : "memory", "cc");
8129ee16
FP
126 *count = _ccq & 0xff;
127 *start = _queuestart & 0xff;
128 *state = _state & 0xff;
129
130 return (_ccq >> 32) & 0xff;
1da177e4 131}
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132#else
133static inline int do_sqbs(u64 token, unsigned char state, int queue,
134 int *start, int *count) { return 0; }
135static inline int do_eqbs(u64 token, unsigned char *state, int queue,
50f769df 136 int *start, int *count, int ack) { return 0; }
779e6e1c 137#endif /* CONFIG_64BIT */
1da177e4 138
779e6e1c 139struct qdio_irq;
1da177e4 140
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141struct siga_flag {
142 u8 input:1;
143 u8 output:1;
144 u8 sync:1;
145 u8 no_sync_ti:1;
146 u8 no_sync_out_ti:1;
147 u8 no_sync_out_pci:1;
148 u8:2;
149} __attribute__ ((packed));
1da177e4 150
779e6e1c 151struct chsc_ssqd_area {
e1776856 152 struct chsc_header request;
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153 u16:10;
154 u8 ssid:2;
155 u8 fmt:4;
e1776856 156 u16 first_sch;
779e6e1c 157 u16:16;
e1776856 158 u16 last_sch;
779e6e1c 159 u32:32;
e1776856 160 struct chsc_header response;
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161 u32:32;
162 struct qdio_ssqd_desc qdio_ssqd;
163} __attribute__ ((packed));
e1776856 164
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165struct scssc_area {
166 struct chsc_header request;
167 u16 operation_code;
168 u16:16;
169 u32:32;
170 u32:32;
171 u64 summary_indicator_addr;
172 u64 subchannel_indicator_addr;
173 u32 ks:4;
174 u32 kc:4;
175 u32:21;
176 u32 isc:3;
177 u32 word_with_d_bit;
178 u32:32;
179 struct subchannel_id schid;
180 u32 reserved[1004];
181 struct chsc_header response;
182 u32:32;
183} __attribute__ ((packed));
184
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185struct qdio_dev_perf_stat {
186 unsigned int adapter_int;
187 unsigned int qdio_int;
188 unsigned int pci_request_int;
189
190 unsigned int tasklet_inbound;
191 unsigned int tasklet_inbound_resched;
192 unsigned int tasklet_inbound_resched2;
193 unsigned int tasklet_outbound;
194
195 unsigned int siga_read;
196 unsigned int siga_write;
197 unsigned int siga_sync;
198
199 unsigned int inbound_call;
200 unsigned int inbound_handler;
201 unsigned int stop_polling;
202 unsigned int inbound_queue_full;
203 unsigned int outbound_call;
204 unsigned int outbound_handler;
205 unsigned int fast_requeue;
206 unsigned int target_full;
207 unsigned int eqbs;
208 unsigned int eqbs_partial;
209 unsigned int sqbs;
210 unsigned int sqbs_partial;
211};
212
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213struct qdio_input_q {
214 /* input buffer acknowledgement flag */
215 int polling;
216
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217 /* first ACK'ed buffer */
218 int ack_start;
219
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220 /* how much sbals are acknowledged with qebsm */
221 int ack_count;
222
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223 /* last time of noticing incoming data */
224 u64 timestamp;
1da177e4 225};
1da177e4 226
779e6e1c 227struct qdio_output_q {
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228 /* PCIs are enabled for the queue */
229 int pci_out_enabled;
1da177e4 230
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KDW
231 /* IQDIO: output multiple buffers (enhanced SIGA) */
232 int use_enh_siga;
233
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234 /* timer to check for more outbound work */
235 struct timer_list timer;
236};
1da177e4 237
1da177e4 238struct qdio_q {
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239 struct slsb slsb;
240 union {
241 struct qdio_input_q in;
242 struct qdio_output_q out;
243 } u;
1da177e4 244
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245 /* queue number */
246 int nr;
1da177e4 247
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248 /* bitmask of queue number */
249 int mask;
1da177e4 250
779e6e1c 251 /* input or output queue */
1da177e4 252 int is_input_q;
1da177e4 253
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254 /* list of thinint input queues */
255 struct list_head entry;
1da177e4 256
779e6e1c 257 /* upper-layer program handler */
1da177e4
LT
258 qdio_handler_t (*handler);
259
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260 /*
261 * inbound: next buffer the program should check for
262 * outbound: next buffer to check for having been processed
263 * by the card
264 */
265 int first_to_check;
1da177e4 266
779e6e1c 267 /* first_to_check of the last time */
e85dea0e 268 int last_move;
1da177e4 269
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270 /* beginning position for calling the program */
271 int first_to_kick;
1da177e4 272
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273 /* number of buffers in use by the adapter */
274 atomic_t nr_buf_used;
1da177e4 275
779e6e1c 276 struct qdio_irq *irq_ptr;
3f09bb89 277 struct dentry *debugfs_q;
1da177e4 278 struct tasklet_struct tasklet;
1da177e4 279
779e6e1c 280 /* error condition during a data transfer */
1da177e4 281 unsigned int qdio_error;
1da177e4
LT
282
283 struct sl *sl;
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284 struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q];
285
286 /*
287 * Warning: Leave this member at the end so it won't be cleared in
288 * qdio_fill_qs. A page is allocated under this pointer and used for
289 * slib and sl. slib is 2048 bytes big and sl points to offset
290 * PAGE_SIZE / 2.
291 */
292 struct slib *slib;
1da177e4
LT
293} __attribute__ ((aligned(256)));
294
295struct qdio_irq {
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296 struct qib qib;
297 u32 *dsci; /* address of device state change indicator */
298 struct ccw_device *cdev;
3f09bb89 299 struct dentry *debugfs_dev;
6486cda6 300 struct dentry *debugfs_perf;
1da177e4
LT
301
302 unsigned long int_parm;
a8237fc4 303 struct subchannel_id schid;
779e6e1c 304 unsigned long sch_token; /* QEBSM facility */
8129ee16 305
1da177e4
LT
306 enum qdio_irq_states state;
307
779e6e1c 308 struct siga_flag siga_flag; /* siga sync information from qdioac */
1da177e4 309
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310 int nr_input_qs;
311 int nr_output_qs;
1da177e4
LT
312
313 struct ccw1 ccw;
1da177e4
LT
314 struct ciw equeue;
315 struct ciw aqueue;
316
779e6e1c 317 struct qdio_ssqd_desc ssqd_desc;
779e6e1c 318 void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
1da177e4 319
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320 struct qdio_dev_perf_stat perf_stat;
321 int perf_stat_enabled;
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322 /*
323 * Warning: Leave these members together at the end so they won't be
324 * cleared in qdio_setup_irq.
325 */
1da177e4 326 struct qdr *qdr;
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327 unsigned long chsc_page;
328
1da177e4
LT
329 struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
330 struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
779e6e1c 331
22f99347 332 debug_info_t *debug_area;
779e6e1c 333 struct mutex setup_mutex;
1da177e4 334};
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335
336/* helper functions */
337#define queue_type(q) q->irq_ptr->qib.qfmt
22f99347 338#define SCH_NO(q) (q->irq_ptr->schid.sch_no)
779e6e1c
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339
340#define is_thinint_irq(irq) \
341 (irq->qib.qfmt == QDIO_IQDIO_QFMT || \
342 css_general_characteristics.aif_osa)
343
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JG
344#define qperf(qdev,attr) qdev->perf_stat.attr
345#define qperf_inc(q,attr) if (q->irq_ptr->perf_stat_enabled) \
346 q->irq_ptr->perf_stat.attr++
347
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348/* the highest iqdio queue is used for multicast */
349static inline int multicast_outbound(struct qdio_q *q)
350{
351 return (q->irq_ptr->nr_output_qs > 1) &&
352 (q->nr == q->irq_ptr->nr_output_qs - 1);
353}
354
355static inline unsigned long long get_usecs(void)
356{
357 return monotonic_clock() >> 12;
358}
359
360#define pci_out_supported(q) \
361 (q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
362#define is_qebsm(q) (q->irq_ptr->sch_token != 0)
363
364#define need_siga_sync_thinint(q) (!q->irq_ptr->siga_flag.no_sync_ti)
365#define need_siga_sync_out_thinint(q) (!q->irq_ptr->siga_flag.no_sync_out_ti)
366#define need_siga_in(q) (q->irq_ptr->siga_flag.input)
367#define need_siga_out(q) (q->irq_ptr->siga_flag.output)
368#define need_siga_sync(q) (q->irq_ptr->siga_flag.sync)
369#define siga_syncs_out_pci(q) (q->irq_ptr->siga_flag.no_sync_out_pci)
370
371#define for_each_input_queue(irq_ptr, q, i) \
372 for (i = 0, q = irq_ptr->input_qs[0]; \
373 i < irq_ptr->nr_input_qs; \
374 q = irq_ptr->input_qs[++i])
375#define for_each_output_queue(irq_ptr, q, i) \
376 for (i = 0, q = irq_ptr->output_qs[0]; \
377 i < irq_ptr->nr_output_qs; \
378 q = irq_ptr->output_qs[++i])
379
380#define prev_buf(bufnr) \
381 ((bufnr + QDIO_MAX_BUFFERS_MASK) & QDIO_MAX_BUFFERS_MASK)
382#define next_buf(bufnr) \
383 ((bufnr + 1) & QDIO_MAX_BUFFERS_MASK)
384#define add_buf(bufnr, inc) \
385 ((bufnr + inc) & QDIO_MAX_BUFFERS_MASK)
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386#define sub_buf(bufnr, dec) \
387 ((bufnr - dec) & QDIO_MAX_BUFFERS_MASK)
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388
389/* prototypes for thin interrupt */
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390void qdio_setup_thinint(struct qdio_irq *irq_ptr);
391int qdio_establish_thinint(struct qdio_irq *irq_ptr);
392void qdio_shutdown_thinint(struct qdio_irq *irq_ptr);
393void tiqdio_add_input_queues(struct qdio_irq *irq_ptr);
394void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr);
395void tiqdio_inbound_processing(unsigned long q);
396int tiqdio_allocate_memory(void);
397void tiqdio_free_memory(void);
398int tiqdio_register_thinints(void);
399void tiqdio_unregister_thinints(void);
400
401/* prototypes for setup */
402void qdio_inbound_processing(unsigned long data);
403void qdio_outbound_processing(unsigned long data);
404void qdio_outbound_timer(unsigned long data);
405void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
406 struct irb *irb);
407int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs,
408 int nr_output_qs);
409void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr);
bbd50e17
JG
410int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
411 struct subchannel_id *schid,
412 struct qdio_ssqd_desc *data);
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413int qdio_setup_irq(struct qdio_initialize *init_data);
414void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
415 struct ccw_device *cdev);
416void qdio_release_memory(struct qdio_irq *irq_ptr);
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417int qdio_setup_create_sysfs(struct ccw_device *cdev);
418void qdio_setup_destroy_sysfs(struct ccw_device *cdev);
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419int qdio_setup_init(void);
420void qdio_setup_exit(void);
421
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422int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
423 unsigned char *state);
779e6e1c 424#endif /* _CIO_QDIO_H */