Commit | Line | Data |
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724117b7 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
dcbd16d5 | 3 | * driver for channel subsystem |
1da177e4 | 4 | * |
34aec07c | 5 | * Copyright IBM Corp. 2002, 2010 |
dcbd16d5 SO |
6 | * |
7 | * Author(s): Arnd Bergmann (arndb@de.ibm.com) | |
8 | * Cornelia Huck (cornelia.huck@de.ibm.com) | |
1da177e4 | 9 | */ |
e6d5a428 ME |
10 | |
11 | #define KMSG_COMPONENT "cio" | |
12 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
13 | ||
a00f761f | 14 | #include <linux/export.h> |
1da177e4 LT |
15 | #include <linux/init.h> |
16 | #include <linux/device.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/list.h> | |
a55360df | 20 | #include <linux/reboot.h> |
879acca5 | 21 | #include <linux/proc_fs.h> |
bb99332a HP |
22 | #include <linux/genalloc.h> |
23 | #include <linux/dma-mapping.h> | |
3a3fc29a | 24 | #include <asm/isc.h> |
f5daba1d | 25 | #include <asm/crw.h> |
1da177e4 LT |
26 | |
27 | #include "css.h" | |
28 | #include "cio.h" | |
d4f5d79e | 29 | #include "blacklist.h" |
1da177e4 LT |
30 | #include "cio_debug.h" |
31 | #include "ioasm.h" | |
32 | #include "chsc.h" | |
40154b82 | 33 | #include "device.h" |
83b3370c | 34 | #include "idset.h" |
7ad6a249 | 35 | #include "chp.h" |
1da177e4 | 36 | |
1da177e4 | 37 | int css_init_done = 0; |
b0a285d3 | 38 | int max_ssid; |
1da177e4 | 39 | |
98cc43ab SO |
40 | #define MAX_CSS_IDX 0 |
41 | struct channel_subsystem *channel_subsystems[MAX_CSS_IDX + 1]; | |
3041b6ab | 42 | static struct bus_type css_bus_type; |
1da177e4 | 43 | |
4d284cac | 44 | int |
f97a56fb CH |
45 | for_each_subchannel(int(*fn)(struct subchannel_id, void *), void *data) |
46 | { | |
47 | struct subchannel_id schid; | |
48 | int ret; | |
49 | ||
50 | init_subchannel_id(&schid); | |
f97a56fb | 51 | do { |
fb6958a5 CH |
52 | do { |
53 | ret = fn(schid, data); | |
54 | if (ret) | |
55 | break; | |
56 | } while (schid.sch_no++ < __MAX_SUBCHANNEL); | |
57 | schid.sch_no = 0; | |
58 | } while (schid.ssid++ < max_ssid); | |
f97a56fb CH |
59 | return ret; |
60 | } | |
61 | ||
e82a1567 PO |
62 | struct cb_data { |
63 | void *data; | |
64 | struct idset *set; | |
65 | int (*fn_known_sch)(struct subchannel *, void *); | |
66 | int (*fn_unknown_sch)(struct subchannel_id, void *); | |
67 | }; | |
68 | ||
69 | static int call_fn_known_sch(struct device *dev, void *data) | |
70 | { | |
71 | struct subchannel *sch = to_subchannel(dev); | |
72 | struct cb_data *cb = data; | |
73 | int rc = 0; | |
74 | ||
47d30674 PO |
75 | if (cb->set) |
76 | idset_sch_del(cb->set, sch->schid); | |
e82a1567 PO |
77 | if (cb->fn_known_sch) |
78 | rc = cb->fn_known_sch(sch, cb->data); | |
79 | return rc; | |
80 | } | |
81 | ||
82 | static int call_fn_unknown_sch(struct subchannel_id schid, void *data) | |
83 | { | |
84 | struct cb_data *cb = data; | |
85 | int rc = 0; | |
86 | ||
87 | if (idset_sch_contains(cb->set, schid)) | |
88 | rc = cb->fn_unknown_sch(schid, cb->data); | |
89 | return rc; | |
90 | } | |
91 | ||
90ac24a5 SO |
92 | static int call_fn_all_sch(struct subchannel_id schid, void *data) |
93 | { | |
94 | struct cb_data *cb = data; | |
95 | struct subchannel *sch; | |
96 | int rc = 0; | |
97 | ||
98 | sch = get_subchannel_by_schid(schid); | |
99 | if (sch) { | |
100 | if (cb->fn_known_sch) | |
101 | rc = cb->fn_known_sch(sch, cb->data); | |
102 | put_device(&sch->dev); | |
103 | } else { | |
104 | if (cb->fn_unknown_sch) | |
105 | rc = cb->fn_unknown_sch(schid, cb->data); | |
106 | } | |
107 | ||
108 | return rc; | |
109 | } | |
110 | ||
e82a1567 PO |
111 | int for_each_subchannel_staged(int (*fn_known)(struct subchannel *, void *), |
112 | int (*fn_unknown)(struct subchannel_id, | |
113 | void *), void *data) | |
114 | { | |
115 | struct cb_data cb; | |
116 | int rc; | |
117 | ||
e82a1567 PO |
118 | cb.data = data; |
119 | cb.fn_known_sch = fn_known; | |
120 | cb.fn_unknown_sch = fn_unknown; | |
90ac24a5 | 121 | |
47d30674 PO |
122 | if (fn_known && !fn_unknown) { |
123 | /* Skip idset allocation in case of known-only loop. */ | |
124 | cb.set = NULL; | |
125 | return bus_for_each_dev(&css_bus_type, NULL, &cb, | |
126 | call_fn_known_sch); | |
127 | } | |
128 | ||
90ac24a5 SO |
129 | cb.set = idset_sch_new(); |
130 | if (!cb.set) | |
131 | /* fall back to brute force scanning in case of oom */ | |
132 | return for_each_subchannel(call_fn_all_sch, &cb); | |
133 | ||
134 | idset_fill(cb.set); | |
135 | ||
e82a1567 PO |
136 | /* Process registered subchannels. */ |
137 | rc = bus_for_each_dev(&css_bus_type, NULL, &cb, call_fn_known_sch); | |
138 | if (rc) | |
139 | goto out; | |
140 | /* Process unregistered subchannels. */ | |
141 | if (fn_unknown) | |
142 | rc = for_each_subchannel(call_fn_unknown_sch, &cb); | |
143 | out: | |
144 | idset_free(cb.set); | |
145 | ||
146 | return rc; | |
147 | } | |
148 | ||
390935ac PO |
149 | static void css_sch_todo(struct work_struct *work); |
150 | ||
b8fa3e90 | 151 | static void css_sch_create_locks(struct subchannel *sch) |
e5dcf002 | 152 | { |
b8fa3e90 | 153 | spin_lock_init(&sch->lock); |
e5dcf002 | 154 | mutex_init(&sch->reg_mutex); |
e5dcf002 SO |
155 | } |
156 | ||
c135ad1c SO |
157 | static void css_subchannel_release(struct device *dev) |
158 | { | |
863fc849 | 159 | struct subchannel *sch = to_subchannel(dev); |
c135ad1c | 160 | |
863fc849 SO |
161 | sch->config.intparm = 0; |
162 | cio_commit_config(sch); | |
ebc3d179 | 163 | kfree(sch->driver_override); |
863fc849 | 164 | kfree(sch); |
c135ad1c SO |
165 | } |
166 | ||
d4f5d79e SO |
167 | static int css_validate_subchannel(struct subchannel_id schid, |
168 | struct schib *schib) | |
169 | { | |
170 | int err; | |
171 | ||
172 | switch (schib->pmcw.st) { | |
173 | case SUBCHANNEL_TYPE_IO: | |
174 | case SUBCHANNEL_TYPE_MSG: | |
175 | if (!css_sch_is_valid(schib)) | |
176 | err = -ENODEV; | |
177 | else if (is_blacklisted(schid.ssid, schib->pmcw.dev)) { | |
178 | CIO_MSG_EVENT(6, "Blacklisted device detected " | |
179 | "at devno %04X, subchannel set %x\n", | |
180 | schib->pmcw.dev, schid.ssid); | |
181 | err = -ENODEV; | |
182 | } else | |
183 | err = 0; | |
184 | break; | |
185 | default: | |
186 | err = 0; | |
187 | } | |
188 | if (err) | |
189 | goto out; | |
190 | ||
191 | CIO_MSG_EVENT(4, "Subchannel 0.%x.%04x reports subchannel type %04X\n", | |
192 | schid.ssid, schid.sch_no, schib->pmcw.st); | |
193 | out: | |
194 | return err; | |
195 | } | |
196 | ||
197 | struct subchannel *css_alloc_subchannel(struct subchannel_id schid, | |
198 | struct schib *schib) | |
1da177e4 LT |
199 | { |
200 | struct subchannel *sch; | |
201 | int ret; | |
202 | ||
d4f5d79e | 203 | ret = css_validate_subchannel(schid, schib); |
05b217f4 SO |
204 | if (ret < 0) |
205 | return ERR_PTR(ret); | |
206 | ||
e5dcf002 SO |
207 | sch = kzalloc(sizeof(*sch), GFP_KERNEL | GFP_DMA); |
208 | if (!sch) | |
1da177e4 | 209 | return ERR_PTR(-ENOMEM); |
e5dcf002 | 210 | |
05b217f4 | 211 | sch->schid = schid; |
d4f5d79e SO |
212 | sch->schib = *schib; |
213 | sch->st = schib->pmcw.st; | |
e5dcf002 | 214 | |
b8fa3e90 | 215 | css_sch_create_locks(sch); |
e5dcf002 | 216 | |
390935ac | 217 | INIT_WORK(&sch->todo_work, css_sch_todo); |
c135ad1c | 218 | sch->dev.release = &css_subchannel_release; |
4520a91a | 219 | sch->dev.dma_mask = &sch->dma_mask; |
c135ad1c | 220 | device_initialize(&sch->dev); |
bb99332a | 221 | /* |
4520a91a | 222 | * The physical addresses for some of the dma structures that can |
bb99332a HP |
223 | * belong to a subchannel need to fit 31 bit width (e.g. ccw). |
224 | */ | |
4520a91a JW |
225 | ret = dma_set_coherent_mask(&sch->dev, DMA_BIT_MASK(31)); |
226 | if (ret) | |
b8fa3e90 | 227 | goto err; |
05668e1d HP |
228 | /* |
229 | * But we don't have such restrictions imposed on the stuff that | |
230 | * is handled by the streaming API. | |
231 | */ | |
4520a91a JW |
232 | ret = dma_set_mask(&sch->dev, DMA_BIT_MASK(64)); |
233 | if (ret) | |
b8fa3e90 | 234 | goto err; |
4520a91a | 235 | |
1da177e4 | 236 | return sch; |
e5dcf002 SO |
237 | |
238 | err: | |
239 | kfree(sch); | |
240 | return ERR_PTR(ret); | |
1da177e4 LT |
241 | } |
242 | ||
07c6a338 | 243 | static int css_sch_device_register(struct subchannel *sch) |
6ab4879a CH |
244 | { |
245 | int ret; | |
246 | ||
247 | mutex_lock(&sch->reg_mutex); | |
6ee4fec6 SO |
248 | dev_set_name(&sch->dev, "0.%x.%04x", sch->schid.ssid, |
249 | sch->schid.sch_no); | |
c135ad1c | 250 | ret = device_add(&sch->dev); |
6ab4879a CH |
251 | mutex_unlock(&sch->reg_mutex); |
252 | return ret; | |
253 | } | |
254 | ||
44a1c19e CH |
255 | /** |
256 | * css_sch_device_unregister - unregister a subchannel | |
257 | * @sch: subchannel to be unregistered | |
258 | */ | |
6ab4879a CH |
259 | void css_sch_device_unregister(struct subchannel *sch) |
260 | { | |
261 | mutex_lock(&sch->reg_mutex); | |
ef60cd13 SO |
262 | if (device_is_registered(&sch->dev)) |
263 | device_unregister(&sch->dev); | |
6ab4879a CH |
264 | mutex_unlock(&sch->reg_mutex); |
265 | } | |
44a1c19e | 266 | EXPORT_SYMBOL_GPL(css_sch_device_unregister); |
6ab4879a | 267 | |
7ad6a249 PO |
268 | static void ssd_from_pmcw(struct chsc_ssd_info *ssd, struct pmcw *pmcw) |
269 | { | |
270 | int i; | |
271 | int mask; | |
272 | ||
273 | memset(ssd, 0, sizeof(struct chsc_ssd_info)); | |
274 | ssd->path_mask = pmcw->pim; | |
275 | for (i = 0; i < 8; i++) { | |
276 | mask = 0x80 >> i; | |
277 | if (pmcw->pim & mask) { | |
278 | chp_id_init(&ssd->chpid[i]); | |
279 | ssd->chpid[i].id = pmcw->chpid[i]; | |
280 | } | |
281 | } | |
282 | } | |
283 | ||
284 | static void ssd_register_chpids(struct chsc_ssd_info *ssd) | |
285 | { | |
286 | int i; | |
287 | int mask; | |
288 | ||
289 | for (i = 0; i < 8; i++) { | |
290 | mask = 0x80 >> i; | |
291 | if (ssd->path_mask & mask) | |
87dc8a01 | 292 | chp_new(ssd->chpid[i]); |
7ad6a249 PO |
293 | } |
294 | } | |
295 | ||
296 | void css_update_ssd_info(struct subchannel *sch) | |
297 | { | |
298 | int ret; | |
299 | ||
14556b33 SO |
300 | ret = chsc_get_ssd_info(sch->schid, &sch->ssd_info); |
301 | if (ret) | |
7ad6a249 | 302 | ssd_from_pmcw(&sch->ssd_info, &sch->schib.pmcw); |
14556b33 SO |
303 | |
304 | ssd_register_chpids(&sch->ssd_info); | |
7ad6a249 PO |
305 | } |
306 | ||
7e9db9ea CH |
307 | static ssize_t type_show(struct device *dev, struct device_attribute *attr, |
308 | char *buf) | |
309 | { | |
310 | struct subchannel *sch = to_subchannel(dev); | |
311 | ||
312 | return sprintf(buf, "%01x\n", sch->st); | |
313 | } | |
314 | ||
c828a892 | 315 | static DEVICE_ATTR_RO(type); |
7e9db9ea CH |
316 | |
317 | static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, | |
318 | char *buf) | |
319 | { | |
320 | struct subchannel *sch = to_subchannel(dev); | |
321 | ||
322 | return sprintf(buf, "css:t%01X\n", sch->st); | |
323 | } | |
324 | ||
c828a892 | 325 | static DEVICE_ATTR_RO(modalias); |
7e9db9ea | 326 | |
ebc3d179 CH |
327 | static ssize_t driver_override_store(struct device *dev, |
328 | struct device_attribute *attr, | |
329 | const char *buf, size_t count) | |
330 | { | |
331 | struct subchannel *sch = to_subchannel(dev); | |
1e8ee512 | 332 | int ret; |
ebc3d179 | 333 | |
1e8ee512 KK |
334 | ret = driver_set_override(dev, &sch->driver_override, buf, count); |
335 | if (ret) | |
336 | return ret; | |
ebc3d179 CH |
337 | |
338 | return count; | |
339 | } | |
340 | ||
341 | static ssize_t driver_override_show(struct device *dev, | |
342 | struct device_attribute *attr, char *buf) | |
343 | { | |
344 | struct subchannel *sch = to_subchannel(dev); | |
345 | ssize_t len; | |
346 | ||
347 | device_lock(dev); | |
348 | len = snprintf(buf, PAGE_SIZE, "%s\n", sch->driver_override); | |
349 | device_unlock(dev); | |
350 | return len; | |
351 | } | |
352 | static DEVICE_ATTR_RW(driver_override); | |
353 | ||
7e9db9ea CH |
354 | static struct attribute *subch_attrs[] = { |
355 | &dev_attr_type.attr, | |
356 | &dev_attr_modalias.attr, | |
ebc3d179 | 357 | &dev_attr_driver_override.attr, |
7e9db9ea CH |
358 | NULL, |
359 | }; | |
360 | ||
361 | static struct attribute_group subch_attr_group = { | |
362 | .attrs = subch_attrs, | |
363 | }; | |
364 | ||
a4dbd674 | 365 | static const struct attribute_group *default_subch_attr_groups[] = { |
7e9db9ea CH |
366 | &subch_attr_group, |
367 | NULL, | |
368 | }; | |
369 | ||
36f6237e SO |
370 | static ssize_t chpids_show(struct device *dev, |
371 | struct device_attribute *attr, | |
372 | char *buf) | |
373 | { | |
374 | struct subchannel *sch = to_subchannel(dev); | |
375 | struct chsc_ssd_info *ssd = &sch->ssd_info; | |
376 | ssize_t ret = 0; | |
377 | int mask; | |
378 | int chp; | |
379 | ||
380 | for (chp = 0; chp < 8; chp++) { | |
381 | mask = 0x80 >> chp; | |
382 | if (ssd->path_mask & mask) | |
383 | ret += sprintf(buf + ret, "%02x ", ssd->chpid[chp].id); | |
384 | else | |
385 | ret += sprintf(buf + ret, "00 "); | |
386 | } | |
387 | ret += sprintf(buf + ret, "\n"); | |
388 | return ret; | |
389 | } | |
c828a892 | 390 | static DEVICE_ATTR_RO(chpids); |
36f6237e SO |
391 | |
392 | static ssize_t pimpampom_show(struct device *dev, | |
393 | struct device_attribute *attr, | |
394 | char *buf) | |
395 | { | |
396 | struct subchannel *sch = to_subchannel(dev); | |
397 | struct pmcw *pmcw = &sch->schib.pmcw; | |
398 | ||
399 | return sprintf(buf, "%02x %02x %02x\n", | |
400 | pmcw->pim, pmcw->pam, pmcw->pom); | |
401 | } | |
c828a892 | 402 | static DEVICE_ATTR_RO(pimpampom); |
36f6237e | 403 | |
d3683c05 VV |
404 | static ssize_t dev_busid_show(struct device *dev, |
405 | struct device_attribute *attr, | |
406 | char *buf) | |
407 | { | |
408 | struct subchannel *sch = to_subchannel(dev); | |
409 | struct pmcw *pmcw = &sch->schib.pmcw; | |
410 | ||
a4751f15 VV |
411 | if ((pmcw->st == SUBCHANNEL_TYPE_IO && pmcw->dnv) || |
412 | (pmcw->st == SUBCHANNEL_TYPE_MSG && pmcw->w)) | |
d3683c05 VV |
413 | return sysfs_emit(buf, "0.%x.%04x\n", sch->schid.ssid, |
414 | pmcw->dev); | |
415 | else | |
416 | return sysfs_emit(buf, "none\n"); | |
417 | } | |
418 | static DEVICE_ATTR_RO(dev_busid); | |
419 | ||
36f6237e SO |
420 | static struct attribute *io_subchannel_type_attrs[] = { |
421 | &dev_attr_chpids.attr, | |
422 | &dev_attr_pimpampom.attr, | |
d3683c05 | 423 | &dev_attr_dev_busid.attr, |
36f6237e SO |
424 | NULL, |
425 | }; | |
426 | ATTRIBUTE_GROUPS(io_subchannel_type); | |
427 | ||
428 | static const struct device_type io_subchannel_type = { | |
429 | .groups = io_subchannel_type_groups, | |
430 | }; | |
431 | ||
14556b33 | 432 | int css_register_subchannel(struct subchannel *sch) |
1da177e4 LT |
433 | { |
434 | int ret; | |
435 | ||
436 | /* Initialize the subchannel structure */ | |
7c9f4e3a | 437 | sch->dev.parent = &channel_subsystems[0]->device; |
1da177e4 | 438 | sch->dev.bus = &css_bus_type; |
7e9db9ea | 439 | sch->dev.groups = default_subch_attr_groups; |
36f6237e SO |
440 | |
441 | if (sch->st == SUBCHANNEL_TYPE_IO) | |
442 | sch->dev.type = &io_subchannel_type; | |
443 | ||
7ad6a249 | 444 | css_update_ssd_info(sch); |
1da177e4 | 445 | /* make it known to the system */ |
6ab4879a | 446 | ret = css_sch_device_register(sch); |
7674da77 | 447 | if (ret) { |
e556bbbd CH |
448 | CIO_MSG_EVENT(0, "Could not register sch 0.%x.%04x: %d\n", |
449 | sch->schid.ssid, sch->schid.sch_no, ret); | |
7674da77 CH |
450 | return ret; |
451 | } | |
1da177e4 LT |
452 | return ret; |
453 | } | |
454 | ||
d4f5d79e | 455 | static int css_probe_device(struct subchannel_id schid, struct schib *schib) |
1da177e4 | 456 | { |
1da177e4 | 457 | struct subchannel *sch; |
4e5ebd51 | 458 | int ret; |
1da177e4 | 459 | |
d4f5d79e | 460 | sch = css_alloc_subchannel(schid, schib); |
14556b33 SO |
461 | if (IS_ERR(sch)) |
462 | return PTR_ERR(sch); | |
463 | ||
1da177e4 | 464 | ret = css_register_subchannel(sch); |
863fc849 SO |
465 | if (ret) |
466 | put_device(&sch->dev); | |
467 | ||
1da177e4 LT |
468 | return ret; |
469 | } | |
470 | ||
b0744bd2 | 471 | static int |
418e3ea1 | 472 | check_subchannel(struct device *dev, const void *data) |
b0744bd2 CH |
473 | { |
474 | struct subchannel *sch; | |
418e3ea1 | 475 | struct subchannel_id *schid = (void *)data; |
b0744bd2 CH |
476 | |
477 | sch = to_subchannel(dev); | |
a8237fc4 | 478 | return schid_equal(&sch->schid, schid); |
b0744bd2 CH |
479 | } |
480 | ||
1da177e4 | 481 | struct subchannel * |
a8237fc4 | 482 | get_subchannel_by_schid(struct subchannel_id schid) |
1da177e4 | 483 | { |
1da177e4 LT |
484 | struct device *dev; |
485 | ||
b0744bd2 | 486 | dev = bus_find_device(&css_bus_type, NULL, |
12975aef | 487 | &schid, check_subchannel); |
1da177e4 | 488 | |
b0744bd2 | 489 | return dev ? to_subchannel(dev) : NULL; |
1da177e4 LT |
490 | } |
491 | ||
b279a4f5 CH |
492 | /** |
493 | * css_sch_is_valid() - check if a subchannel is valid | |
494 | * @schib: subchannel information block for the subchannel | |
495 | */ | |
496 | int css_sch_is_valid(struct schib *schib) | |
497 | { | |
498 | if ((schib->pmcw.st == SUBCHANNEL_TYPE_IO) && !schib->pmcw.dnv) | |
499 | return 0; | |
b3a686f4 CH |
500 | if ((schib->pmcw.st == SUBCHANNEL_TYPE_MSG) && !schib->pmcw.w) |
501 | return 0; | |
b279a4f5 CH |
502 | return 1; |
503 | } | |
504 | EXPORT_SYMBOL_GPL(css_sch_is_valid); | |
505 | ||
564337f3 PO |
506 | static int css_evaluate_new_subchannel(struct subchannel_id schid, int slow) |
507 | { | |
508 | struct schib schib; | |
d4f5d79e | 509 | int ccode; |
564337f3 PO |
510 | |
511 | if (!slow) { | |
512 | /* Will be done on the slow path. */ | |
513 | return -EAGAIN; | |
514 | } | |
d4f5d79e SO |
515 | /* |
516 | * The first subchannel that is not-operational (ccode==3) | |
517 | * indicates that there aren't any more devices available. | |
518 | * If stsch gets an exception, it means the current subchannel set | |
519 | * is not valid. | |
520 | */ | |
521 | ccode = stsch(schid, &schib); | |
522 | if (ccode) | |
523 | return (ccode == 3) ? -ENXIO : ccode; | |
564337f3 | 524 | |
d4f5d79e | 525 | return css_probe_device(schid, &schib); |
564337f3 PO |
526 | } |
527 | ||
c820de39 CH |
528 | static int css_evaluate_known_subchannel(struct subchannel *sch, int slow) |
529 | { | |
530 | int ret = 0; | |
531 | ||
532 | if (sch->driver) { | |
533 | if (sch->driver->sch_event) | |
534 | ret = sch->driver->sch_event(sch, slow); | |
535 | else | |
536 | dev_dbg(&sch->dev, | |
537 | "Got subchannel machine check but " | |
538 | "no sch_event handler provided.\n"); | |
539 | } | |
5d6e6b6f PO |
540 | if (ret != 0 && ret != -EAGAIN) { |
541 | CIO_MSG_EVENT(2, "eval: sch 0.%x.%04x, rc=%d\n", | |
542 | sch->schid.ssid, sch->schid.sch_no, ret); | |
543 | } | |
c820de39 CH |
544 | return ret; |
545 | } | |
546 | ||
83b3370c | 547 | static void css_evaluate_subchannel(struct subchannel_id schid, int slow) |
564337f3 PO |
548 | { |
549 | struct subchannel *sch; | |
550 | int ret; | |
551 | ||
552 | sch = get_subchannel_by_schid(schid); | |
553 | if (sch) { | |
554 | ret = css_evaluate_known_subchannel(sch, slow); | |
555 | put_device(&sch->dev); | |
556 | } else | |
557 | ret = css_evaluate_new_subchannel(schid, slow); | |
83b3370c PO |
558 | if (ret == -EAGAIN) |
559 | css_schedule_eval(schid); | |
1da177e4 LT |
560 | } |
561 | ||
817e5000 SO |
562 | /** |
563 | * css_sched_sch_todo - schedule a subchannel operation | |
564 | * @sch: subchannel | |
565 | * @todo: todo | |
566 | * | |
567 | * Schedule the operation identified by @todo to be performed on the slow path | |
568 | * workqueue. Do nothing if another operation with higher priority is already | |
569 | * scheduled. Needs to be called with subchannel lock held. | |
570 | */ | |
571 | void css_sched_sch_todo(struct subchannel *sch, enum sch_todo todo) | |
572 | { | |
573 | CIO_MSG_EVENT(4, "sch_todo: sched sch=0.%x.%04x todo=%d\n", | |
574 | sch->schid.ssid, sch->schid.sch_no, todo); | |
575 | if (sch->todo >= todo) | |
576 | return; | |
577 | /* Get workqueue ref. */ | |
578 | if (!get_device(&sch->dev)) | |
579 | return; | |
580 | sch->todo = todo; | |
581 | if (!queue_work(cio_work_q, &sch->todo_work)) { | |
582 | /* Already queued, release workqueue ref. */ | |
583 | put_device(&sch->dev); | |
584 | } | |
585 | } | |
01c5e6dc | 586 | EXPORT_SYMBOL_GPL(css_sched_sch_todo); |
817e5000 SO |
587 | |
588 | static void css_sch_todo(struct work_struct *work) | |
589 | { | |
590 | struct subchannel *sch; | |
591 | enum sch_todo todo; | |
592 | int ret; | |
593 | ||
594 | sch = container_of(work, struct subchannel, todo_work); | |
595 | /* Find out todo. */ | |
b8fa3e90 | 596 | spin_lock_irq(&sch->lock); |
817e5000 SO |
597 | todo = sch->todo; |
598 | CIO_MSG_EVENT(4, "sch_todo: sch=0.%x.%04x, todo=%d\n", sch->schid.ssid, | |
599 | sch->schid.sch_no, todo); | |
600 | sch->todo = SCH_TODO_NOTHING; | |
b8fa3e90 | 601 | spin_unlock_irq(&sch->lock); |
817e5000 SO |
602 | /* Perform todo. */ |
603 | switch (todo) { | |
604 | case SCH_TODO_NOTHING: | |
605 | break; | |
606 | case SCH_TODO_EVAL: | |
607 | ret = css_evaluate_known_subchannel(sch, 1); | |
608 | if (ret == -EAGAIN) { | |
b8fa3e90 | 609 | spin_lock_irq(&sch->lock); |
817e5000 | 610 | css_sched_sch_todo(sch, todo); |
b8fa3e90 | 611 | spin_unlock_irq(&sch->lock); |
817e5000 SO |
612 | } |
613 | break; | |
614 | case SCH_TODO_UNREG: | |
615 | css_sch_device_unregister(sch); | |
616 | break; | |
617 | } | |
618 | /* Release workqueue ref. */ | |
619 | put_device(&sch->dev); | |
620 | } | |
621 | ||
83b3370c | 622 | static struct idset *slow_subchannel_set; |
1034c96c | 623 | static DEFINE_SPINLOCK(slow_subchannel_lock); |
4e774d59 | 624 | static DECLARE_WAIT_QUEUE_HEAD(css_eval_wq); |
25530553 | 625 | static atomic_t css_eval_scheduled; |
83b3370c PO |
626 | |
627 | static int __init slow_subchannel_init(void) | |
1da177e4 | 628 | { |
25530553 | 629 | atomic_set(&css_eval_scheduled, 0); |
83b3370c PO |
630 | slow_subchannel_set = idset_sch_new(); |
631 | if (!slow_subchannel_set) { | |
e556bbbd | 632 | CIO_MSG_EVENT(0, "could not allocate slow subchannel set\n"); |
83b3370c PO |
633 | return -ENOMEM; |
634 | } | |
635 | return 0; | |
1da177e4 LT |
636 | } |
637 | ||
e82a1567 | 638 | static int slow_eval_known_fn(struct subchannel *sch, void *data) |
1da177e4 | 639 | { |
e82a1567 PO |
640 | int eval; |
641 | int rc; | |
1da177e4 LT |
642 | |
643 | spin_lock_irq(&slow_subchannel_lock); | |
e82a1567 PO |
644 | eval = idset_sch_contains(slow_subchannel_set, sch->schid); |
645 | idset_sch_del(slow_subchannel_set, sch->schid); | |
646 | spin_unlock_irq(&slow_subchannel_lock); | |
647 | if (eval) { | |
648 | rc = css_evaluate_known_subchannel(sch, 1); | |
649 | if (rc == -EAGAIN) | |
650 | css_schedule_eval(sch->schid); | |
0b8eb2ee VV |
651 | /* |
652 | * The loop might take long time for platforms with lots of | |
653 | * known devices. Allow scheduling here. | |
654 | */ | |
655 | cond_resched(); | |
1da177e4 | 656 | } |
e82a1567 PO |
657 | return 0; |
658 | } | |
659 | ||
660 | static int slow_eval_unknown_fn(struct subchannel_id schid, void *data) | |
661 | { | |
662 | int eval; | |
663 | int rc = 0; | |
664 | ||
665 | spin_lock_irq(&slow_subchannel_lock); | |
666 | eval = idset_sch_contains(slow_subchannel_set, schid); | |
667 | idset_sch_del(slow_subchannel_set, schid); | |
1da177e4 | 668 | spin_unlock_irq(&slow_subchannel_lock); |
e82a1567 PO |
669 | if (eval) { |
670 | rc = css_evaluate_new_subchannel(schid, 1); | |
671 | switch (rc) { | |
672 | case -EAGAIN: | |
673 | css_schedule_eval(schid); | |
674 | rc = 0; | |
675 | break; | |
676 | case -ENXIO: | |
677 | case -ENOMEM: | |
678 | case -EIO: | |
679 | /* These should abort looping */ | |
eb072a79 | 680 | spin_lock_irq(&slow_subchannel_lock); |
cec85466 | 681 | idset_sch_del_subseq(slow_subchannel_set, schid); |
eb072a79 | 682 | spin_unlock_irq(&slow_subchannel_lock); |
e82a1567 PO |
683 | break; |
684 | default: | |
685 | rc = 0; | |
686 | } | |
b207f5a8 PO |
687 | /* Allow scheduling here since the containing loop might |
688 | * take a while. */ | |
689 | cond_resched(); | |
e82a1567 PO |
690 | } |
691 | return rc; | |
692 | } | |
693 | ||
694 | static void css_slow_path_func(struct work_struct *unused) | |
695 | { | |
25530553 SO |
696 | unsigned long flags; |
697 | ||
e82a1567 PO |
698 | CIO_TRACE_EVENT(4, "slowpath"); |
699 | for_each_subchannel_staged(slow_eval_known_fn, slow_eval_unknown_fn, | |
700 | NULL); | |
25530553 SO |
701 | spin_lock_irqsave(&slow_subchannel_lock, flags); |
702 | if (idset_is_empty(slow_subchannel_set)) { | |
703 | atomic_set(&css_eval_scheduled, 0); | |
704 | wake_up(&css_eval_wq); | |
705 | } | |
706 | spin_unlock_irqrestore(&slow_subchannel_lock, flags); | |
1da177e4 LT |
707 | } |
708 | ||
175746eb | 709 | static DECLARE_DELAYED_WORK(slow_path_work, css_slow_path_func); |
be5d3823 | 710 | struct workqueue_struct *cio_work_q; |
1da177e4 | 711 | |
83b3370c PO |
712 | void css_schedule_eval(struct subchannel_id schid) |
713 | { | |
714 | unsigned long flags; | |
715 | ||
716 | spin_lock_irqsave(&slow_subchannel_lock, flags); | |
717 | idset_sch_add(slow_subchannel_set, schid); | |
25530553 | 718 | atomic_set(&css_eval_scheduled, 1); |
175746eb | 719 | queue_delayed_work(cio_work_q, &slow_path_work, 0); |
83b3370c PO |
720 | spin_unlock_irqrestore(&slow_subchannel_lock, flags); |
721 | } | |
722 | ||
723 | void css_schedule_eval_all(void) | |
724 | { | |
725 | unsigned long flags; | |
726 | ||
727 | spin_lock_irqsave(&slow_subchannel_lock, flags); | |
728 | idset_fill(slow_subchannel_set); | |
25530553 | 729 | atomic_set(&css_eval_scheduled, 1); |
175746eb | 730 | queue_delayed_work(cio_work_q, &slow_path_work, 0); |
83b3370c PO |
731 | spin_unlock_irqrestore(&slow_subchannel_lock, flags); |
732 | } | |
733 | ||
ca34cda7 | 734 | static int __unset_validpath(struct device *dev, void *data) |
22806dc1 | 735 | { |
703e5c99 SO |
736 | struct idset *set = data; |
737 | struct subchannel *sch = to_subchannel(dev); | |
ca34cda7 VV |
738 | struct pmcw *pmcw = &sch->schib.pmcw; |
739 | ||
740 | /* Here we want to make sure that we are considering only those subchannels | |
741 | * which do not have an operational device attached to it. This can be found | |
742 | * with the help of PAM and POM values of pmcw. OPM provides the information | |
743 | * about any path which is currently vary-off, so that we should not consider. | |
744 | */ | |
745 | if (sch->st == SUBCHANNEL_TYPE_IO && | |
746 | (sch->opm & pmcw->pam & pmcw->pom)) | |
747 | idset_sch_del(set, sch->schid); | |
40154b82 | 748 | |
703e5c99 | 749 | return 0; |
56e25e97 PO |
750 | } |
751 | ||
172da89e VV |
752 | static int __unset_online(struct device *dev, void *data) |
753 | { | |
754 | struct idset *set = data; | |
755 | struct subchannel *sch = to_subchannel(dev); | |
172da89e | 756 | |
1b607411 PO |
757 | if (sch->st == SUBCHANNEL_TYPE_IO && sch->config.ena) |
758 | idset_sch_del(set, sch->schid); | |
172da89e VV |
759 | |
760 | return 0; | |
761 | } | |
762 | ||
763 | void css_schedule_eval_cond(enum css_eval_cond cond, unsigned long delay) | |
40154b82 | 764 | { |
703e5c99 | 765 | unsigned long flags; |
172da89e | 766 | struct idset *set; |
40154b82 | 767 | |
703e5c99 | 768 | /* Find unregistered subchannels. */ |
172da89e VV |
769 | set = idset_sch_new(); |
770 | if (!set) { | |
703e5c99 SO |
771 | /* Fallback. */ |
772 | css_schedule_eval_all(); | |
56e25e97 PO |
773 | return; |
774 | } | |
172da89e VV |
775 | idset_fill(set); |
776 | switch (cond) { | |
ca34cda7 VV |
777 | case CSS_EVAL_NO_PATH: |
778 | bus_for_each_dev(&css_bus_type, NULL, set, __unset_validpath); | |
172da89e VV |
779 | break; |
780 | case CSS_EVAL_NOT_ONLINE: | |
781 | bus_for_each_dev(&css_bus_type, NULL, set, __unset_online); | |
782 | break; | |
783 | default: | |
784 | break; | |
785 | } | |
786 | ||
703e5c99 SO |
787 | /* Apply to slow_subchannel_set. */ |
788 | spin_lock_irqsave(&slow_subchannel_lock, flags); | |
172da89e | 789 | idset_add_set(slow_subchannel_set, set); |
703e5c99 | 790 | atomic_set(&css_eval_scheduled, 1); |
175746eb | 791 | queue_delayed_work(cio_work_q, &slow_path_work, delay); |
703e5c99 | 792 | spin_unlock_irqrestore(&slow_subchannel_lock, flags); |
172da89e | 793 | idset_free(set); |
40154b82 PO |
794 | } |
795 | ||
703e5c99 SO |
796 | void css_wait_for_slow_path(void) |
797 | { | |
be5d3823 | 798 | flush_workqueue(cio_work_q); |
703e5c99 | 799 | } |
40154b82 | 800 | |
ca34cda7 | 801 | /* Schedule reprobing of all subchannels with no valid operational path. */ |
40154b82 PO |
802 | void css_schedule_reprobe(void) |
803 | { | |
175746eb | 804 | /* Schedule with a delay to allow merging of subsequent calls. */ |
ca34cda7 | 805 | css_schedule_eval_cond(CSS_EVAL_NO_PATH, 1 * HZ); |
40154b82 | 806 | } |
40154b82 PO |
807 | EXPORT_SYMBOL_GPL(css_schedule_reprobe); |
808 | ||
1da177e4 LT |
809 | /* |
810 | * Called from the machine check handler for subchannel report words. | |
811 | */ | |
c1156189 | 812 | static void css_process_crw(struct crw *crw0, struct crw *crw1, int overflow) |
1da177e4 | 813 | { |
a8237fc4 | 814 | struct subchannel_id mchk_schid; |
4bc4e965 | 815 | struct subchannel *sch; |
1da177e4 | 816 | |
c1156189 CH |
817 | if (overflow) { |
818 | css_schedule_eval_all(); | |
819 | return; | |
820 | } | |
821 | CIO_CRW_EVENT(2, "CRW0 reports slct=%d, oflw=%d, " | |
822 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
823 | crw0->slct, crw0->oflw, crw0->chn, crw0->rsc, crw0->anc, | |
824 | crw0->erc, crw0->rsid); | |
825 | if (crw1) | |
826 | CIO_CRW_EVENT(2, "CRW1 reports slct=%d, oflw=%d, " | |
827 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
828 | crw1->slct, crw1->oflw, crw1->chn, crw1->rsc, | |
829 | crw1->anc, crw1->erc, crw1->rsid); | |
a8237fc4 | 830 | init_subchannel_id(&mchk_schid); |
c1156189 CH |
831 | mchk_schid.sch_no = crw0->rsid; |
832 | if (crw1) | |
8d7bfb4a | 833 | mchk_schid.ssid = (crw1->rsid >> 4) & 3; |
fb6958a5 | 834 | |
4bc4e965 SO |
835 | if (crw0->erc == CRW_ERC_PMOD) { |
836 | sch = get_subchannel_by_schid(mchk_schid); | |
837 | if (sch) { | |
838 | css_update_ssd_info(sch); | |
839 | put_device(&sch->dev); | |
840 | } | |
841 | } | |
c1156189 | 842 | /* |
1da177e4 LT |
843 | * Since we are always presented with IPI in the CRW, we have to |
844 | * use stsch() to find out if the subchannel in question has come | |
845 | * or gone. | |
846 | */ | |
83b3370c | 847 | css_evaluate_subchannel(mchk_schid, 0); |
1da177e4 LT |
848 | } |
849 | ||
850 | static void __init | |
a28c6944 | 851 | css_generate_pgid(struct channel_subsystem *css, u32 tod_high) |
1da177e4 | 852 | { |
94038a99 MS |
853 | struct cpuid cpu_id; |
854 | ||
75784c00 | 855 | if (css_general_characteristics.mcss) { |
a28c6944 | 856 | css->global_pgid.pgid_high.ext_cssid.version = 0x80; |
e2e0de9b | 857 | css->global_pgid.pgid_high.ext_cssid.cssid = |
b983aa1f | 858 | css->id_valid ? css->cssid : 0; |
a28c6944 | 859 | } else { |
7b468488 | 860 | css->global_pgid.pgid_high.cpu_addr = stap(); |
1da177e4 | 861 | } |
94038a99 MS |
862 | get_cpu_id(&cpu_id); |
863 | css->global_pgid.cpu_id = cpu_id.ident; | |
864 | css->global_pgid.cpu_model = cpu_id.machine; | |
a28c6944 | 865 | css->global_pgid.tod_high = tod_high; |
a28c6944 CH |
866 | } |
867 | ||
15a2044d | 868 | static void channel_subsystem_release(struct device *dev) |
3b793060 | 869 | { |
15a2044d | 870 | struct channel_subsystem *css = to_css(dev); |
3b793060 | 871 | |
495a5b45 | 872 | mutex_destroy(&css->mutex); |
3b793060 CH |
873 | kfree(css); |
874 | } | |
875 | ||
64dfdd4b SO |
876 | static ssize_t real_cssid_show(struct device *dev, struct device_attribute *a, |
877 | char *buf) | |
878 | { | |
879 | struct channel_subsystem *css = to_css(dev); | |
880 | ||
b983aa1f | 881 | if (!css->id_valid) |
64dfdd4b SO |
882 | return -EINVAL; |
883 | ||
884 | return sprintf(buf, "%x\n", css->cssid); | |
885 | } | |
886 | static DEVICE_ATTR_RO(real_cssid); | |
887 | ||
cec0c58d VV |
888 | static ssize_t rescan_store(struct device *dev, struct device_attribute *a, |
889 | const char *buf, size_t count) | |
890 | { | |
891 | CIO_TRACE_EVENT(4, "usr-rescan"); | |
892 | ||
893 | css_schedule_eval_all(); | |
894 | css_complete_work(); | |
895 | ||
896 | return count; | |
897 | } | |
898 | static DEVICE_ATTR_WO(rescan); | |
899 | ||
6c701268 SO |
900 | static ssize_t cm_enable_show(struct device *dev, struct device_attribute *a, |
901 | char *buf) | |
495a5b45 CH |
902 | { |
903 | struct channel_subsystem *css = to_css(dev); | |
8284fb19 | 904 | int ret; |
495a5b45 | 905 | |
8284fb19 ME |
906 | mutex_lock(&css->mutex); |
907 | ret = sprintf(buf, "%x\n", css->cm_enabled); | |
908 | mutex_unlock(&css->mutex); | |
909 | return ret; | |
495a5b45 CH |
910 | } |
911 | ||
6c701268 SO |
912 | static ssize_t cm_enable_store(struct device *dev, struct device_attribute *a, |
913 | const char *buf, size_t count) | |
495a5b45 CH |
914 | { |
915 | struct channel_subsystem *css = to_css(dev); | |
2f972202 | 916 | unsigned long val; |
6c701268 | 917 | int ret; |
495a5b45 | 918 | |
0178722b | 919 | ret = kstrtoul(buf, 16, &val); |
2f972202 CH |
920 | if (ret) |
921 | return ret; | |
8284fb19 | 922 | mutex_lock(&css->mutex); |
2f972202 CH |
923 | switch (val) { |
924 | case 0: | |
495a5b45 CH |
925 | ret = css->cm_enabled ? chsc_secm(css, 0) : 0; |
926 | break; | |
2f972202 | 927 | case 1: |
495a5b45 CH |
928 | ret = css->cm_enabled ? 0 : chsc_secm(css, 1); |
929 | break; | |
930 | default: | |
931 | ret = -EINVAL; | |
932 | } | |
8284fb19 | 933 | mutex_unlock(&css->mutex); |
495a5b45 CH |
934 | return ret < 0 ? ret : count; |
935 | } | |
6c701268 SO |
936 | static DEVICE_ATTR_RW(cm_enable); |
937 | ||
938 | static umode_t cm_enable_mode(struct kobject *kobj, struct attribute *attr, | |
939 | int index) | |
940 | { | |
941 | return css_chsc_characteristics.secm ? attr->mode : 0; | |
942 | } | |
943 | ||
64dfdd4b SO |
944 | static struct attribute *cssdev_attrs[] = { |
945 | &dev_attr_real_cssid.attr, | |
cec0c58d | 946 | &dev_attr_rescan.attr, |
64dfdd4b SO |
947 | NULL, |
948 | }; | |
949 | ||
950 | static struct attribute_group cssdev_attr_group = { | |
951 | .attrs = cssdev_attrs, | |
952 | }; | |
953 | ||
6c701268 SO |
954 | static struct attribute *cssdev_cm_attrs[] = { |
955 | &dev_attr_cm_enable.attr, | |
956 | NULL, | |
957 | }; | |
958 | ||
959 | static struct attribute_group cssdev_cm_attr_group = { | |
960 | .attrs = cssdev_cm_attrs, | |
961 | .is_visible = cm_enable_mode, | |
962 | }; | |
495a5b45 | 963 | |
6c701268 | 964 | static const struct attribute_group *cssdev_attr_groups[] = { |
64dfdd4b | 965 | &cssdev_attr_group, |
6c701268 SO |
966 | &cssdev_cm_attr_group, |
967 | NULL, | |
968 | }; | |
495a5b45 | 969 | |
4d284cac | 970 | static int __init setup_css(int nr) |
a28c6944 | 971 | { |
7c9f4e3a | 972 | struct channel_subsystem *css; |
15a2044d | 973 | int ret; |
a28c6944 | 974 | |
15a2044d SO |
975 | css = kzalloc(sizeof(*css), GFP_KERNEL); |
976 | if (!css) | |
d7b5a4c9 | 977 | return -ENOMEM; |
15a2044d SO |
978 | |
979 | channel_subsystems[nr] = css; | |
980 | dev_set_name(&css->device, "css%x", nr); | |
981 | css->device.groups = cssdev_attr_groups; | |
982 | css->device.release = channel_subsystem_release; | |
bb99332a HP |
983 | /* |
984 | * We currently allocate notifier bits with this (using | |
985 | * css->device as the device argument with the DMA API) | |
986 | * and are fine with 64 bit addresses. | |
987 | */ | |
4520a91a JW |
988 | ret = dma_coerce_mask_and_coherent(&css->device, DMA_BIT_MASK(64)); |
989 | if (ret) { | |
990 | kfree(css); | |
991 | goto out_err; | |
992 | } | |
15a2044d SO |
993 | |
994 | mutex_init(&css->mutex); | |
b983aa1f AW |
995 | ret = chsc_get_cssid_iid(nr, &css->cssid, &css->iid); |
996 | if (!ret) { | |
997 | css->id_valid = true; | |
998 | pr_info("Partition identifier %01x.%01x\n", css->cssid, | |
999 | css->iid); | |
1000 | } | |
15a2044d SO |
1001 | css_generate_pgid(css, (u32) (get_tod_clock() >> 32)); |
1002 | ||
1003 | ret = device_register(&css->device); | |
1004 | if (ret) { | |
1005 | put_device(&css->device); | |
1006 | goto out_err; | |
1007 | } | |
1008 | ||
1009 | css->pseudo_subchannel = kzalloc(sizeof(*css->pseudo_subchannel), | |
1010 | GFP_KERNEL); | |
1011 | if (!css->pseudo_subchannel) { | |
1012 | device_unregister(&css->device); | |
1013 | ret = -ENOMEM; | |
1014 | goto out_err; | |
1015 | } | |
1016 | ||
7c9f4e3a CH |
1017 | css->pseudo_subchannel->dev.parent = &css->device; |
1018 | css->pseudo_subchannel->dev.release = css_subchannel_release; | |
5d6e6b6f | 1019 | mutex_init(&css->pseudo_subchannel->reg_mutex); |
b8fa3e90 | 1020 | css_sch_create_locks(css->pseudo_subchannel); |
e2e0de9b | 1021 | |
15a2044d SO |
1022 | dev_set_name(&css->pseudo_subchannel->dev, "defunct"); |
1023 | ret = device_register(&css->pseudo_subchannel->dev); | |
1024 | if (ret) { | |
1025 | put_device(&css->pseudo_subchannel->dev); | |
1026 | device_unregister(&css->device); | |
1027 | goto out_err; | |
1028 | } | |
1029 | ||
1030 | return ret; | |
1031 | out_err: | |
1032 | channel_subsystems[nr] = NULL; | |
1033 | return ret; | |
1da177e4 LT |
1034 | } |
1035 | ||
a55360df CH |
1036 | static int css_reboot_event(struct notifier_block *this, |
1037 | unsigned long event, | |
1038 | void *ptr) | |
1039 | { | |
98cc43ab SO |
1040 | struct channel_subsystem *css; |
1041 | int ret; | |
a55360df CH |
1042 | |
1043 | ret = NOTIFY_DONE; | |
98cc43ab | 1044 | for_each_css(css) { |
8284fb19 | 1045 | mutex_lock(&css->mutex); |
a55360df CH |
1046 | if (css->cm_enabled) |
1047 | if (chsc_secm(css, 0)) | |
1048 | ret = NOTIFY_BAD; | |
8284fb19 | 1049 | mutex_unlock(&css->mutex); |
a55360df CH |
1050 | } |
1051 | ||
1052 | return ret; | |
1053 | } | |
1054 | ||
1055 | static struct notifier_block css_reboot_notifier = { | |
1056 | .notifier_call = css_reboot_event, | |
1057 | }; | |
1058 | ||
bb99332a HP |
1059 | #define CIO_DMA_GFP (GFP_KERNEL | __GFP_ZERO) |
1060 | static struct gen_pool *cio_dma_pool; | |
1061 | ||
1062 | /* Currently cio supports only a single css */ | |
1063 | struct device *cio_get_dma_css_dev(void) | |
1064 | { | |
1065 | return &channel_subsystems[0]->device; | |
1066 | } | |
1067 | ||
1068 | struct gen_pool *cio_gp_dma_create(struct device *dma_dev, int nr_pages) | |
1069 | { | |
1070 | struct gen_pool *gp_dma; | |
1071 | void *cpu_addr; | |
1072 | dma_addr_t dma_addr; | |
1073 | int i; | |
1074 | ||
1075 | gp_dma = gen_pool_create(3, -1); | |
1076 | if (!gp_dma) | |
1077 | return NULL; | |
1078 | for (i = 0; i < nr_pages; ++i) { | |
1079 | cpu_addr = dma_alloc_coherent(dma_dev, PAGE_SIZE, &dma_addr, | |
1080 | CIO_DMA_GFP); | |
1081 | if (!cpu_addr) | |
1082 | return gp_dma; | |
1083 | gen_pool_add_virt(gp_dma, (unsigned long) cpu_addr, | |
1084 | dma_addr, PAGE_SIZE, -1); | |
1085 | } | |
1086 | return gp_dma; | |
1087 | } | |
1088 | ||
1089 | static void __gp_dma_free_dma(struct gen_pool *pool, | |
1090 | struct gen_pool_chunk *chunk, void *data) | |
1091 | { | |
1092 | size_t chunk_size = chunk->end_addr - chunk->start_addr + 1; | |
1093 | ||
1094 | dma_free_coherent((struct device *) data, chunk_size, | |
1095 | (void *) chunk->start_addr, | |
1096 | (dma_addr_t) chunk->phys_addr); | |
1097 | } | |
1098 | ||
1099 | void cio_gp_dma_destroy(struct gen_pool *gp_dma, struct device *dma_dev) | |
1100 | { | |
1101 | if (!gp_dma) | |
1102 | return; | |
1103 | /* this is quite ugly but no better idea */ | |
1104 | gen_pool_for_each_chunk(gp_dma, __gp_dma_free_dma, dma_dev); | |
1105 | gen_pool_destroy(gp_dma); | |
1106 | } | |
1107 | ||
1108 | static int cio_dma_pool_init(void) | |
1109 | { | |
1110 | /* No need to free up the resources: compiled in */ | |
1111 | cio_dma_pool = cio_gp_dma_create(cio_get_dma_css_dev(), 1); | |
1112 | if (!cio_dma_pool) | |
1113 | return -ENOMEM; | |
1114 | return 0; | |
1115 | } | |
1116 | ||
1117 | void *cio_gp_dma_zalloc(struct gen_pool *gp_dma, struct device *dma_dev, | |
1118 | size_t size) | |
1119 | { | |
1120 | dma_addr_t dma_addr; | |
1121 | unsigned long addr; | |
1122 | size_t chunk_size; | |
1123 | ||
1124 | if (!gp_dma) | |
1125 | return NULL; | |
1126 | addr = gen_pool_alloc(gp_dma, size); | |
1127 | while (!addr) { | |
1128 | chunk_size = round_up(size, PAGE_SIZE); | |
1129 | addr = (unsigned long) dma_alloc_coherent(dma_dev, | |
1130 | chunk_size, &dma_addr, CIO_DMA_GFP); | |
1131 | if (!addr) | |
1132 | return NULL; | |
1133 | gen_pool_add_virt(gp_dma, addr, dma_addr, chunk_size, -1); | |
1134 | addr = gen_pool_alloc(gp_dma, size); | |
1135 | } | |
1136 | return (void *) addr; | |
1137 | } | |
1138 | ||
1139 | void cio_gp_dma_free(struct gen_pool *gp_dma, void *cpu_addr, size_t size) | |
1140 | { | |
1141 | if (!cpu_addr) | |
1142 | return; | |
1143 | memset(cpu_addr, 0, size); | |
1144 | gen_pool_free(gp_dma, (unsigned long) cpu_addr, size); | |
1145 | } | |
1146 | ||
1147 | /* | |
1148 | * Allocate dma memory from the css global pool. Intended for memory not | |
1149 | * specific to any single device within the css. The allocated memory | |
1150 | * is not guaranteed to be 31-bit addressable. | |
1151 | * | |
1152 | * Caution: Not suitable for early stuff like console. | |
1153 | */ | |
1154 | void *cio_dma_zalloc(size_t size) | |
1155 | { | |
1156 | return cio_gp_dma_zalloc(cio_dma_pool, cio_get_dma_css_dev(), size); | |
1157 | } | |
1158 | ||
1159 | void cio_dma_free(void *cpu_addr, size_t size) | |
1160 | { | |
1161 | cio_gp_dma_free(cio_dma_pool, cpu_addr, size); | |
1162 | } | |
1163 | ||
1da177e4 LT |
1164 | /* |
1165 | * Now that the driver core is running, we can setup our channel subsystem. | |
14556b33 | 1166 | * The struct subchannel's are created during probing. |
1da177e4 | 1167 | */ |
2f17644d | 1168 | static int __init css_bus_init(void) |
1da177e4 | 1169 | { |
a28c6944 | 1170 | int ret, i; |
1da177e4 | 1171 | |
34aec07c SO |
1172 | ret = chsc_init(); |
1173 | if (ret) | |
1174 | return ret; | |
1175 | ||
34196f82 | 1176 | chsc_determine_css_characteristics(); |
b0a285d3 SO |
1177 | /* Try to enable MSS. */ |
1178 | ret = chsc_enable_facility(CHSC_SDA_OC_MSS); | |
818c272b | 1179 | if (ret) |
b0a285d3 | 1180 | max_ssid = 0; |
818c272b SO |
1181 | else /* Success. */ |
1182 | max_ssid = __MAX_SSID; | |
b0a285d3 | 1183 | |
4434a38c CH |
1184 | ret = slow_subchannel_init(); |
1185 | if (ret) | |
1186 | goto out; | |
1187 | ||
f5daba1d | 1188 | ret = crw_register_handler(CRW_RSC_SCH, css_process_crw); |
c1156189 CH |
1189 | if (ret) |
1190 | goto out; | |
1191 | ||
1da177e4 LT |
1192 | if ((ret = bus_register(&css_bus_type))) |
1193 | goto out; | |
1da177e4 | 1194 | |
a28c6944 | 1195 | /* Setup css structure. */ |
98cc43ab | 1196 | for (i = 0; i <= MAX_CSS_IDX; i++) { |
d7b5a4c9 | 1197 | ret = setup_css(i); |
15a2044d | 1198 | if (ret) |
a2164b81 | 1199 | goto out_unregister; |
a28c6944 | 1200 | } |
a55360df CH |
1201 | ret = register_reboot_notifier(&css_reboot_notifier); |
1202 | if (ret) | |
a2164b81 | 1203 | goto out_unregister; |
bb99332a HP |
1204 | ret = cio_dma_pool_init(); |
1205 | if (ret) | |
ef2eea78 | 1206 | goto out_unregister_rn; |
b50623e5 | 1207 | airq_init(); |
1da177e4 LT |
1208 | css_init_done = 1; |
1209 | ||
3a3fc29a | 1210 | /* Enable default isc for I/O subchannels. */ |
6ef556cc | 1211 | isc_register(IO_SCH_ISC); |
1da177e4 | 1212 | |
1da177e4 | 1213 | return 0; |
bb99332a HP |
1214 | out_unregister_rn: |
1215 | unregister_reboot_notifier(&css_reboot_notifier); | |
fb6958a5 | 1216 | out_unregister: |
15a2044d SO |
1217 | while (i-- > 0) { |
1218 | struct channel_subsystem *css = channel_subsystems[i]; | |
7c9f4e3a | 1219 | device_unregister(&css->pseudo_subchannel->dev); |
7c9f4e3a | 1220 | device_unregister(&css->device); |
a28c6944 | 1221 | } |
1da177e4 LT |
1222 | bus_unregister(&css_bus_type); |
1223 | out: | |
34aec07c | 1224 | crw_unregister_handler(CRW_RSC_SCH); |
b827d1c8 | 1225 | idset_free(slow_subchannel_set); |
34aec07c | 1226 | chsc_init_cleanup(); |
e6d5a428 ME |
1227 | pr_alert("The CSS device driver initialization failed with " |
1228 | "errno=%d\n", ret); | |
1da177e4 LT |
1229 | return ret; |
1230 | } | |
1231 | ||
2f17644d SO |
1232 | static void __init css_bus_cleanup(void) |
1233 | { | |
1234 | struct channel_subsystem *css; | |
2f17644d | 1235 | |
98cc43ab | 1236 | for_each_css(css) { |
2f17644d | 1237 | device_unregister(&css->pseudo_subchannel->dev); |
2f17644d SO |
1238 | device_unregister(&css->device); |
1239 | } | |
1240 | bus_unregister(&css_bus_type); | |
34aec07c | 1241 | crw_unregister_handler(CRW_RSC_SCH); |
b827d1c8 | 1242 | idset_free(slow_subchannel_set); |
34aec07c | 1243 | chsc_init_cleanup(); |
2f17644d SO |
1244 | isc_unregister(IO_SCH_ISC); |
1245 | } | |
1246 | ||
1247 | static int __init channel_subsystem_init(void) | |
1248 | { | |
1249 | int ret; | |
1250 | ||
1251 | ret = css_bus_init(); | |
1252 | if (ret) | |
1253 | return ret; | |
be5d3823 SO |
1254 | cio_work_q = create_singlethread_workqueue("cio"); |
1255 | if (!cio_work_q) { | |
1256 | ret = -ENOMEM; | |
1257 | goto out_bus; | |
1258 | } | |
2f17644d SO |
1259 | ret = io_subchannel_init(); |
1260 | if (ret) | |
be5d3823 | 1261 | goto out_wq; |
2f17644d | 1262 | |
71aa11a4 SO |
1263 | /* Register subchannels which are already in use. */ |
1264 | cio_register_early_subchannels(); | |
1265 | /* Start initial subchannel evaluation. */ | |
1266 | css_schedule_eval_all(); | |
1267 | ||
2f17644d | 1268 | return ret; |
be5d3823 SO |
1269 | out_wq: |
1270 | destroy_workqueue(cio_work_q); | |
1271 | out_bus: | |
1272 | css_bus_cleanup(); | |
1273 | return ret; | |
2f17644d SO |
1274 | } |
1275 | subsys_initcall(channel_subsystem_init); | |
1276 | ||
8ea7f559 SO |
1277 | static int css_settle(struct device_driver *drv, void *unused) |
1278 | { | |
1279 | struct css_driver *cssdrv = to_cssdriver(drv); | |
1280 | ||
1281 | if (cssdrv->settle) | |
b4c70721 | 1282 | return cssdrv->settle(); |
8ea7f559 SO |
1283 | return 0; |
1284 | } | |
1285 | ||
0d01bb89 | 1286 | int css_complete_work(void) |
879acca5 SO |
1287 | { |
1288 | int ret; | |
1289 | ||
1290 | /* Wait for the evaluation of subchannels to finish. */ | |
b4c70721 SO |
1291 | ret = wait_event_interruptible(css_eval_wq, |
1292 | atomic_read(&css_eval_scheduled) == 0); | |
1293 | if (ret) | |
1294 | return -EINTR; | |
879acca5 SO |
1295 | flush_workqueue(cio_work_q); |
1296 | /* Wait for the subchannel type specific initialization to finish */ | |
b4c70721 | 1297 | return bus_for_each_drv(&css_bus_type, NULL, NULL, css_settle); |
879acca5 SO |
1298 | } |
1299 | ||
1300 | ||
2f17644d SO |
1301 | /* |
1302 | * Wait for the initialization of devices to finish, to make sure we are | |
1303 | * done with our setup if the search for the root device starts. | |
1304 | */ | |
1305 | static int __init channel_subsystem_init_sync(void) | |
1306 | { | |
879acca5 SO |
1307 | css_complete_work(); |
1308 | return 0; | |
2f17644d SO |
1309 | } |
1310 | subsys_initcall_sync(channel_subsystem_init_sync); | |
1311 | ||
879acca5 SO |
1312 | #ifdef CONFIG_PROC_FS |
1313 | static ssize_t cio_settle_write(struct file *file, const char __user *buf, | |
1314 | size_t count, loff_t *ppos) | |
1315 | { | |
b4c70721 SO |
1316 | int ret; |
1317 | ||
879acca5 SO |
1318 | /* Handle pending CRW's. */ |
1319 | crw_wait_for_channel_report(); | |
b4c70721 SO |
1320 | ret = css_complete_work(); |
1321 | ||
1322 | return ret ? ret : count; | |
879acca5 SO |
1323 | } |
1324 | ||
97a32539 AD |
1325 | static const struct proc_ops cio_settle_proc_ops = { |
1326 | .proc_open = nonseekable_open, | |
1327 | .proc_write = cio_settle_write, | |
1328 | .proc_lseek = no_llseek, | |
879acca5 SO |
1329 | }; |
1330 | ||
1331 | static int __init cio_settle_init(void) | |
1332 | { | |
1333 | struct proc_dir_entry *entry; | |
1334 | ||
97a32539 | 1335 | entry = proc_create("cio_settle", S_IWUSR, NULL, &cio_settle_proc_ops); |
879acca5 SO |
1336 | if (!entry) |
1337 | return -ENOMEM; | |
1338 | return 0; | |
1339 | } | |
1340 | device_initcall(cio_settle_init); | |
1341 | #endif /*CONFIG_PROC_FS*/ | |
1342 | ||
d7b5a4c9 CH |
1343 | int sch_is_pseudo_sch(struct subchannel *sch) |
1344 | { | |
ab575884 VG |
1345 | if (!sch->dev.parent) |
1346 | return 0; | |
d7b5a4c9 CH |
1347 | return sch == to_css(sch->dev.parent)->pseudo_subchannel; |
1348 | } | |
1349 | ||
f08adc00 | 1350 | static int css_bus_match(struct device *dev, struct device_driver *drv) |
1da177e4 | 1351 | { |
084325d8 CH |
1352 | struct subchannel *sch = to_subchannel(dev); |
1353 | struct css_driver *driver = to_cssdriver(drv); | |
f08adc00 | 1354 | struct css_device_id *id; |
1da177e4 | 1355 | |
ebc3d179 CH |
1356 | /* When driver_override is set, only bind to the matching driver */ |
1357 | if (sch->driver_override && strcmp(sch->driver_override, drv->name)) | |
1358 | return 0; | |
1359 | ||
f08adc00 CH |
1360 | for (id = driver->subchannel_type; id->match_flags; id++) { |
1361 | if (sch->st == id->type) | |
1362 | return 1; | |
1363 | } | |
1da177e4 LT |
1364 | |
1365 | return 0; | |
1366 | } | |
1367 | ||
98c13c28 | 1368 | static int css_probe(struct device *dev) |
8bbace7e CH |
1369 | { |
1370 | struct subchannel *sch; | |
98c13c28 | 1371 | int ret; |
8bbace7e CH |
1372 | |
1373 | sch = to_subchannel(dev); | |
084325d8 | 1374 | sch->driver = to_cssdriver(dev->driver); |
98c13c28 CH |
1375 | ret = sch->driver->probe ? sch->driver->probe(sch) : 0; |
1376 | if (ret) | |
1377 | sch->driver = NULL; | |
1378 | return ret; | |
8bbace7e CH |
1379 | } |
1380 | ||
fc7a6209 | 1381 | static void css_remove(struct device *dev) |
8bbace7e CH |
1382 | { |
1383 | struct subchannel *sch; | |
1384 | ||
1385 | sch = to_subchannel(dev); | |
a7bdb9a9 UKK |
1386 | if (sch->driver->remove) |
1387 | sch->driver->remove(sch); | |
98c13c28 | 1388 | sch->driver = NULL; |
8bbace7e CH |
1389 | } |
1390 | ||
98c13c28 | 1391 | static void css_shutdown(struct device *dev) |
8bbace7e CH |
1392 | { |
1393 | struct subchannel *sch; | |
1394 | ||
1395 | sch = to_subchannel(dev); | |
98c13c28 | 1396 | if (sch->driver && sch->driver->shutdown) |
8bbace7e CH |
1397 | sch->driver->shutdown(sch); |
1398 | } | |
1399 | ||
2a81ada3 | 1400 | static int css_uevent(const struct device *dev, struct kobj_uevent_env *env) |
7e9db9ea | 1401 | { |
2a81ada3 | 1402 | const struct subchannel *sch = to_subchannel(dev); |
7e9db9ea CH |
1403 | int ret; |
1404 | ||
1405 | ret = add_uevent_var(env, "ST=%01X", sch->st); | |
1406 | if (ret) | |
1407 | return ret; | |
1408 | ret = add_uevent_var(env, "MODALIAS=css:t%01X", sch->st); | |
1409 | return ret; | |
1410 | } | |
1411 | ||
3041b6ab | 1412 | static struct bus_type css_bus_type = { |
8bbace7e CH |
1413 | .name = "css", |
1414 | .match = css_bus_match, | |
1415 | .probe = css_probe, | |
1416 | .remove = css_remove, | |
1417 | .shutdown = css_shutdown, | |
7e9db9ea | 1418 | .uevent = css_uevent, |
1da177e4 LT |
1419 | }; |
1420 | ||
25b7bb58 CH |
1421 | /** |
1422 | * css_driver_register - register a css driver | |
1423 | * @cdrv: css driver to register | |
1424 | * | |
1425 | * This is mainly a wrapper around driver_register that sets name | |
1426 | * and bus_type in the embedded struct device_driver correctly. | |
1427 | */ | |
1428 | int css_driver_register(struct css_driver *cdrv) | |
1429 | { | |
25b7bb58 CH |
1430 | cdrv->drv.bus = &css_bus_type; |
1431 | return driver_register(&cdrv->drv); | |
1432 | } | |
1433 | EXPORT_SYMBOL_GPL(css_driver_register); | |
1434 | ||
1435 | /** | |
1436 | * css_driver_unregister - unregister a css driver | |
1437 | * @cdrv: css driver to unregister | |
1438 | * | |
1439 | * This is a wrapper around driver_unregister. | |
1440 | */ | |
1441 | void css_driver_unregister(struct css_driver *cdrv) | |
1442 | { | |
1443 | driver_unregister(&cdrv->drv); | |
1444 | } | |
1445 | EXPORT_SYMBOL_GPL(css_driver_unregister); |