[linux-2.6-block.git] / drivers / rtc / rtc-x1205.c

/*
 * An i2c driver for the Xicor/Intersil X1205 RTC
 * Copyright 2004 Karen Spearel
 * Copyright 2005 Alessandro Zummo
 *
 * please send all reports to:
 * 	Karen Spearel <kas111 at gmail dot com>
 *	Alessandro Zummo <a.zummo@towertech.it>
 *
 * based on a lot of other RTC drivers.
 *
 * Information and datasheet:
 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/i2c.h>
#include <linux/bcd.h>
#include <linux/rtc.h>
#include <linux/delay.h>

#define DRV_VERSION "1.0.7"

/* Addresses to scan: none. This chip is located at
 * 0x6f and uses a two bytes register addressing.
 * Two bytes need to be written to read a single register,
 * while most other chips just require one and take the second
 * one as the data to be written. To prevent corrupting
 * unknown chips, the user must explicitly set the probe parameter.
 */

static const unsigned short normal_i2c[] = { I2C_CLIENT_END };

/* Insmod parameters */
I2C_CLIENT_INSMOD;

/* offsets into CCR area */

#define CCR_SEC			0
#define CCR_MIN			1
#define CCR_HOUR		2
#define CCR_MDAY		3
#define CCR_MONTH		4
#define CCR_YEAR		5
#define CCR_WDAY		6
#define CCR_Y2K			7

#define X1205_REG_SR		0x3F	/* status register */
#define X1205_REG_Y2K		0x37
#define X1205_REG_DW		0x36
#define X1205_REG_YR		0x35
#define X1205_REG_MO		0x34
#define X1205_REG_DT		0x33
#define X1205_REG_HR		0x32
#define X1205_REG_MN		0x31
#define X1205_REG_SC		0x30
#define X1205_REG_DTR		0x13
#define X1205_REG_ATR		0x12
#define X1205_REG_INT		0x11
#define X1205_REG_0		0x10
#define X1205_REG_Y2K1		0x0F
#define X1205_REG_DWA1		0x0E
#define X1205_REG_YRA1		0x0D
#define X1205_REG_MOA1		0x0C
#define X1205_REG_DTA1		0x0B
#define X1205_REG_HRA1		0x0A
#define X1205_REG_MNA1		0x09
#define X1205_REG_SCA1		0x08
#define X1205_REG_Y2K0		0x07
#define X1205_REG_DWA0		0x06
#define X1205_REG_YRA0		0x05
#define X1205_REG_MOA0		0x04
#define X1205_REG_DTA0		0x03
#define X1205_REG_HRA0		0x02
#define X1205_REG_MNA0		0x01
#define X1205_REG_SCA0		0x00

#define X1205_CCR_BASE		0x30	/* Base address of CCR */
#define X1205_ALM0_BASE		0x00	/* Base address of ALARM0 */

#define X1205_SR_RTCF		0x01	/* Clock failure */
#define X1205_SR_WEL		0x02	/* Write Enable Latch */
#define X1205_SR_RWEL		0x04	/* Register Write Enable */

#define X1205_DTR_DTR0		0x01
#define X1205_DTR_DTR1		0x02
#define X1205_DTR_DTR2		0x04

#define X1205_HR_MIL		0x80	/* Set in ccr.hour for 24 hr mode */

/* Prototypes */
static int x1205_attach(struct i2c_adapter *adapter);
static int x1205_detach(struct i2c_client *client);
static int x1205_probe(struct i2c_adapter *adapter, int address, int kind);

static struct i2c_driver x1205_driver = {
	.driver		= {
		.name	= "x1205",
	},
	.id		= I2C_DRIVERID_X1205,
	.attach_adapter = &x1205_attach,
	.detach_client	= &x1205_detach,
};

/*
 * In the routines that deal directly with the x1205 hardware, we use
 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
 * Epoch is initialized as 2000. Time is set to UTC.
 */
static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
				unsigned char reg_base)
{
	unsigned char dt_addr[2] = { 0, reg_base };

	unsigned char buf[8];

	struct i2c_msg msgs[] = {
		{ client->addr, 0, 2, dt_addr },	/* setup read ptr */
		{ client->addr, I2C_M_RD, 8, buf },	/* read date */
	};

	/* read date registers */
	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
		dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
		return -EIO;
	}

	dev_dbg(&client->dev,
		"%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
		"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
		__FUNCTION__,
		buf[0], buf[1], buf[2], buf[3],
		buf[4], buf[5], buf[6], buf[7]);

	tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
	tm->tm_min = BCD2BIN(buf[CCR_MIN]);
	tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
	tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
	tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
	tm->tm_year = BCD2BIN(buf[CCR_YEAR])
			+ (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900;
	tm->tm_wday = buf[CCR_WDAY];

	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
		"mday=%d, mon=%d, year=%d, wday=%d\n",
		__FUNCTION__,
		tm->tm_sec, tm->tm_min, tm->tm_hour,
		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);

	return 0;
}

static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
{
	static unsigned char sr_addr[2] = { 0, X1205_REG_SR };

	struct i2c_msg msgs[] = {
		{ client->addr, 0, 2, sr_addr },	/* setup read ptr */
		{ client->addr, I2C_M_RD, 1, sr },	/* read status */
	};

	/* read status register */
	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
		dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
		return -EIO;
	}

	return 0;
}

static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
				int datetoo, u8 reg_base)
{
	int i, xfer;
	unsigned char buf[8];

	static const unsigned char wel[3] = { 0, X1205_REG_SR,
						X1205_SR_WEL };

	static const unsigned char rwel[3] = { 0, X1205_REG_SR,
						X1205_SR_WEL | X1205_SR_RWEL };

	static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };

	dev_dbg(&client->dev,
		"%s: secs=%d, mins=%d, hours=%d\n",
		__FUNCTION__,
		tm->tm_sec, tm->tm_min, tm->tm_hour);

	buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
	buf[CCR_MIN] = BIN2BCD(tm->tm_min);

	/* set hour and 24hr bit */
	buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL;

	/* should we also set the date? */
	if (datetoo) {
		dev_dbg(&client->dev,
			"%s: mday=%d, mon=%d, year=%d, wday=%d\n",
			__FUNCTION__,
			tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);

		buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);

		/* month, 1 - 12 */
		buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1);

		/* year, since the rtc epoch*/
		buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
		buf[CCR_WDAY] = tm->tm_wday & 0x07;
		buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
	}

	/* this sequence is required to unlock the chip */
	if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
		dev_err(&client->dev, "%s: wel - %d\n", __FUNCTION__, xfer);
		return -EIO;
	}

	if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
		dev_err(&client->dev, "%s: rwel - %d\n", __FUNCTION__, xfer);
		return -EIO;
	}

	/* write register's data */
	for (i = 0; i < (datetoo ? 8 : 3); i++) {
		unsigned char rdata[3] = { 0, reg_base + i, buf[i] };

		xfer = i2c_master_send(client, rdata, 3);
		if (xfer != 3) {
			dev_err(&client->dev,
				"%s: xfer=%d addr=%02x, data=%02x\n",
				__FUNCTION__,
				 xfer, rdata[1], rdata[2]);
			return -EIO;
		}
	};

	/* disable further writes */
	if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
		dev_err(&client->dev, "%s: diswe - %d\n", __FUNCTION__, xfer);
		return -EIO;
	}

	return 0;
}

static int x1205_fix_osc(struct i2c_client *client)
{
	int err;
	struct rtc_time tm;

	tm.tm_hour = tm.tm_min = tm.tm_sec = 0;

	if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0)
		dev_err(&client->dev,
			"unable to restart the oscillator\n");

	return err;
}

static int x1205_get_dtrim(struct i2c_client *client, int *trim)
{
	unsigned char dtr;
	static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };

	struct i2c_msg msgs[] = {
		{ client->addr, 0, 2, dtr_addr },	/* setup read ptr */
		{ client->addr, I2C_M_RD, 1, &dtr }, 	/* read dtr */
	};

	/* read dtr register */
	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
		dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
		return -EIO;
	}

	dev_dbg(&client->dev, "%s: raw dtr=%x\n", __FUNCTION__, dtr);

	*trim = 0;

	if (dtr & X1205_DTR_DTR0)
		*trim += 20;

	if (dtr & X1205_DTR_DTR1)
		*trim += 10;

	if (dtr & X1205_DTR_DTR2)
		*trim = -*trim;

	return 0;
}

static int x1205_get_atrim(struct i2c_client *client, int *trim)
{
	s8 atr;
	static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };

	struct i2c_msg msgs[] = {
		{ client->addr, 0, 2, atr_addr },	/* setup read ptr */
		{ client->addr, I2C_M_RD, 1, &atr }, 	/* read atr */
	};

	/* read atr register */
	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
		dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
		return -EIO;
	}

	dev_dbg(&client->dev, "%s: raw atr=%x\n", __FUNCTION__, atr);

	/* atr is a two's complement value on 6 bits,
	 * perform sign extension. The formula is
	 * Catr = (atr * 0.25pF) + 11.00pF.
	 */
	if (atr & 0x20)
		atr |= 0xC0;

	dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __FUNCTION__, atr, atr);

	*trim = (atr * 250) + 11000;

	dev_dbg(&client->dev, "%s: real=%d\n", __FUNCTION__, *trim);

	return 0;
}

struct x1205_limit
{
	unsigned char reg, mask, min, max;
};

static int x1205_validate_client(struct i2c_client *client)
{
	int i, xfer;

	/* Probe array. We will read the register at the specified
	 * address and check if the given bits are zero.
	 */
	static const unsigned char probe_zero_pattern[] = {
		/* register, mask */
		X1205_REG_SR,	0x18,
		X1205_REG_DTR,	0xF8,
		X1205_REG_ATR,	0xC0,
		X1205_REG_INT,	0x18,
		X1205_REG_0,	0xFF,
	};

	static const struct x1205_limit probe_limits_pattern[] = {
		/* register, mask, min, max */
		{ X1205_REG_Y2K,	0xFF,	19,	20	},
		{ X1205_REG_DW,		0xFF,	0,	6	},
		{ X1205_REG_YR,		0xFF,	0,	99	},
		{ X1205_REG_MO,		0xFF,	0,	12	},
		{ X1205_REG_DT,		0xFF,	0,	31	},
		{ X1205_REG_HR,		0x7F,	0,	23	},
		{ X1205_REG_MN,		0xFF,	0,	59	},
		{ X1205_REG_SC,		0xFF,	0,	59	},
		{ X1205_REG_Y2K1,	0xFF,	19,	20	},
		{ X1205_REG_Y2K0,	0xFF,	19,	20	},
	};

	/* check that registers have bits a 0 where expected */
	for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
		unsigned char buf;

		unsigned char addr[2] = { 0, probe_zero_pattern[i] };

		struct i2c_msg msgs[2] = {
			{ client->addr, 0, 2, addr },
			{ client->addr, I2C_M_RD, 1, &buf },
		};

		if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
			dev_err(&client->dev,
				"%s: could not read register %x\n",
				__FUNCTION__, probe_zero_pattern[i]);

			return -EIO;
		}

		if ((buf & probe_zero_pattern[i+1]) != 0) {
			dev_err(&client->dev,
				"%s: register=%02x, zero pattern=%d, value=%x\n",
				__FUNCTION__, probe_zero_pattern[i], i, buf);

			return -ENODEV;
		}
	}

	/* check limits (only registers with bcd values) */
	for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
		unsigned char reg, value;

		unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };

		struct i2c_msg msgs[2] = {
			{ client->addr, 0, 2, addr },
			{ client->addr, I2C_M_RD, 1, &reg },
		};

		if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
			dev_err(&client->dev,
				"%s: could not read register %x\n",
				__FUNCTION__, probe_limits_pattern[i].reg);

			return -EIO;
		}

		value = BCD2BIN(reg & probe_limits_pattern[i].mask);

		if (value > probe_limits_pattern[i].max ||
			value < probe_limits_pattern[i].min) {
			dev_dbg(&client->dev,
				"%s: register=%x, lim pattern=%d, value=%d\n",
				__FUNCTION__, probe_limits_pattern[i].reg,
				i, value);

			return -ENODEV;
		}
	}

	return 0;
}

static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	return x1205_get_datetime(to_i2c_client(dev),
		&alrm->time, X1205_ALM0_BASE);
}

static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	return x1205_set_datetime(to_i2c_client(dev),
		&alrm->time, 1, X1205_ALM0_BASE);
}

static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	return x1205_get_datetime(to_i2c_client(dev),
		tm, X1205_CCR_BASE);
}

static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	return x1205_set_datetime(to_i2c_client(dev),
		tm, 1, X1205_CCR_BASE);
}

static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
{
	int err, dtrim, atrim;

	if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
		seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);

	if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
		seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
			atrim / 1000, atrim % 1000);
	return 0;
}

static const struct rtc_class_ops x1205_rtc_ops = {
	.proc		= x1205_rtc_proc,
	.read_time	= x1205_rtc_read_time,
	.set_time	= x1205_rtc_set_time,
	.read_alarm	= x1205_rtc_read_alarm,
	.set_alarm	= x1205_rtc_set_alarm,
};

static ssize_t x1205_sysfs_show_atrim(struct device *dev,
				struct device_attribute *attr, char *buf)
{
	int err, atrim;

	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
	if (err)
		return err;

	return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
}
static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);

static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
				struct device_attribute *attr, char *buf)
{
	int err, dtrim;

	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
	if (err)
		return err;

	return sprintf(buf, "%d ppm\n", dtrim);
}
static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);

static int x1205_attach(struct i2c_adapter *adapter)
{
	return i2c_probe(adapter, &addr_data, x1205_probe);
}

static int x1205_probe(struct i2c_adapter *adapter, int address, int kind)
{
	int err = 0;
	unsigned char sr;
	struct i2c_client *client;
	struct rtc_device *rtc;

	dev_dbg(&adapter->dev, "%s\n", __FUNCTION__);

	if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
		err = -ENODEV;
		goto exit;
	}

	if (!(client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) {
		err = -ENOMEM;
		goto exit;
	}

	/* I2C client */
	client->addr = address;
	client->driver = &x1205_driver;
	client->adapter	= adapter;

	strlcpy(client->name, x1205_driver.driver.name, I2C_NAME_SIZE);

	/* Verify the chip is really an X1205 */
	if (kind < 0) {
		if (x1205_validate_client(client) < 0) {
			err = -ENODEV;
			goto exit_kfree;
		}
	}

	/* Inform the i2c layer */
	if ((err = i2c_attach_client(client)))
		goto exit_kfree;

	dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");

	rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
				&x1205_rtc_ops, THIS_MODULE);

	if (IS_ERR(rtc)) {
		err = PTR_ERR(rtc);
		goto exit_detach;
	}

	i2c_set_clientdata(client, rtc);

	/* Check for power failures and eventualy enable the osc */
	if ((err = x1205_get_status(client, &sr)) == 0) {
		if (sr & X1205_SR_RTCF) {
			dev_err(&client->dev,
				"power failure detected, "
				"please set the clock\n");
			udelay(50);
			x1205_fix_osc(client);
		}
	}
	else
		dev_err(&client->dev, "couldn't read status\n");

	err = device_create_file(&client->dev, &dev_attr_atrim);
	if (err) goto exit_devreg;
	err = device_create_file(&client->dev, &dev_attr_dtrim);
	if (err) goto exit_atrim;

	return 0;

exit_atrim:
	device_remove_file(&client->dev, &dev_attr_atrim);

exit_devreg:
	rtc_device_unregister(rtc);

exit_detach:
	i2c_detach_client(client);

exit_kfree:
	kfree(client);

exit:
	return err;
}

static int x1205_detach(struct i2c_client *client)
{
	int err;
	struct rtc_device *rtc = i2c_get_clientdata(client);

 	if (rtc)
		rtc_device_unregister(rtc);

	if ((err = i2c_detach_client(client)))
		return err;

	kfree(client);

	return 0;
}

static int __init x1205_init(void)
{
	return i2c_add_driver(&x1205_driver);
}

static void __exit x1205_exit(void)
{
	i2c_del_driver(&x1205_driver);
}

MODULE_AUTHOR(
	"Karen Spearel <kas111 at gmail dot com>, "
	"Alessandro Zummo <a.zummo@towertech.it>");
MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);

module_init(x1205_init);
module_exit(x1205_exit);
Commit	Line	Data
1fec7c66 AZ	1	/*
	2	* An i2c driver for the Xicor/Intersil X1205 RTC
	3	* Copyright 2004 Karen Spearel
	4	* Copyright 2005 Alessandro Zummo
	5	*
	6	* please send all reports to:
	7	* Karen Spearel <kas111 at gmail dot com>
	8	* Alessandro Zummo <a.zummo@towertech.it>
	9	*
	10	* based on a lot of other RTC drivers.
	11	*
890e0375 JD	12	* Information and datasheet:
	13	* http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
	14	*
1fec7c66 AZ	15	* This program is free software; you can redistribute it and/or modify
	16	* it under the terms of the GNU General Public License version 2 as
	17	* published by the Free Software Foundation.
	18	*/
	19
	20	#include <linux/i2c.h>
	21	#include <linux/bcd.h>
	22	#include <linux/rtc.h>
	23	#include <linux/delay.h>
	24
015aefbb	25	#define DRV_VERSION "1.0.7"
1fec7c66 AZ	26
	27	/* Addresses to scan: none. This chip is located at
	28	* 0x6f and uses a two bytes register addressing.
	29	* Two bytes need to be written to read a single register,
	30	* while most other chips just require one and take the second
	31	* one as the data to be written. To prevent corrupting
890e0375	32	* unknown chips, the user must explicitly set the probe parameter.
1fec7c66 AZ	33	*/
1fec7c66 AZ	34
922539a0	35	static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
1fec7c66 AZ	36
	37	/* Insmod parameters */
	38	I2C_CLIENT_INSMOD;
	39
	40	/* offsets into CCR area */
	41
	42	#define CCR_SEC 0
	43	#define CCR_MIN 1
	44	#define CCR_HOUR 2
	45	#define CCR_MDAY 3
	46	#define CCR_MONTH 4
	47	#define CCR_YEAR 5
	48	#define CCR_WDAY 6
	49	#define CCR_Y2K 7
	50
	51	#define X1205_REG_SR 0x3F /* status register */
	52	#define X1205_REG_Y2K 0x37
	53	#define X1205_REG_DW 0x36
	54	#define X1205_REG_YR 0x35
	55	#define X1205_REG_MO 0x34
	56	#define X1205_REG_DT 0x33
	57	#define X1205_REG_HR 0x32
	58	#define X1205_REG_MN 0x31
	59	#define X1205_REG_SC 0x30
	60	#define X1205_REG_DTR 0x13
	61	#define X1205_REG_ATR 0x12
	62	#define X1205_REG_INT 0x11
	63	#define X1205_REG_0 0x10
	64	#define X1205_REG_Y2K1 0x0F
	65	#define X1205_REG_DWA1 0x0E
	66	#define X1205_REG_YRA1 0x0D
	67	#define X1205_REG_MOA1 0x0C
	68	#define X1205_REG_DTA1 0x0B
	69	#define X1205_REG_HRA1 0x0A
	70	#define X1205_REG_MNA1 0x09
	71	#define X1205_REG_SCA1 0x08
	72	#define X1205_REG_Y2K0 0x07
	73	#define X1205_REG_DWA0 0x06
	74	#define X1205_REG_YRA0 0x05
	75	#define X1205_REG_MOA0 0x04
	76	#define X1205_REG_DTA0 0x03
	77	#define X1205_REG_HRA0 0x02
	78	#define X1205_REG_MNA0 0x01
	79	#define X1205_REG_SCA0 0x00
	80
	81	#define X1205_CCR_BASE 0x30 /* Base address of CCR */
	82	#define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
	83
	84	#define X1205_SR_RTCF 0x01 /* Clock failure */
	85	#define X1205_SR_WEL 0x02 /* Write Enable Latch */
	86	#define X1205_SR_RWEL 0x04 /* Register Write Enable */
	87
	88	#define X1205_DTR_DTR0 0x01
	89	#define X1205_DTR_DTR1 0x02
	90	#define X1205_DTR_DTR2 0x04
	91
	92	#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
	93
	94	/* Prototypes */
	95	static int x1205_attach(struct i2c_adapter *adapter);
	96	static int x1205_detach(struct i2c_client *client);
	97	static int x1205_probe(struct i2c_adapter *adapter, int address, int kind);
	98
	99	static struct i2c_driver x1205_driver = {
100	.driver = {
101	.name = "x1205",
102	},
103	.id = I2C_DRIVERID_X1205,
104	.attach_adapter = &x1205_attach,
105	.detach_client = &x1205_detach,
106	};
107
108	/*
109	* In the routines that deal directly with the x1205 hardware, we use
110	* rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
111	* Epoch is initialized as 2000. Time is set to UTC.
112	*/
113	static int x1205_get_datetime(struct i2c_client client, struct rtc_time tm,
114	unsigned char reg_base)
115	{
116	unsigned char dt_addr[2] = { 0, reg_base };
117
118	unsigned char buf[8];
119
120	struct i2c_msg msgs[] = {
121	{ client->addr, 0, 2, dt_addr }, /* setup read ptr */
122	{ client->addr, I2C_M_RD, 8, buf }, /* read date */
123	};
124
125	/* read date registers */
126	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
127	dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
128	return -EIO;
129	}
130
131	dev_dbg(&client->dev,
132	"%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
133	"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
134	__FUNCTION__,
135	buf[0], buf[1], buf[2], buf[3],
136	buf[4], buf[5], buf[6], buf[7]);
137
138	tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
139	tm->tm_min = BCD2BIN(buf[CCR_MIN]);
140	tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
141	tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
142	tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
143	tm->tm_year = BCD2BIN(buf[CCR_YEAR])
144	+ (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900;
145	tm->tm_wday = buf[CCR_WDAY];
146
147	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
148	"mday=%d, mon=%d, year=%d, wday=%d\n",
149	__FUNCTION__,
150	tm->tm_sec, tm->tm_min, tm->tm_hour,
151	tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
152
153	return 0;
154	}
155
156	static int x1205_get_status(struct i2c_client client, unsigned char sr)
157	{
158	static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
159
160	struct i2c_msg msgs[] = {
161	{ client->addr, 0, 2, sr_addr }, /* setup read ptr */
162	{ client->addr, I2C_M_RD, 1, sr }, /* read status */
163	};
164
165	/* read status register */
166	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
167	dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
168	return -EIO;
169	}
170
171	return 0;
172	}
173
174	static int x1205_set_datetime(struct i2c_client client, struct rtc_time tm,
175	int datetoo, u8 reg_base)
176	{
177	int i, xfer;
178	unsigned char buf[8];
179
180	static const unsigned char wel[3] = { 0, X1205_REG_SR,
181	X1205_SR_WEL };
182
183	static const unsigned char rwel[3] = { 0, X1205_REG_SR,
184	X1205_SR_WEL \| X1205_SR_RWEL };
185
186	static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
187
188	dev_dbg(&client->dev,
189	"%s: secs=%d, mins=%d, hours=%d\n",
190	__FUNCTION__,
191	tm->tm_sec, tm->tm_min, tm->tm_hour);
192
193	buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
194	buf[CCR_MIN] = BIN2BCD(tm->tm_min);
195
196	/* set hour and 24hr bit */
197	buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) \| X1205_HR_MIL;
198
199	/* should we also set the date? */
200	if (datetoo) {
201	dev_dbg(&client->dev,
202	"%s: mday=%d, mon=%d, year=%d, wday=%d\n",
203	__FUNCTION__,
204	tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
205
206	buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);
207
208	/* month, 1 - 12 */
209	buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1);
210
211	/* year, since the rtc epoch*/
212	buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
213	buf[CCR_WDAY] = tm->tm_wday & 0x07;
214	buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
215	}
216
217	/* this sequence is required to unlock the chip */
218	if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
219	dev_err(&client->dev, "%s: wel - %d\n", __FUNCTION__, xfer);
220	return -EIO;
221	}
222
223	if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
224	dev_err(&client->dev, "%s: rwel - %d\n", __FUNCTION__, xfer);
225	return -EIO;
226	}
227
228	/* write register's data */
229	for (i = 0; i < (datetoo ? 8 : 3); i++) {
230	unsigned char rdata[3] = { 0, reg_base + i, buf[i] };
231
232	xfer = i2c_master_send(client, rdata, 3);
233	if (xfer != 3) {
234	dev_err(&client->dev,
235	"%s: xfer=%d addr=%02x, data=%02x\n",
236	__FUNCTION__,
237	xfer, rdata[1], rdata[2]);
238	return -EIO;
239	}
240	};
241
242	/* disable further writes */
243	if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
244	dev_err(&client->dev, "%s: diswe - %d\n", __FUNCTION__, xfer);
245	return -EIO;
246	}
247
248	return 0;
249	}
250
251	static int x1205_fix_osc(struct i2c_client *client)
252	{
253	int err;
254	struct rtc_time tm;
255
256	tm.tm_hour = tm.tm_min = tm.tm_sec = 0;
257
258	if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0)
259	dev_err(&client->dev,
260	"unable to restart the oscillator\n");
261
262	return err;
263	}
264
265	static int x1205_get_dtrim(struct i2c_client client, int trim)
266	{
267	unsigned char dtr;
268	static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
269
270	struct i2c_msg msgs[] = {
271	{ client->addr, 0, 2, dtr_addr }, /* setup read ptr */
272	{ client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
273	};
274
275	/* read dtr register */
276	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
277	dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
278	return -EIO;
279	}
280
281	dev_dbg(&client->dev, "%s: raw dtr=%x\n", __FUNCTION__, dtr);
282
283	*trim = 0;
284
285	if (dtr & X1205_DTR_DTR0)
286	*trim += 20;
287
288	if (dtr & X1205_DTR_DTR1)
289	*trim += 10;
290
291	if (dtr & X1205_DTR_DTR2)
292	trim = -trim;
293
294	return 0;
295	}
296
297	static int x1205_get_atrim(struct i2c_client client, int trim)
298	{
299	s8 atr;
300	static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
301
302	struct i2c_msg msgs[] = {
303	{ client->addr, 0, 2, atr_addr }, /* setup read ptr */
304	{ client->addr, I2C_M_RD, 1, &atr }, /* read atr */
305	};
306
307	/* read atr register */
308	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
309	dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
310	return -EIO;
311	}
312
313	dev_dbg(&client->dev, "%s: raw atr=%x\n", __FUNCTION__, atr);
314
315	/* atr is a two's complement value on 6 bits,
316	* perform sign extension. The formula is
317	* Catr = (atr * 0.25pF) + 11.00pF.
318	*/
319	if (atr & 0x20)
320	atr \|= 0xC0;
321
322	dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __FUNCTION__, atr, atr);
323
324	trim = (atr 250) + 11000;
325
326	dev_dbg(&client->dev, "%s: real=%d\n", __FUNCTION__, *trim);
327
328	return 0;
329	}
330
331	struct x1205_limit
332	{
333	unsigned char reg, mask, min, max;
334	};
335
336	static int x1205_validate_client(struct i2c_client *client)
337	{
338	int i, xfer;
339
340	/* Probe array. We will read the register at the specified
341	* address and check if the given bits are zero.
342	*/
343	static const unsigned char probe_zero_pattern[] = {
344	/* register, mask */
345	X1205_REG_SR, 0x18,
346	X1205_REG_DTR, 0xF8,
347	X1205_REG_ATR, 0xC0,
348	X1205_REG_INT, 0x18,
349	X1205_REG_0, 0xFF,
350	};
351
352	static const struct x1205_limit probe_limits_pattern[] = {
353	/* register, mask, min, max */
354	{ X1205_REG_Y2K, 0xFF, 19, 20 },
355	{ X1205_REG_DW, 0xFF, 0, 6 },
356	{ X1205_REG_YR, 0xFF, 0, 99 },
357	{ X1205_REG_MO, 0xFF, 0, 12 },
358	{ X1205_REG_DT, 0xFF, 0, 31 },
359	{ X1205_REG_HR, 0x7F, 0, 23 },
360	{ X1205_REG_MN, 0xFF, 0, 59 },
361	{ X1205_REG_SC, 0xFF, 0, 59 },
362	{ X1205_REG_Y2K1, 0xFF, 19, 20 },
363	{ X1205_REG_Y2K0, 0xFF, 19, 20 },
364	};
365
366	/* check that registers have bits a 0 where expected */
367	for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
368	unsigned char buf;
369
370	unsigned char addr[2] = { 0, probe_zero_pattern[i] };
371
372	struct i2c_msg msgs[2] = {
373	{ client->addr, 0, 2, addr },
374	{ client->addr, I2C_M_RD, 1, &buf },
375	};
376
377	if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
a14e1893	378	dev_err(&client->dev,
1fec7c66 AZ	379	"%s: could not read register %x\n",
	380	__FUNCTION__, probe_zero_pattern[i]);
	381
	382	return -EIO;
	383	}
	384
	385	if ((buf & probe_zero_pattern[i+1]) != 0) {
a14e1893	386	dev_err(&client->dev,
1fec7c66 AZ	387	"%s: register=%02x, zero pattern=%d, value=%x\n",
	388	__FUNCTION__, probe_zero_pattern[i], i, buf);
	389
	390	return -ENODEV;
	391	}
	392	}
	393
	394	/* check limits (only registers with bcd values) */
	395	for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
	396	unsigned char reg, value;
	397
	398	unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
	399
	400	struct i2c_msg msgs[2] = {
	401	{ client->addr, 0, 2, addr },
	402	{ client->addr, I2C_M_RD, 1, &reg },
	403	};
	404
	405	if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
a14e1893	406	dev_err(&client->dev,
1fec7c66 AZ	407	"%s: could not read register %x\n",
	408	__FUNCTION__, probe_limits_pattern[i].reg);
	409
	410	return -EIO;
	411	}
	412
	413	value = BCD2BIN(reg & probe_limits_pattern[i].mask);
	414
	415	if (value > probe_limits_pattern[i].max \|\|
	416	value < probe_limits_pattern[i].min) {
a14e1893	417	dev_dbg(&client->dev,
1fec7c66 AZ	418	"%s: register=%x, lim pattern=%d, value=%d\n",
	419	__FUNCTION__, probe_limits_pattern[i].reg,
	420	i, value);
	421
	422	return -ENODEV;
	423	}
	424	}
	425
	426	return 0;
	427	}
	428
	429	static int x1205_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	430	{
	431	return x1205_get_datetime(to_i2c_client(dev),
	432	&alrm->time, X1205_ALM0_BASE);
	433	}
	434
	435	static int x1205_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	436	{
	437	return x1205_set_datetime(to_i2c_client(dev),
	438	&alrm->time, 1, X1205_ALM0_BASE);
	439	}
	440
	441	static int x1205_rtc_read_time(struct device dev, struct rtc_time tm)
	442	{
	443	return x1205_get_datetime(to_i2c_client(dev),
	444	tm, X1205_CCR_BASE);
	445	}
	446
	447	static int x1205_rtc_set_time(struct device dev, struct rtc_time tm)
	448	{
	449	return x1205_set_datetime(to_i2c_client(dev),
	450	tm, 1, X1205_CCR_BASE);
	451	}
	452
	453	static int x1205_rtc_proc(struct device dev, struct seq_file seq)
	454	{
	455	int err, dtrim, atrim;
	456
1fec7c66 AZ	457	if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
	458	seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
	459
	460	if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
	461	seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
	462	atrim / 1000, atrim % 1000);
	463	return 0;
	464	}
	465
ff8371ac	466	static const struct rtc_class_ops x1205_rtc_ops = {
1fec7c66 AZ	467	.proc = x1205_rtc_proc,
	468	.read_time = x1205_rtc_read_time,
	469	.set_time = x1205_rtc_set_time,
	470	.read_alarm = x1205_rtc_read_alarm,
	471	.set_alarm = x1205_rtc_set_alarm,
	472	};
	473
	474	static ssize_t x1205_sysfs_show_atrim(struct device *dev,
	475	struct device_attribute attr, char buf)
	476	{
015aefbb	477	int err, atrim;
1fec7c66	478
015aefbb AZ	479	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
	480	if (err)
	481	return err;
	482
	483	return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
1fec7c66 AZ	484	}
	485	static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
	486
	487	static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
	488	struct device_attribute attr, char buf)
	489	{
015aefbb	490	int err, dtrim;
1fec7c66	491
015aefbb AZ	492	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
	493	if (err)
	494	return err;
1fec7c66	495
015aefbb	496	return sprintf(buf, "%d ppm\n", dtrim);
1fec7c66 AZ	497	}
	498	static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
	499
	500	static int x1205_attach(struct i2c_adapter *adapter)
	501	{
1fec7c66 AZ	502	return i2c_probe(adapter, &addr_data, x1205_probe);
	503	}
	504
	505	static int x1205_probe(struct i2c_adapter *adapter, int address, int kind)
	506	{
	507	int err = 0;
	508	unsigned char sr;
	509	struct i2c_client *client;
	510	struct rtc_device *rtc;
	511
5dd3ffae	512	dev_dbg(&adapter->dev, "%s\n", __FUNCTION__);
1fec7c66 AZ	513
	514	if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
	515	err = -ENODEV;
	516	goto exit;
	517	}
	518
	519	if (!(client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) {
	520	err = -ENOMEM;
	521	goto exit;
	522	}
	523
	524	/* I2C client */
	525	client->addr = address;
	526	client->driver = &x1205_driver;
	527	client->adapter = adapter;
	528
	529	strlcpy(client->name, x1205_driver.driver.name, I2C_NAME_SIZE);
	530
	531	/* Verify the chip is really an X1205 */
	532	if (kind < 0) {
	533	if (x1205_validate_client(client) < 0) {
	534	err = -ENODEV;
	535	goto exit_kfree;
	536	}
	537	}
	538
	539	/* Inform the i2c layer */
	540	if ((err = i2c_attach_client(client)))
	541	goto exit_kfree;
	542
	543	dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
	544
	545	rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
	546	&x1205_rtc_ops, THIS_MODULE);
	547
	548	if (IS_ERR(rtc)) {
	549	err = PTR_ERR(rtc);
1fec7c66 AZ	550	goto exit_detach;
	551	}
	552
	553	i2c_set_clientdata(client, rtc);
	554
	555	/* Check for power failures and eventualy enable the osc */
	556	if ((err = x1205_get_status(client, &sr)) == 0) {
	557	if (sr & X1205_SR_RTCF) {
	558	dev_err(&client->dev,
	559	"power failure detected, "
	560	"please set the clock\n");
	561	udelay(50);
	562	x1205_fix_osc(client);
	563	}
	564	}
	565	else
	566	dev_err(&client->dev, "couldn't read status\n");
	567
91046a8a JG	568	err = device_create_file(&client->dev, &dev_attr_atrim);
	569	if (err) goto exit_devreg;
	570	err = device_create_file(&client->dev, &dev_attr_dtrim);
	571	if (err) goto exit_atrim;
1fec7c66 AZ	572
	573	return 0;
	574
91046a8a JG	575	exit_atrim:
	576	device_remove_file(&client->dev, &dev_attr_atrim);
	577
	578	exit_devreg:
	579	rtc_device_unregister(rtc);
	580
1fec7c66 AZ	581	exit_detach:
	582	i2c_detach_client(client);
	583
	584	exit_kfree:
	585	kfree(client);
	586
	587	exit:
	588	return err;
	589	}
	590
	591	static int x1205_detach(struct i2c_client *client)
	592	{
	593	int err;
	594	struct rtc_device *rtc = i2c_get_clientdata(client);
	595
1fec7c66 AZ	596	if (rtc)
	597	rtc_device_unregister(rtc);
	598
	599	if ((err = i2c_detach_client(client)))
	600	return err;
	601
	602	kfree(client);
	603
	604	return 0;
	605	}
	606
	607	static int __init x1205_init(void)
	608	{
	609	return i2c_add_driver(&x1205_driver);
	610	}
	611
	612	static void __exit x1205_exit(void)
	613	{
	614	i2c_del_driver(&x1205_driver);
	615	}
	616
	617	MODULE_AUTHOR(
	618	"Karen Spearel <kas111 at gmail dot com>, "
	619	"Alessandro Zummo <a.zummo@towertech.it>");
	620	MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
	621	MODULE_LICENSE("GPL");
	622	MODULE_VERSION(DRV_VERSION);
	623
	624	module_init(x1205_init);
	625	module_exit(x1205_exit);